2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
55 if (sc->curtxpow != sc->config.txpowlimit) {
56 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
57 /* read back in case value is clamped */
58 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
62 static u8 parse_mpdudensity(u8 mpdudensity)
65 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
66 * 0 for no restriction
75 switch (mpdudensity) {
81 /* Our lower layer calculations limit our precision to
97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
98 struct ieee80211_hw *hw)
100 struct ieee80211_channel *curchan = hw->conf.channel;
101 struct ath9k_channel *channel;
104 chan_idx = curchan->hw_value;
105 channel = &sc->sc_ah->channels[chan_idx];
106 ath9k_update_ichannel(sc, hw, channel);
110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
115 spin_lock_irqsave(&sc->sc_pm_lock, flags);
116 ret = ath9k_hw_setpower(sc->sc_ah, mode);
117 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
122 void ath9k_ps_wakeup(struct ath_softc *sc)
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (++sc->ps_usecount != 1)
130 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
133 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
136 void ath9k_ps_restore(struct ath_softc *sc)
140 spin_lock_irqsave(&sc->sc_pm_lock, flags);
141 if (--sc->ps_usecount != 0)
145 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
146 else if (sc->ps_enabled &&
147 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
149 PS_WAIT_FOR_PSPOLL_DATA |
150 PS_WAIT_FOR_TX_ACK)))
151 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
154 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
157 static void ath_start_ani(struct ath_common *common)
159 struct ath_hw *ah = common->ah;
160 unsigned long timestamp = jiffies_to_msecs(jiffies);
161 struct ath_softc *sc = (struct ath_softc *) common->priv;
163 if (!(sc->sc_flags & SC_OP_ANI_RUN))
166 if (sc->sc_flags & SC_OP_OFFCHANNEL)
169 common->ani.longcal_timer = timestamp;
170 common->ani.shortcal_timer = timestamp;
171 common->ani.checkani_timer = timestamp;
173 mod_timer(&common->ani.timer,
175 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
179 * Set/change channels. If the channel is really being changed, it's done
180 * by reseting the chip. To accomplish this we must first cleanup any pending
181 * DMA, then restart stuff.
183 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
184 struct ath9k_channel *hchan)
186 struct ath_wiphy *aphy = hw->priv;
187 struct ath_hw *ah = sc->sc_ah;
188 struct ath_common *common = ath9k_hw_common(ah);
189 struct ieee80211_conf *conf = &common->hw->conf;
190 bool fastcc = true, stopped;
191 struct ieee80211_channel *channel = hw->conf.channel;
192 struct ath9k_hw_cal_data *caldata = NULL;
195 if (sc->sc_flags & SC_OP_INVALID)
198 del_timer_sync(&common->ani.timer);
199 cancel_work_sync(&sc->paprd_work);
200 cancel_work_sync(&sc->hw_check_work);
201 cancel_delayed_work_sync(&sc->tx_complete_work);
206 * This is only performed if the channel settings have
209 * To switch channels clear any pending DMA operations;
210 * wait long enough for the RX fifo to drain, reset the
211 * hardware at the new frequency, and then re-enable
212 * the relevant bits of the h/w.
214 ath9k_hw_set_interrupts(ah, 0);
215 ath_drain_all_txq(sc, false);
216 stopped = ath_stoprecv(sc);
218 /* XXX: do not flush receive queue here. We don't want
219 * to flush data frames already in queue because of
220 * changing channel. */
222 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
225 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
226 caldata = &aphy->caldata;
228 ath_print(common, ATH_DBG_CONFIG,
229 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
230 sc->sc_ah->curchan->channel,
231 channel->center_freq, conf_is_ht40(conf));
233 spin_lock_bh(&sc->sc_resetlock);
235 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
237 ath_print(common, ATH_DBG_FATAL,
238 "Unable to reset channel (%u MHz), "
240 channel->center_freq, r);
241 spin_unlock_bh(&sc->sc_resetlock);
244 spin_unlock_bh(&sc->sc_resetlock);
246 if (ath_startrecv(sc) != 0) {
247 ath_print(common, ATH_DBG_FATAL,
248 "Unable to restart recv logic\n");
253 ath_cache_conf_rate(sc, &hw->conf);
254 ath_update_txpow(sc);
255 ath9k_hw_set_interrupts(ah, ah->imask);
257 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL | SC_OP_SCANNING))) {
258 ath_start_ani(common);
259 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
260 ath_beacon_config(sc, NULL);
264 ath9k_ps_restore(sc);
268 static void ath_paprd_activate(struct ath_softc *sc)
270 struct ath_hw *ah = sc->sc_ah;
271 struct ath9k_hw_cal_data *caldata = ah->caldata;
274 if (!caldata || !caldata->paprd_done)
278 ar9003_paprd_enable(ah, false);
279 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
280 if (!(ah->caps.tx_chainmask & BIT(chain)))
283 ar9003_paprd_populate_single_table(ah, caldata, chain);
286 ar9003_paprd_enable(ah, true);
287 ath9k_ps_restore(sc);
290 void ath_paprd_calibrate(struct work_struct *work)
292 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
293 struct ieee80211_hw *hw = sc->hw;
294 struct ath_hw *ah = sc->sc_ah;
295 struct ieee80211_hdr *hdr;
296 struct sk_buff *skb = NULL;
297 struct ieee80211_tx_info *tx_info;
298 int band = hw->conf.channel->band;
299 struct ieee80211_supported_band *sband = &sc->sbands[band];
300 struct ath_tx_control txctl;
301 struct ath9k_hw_cal_data *caldata = ah->caldata;
312 skb = alloc_skb(len, GFP_KERNEL);
316 tx_info = IEEE80211_SKB_CB(skb);
319 memset(skb->data, 0, len);
320 hdr = (struct ieee80211_hdr *)skb->data;
321 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
322 hdr->frame_control = cpu_to_le16(ftype);
323 hdr->duration_id = cpu_to_le16(10);
324 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
325 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
326 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
328 memset(&txctl, 0, sizeof(txctl));
329 qnum = sc->tx.hwq_map[WME_AC_BE];
330 txctl.txq = &sc->tx.txq[qnum];
333 ar9003_paprd_init_table(ah);
334 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
335 if (!(ah->caps.tx_chainmask & BIT(chain)))
339 memset(tx_info, 0, sizeof(*tx_info));
340 tx_info->band = band;
342 for (i = 0; i < 4; i++) {
343 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
344 tx_info->control.rates[i].count = 6;
347 init_completion(&sc->paprd_complete);
348 ar9003_paprd_setup_gain_table(ah, chain);
349 txctl.paprd = BIT(chain);
350 if (ath_tx_start(hw, skb, &txctl) != 0)
353 time_left = wait_for_completion_timeout(&sc->paprd_complete,
354 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
356 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
357 "Timeout waiting for paprd training on "
363 if (!ar9003_paprd_is_done(ah))
366 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
374 caldata->paprd_done = true;
375 ath_paprd_activate(sc);
379 ath9k_ps_restore(sc);
383 * This routine performs the periodic noise floor calibration function
384 * that is used to adjust and optimize the chip performance. This
385 * takes environmental changes (location, temperature) into account.
386 * When the task is complete, it reschedules itself depending on the
387 * appropriate interval that was calculated.
389 void ath_ani_calibrate(unsigned long data)
391 struct ath_softc *sc = (struct ath_softc *)data;
392 struct ath_hw *ah = sc->sc_ah;
393 struct ath_common *common = ath9k_hw_common(ah);
394 bool longcal = false;
395 bool shortcal = false;
396 bool aniflag = false;
397 unsigned int timestamp = jiffies_to_msecs(jiffies);
398 u32 cal_interval, short_cal_interval;
400 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
401 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
403 /* Only calibrate if awake */
404 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
409 /* Long calibration runs independently of short calibration. */
410 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
412 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
413 common->ani.longcal_timer = timestamp;
416 /* Short calibration applies only while caldone is false */
417 if (!common->ani.caldone) {
418 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
420 ath_print(common, ATH_DBG_ANI,
421 "shortcal @%lu\n", jiffies);
422 common->ani.shortcal_timer = timestamp;
423 common->ani.resetcal_timer = timestamp;
426 if ((timestamp - common->ani.resetcal_timer) >=
427 ATH_RESTART_CALINTERVAL) {
428 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
429 if (common->ani.caldone)
430 common->ani.resetcal_timer = timestamp;
434 /* Verify whether we must check ANI */
435 if ((timestamp - common->ani.checkani_timer) >=
436 ah->config.ani_poll_interval) {
438 common->ani.checkani_timer = timestamp;
441 /* Skip all processing if there's nothing to do. */
442 if (longcal || shortcal || aniflag) {
443 /* Call ANI routine if necessary */
445 ath9k_hw_ani_monitor(ah, ah->curchan);
447 /* Perform calibration if necessary */
448 if (longcal || shortcal) {
449 common->ani.caldone =
450 ath9k_hw_calibrate(ah,
452 common->rx_chainmask,
456 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
459 ath_print(common, ATH_DBG_ANI,
460 " calibrate chan %u/%x nf: %d\n",
461 ah->curchan->channel,
462 ah->curchan->channelFlags,
463 common->ani.noise_floor);
467 ath9k_ps_restore(sc);
471 * Set timer interval based on previous results.
472 * The interval must be the shortest necessary to satisfy ANI,
473 * short calibration and long calibration.
475 cal_interval = ATH_LONG_CALINTERVAL;
476 if (sc->sc_ah->config.enable_ani)
477 cal_interval = min(cal_interval,
478 (u32)ah->config.ani_poll_interval);
479 if (!common->ani.caldone)
480 cal_interval = min(cal_interval, (u32)short_cal_interval);
482 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
483 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
484 if (!ah->caldata->paprd_done)
485 ieee80211_queue_work(sc->hw, &sc->paprd_work);
487 ath_paprd_activate(sc);
492 * Update tx/rx chainmask. For legacy association,
493 * hard code chainmask to 1x1, for 11n association, use
494 * the chainmask configuration, for bt coexistence, use
495 * the chainmask configuration even in legacy mode.
497 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
499 struct ath_hw *ah = sc->sc_ah;
500 struct ath_common *common = ath9k_hw_common(ah);
502 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
503 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
504 common->tx_chainmask = ah->caps.tx_chainmask;
505 common->rx_chainmask = ah->caps.rx_chainmask;
507 common->tx_chainmask = 1;
508 common->rx_chainmask = 1;
511 ath_print(common, ATH_DBG_CONFIG,
512 "tx chmask: %d, rx chmask: %d\n",
513 common->tx_chainmask,
514 common->rx_chainmask);
517 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
521 an = (struct ath_node *)sta->drv_priv;
523 if (sc->sc_flags & SC_OP_TXAGGR) {
524 ath_tx_node_init(sc, an);
525 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
526 sta->ht_cap.ampdu_factor);
527 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
528 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
532 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
534 struct ath_node *an = (struct ath_node *)sta->drv_priv;
536 if (sc->sc_flags & SC_OP_TXAGGR)
537 ath_tx_node_cleanup(sc, an);
540 void ath_hw_check(struct work_struct *work)
542 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
547 for (i = 0; i < 3; i++) {
548 if (ath9k_hw_check_alive(sc->sc_ah))
553 ath_reset(sc, false);
556 ath9k_ps_restore(sc);
559 void ath9k_tasklet(unsigned long data)
561 struct ath_softc *sc = (struct ath_softc *)data;
562 struct ath_hw *ah = sc->sc_ah;
563 struct ath_common *common = ath9k_hw_common(ah);
565 u32 status = sc->intrstatus;
570 if (status & ATH9K_INT_FATAL) {
571 ath_reset(sc, false);
572 ath9k_ps_restore(sc);
576 if (!ath9k_hw_check_alive(ah))
577 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
579 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
580 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
583 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
585 if (status & rxmask) {
586 spin_lock_bh(&sc->rx.rxflushlock);
588 /* Check for high priority Rx first */
589 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
590 (status & ATH9K_INT_RXHP))
591 ath_rx_tasklet(sc, 0, true);
593 ath_rx_tasklet(sc, 0, false);
594 spin_unlock_bh(&sc->rx.rxflushlock);
597 if (status & ATH9K_INT_TX) {
598 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
599 ath_tx_edma_tasklet(sc);
604 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
606 * TSF sync does not look correct; remain awake to sync with
609 ath_print(common, ATH_DBG_PS,
610 "TSFOOR - Sync with next Beacon\n");
611 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
614 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
615 if (status & ATH9K_INT_GENTIMER)
616 ath_gen_timer_isr(sc->sc_ah);
618 /* re-enable hardware interrupt */
619 ath9k_hw_set_interrupts(ah, ah->imask);
620 ath9k_ps_restore(sc);
623 irqreturn_t ath_isr(int irq, void *dev)
625 #define SCHED_INTR ( \
638 struct ath_softc *sc = dev;
639 struct ath_hw *ah = sc->sc_ah;
640 enum ath9k_int status;
644 * The hardware is not ready/present, don't
645 * touch anything. Note this can happen early
646 * on if the IRQ is shared.
648 if (sc->sc_flags & SC_OP_INVALID)
652 /* shared irq, not for us */
654 if (!ath9k_hw_intrpend(ah))
658 * Figure out the reason(s) for the interrupt. Note
659 * that the hal returns a pseudo-ISR that may include
660 * bits we haven't explicitly enabled so we mask the
661 * value to insure we only process bits we requested.
663 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
664 status &= ah->imask; /* discard unasked-for bits */
667 * If there are no status bits set, then this interrupt was not
668 * for me (should have been caught above).
673 /* Cache the status */
674 sc->intrstatus = status;
676 if (status & SCHED_INTR)
680 * If a FATAL or RXORN interrupt is received, we have to reset the
683 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
684 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
687 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
688 (status & ATH9K_INT_BB_WATCHDOG)) {
689 ar9003_hw_bb_watchdog_dbg_info(ah);
693 if (status & ATH9K_INT_SWBA)
694 tasklet_schedule(&sc->bcon_tasklet);
696 if (status & ATH9K_INT_TXURN)
697 ath9k_hw_updatetxtriglevel(ah, true);
699 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
700 if (status & ATH9K_INT_RXEOL) {
701 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
702 ath9k_hw_set_interrupts(ah, ah->imask);
706 if (status & ATH9K_INT_MIB) {
708 * Disable interrupts until we service the MIB
709 * interrupt; otherwise it will continue to
712 ath9k_hw_set_interrupts(ah, 0);
714 * Let the hal handle the event. We assume
715 * it will clear whatever condition caused
718 ath9k_hw_procmibevent(ah);
719 ath9k_hw_set_interrupts(ah, ah->imask);
722 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
723 if (status & ATH9K_INT_TIM_TIMER) {
724 /* Clear RxAbort bit so that we can
726 ath9k_setpower(sc, ATH9K_PM_AWAKE);
727 ath9k_hw_setrxabort(sc->sc_ah, 0);
728 sc->ps_flags |= PS_WAIT_FOR_BEACON;
733 ath_debug_stat_interrupt(sc, status);
736 /* turn off every interrupt except SWBA */
737 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
738 tasklet_schedule(&sc->intr_tq);
746 static u32 ath_get_extchanmode(struct ath_softc *sc,
747 struct ieee80211_channel *chan,
748 enum nl80211_channel_type channel_type)
752 switch (chan->band) {
753 case IEEE80211_BAND_2GHZ:
754 switch(channel_type) {
755 case NL80211_CHAN_NO_HT:
756 case NL80211_CHAN_HT20:
757 chanmode = CHANNEL_G_HT20;
759 case NL80211_CHAN_HT40PLUS:
760 chanmode = CHANNEL_G_HT40PLUS;
762 case NL80211_CHAN_HT40MINUS:
763 chanmode = CHANNEL_G_HT40MINUS;
767 case IEEE80211_BAND_5GHZ:
768 switch(channel_type) {
769 case NL80211_CHAN_NO_HT:
770 case NL80211_CHAN_HT20:
771 chanmode = CHANNEL_A_HT20;
773 case NL80211_CHAN_HT40PLUS:
774 chanmode = CHANNEL_A_HT40PLUS;
776 case NL80211_CHAN_HT40MINUS:
777 chanmode = CHANNEL_A_HT40MINUS;
788 static void ath9k_bss_assoc_info(struct ath_softc *sc,
789 struct ieee80211_vif *vif,
790 struct ieee80211_bss_conf *bss_conf)
792 struct ath_hw *ah = sc->sc_ah;
793 struct ath_common *common = ath9k_hw_common(ah);
795 if (bss_conf->assoc) {
796 ath_print(common, ATH_DBG_CONFIG,
797 "Bss Info ASSOC %d, bssid: %pM\n",
798 bss_conf->aid, common->curbssid);
800 /* New association, store aid */
801 common->curaid = bss_conf->aid;
802 ath9k_hw_write_associd(ah);
805 * Request a re-configuration of Beacon related timers
806 * on the receipt of the first Beacon frame (i.e.,
807 * after time sync with the AP).
809 sc->ps_flags |= PS_BEACON_SYNC;
811 /* Configure the beacon */
812 ath_beacon_config(sc, vif);
814 /* Reset rssi stats */
815 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
817 sc->sc_flags |= SC_OP_ANI_RUN;
818 ath_start_ani(common);
820 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
823 sc->sc_flags &= ~SC_OP_ANI_RUN;
824 del_timer_sync(&common->ani.timer);
828 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
830 struct ath_hw *ah = sc->sc_ah;
831 struct ath_common *common = ath9k_hw_common(ah);
832 struct ieee80211_channel *channel = hw->conf.channel;
836 ath9k_hw_configpcipowersave(ah, 0, 0);
839 ah->curchan = ath_get_curchannel(sc, sc->hw);
841 spin_lock_bh(&sc->sc_resetlock);
842 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
844 ath_print(common, ATH_DBG_FATAL,
845 "Unable to reset channel (%u MHz), "
847 channel->center_freq, r);
849 spin_unlock_bh(&sc->sc_resetlock);
851 ath_update_txpow(sc);
852 if (ath_startrecv(sc) != 0) {
853 ath_print(common, ATH_DBG_FATAL,
854 "Unable to restart recv logic\n");
858 if (sc->sc_flags & SC_OP_BEACONS)
859 ath_beacon_config(sc, NULL); /* restart beacons */
861 /* Re-Enable interrupts */
862 ath9k_hw_set_interrupts(ah, ah->imask);
865 ath9k_hw_cfg_output(ah, ah->led_pin,
866 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
867 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
869 ieee80211_wake_queues(hw);
870 ath9k_ps_restore(sc);
873 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
875 struct ath_hw *ah = sc->sc_ah;
876 struct ieee80211_channel *channel = hw->conf.channel;
880 ieee80211_stop_queues(hw);
883 * Keep the LED on when the radio is disabled
884 * during idle unassociated state.
887 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
888 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
891 /* Disable interrupts */
892 ath9k_hw_set_interrupts(ah, 0);
894 ath_drain_all_txq(sc, false); /* clear pending tx frames */
895 ath_stoprecv(sc); /* turn off frame recv */
896 ath_flushrecv(sc); /* flush recv queue */
899 ah->curchan = ath_get_curchannel(sc, hw);
901 spin_lock_bh(&sc->sc_resetlock);
902 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
904 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
905 "Unable to reset channel (%u MHz), "
907 channel->center_freq, r);
909 spin_unlock_bh(&sc->sc_resetlock);
911 ath9k_hw_phy_disable(ah);
912 ath9k_hw_configpcipowersave(ah, 1, 1);
913 ath9k_ps_restore(sc);
914 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
917 int ath_reset(struct ath_softc *sc, bool retry_tx)
919 struct ath_hw *ah = sc->sc_ah;
920 struct ath_common *common = ath9k_hw_common(ah);
921 struct ieee80211_hw *hw = sc->hw;
925 del_timer_sync(&common->ani.timer);
927 ieee80211_stop_queues(hw);
929 ath9k_hw_set_interrupts(ah, 0);
930 ath_drain_all_txq(sc, retry_tx);
934 spin_lock_bh(&sc->sc_resetlock);
935 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
937 ath_print(common, ATH_DBG_FATAL,
938 "Unable to reset hardware; reset status %d\n", r);
939 spin_unlock_bh(&sc->sc_resetlock);
941 if (ath_startrecv(sc) != 0)
942 ath_print(common, ATH_DBG_FATAL,
943 "Unable to start recv logic\n");
946 * We may be doing a reset in response to a request
947 * that changes the channel so update any state that
948 * might change as a result.
950 ath_cache_conf_rate(sc, &hw->conf);
952 ath_update_txpow(sc);
954 if (sc->sc_flags & SC_OP_BEACONS)
955 ath_beacon_config(sc, NULL); /* restart beacons */
957 ath9k_hw_set_interrupts(ah, ah->imask);
961 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
962 if (ATH_TXQ_SETUP(sc, i)) {
963 spin_lock_bh(&sc->tx.txq[i].axq_lock);
964 ath_txq_schedule(sc, &sc->tx.txq[i]);
965 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
970 ieee80211_wake_queues(hw);
973 ath_start_ani(common);
978 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
984 qnum = sc->tx.hwq_map[WME_AC_VO];
987 qnum = sc->tx.hwq_map[WME_AC_VI];
990 qnum = sc->tx.hwq_map[WME_AC_BE];
993 qnum = sc->tx.hwq_map[WME_AC_BK];
996 qnum = sc->tx.hwq_map[WME_AC_BE];
1003 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1028 /* XXX: Remove me once we don't depend on ath9k_channel for all
1029 * this redundant data */
1030 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1031 struct ath9k_channel *ichan)
1033 struct ieee80211_channel *chan = hw->conf.channel;
1034 struct ieee80211_conf *conf = &hw->conf;
1036 ichan->channel = chan->center_freq;
1039 if (chan->band == IEEE80211_BAND_2GHZ) {
1040 ichan->chanmode = CHANNEL_G;
1041 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1043 ichan->chanmode = CHANNEL_A;
1044 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1047 if (conf_is_ht(conf))
1048 ichan->chanmode = ath_get_extchanmode(sc, chan,
1049 conf->channel_type);
1052 /**********************/
1053 /* mac80211 callbacks */
1054 /**********************/
1056 static int ath9k_start(struct ieee80211_hw *hw)
1058 struct ath_wiphy *aphy = hw->priv;
1059 struct ath_softc *sc = aphy->sc;
1060 struct ath_hw *ah = sc->sc_ah;
1061 struct ath_common *common = ath9k_hw_common(ah);
1062 struct ieee80211_channel *curchan = hw->conf.channel;
1063 struct ath9k_channel *init_channel;
1066 ath_print(common, ATH_DBG_CONFIG,
1067 "Starting driver with initial channel: %d MHz\n",
1068 curchan->center_freq);
1070 mutex_lock(&sc->mutex);
1072 if (ath9k_wiphy_started(sc)) {
1073 if (sc->chan_idx == curchan->hw_value) {
1075 * Already on the operational channel, the new wiphy
1076 * can be marked active.
1078 aphy->state = ATH_WIPHY_ACTIVE;
1079 ieee80211_wake_queues(hw);
1082 * Another wiphy is on another channel, start the new
1083 * wiphy in paused state.
1085 aphy->state = ATH_WIPHY_PAUSED;
1086 ieee80211_stop_queues(hw);
1088 mutex_unlock(&sc->mutex);
1091 aphy->state = ATH_WIPHY_ACTIVE;
1093 /* setup initial channel */
1095 sc->chan_idx = curchan->hw_value;
1097 init_channel = ath_get_curchannel(sc, hw);
1099 /* Reset SERDES registers */
1100 ath9k_hw_configpcipowersave(ah, 0, 0);
1103 * The basic interface to setting the hardware in a good
1104 * state is ``reset''. On return the hardware is known to
1105 * be powered up and with interrupts disabled. This must
1106 * be followed by initialization of the appropriate bits
1107 * and then setup of the interrupt mask.
1109 spin_lock_bh(&sc->sc_resetlock);
1110 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1112 ath_print(common, ATH_DBG_FATAL,
1113 "Unable to reset hardware; reset status %d "
1114 "(freq %u MHz)\n", r,
1115 curchan->center_freq);
1116 spin_unlock_bh(&sc->sc_resetlock);
1119 spin_unlock_bh(&sc->sc_resetlock);
1122 * This is needed only to setup initial state
1123 * but it's best done after a reset.
1125 ath_update_txpow(sc);
1128 * Setup the hardware after reset:
1129 * The receive engine is set going.
1130 * Frame transmit is handled entirely
1131 * in the frame output path; there's nothing to do
1132 * here except setup the interrupt mask.
1134 if (ath_startrecv(sc) != 0) {
1135 ath_print(common, ATH_DBG_FATAL,
1136 "Unable to start recv logic\n");
1141 /* Setup our intr mask. */
1142 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1143 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1146 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1147 ah->imask |= ATH9K_INT_RXHP |
1149 ATH9K_INT_BB_WATCHDOG;
1151 ah->imask |= ATH9K_INT_RX;
1153 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1154 ah->imask |= ATH9K_INT_GTT;
1156 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1157 ah->imask |= ATH9K_INT_CST;
1159 ath_cache_conf_rate(sc, &hw->conf);
1161 sc->sc_flags &= ~SC_OP_INVALID;
1163 /* Disable BMISS interrupt when we're not associated */
1164 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1165 ath9k_hw_set_interrupts(ah, ah->imask);
1167 ieee80211_wake_queues(hw);
1169 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1171 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1172 !ah->btcoex_hw.enabled) {
1173 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1174 AR_STOMP_LOW_WLAN_WGHT);
1175 ath9k_hw_btcoex_enable(ah);
1177 if (common->bus_ops->bt_coex_prep)
1178 common->bus_ops->bt_coex_prep(common);
1179 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1180 ath9k_btcoex_timer_resume(sc);
1184 mutex_unlock(&sc->mutex);
1189 static int ath9k_tx(struct ieee80211_hw *hw,
1190 struct sk_buff *skb)
1192 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1193 struct ath_wiphy *aphy = hw->priv;
1194 struct ath_softc *sc = aphy->sc;
1195 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1196 struct ath_tx_control txctl;
1197 int padpos, padsize;
1198 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1201 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1202 ath_print(common, ATH_DBG_XMIT,
1203 "ath9k: %s: TX in unexpected wiphy state "
1204 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1208 if (sc->ps_enabled) {
1210 * mac80211 does not set PM field for normal data frames, so we
1211 * need to update that based on the current PS mode.
1213 if (ieee80211_is_data(hdr->frame_control) &&
1214 !ieee80211_is_nullfunc(hdr->frame_control) &&
1215 !ieee80211_has_pm(hdr->frame_control)) {
1216 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1217 "while in PS mode\n");
1218 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1222 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1224 * We are using PS-Poll and mac80211 can request TX while in
1225 * power save mode. Need to wake up hardware for the TX to be
1226 * completed and if needed, also for RX of buffered frames.
1228 ath9k_ps_wakeup(sc);
1229 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1230 ath9k_hw_setrxabort(sc->sc_ah, 0);
1231 if (ieee80211_is_pspoll(hdr->frame_control)) {
1232 ath_print(common, ATH_DBG_PS,
1233 "Sending PS-Poll to pick a buffered frame\n");
1234 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1236 ath_print(common, ATH_DBG_PS,
1237 "Wake up to complete TX\n");
1238 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1241 * The actual restore operation will happen only after
1242 * the sc_flags bit is cleared. We are just dropping
1243 * the ps_usecount here.
1245 ath9k_ps_restore(sc);
1248 memset(&txctl, 0, sizeof(struct ath_tx_control));
1251 * As a temporary workaround, assign seq# here; this will likely need
1252 * to be cleaned up to work better with Beacon transmission and virtual
1255 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1256 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1257 sc->tx.seq_no += 0x10;
1258 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1259 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1262 /* Add the padding after the header if this is not already done */
1263 padpos = ath9k_cmn_padpos(hdr->frame_control);
1264 padsize = padpos & 3;
1265 if (padsize && skb->len>padpos) {
1266 if (skb_headroom(skb) < padsize)
1268 skb_push(skb, padsize);
1269 memmove(skb->data, skb->data + padsize, padpos);
1272 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1273 txctl.txq = &sc->tx.txq[qnum];
1275 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1277 if (ath_tx_start(hw, skb, &txctl) != 0) {
1278 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1284 dev_kfree_skb_any(skb);
1288 static void ath9k_stop(struct ieee80211_hw *hw)
1290 struct ath_wiphy *aphy = hw->priv;
1291 struct ath_softc *sc = aphy->sc;
1292 struct ath_hw *ah = sc->sc_ah;
1293 struct ath_common *common = ath9k_hw_common(ah);
1296 mutex_lock(&sc->mutex);
1298 aphy->state = ATH_WIPHY_INACTIVE;
1301 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1303 cancel_delayed_work_sync(&sc->tx_complete_work);
1304 cancel_work_sync(&sc->paprd_work);
1305 cancel_work_sync(&sc->hw_check_work);
1307 for (i = 0; i < sc->num_sec_wiphy; i++) {
1308 if (sc->sec_wiphy[i])
1312 if (i == sc->num_sec_wiphy) {
1313 cancel_delayed_work_sync(&sc->wiphy_work);
1314 cancel_work_sync(&sc->chan_work);
1317 if (sc->sc_flags & SC_OP_INVALID) {
1318 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1319 mutex_unlock(&sc->mutex);
1323 if (ath9k_wiphy_started(sc)) {
1324 mutex_unlock(&sc->mutex);
1325 return; /* another wiphy still in use */
1328 /* Ensure HW is awake when we try to shut it down. */
1329 ath9k_ps_wakeup(sc);
1331 if (ah->btcoex_hw.enabled) {
1332 ath9k_hw_btcoex_disable(ah);
1333 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1334 ath9k_btcoex_timer_pause(sc);
1337 /* make sure h/w will not generate any interrupt
1338 * before setting the invalid flag. */
1339 ath9k_hw_set_interrupts(ah, 0);
1341 if (!(sc->sc_flags & SC_OP_INVALID)) {
1342 ath_drain_all_txq(sc, false);
1344 ath9k_hw_phy_disable(ah);
1346 sc->rx.rxlink = NULL;
1348 /* disable HAL and put h/w to sleep */
1349 ath9k_hw_disable(ah);
1350 ath9k_hw_configpcipowersave(ah, 1, 1);
1351 ath9k_ps_restore(sc);
1353 /* Finally, put the chip in FULL SLEEP mode */
1354 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1356 sc->sc_flags |= SC_OP_INVALID;
1358 mutex_unlock(&sc->mutex);
1360 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1363 static int ath9k_add_interface(struct ieee80211_hw *hw,
1364 struct ieee80211_vif *vif)
1366 struct ath_wiphy *aphy = hw->priv;
1367 struct ath_softc *sc = aphy->sc;
1368 struct ath_hw *ah = sc->sc_ah;
1369 struct ath_common *common = ath9k_hw_common(ah);
1370 struct ath_vif *avp = (void *)vif->drv_priv;
1371 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1374 mutex_lock(&sc->mutex);
1376 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1382 switch (vif->type) {
1383 case NL80211_IFTYPE_STATION:
1384 ic_opmode = NL80211_IFTYPE_STATION;
1386 case NL80211_IFTYPE_ADHOC:
1387 case NL80211_IFTYPE_AP:
1388 case NL80211_IFTYPE_MESH_POINT:
1389 if (sc->nbcnvifs >= ATH_BCBUF) {
1393 ic_opmode = vif->type;
1396 ath_print(common, ATH_DBG_FATAL,
1397 "Interface type %d not yet supported\n", vif->type);
1402 ath_print(common, ATH_DBG_CONFIG,
1403 "Attach a VIF of type: %d\n", ic_opmode);
1405 /* Set the VIF opmode */
1406 avp->av_opmode = ic_opmode;
1411 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1412 ath9k_set_bssid_mask(hw);
1415 goto out; /* skip global settings for secondary vif */
1417 if (ic_opmode == NL80211_IFTYPE_AP) {
1418 ath9k_hw_set_tsfadjust(ah, 1);
1419 sc->sc_flags |= SC_OP_TSF_RESET;
1422 /* Set the device opmode */
1423 ah->opmode = ic_opmode;
1426 * Enable MIB interrupts when there are hardware phy counters.
1427 * Note we only do this (at the moment) for station mode.
1429 if ((vif->type == NL80211_IFTYPE_STATION) ||
1430 (vif->type == NL80211_IFTYPE_ADHOC) ||
1431 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1432 if (ah->config.enable_ani)
1433 ah->imask |= ATH9K_INT_MIB;
1434 ah->imask |= ATH9K_INT_TSFOOR;
1437 ath9k_hw_set_interrupts(ah, ah->imask);
1439 if (vif->type == NL80211_IFTYPE_AP ||
1440 vif->type == NL80211_IFTYPE_ADHOC ||
1441 vif->type == NL80211_IFTYPE_MONITOR) {
1442 sc->sc_flags |= SC_OP_ANI_RUN;
1443 ath_start_ani(common);
1447 mutex_unlock(&sc->mutex);
1451 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1452 struct ieee80211_vif *vif)
1454 struct ath_wiphy *aphy = hw->priv;
1455 struct ath_softc *sc = aphy->sc;
1456 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1457 struct ath_vif *avp = (void *)vif->drv_priv;
1460 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1462 mutex_lock(&sc->mutex);
1465 sc->sc_flags &= ~SC_OP_ANI_RUN;
1466 del_timer_sync(&common->ani.timer);
1468 /* Reclaim beacon resources */
1469 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1470 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1471 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1472 ath9k_ps_wakeup(sc);
1473 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1474 ath9k_ps_restore(sc);
1477 ath_beacon_return(sc, avp);
1478 sc->sc_flags &= ~SC_OP_BEACONS;
1480 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1481 if (sc->beacon.bslot[i] == vif) {
1482 printk(KERN_DEBUG "%s: vif had allocated beacon "
1483 "slot\n", __func__);
1484 sc->beacon.bslot[i] = NULL;
1485 sc->beacon.bslot_aphy[i] = NULL;
1491 mutex_unlock(&sc->mutex);
1494 void ath9k_enable_ps(struct ath_softc *sc)
1496 struct ath_hw *ah = sc->sc_ah;
1498 sc->ps_enabled = true;
1499 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1500 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1501 ah->imask |= ATH9K_INT_TIM_TIMER;
1502 ath9k_hw_set_interrupts(ah, ah->imask);
1504 ath9k_hw_setrxabort(ah, 1);
1508 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1510 struct ath_wiphy *aphy = hw->priv;
1511 struct ath_softc *sc = aphy->sc;
1512 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1513 struct ieee80211_conf *conf = &hw->conf;
1514 struct ath_hw *ah = sc->sc_ah;
1517 mutex_lock(&sc->mutex);
1520 * Leave this as the first check because we need to turn on the
1521 * radio if it was disabled before prior to processing the rest
1522 * of the changes. Likewise we must only disable the radio towards
1525 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1527 bool all_wiphys_idle;
1528 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1530 spin_lock_bh(&sc->wiphy_lock);
1531 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1532 ath9k_set_wiphy_idle(aphy, idle);
1534 enable_radio = (!idle && all_wiphys_idle);
1537 * After we unlock here its possible another wiphy
1538 * can be re-renabled so to account for that we will
1539 * only disable the radio toward the end of this routine
1540 * if by then all wiphys are still idle.
1542 spin_unlock_bh(&sc->wiphy_lock);
1545 sc->ps_idle = false;
1546 ath_radio_enable(sc, hw);
1547 ath_print(common, ATH_DBG_CONFIG,
1548 "not-idle: enabling radio\n");
1553 * We just prepare to enable PS. We have to wait until our AP has
1554 * ACK'd our null data frame to disable RX otherwise we'll ignore
1555 * those ACKs and end up retransmitting the same null data frames.
1556 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1558 if (changed & IEEE80211_CONF_CHANGE_PS) {
1559 if (conf->flags & IEEE80211_CONF_PS) {
1560 sc->ps_flags |= PS_ENABLED;
1562 * At this point we know hardware has received an ACK
1563 * of a previously sent null data frame.
1565 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1566 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1567 ath9k_enable_ps(sc);
1570 sc->ps_enabled = false;
1571 sc->ps_flags &= ~(PS_ENABLED |
1572 PS_NULLFUNC_COMPLETED);
1573 ath9k_setpower(sc, ATH9K_PM_AWAKE);
1574 if (!(ah->caps.hw_caps &
1575 ATH9K_HW_CAP_AUTOSLEEP)) {
1576 ath9k_hw_setrxabort(sc->sc_ah, 0);
1577 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1579 PS_WAIT_FOR_PSPOLL_DATA |
1580 PS_WAIT_FOR_TX_ACK);
1581 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1582 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1583 ath9k_hw_set_interrupts(sc->sc_ah,
1590 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1591 if (conf->flags & IEEE80211_CONF_MONITOR) {
1592 ath_print(common, ATH_DBG_CONFIG,
1593 "HW opmode set to Monitor mode\n");
1594 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1598 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1599 struct ieee80211_channel *curchan = hw->conf.channel;
1600 int pos = curchan->hw_value;
1602 aphy->chan_idx = pos;
1603 aphy->chan_is_ht = conf_is_ht(conf);
1604 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1605 sc->sc_flags |= SC_OP_OFFCHANNEL;
1607 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1609 if (aphy->state == ATH_WIPHY_SCAN ||
1610 aphy->state == ATH_WIPHY_ACTIVE)
1611 ath9k_wiphy_pause_all_forced(sc, aphy);
1614 * Do not change operational channel based on a paused
1617 goto skip_chan_change;
1620 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1621 curchan->center_freq);
1623 /* XXX: remove me eventualy */
1624 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1626 ath_update_chainmask(sc, conf_is_ht(conf));
1628 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1629 ath_print(common, ATH_DBG_FATAL,
1630 "Unable to set channel\n");
1631 mutex_unlock(&sc->mutex);
1637 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1638 sc->config.txpowlimit = 2 * conf->power_level;
1639 ath_update_txpow(sc);
1642 spin_lock_bh(&sc->wiphy_lock);
1643 disable_radio = ath9k_all_wiphys_idle(sc);
1644 spin_unlock_bh(&sc->wiphy_lock);
1646 if (disable_radio) {
1647 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1649 ath_radio_disable(sc, hw);
1652 mutex_unlock(&sc->mutex);
1657 #define SUPPORTED_FILTERS \
1658 (FIF_PROMISC_IN_BSS | \
1663 FIF_BCN_PRBRESP_PROMISC | \
1666 /* FIXME: sc->sc_full_reset ? */
1667 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1668 unsigned int changed_flags,
1669 unsigned int *total_flags,
1672 struct ath_wiphy *aphy = hw->priv;
1673 struct ath_softc *sc = aphy->sc;
1676 changed_flags &= SUPPORTED_FILTERS;
1677 *total_flags &= SUPPORTED_FILTERS;
1679 sc->rx.rxfilter = *total_flags;
1680 ath9k_ps_wakeup(sc);
1681 rfilt = ath_calcrxfilter(sc);
1682 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1683 ath9k_ps_restore(sc);
1685 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1686 "Set HW RX filter: 0x%x\n", rfilt);
1689 static int ath9k_sta_add(struct ieee80211_hw *hw,
1690 struct ieee80211_vif *vif,
1691 struct ieee80211_sta *sta)
1693 struct ath_wiphy *aphy = hw->priv;
1694 struct ath_softc *sc = aphy->sc;
1696 ath_node_attach(sc, sta);
1701 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1702 struct ieee80211_vif *vif,
1703 struct ieee80211_sta *sta)
1705 struct ath_wiphy *aphy = hw->priv;
1706 struct ath_softc *sc = aphy->sc;
1708 ath_node_detach(sc, sta);
1713 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1714 const struct ieee80211_tx_queue_params *params)
1716 struct ath_wiphy *aphy = hw->priv;
1717 struct ath_softc *sc = aphy->sc;
1718 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1719 struct ath9k_tx_queue_info qi;
1722 if (queue >= WME_NUM_AC)
1725 mutex_lock(&sc->mutex);
1727 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1729 qi.tqi_aifs = params->aifs;
1730 qi.tqi_cwmin = params->cw_min;
1731 qi.tqi_cwmax = params->cw_max;
1732 qi.tqi_burstTime = params->txop;
1733 qnum = ath_get_hal_qnum(queue, sc);
1735 ath_print(common, ATH_DBG_CONFIG,
1736 "Configure tx [queue/halq] [%d/%d], "
1737 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1738 queue, qnum, params->aifs, params->cw_min,
1739 params->cw_max, params->txop);
1741 ret = ath_txq_update(sc, qnum, &qi);
1743 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1745 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1746 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1747 ath_beaconq_config(sc);
1749 mutex_unlock(&sc->mutex);
1754 static int ath9k_set_key(struct ieee80211_hw *hw,
1755 enum set_key_cmd cmd,
1756 struct ieee80211_vif *vif,
1757 struct ieee80211_sta *sta,
1758 struct ieee80211_key_conf *key)
1760 struct ath_wiphy *aphy = hw->priv;
1761 struct ath_softc *sc = aphy->sc;
1762 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1765 if (modparam_nohwcrypt)
1768 mutex_lock(&sc->mutex);
1769 ath9k_ps_wakeup(sc);
1770 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1774 ret = ath9k_cmn_key_config(common, vif, sta, key);
1776 key->hw_key_idx = ret;
1777 /* push IV and Michael MIC generation to stack */
1778 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1779 if (key->alg == ALG_TKIP)
1780 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1781 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1782 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1787 ath9k_cmn_key_delete(common, key);
1793 ath9k_ps_restore(sc);
1794 mutex_unlock(&sc->mutex);
1799 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1800 struct ieee80211_vif *vif,
1801 struct ieee80211_bss_conf *bss_conf,
1804 struct ath_wiphy *aphy = hw->priv;
1805 struct ath_softc *sc = aphy->sc;
1806 struct ath_hw *ah = sc->sc_ah;
1807 struct ath_common *common = ath9k_hw_common(ah);
1808 struct ath_vif *avp = (void *)vif->drv_priv;
1812 mutex_lock(&sc->mutex);
1814 if (changed & BSS_CHANGED_BSSID) {
1816 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1817 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1819 ath9k_hw_write_associd(ah);
1821 /* Set aggregation protection mode parameters */
1822 sc->config.ath_aggr_prot = 0;
1824 /* Only legacy IBSS for now */
1825 if (vif->type == NL80211_IFTYPE_ADHOC)
1826 ath_update_chainmask(sc, 0);
1828 ath_print(common, ATH_DBG_CONFIG,
1829 "BSSID: %pM aid: 0x%x\n",
1830 common->curbssid, common->curaid);
1832 /* need to reconfigure the beacon */
1833 sc->sc_flags &= ~SC_OP_BEACONS ;
1836 /* Enable transmission of beacons (AP, IBSS, MESH) */
1837 if ((changed & BSS_CHANGED_BEACON) ||
1838 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1839 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1840 error = ath_beacon_alloc(aphy, vif);
1842 ath_beacon_config(sc, vif);
1845 if (changed & BSS_CHANGED_ERP_SLOT) {
1846 if (bss_conf->use_short_slot)
1850 if (vif->type == NL80211_IFTYPE_AP) {
1852 * Defer update, so that connected stations can adjust
1853 * their settings at the same time.
1854 * See beacon.c for more details
1856 sc->beacon.slottime = slottime;
1857 sc->beacon.updateslot = UPDATE;
1859 ah->slottime = slottime;
1860 ath9k_hw_init_global_settings(ah);
1864 /* Disable transmission of beacons */
1865 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1866 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1868 if (changed & BSS_CHANGED_BEACON_INT) {
1869 sc->beacon_interval = bss_conf->beacon_int;
1871 * In case of AP mode, the HW TSF has to be reset
1872 * when the beacon interval changes.
1874 if (vif->type == NL80211_IFTYPE_AP) {
1875 sc->sc_flags |= SC_OP_TSF_RESET;
1876 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1877 error = ath_beacon_alloc(aphy, vif);
1879 ath_beacon_config(sc, vif);
1881 ath_beacon_config(sc, vif);
1885 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1886 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1887 bss_conf->use_short_preamble);
1888 if (bss_conf->use_short_preamble)
1889 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1891 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1894 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1895 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1896 bss_conf->use_cts_prot);
1897 if (bss_conf->use_cts_prot &&
1898 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1899 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1901 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1904 if (changed & BSS_CHANGED_ASSOC) {
1905 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1907 ath9k_bss_assoc_info(sc, vif, bss_conf);
1910 mutex_unlock(&sc->mutex);
1913 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1916 struct ath_wiphy *aphy = hw->priv;
1917 struct ath_softc *sc = aphy->sc;
1919 mutex_lock(&sc->mutex);
1920 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1921 mutex_unlock(&sc->mutex);
1926 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1928 struct ath_wiphy *aphy = hw->priv;
1929 struct ath_softc *sc = aphy->sc;
1931 mutex_lock(&sc->mutex);
1932 ath9k_hw_settsf64(sc->sc_ah, tsf);
1933 mutex_unlock(&sc->mutex);
1936 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1938 struct ath_wiphy *aphy = hw->priv;
1939 struct ath_softc *sc = aphy->sc;
1941 mutex_lock(&sc->mutex);
1943 ath9k_ps_wakeup(sc);
1944 ath9k_hw_reset_tsf(sc->sc_ah);
1945 ath9k_ps_restore(sc);
1947 mutex_unlock(&sc->mutex);
1950 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1951 struct ieee80211_vif *vif,
1952 enum ieee80211_ampdu_mlme_action action,
1953 struct ieee80211_sta *sta,
1956 struct ath_wiphy *aphy = hw->priv;
1957 struct ath_softc *sc = aphy->sc;
1963 case IEEE80211_AMPDU_RX_START:
1964 if (!(sc->sc_flags & SC_OP_RXAGGR))
1967 case IEEE80211_AMPDU_RX_STOP:
1969 case IEEE80211_AMPDU_TX_START:
1970 ath9k_ps_wakeup(sc);
1971 ath_tx_aggr_start(sc, sta, tid, ssn);
1972 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1973 ath9k_ps_restore(sc);
1975 case IEEE80211_AMPDU_TX_STOP:
1976 ath9k_ps_wakeup(sc);
1977 ath_tx_aggr_stop(sc, sta, tid);
1978 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1979 ath9k_ps_restore(sc);
1981 case IEEE80211_AMPDU_TX_OPERATIONAL:
1982 ath9k_ps_wakeup(sc);
1983 ath_tx_aggr_resume(sc, sta, tid);
1984 ath9k_ps_restore(sc);
1987 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1988 "Unknown AMPDU action\n");
1996 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1997 struct survey_info *survey)
1999 struct ath_wiphy *aphy = hw->priv;
2000 struct ath_softc *sc = aphy->sc;
2001 struct ath_hw *ah = sc->sc_ah;
2002 struct ath_common *common = ath9k_hw_common(ah);
2003 struct ieee80211_conf *conf = &hw->conf;
2008 survey->channel = conf->channel;
2009 survey->filled = SURVEY_INFO_NOISE_DBM;
2010 survey->noise = common->ani.noise_floor;
2015 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2017 struct ath_wiphy *aphy = hw->priv;
2018 struct ath_softc *sc = aphy->sc;
2020 mutex_lock(&sc->mutex);
2021 if (ath9k_wiphy_scanning(sc)) {
2023 * There is a race here in mac80211 but fixing it requires
2024 * we revisit how we handle the scan complete callback.
2025 * After mac80211 fixes we will not have configured hardware
2026 * to the home channel nor would we have configured the RX
2029 mutex_unlock(&sc->mutex);
2033 aphy->state = ATH_WIPHY_SCAN;
2034 ath9k_wiphy_pause_all_forced(sc, aphy);
2035 sc->sc_flags |= SC_OP_SCANNING;
2036 mutex_unlock(&sc->mutex);
2040 * XXX: this requires a revisit after the driver
2041 * scan_complete gets moved to another place/removed in mac80211.
2043 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2045 struct ath_wiphy *aphy = hw->priv;
2046 struct ath_softc *sc = aphy->sc;
2048 mutex_lock(&sc->mutex);
2049 aphy->state = ATH_WIPHY_ACTIVE;
2050 sc->sc_flags &= ~SC_OP_SCANNING;
2051 mutex_unlock(&sc->mutex);
2054 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2056 struct ath_wiphy *aphy = hw->priv;
2057 struct ath_softc *sc = aphy->sc;
2058 struct ath_hw *ah = sc->sc_ah;
2060 mutex_lock(&sc->mutex);
2061 ah->coverage_class = coverage_class;
2062 ath9k_hw_init_global_settings(ah);
2063 mutex_unlock(&sc->mutex);
2066 struct ieee80211_ops ath9k_ops = {
2068 .start = ath9k_start,
2070 .add_interface = ath9k_add_interface,
2071 .remove_interface = ath9k_remove_interface,
2072 .config = ath9k_config,
2073 .configure_filter = ath9k_configure_filter,
2074 .sta_add = ath9k_sta_add,
2075 .sta_remove = ath9k_sta_remove,
2076 .conf_tx = ath9k_conf_tx,
2077 .bss_info_changed = ath9k_bss_info_changed,
2078 .set_key = ath9k_set_key,
2079 .get_tsf = ath9k_get_tsf,
2080 .set_tsf = ath9k_set_tsf,
2081 .reset_tsf = ath9k_reset_tsf,
2082 .ampdu_action = ath9k_ampdu_action,
2083 .get_survey = ath9k_get_survey,
2084 .sw_scan_start = ath9k_sw_scan_start,
2085 .sw_scan_complete = ath9k_sw_scan_complete,
2086 .rfkill_poll = ath9k_rfkill_poll_state,
2087 .set_coverage_class = ath9k_set_coverage_class,