drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static u8 parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  58 {
  59         bool pending = false;
  60
  61         spin_lock_bh(&txq->axq_lock);
  62
  63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
  64                 pending = true;
  65
  66         spin_unlock_bh(&txq->axq_lock);
  67         return pending;
  68 }
  69
  70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  71 {
  72         unsigned long flags;
  73         bool ret;
  74
  75         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  76         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  77         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  78
  79         return ret;
  80 }
  81
  82 void ath9k_ps_wakeup(struct ath_softc *sc)
  83 {
  84         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85         unsigned long flags;
  86         enum ath9k_power_mode power_mode;
  87
  88         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  89         if (++sc->ps_usecount != 1)
  90                 goto unlock;
  91
  92         power_mode = sc->sc_ah->power_mode;
  93         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  94
  95         /*
  96          * While the hardware is asleep, the cycle counters contain no
  97          * useful data. Better clear them now so that they don't mess up
  98          * survey data results.
  99          */
 100         if (power_mode != ATH9K_PM_AWAKE) {
 101                 spin_lock(&common->cc_lock);
 102                 ath_hw_cycle_counters_update(common);
 103                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 104                 spin_unlock(&common->cc_lock);
 105         }
 106
 107  unlock:
 108         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 109 }
 110
 111 void ath9k_ps_restore(struct ath_softc *sc)
 112 {
 113         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 114         unsigned long flags;
 115
 116         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 117         if (--sc->ps_usecount != 0)
 118                 goto unlock;
 119
 120         spin_lock(&common->cc_lock);
 121         ath_hw_cycle_counters_update(common);
 122         spin_unlock(&common->cc_lock);
 123
 124         if (sc->ps_idle)
 125                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 126         else if (sc->ps_enabled &&
 127                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 128                               PS_WAIT_FOR_CAB |
 129                               PS_WAIT_FOR_PSPOLL_DATA |
 130                               PS_WAIT_FOR_TX_ACK)))
 131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 132
 133  unlock:
 134         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 135 }
 136
 137 void ath_start_ani(struct ath_common *common)
 138 {
 139         struct ath_hw *ah = common->ah;
 140         unsigned long timestamp = jiffies_to_msecs(jiffies);
 141         struct ath_softc *sc = (struct ath_softc *) common->priv;
 142
 143         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 144                 return;
 145
 146         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 147                 return;
 148
 149         common->ani.longcal_timer = timestamp;
 150         common->ani.shortcal_timer = timestamp;
 151         common->ani.checkani_timer = timestamp;
 152
 153         mod_timer(&common->ani.timer,
 154                   jiffies +
 155                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 156 }
 157
 158 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 159 {
 160         struct ath_hw *ah = sc->sc_ah;
 161         struct ath9k_channel *chan = &ah->channels[channel];
 162         struct survey_info *survey = &sc->survey[channel];
 163
 164         if (chan->noisefloor) {
 165                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 166                 survey->noise = ath9k_hw_getchan_noise(ah, chan);
 167         }
 168 }
 169
 170 /*
 171  * Updates the survey statistics and returns the busy time since last
 172  * update in %, if the measurement duration was long enough for the
 173  * result to be useful, -1 otherwise.
 174  */
 175 static int ath_update_survey_stats(struct ath_softc *sc)
 176 {
 177         struct ath_hw *ah = sc->sc_ah;
 178         struct ath_common *common = ath9k_hw_common(ah);
 179         int pos = ah->curchan - &ah->channels[0];
 180         struct survey_info *survey = &sc->survey[pos];
 181         struct ath_cycle_counters *cc = &common->cc_survey;
 182         unsigned int div = common->clockrate * 1000;
 183         int ret = 0;
 184
 185         if (!ah->curchan)
 186                 return -1;
 187
 188         if (ah->power_mode == ATH9K_PM_AWAKE)
 189                 ath_hw_cycle_counters_update(common);
 190
 191         if (cc->cycles > 0) {
 192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 194                         SURVEY_INFO_CHANNEL_TIME_RX |
 195                         SURVEY_INFO_CHANNEL_TIME_TX;
 196                 survey->channel_time += cc->cycles / div;
 197                 survey->channel_time_busy += cc->rx_busy / div;
 198                 survey->channel_time_rx += cc->rx_frame / div;
 199                 survey->channel_time_tx += cc->tx_frame / div;
 200         }
 201
 202         if (cc->cycles < div)
 203                 return -1;
 204
 205         if (cc->cycles > 0)
 206                 ret = cc->rx_busy * 100 / cc->cycles;
 207
 208         memset(cc, 0, sizeof(*cc));
 209
 210         ath_update_survey_nf(sc, pos);
 211
 212         return ret;
 213 }
 214
 215 /*
 216  * Set/change channels.  If the channel is really being changed, it's done
 217  * by reseting the chip.  To accomplish this we must first cleanup any pending
 218  * DMA, then restart stuff.
 219 */
 220 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 221                     struct ath9k_channel *hchan)
 222 {
 223         struct ath_hw *ah = sc->sc_ah;
 224         struct ath_common *common = ath9k_hw_common(ah);
 225         struct ieee80211_conf *conf = &common->hw->conf;
 226         bool fastcc = true, stopped;
 227         struct ieee80211_channel *channel = hw->conf.channel;
 228         struct ath9k_hw_cal_data *caldata = NULL;
 229         int r;
 230
 231         if (sc->sc_flags & SC_OP_INVALID)
 232                 return -EIO;
 233
 234         sc->hw_busy_count = 0;
 235
 236         del_timer_sync(&common->ani.timer);
 237         cancel_work_sync(&sc->paprd_work);
 238         cancel_work_sync(&sc->hw_check_work);
 239         cancel_delayed_work_sync(&sc->tx_complete_work);
 240         cancel_delayed_work_sync(&sc->hw_pll_work);
 241
 242         ath9k_ps_wakeup(sc);
 243
 244         spin_lock_bh(&sc->sc_pcu_lock);
 245
 246         /*
 247          * This is only performed if the channel settings have
 248          * actually changed.
 249          *
 250          * To switch channels clear any pending DMA operations;
 251          * wait long enough for the RX fifo to drain, reset the
 252          * hardware at the new frequency, and then re-enable
 253          * the relevant bits of the h/w.
 254          */
 255         ath9k_hw_disable_interrupts(ah);
 256         stopped = ath_drain_all_txq(sc, false);
 257
 258         if (!ath_stoprecv(sc))
 259                 stopped = false;
 260
 261         if (!ath9k_hw_check_alive(ah))
 262                 stopped = false;
 263
 264         /* XXX: do not flush receive queue here. We don't want
 265          * to flush data frames already in queue because of
 266          * changing channel. */
 267
 268         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 269                 fastcc = false;
 270
 271         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 272                 caldata = &sc->caldata;
 273
 274         ath_dbg(common, ATH_DBG_CONFIG,
 275                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 276                 sc->sc_ah->curchan->channel,
 277                 channel->center_freq, conf_is_ht40(conf),
 278                 fastcc);
 279
 280         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 281         if (r) {
 282                 ath_err(common,
 283                         "Unable to reset channel (%u MHz), reset status %d\n",
 284                         channel->center_freq, r);
 285                 goto ps_restore;
 286         }
 287
 288         if (ath_startrecv(sc) != 0) {
 289                 ath_err(common, "Unable to restart recv logic\n");
 290                 r = -EIO;
 291                 goto ps_restore;
 292         }
 293
 294         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 295                                sc->config.txpowlimit, &sc->curtxpow);
 296         ath9k_hw_set_interrupts(ah, ah->imask);
 297         ath9k_hw_enable_interrupts(ah);
 298
 299         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 300                 if (sc->sc_flags & SC_OP_BEACONS)
 301                         ath_set_beacon(sc);
 302                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 303                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 304                 if (!common->disable_ani)
 305                         ath_start_ani(common);
 306         }
 307
 308  ps_restore:
 309         ieee80211_wake_queues(hw);
 310
 311         spin_unlock_bh(&sc->sc_pcu_lock);
 312
 313         ath9k_ps_restore(sc);
 314         return r;
 315 }
 316
 317 static void ath_paprd_activate(struct ath_softc *sc)
 318 {
 319         struct ath_hw *ah = sc->sc_ah;
 320         struct ath9k_hw_cal_data *caldata = ah->caldata;
 321         struct ath_common *common = ath9k_hw_common(ah);
 322         int chain;
 323
 324         if (!caldata || !caldata->paprd_done)
 325                 return;
 326
 327         ath9k_ps_wakeup(sc);
 328         ar9003_paprd_enable(ah, false);
 329         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 330                 if (!(common->tx_chainmask & BIT(chain)))
 331                         continue;
 332
 333                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 334         }
 335
 336         ar9003_paprd_enable(ah, true);
 337         ath9k_ps_restore(sc);
 338 }
 339
 340 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 341 {
 342         struct ieee80211_hw *hw = sc->hw;
 343         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 344         struct ath_hw *ah = sc->sc_ah;
 345         struct ath_common *common = ath9k_hw_common(ah);
 346         struct ath_tx_control txctl;
 347         int time_left;
 348
 349         memset(&txctl, 0, sizeof(txctl));
 350         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 351
 352         memset(tx_info, 0, sizeof(*tx_info));
 353         tx_info->band = hw->conf.channel->band;
 354         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 355         tx_info->control.rates[0].idx = 0;
 356         tx_info->control.rates[0].count = 1;
 357         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 358         tx_info->control.rates[1].idx = -1;
 359
 360         init_completion(&sc->paprd_complete);
 361         txctl.paprd = BIT(chain);
 362
 363         if (ath_tx_start(hw, skb, &txctl) != 0) {
 364                 ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
 365                 dev_kfree_skb_any(skb);
 366                 return false;
 367         }
 368
 369         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 370                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 371
 372         if (!time_left)
 373                 ath_dbg(common, ATH_DBG_CALIBRATE,
 374                         "Timeout waiting for paprd training on TX chain %d\n",
 375                         chain);
 376
 377         return !!time_left;
 378 }
 379
 380 void ath_paprd_calibrate(struct work_struct *work)
 381 {
 382         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 383         struct ieee80211_hw *hw = sc->hw;
 384         struct ath_hw *ah = sc->sc_ah;
 385         struct ieee80211_hdr *hdr;
 386         struct sk_buff *skb = NULL;
 387         struct ath9k_hw_cal_data *caldata = ah->caldata;
 388         struct ath_common *common = ath9k_hw_common(ah);
 389         int ftype;
 390         int chain_ok = 0;
 391         int chain;
 392         int len = 1800;
 393
 394         if (!caldata)
 395                 return;
 396
 397         ath9k_ps_wakeup(sc);
 398
 399         if (ar9003_paprd_init_table(ah) < 0)
 400                 goto fail_paprd;
 401
 402         skb = alloc_skb(len, GFP_KERNEL);
 403         if (!skb)
 404                 goto fail_paprd;
 405
 406         skb_put(skb, len);
 407         memset(skb->data, 0, len);
 408         hdr = (struct ieee80211_hdr *)skb->data;
 409         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 410         hdr->frame_control = cpu_to_le16(ftype);
 411         hdr->duration_id = cpu_to_le16(10);
 412         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 413         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 414         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 415
 416         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 417                 if (!(common->tx_chainmask & BIT(chain)))
 418                         continue;
 419
 420                 chain_ok = 0;
 421
 422                 ath_dbg(common, ATH_DBG_CALIBRATE,
 423                         "Sending PAPRD frame for thermal measurement "
 424                         "on chain %d\n", chain);
 425                 if (!ath_paprd_send_frame(sc, skb, chain))
 426                         goto fail_paprd;
 427
 428                 ar9003_paprd_setup_gain_table(ah, chain);
 429
 430                 ath_dbg(common, ATH_DBG_CALIBRATE,
 431                         "Sending PAPRD training frame on chain %d\n", chain);
 432                 if (!ath_paprd_send_frame(sc, skb, chain))
 433                         goto fail_paprd;
 434
 435                 if (!ar9003_paprd_is_done(ah)) {
 436                         ath_dbg(common, ATH_DBG_CALIBRATE,
 437                                 "PAPRD not yet done on chain %d\n", chain);
 438                         break;
 439                 }
 440
 441                 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
 442                         ath_dbg(common, ATH_DBG_CALIBRATE,
 443                                 "PAPRD create curve failed on chain %d\n",
 444                                                                    chain);
 445                         break;
 446                 }
 447
 448                 chain_ok = 1;
 449         }
 450         kfree_skb(skb);
 451
 452         if (chain_ok) {
 453                 caldata->paprd_done = true;
 454                 ath_paprd_activate(sc);
 455         }
 456
 457 fail_paprd:
 458         ath9k_ps_restore(sc);
 459 }
 460
 461 /*
 462  *  This routine performs the periodic noise floor calibration function
 463  *  that is used to adjust and optimize the chip performance.  This
 464  *  takes environmental changes (location, temperature) into account.
 465  *  When the task is complete, it reschedules itself depending on the
 466  *  appropriate interval that was calculated.
 467  */
 468 void ath_ani_calibrate(unsigned long data)
 469 {
 470         struct ath_softc *sc = (struct ath_softc *)data;
 471         struct ath_hw *ah = sc->sc_ah;
 472         struct ath_common *common = ath9k_hw_common(ah);
 473         bool longcal = false;
 474         bool shortcal = false;
 475         bool aniflag = false;
 476         unsigned int timestamp = jiffies_to_msecs(jiffies);
 477         u32 cal_interval, short_cal_interval, long_cal_interval;
 478         unsigned long flags;
 479
 480         if (ah->caldata && ah->caldata->nfcal_interference)
 481                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 482         else
 483                 long_cal_interval = ATH_LONG_CALINTERVAL;
 484
 485         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 486                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 487
 488         /* Only calibrate if awake */
 489         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 490                 goto set_timer;
 491
 492         ath9k_ps_wakeup(sc);
 493
 494         /* Long calibration runs independently of short calibration. */
 495         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 496                 longcal = true;
 497                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 498                 common->ani.longcal_timer = timestamp;
 499         }
 500
 501         /* Short calibration applies only while caldone is false */
 502         if (!common->ani.caldone) {
 503                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 504                         shortcal = true;
 505                         ath_dbg(common, ATH_DBG_ANI,
 506                                 "shortcal @%lu\n", jiffies);
 507                         common->ani.shortcal_timer = timestamp;
 508                         common->ani.resetcal_timer = timestamp;
 509                 }
 510         } else {
 511                 if ((timestamp - common->ani.resetcal_timer) >=
 512                     ATH_RESTART_CALINTERVAL) {
 513                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 514                         if (common->ani.caldone)
 515                                 common->ani.resetcal_timer = timestamp;
 516                 }
 517         }
 518
 519         /* Verify whether we must check ANI */
 520         if ((timestamp - common->ani.checkani_timer) >=
 521              ah->config.ani_poll_interval) {
 522                 aniflag = true;
 523                 common->ani.checkani_timer = timestamp;
 524         }
 525
 526         /* Call ANI routine if necessary */
 527         if (aniflag) {
 528                 spin_lock_irqsave(&common->cc_lock, flags);
 529                 ath9k_hw_ani_monitor(ah, ah->curchan);
 530                 ath_update_survey_stats(sc);
 531                 spin_unlock_irqrestore(&common->cc_lock, flags);
 532         }
 533
 534         /* Perform calibration if necessary */
 535         if (longcal || shortcal) {
 536                 common->ani.caldone =
 537                         ath9k_hw_calibrate(ah, ah->curchan,
 538                                                 common->rx_chainmask, longcal);
 539         }
 540
 541         ath9k_ps_restore(sc);
 542
 543 set_timer:
 544         /*
 545         * Set timer interval based on previous results.
 546         * The interval must be the shortest necessary to satisfy ANI,
 547         * short calibration and long calibration.
 548         */
 549         cal_interval = ATH_LONG_CALINTERVAL;
 550         if (sc->sc_ah->config.enable_ani)
 551                 cal_interval = min(cal_interval,
 552                                    (u32)ah->config.ani_poll_interval);
 553         if (!common->ani.caldone)
 554                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 555
 556         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 557         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 558                 if (!ah->caldata->paprd_done)
 559                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 560                 else if (!ah->paprd_table_write_done)
 561                         ath_paprd_activate(sc);
 562         }
 563 }
 564
 565 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 566 {
 567         struct ath_node *an;
 568         struct ath_hw *ah = sc->sc_ah;
 569         an = (struct ath_node *)sta->drv_priv;
 570
 571 #ifdef CONFIG_ATH9K_DEBUGFS
 572         spin_lock(&sc->nodes_lock);
 573         list_add(&an->list, &sc->nodes);
 574         spin_unlock(&sc->nodes_lock);
 575         an->sta = sta;
 576 #endif
 577         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 578                 sc->sc_flags |= SC_OP_ENABLE_APM;
 579
 580         if (sc->sc_flags & SC_OP_TXAGGR) {
 581                 ath_tx_node_init(sc, an);
 582                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 583                                      sta->ht_cap.ampdu_factor);
 584                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 585         }
 586 }
 587
 588 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 589 {
 590         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 591
 592 #ifdef CONFIG_ATH9K_DEBUGFS
 593         spin_lock(&sc->nodes_lock);
 594         list_del(&an->list);
 595         spin_unlock(&sc->nodes_lock);
 596         an->sta = NULL;
 597 #endif
 598
 599         if (sc->sc_flags & SC_OP_TXAGGR)
 600                 ath_tx_node_cleanup(sc, an);
 601 }
 602
 603 void ath_hw_check(struct work_struct *work)
 604 {
 605         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 606         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 607         unsigned long flags;
 608         int busy;
 609
 610         ath9k_ps_wakeup(sc);
 611         if (ath9k_hw_check_alive(sc->sc_ah))
 612                 goto out;
 613
 614         spin_lock_irqsave(&common->cc_lock, flags);
 615         busy = ath_update_survey_stats(sc);
 616         spin_unlock_irqrestore(&common->cc_lock, flags);
 617
 618         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
 619                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
 620         if (busy >= 99) {
 621                 if (++sc->hw_busy_count >= 3) {
 622                         spin_lock_bh(&sc->sc_pcu_lock);
 623                         ath_reset(sc, true);
 624                         spin_unlock_bh(&sc->sc_pcu_lock);
 625                 }
 626         } else if (busy >= 0)
 627                 sc->hw_busy_count = 0;
 628
 629 out:
 630         ath9k_ps_restore(sc);
 631 }
 632
 633 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
 634 {
 635         static int count;
 636         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 637
 638         if (pll_sqsum >= 0x40000) {
 639                 count++;
 640                 if (count == 3) {
 641                         /* Rx is hung for more than 500ms. Reset it */
 642                         ath_dbg(common, ATH_DBG_RESET,
 643                                 "Possible RX hang, resetting");
 644                         spin_lock_bh(&sc->sc_pcu_lock);
 645                         ath_reset(sc, true);
 646                         spin_unlock_bh(&sc->sc_pcu_lock);
 647                         count = 0;
 648                 }
 649         } else
 650                 count = 0;
 651 }
 652
 653 void ath_hw_pll_work(struct work_struct *work)
 654 {
 655         struct ath_softc *sc = container_of(work, struct ath_softc,
 656                                             hw_pll_work.work);
 657         u32 pll_sqsum;
 658
 659         if (AR_SREV_9485(sc->sc_ah)) {
 660
 661                 ath9k_ps_wakeup(sc);
 662                 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
 663                 ath9k_ps_restore(sc);
 664
 665                 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
 666
 667                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
 668         }
 669 }
 670
 671
 672 void ath9k_tasklet(unsigned long data)
 673 {
 674         struct ath_softc *sc = (struct ath_softc *)data;
 675         struct ath_hw *ah = sc->sc_ah;
 676         struct ath_common *common = ath9k_hw_common(ah);
 677
 678         u32 status = sc->intrstatus;
 679         u32 rxmask;
 680
 681         if ((status & ATH9K_INT_FATAL) ||
 682             (status & ATH9K_INT_BB_WATCHDOG)) {
 683                 spin_lock(&sc->sc_pcu_lock);
 684                 ath_reset(sc, true);
 685                 spin_unlock(&sc->sc_pcu_lock);
 686                 return;
 687         }
 688
 689         ath9k_ps_wakeup(sc);
 690         spin_lock(&sc->sc_pcu_lock);
 691
 692         /*
 693          * Only run the baseband hang check if beacons stop working in AP or
 694          * IBSS mode, because it has a high false positive rate. For station
 695          * mode it should not be necessary, since the upper layers will detect
 696          * this through a beacon miss automatically and the following channel
 697          * change will trigger a hardware reset anyway
 698          */
 699         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 700             !ath9k_hw_check_alive(ah))
 701                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 702
 703         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 704                 /*
 705                  * TSF sync does not look correct; remain awake to sync with
 706                  * the next Beacon.
 707                  */
 708                 ath_dbg(common, ATH_DBG_PS,
 709                         "TSFOOR - Sync with next Beacon\n");
 710                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 711         }
 712
 713         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 714                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 715                           ATH9K_INT_RXORN);
 716         else
 717                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 718
 719         if (status & rxmask) {
 720                 /* Check for high priority Rx first */
 721                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 722                     (status & ATH9K_INT_RXHP))
 723                         ath_rx_tasklet(sc, 0, true);
 724
 725                 ath_rx_tasklet(sc, 0, false);
 726         }
 727
 728         if (status & ATH9K_INT_TX) {
 729                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 730                         ath_tx_edma_tasklet(sc);
 731                 else
 732                         ath_tx_tasklet(sc);
 733         }
 734
 735         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 736                 if (status & ATH9K_INT_GENTIMER)
 737                         ath_gen_timer_isr(sc->sc_ah);
 738
 739         /* re-enable hardware interrupt */
 740         ath9k_hw_enable_interrupts(ah);
 741
 742         spin_unlock(&sc->sc_pcu_lock);
 743         ath9k_ps_restore(sc);
 744 }
 745
 746 irqreturn_t ath_isr(int irq, void *dev)
 747 {
 748 #define SCHED_INTR (                            \
 749                 ATH9K_INT_FATAL |               \
 750                 ATH9K_INT_BB_WATCHDOG |         \
 751                 ATH9K_INT_RXORN |               \
 752                 ATH9K_INT_RXEOL |               \
 753                 ATH9K_INT_RX |                  \
 754                 ATH9K_INT_RXLP |                \
 755                 ATH9K_INT_RXHP |                \
 756                 ATH9K_INT_TX |                  \
 757                 ATH9K_INT_BMISS |               \
 758                 ATH9K_INT_CST |                 \
 759                 ATH9K_INT_TSFOOR |              \
 760                 ATH9K_INT_GENTIMER)
 761
 762         struct ath_softc *sc = dev;
 763         struct ath_hw *ah = sc->sc_ah;
 764         struct ath_common *common = ath9k_hw_common(ah);
 765         enum ath9k_int status;
 766         bool sched = false;
 767
 768         /*
 769          * The hardware is not ready/present, don't
 770          * touch anything. Note this can happen early
 771          * on if the IRQ is shared.
 772          */
 773         if (sc->sc_flags & SC_OP_INVALID)
 774                 return IRQ_NONE;
 775
 776
 777         /* shared irq, not for us */
 778
 779         if (!ath9k_hw_intrpend(ah))
 780                 return IRQ_NONE;
 781
 782         /*
 783          * Figure out the reason(s) for the interrupt.  Note
 784          * that the hal returns a pseudo-ISR that may include
 785          * bits we haven't explicitly enabled so we mask the
 786          * value to insure we only process bits we requested.
 787          */
 788         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 789         status &= ah->imask;    /* discard unasked-for bits */
 790
 791         /*
 792          * If there are no status bits set, then this interrupt was not
 793          * for me (should have been caught above).
 794          */
 795         if (!status)
 796                 return IRQ_NONE;
 797
 798         /* Cache the status */
 799         sc->intrstatus = status;
 800
 801         if (status & SCHED_INTR)
 802                 sched = true;
 803
 804         /*
 805          * If a FATAL or RXORN interrupt is received, we have to reset the
 806          * chip immediately.
 807          */
 808         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 809             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 810                 goto chip_reset;
 811
 812         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 813             (status & ATH9K_INT_BB_WATCHDOG)) {
 814
 815                 spin_lock(&common->cc_lock);
 816                 ath_hw_cycle_counters_update(common);
 817                 ar9003_hw_bb_watchdog_dbg_info(ah);
 818                 spin_unlock(&common->cc_lock);
 819
 820                 goto chip_reset;
 821         }
 822
 823         if (status & ATH9K_INT_SWBA)
 824                 tasklet_schedule(&sc->bcon_tasklet);
 825
 826         if (status & ATH9K_INT_TXURN)
 827                 ath9k_hw_updatetxtriglevel(ah, true);
 828
 829         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 830                 if (status & ATH9K_INT_RXEOL) {
 831                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 832                         ath9k_hw_set_interrupts(ah, ah->imask);
 833                 }
 834         }
 835
 836         if (status & ATH9K_INT_MIB) {
 837                 /*
 838                  * Disable interrupts until we service the MIB
 839                  * interrupt; otherwise it will continue to
 840                  * fire.
 841                  */
 842                 ath9k_hw_disable_interrupts(ah);
 843                 /*
 844                  * Let the hal handle the event. We assume
 845                  * it will clear whatever condition caused
 846                  * the interrupt.
 847                  */
 848                 spin_lock(&common->cc_lock);
 849                 ath9k_hw_proc_mib_event(ah);
 850                 spin_unlock(&common->cc_lock);
 851                 ath9k_hw_enable_interrupts(ah);
 852         }
 853
 854         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 855                 if (status & ATH9K_INT_TIM_TIMER) {
 856                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 857                                 goto chip_reset;
 858                         /* Clear RxAbort bit so that we can
 859                          * receive frames */
 860                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 861                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 862                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 863                 }
 864
 865 chip_reset:
 866
 867         ath_debug_stat_interrupt(sc, status);
 868
 869         if (sched) {
 870                 /* turn off every interrupt */
 871                 ath9k_hw_disable_interrupts(ah);
 872                 tasklet_schedule(&sc->intr_tq);
 873         }
 874
 875         return IRQ_HANDLED;
 876
 877 #undef SCHED_INTR
 878 }
 879
 880 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 881 {
 882         struct ath_hw *ah = sc->sc_ah;
 883         struct ath_common *common = ath9k_hw_common(ah);
 884         struct ieee80211_channel *channel = hw->conf.channel;
 885         int r;
 886
 887         ath9k_ps_wakeup(sc);
 888         spin_lock_bh(&sc->sc_pcu_lock);
 889         atomic_set(&ah->intr_ref_cnt, -1);
 890
 891         ath9k_hw_configpcipowersave(ah, false);
 892
 893         if (!ah->curchan)
 894                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
 895
 896         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 897         if (r) {
 898                 ath_err(common,
 899                         "Unable to reset channel (%u MHz), reset status %d\n",
 900                         channel->center_freq, r);
 901         }
 902
 903         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 904                                sc->config.txpowlimit, &sc->curtxpow);
 905         if (ath_startrecv(sc) != 0) {
 906                 ath_err(common, "Unable to restart recv logic\n");
 907                 goto out;
 908         }
 909         if (sc->sc_flags & SC_OP_BEACONS)
 910                 ath_set_beacon(sc);     /* restart beacons */
 911
 912         /* Re-Enable  interrupts */
 913         ath9k_hw_set_interrupts(ah, ah->imask);
 914         ath9k_hw_enable_interrupts(ah);
 915
 916         /* Enable LED */
 917         ath9k_hw_cfg_output(ah, ah->led_pin,
 918                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 919         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 920
 921         ieee80211_wake_queues(hw);
 922         ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
 923
 924 out:
 925         spin_unlock_bh(&sc->sc_pcu_lock);
 926
 927         ath9k_ps_restore(sc);
 928 }
 929
 930 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 931 {
 932         struct ath_hw *ah = sc->sc_ah;
 933         struct ieee80211_channel *channel = hw->conf.channel;
 934         int r;
 935
 936         ath9k_ps_wakeup(sc);
 937         cancel_delayed_work_sync(&sc->hw_pll_work);
 938
 939         spin_lock_bh(&sc->sc_pcu_lock);
 940
 941         ieee80211_stop_queues(hw);
 942
 943         /*
 944          * Keep the LED on when the radio is disabled
 945          * during idle unassociated state.
 946          */
 947         if (!sc->ps_idle) {
 948                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 949                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 950         }
 951
 952         /* Disable interrupts */
 953         ath9k_hw_disable_interrupts(ah);
 954
 955         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 956
 957         ath_stoprecv(sc);               /* turn off frame recv */
 958         ath_flushrecv(sc);              /* flush recv queue */
 959
 960         if (!ah->curchan)
 961                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 962
 963         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 964         if (r) {
 965                 ath_err(ath9k_hw_common(sc->sc_ah),
 966                         "Unable to reset channel (%u MHz), reset status %d\n",
 967                         channel->center_freq, r);
 968         }
 969
 970         ath9k_hw_phy_disable(ah);
 971
 972         ath9k_hw_configpcipowersave(ah, true);
 973
 974         spin_unlock_bh(&sc->sc_pcu_lock);
 975         ath9k_ps_restore(sc);
 976 }
 977
 978 int ath_reset(struct ath_softc *sc, bool retry_tx)
 979 {
 980         struct ath_hw *ah = sc->sc_ah;
 981         struct ath_common *common = ath9k_hw_common(ah);
 982         struct ieee80211_hw *hw = sc->hw;
 983         int r;
 984
 985         sc->hw_busy_count = 0;
 986
 987         /* Stop ANI */
 988
 989         del_timer_sync(&common->ani.timer);
 990
 991         ath9k_ps_wakeup(sc);
 992
 993         ieee80211_stop_queues(hw);
 994
 995         ath9k_hw_disable_interrupts(ah);
 996         ath_drain_all_txq(sc, retry_tx);
 997
 998         ath_stoprecv(sc);
 999         ath_flushrecv(sc);
1000
1001         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
1002         if (r)
1003                 ath_err(common,
1004                         "Unable to reset hardware; reset status %d\n", r);
1005
1006         if (ath_startrecv(sc) != 0)
1007                 ath_err(common, "Unable to start recv logic\n");
1008
1009         /*
1010          * We may be doing a reset in response to a request
1011          * that changes the channel so update any state that
1012          * might change as a result.
1013          */
1014         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1015                                sc->config.txpowlimit, &sc->curtxpow);
1016
1017         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1018                 ath_set_beacon(sc);     /* restart beacons */
1019
1020         ath9k_hw_set_interrupts(ah, ah->imask);
1021         ath9k_hw_enable_interrupts(ah);
1022
1023         if (retry_tx) {
1024                 int i;
1025                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1026                         if (ATH_TXQ_SETUP(sc, i)) {
1027                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1028                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1029                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1030                         }
1031                 }
1032         }
1033
1034         ieee80211_wake_queues(hw);
1035
1036         /* Start ANI */
1037         if (!common->disable_ani)
1038                 ath_start_ani(common);
1039
1040         ath9k_ps_restore(sc);
1041
1042         return r;
1043 }
1044
1045 /**********************/
1046 /* mac80211 callbacks */
1047 /**********************/
1048
1049 static int ath9k_start(struct ieee80211_hw *hw)
1050 {
1051         struct ath_softc *sc = hw->priv;
1052         struct ath_hw *ah = sc->sc_ah;
1053         struct ath_common *common = ath9k_hw_common(ah);
1054         struct ieee80211_channel *curchan = hw->conf.channel;
1055         struct ath9k_channel *init_channel;
1056         int r;
1057
1058         ath_dbg(common, ATH_DBG_CONFIG,
1059                 "Starting driver with initial channel: %d MHz\n",
1060                 curchan->center_freq);
1061
1062         ath9k_ps_wakeup(sc);
1063
1064         mutex_lock(&sc->mutex);
1065
1066         /* setup initial channel */
1067         sc->chan_idx = curchan->hw_value;
1068
1069         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1070
1071         /* Reset SERDES registers */
1072         ath9k_hw_configpcipowersave(ah, false);
1073
1074         /*
1075          * The basic interface to setting the hardware in a good
1076          * state is ``reset''.  On return the hardware is known to
1077          * be powered up and with interrupts disabled.  This must
1078          * be followed by initialization of the appropriate bits
1079          * and then setup of the interrupt mask.
1080          */
1081         spin_lock_bh(&sc->sc_pcu_lock);
1082         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1083         if (r) {
1084                 ath_err(common,
1085                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1086                         r, curchan->center_freq);
1087                 spin_unlock_bh(&sc->sc_pcu_lock);
1088                 goto mutex_unlock;
1089         }
1090
1091         /*
1092          * This is needed only to setup initial state
1093          * but it's best done after a reset.
1094          */
1095         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1096                         sc->config.txpowlimit, &sc->curtxpow);
1097
1098         /*
1099          * Setup the hardware after reset:
1100          * The receive engine is set going.
1101          * Frame transmit is handled entirely
1102          * in the frame output path; there's nothing to do
1103          * here except setup the interrupt mask.
1104          */
1105         if (ath_startrecv(sc) != 0) {
1106                 ath_err(common, "Unable to start recv logic\n");
1107                 r = -EIO;
1108                 spin_unlock_bh(&sc->sc_pcu_lock);
1109                 goto mutex_unlock;
1110         }
1111         spin_unlock_bh(&sc->sc_pcu_lock);
1112
1113         /* Setup our intr mask. */
1114         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1115                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1116                     ATH9K_INT_GLOBAL;
1117
1118         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1119                 ah->imask |= ATH9K_INT_RXHP |
1120                              ATH9K_INT_RXLP |
1121                              ATH9K_INT_BB_WATCHDOG;
1122         else
1123                 ah->imask |= ATH9K_INT_RX;
1124
1125         ah->imask |= ATH9K_INT_GTT;
1126
1127         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1128                 ah->imask |= ATH9K_INT_CST;
1129
1130         sc->sc_flags &= ~SC_OP_INVALID;
1131         sc->sc_ah->is_monitoring = false;
1132
1133         /* Disable BMISS interrupt when we're not associated */
1134         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1135         ath9k_hw_set_interrupts(ah, ah->imask);
1136         ath9k_hw_enable_interrupts(ah);
1137
1138         ieee80211_wake_queues(hw);
1139
1140         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1141
1142         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1143             !ah->btcoex_hw.enabled) {
1144                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1145                                            AR_STOMP_LOW_WLAN_WGHT);
1146                 ath9k_hw_btcoex_enable(ah);
1147
1148                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1149                         ath9k_btcoex_timer_resume(sc);
1150         }
1151
1152         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1153                 common->bus_ops->extn_synch_en(common);
1154
1155 mutex_unlock:
1156         mutex_unlock(&sc->mutex);
1157
1158         ath9k_ps_restore(sc);
1159
1160         return r;
1161 }
1162
1163 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1164 {
1165         struct ath_softc *sc = hw->priv;
1166         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1167         struct ath_tx_control txctl;
1168         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1169
1170         if (sc->ps_enabled) {
1171                 /*
1172                  * mac80211 does not set PM field for normal data frames, so we
1173                  * need to update that based on the current PS mode.
1174                  */
1175                 if (ieee80211_is_data(hdr->frame_control) &&
1176                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1177                     !ieee80211_has_pm(hdr->frame_control)) {
1178                         ath_dbg(common, ATH_DBG_PS,
1179                                 "Add PM=1 for a TX frame while in PS mode\n");
1180                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1181                 }
1182         }
1183
1184         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1185                 /*
1186                  * We are using PS-Poll and mac80211 can request TX while in
1187                  * power save mode. Need to wake up hardware for the TX to be
1188                  * completed and if needed, also for RX of buffered frames.
1189                  */
1190                 ath9k_ps_wakeup(sc);
1191                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1192                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1193                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1194                         ath_dbg(common, ATH_DBG_PS,
1195                                 "Sending PS-Poll to pick a buffered frame\n");
1196                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1197                 } else {
1198                         ath_dbg(common, ATH_DBG_PS,
1199                                 "Wake up to complete TX\n");
1200                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1201                 }
1202                 /*
1203                  * The actual restore operation will happen only after
1204                  * the sc_flags bit is cleared. We are just dropping
1205                  * the ps_usecount here.
1206                  */
1207                 ath9k_ps_restore(sc);
1208         }
1209
1210         memset(&txctl, 0, sizeof(struct ath_tx_control));
1211         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1212
1213         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1214
1215         if (ath_tx_start(hw, skb, &txctl) != 0) {
1216                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1217                 goto exit;
1218         }
1219
1220         return;
1221 exit:
1222         dev_kfree_skb_any(skb);
1223 }
1224
1225 static void ath9k_stop(struct ieee80211_hw *hw)
1226 {
1227         struct ath_softc *sc = hw->priv;
1228         struct ath_hw *ah = sc->sc_ah;
1229         struct ath_common *common = ath9k_hw_common(ah);
1230
1231         mutex_lock(&sc->mutex);
1232
1233         cancel_delayed_work_sync(&sc->tx_complete_work);
1234         cancel_delayed_work_sync(&sc->hw_pll_work);
1235         cancel_work_sync(&sc->paprd_work);
1236         cancel_work_sync(&sc->hw_check_work);
1237
1238         if (sc->sc_flags & SC_OP_INVALID) {
1239                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1240                 mutex_unlock(&sc->mutex);
1241                 return;
1242         }
1243
1244         /* Ensure HW is awake when we try to shut it down. */
1245         ath9k_ps_wakeup(sc);
1246
1247         if (ah->btcoex_hw.enabled) {
1248                 ath9k_hw_btcoex_disable(ah);
1249                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1250                         ath9k_btcoex_timer_pause(sc);
1251         }
1252
1253         spin_lock_bh(&sc->sc_pcu_lock);
1254
1255         /* prevent tasklets to enable interrupts once we disable them */
1256         ah->imask &= ~ATH9K_INT_GLOBAL;
1257
1258         /* make sure h/w will not generate any interrupt
1259          * before setting the invalid flag. */
1260         ath9k_hw_disable_interrupts(ah);
1261
1262         if (!(sc->sc_flags & SC_OP_INVALID)) {
1263                 ath_drain_all_txq(sc, false);
1264                 ath_stoprecv(sc);
1265                 ath9k_hw_phy_disable(ah);
1266         } else
1267                 sc->rx.rxlink = NULL;
1268
1269         if (sc->rx.frag) {
1270                 dev_kfree_skb_any(sc->rx.frag);
1271                 sc->rx.frag = NULL;
1272         }
1273
1274         /* disable HAL and put h/w to sleep */
1275         ath9k_hw_disable(ah);
1276
1277         spin_unlock_bh(&sc->sc_pcu_lock);
1278
1279         /* we can now sync irq and kill any running tasklets, since we already
1280          * disabled interrupts and not holding a spin lock */
1281         synchronize_irq(sc->irq);
1282         tasklet_kill(&sc->intr_tq);
1283         tasklet_kill(&sc->bcon_tasklet);
1284
1285         ath9k_ps_restore(sc);
1286
1287         sc->ps_idle = true;
1288         ath_radio_disable(sc, hw);
1289
1290         sc->sc_flags |= SC_OP_INVALID;
1291
1292         mutex_unlock(&sc->mutex);
1293
1294         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1295 }
1296
1297 bool ath9k_uses_beacons(int type)
1298 {
1299         switch (type) {
1300         case NL80211_IFTYPE_AP:
1301         case NL80211_IFTYPE_ADHOC:
1302         case NL80211_IFTYPE_MESH_POINT:
1303                 return true;
1304         default:
1305                 return false;
1306         }
1307 }
1308
1309 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1310                                  struct ieee80211_vif *vif)
1311 {
1312         struct ath_vif *avp = (void *)vif->drv_priv;
1313
1314         ath9k_set_beaconing_status(sc, false);
1315         ath_beacon_return(sc, avp);
1316         ath9k_set_beaconing_status(sc, true);
1317         sc->sc_flags &= ~SC_OP_BEACONS;
1318 }
1319
1320 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1321 {
1322         struct ath9k_vif_iter_data *iter_data = data;
1323         int i;
1324
1325         if (iter_data->hw_macaddr)
1326                 for (i = 0; i < ETH_ALEN; i++)
1327                         iter_data->mask[i] &=
1328                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1329
1330         switch (vif->type) {
1331         case NL80211_IFTYPE_AP:
1332                 iter_data->naps++;
1333                 break;
1334         case NL80211_IFTYPE_STATION:
1335                 iter_data->nstations++;
1336                 break;
1337         case NL80211_IFTYPE_ADHOC:
1338                 iter_data->nadhocs++;
1339                 break;
1340         case NL80211_IFTYPE_MESH_POINT:
1341                 iter_data->nmeshes++;
1342                 break;
1343         case NL80211_IFTYPE_WDS:
1344                 iter_data->nwds++;
1345                 break;
1346         default:
1347                 iter_data->nothers++;
1348                 break;
1349         }
1350 }
1351
1352 /* Called with sc->mutex held. */
1353 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1354                                struct ieee80211_vif *vif,
1355                                struct ath9k_vif_iter_data *iter_data)
1356 {
1357         struct ath_softc *sc = hw->priv;
1358         struct ath_hw *ah = sc->sc_ah;
1359         struct ath_common *common = ath9k_hw_common(ah);
1360
1361         /*
1362          * Use the hardware MAC address as reference, the hardware uses it
1363          * together with the BSSID mask when matching addresses.
1364          */
1365         memset(iter_data, 0, sizeof(*iter_data));
1366         iter_data->hw_macaddr = common->macaddr;
1367         memset(&iter_data->mask, 0xff, ETH_ALEN);
1368
1369         if (vif)
1370                 ath9k_vif_iter(iter_data, vif->addr, vif);
1371
1372         /* Get list of all active MAC addresses */
1373         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1374                                                    iter_data);
1375 }
1376
1377 /* Called with sc->mutex held. */
1378 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1379                                           struct ieee80211_vif *vif)
1380 {
1381         struct ath_softc *sc = hw->priv;
1382         struct ath_hw *ah = sc->sc_ah;
1383         struct ath_common *common = ath9k_hw_common(ah);
1384         struct ath9k_vif_iter_data iter_data;
1385
1386         ath9k_calculate_iter_data(hw, vif, &iter_data);
1387
1388         /* Set BSSID mask. */
1389         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1390         ath_hw_setbssidmask(common);
1391
1392         /* Set op-mode & TSF */
1393         if (iter_data.naps > 0) {
1394                 ath9k_hw_set_tsfadjust(ah, 1);
1395                 sc->sc_flags |= SC_OP_TSF_RESET;
1396                 ah->opmode = NL80211_IFTYPE_AP;
1397         } else {
1398                 ath9k_hw_set_tsfadjust(ah, 0);
1399                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1400
1401                 if (iter_data.nmeshes)
1402                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1403                 else if (iter_data.nwds)
1404                         ah->opmode = NL80211_IFTYPE_AP;
1405                 else if (iter_data.nadhocs)
1406                         ah->opmode = NL80211_IFTYPE_ADHOC;
1407                 else
1408                         ah->opmode = NL80211_IFTYPE_STATION;
1409         }
1410
1411         /*
1412          * Enable MIB interrupts when there are hardware phy counters.
1413          */
1414         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1415                 if (ah->config.enable_ani)
1416                         ah->imask |= ATH9K_INT_MIB;
1417                 ah->imask |= ATH9K_INT_TSFOOR;
1418         } else {
1419                 ah->imask &= ~ATH9K_INT_MIB;
1420                 ah->imask &= ~ATH9K_INT_TSFOOR;
1421         }
1422
1423         ath9k_hw_set_interrupts(ah, ah->imask);
1424
1425         /* Set up ANI */
1426         if (iter_data.naps > 0) {
1427                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1428
1429                 if (!common->disable_ani) {
1430                         sc->sc_flags |= SC_OP_ANI_RUN;
1431                         ath_start_ani(common);
1432                 }
1433
1434         } else {
1435                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1436                 del_timer_sync(&common->ani.timer);
1437         }
1438 }
1439
1440 /* Called with sc->mutex held, vif counts set up properly. */
1441 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1442                                    struct ieee80211_vif *vif)
1443 {
1444         struct ath_softc *sc = hw->priv;
1445
1446         ath9k_calculate_summary_state(hw, vif);
1447
1448         if (ath9k_uses_beacons(vif->type)) {
1449                 int error;
1450                 /* This may fail because upper levels do not have beacons
1451                  * properly configured yet.  That's OK, we assume it
1452                  * will be properly configured and then we will be notified
1453                  * in the info_changed method and set up beacons properly
1454                  * there.
1455                  */
1456                 ath9k_set_beaconing_status(sc, false);
1457                 error = ath_beacon_alloc(sc, vif);
1458                 if (!error)
1459                         ath_beacon_config(sc, vif);
1460                 ath9k_set_beaconing_status(sc, true);
1461         }
1462 }
1463
1464
1465 static int ath9k_add_interface(struct ieee80211_hw *hw,
1466                                struct ieee80211_vif *vif)
1467 {
1468         struct ath_softc *sc = hw->priv;
1469         struct ath_hw *ah = sc->sc_ah;
1470         struct ath_common *common = ath9k_hw_common(ah);
1471         int ret = 0;
1472
1473         ath9k_ps_wakeup(sc);
1474         mutex_lock(&sc->mutex);
1475
1476         switch (vif->type) {
1477         case NL80211_IFTYPE_STATION:
1478         case NL80211_IFTYPE_WDS:
1479         case NL80211_IFTYPE_ADHOC:
1480         case NL80211_IFTYPE_AP:
1481         case NL80211_IFTYPE_MESH_POINT:
1482                 break;
1483         default:
1484                 ath_err(common, "Interface type %d not yet supported\n",
1485                         vif->type);
1486                 ret = -EOPNOTSUPP;
1487                 goto out;
1488         }
1489
1490         if (ath9k_uses_beacons(vif->type)) {
1491                 if (sc->nbcnvifs >= ATH_BCBUF) {
1492                         ath_err(common, "Not enough beacon buffers when adding"
1493                                 " new interface of type: %i\n",
1494                                 vif->type);
1495                         ret = -ENOBUFS;
1496                         goto out;
1497                 }
1498         }
1499
1500         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1501             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1502              sc->nvifs > 0)) {
1503                 ath_err(common, "Cannot create ADHOC interface when other"
1504                         " interfaces already exist.\n");
1505                 ret = -EINVAL;
1506                 goto out;
1507         }
1508
1509         ath_dbg(common, ATH_DBG_CONFIG,
1510                 "Attach a VIF of type: %d\n", vif->type);
1511
1512         sc->nvifs++;
1513
1514         ath9k_do_vif_add_setup(hw, vif);
1515 out:
1516         mutex_unlock(&sc->mutex);
1517         ath9k_ps_restore(sc);
1518         return ret;
1519 }
1520
1521 static int ath9k_change_interface(struct ieee80211_hw *hw,
1522                                   struct ieee80211_vif *vif,
1523                                   enum nl80211_iftype new_type,
1524                                   bool p2p)
1525 {
1526         struct ath_softc *sc = hw->priv;
1527         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1528         int ret = 0;
1529
1530         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1531         mutex_lock(&sc->mutex);
1532         ath9k_ps_wakeup(sc);
1533
1534         /* See if new interface type is valid. */
1535         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1536             (sc->nvifs > 1)) {
1537                 ath_err(common, "When using ADHOC, it must be the only"
1538                         " interface.\n");
1539                 ret = -EINVAL;
1540                 goto out;
1541         }
1542
1543         if (ath9k_uses_beacons(new_type) &&
1544             !ath9k_uses_beacons(vif->type)) {
1545                 if (sc->nbcnvifs >= ATH_BCBUF) {
1546                         ath_err(common, "No beacon slot available\n");
1547                         ret = -ENOBUFS;
1548                         goto out;
1549                 }
1550         }
1551
1552         /* Clean up old vif stuff */
1553         if (ath9k_uses_beacons(vif->type))
1554                 ath9k_reclaim_beacon(sc, vif);
1555
1556         /* Add new settings */
1557         vif->type = new_type;
1558         vif->p2p = p2p;
1559
1560         ath9k_do_vif_add_setup(hw, vif);
1561 out:
1562         ath9k_ps_restore(sc);
1563         mutex_unlock(&sc->mutex);
1564         return ret;
1565 }
1566
1567 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1568                                    struct ieee80211_vif *vif)
1569 {
1570         struct ath_softc *sc = hw->priv;
1571         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1572
1573         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1574
1575         ath9k_ps_wakeup(sc);
1576         mutex_lock(&sc->mutex);
1577
1578         sc->nvifs--;
1579
1580         /* Reclaim beacon resources */
1581         if (ath9k_uses_beacons(vif->type))
1582                 ath9k_reclaim_beacon(sc, vif);
1583
1584         ath9k_calculate_summary_state(hw, NULL);
1585
1586         mutex_unlock(&sc->mutex);
1587         ath9k_ps_restore(sc);
1588 }
1589
1590 static void ath9k_enable_ps(struct ath_softc *sc)
1591 {
1592         struct ath_hw *ah = sc->sc_ah;
1593
1594         sc->ps_enabled = true;
1595         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1596                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1597                         ah->imask |= ATH9K_INT_TIM_TIMER;
1598                         ath9k_hw_set_interrupts(ah, ah->imask);
1599                 }
1600                 ath9k_hw_setrxabort(ah, 1);
1601         }
1602 }
1603
1604 static void ath9k_disable_ps(struct ath_softc *sc)
1605 {
1606         struct ath_hw *ah = sc->sc_ah;
1607
1608         sc->ps_enabled = false;
1609         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1610         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1611                 ath9k_hw_setrxabort(ah, 0);
1612                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1613                                   PS_WAIT_FOR_CAB |
1614                                   PS_WAIT_FOR_PSPOLL_DATA |
1615                                   PS_WAIT_FOR_TX_ACK);
1616                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1617                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1618                         ath9k_hw_set_interrupts(ah, ah->imask);
1619                 }
1620         }
1621
1622 }
1623
1624 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1625 {
1626         struct ath_softc *sc = hw->priv;
1627         struct ath_hw *ah = sc->sc_ah;
1628         struct ath_common *common = ath9k_hw_common(ah);
1629         struct ieee80211_conf *conf = &hw->conf;
1630         bool disable_radio = false;
1631
1632         mutex_lock(&sc->mutex);
1633
1634         /*
1635          * Leave this as the first check because we need to turn on the
1636          * radio if it was disabled before prior to processing the rest
1637          * of the changes. Likewise we must only disable the radio towards
1638          * the end.
1639          */
1640         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1641                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1642                 if (!sc->ps_idle) {
1643                         ath_radio_enable(sc, hw);
1644                         ath_dbg(common, ATH_DBG_CONFIG,
1645                                 "not-idle: enabling radio\n");
1646                 } else {
1647                         disable_radio = true;
1648                 }
1649         }
1650
1651         /*
1652          * We just prepare to enable PS. We have to wait until our AP has
1653          * ACK'd our null data frame to disable RX otherwise we'll ignore
1654          * those ACKs and end up retransmitting the same null data frames.
1655          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1656          */
1657         if (changed & IEEE80211_CONF_CHANGE_PS) {
1658                 unsigned long flags;
1659                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1660                 if (conf->flags & IEEE80211_CONF_PS)
1661                         ath9k_enable_ps(sc);
1662                 else
1663                         ath9k_disable_ps(sc);
1664                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1665         }
1666
1667         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1668                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1669                         ath_dbg(common, ATH_DBG_CONFIG,
1670                                 "Monitor mode is enabled\n");
1671                         sc->sc_ah->is_monitoring = true;
1672                 } else {
1673                         ath_dbg(common, ATH_DBG_CONFIG,
1674                                 "Monitor mode is disabled\n");
1675                         sc->sc_ah->is_monitoring = false;
1676                 }
1677         }
1678
1679         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1680                 struct ieee80211_channel *curchan = hw->conf.channel;
1681                 int pos = curchan->hw_value;
1682                 int old_pos = -1;
1683                 unsigned long flags;
1684
1685                 if (ah->curchan)
1686                         old_pos = ah->curchan - &ah->channels[0];
1687
1688                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1689                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1690                 else
1691                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1692
1693                 ath_dbg(common, ATH_DBG_CONFIG,
1694                         "Set channel: %d MHz type: %d\n",
1695                         curchan->center_freq, conf->channel_type);
1696
1697                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1698                                           curchan, conf->channel_type);
1699
1700                 /* update survey stats for the old channel before switching */
1701                 spin_lock_irqsave(&common->cc_lock, flags);
1702                 ath_update_survey_stats(sc);
1703                 spin_unlock_irqrestore(&common->cc_lock, flags);
1704
1705                 /*
1706                  * If the operating channel changes, change the survey in-use flags
1707                  * along with it.
1708                  * Reset the survey data for the new channel, unless we're switching
1709                  * back to the operating channel from an off-channel operation.
1710                  */
1711                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1712                     sc->cur_survey != &sc->survey[pos]) {
1713
1714                         if (sc->cur_survey)
1715                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1716
1717                         sc->cur_survey = &sc->survey[pos];
1718
1719                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1720                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1721                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1722                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1723                 }
1724
1725                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1726                         ath_err(common, "Unable to set channel\n");
1727                         mutex_unlock(&sc->mutex);
1728                         return -EINVAL;
1729                 }
1730
1731                 /*
1732                  * The most recent snapshot of channel->noisefloor for the old
1733                  * channel is only available after the hardware reset. Copy it to
1734                  * the survey stats now.
1735                  */
1736                 if (old_pos >= 0)
1737                         ath_update_survey_nf(sc, old_pos);
1738         }
1739
1740         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1741                 ath_dbg(common, ATH_DBG_CONFIG,
1742                         "Set power: %d\n", conf->power_level);
1743                 sc->config.txpowlimit = 2 * conf->power_level;
1744                 ath9k_ps_wakeup(sc);
1745                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1746                                        sc->config.txpowlimit, &sc->curtxpow);
1747                 ath9k_ps_restore(sc);
1748         }
1749
1750         if (disable_radio) {
1751                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1752                 ath_radio_disable(sc, hw);
1753         }
1754
1755         mutex_unlock(&sc->mutex);
1756
1757         return 0;
1758 }
1759
1760 #define SUPPORTED_FILTERS                       \
1761         (FIF_PROMISC_IN_BSS |                   \
1762         FIF_ALLMULTI |                          \
1763         FIF_CONTROL |                           \
1764         FIF_PSPOLL |                            \
1765         FIF_OTHER_BSS |                         \
1766         FIF_BCN_PRBRESP_PROMISC |               \
1767         FIF_PROBE_REQ |                         \
1768         FIF_FCSFAIL)
1769
1770 /* FIXME: sc->sc_full_reset ? */
1771 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1772                                    unsigned int changed_flags,
1773                                    unsigned int *total_flags,
1774                                    u64 multicast)
1775 {
1776         struct ath_softc *sc = hw->priv;
1777         u32 rfilt;
1778
1779         changed_flags &= SUPPORTED_FILTERS;
1780         *total_flags &= SUPPORTED_FILTERS;
1781
1782         sc->rx.rxfilter = *total_flags;
1783         ath9k_ps_wakeup(sc);
1784         rfilt = ath_calcrxfilter(sc);
1785         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1786         ath9k_ps_restore(sc);
1787
1788         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1789                 "Set HW RX filter: 0x%x\n", rfilt);
1790 }
1791
1792 static int ath9k_sta_add(struct ieee80211_hw *hw,
1793                          struct ieee80211_vif *vif,
1794                          struct ieee80211_sta *sta)
1795 {
1796         struct ath_softc *sc = hw->priv;
1797         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1798         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1799         struct ieee80211_key_conf ps_key = { };
1800
1801         ath_node_attach(sc, sta);
1802
1803         if (vif->type != NL80211_IFTYPE_AP &&
1804             vif->type != NL80211_IFTYPE_AP_VLAN)
1805                 return 0;
1806
1807         an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1808
1809         return 0;
1810 }
1811
1812 static void ath9k_del_ps_key(struct ath_softc *sc,
1813                              struct ieee80211_vif *vif,
1814                              struct ieee80211_sta *sta)
1815 {
1816         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1817         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1818         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1819
1820         if (!an->ps_key)
1821             return;
1822
1823         ath_key_delete(common, &ps_key);
1824 }
1825
1826 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1827                             struct ieee80211_vif *vif,
1828                             struct ieee80211_sta *sta)
1829 {
1830         struct ath_softc *sc = hw->priv;
1831
1832         ath9k_del_ps_key(sc, vif, sta);
1833         ath_node_detach(sc, sta);
1834
1835         return 0;
1836 }
1837
1838 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1839                          struct ieee80211_vif *vif,
1840                          enum sta_notify_cmd cmd,
1841                          struct ieee80211_sta *sta)
1842 {
1843         struct ath_softc *sc = hw->priv;
1844         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1845
1846         switch (cmd) {
1847         case STA_NOTIFY_SLEEP:
1848                 an->sleeping = true;
1849                 if (ath_tx_aggr_sleep(sc, an))
1850                         ieee80211_sta_set_tim(sta);
1851                 break;
1852         case STA_NOTIFY_AWAKE:
1853                 an->sleeping = false;
1854                 ath_tx_aggr_wakeup(sc, an);
1855                 break;
1856         }
1857 }
1858
1859 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1860                          const struct ieee80211_tx_queue_params *params)
1861 {
1862         struct ath_softc *sc = hw->priv;
1863         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1864         struct ath_txq *txq;
1865         struct ath9k_tx_queue_info qi;
1866         int ret = 0;
1867
1868         if (queue >= WME_NUM_AC)
1869                 return 0;
1870
1871         txq = sc->tx.txq_map[queue];
1872
1873         ath9k_ps_wakeup(sc);
1874         mutex_lock(&sc->mutex);
1875
1876         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1877
1878         qi.tqi_aifs = params->aifs;
1879         qi.tqi_cwmin = params->cw_min;
1880         qi.tqi_cwmax = params->cw_max;
1881         qi.tqi_burstTime = params->txop;
1882
1883         ath_dbg(common, ATH_DBG_CONFIG,
1884                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1885                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1886                 params->cw_max, params->txop);
1887
1888         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1889         if (ret)
1890                 ath_err(common, "TXQ Update failed\n");
1891
1892         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1893                 if (queue == WME_AC_BE && !ret)
1894                         ath_beaconq_config(sc);
1895
1896         mutex_unlock(&sc->mutex);
1897         ath9k_ps_restore(sc);
1898
1899         return ret;
1900 }
1901
1902 static int ath9k_set_key(struct ieee80211_hw *hw,
1903                          enum set_key_cmd cmd,
1904                          struct ieee80211_vif *vif,
1905                          struct ieee80211_sta *sta,
1906                          struct ieee80211_key_conf *key)
1907 {
1908         struct ath_softc *sc = hw->priv;
1909         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1910         int ret = 0;
1911
1912         if (ath9k_modparam_nohwcrypt)
1913                 return -ENOSPC;
1914
1915         if (vif->type == NL80211_IFTYPE_ADHOC &&
1916             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1917              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1918             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1919                 /*
1920                  * For now, disable hw crypto for the RSN IBSS group keys. This
1921                  * could be optimized in the future to use a modified key cache
1922                  * design to support per-STA RX GTK, but until that gets
1923                  * implemented, use of software crypto for group addressed
1924                  * frames is a acceptable to allow RSN IBSS to be used.
1925                  */
1926                 return -EOPNOTSUPP;
1927         }
1928
1929         mutex_lock(&sc->mutex);
1930         ath9k_ps_wakeup(sc);
1931         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1932
1933         switch (cmd) {
1934         case SET_KEY:
1935                 if (sta)
1936                         ath9k_del_ps_key(sc, vif, sta);
1937
1938                 ret = ath_key_config(common, vif, sta, key);
1939                 if (ret >= 0) {
1940                         key->hw_key_idx = ret;
1941                         /* push IV and Michael MIC generation to stack */
1942                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1943                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1944                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1945                         if (sc->sc_ah->sw_mgmt_crypto &&
1946                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1947                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1948                         ret = 0;
1949                 }
1950                 break;
1951         case DISABLE_KEY:
1952                 ath_key_delete(common, key);
1953                 break;
1954         default:
1955                 ret = -EINVAL;
1956         }
1957
1958         ath9k_ps_restore(sc);
1959         mutex_unlock(&sc->mutex);
1960
1961         return ret;
1962 }
1963 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1964 {
1965         struct ath_softc *sc = data;
1966         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1967         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1968         struct ath_vif *avp = (void *)vif->drv_priv;
1969
1970         /*
1971          * Skip iteration if primary station vif's bss info
1972          * was not changed
1973          */
1974         if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1975                 return;
1976
1977         if (bss_conf->assoc) {
1978                 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1979                 avp->primary_sta_vif = true;
1980                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1981                 common->curaid = bss_conf->aid;
1982                 ath9k_hw_write_associd(sc->sc_ah);
1983                 ath_dbg(common, ATH_DBG_CONFIG,
1984                                 "Bss Info ASSOC %d, bssid: %pM\n",
1985                                 bss_conf->aid, common->curbssid);
1986                 ath_beacon_config(sc, vif);
1987                 /*
1988                  * Request a re-configuration of Beacon related timers
1989                  * on the receipt of the first Beacon frame (i.e.,
1990                  * after time sync with the AP).
1991                  */
1992                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1993                 /* Reset rssi stats */
1994                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1995                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1996
1997                 if (!common->disable_ani) {
1998                         sc->sc_flags |= SC_OP_ANI_RUN;
1999                         ath_start_ani(common);
2000                 }
2001
2002         }
2003 }
2004
2005 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
2006 {
2007         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2008         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2009         struct ath_vif *avp = (void *)vif->drv_priv;
2010
2011         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
2012                 return;
2013
2014         /* Reconfigure bss info */
2015         if (avp->primary_sta_vif && !bss_conf->assoc) {
2016                 ath_dbg(common, ATH_DBG_CONFIG,
2017                         "Bss Info DISASSOC %d, bssid %pM\n",
2018                         common->curaid, common->curbssid);
2019                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2020                 avp->primary_sta_vif = false;
2021                 memset(common->curbssid, 0, ETH_ALEN);
2022                 common->curaid = 0;
2023         }
2024
2025         ieee80211_iterate_active_interfaces_atomic(
2026                         sc->hw, ath9k_bss_iter, sc);
2027
2028         /*
2029          * None of station vifs are associated.
2030          * Clear bssid & aid
2031          */
2032         if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2033                 ath9k_hw_write_associd(sc->sc_ah);
2034                 /* Stop ANI */
2035                 sc->sc_flags &= ~SC_OP_ANI_RUN;
2036                 del_timer_sync(&common->ani.timer);
2037         }
2038 }
2039
2040 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2041                                    struct ieee80211_vif *vif,
2042                                    struct ieee80211_bss_conf *bss_conf,
2043                                    u32 changed)
2044 {
2045         struct ath_softc *sc = hw->priv;
2046         struct ath_hw *ah = sc->sc_ah;
2047         struct ath_common *common = ath9k_hw_common(ah);
2048         struct ath_vif *avp = (void *)vif->drv_priv;
2049         int slottime;
2050         int error;
2051
2052         ath9k_ps_wakeup(sc);
2053         mutex_lock(&sc->mutex);
2054
2055         if (changed & BSS_CHANGED_BSSID) {
2056                 ath9k_config_bss(sc, vif);
2057
2058                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2059                         common->curbssid, common->curaid);
2060         }
2061
2062         if (changed & BSS_CHANGED_IBSS) {
2063                 /* There can be only one vif available */
2064                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2065                 common->curaid = bss_conf->aid;
2066                 ath9k_hw_write_associd(sc->sc_ah);
2067
2068                 if (bss_conf->ibss_joined) {
2069                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2070
2071                         if (!common->disable_ani) {
2072                                 sc->sc_flags |= SC_OP_ANI_RUN;
2073                                 ath_start_ani(common);
2074                         }
2075
2076                 } else {
2077                         sc->sc_flags &= ~SC_OP_ANI_RUN;
2078                         del_timer_sync(&common->ani.timer);
2079                 }
2080         }
2081
2082         /* Enable transmission of beacons (AP, IBSS, MESH) */
2083         if ((changed & BSS_CHANGED_BEACON) ||
2084             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2085                 ath9k_set_beaconing_status(sc, false);
2086                 error = ath_beacon_alloc(sc, vif);
2087                 if (!error)
2088                         ath_beacon_config(sc, vif);
2089                 ath9k_set_beaconing_status(sc, true);
2090         }
2091
2092         if (changed & BSS_CHANGED_ERP_SLOT) {
2093                 if (bss_conf->use_short_slot)
2094                         slottime = 9;
2095                 else
2096                         slottime = 20;
2097                 if (vif->type == NL80211_IFTYPE_AP) {
2098                         /*
2099                          * Defer update, so that connected stations can adjust
2100                          * their settings at the same time.
2101                          * See beacon.c for more details
2102                          */
2103                         sc->beacon.slottime = slottime;
2104                         sc->beacon.updateslot = UPDATE;
2105                 } else {
2106                         ah->slottime = slottime;
2107                         ath9k_hw_init_global_settings(ah);
2108                 }
2109         }
2110
2111         /* Disable transmission of beacons */
2112         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2113             !bss_conf->enable_beacon) {
2114                 ath9k_set_beaconing_status(sc, false);
2115                 avp->is_bslot_active = false;
2116                 ath9k_set_beaconing_status(sc, true);
2117         }
2118
2119         if (changed & BSS_CHANGED_BEACON_INT) {
2120                 /*
2121                  * In case of AP mode, the HW TSF has to be reset
2122                  * when the beacon interval changes.
2123                  */
2124                 if (vif->type == NL80211_IFTYPE_AP) {
2125                         sc->sc_flags |= SC_OP_TSF_RESET;
2126                         ath9k_set_beaconing_status(sc, false);
2127                         error = ath_beacon_alloc(sc, vif);
2128                         if (!error)
2129                                 ath_beacon_config(sc, vif);
2130                         ath9k_set_beaconing_status(sc, true);
2131                 } else
2132                         ath_beacon_config(sc, vif);
2133         }
2134
2135         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2136                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2137                         bss_conf->use_short_preamble);
2138                 if (bss_conf->use_short_preamble)
2139                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2140                 else
2141                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2142         }
2143
2144         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2145                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2146                         bss_conf->use_cts_prot);
2147                 if (bss_conf->use_cts_prot &&
2148                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2149                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2150                 else
2151                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2152         }
2153
2154         mutex_unlock(&sc->mutex);
2155         ath9k_ps_restore(sc);
2156 }
2157
2158 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2159 {
2160         struct ath_softc *sc = hw->priv;
2161         u64 tsf;
2162
2163         mutex_lock(&sc->mutex);
2164         ath9k_ps_wakeup(sc);
2165         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2166         ath9k_ps_restore(sc);
2167         mutex_unlock(&sc->mutex);
2168
2169         return tsf;
2170 }
2171
2172 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2173 {
2174         struct ath_softc *sc = hw->priv;
2175
2176         mutex_lock(&sc->mutex);
2177         ath9k_ps_wakeup(sc);
2178         ath9k_hw_settsf64(sc->sc_ah, tsf);
2179         ath9k_ps_restore(sc);
2180         mutex_unlock(&sc->mutex);
2181 }
2182
2183 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2184 {
2185         struct ath_softc *sc = hw->priv;
2186
2187         mutex_lock(&sc->mutex);
2188
2189         ath9k_ps_wakeup(sc);
2190         ath9k_hw_reset_tsf(sc->sc_ah);
2191         ath9k_ps_restore(sc);
2192
2193         mutex_unlock(&sc->mutex);
2194 }
2195
2196 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2197                               struct ieee80211_vif *vif,
2198                               enum ieee80211_ampdu_mlme_action action,
2199                               struct ieee80211_sta *sta,
2200                               u16 tid, u16 *ssn, u8 buf_size)
2201 {
2202         struct ath_softc *sc = hw->priv;
2203         int ret = 0;
2204
2205         local_bh_disable();
2206
2207         switch (action) {
2208         case IEEE80211_AMPDU_RX_START:
2209                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2210                         ret = -ENOTSUPP;
2211                 break;
2212         case IEEE80211_AMPDU_RX_STOP:
2213                 break;
2214         case IEEE80211_AMPDU_TX_START:
2215                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2216                         return -EOPNOTSUPP;
2217
2218                 ath9k_ps_wakeup(sc);
2219                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2220                 if (!ret)
2221                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2222                 ath9k_ps_restore(sc);
2223                 break;
2224         case IEEE80211_AMPDU_TX_STOP:
2225                 ath9k_ps_wakeup(sc);
2226                 ath_tx_aggr_stop(sc, sta, tid);
2227                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2228                 ath9k_ps_restore(sc);
2229                 break;
2230         case IEEE80211_AMPDU_TX_OPERATIONAL:
2231                 ath9k_ps_wakeup(sc);
2232                 ath_tx_aggr_resume(sc, sta, tid);
2233                 ath9k_ps_restore(sc);
2234                 break;
2235         default:
2236                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2237         }
2238
2239         local_bh_enable();
2240
2241         return ret;
2242 }
2243
2244 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2245                              struct survey_info *survey)
2246 {
2247         struct ath_softc *sc = hw->priv;
2248         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2249         struct ieee80211_supported_band *sband;
2250         struct ieee80211_channel *chan;
2251         unsigned long flags;
2252         int pos;
2253
2254         spin_lock_irqsave(&common->cc_lock, flags);
2255         if (idx == 0)
2256                 ath_update_survey_stats(sc);
2257
2258         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2259         if (sband && idx >= sband->n_channels) {
2260                 idx -= sband->n_channels;
2261                 sband = NULL;
2262         }
2263
2264         if (!sband)
2265                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2266
2267         if (!sband || idx >= sband->n_channels) {
2268                 spin_unlock_irqrestore(&common->cc_lock, flags);
2269                 return -ENOENT;
2270         }
2271
2272         chan = &sband->channels[idx];
2273         pos = chan->hw_value;
2274         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2275         survey->channel = chan;
2276         spin_unlock_irqrestore(&common->cc_lock, flags);
2277
2278         return 0;
2279 }
2280
2281 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2282 {
2283         struct ath_softc *sc = hw->priv;
2284         struct ath_hw *ah = sc->sc_ah;
2285
2286         mutex_lock(&sc->mutex);
2287         ah->coverage_class = coverage_class;
2288         ath9k_hw_init_global_settings(ah);
2289         mutex_unlock(&sc->mutex);
2290 }
2291
2292 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2293 {
2294         struct ath_softc *sc = hw->priv;
2295         struct ath_hw *ah = sc->sc_ah;
2296         struct ath_common *common = ath9k_hw_common(ah);
2297         int timeout = 200; /* ms */
2298         int i, j;
2299         bool drain_txq;
2300
2301         mutex_lock(&sc->mutex);
2302         cancel_delayed_work_sync(&sc->tx_complete_work);
2303
2304         if (sc->sc_flags & SC_OP_INVALID) {
2305                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2306                 mutex_unlock(&sc->mutex);
2307                 return;
2308         }
2309
2310         if (drop)
2311                 timeout = 1;
2312
2313         for (j = 0; j < timeout; j++) {
2314                 bool npend = false;
2315
2316                 if (j)
2317                         usleep_range(1000, 2000);
2318
2319                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2320                         if (!ATH_TXQ_SETUP(sc, i))
2321                                 continue;
2322
2323                         npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2324
2325                         if (npend)
2326                                 break;
2327                 }
2328
2329                 if (!npend)
2330                     goto out;
2331         }
2332
2333         ath9k_ps_wakeup(sc);
2334         spin_lock_bh(&sc->sc_pcu_lock);
2335         drain_txq = ath_drain_all_txq(sc, false);
2336         if (!drain_txq)
2337                 ath_reset(sc, false);
2338         spin_unlock_bh(&sc->sc_pcu_lock);
2339         ath9k_ps_restore(sc);
2340         ieee80211_wake_queues(hw);
2341
2342 out:
2343         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2344         mutex_unlock(&sc->mutex);
2345 }
2346
2347 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2348 {
2349         struct ath_softc *sc = hw->priv;
2350         int i;
2351
2352         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2353                 if (!ATH_TXQ_SETUP(sc, i))
2354                         continue;
2355
2356                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2357                         return true;
2358         }
2359         return false;
2360 }
2361
2362 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2363 {
2364         struct ath_softc *sc = hw->priv;
2365         struct ath_hw *ah = sc->sc_ah;
2366         struct ieee80211_vif *vif;
2367         struct ath_vif *avp;
2368         struct ath_buf *bf;
2369         struct ath_tx_status ts;
2370         int status;
2371
2372         vif = sc->beacon.bslot[0];
2373         if (!vif)
2374                 return 0;
2375
2376         avp = (void *)vif->drv_priv;
2377         if (!avp->is_bslot_active)
2378                 return 0;
2379
2380         if (!sc->beacon.tx_processed) {
2381                 tasklet_disable(&sc->bcon_tasklet);
2382
2383                 bf = avp->av_bcbuf;
2384                 if (!bf || !bf->bf_mpdu)
2385                         goto skip;
2386
2387                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2388                 if (status == -EINPROGRESS)
2389                         goto skip;
2390
2391                 sc->beacon.tx_processed = true;
2392                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2393
2394 skip:
2395                 tasklet_enable(&sc->bcon_tasklet);
2396         }
2397
2398         return sc->beacon.tx_last;
2399 }
2400
2401 struct ieee80211_ops ath9k_ops = {
2402         .tx                 = ath9k_tx,
2403         .start              = ath9k_start,
2404         .stop               = ath9k_stop,
2405         .add_interface      = ath9k_add_interface,
2406         .change_interface   = ath9k_change_interface,
2407         .remove_interface   = ath9k_remove_interface,
2408         .config             = ath9k_config,
2409         .configure_filter   = ath9k_configure_filter,
2410         .sta_add            = ath9k_sta_add,
2411         .sta_remove         = ath9k_sta_remove,
2412         .sta_notify         = ath9k_sta_notify,
2413         .conf_tx            = ath9k_conf_tx,
2414         .bss_info_changed   = ath9k_bss_info_changed,
2415         .set_key            = ath9k_set_key,
2416         .get_tsf            = ath9k_get_tsf,
2417         .set_tsf            = ath9k_set_tsf,
2418         .reset_tsf          = ath9k_reset_tsf,
2419         .ampdu_action       = ath9k_ampdu_action,
2420         .get_survey         = ath9k_get_survey,
2421         .rfkill_poll        = ath9k_rfkill_poll_state,
2422         .set_coverage_class = ath9k_set_coverage_class,
2423         .flush              = ath9k_flush,
2424         .tx_frames_pending  = ath9k_tx_frames_pending,
2425         .tx_last_beacon = ath9k_tx_last_beacon,
2426 };