2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
97 spin_lock_irqsave(&sc->sc_pm_lock, flags);
98 if (++sc->ps_usecount != 1)
101 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104 * While the hardware is asleep, the cycle counters contain no
105 * useful data. Better clear them now so that they don't mess up
106 * survey data results.
108 spin_lock(&common->cc_lock);
109 ath_hw_cycle_counters_update(common);
110 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
111 spin_unlock(&common->cc_lock);
114 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
117 void ath9k_ps_restore(struct ath_softc *sc)
119 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
122 spin_lock_irqsave(&sc->sc_pm_lock, flags);
123 if (--sc->ps_usecount != 0)
126 spin_lock(&common->cc_lock);
127 ath_hw_cycle_counters_update(common);
128 spin_unlock(&common->cc_lock);
131 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
132 else if (sc->ps_enabled &&
133 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
135 PS_WAIT_FOR_PSPOLL_DATA |
136 PS_WAIT_FOR_TX_ACK)))
137 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
140 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
143 static void ath_start_ani(struct ath_common *common)
145 struct ath_hw *ah = common->ah;
146 unsigned long timestamp = jiffies_to_msecs(jiffies);
147 struct ath_softc *sc = (struct ath_softc *) common->priv;
149 if (!(sc->sc_flags & SC_OP_ANI_RUN))
152 if (sc->sc_flags & SC_OP_OFFCHANNEL)
155 common->ani.longcal_timer = timestamp;
156 common->ani.shortcal_timer = timestamp;
157 common->ani.checkani_timer = timestamp;
159 mod_timer(&common->ani.timer,
161 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
164 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
166 struct ath_hw *ah = sc->sc_ah;
167 struct ath9k_channel *chan = &ah->channels[channel];
168 struct survey_info *survey = &sc->survey[channel];
170 if (chan->noisefloor) {
171 survey->filled |= SURVEY_INFO_NOISE_DBM;
172 survey->noise = chan->noisefloor;
176 static void ath_update_survey_stats(struct ath_softc *sc)
178 struct ath_hw *ah = sc->sc_ah;
179 struct ath_common *common = ath9k_hw_common(ah);
180 int pos = ah->curchan - &ah->channels[0];
181 struct survey_info *survey = &sc->survey[pos];
182 struct ath_cycle_counters *cc = &common->cc_survey;
183 unsigned int div = common->clockrate * 1000;
188 if (ah->power_mode == ATH9K_PM_AWAKE)
189 ath_hw_cycle_counters_update(common);
191 if (cc->cycles > 0) {
192 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
193 SURVEY_INFO_CHANNEL_TIME_BUSY |
194 SURVEY_INFO_CHANNEL_TIME_RX |
195 SURVEY_INFO_CHANNEL_TIME_TX;
196 survey->channel_time += cc->cycles / div;
197 survey->channel_time_busy += cc->rx_busy / div;
198 survey->channel_time_rx += cc->rx_frame / div;
199 survey->channel_time_tx += cc->tx_frame / div;
201 memset(cc, 0, sizeof(*cc));
203 ath_update_survey_nf(sc, pos);
207 * Set/change channels. If the channel is really being changed, it's done
208 * by reseting the chip. To accomplish this we must first cleanup any pending
209 * DMA, then restart stuff.
211 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
212 struct ath9k_channel *hchan)
214 struct ath_wiphy *aphy = hw->priv;
215 struct ath_hw *ah = sc->sc_ah;
216 struct ath_common *common = ath9k_hw_common(ah);
217 struct ieee80211_conf *conf = &common->hw->conf;
218 bool fastcc = true, stopped;
219 struct ieee80211_channel *channel = hw->conf.channel;
220 struct ath9k_hw_cal_data *caldata = NULL;
223 if (sc->sc_flags & SC_OP_INVALID)
226 del_timer_sync(&common->ani.timer);
227 cancel_work_sync(&sc->paprd_work);
228 cancel_work_sync(&sc->hw_check_work);
229 cancel_delayed_work_sync(&sc->tx_complete_work);
234 * This is only performed if the channel settings have
237 * To switch channels clear any pending DMA operations;
238 * wait long enough for the RX fifo to drain, reset the
239 * hardware at the new frequency, and then re-enable
240 * the relevant bits of the h/w.
242 ath9k_hw_set_interrupts(ah, 0);
243 ath_drain_all_txq(sc, false);
245 spin_lock_bh(&sc->rx.pcu_lock);
247 stopped = ath_stoprecv(sc);
249 /* XXX: do not flush receive queue here. We don't want
250 * to flush data frames already in queue because of
251 * changing channel. */
253 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
256 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
257 caldata = &aphy->caldata;
259 ath_print(common, ATH_DBG_CONFIG,
260 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
261 sc->sc_ah->curchan->channel,
262 channel->center_freq, conf_is_ht40(conf),
265 spin_lock_bh(&sc->sc_resetlock);
267 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
269 ath_print(common, ATH_DBG_FATAL,
270 "Unable to reset channel (%u MHz), "
272 channel->center_freq, r);
273 spin_unlock_bh(&sc->sc_resetlock);
274 spin_unlock_bh(&sc->rx.pcu_lock);
277 spin_unlock_bh(&sc->sc_resetlock);
279 if (ath_startrecv(sc) != 0) {
280 ath_print(common, ATH_DBG_FATAL,
281 "Unable to restart recv logic\n");
283 spin_unlock_bh(&sc->rx.pcu_lock);
287 spin_unlock_bh(&sc->rx.pcu_lock);
289 ath_update_txpow(sc);
290 ath9k_hw_set_interrupts(ah, ah->imask);
292 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
293 ath_beacon_config(sc, NULL);
294 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
295 ath_start_ani(common);
299 ath9k_ps_restore(sc);
303 static void ath_paprd_activate(struct ath_softc *sc)
305 struct ath_hw *ah = sc->sc_ah;
306 struct ath9k_hw_cal_data *caldata = ah->caldata;
307 struct ath_common *common = ath9k_hw_common(ah);
310 if (!caldata || !caldata->paprd_done)
314 ar9003_paprd_enable(ah, false);
315 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
316 if (!(common->tx_chainmask & BIT(chain)))
319 ar9003_paprd_populate_single_table(ah, caldata, chain);
322 ar9003_paprd_enable(ah, true);
323 ath9k_ps_restore(sc);
326 void ath_paprd_calibrate(struct work_struct *work)
328 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
329 struct ieee80211_hw *hw = sc->hw;
330 struct ath_hw *ah = sc->sc_ah;
331 struct ieee80211_hdr *hdr;
332 struct sk_buff *skb = NULL;
333 struct ieee80211_tx_info *tx_info;
334 int band = hw->conf.channel->band;
335 struct ieee80211_supported_band *sband = &sc->sbands[band];
336 struct ath_tx_control txctl;
337 struct ath9k_hw_cal_data *caldata = ah->caldata;
338 struct ath_common *common = ath9k_hw_common(ah);
349 skb = alloc_skb(len, GFP_KERNEL);
353 tx_info = IEEE80211_SKB_CB(skb);
356 memset(skb->data, 0, len);
357 hdr = (struct ieee80211_hdr *)skb->data;
358 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
359 hdr->frame_control = cpu_to_le16(ftype);
360 hdr->duration_id = cpu_to_le16(10);
361 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
362 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
363 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
365 memset(&txctl, 0, sizeof(txctl));
366 qnum = sc->tx.hwq_map[WME_AC_BE];
367 txctl.txq = &sc->tx.txq[qnum];
370 ar9003_paprd_init_table(ah);
371 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
372 if (!(common->tx_chainmask & BIT(chain)))
376 memset(tx_info, 0, sizeof(*tx_info));
377 tx_info->band = band;
379 for (i = 0; i < 4; i++) {
380 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
381 tx_info->control.rates[i].count = 6;
384 init_completion(&sc->paprd_complete);
385 ar9003_paprd_setup_gain_table(ah, chain);
386 txctl.paprd = BIT(chain);
387 if (ath_tx_start(hw, skb, &txctl) != 0)
390 time_left = wait_for_completion_timeout(&sc->paprd_complete,
391 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
393 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
394 "Timeout waiting for paprd training on "
400 if (!ar9003_paprd_is_done(ah))
403 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
411 caldata->paprd_done = true;
412 ath_paprd_activate(sc);
416 ath9k_ps_restore(sc);
420 * This routine performs the periodic noise floor calibration function
421 * that is used to adjust and optimize the chip performance. This
422 * takes environmental changes (location, temperature) into account.
423 * When the task is complete, it reschedules itself depending on the
424 * appropriate interval that was calculated.
426 void ath_ani_calibrate(unsigned long data)
428 struct ath_softc *sc = (struct ath_softc *)data;
429 struct ath_hw *ah = sc->sc_ah;
430 struct ath_common *common = ath9k_hw_common(ah);
431 bool longcal = false;
432 bool shortcal = false;
433 bool aniflag = false;
434 unsigned int timestamp = jiffies_to_msecs(jiffies);
435 u32 cal_interval, short_cal_interval, long_cal_interval;
438 if (ah->caldata && ah->caldata->nfcal_interference)
439 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
441 long_cal_interval = ATH_LONG_CALINTERVAL;
443 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
444 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
446 /* Only calibrate if awake */
447 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
452 /* Long calibration runs independently of short calibration. */
453 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
455 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
456 common->ani.longcal_timer = timestamp;
459 /* Short calibration applies only while caldone is false */
460 if (!common->ani.caldone) {
461 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
463 ath_print(common, ATH_DBG_ANI,
464 "shortcal @%lu\n", jiffies);
465 common->ani.shortcal_timer = timestamp;
466 common->ani.resetcal_timer = timestamp;
469 if ((timestamp - common->ani.resetcal_timer) >=
470 ATH_RESTART_CALINTERVAL) {
471 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
472 if (common->ani.caldone)
473 common->ani.resetcal_timer = timestamp;
477 /* Verify whether we must check ANI */
478 if ((timestamp - common->ani.checkani_timer) >=
479 ah->config.ani_poll_interval) {
481 common->ani.checkani_timer = timestamp;
484 /* Skip all processing if there's nothing to do. */
485 if (longcal || shortcal || aniflag) {
486 /* Call ANI routine if necessary */
488 spin_lock_irqsave(&common->cc_lock, flags);
489 ath9k_hw_ani_monitor(ah, ah->curchan);
490 ath_update_survey_stats(sc);
491 spin_unlock_irqrestore(&common->cc_lock, flags);
494 /* Perform calibration if necessary */
495 if (longcal || shortcal) {
496 common->ani.caldone =
497 ath9k_hw_calibrate(ah,
499 common->rx_chainmask,
504 ath9k_ps_restore(sc);
508 * Set timer interval based on previous results.
509 * The interval must be the shortest necessary to satisfy ANI,
510 * short calibration and long calibration.
512 cal_interval = ATH_LONG_CALINTERVAL;
513 if (sc->sc_ah->config.enable_ani)
514 cal_interval = min(cal_interval,
515 (u32)ah->config.ani_poll_interval);
516 if (!common->ani.caldone)
517 cal_interval = min(cal_interval, (u32)short_cal_interval);
519 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
520 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
521 if (!ah->caldata->paprd_done)
522 ieee80211_queue_work(sc->hw, &sc->paprd_work);
524 ath_paprd_activate(sc);
529 * Update tx/rx chainmask. For legacy association,
530 * hard code chainmask to 1x1, for 11n association, use
531 * the chainmask configuration, for bt coexistence, use
532 * the chainmask configuration even in legacy mode.
534 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
536 struct ath_hw *ah = sc->sc_ah;
537 struct ath_common *common = ath9k_hw_common(ah);
539 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
540 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
541 common->tx_chainmask = ah->caps.tx_chainmask;
542 common->rx_chainmask = ah->caps.rx_chainmask;
544 common->tx_chainmask = 1;
545 common->rx_chainmask = 1;
548 ath_print(common, ATH_DBG_CONFIG,
549 "tx chmask: %d, rx chmask: %d\n",
550 common->tx_chainmask,
551 common->rx_chainmask);
554 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
558 an = (struct ath_node *)sta->drv_priv;
560 if (sc->sc_flags & SC_OP_TXAGGR) {
561 ath_tx_node_init(sc, an);
562 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
563 sta->ht_cap.ampdu_factor);
564 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
565 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
569 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
571 struct ath_node *an = (struct ath_node *)sta->drv_priv;
573 if (sc->sc_flags & SC_OP_TXAGGR)
574 ath_tx_node_cleanup(sc, an);
577 void ath_hw_check(struct work_struct *work)
579 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
584 for (i = 0; i < 3; i++) {
585 if (ath9k_hw_check_alive(sc->sc_ah))
593 ath9k_ps_restore(sc);
596 void ath9k_tasklet(unsigned long data)
598 struct ath_softc *sc = (struct ath_softc *)data;
599 struct ath_hw *ah = sc->sc_ah;
600 struct ath_common *common = ath9k_hw_common(ah);
602 u32 status = sc->intrstatus;
607 if (status & ATH9K_INT_FATAL) {
609 ath9k_ps_restore(sc);
613 if (!ath9k_hw_check_alive(ah))
614 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
616 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
617 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
620 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
622 if (status & rxmask) {
623 spin_lock_bh(&sc->rx.pcu_lock);
625 /* Check for high priority Rx first */
626 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
627 (status & ATH9K_INT_RXHP))
628 ath_rx_tasklet(sc, 0, true);
630 ath_rx_tasklet(sc, 0, false);
631 spin_unlock_bh(&sc->rx.pcu_lock);
634 if (status & ATH9K_INT_TX) {
635 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
636 ath_tx_edma_tasklet(sc);
641 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
643 * TSF sync does not look correct; remain awake to sync with
646 ath_print(common, ATH_DBG_PS,
647 "TSFOOR - Sync with next Beacon\n");
648 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
651 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
652 if (status & ATH9K_INT_GENTIMER)
653 ath_gen_timer_isr(sc->sc_ah);
655 /* re-enable hardware interrupt */
656 ath9k_hw_set_interrupts(ah, ah->imask);
657 ath9k_ps_restore(sc);
660 irqreturn_t ath_isr(int irq, void *dev)
662 #define SCHED_INTR ( \
675 struct ath_softc *sc = dev;
676 struct ath_hw *ah = sc->sc_ah;
677 struct ath_common *common = ath9k_hw_common(ah);
678 enum ath9k_int status;
682 * The hardware is not ready/present, don't
683 * touch anything. Note this can happen early
684 * on if the IRQ is shared.
686 if (sc->sc_flags & SC_OP_INVALID)
690 /* shared irq, not for us */
692 if (!ath9k_hw_intrpend(ah))
696 * Figure out the reason(s) for the interrupt. Note
697 * that the hal returns a pseudo-ISR that may include
698 * bits we haven't explicitly enabled so we mask the
699 * value to insure we only process bits we requested.
701 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
702 status &= ah->imask; /* discard unasked-for bits */
705 * If there are no status bits set, then this interrupt was not
706 * for me (should have been caught above).
711 /* Cache the status */
712 sc->intrstatus = status;
714 if (status & SCHED_INTR)
718 * If a FATAL or RXORN interrupt is received, we have to reset the
721 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
722 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
725 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
726 (status & ATH9K_INT_BB_WATCHDOG)) {
728 spin_lock(&common->cc_lock);
729 ath_hw_cycle_counters_update(common);
730 ar9003_hw_bb_watchdog_dbg_info(ah);
731 spin_unlock(&common->cc_lock);
736 if (status & ATH9K_INT_SWBA)
737 tasklet_schedule(&sc->bcon_tasklet);
739 if (status & ATH9K_INT_TXURN)
740 ath9k_hw_updatetxtriglevel(ah, true);
742 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
743 if (status & ATH9K_INT_RXEOL) {
744 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
745 ath9k_hw_set_interrupts(ah, ah->imask);
749 if (status & ATH9K_INT_MIB) {
751 * Disable interrupts until we service the MIB
752 * interrupt; otherwise it will continue to
755 ath9k_hw_set_interrupts(ah, 0);
757 * Let the hal handle the event. We assume
758 * it will clear whatever condition caused
761 spin_lock(&common->cc_lock);
762 ath9k_hw_proc_mib_event(ah);
763 spin_unlock(&common->cc_lock);
764 ath9k_hw_set_interrupts(ah, ah->imask);
767 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
768 if (status & ATH9K_INT_TIM_TIMER) {
769 /* Clear RxAbort bit so that we can
771 ath9k_setpower(sc, ATH9K_PM_AWAKE);
772 ath9k_hw_setrxabort(sc->sc_ah, 0);
773 sc->ps_flags |= PS_WAIT_FOR_BEACON;
778 ath_debug_stat_interrupt(sc, status);
781 /* turn off every interrupt except SWBA */
782 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
783 tasklet_schedule(&sc->intr_tq);
791 static u32 ath_get_extchanmode(struct ath_softc *sc,
792 struct ieee80211_channel *chan,
793 enum nl80211_channel_type channel_type)
797 switch (chan->band) {
798 case IEEE80211_BAND_2GHZ:
799 switch(channel_type) {
800 case NL80211_CHAN_NO_HT:
801 case NL80211_CHAN_HT20:
802 chanmode = CHANNEL_G_HT20;
804 case NL80211_CHAN_HT40PLUS:
805 chanmode = CHANNEL_G_HT40PLUS;
807 case NL80211_CHAN_HT40MINUS:
808 chanmode = CHANNEL_G_HT40MINUS;
812 case IEEE80211_BAND_5GHZ:
813 switch(channel_type) {
814 case NL80211_CHAN_NO_HT:
815 case NL80211_CHAN_HT20:
816 chanmode = CHANNEL_A_HT20;
818 case NL80211_CHAN_HT40PLUS:
819 chanmode = CHANNEL_A_HT40PLUS;
821 case NL80211_CHAN_HT40MINUS:
822 chanmode = CHANNEL_A_HT40MINUS;
833 static void ath9k_bss_assoc_info(struct ath_softc *sc,
834 struct ieee80211_vif *vif,
835 struct ieee80211_bss_conf *bss_conf)
837 struct ath_hw *ah = sc->sc_ah;
838 struct ath_common *common = ath9k_hw_common(ah);
840 if (bss_conf->assoc) {
841 ath_print(common, ATH_DBG_CONFIG,
842 "Bss Info ASSOC %d, bssid: %pM\n",
843 bss_conf->aid, common->curbssid);
845 /* New association, store aid */
846 common->curaid = bss_conf->aid;
847 ath9k_hw_write_associd(ah);
850 * Request a re-configuration of Beacon related timers
851 * on the receipt of the first Beacon frame (i.e.,
852 * after time sync with the AP).
854 sc->ps_flags |= PS_BEACON_SYNC;
856 /* Configure the beacon */
857 ath_beacon_config(sc, vif);
859 /* Reset rssi stats */
860 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
862 sc->sc_flags |= SC_OP_ANI_RUN;
863 ath_start_ani(common);
865 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
868 sc->sc_flags &= ~SC_OP_ANI_RUN;
869 del_timer_sync(&common->ani.timer);
873 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
875 struct ath_hw *ah = sc->sc_ah;
876 struct ath_common *common = ath9k_hw_common(ah);
877 struct ieee80211_channel *channel = hw->conf.channel;
881 ath9k_hw_configpcipowersave(ah, 0, 0);
884 ah->curchan = ath_get_curchannel(sc, sc->hw);
886 spin_lock_bh(&sc->rx.pcu_lock);
887 spin_lock_bh(&sc->sc_resetlock);
888 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
890 ath_print(common, ATH_DBG_FATAL,
891 "Unable to reset channel (%u MHz), "
893 channel->center_freq, r);
895 spin_unlock_bh(&sc->sc_resetlock);
897 ath_update_txpow(sc);
898 if (ath_startrecv(sc) != 0) {
899 ath_print(common, ATH_DBG_FATAL,
900 "Unable to restart recv logic\n");
901 spin_unlock_bh(&sc->rx.pcu_lock);
904 spin_unlock_bh(&sc->rx.pcu_lock);
906 if (sc->sc_flags & SC_OP_BEACONS)
907 ath_beacon_config(sc, NULL); /* restart beacons */
909 /* Re-Enable interrupts */
910 ath9k_hw_set_interrupts(ah, ah->imask);
913 ath9k_hw_cfg_output(ah, ah->led_pin,
914 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
915 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
917 ieee80211_wake_queues(hw);
918 ath9k_ps_restore(sc);
921 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
923 struct ath_hw *ah = sc->sc_ah;
924 struct ieee80211_channel *channel = hw->conf.channel;
928 ieee80211_stop_queues(hw);
931 * Keep the LED on when the radio is disabled
932 * during idle unassociated state.
935 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
936 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
939 /* Disable interrupts */
940 ath9k_hw_set_interrupts(ah, 0);
942 ath_drain_all_txq(sc, false); /* clear pending tx frames */
944 spin_lock_bh(&sc->rx.pcu_lock);
946 ath_stoprecv(sc); /* turn off frame recv */
947 ath_flushrecv(sc); /* flush recv queue */
950 ah->curchan = ath_get_curchannel(sc, hw);
952 spin_lock_bh(&sc->sc_resetlock);
953 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
955 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
956 "Unable to reset channel (%u MHz), "
958 channel->center_freq, r);
960 spin_unlock_bh(&sc->sc_resetlock);
962 ath9k_hw_phy_disable(ah);
964 spin_unlock_bh(&sc->rx.pcu_lock);
966 ath9k_hw_configpcipowersave(ah, 1, 1);
967 ath9k_ps_restore(sc);
968 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
971 int ath_reset(struct ath_softc *sc, bool retry_tx)
973 struct ath_hw *ah = sc->sc_ah;
974 struct ath_common *common = ath9k_hw_common(ah);
975 struct ieee80211_hw *hw = sc->hw;
979 del_timer_sync(&common->ani.timer);
981 ieee80211_stop_queues(hw);
983 ath9k_hw_set_interrupts(ah, 0);
984 ath_drain_all_txq(sc, retry_tx);
986 spin_lock_bh(&sc->rx.pcu_lock);
991 spin_lock_bh(&sc->sc_resetlock);
992 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
994 ath_print(common, ATH_DBG_FATAL,
995 "Unable to reset hardware; reset status %d\n", r);
996 spin_unlock_bh(&sc->sc_resetlock);
998 if (ath_startrecv(sc) != 0)
999 ath_print(common, ATH_DBG_FATAL,
1000 "Unable to start recv logic\n");
1002 spin_unlock_bh(&sc->rx.pcu_lock);
1005 * We may be doing a reset in response to a request
1006 * that changes the channel so update any state that
1007 * might change as a result.
1009 ath_update_txpow(sc);
1011 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1012 ath_beacon_config(sc, NULL); /* restart beacons */
1014 ath9k_hw_set_interrupts(ah, ah->imask);
1018 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1019 if (ATH_TXQ_SETUP(sc, i)) {
1020 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1021 ath_txq_schedule(sc, &sc->tx.txq[i]);
1022 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1027 ieee80211_wake_queues(hw);
1030 ath_start_ani(common);
1035 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1041 qnum = sc->tx.hwq_map[WME_AC_VO];
1044 qnum = sc->tx.hwq_map[WME_AC_VI];
1047 qnum = sc->tx.hwq_map[WME_AC_BE];
1050 qnum = sc->tx.hwq_map[WME_AC_BK];
1053 qnum = sc->tx.hwq_map[WME_AC_BE];
1060 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1085 /* XXX: Remove me once we don't depend on ath9k_channel for all
1086 * this redundant data */
1087 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1088 struct ath9k_channel *ichan)
1090 struct ieee80211_channel *chan = hw->conf.channel;
1091 struct ieee80211_conf *conf = &hw->conf;
1093 ichan->channel = chan->center_freq;
1096 if (chan->band == IEEE80211_BAND_2GHZ) {
1097 ichan->chanmode = CHANNEL_G;
1098 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1100 ichan->chanmode = CHANNEL_A;
1101 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1104 if (conf_is_ht(conf))
1105 ichan->chanmode = ath_get_extchanmode(sc, chan,
1106 conf->channel_type);
1109 /**********************/
1110 /* mac80211 callbacks */
1111 /**********************/
1113 static int ath9k_start(struct ieee80211_hw *hw)
1115 struct ath_wiphy *aphy = hw->priv;
1116 struct ath_softc *sc = aphy->sc;
1117 struct ath_hw *ah = sc->sc_ah;
1118 struct ath_common *common = ath9k_hw_common(ah);
1119 struct ieee80211_channel *curchan = hw->conf.channel;
1120 struct ath9k_channel *init_channel;
1123 ath_print(common, ATH_DBG_CONFIG,
1124 "Starting driver with initial channel: %d MHz\n",
1125 curchan->center_freq);
1127 mutex_lock(&sc->mutex);
1129 if (ath9k_wiphy_started(sc)) {
1130 if (sc->chan_idx == curchan->hw_value) {
1132 * Already on the operational channel, the new wiphy
1133 * can be marked active.
1135 aphy->state = ATH_WIPHY_ACTIVE;
1136 ieee80211_wake_queues(hw);
1139 * Another wiphy is on another channel, start the new
1140 * wiphy in paused state.
1142 aphy->state = ATH_WIPHY_PAUSED;
1143 ieee80211_stop_queues(hw);
1145 mutex_unlock(&sc->mutex);
1148 aphy->state = ATH_WIPHY_ACTIVE;
1150 /* setup initial channel */
1152 sc->chan_idx = curchan->hw_value;
1154 init_channel = ath_get_curchannel(sc, hw);
1156 /* Reset SERDES registers */
1157 ath9k_hw_configpcipowersave(ah, 0, 0);
1160 * The basic interface to setting the hardware in a good
1161 * state is ``reset''. On return the hardware is known to
1162 * be powered up and with interrupts disabled. This must
1163 * be followed by initialization of the appropriate bits
1164 * and then setup of the interrupt mask.
1166 spin_lock_bh(&sc->rx.pcu_lock);
1167 spin_lock_bh(&sc->sc_resetlock);
1168 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1170 ath_print(common, ATH_DBG_FATAL,
1171 "Unable to reset hardware; reset status %d "
1172 "(freq %u MHz)\n", r,
1173 curchan->center_freq);
1174 spin_unlock_bh(&sc->sc_resetlock);
1175 spin_unlock_bh(&sc->rx.pcu_lock);
1178 spin_unlock_bh(&sc->sc_resetlock);
1181 * This is needed only to setup initial state
1182 * but it's best done after a reset.
1184 ath_update_txpow(sc);
1187 * Setup the hardware after reset:
1188 * The receive engine is set going.
1189 * Frame transmit is handled entirely
1190 * in the frame output path; there's nothing to do
1191 * here except setup the interrupt mask.
1193 if (ath_startrecv(sc) != 0) {
1194 ath_print(common, ATH_DBG_FATAL,
1195 "Unable to start recv logic\n");
1197 spin_unlock_bh(&sc->rx.pcu_lock);
1200 spin_unlock_bh(&sc->rx.pcu_lock);
1202 /* Setup our intr mask. */
1203 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1204 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1207 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1208 ah->imask |= ATH9K_INT_RXHP |
1210 ATH9K_INT_BB_WATCHDOG;
1212 ah->imask |= ATH9K_INT_RX;
1214 ah->imask |= ATH9K_INT_GTT;
1216 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1217 ah->imask |= ATH9K_INT_CST;
1219 sc->sc_flags &= ~SC_OP_INVALID;
1221 /* Disable BMISS interrupt when we're not associated */
1222 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1223 ath9k_hw_set_interrupts(ah, ah->imask);
1225 ieee80211_wake_queues(hw);
1227 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1229 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1230 !ah->btcoex_hw.enabled) {
1231 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1232 AR_STOMP_LOW_WLAN_WGHT);
1233 ath9k_hw_btcoex_enable(ah);
1235 if (common->bus_ops->bt_coex_prep)
1236 common->bus_ops->bt_coex_prep(common);
1237 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1238 ath9k_btcoex_timer_resume(sc);
1242 mutex_unlock(&sc->mutex);
1247 static int ath9k_tx(struct ieee80211_hw *hw,
1248 struct sk_buff *skb)
1250 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1251 struct ath_wiphy *aphy = hw->priv;
1252 struct ath_softc *sc = aphy->sc;
1253 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1254 struct ath_tx_control txctl;
1255 int padpos, padsize;
1256 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1259 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1260 ath_print(common, ATH_DBG_XMIT,
1261 "ath9k: %s: TX in unexpected wiphy state "
1262 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1266 if (sc->ps_enabled) {
1268 * mac80211 does not set PM field for normal data frames, so we
1269 * need to update that based on the current PS mode.
1271 if (ieee80211_is_data(hdr->frame_control) &&
1272 !ieee80211_is_nullfunc(hdr->frame_control) &&
1273 !ieee80211_has_pm(hdr->frame_control)) {
1274 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1275 "while in PS mode\n");
1276 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1280 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1282 * We are using PS-Poll and mac80211 can request TX while in
1283 * power save mode. Need to wake up hardware for the TX to be
1284 * completed and if needed, also for RX of buffered frames.
1286 ath9k_ps_wakeup(sc);
1287 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1288 ath9k_hw_setrxabort(sc->sc_ah, 0);
1289 if (ieee80211_is_pspoll(hdr->frame_control)) {
1290 ath_print(common, ATH_DBG_PS,
1291 "Sending PS-Poll to pick a buffered frame\n");
1292 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1294 ath_print(common, ATH_DBG_PS,
1295 "Wake up to complete TX\n");
1296 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1299 * The actual restore operation will happen only after
1300 * the sc_flags bit is cleared. We are just dropping
1301 * the ps_usecount here.
1303 ath9k_ps_restore(sc);
1306 memset(&txctl, 0, sizeof(struct ath_tx_control));
1309 * As a temporary workaround, assign seq# here; this will likely need
1310 * to be cleaned up to work better with Beacon transmission and virtual
1313 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1314 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1315 sc->tx.seq_no += 0x10;
1316 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1317 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1320 /* Add the padding after the header if this is not already done */
1321 padpos = ath9k_cmn_padpos(hdr->frame_control);
1322 padsize = padpos & 3;
1323 if (padsize && skb->len>padpos) {
1324 if (skb_headroom(skb) < padsize)
1326 skb_push(skb, padsize);
1327 memmove(skb->data, skb->data + padsize, padpos);
1330 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1331 txctl.txq = &sc->tx.txq[qnum];
1333 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1335 if (ath_tx_start(hw, skb, &txctl) != 0) {
1336 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1342 dev_kfree_skb_any(skb);
1346 static void ath9k_stop(struct ieee80211_hw *hw)
1348 struct ath_wiphy *aphy = hw->priv;
1349 struct ath_softc *sc = aphy->sc;
1350 struct ath_hw *ah = sc->sc_ah;
1351 struct ath_common *common = ath9k_hw_common(ah);
1354 mutex_lock(&sc->mutex);
1356 aphy->state = ATH_WIPHY_INACTIVE;
1359 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1361 cancel_delayed_work_sync(&sc->tx_complete_work);
1362 cancel_work_sync(&sc->paprd_work);
1363 cancel_work_sync(&sc->hw_check_work);
1365 for (i = 0; i < sc->num_sec_wiphy; i++) {
1366 if (sc->sec_wiphy[i])
1370 if (i == sc->num_sec_wiphy) {
1371 cancel_delayed_work_sync(&sc->wiphy_work);
1372 cancel_work_sync(&sc->chan_work);
1375 if (sc->sc_flags & SC_OP_INVALID) {
1376 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1377 mutex_unlock(&sc->mutex);
1381 if (ath9k_wiphy_started(sc)) {
1382 mutex_unlock(&sc->mutex);
1383 return; /* another wiphy still in use */
1386 /* Ensure HW is awake when we try to shut it down. */
1387 ath9k_ps_wakeup(sc);
1389 if (ah->btcoex_hw.enabled) {
1390 ath9k_hw_btcoex_disable(ah);
1391 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1392 ath9k_btcoex_timer_pause(sc);
1395 /* make sure h/w will not generate any interrupt
1396 * before setting the invalid flag. */
1397 ath9k_hw_set_interrupts(ah, 0);
1399 spin_lock_bh(&sc->rx.pcu_lock);
1400 if (!(sc->sc_flags & SC_OP_INVALID)) {
1401 ath_drain_all_txq(sc, false);
1403 ath9k_hw_phy_disable(ah);
1405 sc->rx.rxlink = NULL;
1406 spin_unlock_bh(&sc->rx.pcu_lock);
1408 /* disable HAL and put h/w to sleep */
1409 ath9k_hw_disable(ah);
1410 ath9k_hw_configpcipowersave(ah, 1, 1);
1411 ath9k_ps_restore(sc);
1413 /* Finally, put the chip in FULL SLEEP mode */
1414 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1416 sc->sc_flags |= SC_OP_INVALID;
1418 mutex_unlock(&sc->mutex);
1420 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1423 static int ath9k_add_interface(struct ieee80211_hw *hw,
1424 struct ieee80211_vif *vif)
1426 struct ath_wiphy *aphy = hw->priv;
1427 struct ath_softc *sc = aphy->sc;
1428 struct ath_hw *ah = sc->sc_ah;
1429 struct ath_common *common = ath9k_hw_common(ah);
1430 struct ath_vif *avp = (void *)vif->drv_priv;
1431 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1434 mutex_lock(&sc->mutex);
1436 switch (vif->type) {
1437 case NL80211_IFTYPE_STATION:
1438 ic_opmode = NL80211_IFTYPE_STATION;
1440 case NL80211_IFTYPE_WDS:
1441 ic_opmode = NL80211_IFTYPE_WDS;
1443 case NL80211_IFTYPE_ADHOC:
1444 case NL80211_IFTYPE_AP:
1445 case NL80211_IFTYPE_MESH_POINT:
1446 if (sc->nbcnvifs >= ATH_BCBUF) {
1450 ic_opmode = vif->type;
1453 ath_print(common, ATH_DBG_FATAL,
1454 "Interface type %d not yet supported\n", vif->type);
1459 ath_print(common, ATH_DBG_CONFIG,
1460 "Attach a VIF of type: %d\n", ic_opmode);
1462 /* Set the VIF opmode */
1463 avp->av_opmode = ic_opmode;
1468 ath9k_set_bssid_mask(hw, vif);
1471 goto out; /* skip global settings for secondary vif */
1473 if (ic_opmode == NL80211_IFTYPE_AP) {
1474 ath9k_hw_set_tsfadjust(ah, 1);
1475 sc->sc_flags |= SC_OP_TSF_RESET;
1478 /* Set the device opmode */
1479 ah->opmode = ic_opmode;
1482 * Enable MIB interrupts when there are hardware phy counters.
1483 * Note we only do this (at the moment) for station mode.
1485 if ((vif->type == NL80211_IFTYPE_STATION) ||
1486 (vif->type == NL80211_IFTYPE_ADHOC) ||
1487 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1488 if (ah->config.enable_ani)
1489 ah->imask |= ATH9K_INT_MIB;
1490 ah->imask |= ATH9K_INT_TSFOOR;
1493 ath9k_hw_set_interrupts(ah, ah->imask);
1495 if (vif->type == NL80211_IFTYPE_AP ||
1496 vif->type == NL80211_IFTYPE_ADHOC ||
1497 vif->type == NL80211_IFTYPE_MONITOR) {
1498 sc->sc_flags |= SC_OP_ANI_RUN;
1499 ath_start_ani(common);
1503 mutex_unlock(&sc->mutex);
1507 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1508 struct ieee80211_vif *vif)
1510 struct ath_wiphy *aphy = hw->priv;
1511 struct ath_softc *sc = aphy->sc;
1512 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1513 struct ath_vif *avp = (void *)vif->drv_priv;
1516 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1518 mutex_lock(&sc->mutex);
1521 sc->sc_flags &= ~SC_OP_ANI_RUN;
1522 del_timer_sync(&common->ani.timer);
1524 /* Reclaim beacon resources */
1525 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1526 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1527 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1528 ath9k_ps_wakeup(sc);
1529 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1530 ath9k_ps_restore(sc);
1533 ath_beacon_return(sc, avp);
1534 sc->sc_flags &= ~SC_OP_BEACONS;
1536 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1537 if (sc->beacon.bslot[i] == vif) {
1538 printk(KERN_DEBUG "%s: vif had allocated beacon "
1539 "slot\n", __func__);
1540 sc->beacon.bslot[i] = NULL;
1541 sc->beacon.bslot_aphy[i] = NULL;
1547 mutex_unlock(&sc->mutex);
1550 static void ath9k_enable_ps(struct ath_softc *sc)
1552 struct ath_hw *ah = sc->sc_ah;
1554 sc->ps_enabled = true;
1555 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1556 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1557 ah->imask |= ATH9K_INT_TIM_TIMER;
1558 ath9k_hw_set_interrupts(ah, ah->imask);
1560 ath9k_hw_setrxabort(ah, 1);
1564 static void ath9k_disable_ps(struct ath_softc *sc)
1566 struct ath_hw *ah = sc->sc_ah;
1568 sc->ps_enabled = false;
1569 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1570 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1571 ath9k_hw_setrxabort(ah, 0);
1572 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1574 PS_WAIT_FOR_PSPOLL_DATA |
1575 PS_WAIT_FOR_TX_ACK);
1576 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1577 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1578 ath9k_hw_set_interrupts(ah, ah->imask);
1584 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1586 struct ath_wiphy *aphy = hw->priv;
1587 struct ath_softc *sc = aphy->sc;
1588 struct ath_hw *ah = sc->sc_ah;
1589 struct ath_common *common = ath9k_hw_common(ah);
1590 struct ieee80211_conf *conf = &hw->conf;
1593 mutex_lock(&sc->mutex);
1596 * Leave this as the first check because we need to turn on the
1597 * radio if it was disabled before prior to processing the rest
1598 * of the changes. Likewise we must only disable the radio towards
1601 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1603 bool all_wiphys_idle;
1604 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1606 spin_lock_bh(&sc->wiphy_lock);
1607 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1608 ath9k_set_wiphy_idle(aphy, idle);
1610 enable_radio = (!idle && all_wiphys_idle);
1613 * After we unlock here its possible another wiphy
1614 * can be re-renabled so to account for that we will
1615 * only disable the radio toward the end of this routine
1616 * if by then all wiphys are still idle.
1618 spin_unlock_bh(&sc->wiphy_lock);
1621 sc->ps_idle = false;
1622 ath_radio_enable(sc, hw);
1623 ath_print(common, ATH_DBG_CONFIG,
1624 "not-idle: enabling radio\n");
1629 * We just prepare to enable PS. We have to wait until our AP has
1630 * ACK'd our null data frame to disable RX otherwise we'll ignore
1631 * those ACKs and end up retransmitting the same null data frames.
1632 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1634 if (changed & IEEE80211_CONF_CHANGE_PS) {
1635 unsigned long flags;
1636 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1637 if (conf->flags & IEEE80211_CONF_PS)
1638 ath9k_enable_ps(sc);
1640 ath9k_disable_ps(sc);
1641 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1644 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1645 if (conf->flags & IEEE80211_CONF_MONITOR) {
1646 ath_print(common, ATH_DBG_CONFIG,
1647 "HW opmode set to Monitor mode\n");
1648 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1652 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1653 struct ieee80211_channel *curchan = hw->conf.channel;
1654 int pos = curchan->hw_value;
1656 unsigned long flags;
1659 old_pos = ah->curchan - &ah->channels[0];
1661 aphy->chan_idx = pos;
1662 aphy->chan_is_ht = conf_is_ht(conf);
1663 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1664 sc->sc_flags |= SC_OP_OFFCHANNEL;
1666 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1668 if (aphy->state == ATH_WIPHY_SCAN ||
1669 aphy->state == ATH_WIPHY_ACTIVE)
1670 ath9k_wiphy_pause_all_forced(sc, aphy);
1673 * Do not change operational channel based on a paused
1676 goto skip_chan_change;
1679 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1680 curchan->center_freq);
1682 /* XXX: remove me eventualy */
1683 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1685 ath_update_chainmask(sc, conf_is_ht(conf));
1687 /* update survey stats for the old channel before switching */
1688 spin_lock_irqsave(&common->cc_lock, flags);
1689 ath_update_survey_stats(sc);
1690 spin_unlock_irqrestore(&common->cc_lock, flags);
1693 * If the operating channel changes, change the survey in-use flags
1695 * Reset the survey data for the new channel, unless we're switching
1696 * back to the operating channel from an off-channel operation.
1698 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1699 sc->cur_survey != &sc->survey[pos]) {
1702 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1704 sc->cur_survey = &sc->survey[pos];
1706 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1707 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1708 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1709 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1712 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1713 ath_print(common, ATH_DBG_FATAL,
1714 "Unable to set channel\n");
1715 mutex_unlock(&sc->mutex);
1720 * The most recent snapshot of channel->noisefloor for the old
1721 * channel is only available after the hardware reset. Copy it to
1722 * the survey stats now.
1725 ath_update_survey_nf(sc, old_pos);
1729 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1730 sc->config.txpowlimit = 2 * conf->power_level;
1731 ath_update_txpow(sc);
1734 spin_lock_bh(&sc->wiphy_lock);
1735 disable_radio = ath9k_all_wiphys_idle(sc);
1736 spin_unlock_bh(&sc->wiphy_lock);
1738 if (disable_radio) {
1739 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1741 ath_radio_disable(sc, hw);
1744 mutex_unlock(&sc->mutex);
1749 #define SUPPORTED_FILTERS \
1750 (FIF_PROMISC_IN_BSS | \
1755 FIF_BCN_PRBRESP_PROMISC | \
1759 /* FIXME: sc->sc_full_reset ? */
1760 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1761 unsigned int changed_flags,
1762 unsigned int *total_flags,
1765 struct ath_wiphy *aphy = hw->priv;
1766 struct ath_softc *sc = aphy->sc;
1769 changed_flags &= SUPPORTED_FILTERS;
1770 *total_flags &= SUPPORTED_FILTERS;
1772 sc->rx.rxfilter = *total_flags;
1773 ath9k_ps_wakeup(sc);
1774 rfilt = ath_calcrxfilter(sc);
1775 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1776 ath9k_ps_restore(sc);
1778 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1779 "Set HW RX filter: 0x%x\n", rfilt);
1782 static int ath9k_sta_add(struct ieee80211_hw *hw,
1783 struct ieee80211_vif *vif,
1784 struct ieee80211_sta *sta)
1786 struct ath_wiphy *aphy = hw->priv;
1787 struct ath_softc *sc = aphy->sc;
1789 ath_node_attach(sc, sta);
1794 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1795 struct ieee80211_vif *vif,
1796 struct ieee80211_sta *sta)
1798 struct ath_wiphy *aphy = hw->priv;
1799 struct ath_softc *sc = aphy->sc;
1801 ath_node_detach(sc, sta);
1806 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1807 const struct ieee80211_tx_queue_params *params)
1809 struct ath_wiphy *aphy = hw->priv;
1810 struct ath_softc *sc = aphy->sc;
1811 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1812 struct ath9k_tx_queue_info qi;
1815 if (queue >= WME_NUM_AC)
1818 mutex_lock(&sc->mutex);
1820 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1822 qi.tqi_aifs = params->aifs;
1823 qi.tqi_cwmin = params->cw_min;
1824 qi.tqi_cwmax = params->cw_max;
1825 qi.tqi_burstTime = params->txop;
1826 qnum = ath_get_hal_qnum(queue, sc);
1828 ath_print(common, ATH_DBG_CONFIG,
1829 "Configure tx [queue/halq] [%d/%d], "
1830 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1831 queue, qnum, params->aifs, params->cw_min,
1832 params->cw_max, params->txop);
1834 ret = ath_txq_update(sc, qnum, &qi);
1836 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1838 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1839 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1840 ath_beaconq_config(sc);
1842 mutex_unlock(&sc->mutex);
1847 static int ath9k_set_key(struct ieee80211_hw *hw,
1848 enum set_key_cmd cmd,
1849 struct ieee80211_vif *vif,
1850 struct ieee80211_sta *sta,
1851 struct ieee80211_key_conf *key)
1853 struct ath_wiphy *aphy = hw->priv;
1854 struct ath_softc *sc = aphy->sc;
1855 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1858 if (modparam_nohwcrypt)
1861 mutex_lock(&sc->mutex);
1862 ath9k_ps_wakeup(sc);
1863 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1867 ret = ath_key_config(common, vif, sta, key);
1869 key->hw_key_idx = ret;
1870 /* push IV and Michael MIC generation to stack */
1871 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1872 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1873 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1874 if (sc->sc_ah->sw_mgmt_crypto &&
1875 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1876 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1881 ath_key_delete(common, key);
1887 ath9k_ps_restore(sc);
1888 mutex_unlock(&sc->mutex);
1893 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1894 struct ieee80211_vif *vif,
1895 struct ieee80211_bss_conf *bss_conf,
1898 struct ath_wiphy *aphy = hw->priv;
1899 struct ath_softc *sc = aphy->sc;
1900 struct ath_hw *ah = sc->sc_ah;
1901 struct ath_common *common = ath9k_hw_common(ah);
1902 struct ath_vif *avp = (void *)vif->drv_priv;
1906 mutex_lock(&sc->mutex);
1908 if (changed & BSS_CHANGED_BSSID) {
1910 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1911 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1913 ath9k_hw_write_associd(ah);
1915 /* Set aggregation protection mode parameters */
1916 sc->config.ath_aggr_prot = 0;
1918 /* Only legacy IBSS for now */
1919 if (vif->type == NL80211_IFTYPE_ADHOC)
1920 ath_update_chainmask(sc, 0);
1922 ath_print(common, ATH_DBG_CONFIG,
1923 "BSSID: %pM aid: 0x%x\n",
1924 common->curbssid, common->curaid);
1926 /* need to reconfigure the beacon */
1927 sc->sc_flags &= ~SC_OP_BEACONS ;
1930 /* Enable transmission of beacons (AP, IBSS, MESH) */
1931 if ((changed & BSS_CHANGED_BEACON) ||
1932 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1933 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1934 error = ath_beacon_alloc(aphy, vif);
1936 ath_beacon_config(sc, vif);
1939 if (changed & BSS_CHANGED_ERP_SLOT) {
1940 if (bss_conf->use_short_slot)
1944 if (vif->type == NL80211_IFTYPE_AP) {
1946 * Defer update, so that connected stations can adjust
1947 * their settings at the same time.
1948 * See beacon.c for more details
1950 sc->beacon.slottime = slottime;
1951 sc->beacon.updateslot = UPDATE;
1953 ah->slottime = slottime;
1954 ath9k_hw_init_global_settings(ah);
1958 /* Disable transmission of beacons */
1959 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1960 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1962 if (changed & BSS_CHANGED_BEACON_INT) {
1963 sc->beacon_interval = bss_conf->beacon_int;
1965 * In case of AP mode, the HW TSF has to be reset
1966 * when the beacon interval changes.
1968 if (vif->type == NL80211_IFTYPE_AP) {
1969 sc->sc_flags |= SC_OP_TSF_RESET;
1970 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1971 error = ath_beacon_alloc(aphy, vif);
1973 ath_beacon_config(sc, vif);
1975 ath_beacon_config(sc, vif);
1979 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1980 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1981 bss_conf->use_short_preamble);
1982 if (bss_conf->use_short_preamble)
1983 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1985 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1988 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1989 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1990 bss_conf->use_cts_prot);
1991 if (bss_conf->use_cts_prot &&
1992 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1993 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1995 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1998 if (changed & BSS_CHANGED_ASSOC) {
1999 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2001 ath9k_bss_assoc_info(sc, vif, bss_conf);
2004 mutex_unlock(&sc->mutex);
2007 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2010 struct ath_wiphy *aphy = hw->priv;
2011 struct ath_softc *sc = aphy->sc;
2013 mutex_lock(&sc->mutex);
2014 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2015 mutex_unlock(&sc->mutex);
2020 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2022 struct ath_wiphy *aphy = hw->priv;
2023 struct ath_softc *sc = aphy->sc;
2025 mutex_lock(&sc->mutex);
2026 ath9k_hw_settsf64(sc->sc_ah, tsf);
2027 mutex_unlock(&sc->mutex);
2030 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2032 struct ath_wiphy *aphy = hw->priv;
2033 struct ath_softc *sc = aphy->sc;
2035 mutex_lock(&sc->mutex);
2037 ath9k_ps_wakeup(sc);
2038 ath9k_hw_reset_tsf(sc->sc_ah);
2039 ath9k_ps_restore(sc);
2041 mutex_unlock(&sc->mutex);
2044 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2045 struct ieee80211_vif *vif,
2046 enum ieee80211_ampdu_mlme_action action,
2047 struct ieee80211_sta *sta,
2050 struct ath_wiphy *aphy = hw->priv;
2051 struct ath_softc *sc = aphy->sc;
2057 case IEEE80211_AMPDU_RX_START:
2058 if (!(sc->sc_flags & SC_OP_RXAGGR))
2061 case IEEE80211_AMPDU_RX_STOP:
2063 case IEEE80211_AMPDU_TX_START:
2064 ath9k_ps_wakeup(sc);
2065 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2067 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2068 ath9k_ps_restore(sc);
2070 case IEEE80211_AMPDU_TX_STOP:
2071 ath9k_ps_wakeup(sc);
2072 ath_tx_aggr_stop(sc, sta, tid);
2073 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2074 ath9k_ps_restore(sc);
2076 case IEEE80211_AMPDU_TX_OPERATIONAL:
2077 ath9k_ps_wakeup(sc);
2078 ath_tx_aggr_resume(sc, sta, tid);
2079 ath9k_ps_restore(sc);
2082 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2083 "Unknown AMPDU action\n");
2091 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2092 struct survey_info *survey)
2094 struct ath_wiphy *aphy = hw->priv;
2095 struct ath_softc *sc = aphy->sc;
2096 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2097 struct ieee80211_supported_band *sband;
2098 struct ieee80211_channel *chan;
2099 unsigned long flags;
2102 spin_lock_irqsave(&common->cc_lock, flags);
2104 ath_update_survey_stats(sc);
2106 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2107 if (sband && idx >= sband->n_channels) {
2108 idx -= sband->n_channels;
2113 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2115 if (!sband || idx >= sband->n_channels) {
2116 spin_unlock_irqrestore(&common->cc_lock, flags);
2120 chan = &sband->channels[idx];
2121 pos = chan->hw_value;
2122 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2123 survey->channel = chan;
2124 spin_unlock_irqrestore(&common->cc_lock, flags);
2129 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2131 struct ath_wiphy *aphy = hw->priv;
2132 struct ath_softc *sc = aphy->sc;
2134 mutex_lock(&sc->mutex);
2135 if (ath9k_wiphy_scanning(sc)) {
2137 * There is a race here in mac80211 but fixing it requires
2138 * we revisit how we handle the scan complete callback.
2139 * After mac80211 fixes we will not have configured hardware
2140 * to the home channel nor would we have configured the RX
2143 mutex_unlock(&sc->mutex);
2147 aphy->state = ATH_WIPHY_SCAN;
2148 ath9k_wiphy_pause_all_forced(sc, aphy);
2149 mutex_unlock(&sc->mutex);
2153 * XXX: this requires a revisit after the driver
2154 * scan_complete gets moved to another place/removed in mac80211.
2156 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2158 struct ath_wiphy *aphy = hw->priv;
2159 struct ath_softc *sc = aphy->sc;
2161 mutex_lock(&sc->mutex);
2162 aphy->state = ATH_WIPHY_ACTIVE;
2163 mutex_unlock(&sc->mutex);
2166 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2168 struct ath_wiphy *aphy = hw->priv;
2169 struct ath_softc *sc = aphy->sc;
2170 struct ath_hw *ah = sc->sc_ah;
2172 mutex_lock(&sc->mutex);
2173 ah->coverage_class = coverage_class;
2174 ath9k_hw_init_global_settings(ah);
2175 mutex_unlock(&sc->mutex);
2178 struct ieee80211_ops ath9k_ops = {
2180 .start = ath9k_start,
2182 .add_interface = ath9k_add_interface,
2183 .remove_interface = ath9k_remove_interface,
2184 .config = ath9k_config,
2185 .configure_filter = ath9k_configure_filter,
2186 .sta_add = ath9k_sta_add,
2187 .sta_remove = ath9k_sta_remove,
2188 .conf_tx = ath9k_conf_tx,
2189 .bss_info_changed = ath9k_bss_info_changed,
2190 .set_key = ath9k_set_key,
2191 .get_tsf = ath9k_get_tsf,
2192 .set_tsf = ath9k_set_tsf,
2193 .reset_tsf = ath9k_reset_tsf,
2194 .ampdu_action = ath9k_ampdu_action,
2195 .get_survey = ath9k_get_survey,
2196 .sw_scan_start = ath9k_sw_scan_start,
2197 .sw_scan_complete = ath9k_sw_scan_complete,
2198 .rfkill_poll = ath9k_rfkill_poll_state,
2199 .set_coverage_class = ath9k_set_coverage_class,