2 * Copyright (c) 2010 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 MODULE_AUTHOR("Atheros Communications");
20 MODULE_LICENSE("Dual BSD/GPL");
21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
24 module_param_named(debug, ath9k_debug, uint, 0);
25 MODULE_PARM_DESC(debug, "Debugging mask");
27 int htc_modparam_nohwcrypt;
28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
31 #define CHAN2G(_freq, _idx) { \
32 .center_freq = (_freq), \
37 #define CHAN5G(_freq, _idx) { \
38 .band = IEEE80211_BAND_5GHZ, \
39 .center_freq = (_freq), \
44 #define ATH_HTC_BTCOEX_PRODUCT_ID "wb193"
46 static struct ieee80211_channel ath9k_2ghz_channels[] = {
47 CHAN2G(2412, 0), /* Channel 1 */
48 CHAN2G(2417, 1), /* Channel 2 */
49 CHAN2G(2422, 2), /* Channel 3 */
50 CHAN2G(2427, 3), /* Channel 4 */
51 CHAN2G(2432, 4), /* Channel 5 */
52 CHAN2G(2437, 5), /* Channel 6 */
53 CHAN2G(2442, 6), /* Channel 7 */
54 CHAN2G(2447, 7), /* Channel 8 */
55 CHAN2G(2452, 8), /* Channel 9 */
56 CHAN2G(2457, 9), /* Channel 10 */
57 CHAN2G(2462, 10), /* Channel 11 */
58 CHAN2G(2467, 11), /* Channel 12 */
59 CHAN2G(2472, 12), /* Channel 13 */
60 CHAN2G(2484, 13), /* Channel 14 */
63 static struct ieee80211_channel ath9k_5ghz_channels[] = {
64 /* _We_ call this UNII 1 */
65 CHAN5G(5180, 14), /* Channel 36 */
66 CHAN5G(5200, 15), /* Channel 40 */
67 CHAN5G(5220, 16), /* Channel 44 */
68 CHAN5G(5240, 17), /* Channel 48 */
69 /* _We_ call this UNII 2 */
70 CHAN5G(5260, 18), /* Channel 52 */
71 CHAN5G(5280, 19), /* Channel 56 */
72 CHAN5G(5300, 20), /* Channel 60 */
73 CHAN5G(5320, 21), /* Channel 64 */
74 /* _We_ call this "Middle band" */
75 CHAN5G(5500, 22), /* Channel 100 */
76 CHAN5G(5520, 23), /* Channel 104 */
77 CHAN5G(5540, 24), /* Channel 108 */
78 CHAN5G(5560, 25), /* Channel 112 */
79 CHAN5G(5580, 26), /* Channel 116 */
80 CHAN5G(5600, 27), /* Channel 120 */
81 CHAN5G(5620, 28), /* Channel 124 */
82 CHAN5G(5640, 29), /* Channel 128 */
83 CHAN5G(5660, 30), /* Channel 132 */
84 CHAN5G(5680, 31), /* Channel 136 */
85 CHAN5G(5700, 32), /* Channel 140 */
86 /* _We_ call this UNII 3 */
87 CHAN5G(5745, 33), /* Channel 149 */
88 CHAN5G(5765, 34), /* Channel 153 */
89 CHAN5G(5785, 35), /* Channel 157 */
90 CHAN5G(5805, 36), /* Channel 161 */
91 CHAN5G(5825, 37), /* Channel 165 */
94 /* Atheros hardware rate code addition for short premble */
95 #define SHPCHECK(__hw_rate, __flags) \
96 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
98 #define RATE(_bitrate, _hw_rate, _flags) { \
99 .bitrate = (_bitrate), \
101 .hw_value = (_hw_rate), \
102 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
105 static struct ieee80211_rate ath9k_legacy_rates[] = {
107 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
108 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
109 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
120 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
124 if (atomic_read(&priv->htc->tgt_ready) > 0) {
125 atomic_dec(&priv->htc->tgt_ready);
129 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
130 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
132 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
136 atomic_dec(&priv->htc->tgt_ready);
141 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
143 ath9k_htc_exit_debug(priv->ah);
144 ath9k_hw_deinit(priv->ah);
145 tasklet_kill(&priv->wmi_tasklet);
146 tasklet_kill(&priv->rx_tasklet);
147 tasklet_kill(&priv->tx_tasklet);
152 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
154 struct ieee80211_hw *hw = priv->hw;
156 wiphy_rfkill_stop_polling(hw->wiphy);
157 ath9k_deinit_leds(priv);
158 ieee80211_unregister_hw(hw);
159 ath9k_rx_cleanup(priv);
160 ath9k_tx_cleanup(priv);
161 ath9k_deinit_priv(priv);
164 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
168 enum htc_endpoint_id,
170 enum htc_endpoint_id *ep_id)
172 struct htc_service_connreq req;
174 memset(&req, 0, sizeof(struct htc_service_connreq));
176 req.service_id = service_id;
177 req.ep_callbacks.priv = priv;
178 req.ep_callbacks.rx = ath9k_htc_rxep;
179 req.ep_callbacks.tx = tx;
181 return htc_connect_service(priv->htc, &req, ep_id);
184 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
190 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
195 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
201 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
208 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
214 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
220 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
226 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
232 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
238 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
244 * Setup required credits before initializing HTC.
245 * This is a bit hacky, but, since queuing is done in
246 * the HIF layer, shouldn't matter much.
249 if (IS_AR7010_DEVICE(drv_info))
250 priv->htc->credits = 45;
252 priv->htc->credits = 33;
254 ret = htc_init(priv->htc);
258 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
264 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
268 static int ath9k_reg_notifier(struct wiphy *wiphy,
269 struct regulatory_request *request)
271 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
272 struct ath9k_htc_priv *priv = hw->priv;
274 return ath_reg_notifier_apply(wiphy, request,
275 ath9k_hw_regulatory(priv->ah));
278 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
280 struct ath_hw *ah = (struct ath_hw *) hw_priv;
281 struct ath_common *common = ath9k_hw_common(ah);
282 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
283 __be32 val, reg = cpu_to_be32(reg_offset);
286 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
287 (u8 *) ®, sizeof(reg),
288 (u8 *) &val, sizeof(val),
291 ath_dbg(common, ATH_DBG_WMI,
292 "REGISTER READ FAILED: (0x%04x, %d)\n",
297 return be32_to_cpu(val);
300 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
302 struct ath_hw *ah = (struct ath_hw *) hw_priv;
303 struct ath_common *common = ath9k_hw_common(ah);
304 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
305 const __be32 buf[2] = {
306 cpu_to_be32(reg_offset),
311 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
312 (u8 *) &buf, sizeof(buf),
313 (u8 *) &val, sizeof(val),
316 ath_dbg(common, ATH_DBG_WMI,
317 "REGISTER WRITE FAILED:(0x%04x, %d)\n",
322 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
324 struct ath_hw *ah = (struct ath_hw *) hw_priv;
325 struct ath_common *common = ath9k_hw_common(ah);
326 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
330 mutex_lock(&priv->wmi->multi_write_mutex);
332 /* Store the register/value */
333 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
334 cpu_to_be32(reg_offset);
335 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
338 priv->wmi->multi_write_idx++;
340 /* If the buffer is full, send it out. */
341 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
342 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
343 (u8 *) &priv->wmi->multi_write,
344 sizeof(struct register_write) * priv->wmi->multi_write_idx,
345 (u8 *) &rsp_status, sizeof(rsp_status),
348 ath_dbg(common, ATH_DBG_WMI,
349 "REGISTER WRITE FAILED, multi len: %d\n",
350 priv->wmi->multi_write_idx);
352 priv->wmi->multi_write_idx = 0;
355 mutex_unlock(&priv->wmi->multi_write_mutex);
358 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
360 struct ath_hw *ah = (struct ath_hw *) hw_priv;
361 struct ath_common *common = ath9k_hw_common(ah);
362 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
364 if (atomic_read(&priv->wmi->mwrite_cnt))
365 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
367 ath9k_regwrite_single(hw_priv, val, reg_offset);
370 static void ath9k_enable_regwrite_buffer(void *hw_priv)
372 struct ath_hw *ah = (struct ath_hw *) hw_priv;
373 struct ath_common *common = ath9k_hw_common(ah);
374 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
376 atomic_inc(&priv->wmi->mwrite_cnt);
379 static void ath9k_regwrite_flush(void *hw_priv)
381 struct ath_hw *ah = (struct ath_hw *) hw_priv;
382 struct ath_common *common = ath9k_hw_common(ah);
383 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
387 atomic_dec(&priv->wmi->mwrite_cnt);
389 mutex_lock(&priv->wmi->multi_write_mutex);
391 if (priv->wmi->multi_write_idx) {
392 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
393 (u8 *) &priv->wmi->multi_write,
394 sizeof(struct register_write) * priv->wmi->multi_write_idx,
395 (u8 *) &rsp_status, sizeof(rsp_status),
398 ath_dbg(common, ATH_DBG_WMI,
399 "REGISTER WRITE FAILED, multi len: %d\n",
400 priv->wmi->multi_write_idx);
402 priv->wmi->multi_write_idx = 0;
405 mutex_unlock(&priv->wmi->multi_write_mutex);
408 static const struct ath_ops ath9k_common_ops = {
409 .read = ath9k_regread,
410 .write = ath9k_regwrite,
411 .enable_write_buffer = ath9k_enable_regwrite_buffer,
412 .write_flush = ath9k_regwrite_flush,
415 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
417 *csz = L1_CACHE_BYTES >> 2;
420 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
422 struct ath_hw *ah = (struct ath_hw *) common->ah;
424 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
426 if (!ath9k_hw_wait(ah,
427 AR_EEPROM_STATUS_DATA,
428 AR_EEPROM_STATUS_DATA_BUSY |
429 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
433 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
434 AR_EEPROM_STATUS_DATA_VAL);
439 static const struct ath_bus_ops ath9k_usb_bus_ops = {
440 .ath_bus_type = ATH_USB,
441 .read_cachesize = ath_usb_read_cachesize,
442 .eeprom_read = ath_usb_eeprom_read,
445 static void setup_ht_cap(struct ath9k_htc_priv *priv,
446 struct ieee80211_sta_ht_cap *ht_info)
448 struct ath_common *common = ath9k_hw_common(priv->ah);
449 u8 tx_streams, rx_streams;
452 ht_info->ht_supported = true;
453 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
454 IEEE80211_HT_CAP_SM_PS |
455 IEEE80211_HT_CAP_SGI_40 |
456 IEEE80211_HT_CAP_DSSSCCK40;
458 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
459 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
461 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
463 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
464 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
466 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
468 /* ath9k_htc supports only 1 or 2 stream devices */
469 tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
470 rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
472 ath_dbg(common, ATH_DBG_CONFIG,
473 "TX streams %d, RX streams: %d\n",
474 tx_streams, rx_streams);
476 if (tx_streams != rx_streams) {
477 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
478 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
479 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
482 for (i = 0; i < rx_streams; i++)
483 ht_info->mcs.rx_mask[i] = 0xff;
485 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
488 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
490 struct ath_common *common = ath9k_hw_common(priv->ah);
493 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
494 priv->hwq_map[i] = -1;
496 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
497 if (priv->beaconq == -1) {
498 ath_err(common, "Unable to setup BEACON xmit queue\n");
502 priv->cabq = ath9k_htc_cabq_setup(priv);
503 if (priv->cabq == -1) {
504 ath_err(common, "Unable to setup CAB xmit queue\n");
508 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
509 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
513 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
514 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
517 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
518 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
521 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
522 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
532 static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
534 struct ath_common *common = ath9k_hw_common(priv->ah);
537 /* Get the hardware key cache size. */
538 common->keymax = priv->ah->caps.keycache_size;
539 if (common->keymax > ATH_KEYMAX) {
540 ath_dbg(common, ATH_DBG_ANY,
541 "Warning, using only %u entries in %u key cache\n",
542 ATH_KEYMAX, common->keymax);
543 common->keymax = ATH_KEYMAX;
546 if (priv->ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
547 common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
550 * Reset the key cache since some parts do not
551 * reset the contents on initial power up.
553 for (i = 0; i < common->keymax; i++)
554 ath_hw_keyreset(common, (u16) i);
557 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
559 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
560 priv->sbands[IEEE80211_BAND_2GHZ].channels =
562 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
563 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
564 ARRAY_SIZE(ath9k_2ghz_channels);
565 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
566 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
567 ARRAY_SIZE(ath9k_legacy_rates);
570 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
571 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
572 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
573 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
574 ARRAY_SIZE(ath9k_5ghz_channels);
575 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
576 ath9k_legacy_rates + 4;
577 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
578 ARRAY_SIZE(ath9k_legacy_rates) - 4;
582 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
584 struct ath_common *common = ath9k_hw_common(priv->ah);
586 common->tx_chainmask = priv->ah->caps.tx_chainmask;
587 common->rx_chainmask = priv->ah->caps.rx_chainmask;
589 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
591 priv->ah->opmode = NL80211_IFTYPE_STATION;
594 static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
598 switch (priv->ah->btcoex_hw.scheme) {
599 case ATH_BTCOEX_CFG_NONE:
601 case ATH_BTCOEX_CFG_3WIRE:
602 priv->ah->btcoex_hw.btactive_gpio = 7;
603 priv->ah->btcoex_hw.btpriority_gpio = 6;
604 priv->ah->btcoex_hw.wlanactive_gpio = 8;
605 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
606 ath9k_hw_btcoex_init_3wire(priv->ah);
607 ath_htc_init_btcoex_work(priv);
608 qnum = priv->hwq_map[WME_AC_BE];
609 ath9k_hw_init_btcoex_hw(priv->ah, qnum);
617 static int ath9k_init_priv(struct ath9k_htc_priv *priv,
618 u16 devid, char *product,
621 struct ath_hw *ah = NULL;
622 struct ath_common *common;
623 int ret = 0, csz = 0;
625 priv->op_flags |= OP_INVALID;
627 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
631 ah->hw_version.devid = devid;
632 ah->hw_version.subsysid = 0; /* FIXME */
633 ah->hw_version.usbdev = drv_info;
634 ah->ah_flags |= AH_USE_EEPROM;
637 common = ath9k_hw_common(ah);
638 common->ops = &ath9k_common_ops;
639 common->bus_ops = &ath9k_usb_bus_ops;
641 common->hw = priv->hw;
643 common->debug_mask = ath9k_debug;
645 spin_lock_init(&priv->wmi->wmi_lock);
646 spin_lock_init(&priv->beacon_lock);
647 spin_lock_init(&priv->tx_lock);
648 mutex_init(&priv->mutex);
649 mutex_init(&priv->htc_pm_lock);
650 tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
651 (unsigned long)priv);
652 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
653 (unsigned long)priv);
654 tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
655 INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
656 INIT_WORK(&priv->ps_work, ath9k_ps_work);
659 * Cache line size is used to size and align various
660 * structures used to communicate with the hardware.
662 ath_read_cachesize(common, &csz);
663 common->cachelsz = csz << 2; /* convert to bytes */
665 ret = ath9k_hw_init(ah);
668 "Unable to initialize hardware; initialization status: %d\n",
673 ret = ath9k_htc_init_debug(ah);
675 ath_err(common, "Unable to create debugfs files\n");
679 ret = ath9k_init_queues(priv);
683 ath9k_init_crypto(priv);
684 ath9k_init_channels_rates(priv);
685 ath9k_init_misc(priv);
687 if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) {
688 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE;
689 ath9k_init_btcoex(priv);
695 ath9k_htc_exit_debug(ah);
706 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
707 struct ieee80211_hw *hw)
709 struct ath_common *common = ath9k_hw_common(priv->ah);
711 hw->flags = IEEE80211_HW_SIGNAL_DBM |
712 IEEE80211_HW_AMPDU_AGGREGATION |
713 IEEE80211_HW_SPECTRUM_MGMT |
714 IEEE80211_HW_HAS_RATE_CONTROL |
715 IEEE80211_HW_RX_INCLUDES_FCS |
716 IEEE80211_HW_SUPPORTS_PS |
717 IEEE80211_HW_PS_NULLFUNC_STACK |
718 IEEE80211_HW_NEED_DTIM_PERIOD;
720 hw->wiphy->interface_modes =
721 BIT(NL80211_IFTYPE_STATION) |
722 BIT(NL80211_IFTYPE_ADHOC);
724 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
727 hw->channel_change_time = 5000;
728 hw->max_listen_interval = 10;
729 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
730 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
732 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
733 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
734 sizeof(struct htc_frame_hdr) + 4;
736 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
737 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
738 &priv->sbands[IEEE80211_BAND_2GHZ];
739 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
740 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
741 &priv->sbands[IEEE80211_BAND_5GHZ];
743 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
744 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
746 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
747 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
749 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
752 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
755 static int ath9k_init_device(struct ath9k_htc_priv *priv,
756 u16 devid, char *product, u32 drv_info)
758 struct ieee80211_hw *hw = priv->hw;
759 struct ath_common *common;
762 struct ath_regulatory *reg;
764 /* Bring up device */
765 error = ath9k_init_priv(priv, devid, product, drv_info);
770 common = ath9k_hw_common(ah);
771 ath9k_set_hw_capab(priv, hw);
773 /* Initialize regulatory */
774 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
779 reg = &common->regulatory;
782 error = ath9k_tx_init(priv);
787 error = ath9k_rx_init(priv);
791 /* Register with mac80211 */
792 error = ieee80211_register_hw(hw);
796 /* Handle world regulatory */
797 if (!ath_is_world_regd(reg)) {
798 error = regulatory_hint(hw->wiphy, reg->alpha2);
803 ath9k_init_leds(priv);
804 ath9k_start_rfkill_poll(priv);
809 ieee80211_unregister_hw(hw);
811 ath9k_rx_cleanup(priv);
813 ath9k_tx_cleanup(priv);
817 ath9k_deinit_priv(priv);
822 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
823 u16 devid, char *product, u32 drv_info)
825 struct ieee80211_hw *hw;
826 struct ath9k_htc_priv *priv;
829 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
835 priv->htc = htc_handle;
837 htc_handle->drv_priv = priv;
838 SET_IEEE80211_DEV(hw, priv->dev);
840 ret = ath9k_htc_wait_for_target(priv);
844 priv->wmi = ath9k_init_wmi(priv);
850 ret = ath9k_init_htc_services(priv, devid, drv_info);
854 /* The device may have been unplugged earlier. */
855 priv->op_flags &= ~OP_UNPLUGGED;
857 ret = ath9k_init_device(priv, devid, product, drv_info);
864 ath9k_deinit_wmi(priv);
866 ieee80211_free_hw(hw);
870 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
872 if (htc_handle->drv_priv) {
874 /* Check if the device has been yanked out. */
876 htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
878 ath9k_deinit_device(htc_handle->drv_priv);
879 ath9k_deinit_wmi(htc_handle->drv_priv);
880 ieee80211_free_hw(htc_handle->drv_priv->hw);
886 void ath9k_htc_suspend(struct htc_target *htc_handle)
888 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
891 int ath9k_htc_resume(struct htc_target *htc_handle)
893 struct ath9k_htc_priv *priv = htc_handle->drv_priv;
896 ret = ath9k_htc_wait_for_target(priv);
900 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
901 priv->ah->hw_version.usbdev);
906 static int __init ath9k_htc_init(void)
910 error = ath9k_htc_debug_create_root();
913 "ath9k_htc: Unable to create debugfs root: %d\n",
918 error = ath9k_hif_usb_init();
921 "ath9k_htc: No USB devices found,"
922 " driver not installed.\n");
930 ath9k_htc_debug_remove_root();
934 module_init(ath9k_htc_init);
936 static void __exit ath9k_htc_exit(void)
938 ath9k_hif_usb_exit();
939 ath9k_htc_debug_remove_root();
940 printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
942 module_exit(ath9k_htc_exit);