drivers/net/wireless/ath/ath9k/btcoex.c

   1 /*
   2  * Copyright (c) 2009-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/export.h>
  18 #include "hw.h"
  19
  20 enum ath_bt_mode {
  21         ATH_BT_COEX_MODE_LEGACY,        /* legacy rx_clear mode */
  22         ATH_BT_COEX_MODE_UNSLOTTED,     /* untimed/unslotted mode */
  23         ATH_BT_COEX_MODE_SLOTTED,       /* slotted mode */
  24         ATH_BT_COEX_MODE_DISABLED,      /* coexistence disabled */
  25 };
  26
  27 struct ath_btcoex_config {
  28         u8 bt_time_extend;
  29         bool bt_txstate_extend;
  30         bool bt_txframe_extend;
  31         enum ath_bt_mode bt_mode; /* coexistence mode */
  32         bool bt_quiet_collision;
  33         bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
  34         u8 bt_priority_time;
  35         u8 bt_first_slot_time;
  36         bool bt_hold_rx_clear;
  37 };
  38
  39 static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
  40                                     [AR9300_NUM_WLAN_WEIGHTS] = {
  41         { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
  42         { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
  43         { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
  44 };
  45
  46 static const u32 ar9462_wlan_weights[ATH_BTCOEX_STOMP_MAX]
  47                                     [AR9300_NUM_WLAN_WEIGHTS] = {
  48         { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
  49         { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
  50         { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
  51         { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
  52 };
  53
  54 void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
  55 {
  56         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  57         const struct ath_btcoex_config ath_bt_config = {
  58                 .bt_time_extend = 0,
  59                 .bt_txstate_extend = true,
  60                 .bt_txframe_extend = true,
  61                 .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
  62                 .bt_quiet_collision = true,
  63                 .bt_rxclear_polarity = true,
  64                 .bt_priority_time = 2,
  65                 .bt_first_slot_time = 5,
  66                 .bt_hold_rx_clear = true,
  67         };
  68         u32 i, idx;
  69         bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
  70
  71         if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
  72                 return;
  73
  74         if (AR_SREV_9300_20_OR_LATER(ah))
  75                 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
  76
  77         btcoex_hw->bt_coex_mode =
  78                 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
  79                 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
  80                 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
  81                 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
  82                 SM(ath_bt_config.bt_mode, AR_BT_MODE) |
  83                 SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
  84                 SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
  85                 SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
  86                 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
  87                 SM(qnum, AR_BT_QCU_THRESH);
  88
  89         btcoex_hw->bt_coex_mode2 =
  90                 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
  91                 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
  92                 AR_BT_DISABLE_BT_ANT;
  93
  94         for (i = 0; i < 32; i++) {
  95                 idx = (debruijn32 << i) >> 27;
  96                 ah->hw_gen_timers.gen_timer_index[idx] = i;
  97         }
  98 }
  99 EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
 100
 101 void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
 102 {
 103         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 104
 105         if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
 106                 return;
 107
 108         /* connect bt_active to baseband */
 109         REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
 110                     (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
 111                      AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
 112
 113         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
 114                     AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
 115
 116         /* Set input mux for bt_active to gpio pin */
 117         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
 118                       AR_GPIO_INPUT_MUX1_BT_ACTIVE,
 119                       btcoex_hw->btactive_gpio);
 120
 121         /* Configure the desired gpio port for input */
 122         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
 123 }
 124 EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
 125
 126 void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
 127 {
 128         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 129
 130         if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
 131                 return;
 132
 133         /* btcoex 3-wire */
 134         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
 135                         (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
 136                          AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
 137
 138         /* Set input mux for bt_prority_async and
 139          *                  bt_active_async to GPIO pins */
 140         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
 141                         AR_GPIO_INPUT_MUX1_BT_ACTIVE,
 142                         btcoex_hw->btactive_gpio);
 143
 144         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
 145                         AR_GPIO_INPUT_MUX1_BT_PRIORITY,
 146                         btcoex_hw->btpriority_gpio);
 147
 148         /* Configure the desired GPIO ports for input */
 149
 150         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
 151         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
 152 }
 153 EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
 154
 155 void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
 156 {
 157         ah->btcoex_hw.mci.ready = false;
 158         ah->btcoex_hw.mci.bt_state = 0;
 159         ah->btcoex_hw.mci.bt_ver_major = 3;
 160         ah->btcoex_hw.mci.bt_ver_minor = 0;
 161         ah->btcoex_hw.mci.bt_version_known = false;
 162         ah->btcoex_hw.mci.update_2g5g = true;
 163         ah->btcoex_hw.mci.is_2g = true;
 164         ah->btcoex_hw.mci.wlan_channels_update = false;
 165         ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
 166         ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
 167         ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
 168         ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
 169         ah->btcoex_hw.mci.query_bt = true;
 170         ah->btcoex_hw.mci.unhalt_bt_gpm = true;
 171         ah->btcoex_hw.mci.halted_bt_gpm = false;
 172         ah->btcoex_hw.mci.need_flush_btinfo = false;
 173         ah->btcoex_hw.mci.wlan_cal_seq = 0;
 174         ah->btcoex_hw.mci.wlan_cal_done = 0;
 175         ah->btcoex_hw.mci.config = 0x2201;
 176 }
 177 EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
 178
 179 static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
 180 {
 181         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 182
 183         if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
 184                 return;
 185
 186         /* Configure the desired GPIO port for TX_FRAME output */
 187         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
 188                             AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
 189 }
 190
 191 void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
 192                                 u32 bt_weight,
 193                                 u32 wlan_weight)
 194 {
 195         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 196
 197         if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
 198                 return;
 199
 200         btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
 201                                      SM(wlan_weight, AR_BTCOEX_WL_WGHT);
 202 }
 203 EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
 204
 205
 206 static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
 207 {
 208         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
 209         u32  val;
 210         int i;
 211
 212         /*
 213          * Program coex mode and weight registers to
 214          * enable coex 3-wire
 215          */
 216         REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
 217         REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
 218
 219
 220         if (AR_SREV_9300_20_OR_LATER(ah)) {
 221                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
 222                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
 223                 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
 224                         REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
 225                                   btcoex->bt_weight[i]);
 226         } else
 227                 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
 228
 229
 230
 231         if (AR_SREV_9271(ah)) {
 232                 val = REG_READ(ah, 0x50040);
 233                 val &= 0xFFFFFEFF;
 234                 REG_WRITE(ah, 0x50040, val);
 235         }
 236
 237         REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
 238         REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
 239
 240         ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
 241                             AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
 242 }
 243
 244 static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
 245 {
 246         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
 247         int i;
 248
 249         for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
 250                 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
 251                           btcoex->wlan_weight[i]);
 252
 253         REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
 254         btcoex->enabled = true;
 255 }
 256
 257 void ath9k_hw_btcoex_enable(struct ath_hw *ah)
 258 {
 259         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 260
 261         switch (ath9k_hw_get_btcoex_scheme(ah)) {
 262         case ATH_BTCOEX_CFG_NONE:
 263                 return;
 264         case ATH_BTCOEX_CFG_2WIRE:
 265                 ath9k_hw_btcoex_enable_2wire(ah);
 266                 break;
 267         case ATH_BTCOEX_CFG_3WIRE:
 268                 ath9k_hw_btcoex_enable_3wire(ah);
 269                 break;
 270         case ATH_BTCOEX_CFG_MCI:
 271                 ath9k_hw_btcoex_enable_mci(ah);
 272                 return;
 273         }
 274
 275         REG_RMW(ah, AR_GPIO_PDPU,
 276                 (0x2 << (btcoex_hw->btactive_gpio * 2)),
 277                 (0x3 << (btcoex_hw->btactive_gpio * 2)));
 278
 279         ah->btcoex_hw.enabled = true;
 280 }
 281 EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
 282
 283 void ath9k_hw_btcoex_disable(struct ath_hw *ah)
 284 {
 285         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 286         int i;
 287
 288         if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
 289                 return;
 290
 291         btcoex_hw->enabled = false;
 292         if (btcoex_hw->scheme == ATH_BTCOEX_CFG_MCI) {
 293                 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
 294                 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
 295                         REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
 296                                   btcoex_hw->wlan_weight[i]);
 297         }
 298         ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
 299
 300         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
 301                         AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 302
 303         if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
 304                 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
 305                 REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
 306
 307                 if (AR_SREV_9300_20_OR_LATER(ah)) {
 308                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
 309                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
 310                         for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
 311                                 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
 312                 } else
 313                         REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
 314
 315         }
 316 }
 317 EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
 318
 319 static void ar9003_btcoex_bt_stomp(struct ath_hw *ah,
 320                          enum ath_stomp_type stomp_type)
 321 {
 322         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
 323         const u32 *weight = AR_SREV_9462(ah) ? ar9003_wlan_weights[stomp_type] :
 324                                                ar9462_wlan_weights[stomp_type];
 325         int i;
 326
 327         for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
 328                 btcoex->bt_weight[i] = AR9300_BT_WGHT;
 329                 btcoex->wlan_weight[i] = weight[i];
 330         }
 331 }
 332
 333 /*
 334  * Configures appropriate weight based on stomp type.
 335  */
 336 void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
 337                               enum ath_stomp_type stomp_type)
 338 {
 339         if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
 340                 return;
 341
 342         if (AR_SREV_9300_20_OR_LATER(ah)) {
 343                 ar9003_btcoex_bt_stomp(ah, stomp_type);
 344                 return;
 345         }
 346
 347         switch (stomp_type) {
 348         case ATH_BTCOEX_STOMP_ALL:
 349                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
 350                                 AR_STOMP_ALL_WLAN_WGHT);
 351                 break;
 352         case ATH_BTCOEX_STOMP_LOW:
 353                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
 354                                 AR_STOMP_LOW_WLAN_WGHT);
 355                 break;
 356         case ATH_BTCOEX_STOMP_NONE:
 357                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
 358                                 AR_STOMP_NONE_WLAN_WGHT);
 359                 break;
 360         default:
 361                 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
 362                 break;
 363         }
 364 }
 365 EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);