2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
30 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
31 * should rely on this file or its contents.
36 /* Macro to expand scalars to 64-bit objects */
38 #define ito64(x) (sizeof(x) == 1) ? \
39 (((unsigned long long int)(x)) & (0xff)) : \
41 (((unsigned long long int)(x)) & 0xffff) : \
43 (((unsigned long long int)(x)) & 0xffffffff) : \
44 (unsigned long long int)(x))
46 /* increment with wrap-around */
47 #define INCR(_l, _sz) do { \
49 (_l) &= ((_sz) - 1); \
52 /* decrement with wrap-around */
53 #define DECR(_l, _sz) do { \
55 (_l) &= ((_sz) - 1); \
58 #define TSF_TO_TU(_h,_l) \
59 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
61 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
68 /*************************/
69 /* Descriptor Management */
70 /*************************/
72 #define ATH_TXBUF_RESET(_bf) do { \
73 (_bf)->bf_stale = false; \
74 (_bf)->bf_lastbf = NULL; \
75 (_bf)->bf_next = NULL; \
76 memset(&((_bf)->bf_state), 0, \
77 sizeof(struct ath_buf_state)); \
80 #define ATH_RXBUF_RESET(_bf) do { \
81 (_bf)->bf_stale = false; \
85 * enum buffer_type - Buffer type flags
87 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
88 * @BUF_AGGR: Indicates whether the buffer can be aggregated
89 * (used in aggregation scheduling)
90 * @BUF_XRETRY: To denote excessive retries of the buffer
98 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
99 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
100 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
102 #define ATH_TXSTATUS_RING_SIZE 64
104 #define DS2PHYS(_dd, _ds) \
105 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
106 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
107 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
111 dma_addr_t dd_desc_paddr;
113 struct ath_buf *dd_bufptr;
116 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
117 struct list_head *head, const char *name,
118 int nbuf, int ndesc, bool is_tx);
119 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
120 struct list_head *head);
126 #define ATH_RXBUF 512
127 #define ATH_TXBUF 512
128 #define ATH_TXBUF_RESERVE 5
129 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
130 #define ATH_TXMAXTRY 13
132 #define TID_TO_WME_AC(_tid) \
133 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
134 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
135 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
138 #define ATH_AGGR_DELIM_SZ 4
139 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
140 /* number of delimiters for encryption padding */
141 #define ATH_AGGR_ENCRYPTDELIM 10
142 /* minimum h/w qdepth to be sustained to maximize aggregation */
143 #define ATH_AGGR_MIN_QDEPTH 2
144 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
146 #define IEEE80211_SEQ_SEQ_SHIFT 4
147 #define IEEE80211_SEQ_MAX 4096
148 #define IEEE80211_WEP_IVLEN 3
149 #define IEEE80211_WEP_KIDLEN 1
150 #define IEEE80211_WEP_CRCLEN 4
151 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
152 (IEEE80211_WEP_IVLEN + \
153 IEEE80211_WEP_KIDLEN + \
154 IEEE80211_WEP_CRCLEN))
156 /* return whether a bit at index _n in bitmap _bm is set
157 * _sz is the size of the bitmap */
158 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
159 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
161 /* return block-ack bitmap index given sequence and starting sequence */
162 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
164 /* returns delimiter padding required given the packet length */
165 #define ATH_AGGR_GET_NDELIM(_len) \
166 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
167 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
169 #define BAW_WITHIN(_start, _bawsz, _seqno) \
170 ((((_seqno) - (_start)) & 4095) < (_bawsz))
172 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
174 #define ATH_TX_COMPLETE_POLL_INT 1000
176 enum ATH_AGGR_STATUS {
182 #define ATH_TXFIFO_DEPTH 8
184 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
185 u32 axq_qnum; /* ath9k hardware queue number */
187 struct list_head axq_q;
192 bool axq_tx_inprogress;
193 struct list_head axq_acq;
194 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
203 struct list_head list;
204 struct list_head tid_q;
205 bool clear_ps_filter;
208 struct ath_frame_info {
211 enum ath9k_key_type keytype;
216 struct ath_buf_state {
219 unsigned long bfs_paprd_timestamp;
220 enum ath9k_internal_frame_type bfs_ftype;
224 struct list_head list;
225 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
227 struct ath_buf *bf_next; /* next subframe in the aggregate */
228 struct sk_buff *bf_mpdu; /* enclosing frame structure */
229 void *bf_desc; /* virtual addr of desc */
230 dma_addr_t bf_daddr; /* physical addr of desc */
231 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
234 struct ath_buf_state bf_state;
238 struct list_head list;
239 struct list_head buf_q;
241 struct ath_atx_ac *ac;
242 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
247 int baw_head; /* first un-acked tx buffer */
248 int baw_tail; /* next unused tx buffer slot */
255 #ifdef CONFIG_ATH9K_DEBUGFS
256 struct list_head list; /* for sc->nodes */
257 struct ieee80211_sta *sta; /* station struct we're part of */
259 struct ath_atx_tid tid[WME_NUM_TID];
260 struct ath_atx_ac ac[WME_NUM_AC];
269 #define AGGR_CLEANUP BIT(1)
270 #define AGGR_ADDBA_COMPLETE BIT(2)
271 #define AGGR_ADDBA_PROGRESS BIT(3)
273 struct ath_tx_control {
277 enum ath9k_internal_frame_type frame_type;
281 #define ATH_TX_ERROR 0x01
282 #define ATH_TX_XRETRY 0x02
283 #define ATH_TX_BAR 0x04
286 * @txq_map: Index is mac80211 queue number. This is
287 * not necessarily the same as the hardware queue number
293 spinlock_t txbuflock;
294 struct list_head txbuf;
295 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
296 struct ath_descdma txdma;
297 struct ath_txq *txq_map[WME_NUM_AC];
301 struct sk_buff_head rx_fifo;
302 struct sk_buff_head rx_buffers;
310 unsigned int rxfilter;
311 spinlock_t rxbuflock;
312 struct list_head rxbuf;
313 struct ath_descdma rxdma;
314 struct ath_buf *rx_bufptr;
315 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
317 struct sk_buff *frag;
320 int ath_startrecv(struct ath_softc *sc);
321 bool ath_stoprecv(struct ath_softc *sc);
322 void ath_flushrecv(struct ath_softc *sc);
323 u32 ath_calcrxfilter(struct ath_softc *sc);
324 int ath_rx_init(struct ath_softc *sc, int nbufs);
325 void ath_rx_cleanup(struct ath_softc *sc);
326 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
327 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
328 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
329 bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
330 void ath_draintxq(struct ath_softc *sc,
331 struct ath_txq *txq, bool retry_tx);
332 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
333 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
334 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
335 int ath_tx_init(struct ath_softc *sc, int nbufs);
336 void ath_tx_cleanup(struct ath_softc *sc);
337 int ath_txq_update(struct ath_softc *sc, int qnum,
338 struct ath9k_tx_queue_info *q);
339 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
340 struct ath_tx_control *txctl);
341 void ath_tx_tasklet(struct ath_softc *sc);
342 void ath_tx_edma_tasklet(struct ath_softc *sc);
343 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
345 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
346 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
348 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
349 bool ath_tx_aggr_sleep(struct ath_softc *sc, struct ath_node *an);
357 bool is_bslot_active, primary_sta_vif;
358 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
359 struct ath_buf *av_bcbuf;
362 /*******************/
363 /* Beacon Handling */
364 /*******************/
367 * Regardless of the number of beacons we stagger, (i.e. regardless of the
368 * number of BSSIDs) if a given beacon does not go out even after waiting this
369 * number of beacon intervals, the game's up.
371 #define BSTUCK_THRESH 9
373 #define ATH_DEFAULT_BINTVAL 100 /* TU */
374 #define ATH_DEFAULT_BMISS_LIMIT 10
375 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
377 struct ath_beacon_config {
387 OK, /* no change needed */
388 UPDATE, /* update pending */
389 COMMIT /* beacon sent, commit change */
390 } updateslot; /* slot time update fsm */
396 struct ieee80211_vif *bslot[ATH_BCBUF];
399 struct ath9k_tx_queue_info beacon_qi;
400 struct ath_descdma bdma;
401 struct ath_txq *cabq;
402 struct list_head bbuf;
408 void ath_beacon_tasklet(unsigned long data);
409 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
410 int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
411 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
412 int ath_beaconq_config(struct ath_softc *sc);
413 void ath_set_beacon(struct ath_softc *sc);
414 void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
420 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
421 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
422 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
423 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
424 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
425 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
426 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
428 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
430 void ath_hw_check(struct work_struct *work);
431 void ath_hw_pll_work(struct work_struct *work);
432 void ath_paprd_calibrate(struct work_struct *work);
433 void ath_ani_calibrate(unsigned long data);
434 void ath_start_ani(struct ath_common *common);
441 bool hw_timer_enabled;
442 spinlock_t btcoex_lock;
443 struct timer_list period_timer; /* Timer for BT period */
445 unsigned long bt_priority_time;
446 int bt_stomp_type; /* Types of BT stomping */
447 u32 btcoex_no_stomp; /* in usec */
448 u32 btcoex_period; /* in usec */
449 u32 btscan_no_stomp; /* in usec */
450 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
453 int ath_init_btcoex_timer(struct ath_softc *sc);
454 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
455 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
457 /********************/
459 /********************/
461 #define ATH_LED_PIN_DEF 1
462 #define ATH_LED_PIN_9287 8
463 #define ATH_LED_PIN_9300 10
464 #define ATH_LED_PIN_9485 6
466 #ifdef CONFIG_MAC80211_LEDS
467 void ath_init_leds(struct ath_softc *sc);
468 void ath_deinit_leds(struct ath_softc *sc);
470 static inline void ath_init_leds(struct ath_softc *sc)
474 static inline void ath_deinit_leds(struct ath_softc *sc)
480 /* Antenna diversity/combining */
481 #define ATH_ANT_RX_CURRENT_SHIFT 4
482 #define ATH_ANT_RX_MAIN_SHIFT 2
483 #define ATH_ANT_RX_MASK 0x3
485 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
486 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
487 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
488 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
489 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
490 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
491 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
493 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
494 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
495 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
496 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
498 enum ath9k_ant_div_comb_lna_conf {
499 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
500 ATH_ANT_DIV_COMB_LNA2,
501 ATH_ANT_DIV_COMB_LNA1,
502 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
505 struct ath_ant_comb {
524 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
525 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
530 unsigned long scan_start_time;
533 /********************/
534 /* Main driver core */
535 /********************/
538 * Default cache line size, in bytes.
539 * Used when PCI device not fully initialized by bootrom/BIOS
541 #define DEFAULT_CACHELINE 32
542 #define ATH_REGCLASSIDS_MAX 10
543 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
544 #define ATH_MAX_SW_RETRIES 10
545 #define ATH_CHAN_MAX 255
547 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
548 #define ATH_RATE_DUMMY_MARKER 0
550 #define SC_OP_INVALID BIT(0)
551 #define SC_OP_BEACONS BIT(1)
552 #define SC_OP_RXAGGR BIT(2)
553 #define SC_OP_TXAGGR BIT(3)
554 #define SC_OP_OFFCHANNEL BIT(4)
555 #define SC_OP_PREAMBLE_SHORT BIT(5)
556 #define SC_OP_PROTECT_ENABLE BIT(6)
557 #define SC_OP_RXFLUSH BIT(7)
558 #define SC_OP_LED_ASSOCIATED BIT(8)
559 #define SC_OP_LED_ON BIT(9)
560 #define SC_OP_TSF_RESET BIT(11)
561 #define SC_OP_BT_PRIORITY_DETECTED BIT(12)
562 #define SC_OP_BT_SCAN BIT(13)
563 #define SC_OP_ANI_RUN BIT(14)
564 #define SC_OP_ENABLE_APM BIT(15)
565 #define SC_OP_PRIM_STA_VIF BIT(16)
567 /* Powersave flags */
568 #define PS_WAIT_FOR_BEACON BIT(0)
569 #define PS_WAIT_FOR_CAB BIT(1)
570 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
571 #define PS_WAIT_FOR_TX_ACK BIT(3)
572 #define PS_BEACON_SYNC BIT(4)
573 #define PS_TSFOOR_SYNC BIT(5)
575 struct ath_rate_table;
577 struct ath9k_vif_iter_data {
578 const u8 *hw_macaddr; /* phy's hardware address, set
579 * before starting iteration for
582 u8 mask[ETH_ALEN]; /* bssid mask */
583 int naps; /* number of AP vifs */
584 int nmeshes; /* number of mesh vifs */
585 int nstations; /* number of station vifs */
586 int nwds; /* number of WDS vifs */
587 int nadhocs; /* number of adhoc vifs */
588 int nothers; /* number of vifs not specified above. */
592 struct ieee80211_hw *hw;
597 struct survey_info *cur_survey;
598 struct survey_info survey[ATH9K_NUM_CHANNELS];
600 struct tasklet_struct intr_tq;
601 struct tasklet_struct bcon_tasklet;
602 struct ath_hw *sc_ah;
605 spinlock_t sc_serial_rw;
606 spinlock_t sc_pm_lock;
607 spinlock_t sc_pcu_lock;
609 struct work_struct paprd_work;
610 struct work_struct hw_check_work;
611 struct completion paprd_complete;
613 unsigned int hw_busy_count;
616 u32 sc_flags; /* SC_OP_* */
617 u16 ps_flags; /* PS_* */
623 unsigned long ps_usecount;
625 struct ath_config config;
628 struct ath_beacon beacon;
629 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
631 #ifdef CONFIG_MAC80211_LEDS
634 struct led_classdev led_cdev;
637 struct ath9k_hw_cal_data caldata;
640 #ifdef CONFIG_ATH9K_DEBUGFS
641 struct ath9k_debug debug;
642 spinlock_t nodes_lock;
643 struct list_head nodes; /* basically, stations */
644 unsigned int tx_complete_poll_work_seen;
646 struct ath_beacon_config cur_beacon_conf;
647 struct delayed_work tx_complete_work;
648 struct delayed_work hw_pll_work;
649 struct ath_btcoex btcoex;
651 struct ath_descdma txsdma;
653 struct ath_ant_comb ant_comb;
656 void ath9k_tasklet(unsigned long data);
657 int ath_reset(struct ath_softc *sc, bool retry_tx);
658 int ath_cabq_update(struct ath_softc *);
660 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
662 common->bus_ops->read_cachesize(common, csz);
665 extern struct ieee80211_ops ath9k_ops;
666 extern int ath9k_modparam_nohwcrypt;
667 extern int led_blink;
668 extern bool is_ath9k_unloaded;
670 irqreturn_t ath_isr(int irq, void *dev);
671 void ath9k_init_crypto(struct ath_softc *sc);
672 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
673 const struct ath_bus_ops *bus_ops);
674 void ath9k_deinit_device(struct ath_softc *sc);
675 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
677 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
678 bool ath9k_uses_beacons(int type);
680 #ifdef CONFIG_ATH9K_PCI
681 int ath_pci_init(void);
682 void ath_pci_exit(void);
684 static inline int ath_pci_init(void) { return 0; };
685 static inline void ath_pci_exit(void) {};
688 #ifdef CONFIG_ATH9K_AHB
689 int ath_ahb_init(void);
690 void ath_ahb_exit(void);
692 static inline int ath_ahb_init(void) { return 0; };
693 static inline void ath_ahb_exit(void) {};
696 void ath9k_ps_wakeup(struct ath_softc *sc);
697 void ath9k_ps_restore(struct ath_softc *sc);
699 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
701 void ath_start_rfkill_poll(struct ath_softc *sc);
702 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
703 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
704 struct ieee80211_vif *vif,
705 struct ath9k_vif_iter_data *iter_data);