2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/skbuff.h>
21 #include <linux/if_ether.h>
22 #include <linux/spinlock.h>
23 #include <net/mac80211.h>
26 * The key cache is used for h/w cipher state and also for
27 * tracking station state such as the current tx antenna.
28 * We also setup a mapping table between key cache slot indices
29 * and station state to short-circuit node lookups on rx.
30 * Different parts have different size key caches. We handle
31 * up to ATH_KEYMAX entries (could dynamically allocate state).
33 #define ATH_KEYMAX 128 /* max key cache size we handle */
35 static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
39 unsigned int longcal_timer;
40 unsigned int shortcal_timer;
41 unsigned int resetcal_timer;
42 unsigned int checkani_timer;
43 struct timer_list timer;
46 struct ath_cycle_counters {
53 enum ath_device_state {
64 struct reg_dmn_pair_mapping {
70 struct ath_regulatory {
76 struct reg_dmn_pair_mapping *regpair;
80 ATH_CRYPT_CAP_CIPHER_AESCCM = BIT(0),
81 ATH_CRYPT_CAP_MIC_COMBINED = BIT(1),
88 u8 kv_val[16]; /* TK */
89 u8 kv_mic[8]; /* Michael MIC key */
90 u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware
91 * supports both MIC keys in the same key cache entry;
92 * in that case, kv_mic is the RX key) */
97 ATH_CIPHER_AES_OCB = 1,
98 ATH_CIPHER_AES_CCM = 2,
106 * struct ath_ops - Register read/write operations
108 * @read: Register read
109 * @multi_read: Multiple register read
110 * @write: Register write
111 * @enable_write_buffer: Enable multiple register writes
112 * @write_flush: flush buffered register writes and disable buffering
115 unsigned int (*read)(void *, u32 reg_offset);
116 void (*multi_read)(void *, u32 *addr, u32 *val, u16 count);
117 void (*write)(void *, u32 val, u32 reg_offset);
118 void (*enable_write_buffer)(void *);
119 void (*write_flush) (void *);
120 u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr);
129 struct ieee80211_hw *hw;
131 enum ath_device_state state;
137 u8 macaddr[ETH_ALEN];
138 u8 curbssid[ETH_ALEN];
139 u8 bssidmask[ETH_ALEN];
144 DECLARE_BITMAP(keymap, ATH_KEYMAX);
145 DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX);
146 enum ath_crypt_caps crypt_caps;
148 unsigned int clockrate;
151 struct ath_cycle_counters cc_ani;
152 struct ath_cycle_counters cc_survey;
154 struct ath_regulatory regulatory;
155 const struct ath_ops *ops;
156 const struct ath_bus_ops *bus_ops;
162 struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
166 void ath_hw_setbssidmask(struct ath_common *common);
167 void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key);
168 int ath_key_config(struct ath_common *common,
169 struct ieee80211_vif *vif,
170 struct ieee80211_sta *sta,
171 struct ieee80211_key_conf *key);
172 bool ath_hw_keyreset(struct ath_common *common, u16 entry);
173 void ath_hw_cycle_counters_update(struct ath_common *common);
174 int32_t ath_hw_get_listen_time(struct ath_common *common);
176 extern __printf(2, 3) void ath_printk(const char *level, const char *fmt, ...);
178 #define _ath_printk(level, common, fmt, ...) \
180 __always_unused struct ath_common *unused = common; \
181 ath_printk(level, fmt, ##__VA_ARGS__); \
184 #define ath_emerg(common, fmt, ...) \
185 _ath_printk(KERN_EMERG, common, fmt, ##__VA_ARGS__)
186 #define ath_alert(common, fmt, ...) \
187 _ath_printk(KERN_ALERT, common, fmt, ##__VA_ARGS__)
188 #define ath_crit(common, fmt, ...) \
189 _ath_printk(KERN_CRIT, common, fmt, ##__VA_ARGS__)
190 #define ath_err(common, fmt, ...) \
191 _ath_printk(KERN_ERR, common, fmt, ##__VA_ARGS__)
192 #define ath_warn(common, fmt, ...) \
193 _ath_printk(KERN_WARNING, common, fmt, ##__VA_ARGS__)
194 #define ath_notice(common, fmt, ...) \
195 _ath_printk(KERN_NOTICE, common, fmt, ##__VA_ARGS__)
196 #define ath_info(common, fmt, ...) \
197 _ath_printk(KERN_INFO, common, fmt, ##__VA_ARGS__)
200 * enum ath_debug_level - atheros wireless debug level
202 * @ATH_DBG_RESET: reset processing
203 * @ATH_DBG_QUEUE: hardware queue management
204 * @ATH_DBG_EEPROM: eeprom processing
205 * @ATH_DBG_CALIBRATE: periodic calibration
206 * @ATH_DBG_INTERRUPT: interrupt processing
207 * @ATH_DBG_REGULATORY: regulatory processing
208 * @ATH_DBG_ANI: adaptive noise immunitive processing
209 * @ATH_DBG_XMIT: basic xmit operation
210 * @ATH_DBG_BEACON: beacon handling
211 * @ATH_DBG_CONFIG: configuration of the hardware
212 * @ATH_DBG_FATAL: fatal errors, this is the default, DBG_DEFAULT
213 * @ATH_DBG_PS: power save processing
214 * @ATH_DBG_HWTIMER: hardware timer handling
215 * @ATH_DBG_BTCOEX: bluetooth coexistance
216 * @ATH_DBG_BSTUCK: stuck beacons
217 * @ATH_DBG_ANY: enable all debugging
219 * The debug level is used to control the amount and type of debugging output
220 * we want to see. Each driver has its own method for enabling debugging and
221 * modifying debug level states -- but this is typically done through a
222 * module parameter 'debug' along with a respective 'debug' debugfs file
226 ATH_DBG_RESET = 0x00000001,
227 ATH_DBG_QUEUE = 0x00000002,
228 ATH_DBG_EEPROM = 0x00000004,
229 ATH_DBG_CALIBRATE = 0x00000008,
230 ATH_DBG_INTERRUPT = 0x00000010,
231 ATH_DBG_REGULATORY = 0x00000020,
232 ATH_DBG_ANI = 0x00000040,
233 ATH_DBG_XMIT = 0x00000080,
234 ATH_DBG_BEACON = 0x00000100,
235 ATH_DBG_CONFIG = 0x00000200,
236 ATH_DBG_FATAL = 0x00000400,
237 ATH_DBG_PS = 0x00000800,
238 ATH_DBG_HWTIMER = 0x00001000,
239 ATH_DBG_BTCOEX = 0x00002000,
240 ATH_DBG_WMI = 0x00004000,
241 ATH_DBG_BSTUCK = 0x00008000,
242 ATH_DBG_MCI = 0x00010000,
243 ATH_DBG_ANY = 0xffffffff
246 #define ATH_DBG_DEFAULT (ATH_DBG_FATAL)
248 #ifdef CONFIG_ATH_DEBUG
250 #define ath_dbg(common, dbg_mask, fmt, ...) \
252 if ((common)->debug_mask & dbg_mask) \
253 _ath_printk(KERN_DEBUG, common, fmt, ##__VA_ARGS__); \
256 #define ATH_DBG_WARN(foo, arg...) WARN(foo, arg)
257 #define ATH_DBG_WARN_ON_ONCE(foo) WARN_ON_ONCE(foo)
261 static inline __attribute__ ((format (printf, 3, 4)))
262 void ath_dbg(struct ath_common *common, enum ATH_DEBUG dbg_mask,
263 const char *fmt, ...)
266 #define ATH_DBG_WARN(foo, arg...) do {} while (0)
267 #define ATH_DBG_WARN_ON_ONCE(foo) ({ \
268 int __ret_warn_once = !!(foo); \
269 unlikely(__ret_warn_once); \
272 #endif /* CONFIG_ATH_DEBUG */
274 /** Returns string describing opmode, or NULL if unknown mode. */
275 #ifdef CONFIG_ATH_DEBUG
276 const char *ath_opmode_to_string(enum nl80211_iftype opmode);
278 static inline const char *ath_opmode_to_string(enum nl80211_iftype opmode)