1 /*******************************************************************************
2 STMMAC Common Header File
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23 *******************************************************************************/
25 #include <linux/netdevice.h>
26 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
27 #define STMMAC_VLAN_TAG_USED
28 #include <linux/if_vlan.h>
33 #undef CHIP_DEBUG_PRINT
34 /* Turn-on extra printk debug for MAC core, dma and descriptors */
35 /* #define CHIP_DEBUG_PRINT */
37 #ifdef CHIP_DEBUG_PRINT
38 #define CHIP_DBG(fmt, args...) printk(fmt, ## args)
40 #define CHIP_DBG(fmt, args...) do { } while (0)
43 #undef FRAME_FILTER_DEBUG
44 /* #define FRAME_FILTER_DEBUG */
46 struct stmmac_extra_stats {
48 unsigned long tx_underflow ____cacheline_aligned;
49 unsigned long tx_carrier;
50 unsigned long tx_losscarrier;
51 unsigned long tx_heartbeat;
52 unsigned long tx_deferred;
53 unsigned long tx_vlan;
54 unsigned long tx_jabber;
55 unsigned long tx_frame_flushed;
56 unsigned long tx_payload_error;
57 unsigned long tx_ip_header_error;
59 unsigned long rx_desc;
60 unsigned long rx_partial;
61 unsigned long rx_runt;
62 unsigned long rx_toolong;
63 unsigned long rx_collision;
65 unsigned long rx_length;
67 unsigned long rx_multicast;
68 unsigned long rx_gmac_overflow;
69 unsigned long rx_watchdog;
70 unsigned long da_rx_filter_fail;
71 unsigned long sa_rx_filter_fail;
72 unsigned long rx_missed_cntr;
73 unsigned long rx_overflow_cntr;
74 unsigned long rx_vlan;
75 /* Tx/Rx IRQ errors */
76 unsigned long tx_undeflow_irq;
77 unsigned long tx_process_stopped_irq;
78 unsigned long tx_jabber_irq;
79 unsigned long rx_overflow_irq;
80 unsigned long rx_buf_unav_irq;
81 unsigned long rx_process_stopped_irq;
82 unsigned long rx_watchdog_irq;
83 unsigned long tx_early_irq;
84 unsigned long fatal_bus_error_irq;
86 unsigned long threshold;
87 unsigned long tx_pkt_n;
88 unsigned long rx_pkt_n;
90 unsigned long sched_timer_n;
91 unsigned long normal_irq_n;
94 #define HASH_TABLE_SIZE 64
95 #define PAUSE_TIME 0x200
97 /* Flow Control defines */
101 #define FLOW_AUTO (FLOW_TX | FLOW_RX)
103 #define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */
107 enum rx_frame_status { /* IPC status */
114 enum tx_dma_irq_status {
116 tx_hard_error_bump_tc = 2,
120 /* GMAC TX FIFO is 8K, Rx FIFO is 16K */
121 #define BUF_SIZE_16KiB 16384
122 #define BUF_SIZE_8KiB 8192
123 #define BUF_SIZE_4KiB 4096
124 #define BUF_SIZE_2KiB 2048
126 /* Power Down and WOL */
127 #define PMT_NOT_SUPPORTED 0
128 #define PMT_SUPPORTED 1
130 /* Common MAC defines */
131 #define MAC_CTRL_REG 0x00000000 /* MAC Control */
132 #define MAC_ENABLE_TX 0x00000008 /* Transmitter Enable */
133 #define MAC_RNABLE_RX 0x00000004 /* Receiver Enable */
135 /* MAC Management Counters register */
136 #define MMC_CONTROL 0x00000100 /* MMC Control */
137 #define MMC_HIGH_INTR 0x00000104 /* MMC High Interrupt */
138 #define MMC_LOW_INTR 0x00000108 /* MMC Low Interrupt */
139 #define MMC_HIGH_INTR_MASK 0x0000010c /* MMC High Interrupt Mask */
140 #define MMC_LOW_INTR_MASK 0x00000110 /* MMC Low Interrupt Mask */
142 #define MMC_CONTROL_MAX_FRM_MASK 0x0003ff8 /* Maximum Frame Size */
143 #define MMC_CONTROL_MAX_FRM_SHIFT 3
144 #define MMC_CONTROL_MAX_FRAME 0x7FF
146 struct stmmac_desc_ops {
147 /* DMA RX descriptor ring initialization */
148 void (*init_rx_desc) (struct dma_desc *p, unsigned int ring_size,
150 /* DMA TX descriptor ring initialization */
151 void (*init_tx_desc) (struct dma_desc *p, unsigned int ring_size);
153 /* Invoked by the xmit function to prepare the tx descriptor */
154 void (*prepare_tx_desc) (struct dma_desc *p, int is_fs, int len,
156 /* Set/get the owner of the descriptor */
157 void (*set_tx_owner) (struct dma_desc *p);
158 int (*get_tx_owner) (struct dma_desc *p);
159 /* Invoked by the xmit function to close the tx descriptor */
160 void (*close_tx_desc) (struct dma_desc *p);
161 /* Clean the tx descriptor as soon as the tx irq is received */
162 void (*release_tx_desc) (struct dma_desc *p);
163 /* Clear interrupt on tx frame completion. When this bit is
164 * set an interrupt happens as soon as the frame is transmitted */
165 void (*clear_tx_ic) (struct dma_desc *p);
166 /* Last tx segment reports the transmit status */
167 int (*get_tx_ls) (struct dma_desc *p);
168 /* Return the transmit status looking at the TDES1 */
169 int (*tx_status) (void *data, struct stmmac_extra_stats *x,
170 struct dma_desc *p, unsigned long ioaddr);
171 /* Get the buffer size from the descriptor */
172 int (*get_tx_len) (struct dma_desc *p);
173 /* Handle extra events on specific interrupts hw dependent */
174 int (*get_rx_owner) (struct dma_desc *p);
175 void (*set_rx_owner) (struct dma_desc *p);
176 /* Get the receive frame size */
177 int (*get_rx_frame_len) (struct dma_desc *p);
178 /* Return the reception status looking at the RDES1 */
179 int (*rx_status) (void *data, struct stmmac_extra_stats *x,
183 struct stmmac_dma_ops {
184 /* DMA core initialization */
185 int (*init) (unsigned long ioaddr, int pbl, u32 dma_tx, u32 dma_rx);
186 /* Dump DMA registers */
187 void (*dump_regs) (unsigned long ioaddr);
188 /* Set tx/rx threshold in the csr6 register
189 * An invalid value enables the store-and-forward mode */
190 void (*dma_mode) (unsigned long ioaddr, int txmode, int rxmode);
191 /* To track extra statistic (if supported) */
192 void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x,
193 unsigned long ioaddr);
194 void (*enable_dma_transmission) (unsigned long ioaddr);
195 void (*enable_dma_irq) (unsigned long ioaddr);
196 void (*disable_dma_irq) (unsigned long ioaddr);
197 void (*start_tx) (unsigned long ioaddr);
198 void (*stop_tx) (unsigned long ioaddr);
199 void (*start_rx) (unsigned long ioaddr);
200 void (*stop_rx) (unsigned long ioaddr);
201 int (*dma_interrupt) (unsigned long ioaddr,
202 struct stmmac_extra_stats *x);
206 /* MAC core initialization */
207 void (*core_init) (unsigned long ioaddr) ____cacheline_aligned;
208 /* Dump MAC registers */
209 void (*dump_regs) (unsigned long ioaddr);
210 /* Handle extra events on specific interrupts hw dependent */
211 void (*host_irq_status) (unsigned long ioaddr);
212 /* Multicast filter setting */
213 void (*set_filter) (struct net_device *dev);
214 /* Flow control setting */
215 void (*flow_ctrl) (unsigned long ioaddr, unsigned int duplex,
216 unsigned int fc, unsigned int pause_time);
217 /* Set power management mode (e.g. magic frame) */
218 void (*pmt) (unsigned long ioaddr, unsigned long mode);
219 /* Set/Get Unicast MAC addresses */
220 void (*set_umac_addr) (unsigned long ioaddr, unsigned char *addr,
222 void (*get_umac_addr) (unsigned long ioaddr, unsigned char *addr,
233 unsigned int addr; /* MII Address */
234 unsigned int data; /* MII Data */
237 struct mac_device_info {
238 struct stmmac_ops *mac;
239 struct stmmac_desc_ops *desc;
240 struct stmmac_dma_ops *dma;
241 unsigned int pmt; /* support Power-Down */
242 struct mii_regs mii; /* MII register Addresses */
243 struct mac_link link;
246 struct mac_device_info *dwmac1000_setup(unsigned long addr);
247 struct mac_device_info *dwmac100_setup(unsigned long addr);
249 extern void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6],
250 unsigned int high, unsigned int low);
251 extern void stmmac_get_mac_addr(unsigned long ioaddr, unsigned char *addr,
252 unsigned int high, unsigned int low);
253 extern void dwmac_dma_flush_tx_fifo(unsigned long ioaddr);