1 /********************************************************************
4 Description: Driver for the VIA VT8231/VT8233 IrDA chipsets
5 Author: VIA Technologies,inc
8 Copyright (c) 1998-2003 VIA Technologies, Inc.
10 This program is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free Software
12 Foundation; either version 2, or (at your option) any later version.
14 This program is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
17 See the GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along with
20 this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
24 F02 Oct/28/02: Add SB device ID for 3147 and 3177.
26 jul/09/2002 : only implement two kind of dongle currently.
27 Oct/02/2002 : work on VT8231 and VT8233 .
28 Aug/06/2003 : change driver format to pci driver .
30 2004-02-16: <sda@bdit.de>
31 - Removed unneeded 'legacy' pci stuff.
32 - Make sure SIR mode is set (hw_init()) before calling mode-dependent stuff.
33 - On speed change from core, don't send SIR frame with new speed.
34 Use current speed and change speeds later.
35 - Make module-param dongle_id actually work.
36 - New dongle_id 17 (0x11): TDFS4500. Single-ended SIR only.
37 Tested with home-grown PCB on EPIA boards.
40 ********************************************************************/
41 #include <linux/module.h>
42 #include <linux/kernel.h>
43 #include <linux/types.h>
44 #include <linux/skbuff.h>
45 #include <linux/netdevice.h>
46 #include <linux/ioport.h>
47 #include <linux/delay.h>
48 #include <linux/init.h>
49 #include <linux/interrupt.h>
50 #include <linux/rtnetlink.h>
51 #include <linux/pci.h>
52 #include <linux/dma-mapping.h>
53 #include <linux/gfp.h>
57 #include <asm/byteorder.h>
61 #include <net/irda/wrapper.h>
62 #include <net/irda/irda.h>
63 #include <net/irda/irda_device.h>
67 #define VIA_MODULE_NAME "via-ircc"
68 #define CHIP_IO_EXTENT 0x40
70 static char *driver_name = VIA_MODULE_NAME;
72 /* Module parameters */
73 static int qos_mtt_bits = 0x07; /* 1 ms or more */
74 static int dongle_id = 0; /* default: probe */
76 /* We can't guess the type of connected dongle, user *must* supply it. */
77 module_param(dongle_id, int, 0);
80 static int via_ircc_open(struct pci_dev *pdev, chipio_t *info,
82 static int via_ircc_dma_receive(struct via_ircc_cb *self);
83 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
85 static netdev_tx_t via_ircc_hard_xmit_sir(struct sk_buff *skb,
86 struct net_device *dev);
87 static netdev_tx_t via_ircc_hard_xmit_fir(struct sk_buff *skb,
88 struct net_device *dev);
89 static void via_hw_init(struct via_ircc_cb *self);
90 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
91 static irqreturn_t via_ircc_interrupt(int irq, void *dev_id);
92 static int via_ircc_is_receiving(struct via_ircc_cb *self);
93 static int via_ircc_read_dongle_id(int iobase);
95 static int via_ircc_net_open(struct net_device *dev);
96 static int via_ircc_net_close(struct net_device *dev);
97 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
99 static void via_ircc_change_dongle_speed(int iobase, int speed,
101 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
102 static void hwreset(struct via_ircc_cb *self);
103 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
104 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
105 static int via_init_one(struct pci_dev *pcidev, const struct pci_device_id *id);
106 static void via_remove_one(struct pci_dev *pdev);
108 /* FIXME : Should use udelay() instead, even if we are x86 only - Jean II */
109 static void iodelay(int udelay)
114 for (i = 0; i < udelay; i++) {
119 static DEFINE_PCI_DEVICE_TABLE(via_pci_tbl) = {
120 { PCI_VENDOR_ID_VIA, 0x8231, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
121 { PCI_VENDOR_ID_VIA, 0x3109, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
122 { PCI_VENDOR_ID_VIA, 0x3074, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
123 { PCI_VENDOR_ID_VIA, 0x3147, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
124 { PCI_VENDOR_ID_VIA, 0x3177, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
128 MODULE_DEVICE_TABLE(pci,via_pci_tbl);
131 static struct pci_driver via_driver = {
132 .name = VIA_MODULE_NAME,
133 .id_table = via_pci_tbl,
134 .probe = via_init_one,
135 .remove = via_remove_one,
140 * Function via_ircc_init ()
142 * Initialize chip. Just find out chip type and resource.
144 static int __init via_ircc_init(void)
148 IRDA_DEBUG(3, "%s()\n", __func__);
150 rc = pci_register_driver(&via_driver);
152 IRDA_DEBUG(0, "%s(): error rc = %d, returning -ENODEV...\n",
159 static int via_init_one(struct pci_dev *pcidev, const struct pci_device_id *id)
162 u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
163 u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
166 IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __func__, id->device);
168 rc = pci_enable_device (pcidev);
170 IRDA_DEBUG(0, "%s(): error rc = %d\n", __func__, rc);
174 // South Bridge exist
175 if ( ReadLPCReg(0x20) != 0x3C )
180 if (Chipset==0x3076) {
181 IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __func__);
183 WriteLPCReg(7,0x0c );
184 temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
185 if((temp&0x01)==1) { // BIOS close or no FIR
186 WriteLPCReg(0x1d, 0x82 );
187 WriteLPCReg(0x23,0x18);
188 temp=ReadLPCReg(0xF0);
190 temp=(ReadLPCReg(0x74)&0x03); //DMA
192 temp=(ReadLPCReg(0x74)&0x0C) >> 2;
195 temp=(ReadLPCReg(0x74)&0x0C) >> 2; //DMA
199 FirIRQ=(ReadLPCReg(0x70)&0x0f); //IRQ
200 FirIOBase=ReadLPCReg(0x60 ) << 8; //IO Space :high byte
201 FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
202 FirIOBase=FirIOBase ;
203 info.fir_base=FirIOBase;
207 pci_read_config_byte(pcidev,0x40,&bTmp);
208 pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
209 pci_read_config_byte(pcidev,0x42,&bTmp);
210 pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
211 pci_write_config_byte(pcidev,0x5a,0xc0);
212 WriteLPCReg(0x28, 0x70 );
213 rc = via_ircc_open(pcidev, &info, 0x3076);
215 rc = -ENODEV; //IR not turn on
216 } else { //Not VT1211
217 IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __func__);
219 pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
220 if((bTmp&0x01)==1) { // BIOS enable FIR
221 //Enable Double DMA clock
222 pci_read_config_byte(pcidev,0x42,&oldPCI_40);
223 pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
224 pci_read_config_byte(pcidev,0x40,&oldPCI_40);
225 pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
226 pci_read_config_byte(pcidev,0x44,&oldPCI_44);
227 pci_write_config_byte(pcidev,0x44,0x4e);
228 //---------- read configuration from Function0 of south bridge
230 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
231 FirDRQ0 = (bTmp1 & 0x30) >> 4;
232 pci_read_config_byte(pcidev,0x44,&bTmp1);
233 FirDRQ1 = (bTmp1 & 0xc0) >> 6;
235 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
236 FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
239 pci_read_config_byte(pcidev,0x47,&bTmp1); //IRQ
240 FirIRQ = bTmp1 & 0x0f;
242 pci_read_config_byte(pcidev,0x69,&bTmp);
243 FirIOBase = bTmp << 8;//hight byte
244 pci_read_config_byte(pcidev,0x68,&bTmp);
245 FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
246 //-------------------------
247 info.fir_base=FirIOBase;
251 rc = via_ircc_open(pcidev, &info, 0x3096);
253 rc = -ENODEV; //IR not turn on !!!!!
256 IRDA_DEBUG(2, "%s(): End - rc = %d\n", __func__, rc);
260 static void __exit via_ircc_cleanup(void)
262 IRDA_DEBUG(3, "%s()\n", __func__);
264 /* Cleanup all instances of the driver */
265 pci_unregister_driver (&via_driver);
268 static const struct net_device_ops via_ircc_sir_ops = {
269 .ndo_start_xmit = via_ircc_hard_xmit_sir,
270 .ndo_open = via_ircc_net_open,
271 .ndo_stop = via_ircc_net_close,
272 .ndo_do_ioctl = via_ircc_net_ioctl,
274 static const struct net_device_ops via_ircc_fir_ops = {
275 .ndo_start_xmit = via_ircc_hard_xmit_fir,
276 .ndo_open = via_ircc_net_open,
277 .ndo_stop = via_ircc_net_close,
278 .ndo_do_ioctl = via_ircc_net_ioctl,
282 * Function via_ircc_open(pdev, iobase, irq)
284 * Open driver instance
287 static int via_ircc_open(struct pci_dev *pdev, chipio_t *info, unsigned int id)
289 struct net_device *dev;
290 struct via_ircc_cb *self;
293 IRDA_DEBUG(3, "%s()\n", __func__);
295 /* Allocate new instance of the driver */
296 dev = alloc_irdadev(sizeof(struct via_ircc_cb));
300 self = netdev_priv(dev);
302 spin_lock_init(&self->lock);
304 pci_set_drvdata(pdev, self);
306 /* Initialize Resource */
307 self->io.cfg_base = info->cfg_base;
308 self->io.fir_base = info->fir_base;
309 self->io.irq = info->irq;
310 self->io.fir_ext = CHIP_IO_EXTENT;
311 self->io.dma = info->dma;
312 self->io.dma2 = info->dma2;
313 self->io.fifo_size = 32;
315 self->st_fifo.len = 0;
316 self->RxDataReady = 0;
318 /* Reserve the ioports that we need */
319 if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
320 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
321 __func__, self->io.fir_base);
326 /* Initialize QoS for this device */
327 irda_init_max_qos_capabilies(&self->qos);
329 /* Check if user has supplied the dongle id or not */
331 dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
332 self->io.dongle_id = dongle_id;
334 /* The only value we must override it the baudrate */
335 /* Maximum speeds and capabilities are dongle-dependent. */
336 switch( self->io.dongle_id ){
338 self->qos.baud_rate.bits =
339 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
340 IR_576000 | IR_1152000 | (IR_4000000 << 8);
343 self->qos.baud_rate.bits =
344 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200;
348 /* Following was used for testing:
350 * self->qos.baud_rate.bits = IR_9600;
352 * Is is no good, as it prohibits (error-prone) speed-changes.
355 self->qos.min_turn_time.bits = qos_mtt_bits;
356 irda_qos_bits_to_value(&self->qos);
358 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
359 self->rx_buff.truesize = 14384 + 2048;
360 self->tx_buff.truesize = 14384 + 2048;
362 /* Allocate memory if needed */
364 dma_alloc_coherent(&pdev->dev, self->rx_buff.truesize,
365 &self->rx_buff_dma, GFP_KERNEL | __GFP_ZERO);
366 if (self->rx_buff.head == NULL) {
372 dma_alloc_coherent(&pdev->dev, self->tx_buff.truesize,
373 &self->tx_buff_dma, GFP_KERNEL | __GFP_ZERO);
374 if (self->tx_buff.head == NULL) {
379 self->rx_buff.in_frame = FALSE;
380 self->rx_buff.state = OUTSIDE_FRAME;
381 self->tx_buff.data = self->tx_buff.head;
382 self->rx_buff.data = self->rx_buff.head;
384 /* Reset Tx queue info */
385 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
386 self->tx_fifo.tail = self->tx_buff.head;
388 /* Override the network functions we need to use */
389 dev->netdev_ops = &via_ircc_sir_ops;
391 err = register_netdev(dev);
395 IRDA_MESSAGE("IrDA: Registered device %s (via-ircc)\n", dev->name);
397 /* Initialise the hardware..
399 self->io.speed = 9600;
403 dma_free_coherent(&pdev->dev, self->tx_buff.truesize,
404 self->tx_buff.head, self->tx_buff_dma);
406 dma_free_coherent(&pdev->dev, self->rx_buff.truesize,
407 self->rx_buff.head, self->rx_buff_dma);
409 release_region(self->io.fir_base, self->io.fir_ext);
411 pci_set_drvdata(pdev, NULL);
417 * Function via_remove_one(pdev)
419 * Close driver instance
422 static void via_remove_one(struct pci_dev *pdev)
424 struct via_ircc_cb *self = pci_get_drvdata(pdev);
427 IRDA_DEBUG(3, "%s()\n", __func__);
429 iobase = self->io.fir_base;
431 ResetChip(iobase, 5); //hardware reset.
432 /* Remove netdevice */
433 unregister_netdev(self->netdev);
435 /* Release the PORT that this driver is using */
436 IRDA_DEBUG(2, "%s(), Releasing Region %03x\n",
437 __func__, self->io.fir_base);
438 release_region(self->io.fir_base, self->io.fir_ext);
439 if (self->tx_buff.head)
440 dma_free_coherent(&pdev->dev, self->tx_buff.truesize,
441 self->tx_buff.head, self->tx_buff_dma);
442 if (self->rx_buff.head)
443 dma_free_coherent(&pdev->dev, self->rx_buff.truesize,
444 self->rx_buff.head, self->rx_buff_dma);
445 pci_set_drvdata(pdev, NULL);
447 free_netdev(self->netdev);
449 pci_disable_device(pdev);
453 * Function via_hw_init(self)
455 * Returns non-negative on success.
457 * Formerly via_ircc_setup
459 static void via_hw_init(struct via_ircc_cb *self)
461 int iobase = self->io.fir_base;
463 IRDA_DEBUG(3, "%s()\n", __func__);
465 SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095
467 EnRXFIFOReadyInt(iobase, OFF);
468 EnRXFIFOHalfLevelInt(iobase, OFF);
469 EnTXFIFOHalfLevelInt(iobase, OFF);
470 EnTXFIFOUnderrunEOMInt(iobase, ON);
471 EnTXFIFOReadyInt(iobase, OFF);
472 InvertTX(iobase, OFF);
473 InvertRX(iobase, OFF);
475 if (ReadLPCReg(0x20) == 0x3c)
476 WriteLPCReg(0xF0, 0); // for VT1211
478 EnRXSpecInt(iobase, ON);
480 /* The following is basically hwreset */
481 /* If this is the case, why not just call hwreset() ? Jean II */
482 ResetChip(iobase, 5);
483 EnableDMA(iobase, OFF);
484 EnableTX(iobase, OFF);
485 EnableRX(iobase, OFF);
486 EnRXDMA(iobase, OFF);
487 EnTXDMA(iobase, OFF);
488 RXStart(iobase, OFF);
489 TXStart(iobase, OFF);
492 SIRFilter(iobase, ON);
496 WriteReg(iobase, I_ST_CT_0, 0x00);
497 SetBaudRate(iobase, 9600);
498 SetPulseWidth(iobase, 12);
499 SetSendPreambleCount(iobase, 0);
501 self->io.speed = 9600;
502 self->st_fifo.len = 0;
504 via_ircc_change_dongle_speed(iobase, self->io.speed,
507 WriteReg(iobase, I_ST_CT_0, 0x80);
511 * Function via_ircc_read_dongle_id (void)
514 static int via_ircc_read_dongle_id(int iobase)
516 int dongle_id = 9; /* Default to IBM */
518 IRDA_ERROR("via-ircc: dongle probing not supported, please specify dongle_id module parameter.\n");
523 * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
524 * Change speed of the attach dongle
525 * only implement two type of dongle currently.
527 static void via_ircc_change_dongle_speed(int iobase, int speed,
532 /* speed is unused, as we use IsSIROn()/IsMIROn() */
535 IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n",
536 __func__, speed, iobase, dongle_id);
540 /* Note: The dongle_id's listed here are derived from
543 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
544 UseOneRX(iobase, ON); // use one RX pin RX1,RX2
545 InvertTX(iobase, OFF);
546 InvertRX(iobase, OFF);
548 EnRX2(iobase, ON); //sir to rx2
549 EnGPIOtoRX2(iobase, OFF);
551 if (IsSIROn(iobase)) { //sir
553 SlowIRRXLowActive(iobase, ON);
555 SlowIRRXLowActive(iobase, OFF);
557 if (IsMIROn(iobase)) { //mir
559 SlowIRRXLowActive(iobase, OFF);
562 if (IsFIROn(iobase)) { //fir
564 SlowIRRXLowActive(iobase, OFF);
571 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
572 UseOneRX(iobase, ON); //use ONE RX....RX1
573 InvertTX(iobase, OFF);
574 InvertRX(iobase, OFF); // invert RX pin
577 EnGPIOtoRX2(iobase, OFF);
578 if (IsSIROn(iobase)) { //sir
580 SlowIRRXLowActive(iobase, ON);
583 SlowIRRXLowActive(iobase, OFF);
585 if (IsMIROn(iobase)) { //mir
587 SlowIRRXLowActive(iobase, OFF);
590 SlowIRRXLowActive(iobase, ON);
592 if (IsFIROn(iobase)) { //fir
594 SlowIRRXLowActive(iobase, OFF);
599 SlowIRRXLowActive(iobase, ON);
602 WriteTX(iobase, OFF);
608 UseOneRX(iobase, OFF); // use two RX pin RX1,RX2
609 InvertTX(iobase, OFF);
610 InvertRX(iobase, OFF);
611 SlowIRRXLowActive(iobase, OFF);
612 if (IsSIROn(iobase)) { //sir
613 EnGPIOtoRX2(iobase, OFF);
614 WriteGIO(iobase, OFF);
615 EnRX2(iobase, OFF); //sir to rx2
617 EnGPIOtoRX2(iobase, OFF);
618 WriteGIO(iobase, OFF);
619 EnRX2(iobase, OFF); //fir to rx
623 case 0x11: /* Temic TFDS4500 */
625 IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __func__);
627 UseOneRX(iobase, ON); //use ONE RX....RX1
628 InvertTX(iobase, OFF);
629 InvertRX(iobase, ON); // invert RX pin
631 EnRX2(iobase, ON); //sir to rx2
632 EnGPIOtoRX2(iobase, OFF);
634 if( IsSIROn(iobase) ){ //sir
637 SlowIRRXLowActive(iobase, ON);
640 SlowIRRXLowActive(iobase, OFF);
643 IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __func__);
647 case 0x0ff: /* Vishay */
650 else if (IsMIROn(iobase))
652 else if (IsFIROn(iobase))
654 else if (IsVFIROn(iobase))
656 SI_SetMode(iobase, mode);
660 IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n",
661 __func__, dongle_id);
666 * Function via_ircc_change_speed (self, baud)
668 * Change the speed of the device
671 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
673 struct net_device *dev = self->netdev;
677 iobase = self->io.fir_base;
678 /* Update accounting for new speed */
679 self->io.speed = speed;
680 IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __func__, speed);
682 WriteReg(iobase, I_ST_CT_0, 0x0);
684 /* Controller mode sellection */
692 value = (115200/speed)-1;
697 /* FIXME: this can't be right, as it's the same as 115200,
698 * and 576000 is MIR, not SIR. */
711 SetPulseWidth(iobase, 0);
712 SetSendPreambleCount(iobase, 14);
726 /* Set baudrate to 0x19[2..7] */
727 bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
729 WriteReg(iobase, I_CF_H_1, bTmp);
731 /* Some dongles may need to be informed about speed changes. */
732 via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
734 /* Set FIFO size to 64 */
738 WriteReg(iobase, I_ST_CT_0, 0x80);
740 // EnTXFIFOHalfLevelInt(iobase,ON);
742 /* Enable some interrupts so we can receive frames */
743 //EnAllInt(iobase,ON);
745 if (IsSIROn(iobase)) {
746 SIRFilter(iobase, ON);
747 SIRRecvAny(iobase, ON);
749 SIRFilter(iobase, OFF);
750 SIRRecvAny(iobase, OFF);
753 if (speed > 115200) {
754 /* Install FIR xmit handler */
755 dev->netdev_ops = &via_ircc_fir_ops;
756 via_ircc_dma_receive(self);
758 /* Install SIR xmit handler */
759 dev->netdev_ops = &via_ircc_sir_ops;
761 netif_wake_queue(dev);
765 * Function via_ircc_hard_xmit (skb, dev)
767 * Transmit the frame!
770 static netdev_tx_t via_ircc_hard_xmit_sir(struct sk_buff *skb,
771 struct net_device *dev)
773 struct via_ircc_cb *self;
778 self = netdev_priv(dev);
779 IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
780 iobase = self->io.fir_base;
782 netif_stop_queue(dev);
783 /* Check if we need to change the speed */
784 speed = irda_get_next_speed(skb);
785 if ((speed != self->io.speed) && (speed != -1)) {
786 /* Check for empty frame */
788 via_ircc_change_speed(self, speed);
789 dev->trans_start = jiffies;
793 self->new_speed = speed;
797 SIRFilter(iobase, ON);
801 WriteReg(iobase, I_ST_CT_0, 0x00);
803 spin_lock_irqsave(&self->lock, flags);
804 self->tx_buff.data = self->tx_buff.head;
806 async_wrap_skb(skb, self->tx_buff.data,
807 self->tx_buff.truesize);
809 dev->stats.tx_bytes += self->tx_buff.len;
810 /* Send this frame with old speed */
811 SetBaudRate(iobase, self->io.speed);
812 SetPulseWidth(iobase, 12);
813 SetSendPreambleCount(iobase, 0);
814 WriteReg(iobase, I_ST_CT_0, 0x80);
816 EnableTX(iobase, ON);
817 EnableRX(iobase, OFF);
819 ResetChip(iobase, 0);
820 ResetChip(iobase, 1);
821 ResetChip(iobase, 2);
822 ResetChip(iobase, 3);
823 ResetChip(iobase, 4);
825 EnAllInt(iobase, ON);
827 EnRXDMA(iobase, OFF);
829 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
832 SetSendByte(iobase, self->tx_buff.len);
833 RXStart(iobase, OFF);
836 dev->trans_start = jiffies;
837 spin_unlock_irqrestore(&self->lock, flags);
842 static netdev_tx_t via_ircc_hard_xmit_fir(struct sk_buff *skb,
843 struct net_device *dev)
845 struct via_ircc_cb *self;
850 self = netdev_priv(dev);
851 iobase = self->io.fir_base;
853 if (self->st_fifo.len)
855 if (self->chip_id == 0x3076)
859 netif_stop_queue(dev);
860 speed = irda_get_next_speed(skb);
861 if ((speed != self->io.speed) && (speed != -1)) {
863 via_ircc_change_speed(self, speed);
864 dev->trans_start = jiffies;
868 self->new_speed = speed;
870 spin_lock_irqsave(&self->lock, flags);
871 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
872 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
874 self->tx_fifo.tail += skb->len;
875 dev->stats.tx_bytes += skb->len;
876 skb_copy_from_linear_data(skb,
877 self->tx_fifo.queue[self->tx_fifo.free].start, skb->len);
879 self->tx_fifo.free++;
880 //F01 if (self->tx_fifo.len == 1) {
881 via_ircc_dma_xmit(self, iobase);
883 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
884 dev->trans_start = jiffies;
886 spin_unlock_irqrestore(&self->lock, flags);
891 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
893 EnTXDMA(iobase, OFF);
894 self->io.direction = IO_XMIT;
896 EnableTX(iobase, ON);
897 EnableRX(iobase, OFF);
898 ResetChip(iobase, 0);
899 ResetChip(iobase, 1);
900 ResetChip(iobase, 2);
901 ResetChip(iobase, 3);
902 ResetChip(iobase, 4);
903 EnAllInt(iobase, ON);
905 EnRXDMA(iobase, OFF);
906 irda_setup_dma(self->io.dma,
907 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
908 self->tx_buff.head) + self->tx_buff_dma,
909 self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
910 IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
911 __func__, self->tx_fifo.ptr,
912 self->tx_fifo.queue[self->tx_fifo.ptr].len,
915 SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
916 RXStart(iobase, OFF);
923 * Function via_ircc_dma_xmit_complete (self)
925 * The transfer of a frame in finished. This function will only be called
926 * by the interrupt handler
929 static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
935 IRDA_DEBUG(3, "%s()\n", __func__);
937 iobase = self->io.fir_base;
939 // DisableDmaChannel(self->io.dma);
940 /* Check for underrun! */
941 /* Clear bit, by writing 1 into it */
942 Tx_status = GetTXStatus(iobase);
943 if (Tx_status & 0x08) {
944 self->netdev->stats.tx_errors++;
945 self->netdev->stats.tx_fifo_errors++;
947 /* how to clear underrun? */
949 self->netdev->stats.tx_packets++;
950 ResetChip(iobase, 3);
951 ResetChip(iobase, 4);
953 /* Check if we need to change the speed */
954 if (self->new_speed) {
955 via_ircc_change_speed(self, self->new_speed);
959 /* Finished with this frame, so prepare for next */
960 if (IsFIROn(iobase)) {
961 if (self->tx_fifo.len) {
967 "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
969 self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free);
971 // Any frames to be sent back-to-back?
972 if (self->tx_fifo.len) {
974 via_ircc_dma_xmit(self, iobase);
978 // Reset Tx FIFO info
979 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
980 self->tx_fifo.tail = self->tx_buff.head;
983 // Make sure we have room for more frames
984 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
985 // Not busy transmitting anymore
986 // Tell the network layer, that we can accept more frames
987 netif_wake_queue(self->netdev);
993 * Function via_ircc_dma_receive (self)
995 * Set configuration for receive a frame.
998 static int via_ircc_dma_receive(struct via_ircc_cb *self)
1002 iobase = self->io.fir_base;
1004 IRDA_DEBUG(3, "%s()\n", __func__);
1006 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1007 self->tx_fifo.tail = self->tx_buff.head;
1008 self->RxDataReady = 0;
1009 self->io.direction = IO_RECV;
1010 self->rx_buff.data = self->rx_buff.head;
1011 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1012 self->st_fifo.tail = self->st_fifo.head = 0;
1015 EnableTX(iobase, OFF);
1016 EnableRX(iobase, ON);
1018 ResetChip(iobase, 0);
1019 ResetChip(iobase, 1);
1020 ResetChip(iobase, 2);
1021 ResetChip(iobase, 3);
1022 ResetChip(iobase, 4);
1024 EnAllInt(iobase, ON);
1025 EnTXDMA(iobase, OFF);
1026 EnRXDMA(iobase, ON);
1027 irda_setup_dma(self->io.dma2, self->rx_buff_dma,
1028 self->rx_buff.truesize, DMA_RX_MODE);
1029 TXStart(iobase, OFF);
1030 RXStart(iobase, ON);
1036 * Function via_ircc_dma_receive_complete (self)
1038 * Controller Finished with receiving frames,
1039 * and this routine is call by ISR
1042 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
1045 struct st_fifo *st_fifo;
1046 struct sk_buff *skb;
1050 iobase = self->io.fir_base;
1051 st_fifo = &self->st_fifo;
1053 if (self->io.speed < 4000000) { //Speed below FIR
1054 len = GetRecvByte(iobase, self);
1055 skb = dev_alloc_skb(len + 1);
1058 // Make sure IP header gets aligned
1059 skb_reserve(skb, 1);
1060 skb_put(skb, len - 2);
1061 if (self->chip_id == 0x3076) {
1062 for (i = 0; i < len - 2; i++)
1063 skb->data[i] = self->rx_buff.data[i * 2];
1065 if (self->chip_id == 0x3096) {
1066 for (i = 0; i < len - 2; i++)
1068 self->rx_buff.data[i];
1071 // Move to next frame
1072 self->rx_buff.data += len;
1073 self->netdev->stats.rx_bytes += len;
1074 self->netdev->stats.rx_packets++;
1075 skb->dev = self->netdev;
1076 skb_reset_mac_header(skb);
1077 skb->protocol = htons(ETH_P_IRDA);
1083 len = GetRecvByte(iobase, self);
1085 return TRUE; //interrupt only, data maybe move by RxT
1086 if (((len - 4) < 2) || ((len - 4) > 2048)) {
1087 IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1088 __func__, len, RxCurCount(iobase, self),
1093 IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n",
1095 st_fifo->len, len - 4, RxCurCount(iobase, self));
1097 st_fifo->entries[st_fifo->tail].status = status;
1098 st_fifo->entries[st_fifo->tail].len = len;
1099 st_fifo->pending_bytes += len;
1102 if (st_fifo->tail > MAX_RX_WINDOW)
1104 self->RxDataReady = 0;
1106 // It maybe have MAX_RX_WINDOW package receive by
1107 // receive_complete before Timer IRQ
1109 if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
1115 EnableRX(iobase, OFF);
1116 EnRXDMA(iobase, OFF);
1117 RXStart(iobase, OFF);
1119 // Put this entry back in fifo
1120 if (st_fifo->head > MAX_RX_WINDOW)
1122 status = st_fifo->entries[st_fifo->head].status;
1123 len = st_fifo->entries[st_fifo->head].len;
1127 skb = dev_alloc_skb(len + 1 - 4);
1129 * if frame size, data ptr, or skb ptr are wrong, then get next
1132 if ((skb == NULL) || (skb->data == NULL) ||
1133 (self->rx_buff.data == NULL) || (len < 6)) {
1134 self->netdev->stats.rx_dropped++;
1138 skb_reserve(skb, 1);
1139 skb_put(skb, len - 4);
1141 skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
1142 IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __func__,
1143 len - 4, self->rx_buff.data);
1145 // Move to next frame
1146 self->rx_buff.data += len;
1147 self->netdev->stats.rx_bytes += len;
1148 self->netdev->stats.rx_packets++;
1149 skb->dev = self->netdev;
1150 skb_reset_mac_header(skb);
1151 skb->protocol = htons(ETH_P_IRDA);
1161 * if frame is received , but no INT ,then use this routine to upload frame.
1163 static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1165 struct sk_buff *skb;
1167 struct st_fifo *st_fifo;
1168 st_fifo = &self->st_fifo;
1170 len = GetRecvByte(iobase, self);
1172 IRDA_DEBUG(2, "%s(): len=%x\n", __func__, len);
1174 if ((len - 4) < 2) {
1175 self->netdev->stats.rx_dropped++;
1179 skb = dev_alloc_skb(len + 1);
1181 self->netdev->stats.rx_dropped++;
1184 skb_reserve(skb, 1);
1185 skb_put(skb, len - 4 + 1);
1186 skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4 + 1);
1189 if (st_fifo->tail > MAX_RX_WINDOW)
1191 // Move to next frame
1192 self->rx_buff.data += len;
1193 self->netdev->stats.rx_bytes += len;
1194 self->netdev->stats.rx_packets++;
1195 skb->dev = self->netdev;
1196 skb_reset_mac_header(skb);
1197 skb->protocol = htons(ETH_P_IRDA);
1199 if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
1200 RXStart(iobase, ON);
1202 EnableRX(iobase, OFF);
1203 EnRXDMA(iobase, OFF);
1204 RXStart(iobase, OFF);
1210 * Implement back to back receive , use this routine to upload data.
1213 static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
1215 struct st_fifo *st_fifo;
1216 struct sk_buff *skb;
1220 st_fifo = &self->st_fifo;
1222 if (CkRxRecv(iobase, self)) {
1223 // if still receiving ,then return ,don't upload frame
1224 self->RetryCount = 0;
1225 SetTimer(iobase, 20);
1226 self->RxDataReady++;
1231 if ((self->RetryCount >= 1) ||
1232 ((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize) ||
1233 (st_fifo->len >= (MAX_RX_WINDOW))) {
1234 while (st_fifo->len > 0) { //upload frame
1235 // Put this entry back in fifo
1236 if (st_fifo->head > MAX_RX_WINDOW)
1238 status = st_fifo->entries[st_fifo->head].status;
1239 len = st_fifo->entries[st_fifo->head].len;
1243 skb = dev_alloc_skb(len + 1 - 4);
1245 * if frame size, data ptr, or skb ptr are wrong,
1246 * then get next entry.
1248 if ((skb == NULL) || (skb->data == NULL) ||
1249 (self->rx_buff.data == NULL) || (len < 6)) {
1250 self->netdev->stats.rx_dropped++;
1253 skb_reserve(skb, 1);
1254 skb_put(skb, len - 4);
1255 skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
1257 IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __func__,
1258 len - 4, st_fifo->head);
1260 // Move to next frame
1261 self->rx_buff.data += len;
1262 self->netdev->stats.rx_bytes += len;
1263 self->netdev->stats.rx_packets++;
1264 skb->dev = self->netdev;
1265 skb_reset_mac_header(skb);
1266 skb->protocol = htons(ETH_P_IRDA);
1269 self->RetryCount = 0;
1272 "%s(): End of upload HostStatus=%x,RxStatus=%x\n",
1274 GetHostStatus(iobase), GetRXStatus(iobase));
1277 * if frame is receive complete at this routine ,then upload
1280 if ((GetRXStatus(iobase) & 0x10) &&
1281 (RxCurCount(iobase, self) != self->RxLastCount)) {
1282 upload_rxdata(self, iobase);
1283 if (irda_device_txqueue_empty(self->netdev))
1284 via_ircc_dma_receive(self);
1286 } // timer detect complete
1288 SetTimer(iobase, 4);
1296 * Function via_ircc_interrupt (irq, dev_id)
1298 * An interrupt from the chip has arrived. Time to do some work
1301 static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id)
1303 struct net_device *dev = dev_id;
1304 struct via_ircc_cb *self = netdev_priv(dev);
1306 u8 iHostIntType, iRxIntType, iTxIntType;
1308 iobase = self->io.fir_base;
1309 spin_lock(&self->lock);
1310 iHostIntType = GetHostStatus(iobase);
1312 IRDA_DEBUG(4, "%s(): iHostIntType %02x: %s %s %s %02x\n",
1313 __func__, iHostIntType,
1314 (iHostIntType & 0x40) ? "Timer" : "",
1315 (iHostIntType & 0x20) ? "Tx" : "",
1316 (iHostIntType & 0x10) ? "Rx" : "",
1317 (iHostIntType & 0x0e) >> 1);
1319 if ((iHostIntType & 0x40) != 0) { //Timer Event
1320 self->EventFlag.TimeOut++;
1321 ClearTimerInt(iobase, 1);
1322 if (self->io.direction == IO_XMIT) {
1323 via_ircc_dma_xmit(self, iobase);
1325 if (self->io.direction == IO_RECV) {
1327 * frame ready hold too long, must reset.
1329 if (self->RxDataReady > 30) {
1331 if (irda_device_txqueue_empty(self->netdev)) {
1332 via_ircc_dma_receive(self);
1334 } else { // call this to upload frame.
1335 RxTimerHandler(self, iobase);
1339 if ((iHostIntType & 0x20) != 0) { //Tx Event
1340 iTxIntType = GetTXStatus(iobase);
1342 IRDA_DEBUG(4, "%s(): iTxIntType %02x: %s %s %s %s\n",
1343 __func__, iTxIntType,
1344 (iTxIntType & 0x08) ? "FIFO underr." : "",
1345 (iTxIntType & 0x04) ? "EOM" : "",
1346 (iTxIntType & 0x02) ? "FIFO ready" : "",
1347 (iTxIntType & 0x01) ? "Early EOM" : "");
1349 if (iTxIntType & 0x4) {
1350 self->EventFlag.EOMessage++; // read and will auto clean
1351 if (via_ircc_dma_xmit_complete(self)) {
1352 if (irda_device_txqueue_empty
1354 via_ircc_dma_receive(self);
1357 self->EventFlag.Unknown++;
1361 //----------------------------------------
1362 if ((iHostIntType & 0x10) != 0) { //Rx Event
1363 /* Check if DMA has finished */
1364 iRxIntType = GetRXStatus(iobase);
1366 IRDA_DEBUG(4, "%s(): iRxIntType %02x: %s %s %s %s %s %s %s\n",
1367 __func__, iRxIntType,
1368 (iRxIntType & 0x80) ? "PHY err." : "",
1369 (iRxIntType & 0x40) ? "CRC err" : "",
1370 (iRxIntType & 0x20) ? "FIFO overr." : "",
1371 (iRxIntType & 0x10) ? "EOF" : "",
1372 (iRxIntType & 0x08) ? "RxData" : "",
1373 (iRxIntType & 0x02) ? "RxMaxLen" : "",
1374 (iRxIntType & 0x01) ? "SIR bad" : "");
1376 IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __func__);
1378 if (iRxIntType & 0x10) {
1379 if (via_ircc_dma_receive_complete(self, iobase)) {
1380 //F01 if(!(IsFIROn(iobase))) via_ircc_dma_receive(self);
1381 via_ircc_dma_receive(self);
1385 IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1386 __func__, iRxIntType, iHostIntType,
1387 RxCurCount(iobase, self),
1390 if (iRxIntType & 0x20) { //FIFO OverRun ERR
1391 ResetChip(iobase, 0);
1392 ResetChip(iobase, 1);
1393 } else { //PHY,CRC ERR
1395 if (iRxIntType != 0x08)
1396 hwreset(self); //F01
1398 via_ircc_dma_receive(self);
1402 spin_unlock(&self->lock);
1403 return IRQ_RETVAL(iHostIntType);
1406 static void hwreset(struct via_ircc_cb *self)
1409 iobase = self->io.fir_base;
1411 IRDA_DEBUG(3, "%s()\n", __func__);
1413 ResetChip(iobase, 5);
1414 EnableDMA(iobase, OFF);
1415 EnableTX(iobase, OFF);
1416 EnableRX(iobase, OFF);
1417 EnRXDMA(iobase, OFF);
1418 EnTXDMA(iobase, OFF);
1419 RXStart(iobase, OFF);
1420 TXStart(iobase, OFF);
1423 SIRFilter(iobase, ON);
1427 WriteReg(iobase, I_ST_CT_0, 0x00);
1428 SetBaudRate(iobase, 9600);
1429 SetPulseWidth(iobase, 12);
1430 SetSendPreambleCount(iobase, 0);
1431 WriteReg(iobase, I_ST_CT_0, 0x80);
1433 /* Restore speed. */
1434 via_ircc_change_speed(self, self->io.speed);
1436 self->st_fifo.len = 0;
1440 * Function via_ircc_is_receiving (self)
1442 * Return TRUE is we are currently receiving a frame
1445 static int via_ircc_is_receiving(struct via_ircc_cb *self)
1450 IRDA_ASSERT(self != NULL, return FALSE;);
1452 iobase = self->io.fir_base;
1453 if (CkRxRecv(iobase, self))
1456 IRDA_DEBUG(2, "%s(): status=%x....\n", __func__, status);
1463 * Function via_ircc_net_open (dev)
1468 static int via_ircc_net_open(struct net_device *dev)
1470 struct via_ircc_cb *self;
1474 IRDA_DEBUG(3, "%s()\n", __func__);
1476 IRDA_ASSERT(dev != NULL, return -1;);
1477 self = netdev_priv(dev);
1478 dev->stats.rx_packets = 0;
1479 IRDA_ASSERT(self != NULL, return 0;);
1480 iobase = self->io.fir_base;
1481 if (request_irq(self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
1482 IRDA_WARNING("%s, unable to allocate irq=%d\n", driver_name,
1487 * Always allocate the DMA channel after the IRQ, and clean up on
1490 if (request_dma(self->io.dma, dev->name)) {
1491 IRDA_WARNING("%s, unable to allocate dma=%d\n", driver_name,
1493 free_irq(self->io.irq, dev);
1496 if (self->io.dma2 != self->io.dma) {
1497 if (request_dma(self->io.dma2, dev->name)) {
1498 IRDA_WARNING("%s, unable to allocate dma2=%d\n",
1499 driver_name, self->io.dma2);
1500 free_irq(self->io.irq, dev);
1501 free_dma(self->io.dma);
1507 /* turn on interrupts */
1508 EnAllInt(iobase, ON);
1509 EnInternalLoop(iobase, OFF);
1510 EnExternalLoop(iobase, OFF);
1513 via_ircc_dma_receive(self);
1515 /* Ready to play! */
1516 netif_start_queue(dev);
1519 * Open new IrLAP layer instance, now that everything should be
1520 * initialized properly
1522 sprintf(hwname, "VIA @ 0x%x", iobase);
1523 self->irlap = irlap_open(dev, &self->qos, hwname);
1525 self->RxLastCount = 0;
1531 * Function via_ircc_net_close (dev)
1536 static int via_ircc_net_close(struct net_device *dev)
1538 struct via_ircc_cb *self;
1541 IRDA_DEBUG(3, "%s()\n", __func__);
1543 IRDA_ASSERT(dev != NULL, return -1;);
1544 self = netdev_priv(dev);
1545 IRDA_ASSERT(self != NULL, return 0;);
1548 netif_stop_queue(dev);
1549 /* Stop and remove instance of IrLAP */
1551 irlap_close(self->irlap);
1553 iobase = self->io.fir_base;
1554 EnTXDMA(iobase, OFF);
1555 EnRXDMA(iobase, OFF);
1556 DisableDmaChannel(self->io.dma);
1558 /* Disable interrupts */
1559 EnAllInt(iobase, OFF);
1560 free_irq(self->io.irq, dev);
1561 free_dma(self->io.dma);
1562 if (self->io.dma2 != self->io.dma)
1563 free_dma(self->io.dma2);
1569 * Function via_ircc_net_ioctl (dev, rq, cmd)
1571 * Process IOCTL commands for this device
1574 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
1577 struct if_irda_req *irq = (struct if_irda_req *) rq;
1578 struct via_ircc_cb *self;
1579 unsigned long flags;
1582 IRDA_ASSERT(dev != NULL, return -1;);
1583 self = netdev_priv(dev);
1584 IRDA_ASSERT(self != NULL, return -1;);
1585 IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name,
1587 /* Disable interrupts & save flags */
1588 spin_lock_irqsave(&self->lock, flags);
1590 case SIOCSBANDWIDTH: /* Set bandwidth */
1591 if (!capable(CAP_NET_ADMIN)) {
1595 via_ircc_change_speed(self, irq->ifr_baudrate);
1597 case SIOCSMEDIABUSY: /* Set media busy */
1598 if (!capable(CAP_NET_ADMIN)) {
1602 irda_device_set_media_busy(self->netdev, TRUE);
1604 case SIOCGRECEIVING: /* Check if we are receiving right now */
1605 irq->ifr_receiving = via_ircc_is_receiving(self);
1611 spin_unlock_irqrestore(&self->lock, flags);
1615 MODULE_AUTHOR("VIA Technologies,inc");
1616 MODULE_DESCRIPTION("VIA IrDA Device Driver");
1617 MODULE_LICENSE("GPL");
1619 module_init(via_ircc_init);
1620 module_exit(via_ircc_cleanup);