1 /*******************************************************************************
2 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3 ST Ethernet IPs are built around a Synopsys IP Core.
5 Copyright(C) 2007-2011 STMicroelectronics Ltd
7 This program is free software; you can redistribute it and/or modify it
8 under the terms and conditions of the GNU General Public License,
9 version 2, as published by the Free Software Foundation.
11 This program is distributed in the hope it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc.,
18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 The full GNU General Public License is included in this distribution in
21 the file called "COPYING".
23 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
25 Documentation available at:
26 http://www.stlinux.com
28 https://bugzilla.stlinux.com/
29 *******************************************************************************/
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/kernel.h>
34 #include <linux/interrupt.h>
35 #include <linux/etherdevice.h>
36 #include <linux/platform_device.h>
38 #include <linux/tcp.h>
39 #include <linux/skbuff.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/crc32.h>
43 #include <linux/mii.h>
45 #include <linux/if_vlan.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/slab.h>
48 #include <linux/prefetch.h>
49 #ifdef CONFIG_STMMAC_DEBUG_FS
50 #include <linux/debugfs.h>
51 #include <linux/seq_file.h>
55 #define STMMAC_RESOURCE_NAME "stmmaceth"
58 /*#define STMMAC_DEBUG*/
60 #define DBG(nlevel, klevel, fmt, args...) \
61 ((void)(netif_msg_##nlevel(priv) && \
62 printk(KERN_##klevel fmt, ## args)))
64 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
67 #undef STMMAC_RX_DEBUG
68 /*#define STMMAC_RX_DEBUG*/
69 #ifdef STMMAC_RX_DEBUG
70 #define RX_DBG(fmt, args...) printk(fmt, ## args)
72 #define RX_DBG(fmt, args...) do { } while (0)
75 #undef STMMAC_XMIT_DEBUG
76 /*#define STMMAC_XMIT_DEBUG*/
77 #ifdef STMMAC_TX_DEBUG
78 #define TX_DBG(fmt, args...) printk(fmt, ## args)
80 #define TX_DBG(fmt, args...) do { } while (0)
83 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
84 #define JUMBO_LEN 9000
86 /* Module parameters */
87 #define TX_TIMEO 5000 /* default 5 seconds */
88 static int watchdog = TX_TIMEO;
89 module_param(watchdog, int, S_IRUGO | S_IWUSR);
90 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
92 static int debug = -1; /* -1: default, 0: no output, 16: all */
93 module_param(debug, int, S_IRUGO | S_IWUSR);
94 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
96 static int phyaddr = -1;
97 module_param(phyaddr, int, S_IRUGO);
98 MODULE_PARM_DESC(phyaddr, "Physical device address");
100 #define DMA_TX_SIZE 256
101 static int dma_txsize = DMA_TX_SIZE;
102 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
103 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
105 #define DMA_RX_SIZE 256
106 static int dma_rxsize = DMA_RX_SIZE;
107 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
108 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
110 static int flow_ctrl = FLOW_OFF;
111 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
112 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
114 static int pause = PAUSE_TIME;
115 module_param(pause, int, S_IRUGO | S_IWUSR);
116 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
118 #define TC_DEFAULT 64
119 static int tc = TC_DEFAULT;
120 module_param(tc, int, S_IRUGO | S_IWUSR);
121 MODULE_PARM_DESC(tc, "DMA threshold control value");
123 /* Pay attention to tune this parameter; take care of both
124 * hardware capability and network stabitily/performance impact.
125 * Many tests showed that ~4ms latency seems to be good enough. */
126 #ifdef CONFIG_STMMAC_TIMER
127 #define DEFAULT_PERIODIC_RATE 256
128 static int tmrate = DEFAULT_PERIODIC_RATE;
129 module_param(tmrate, int, S_IRUGO | S_IWUSR);
130 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
133 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
134 static int buf_sz = DMA_BUFFER_SIZE;
135 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
136 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
138 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
139 NETIF_MSG_LINK | NETIF_MSG_IFUP |
140 NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
142 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
145 * stmmac_verify_args - verify the driver parameters.
146 * Description: it verifies if some wrong parameter is passed to the driver.
147 * Note that wrong parameters are replaced with the default values.
149 static void stmmac_verify_args(void)
151 if (unlikely(watchdog < 0))
153 if (unlikely(dma_rxsize < 0))
154 dma_rxsize = DMA_RX_SIZE;
155 if (unlikely(dma_txsize < 0))
156 dma_txsize = DMA_TX_SIZE;
157 if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
158 buf_sz = DMA_BUFFER_SIZE;
159 if (unlikely(flow_ctrl > 1))
160 flow_ctrl = FLOW_AUTO;
161 else if (likely(flow_ctrl < 0))
162 flow_ctrl = FLOW_OFF;
163 if (unlikely((pause < 0) || (pause > 0xffff)))
167 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
168 static void print_pkt(unsigned char *buf, int len)
171 pr_info("len = %d byte, buf addr: 0x%p", len, buf);
172 for (j = 0; j < len; j++) {
174 pr_info("\n %03x:", j);
175 pr_info(" %02x", buf[j]);
181 /* minimum number of free TX descriptors required to wake up TX process */
182 #define STMMAC_TX_THRESH(x) (x->dma_tx_size/4)
184 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
186 return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
189 /* On some ST platforms, some HW system configuraton registers have to be
190 * set according to the link speed negotiated.
192 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
194 struct phy_device *phydev = priv->phydev;
196 if (likely(priv->plat->fix_mac_speed))
197 priv->plat->fix_mac_speed(priv->plat->bsp_priv,
203 * @dev: net device structure
204 * Description: it adjusts the link parameters.
206 static void stmmac_adjust_link(struct net_device *dev)
208 struct stmmac_priv *priv = netdev_priv(dev);
209 struct phy_device *phydev = priv->phydev;
212 unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
217 DBG(probe, DEBUG, "stmmac_adjust_link: called. address %d link %d\n",
218 phydev->addr, phydev->link);
220 spin_lock_irqsave(&priv->lock, flags);
222 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
224 /* Now we make sure that we can be in full duplex mode.
225 * If not, we operate in half-duplex mode. */
226 if (phydev->duplex != priv->oldduplex) {
228 if (!(phydev->duplex))
229 ctrl &= ~priv->hw->link.duplex;
231 ctrl |= priv->hw->link.duplex;
232 priv->oldduplex = phydev->duplex;
234 /* Flow Control operation */
236 priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
239 if (phydev->speed != priv->speed) {
241 switch (phydev->speed) {
243 if (likely(priv->plat->has_gmac))
244 ctrl &= ~priv->hw->link.port;
245 stmmac_hw_fix_mac_speed(priv);
249 if (priv->plat->has_gmac) {
250 ctrl |= priv->hw->link.port;
251 if (phydev->speed == SPEED_100) {
252 ctrl |= priv->hw->link.speed;
254 ctrl &= ~(priv->hw->link.speed);
257 ctrl &= ~priv->hw->link.port;
259 stmmac_hw_fix_mac_speed(priv);
262 if (netif_msg_link(priv))
263 pr_warning("%s: Speed (%d) is not 10"
264 " or 100!\n", dev->name, phydev->speed);
268 priv->speed = phydev->speed;
271 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
273 if (!priv->oldlink) {
277 } else if (priv->oldlink) {
281 priv->oldduplex = -1;
284 if (new_state && netif_msg_link(priv))
285 phy_print_status(phydev);
287 spin_unlock_irqrestore(&priv->lock, flags);
289 DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
293 * stmmac_init_phy - PHY initialization
294 * @dev: net device structure
295 * Description: it initializes the driver's PHY state, and attaches the PHY
300 static int stmmac_init_phy(struct net_device *dev)
302 struct stmmac_priv *priv = netdev_priv(dev);
303 struct phy_device *phydev;
304 char phy_id[MII_BUS_ID_SIZE + 3];
305 char bus_id[MII_BUS_ID_SIZE];
306 int interface = priv->plat->interface;
309 priv->oldduplex = -1;
311 snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
312 snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
313 priv->plat->phy_addr);
314 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id);
316 phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0, interface);
318 if (IS_ERR(phydev)) {
319 pr_err("%s: Could not attach to PHY\n", dev->name);
320 return PTR_ERR(phydev);
323 /* Stop Advertising 1000BASE Capability if interface is not GMII */
324 if ((interface == PHY_INTERFACE_MODE_MII) ||
325 (interface == PHY_INTERFACE_MODE_RMII))
326 phydev->advertising &= ~(SUPPORTED_1000baseT_Half |
327 SUPPORTED_1000baseT_Full);
330 * Broken HW is sometimes missing the pull-up resistor on the
331 * MDIO line, which results in reads to non-existent devices returning
332 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
334 * Note: phydev->phy_id is the result of reading the UID PHY registers.
336 if (phydev->phy_id == 0) {
337 phy_disconnect(phydev);
340 pr_debug("stmmac_init_phy: %s: attached to PHY (UID 0x%x)"
341 " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
343 priv->phydev = phydev;
348 static inline void stmmac_enable_mac(void __iomem *ioaddr)
350 u32 value = readl(ioaddr + MAC_CTRL_REG);
352 value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
353 writel(value, ioaddr + MAC_CTRL_REG);
356 static inline void stmmac_disable_mac(void __iomem *ioaddr)
358 u32 value = readl(ioaddr + MAC_CTRL_REG);
360 value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
361 writel(value, ioaddr + MAC_CTRL_REG);
366 * @p: pointer to the ring.
367 * @size: size of the ring.
368 * Description: display all the descriptors within the ring.
370 static void display_ring(struct dma_desc *p, int size)
378 for (i = 0; i < size; i++) {
379 struct tmp_s *x = (struct tmp_s *)(p + i);
380 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
381 i, (unsigned int)virt_to_phys(&p[i]),
382 (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
388 static int stmmac_set_bfsize(int mtu, int bufsize)
392 if (mtu >= BUF_SIZE_4KiB)
394 else if (mtu >= BUF_SIZE_2KiB)
396 else if (mtu >= DMA_BUFFER_SIZE)
399 ret = DMA_BUFFER_SIZE;
405 * init_dma_desc_rings - init the RX/TX descriptor rings
406 * @dev: net device structure
407 * Description: this function initializes the DMA RX/TX descriptors
408 * and allocates the socket buffers. It suppors the chained and ring
411 static void init_dma_desc_rings(struct net_device *dev)
414 struct stmmac_priv *priv = netdev_priv(dev);
416 unsigned int txsize = priv->dma_tx_size;
417 unsigned int rxsize = priv->dma_rx_size;
420 int des3_as_data_buf = 0;
422 /* Set the max buffer size according to the DESC mode
423 * and the MTU. Note that RING mode allows 16KiB bsize. */
424 bfsize = priv->hw->ring->set_16kib_bfsize(dev->mtu);
426 if (bfsize == BUF_SIZE_16KiB)
427 des3_as_data_buf = 1;
429 bfsize = stmmac_set_bfsize(dev->mtu, priv->dma_buf_sz);
431 #ifdef CONFIG_STMMAC_TIMER
432 /* Disable interrupts on completion for the reception if timer is on */
433 if (likely(priv->tm->enable))
437 DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
438 txsize, rxsize, bfsize);
440 priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
442 kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
444 (struct dma_desc *)dma_alloc_coherent(priv->device,
446 sizeof(struct dma_desc),
449 priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
452 (struct dma_desc *)dma_alloc_coherent(priv->device,
454 sizeof(struct dma_desc),
458 if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
459 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
463 DBG(probe, INFO, "stmmac (%s) DMA desc: virt addr (Rx %p, "
464 "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
465 dev->name, priv->dma_rx, priv->dma_tx,
466 (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
468 /* RX INITIALIZATION */
469 DBG(probe, INFO, "stmmac: SKB addresses:\n"
470 "skb\t\tskb data\tdma data\n");
472 for (i = 0; i < rxsize; i++) {
473 struct dma_desc *p = priv->dma_rx + i;
475 skb = __netdev_alloc_skb(dev, bfsize + NET_IP_ALIGN,
477 if (unlikely(skb == NULL)) {
478 pr_err("%s: Rx init fails; skb is NULL\n", __func__);
481 skb_reserve(skb, NET_IP_ALIGN);
482 priv->rx_skbuff[i] = skb;
483 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
484 bfsize, DMA_FROM_DEVICE);
486 p->des2 = priv->rx_skbuff_dma[i];
488 priv->hw->ring->init_desc3(des3_as_data_buf, p);
490 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
491 priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
494 priv->dirty_rx = (unsigned int)(i - rxsize);
495 priv->dma_buf_sz = bfsize;
498 /* TX INITIALIZATION */
499 for (i = 0; i < txsize; i++) {
500 priv->tx_skbuff[i] = NULL;
501 priv->dma_tx[i].des2 = 0;
504 /* In case of Chained mode this sets the des3 to the next
505 * element in the chain */
506 priv->hw->ring->init_dma_chain(priv->dma_rx, priv->dma_rx_phy, rxsize);
507 priv->hw->ring->init_dma_chain(priv->dma_tx, priv->dma_tx_phy, txsize);
512 /* Clear the Rx/Tx descriptors */
513 priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
514 priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
516 if (netif_msg_hw(priv)) {
517 pr_info("RX descriptor ring:\n");
518 display_ring(priv->dma_rx, rxsize);
519 pr_info("TX descriptor ring:\n");
520 display_ring(priv->dma_tx, txsize);
524 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
528 for (i = 0; i < priv->dma_rx_size; i++) {
529 if (priv->rx_skbuff[i]) {
530 dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
531 priv->dma_buf_sz, DMA_FROM_DEVICE);
532 dev_kfree_skb_any(priv->rx_skbuff[i]);
534 priv->rx_skbuff[i] = NULL;
538 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
542 for (i = 0; i < priv->dma_tx_size; i++) {
543 if (priv->tx_skbuff[i] != NULL) {
544 struct dma_desc *p = priv->dma_tx + i;
546 dma_unmap_single(priv->device, p->des2,
547 priv->hw->desc->get_tx_len(p),
549 dev_kfree_skb_any(priv->tx_skbuff[i]);
550 priv->tx_skbuff[i] = NULL;
555 static void free_dma_desc_resources(struct stmmac_priv *priv)
557 /* Release the DMA TX/RX socket buffers */
558 dma_free_rx_skbufs(priv);
559 dma_free_tx_skbufs(priv);
561 /* Free the region of consistent memory previously allocated for
563 dma_free_coherent(priv->device,
564 priv->dma_tx_size * sizeof(struct dma_desc),
565 priv->dma_tx, priv->dma_tx_phy);
566 dma_free_coherent(priv->device,
567 priv->dma_rx_size * sizeof(struct dma_desc),
568 priv->dma_rx, priv->dma_rx_phy);
569 kfree(priv->rx_skbuff_dma);
570 kfree(priv->rx_skbuff);
571 kfree(priv->tx_skbuff);
575 * stmmac_dma_operation_mode - HW DMA operation mode
576 * @priv : pointer to the private device structure.
577 * Description: it sets the DMA operation mode: tx/rx DMA thresholds
578 * or Store-And-Forward capability.
580 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
582 if (likely(priv->plat->force_sf_dma_mode ||
583 ((priv->plat->tx_coe) && (!priv->no_csum_insertion)))) {
585 * In case of GMAC, SF mode can be enabled
586 * to perform the TX COE in HW. This depends on:
587 * 1) TX COE if actually supported
588 * 2) There is no bugged Jumbo frame support
589 * that needs to not insert csum in the TDES.
591 priv->hw->dma->dma_mode(priv->ioaddr,
592 SF_DMA_MODE, SF_DMA_MODE);
595 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
600 * @priv: private driver structure
601 * Description: it reclaims resources after transmission completes.
603 static void stmmac_tx(struct stmmac_priv *priv)
605 unsigned int txsize = priv->dma_tx_size;
607 spin_lock(&priv->tx_lock);
609 while (priv->dirty_tx != priv->cur_tx) {
611 unsigned int entry = priv->dirty_tx % txsize;
612 struct sk_buff *skb = priv->tx_skbuff[entry];
613 struct dma_desc *p = priv->dma_tx + entry;
615 /* Check if the descriptor is owned by the DMA. */
616 if (priv->hw->desc->get_tx_owner(p))
619 /* Verify tx error by looking at the last segment */
620 last = priv->hw->desc->get_tx_ls(p);
623 priv->hw->desc->tx_status(&priv->dev->stats,
626 if (likely(tx_error == 0)) {
627 priv->dev->stats.tx_packets++;
628 priv->xstats.tx_pkt_n++;
630 priv->dev->stats.tx_errors++;
632 TX_DBG("%s: curr %d, dirty %d\n", __func__,
633 priv->cur_tx, priv->dirty_tx);
636 dma_unmap_single(priv->device, p->des2,
637 priv->hw->desc->get_tx_len(p),
639 priv->hw->ring->clean_desc3(p);
641 if (likely(skb != NULL)) {
643 * If there's room in the queue (limit it to size)
644 * we add this skb back into the pool,
645 * if it's the right size.
647 if ((skb_queue_len(&priv->rx_recycle) <
648 priv->dma_rx_size) &&
649 skb_recycle_check(skb, priv->dma_buf_sz))
650 __skb_queue_head(&priv->rx_recycle, skb);
654 priv->tx_skbuff[entry] = NULL;
657 priv->hw->desc->release_tx_desc(p);
659 entry = (++priv->dirty_tx) % txsize;
661 if (unlikely(netif_queue_stopped(priv->dev) &&
662 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
663 netif_tx_lock(priv->dev);
664 if (netif_queue_stopped(priv->dev) &&
665 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
666 TX_DBG("%s: restart transmit\n", __func__);
667 netif_wake_queue(priv->dev);
669 netif_tx_unlock(priv->dev);
671 spin_unlock(&priv->tx_lock);
674 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
676 #ifdef CONFIG_STMMAC_TIMER
677 if (likely(priv->tm->enable))
678 priv->tm->timer_start(tmrate);
681 priv->hw->dma->enable_dma_irq(priv->ioaddr);
684 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
686 #ifdef CONFIG_STMMAC_TIMER
687 if (likely(priv->tm->enable))
688 priv->tm->timer_stop();
691 priv->hw->dma->disable_dma_irq(priv->ioaddr);
694 static int stmmac_has_work(struct stmmac_priv *priv)
696 unsigned int has_work = 0;
697 int rxret, tx_work = 0;
699 rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
700 (priv->cur_rx % priv->dma_rx_size));
702 if (priv->dirty_tx != priv->cur_tx)
705 if (likely(!rxret || tx_work))
711 static inline void _stmmac_schedule(struct stmmac_priv *priv)
713 if (likely(stmmac_has_work(priv))) {
714 stmmac_disable_irq(priv);
715 napi_schedule(&priv->napi);
719 #ifdef CONFIG_STMMAC_TIMER
720 void stmmac_schedule(struct net_device *dev)
722 struct stmmac_priv *priv = netdev_priv(dev);
724 priv->xstats.sched_timer_n++;
726 _stmmac_schedule(priv);
729 static void stmmac_no_timer_started(unsigned int x)
733 static void stmmac_no_timer_stopped(void)
740 * @priv: pointer to the private device structure
741 * Description: it cleans the descriptors and restarts the transmission
744 static void stmmac_tx_err(struct stmmac_priv *priv)
746 netif_stop_queue(priv->dev);
748 priv->hw->dma->stop_tx(priv->ioaddr);
749 dma_free_tx_skbufs(priv);
750 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
753 priv->hw->dma->start_tx(priv->ioaddr);
755 priv->dev->stats.tx_errors++;
756 netif_wake_queue(priv->dev);
760 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
764 status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
765 if (likely(status == handle_tx_rx))
766 _stmmac_schedule(priv);
768 else if (unlikely(status == tx_hard_error_bump_tc)) {
769 /* Try to bump up the dma threshold on this failure */
770 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
772 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
773 priv->xstats.threshold = tc;
775 } else if (unlikely(status == tx_hard_error))
779 static void stmmac_mmc_setup(struct stmmac_priv *priv)
781 unsigned int mode = MMC_CNTRL_RESET_ON_READ | MMC_CNTRL_COUNTER_RESET |
782 MMC_CNTRL_PRESET | MMC_CNTRL_FULL_HALF_PRESET;
784 /* Do not manage MMC IRQ (FIXME) */
785 dwmac_mmc_intr_all_mask(priv->ioaddr);
786 dwmac_mmc_ctrl(priv->ioaddr, mode);
787 memset(&priv->mmc, 0, sizeof(struct stmmac_counters));
790 static u32 stmmac_get_synopsys_id(struct stmmac_priv *priv)
792 u32 hwid = priv->hw->synopsys_uid;
794 /* Only check valid Synopsys Id because old MAC chips
795 * have no HW registers where get the ID */
797 u32 uid = ((hwid & 0x0000ff00) >> 8);
798 u32 synid = (hwid & 0x000000ff);
800 pr_info("STMMAC - user ID: 0x%x, Synopsys ID: 0x%x\n",
809 * stmmac_selec_desc_mode
810 * @dev : device pointer
811 * Description: select the Enhanced/Alternate or Normal descriptors */
812 static void stmmac_selec_desc_mode(struct stmmac_priv *priv)
814 if (priv->plat->enh_desc) {
815 pr_info(" Enhanced/Alternate descriptors\n");
816 priv->hw->desc = &enh_desc_ops;
818 pr_info(" Normal descriptors\n");
819 priv->hw->desc = &ndesc_ops;
824 * stmmac_get_hw_features
825 * @priv : private device pointer
827 * new GMAC chip generations have a new register to indicate the
828 * presence of the optional feature/functions.
829 * This can be also used to override the value passed through the
830 * platform and necessary for old MAC10/100 and GMAC chips.
832 static int stmmac_get_hw_features(struct stmmac_priv *priv)
836 if (priv->hw->dma->get_hw_feature) {
837 hw_cap = priv->hw->dma->get_hw_feature(priv->ioaddr);
839 priv->dma_cap.mbps_10_100 = (hw_cap & DMA_HW_FEAT_MIISEL);
840 priv->dma_cap.mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1;
841 priv->dma_cap.half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2;
842 priv->dma_cap.hash_filter = (hw_cap & DMA_HW_FEAT_HASHSEL) >> 4;
843 priv->dma_cap.multi_addr =
844 (hw_cap & DMA_HW_FEAT_ADDMACADRSEL) >> 5;
845 priv->dma_cap.pcs = (hw_cap & DMA_HW_FEAT_PCSSEL) >> 6;
846 priv->dma_cap.sma_mdio = (hw_cap & DMA_HW_FEAT_SMASEL) >> 8;
847 priv->dma_cap.pmt_remote_wake_up =
848 (hw_cap & DMA_HW_FEAT_RWKSEL) >> 9;
849 priv->dma_cap.pmt_magic_frame =
850 (hw_cap & DMA_HW_FEAT_MGKSEL) >> 10;
852 priv->dma_cap.rmon = (hw_cap & DMA_HW_FEAT_MMCSEL) >> 11;
854 priv->dma_cap.time_stamp =
855 (hw_cap & DMA_HW_FEAT_TSVER1SEL) >> 12;
857 priv->dma_cap.atime_stamp =
858 (hw_cap & DMA_HW_FEAT_TSVER2SEL) >> 13;
859 /* 802.3az - Energy-Efficient Ethernet (EEE) */
860 priv->dma_cap.eee = (hw_cap & DMA_HW_FEAT_EEESEL) >> 14;
861 priv->dma_cap.av = (hw_cap & DMA_HW_FEAT_AVSEL) >> 15;
863 priv->dma_cap.tx_coe = (hw_cap & DMA_HW_FEAT_TXCOESEL) >> 16;
864 priv->dma_cap.rx_coe_type1 =
865 (hw_cap & DMA_HW_FEAT_RXTYP1COE) >> 17;
866 priv->dma_cap.rx_coe_type2 =
867 (hw_cap & DMA_HW_FEAT_RXTYP2COE) >> 18;
868 priv->dma_cap.rxfifo_over_2048 =
869 (hw_cap & DMA_HW_FEAT_RXFIFOSIZE) >> 19;
870 /* TX and RX number of channels */
871 priv->dma_cap.number_rx_channel =
872 (hw_cap & DMA_HW_FEAT_RXCHCNT) >> 20;
873 priv->dma_cap.number_tx_channel =
874 (hw_cap & DMA_HW_FEAT_TXCHCNT) >> 22;
875 /* Alternate (enhanced) DESC mode*/
876 priv->dma_cap.enh_desc =
877 (hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
885 * stmmac_open - open entry point of the driver
886 * @dev : pointer to the device structure.
888 * This function is the open entry point of the driver.
890 * 0 on success and an appropriate (-)ve integer as defined in errno.h
893 static int stmmac_open(struct net_device *dev)
895 struct stmmac_priv *priv = netdev_priv(dev);
898 /* Check that the MAC address is valid. If its not, refuse
899 * to bring the device up. The user must specify an
900 * address using the following linux command:
901 * ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx */
902 if (!is_valid_ether_addr(dev->dev_addr)) {
903 random_ether_addr(dev->dev_addr);
904 pr_warning("%s: generated random MAC address %pM\n", dev->name,
908 stmmac_verify_args();
910 #ifdef CONFIG_STMMAC_TIMER
911 priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
912 if (unlikely(priv->tm == NULL)) {
913 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
916 priv->tm->freq = tmrate;
918 /* Test if the external timer can be actually used.
919 * In case of failure continue without timer. */
920 if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
921 pr_warning("stmmaceth: cannot attach the external timer.\n");
923 priv->tm->timer_start = stmmac_no_timer_started;
924 priv->tm->timer_stop = stmmac_no_timer_stopped;
926 priv->tm->enable = 1;
928 ret = stmmac_init_phy(dev);
930 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
934 stmmac_get_synopsys_id(priv);
936 priv->hw_cap_support = stmmac_get_hw_features(priv);
938 if (priv->hw_cap_support) {
939 pr_info(" Support DMA HW capability register");
941 /* We can override some gmac/dma configuration fields: e.g.
942 * enh_desc, tx_coe (e.g. that are passed through the
943 * platform) with the values from the HW capability
944 * register (if supported).
946 priv->plat->enh_desc = priv->dma_cap.enh_desc;
947 priv->plat->tx_coe = priv->dma_cap.tx_coe;
948 priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up;
950 /* By default disable wol on magic frame if not supported */
951 if (!priv->dma_cap.pmt_magic_frame)
952 priv->wolopts &= ~WAKE_MAGIC;
955 pr_info(" No HW DMA feature register supported");
957 /* Select the enhnaced/normal descriptor structures */
958 stmmac_selec_desc_mode(priv);
960 /* PMT module is not integrated in all the MAC devices. */
961 if (priv->plat->pmt) {
962 pr_info(" Remote wake-up capable\n");
963 device_set_wakeup_capable(priv->device, 1);
966 priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
968 pr_info(" Checksum Offload Engine supported\n");
969 if (priv->plat->tx_coe)
970 pr_info(" Checksum insertion supported\n");
972 /* Create and initialize the TX/RX descriptors chains. */
973 priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
974 priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
975 priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
976 init_dma_desc_rings(dev);
978 /* DMA initialization and SW reset */
979 ret = priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
980 priv->dma_tx_phy, priv->dma_rx_phy);
982 pr_err("%s: DMA initialization failed\n", __func__);
986 /* Copy the MAC addr into the HW */
987 priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
988 /* If required, perform hw setup of the bus. */
989 if (priv->plat->bus_setup)
990 priv->plat->bus_setup(priv->ioaddr);
991 /* Initialize the MAC Core */
992 priv->hw->mac->core_init(priv->ioaddr);
994 netdev_update_features(dev);
996 /* Request the IRQ lines */
997 ret = request_irq(dev->irq, stmmac_interrupt,
998 IRQF_SHARED, dev->name, dev);
999 if (unlikely(ret < 0)) {
1000 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
1001 __func__, dev->irq, ret);
1005 /* Enable the MAC Rx/Tx */
1006 stmmac_enable_mac(priv->ioaddr);
1008 /* Set the HW DMA mode and the COE */
1009 stmmac_dma_operation_mode(priv);
1011 /* Extra statistics */
1012 memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
1013 priv->xstats.threshold = tc;
1015 if (priv->dma_cap.rmon)
1016 stmmac_mmc_setup(priv);
1018 /* Start the ball rolling... */
1019 DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
1020 priv->hw->dma->start_tx(priv->ioaddr);
1021 priv->hw->dma->start_rx(priv->ioaddr);
1023 #ifdef CONFIG_STMMAC_TIMER
1024 priv->tm->timer_start(tmrate);
1026 /* Dump DMA/MAC registers */
1027 if (netif_msg_hw(priv)) {
1028 priv->hw->mac->dump_regs(priv->ioaddr);
1029 priv->hw->dma->dump_regs(priv->ioaddr);
1033 phy_start(priv->phydev);
1035 napi_enable(&priv->napi);
1036 skb_queue_head_init(&priv->rx_recycle);
1037 netif_start_queue(dev);
1042 #ifdef CONFIG_STMMAC_TIMER
1046 phy_disconnect(priv->phydev);
1052 * stmmac_release - close entry point of the driver
1053 * @dev : device pointer.
1055 * This is the stop entry point of the driver.
1057 static int stmmac_release(struct net_device *dev)
1059 struct stmmac_priv *priv = netdev_priv(dev);
1061 /* Stop and disconnect the PHY */
1063 phy_stop(priv->phydev);
1064 phy_disconnect(priv->phydev);
1065 priv->phydev = NULL;
1068 netif_stop_queue(dev);
1070 #ifdef CONFIG_STMMAC_TIMER
1071 /* Stop and release the timer */
1072 stmmac_close_ext_timer();
1073 if (priv->tm != NULL)
1076 napi_disable(&priv->napi);
1077 skb_queue_purge(&priv->rx_recycle);
1079 /* Free the IRQ lines */
1080 free_irq(dev->irq, dev);
1082 /* Stop TX/RX DMA and clear the descriptors */
1083 priv->hw->dma->stop_tx(priv->ioaddr);
1084 priv->hw->dma->stop_rx(priv->ioaddr);
1086 /* Release and free the Rx/Tx resources */
1087 free_dma_desc_resources(priv);
1089 /* Disable the MAC Rx/Tx */
1090 stmmac_disable_mac(priv->ioaddr);
1092 netif_carrier_off(dev);
1099 * @skb : the socket buffer
1100 * @dev : device pointer
1101 * Description : Tx entry point of the driver.
1103 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1105 struct stmmac_priv *priv = netdev_priv(dev);
1106 unsigned int txsize = priv->dma_tx_size;
1108 int i, csum_insertion = 0;
1109 int nfrags = skb_shinfo(skb)->nr_frags;
1110 struct dma_desc *desc, *first;
1111 unsigned int nopaged_len = skb_headlen(skb);
1113 if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1114 if (!netif_queue_stopped(dev)) {
1115 netif_stop_queue(dev);
1116 /* This is a hard error, log it. */
1117 pr_err("%s: BUG! Tx Ring full when queue awake\n",
1120 return NETDEV_TX_BUSY;
1123 spin_lock(&priv->tx_lock);
1125 entry = priv->cur_tx % txsize;
1127 #ifdef STMMAC_XMIT_DEBUG
1128 if ((skb->len > ETH_FRAME_LEN) || nfrags)
1129 pr_info("stmmac xmit:\n"
1130 "\tskb addr %p - len: %d - nopaged_len: %d\n"
1131 "\tn_frags: %d - ip_summed: %d - %s gso\n",
1132 skb, skb->len, nopaged_len, nfrags, skb->ip_summed,
1133 !skb_is_gso(skb) ? "isn't" : "is");
1136 csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL);
1138 desc = priv->dma_tx + entry;
1141 #ifdef STMMAC_XMIT_DEBUG
1142 if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1143 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1144 "\t\tn_frags: %d, ip_summed: %d\n",
1145 skb->len, nopaged_len, nfrags, skb->ip_summed);
1147 priv->tx_skbuff[entry] = skb;
1149 if (priv->hw->ring->is_jumbo_frm(skb->len, priv->plat->enh_desc)) {
1150 entry = priv->hw->ring->jumbo_frm(priv, skb, csum_insertion);
1151 desc = priv->dma_tx + entry;
1153 desc->des2 = dma_map_single(priv->device, skb->data,
1154 nopaged_len, DMA_TO_DEVICE);
1155 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1159 for (i = 0; i < nfrags; i++) {
1160 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1161 int len = skb_frag_size(frag);
1163 entry = (++priv->cur_tx) % txsize;
1164 desc = priv->dma_tx + entry;
1166 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1167 desc->des2 = skb_frag_dma_map(priv->device, frag, 0, len,
1169 priv->tx_skbuff[entry] = NULL;
1170 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1172 priv->hw->desc->set_tx_owner(desc);
1175 /* Interrupt on completition only for the latest segment */
1176 priv->hw->desc->close_tx_desc(desc);
1178 #ifdef CONFIG_STMMAC_TIMER
1179 /* Clean IC while using timer */
1180 if (likely(priv->tm->enable))
1181 priv->hw->desc->clear_tx_ic(desc);
1186 /* To avoid raise condition */
1187 priv->hw->desc->set_tx_owner(first);
1191 #ifdef STMMAC_XMIT_DEBUG
1192 if (netif_msg_pktdata(priv)) {
1193 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1194 "first=%p, nfrags=%d\n",
1195 (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1196 entry, first, nfrags);
1197 display_ring(priv->dma_tx, txsize);
1198 pr_info(">>> frame to be transmitted: ");
1199 print_pkt(skb->data, skb->len);
1202 if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1203 TX_DBG("%s: stop transmitted packets\n", __func__);
1204 netif_stop_queue(dev);
1207 dev->stats.tx_bytes += skb->len;
1209 skb_tx_timestamp(skb);
1211 priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1213 spin_unlock(&priv->tx_lock);
1215 return NETDEV_TX_OK;
1218 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1220 unsigned int rxsize = priv->dma_rx_size;
1221 int bfsize = priv->dma_buf_sz;
1222 struct dma_desc *p = priv->dma_rx;
1224 for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1225 unsigned int entry = priv->dirty_rx % rxsize;
1226 if (likely(priv->rx_skbuff[entry] == NULL)) {
1227 struct sk_buff *skb;
1229 skb = __skb_dequeue(&priv->rx_recycle);
1231 skb = netdev_alloc_skb_ip_align(priv->dev,
1234 if (unlikely(skb == NULL))
1237 priv->rx_skbuff[entry] = skb;
1238 priv->rx_skbuff_dma[entry] =
1239 dma_map_single(priv->device, skb->data, bfsize,
1242 (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1244 if (unlikely(priv->plat->has_gmac))
1245 priv->hw->ring->refill_desc3(bfsize, p + entry);
1247 RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1250 priv->hw->desc->set_rx_owner(p + entry);
1254 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1256 unsigned int rxsize = priv->dma_rx_size;
1257 unsigned int entry = priv->cur_rx % rxsize;
1258 unsigned int next_entry;
1259 unsigned int count = 0;
1260 struct dma_desc *p = priv->dma_rx + entry;
1261 struct dma_desc *p_next;
1263 #ifdef STMMAC_RX_DEBUG
1264 if (netif_msg_hw(priv)) {
1265 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1266 display_ring(priv->dma_rx, rxsize);
1270 while (!priv->hw->desc->get_rx_owner(p)) {
1278 next_entry = (++priv->cur_rx) % rxsize;
1279 p_next = priv->dma_rx + next_entry;
1282 /* read the status of the incoming frame */
1283 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1285 if (unlikely(status == discard_frame))
1286 priv->dev->stats.rx_errors++;
1288 struct sk_buff *skb;
1291 frame_len = priv->hw->desc->get_rx_frame_len(p);
1292 /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1293 * Type frames (LLC/LLC-SNAP) */
1294 if (unlikely(status != llc_snap))
1295 frame_len -= ETH_FCS_LEN;
1296 #ifdef STMMAC_RX_DEBUG
1297 if (frame_len > ETH_FRAME_LEN)
1298 pr_debug("\tRX frame size %d, COE status: %d\n",
1301 if (netif_msg_hw(priv))
1302 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1305 skb = priv->rx_skbuff[entry];
1306 if (unlikely(!skb)) {
1307 pr_err("%s: Inconsistent Rx descriptor chain\n",
1309 priv->dev->stats.rx_dropped++;
1312 prefetch(skb->data - NET_IP_ALIGN);
1313 priv->rx_skbuff[entry] = NULL;
1315 skb_put(skb, frame_len);
1316 dma_unmap_single(priv->device,
1317 priv->rx_skbuff_dma[entry],
1318 priv->dma_buf_sz, DMA_FROM_DEVICE);
1319 #ifdef STMMAC_RX_DEBUG
1320 if (netif_msg_pktdata(priv)) {
1321 pr_info(" frame received (%dbytes)", frame_len);
1322 print_pkt(skb->data, frame_len);
1325 skb->protocol = eth_type_trans(skb, priv->dev);
1327 if (unlikely(!priv->rx_coe)) {
1328 /* No RX COE for old mac10/100 devices */
1329 skb_checksum_none_assert(skb);
1330 netif_receive_skb(skb);
1332 skb->ip_summed = CHECKSUM_UNNECESSARY;
1333 napi_gro_receive(&priv->napi, skb);
1336 priv->dev->stats.rx_packets++;
1337 priv->dev->stats.rx_bytes += frame_len;
1340 p = p_next; /* use prefetched values */
1343 stmmac_rx_refill(priv);
1345 priv->xstats.rx_pkt_n += count;
1351 * stmmac_poll - stmmac poll method (NAPI)
1352 * @napi : pointer to the napi structure.
1353 * @budget : maximum number of packets that the current CPU can receive from
1356 * This function implements the the reception process.
1357 * Also it runs the TX completion thread
1359 static int stmmac_poll(struct napi_struct *napi, int budget)
1361 struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1364 priv->xstats.poll_n++;
1366 work_done = stmmac_rx(priv, budget);
1368 if (work_done < budget) {
1369 napi_complete(napi);
1370 stmmac_enable_irq(priv);
1377 * @dev : Pointer to net device structure
1378 * Description: this function is called when a packet transmission fails to
1379 * complete within a reasonable tmrate. The driver will mark the error in the
1380 * netdev structure and arrange for the device to be reset to a sane state
1381 * in order to transmit a new packet.
1383 static void stmmac_tx_timeout(struct net_device *dev)
1385 struct stmmac_priv *priv = netdev_priv(dev);
1387 /* Clear Tx resources and restart transmitting again */
1388 stmmac_tx_err(priv);
1391 /* Configuration changes (passed on by ifconfig) */
1392 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1394 if (dev->flags & IFF_UP) /* can't act on a running interface */
1397 /* Don't allow changing the I/O address */
1398 if (map->base_addr != dev->base_addr) {
1399 pr_warning("%s: can't change I/O address\n", dev->name);
1403 /* Don't allow changing the IRQ */
1404 if (map->irq != dev->irq) {
1405 pr_warning("%s: can't change IRQ number %d\n",
1406 dev->name, dev->irq);
1410 /* ignore other fields */
1415 * stmmac_set_rx_mode - entry point for multicast addressing
1416 * @dev : pointer to the device structure
1418 * This function is a driver entry point which gets called by the kernel
1419 * whenever multicast addresses must be enabled/disabled.
1423 static void stmmac_set_rx_mode(struct net_device *dev)
1425 struct stmmac_priv *priv = netdev_priv(dev);
1427 spin_lock(&priv->lock);
1428 priv->hw->mac->set_filter(dev);
1429 spin_unlock(&priv->lock);
1433 * stmmac_change_mtu - entry point to change MTU size for the device.
1434 * @dev : device pointer.
1435 * @new_mtu : the new MTU size for the device.
1436 * Description: the Maximum Transfer Unit (MTU) is used by the network layer
1437 * to drive packet transmission. Ethernet has an MTU of 1500 octets
1438 * (ETH_DATA_LEN). This value can be changed with ifconfig.
1440 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1443 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1445 struct stmmac_priv *priv = netdev_priv(dev);
1448 if (netif_running(dev)) {
1449 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1453 if (priv->plat->enh_desc)
1454 max_mtu = JUMBO_LEN;
1456 max_mtu = SKB_MAX_HEAD(NET_SKB_PAD + NET_IP_ALIGN);
1458 if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1459 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1464 netdev_update_features(dev);
1469 static netdev_features_t stmmac_fix_features(struct net_device *dev,
1470 netdev_features_t features)
1472 struct stmmac_priv *priv = netdev_priv(dev);
1475 features &= ~NETIF_F_RXCSUM;
1476 if (!priv->plat->tx_coe)
1477 features &= ~NETIF_F_ALL_CSUM;
1479 /* Some GMAC devices have a bugged Jumbo frame support that
1480 * needs to have the Tx COE disabled for oversized frames
1481 * (due to limited buffer sizes). In this case we disable
1482 * the TX csum insertionin the TDES and not use SF. */
1483 if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))
1484 features &= ~NETIF_F_ALL_CSUM;
1489 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1491 struct net_device *dev = (struct net_device *)dev_id;
1492 struct stmmac_priv *priv = netdev_priv(dev);
1494 if (unlikely(!dev)) {
1495 pr_err("%s: invalid dev pointer\n", __func__);
1499 if (priv->plat->has_gmac)
1500 /* To handle GMAC own interrupts */
1501 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1503 stmmac_dma_interrupt(priv);
1508 #ifdef CONFIG_NET_POLL_CONTROLLER
1509 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1510 * to allow network I/O with interrupts disabled. */
1511 static void stmmac_poll_controller(struct net_device *dev)
1513 disable_irq(dev->irq);
1514 stmmac_interrupt(dev->irq, dev);
1515 enable_irq(dev->irq);
1520 * stmmac_ioctl - Entry point for the Ioctl
1521 * @dev: Device pointer.
1522 * @rq: An IOCTL specefic structure, that can contain a pointer to
1523 * a proprietary structure used to pass information to the driver.
1524 * @cmd: IOCTL command
1526 * Currently there are no special functionality supported in IOCTL, just the
1527 * phy_mii_ioctl(...) can be invoked.
1529 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1531 struct stmmac_priv *priv = netdev_priv(dev);
1534 if (!netif_running(dev))
1540 ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1545 #ifdef CONFIG_STMMAC_DEBUG_FS
1546 static struct dentry *stmmac_fs_dir;
1547 static struct dentry *stmmac_rings_status;
1548 static struct dentry *stmmac_dma_cap;
1550 static int stmmac_sysfs_ring_read(struct seq_file *seq, void *v)
1558 struct net_device *dev = seq->private;
1559 struct stmmac_priv *priv = netdev_priv(dev);
1561 seq_printf(seq, "=======================\n");
1562 seq_printf(seq, " RX descriptor ring\n");
1563 seq_printf(seq, "=======================\n");
1565 for (i = 0; i < priv->dma_rx_size; i++) {
1566 struct tmp_s *x = (struct tmp_s *)(priv->dma_rx + i);
1567 seq_printf(seq, "[%d] DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
1568 i, (unsigned int)(x->a),
1569 (unsigned int)((x->a) >> 32), x->b, x->c);
1570 seq_printf(seq, "\n");
1573 seq_printf(seq, "\n");
1574 seq_printf(seq, "=======================\n");
1575 seq_printf(seq, " TX descriptor ring\n");
1576 seq_printf(seq, "=======================\n");
1578 for (i = 0; i < priv->dma_tx_size; i++) {
1579 struct tmp_s *x = (struct tmp_s *)(priv->dma_tx + i);
1580 seq_printf(seq, "[%d] DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
1581 i, (unsigned int)(x->a),
1582 (unsigned int)((x->a) >> 32), x->b, x->c);
1583 seq_printf(seq, "\n");
1589 static int stmmac_sysfs_ring_open(struct inode *inode, struct file *file)
1591 return single_open(file, stmmac_sysfs_ring_read, inode->i_private);
1594 static const struct file_operations stmmac_rings_status_fops = {
1595 .owner = THIS_MODULE,
1596 .open = stmmac_sysfs_ring_open,
1598 .llseek = seq_lseek,
1599 .release = seq_release,
1602 static int stmmac_sysfs_dma_cap_read(struct seq_file *seq, void *v)
1604 struct net_device *dev = seq->private;
1605 struct stmmac_priv *priv = netdev_priv(dev);
1607 if (!priv->hw_cap_support) {
1608 seq_printf(seq, "DMA HW features not supported\n");
1612 seq_printf(seq, "==============================\n");
1613 seq_printf(seq, "\tDMA HW features\n");
1614 seq_printf(seq, "==============================\n");
1616 seq_printf(seq, "\t10/100 Mbps %s\n",
1617 (priv->dma_cap.mbps_10_100) ? "Y" : "N");
1618 seq_printf(seq, "\t1000 Mbps %s\n",
1619 (priv->dma_cap.mbps_1000) ? "Y" : "N");
1620 seq_printf(seq, "\tHalf duple %s\n",
1621 (priv->dma_cap.half_duplex) ? "Y" : "N");
1622 seq_printf(seq, "\tHash Filter: %s\n",
1623 (priv->dma_cap.hash_filter) ? "Y" : "N");
1624 seq_printf(seq, "\tMultiple MAC address registers: %s\n",
1625 (priv->dma_cap.multi_addr) ? "Y" : "N");
1626 seq_printf(seq, "\tPCS (TBI/SGMII/RTBI PHY interfatces): %s\n",
1627 (priv->dma_cap.pcs) ? "Y" : "N");
1628 seq_printf(seq, "\tSMA (MDIO) Interface: %s\n",
1629 (priv->dma_cap.sma_mdio) ? "Y" : "N");
1630 seq_printf(seq, "\tPMT Remote wake up: %s\n",
1631 (priv->dma_cap.pmt_remote_wake_up) ? "Y" : "N");
1632 seq_printf(seq, "\tPMT Magic Frame: %s\n",
1633 (priv->dma_cap.pmt_magic_frame) ? "Y" : "N");
1634 seq_printf(seq, "\tRMON module: %s\n",
1635 (priv->dma_cap.rmon) ? "Y" : "N");
1636 seq_printf(seq, "\tIEEE 1588-2002 Time Stamp: %s\n",
1637 (priv->dma_cap.time_stamp) ? "Y" : "N");
1638 seq_printf(seq, "\tIEEE 1588-2008 Advanced Time Stamp:%s\n",
1639 (priv->dma_cap.atime_stamp) ? "Y" : "N");
1640 seq_printf(seq, "\t802.3az - Energy-Efficient Ethernet (EEE) %s\n",
1641 (priv->dma_cap.eee) ? "Y" : "N");
1642 seq_printf(seq, "\tAV features: %s\n", (priv->dma_cap.av) ? "Y" : "N");
1643 seq_printf(seq, "\tChecksum Offload in TX: %s\n",
1644 (priv->dma_cap.tx_coe) ? "Y" : "N");
1645 seq_printf(seq, "\tIP Checksum Offload (type1) in RX: %s\n",
1646 (priv->dma_cap.rx_coe_type1) ? "Y" : "N");
1647 seq_printf(seq, "\tIP Checksum Offload (type2) in RX: %s\n",
1648 (priv->dma_cap.rx_coe_type2) ? "Y" : "N");
1649 seq_printf(seq, "\tRXFIFO > 2048bytes: %s\n",
1650 (priv->dma_cap.rxfifo_over_2048) ? "Y" : "N");
1651 seq_printf(seq, "\tNumber of Additional RX channel: %d\n",
1652 priv->dma_cap.number_rx_channel);
1653 seq_printf(seq, "\tNumber of Additional TX channel: %d\n",
1654 priv->dma_cap.number_tx_channel);
1655 seq_printf(seq, "\tEnhanced descriptors: %s\n",
1656 (priv->dma_cap.enh_desc) ? "Y" : "N");
1661 static int stmmac_sysfs_dma_cap_open(struct inode *inode, struct file *file)
1663 return single_open(file, stmmac_sysfs_dma_cap_read, inode->i_private);
1666 static const struct file_operations stmmac_dma_cap_fops = {
1667 .owner = THIS_MODULE,
1668 .open = stmmac_sysfs_dma_cap_open,
1670 .llseek = seq_lseek,
1671 .release = seq_release,
1674 static int stmmac_init_fs(struct net_device *dev)
1676 /* Create debugfs entries */
1677 stmmac_fs_dir = debugfs_create_dir(STMMAC_RESOURCE_NAME, NULL);
1679 if (!stmmac_fs_dir || IS_ERR(stmmac_fs_dir)) {
1680 pr_err("ERROR %s, debugfs create directory failed\n",
1681 STMMAC_RESOURCE_NAME);
1686 /* Entry to report DMA RX/TX rings */
1687 stmmac_rings_status = debugfs_create_file("descriptors_status",
1688 S_IRUGO, stmmac_fs_dir, dev,
1689 &stmmac_rings_status_fops);
1691 if (!stmmac_rings_status || IS_ERR(stmmac_rings_status)) {
1692 pr_info("ERROR creating stmmac ring debugfs file\n");
1693 debugfs_remove(stmmac_fs_dir);
1698 /* Entry to report the DMA HW features */
1699 stmmac_dma_cap = debugfs_create_file("dma_cap", S_IRUGO, stmmac_fs_dir,
1700 dev, &stmmac_dma_cap_fops);
1702 if (!stmmac_dma_cap || IS_ERR(stmmac_dma_cap)) {
1703 pr_info("ERROR creating stmmac MMC debugfs file\n");
1704 debugfs_remove(stmmac_rings_status);
1705 debugfs_remove(stmmac_fs_dir);
1713 static void stmmac_exit_fs(void)
1715 debugfs_remove(stmmac_rings_status);
1716 debugfs_remove(stmmac_dma_cap);
1717 debugfs_remove(stmmac_fs_dir);
1719 #endif /* CONFIG_STMMAC_DEBUG_FS */
1721 static const struct net_device_ops stmmac_netdev_ops = {
1722 .ndo_open = stmmac_open,
1723 .ndo_start_xmit = stmmac_xmit,
1724 .ndo_stop = stmmac_release,
1725 .ndo_change_mtu = stmmac_change_mtu,
1726 .ndo_fix_features = stmmac_fix_features,
1727 .ndo_set_rx_mode = stmmac_set_rx_mode,
1728 .ndo_tx_timeout = stmmac_tx_timeout,
1729 .ndo_do_ioctl = stmmac_ioctl,
1730 .ndo_set_config = stmmac_config,
1731 #ifdef CONFIG_NET_POLL_CONTROLLER
1732 .ndo_poll_controller = stmmac_poll_controller,
1734 .ndo_set_mac_address = eth_mac_addr,
1738 * stmmac_probe - Initialization of the adapter .
1739 * @dev : device pointer
1740 * Description: The function initializes the network device structure for
1741 * the STMMAC driver. It also calls the low level routines
1742 * in order to init the HW (i.e. the DMA engine)
1744 static int stmmac_probe(struct net_device *dev)
1747 struct stmmac_priv *priv = netdev_priv(dev);
1751 dev->netdev_ops = &stmmac_netdev_ops;
1752 stmmac_set_ethtool_ops(dev);
1754 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1755 dev->features |= dev->hw_features | NETIF_F_HIGHDMA;
1756 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1757 #ifdef STMMAC_VLAN_TAG_USED
1758 /* Both mac100 and gmac support receive VLAN tag detection */
1759 dev->features |= NETIF_F_HW_VLAN_RX;
1761 priv->msg_enable = netif_msg_init(debug, default_msg_level);
1764 priv->flow_ctrl = FLOW_AUTO; /* RX/TX pause on */
1766 priv->pause = pause;
1767 netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1769 /* Get the MAC address */
1770 priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1773 if (!is_valid_ether_addr(dev->dev_addr))
1774 pr_warning("\tno valid MAC address;"
1775 "please, use ifconfig or nwhwconfig!\n");
1777 spin_lock_init(&priv->lock);
1778 spin_lock_init(&priv->tx_lock);
1780 ret = register_netdev(dev);
1782 pr_err("%s: ERROR %i registering the device\n",
1787 DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1788 dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1789 (dev->features & NETIF_F_IP_CSUM) ? "on" : "off");
1795 * stmmac_mac_device_setup
1796 * @dev : device pointer
1797 * Description: select and initialise the mac device (mac100 or Gmac).
1799 static int stmmac_mac_device_setup(struct net_device *dev)
1801 struct stmmac_priv *priv = netdev_priv(dev);
1803 struct mac_device_info *device;
1805 if (priv->plat->has_gmac) {
1806 dev->priv_flags |= IFF_UNICAST_FLT;
1807 device = dwmac1000_setup(priv->ioaddr);
1809 device = dwmac100_setup(priv->ioaddr);
1816 priv->hw->ring = &ring_mode_ops;
1818 if (device_can_wakeup(priv->device)) {
1819 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1820 enable_irq_wake(priv->wol_irq);
1828 * @pdev: platform device pointer
1829 * Description: the driver is initialized through platform_device.
1831 static int stmmac_dvr_probe(struct platform_device *pdev)
1834 struct resource *res;
1835 void __iomem *addr = NULL;
1836 struct net_device *ndev = NULL;
1837 struct stmmac_priv *priv = NULL;
1838 struct plat_stmmacenet_data *plat_dat;
1840 pr_info("STMMAC driver:\n\tplatform registration... ");
1841 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1844 pr_info("\tdone!\n");
1846 if (!request_mem_region(res->start, resource_size(res),
1848 pr_err("%s: ERROR: memory allocation failed"
1849 "cannot get the I/O addr 0x%x\n",
1850 __func__, (unsigned int)res->start);
1854 addr = ioremap(res->start, resource_size(res));
1856 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1858 goto out_release_region;
1861 ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1863 pr_err("%s: ERROR: allocating the device\n", __func__);
1868 SET_NETDEV_DEV(ndev, &pdev->dev);
1870 /* Get the MAC information */
1871 ndev->irq = platform_get_irq_byname(pdev, "macirq");
1872 if (ndev->irq == -ENXIO) {
1873 pr_err("%s: ERROR: MAC IRQ configuration "
1874 "information not found\n", __func__);
1879 priv = netdev_priv(ndev);
1880 priv->device = &(pdev->dev);
1882 plat_dat = pdev->dev.platform_data;
1884 priv->plat = plat_dat;
1886 priv->ioaddr = addr;
1889 * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
1890 * The external wake up irq can be passed through the platform code
1891 * named as "eth_wake_irq"
1893 * In case the wake up interrupt is not passed from the platform
1894 * so the driver will continue to use the mac irq (ndev->irq)
1896 priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
1897 if (priv->wol_irq == -ENXIO)
1898 priv->wol_irq = ndev->irq;
1900 platform_set_drvdata(pdev, ndev);
1902 /* Set the I/O base addr */
1903 ndev->base_addr = (unsigned long)addr;
1905 /* Custom initialisation */
1906 if (priv->plat->init) {
1907 ret = priv->plat->init(pdev);
1912 /* MAC HW device detection */
1913 ret = stmmac_mac_device_setup(ndev);
1917 /* Network Device Registration */
1918 ret = stmmac_probe(ndev);
1922 /* Override with kernel parameters if supplied XXX CRS XXX
1923 * this needs to have multiple instances */
1924 if ((phyaddr >= 0) && (phyaddr <= 31))
1925 priv->plat->phy_addr = phyaddr;
1927 pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1928 "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1929 pdev->id, ndev->irq, addr);
1931 /* MDIO bus Registration */
1932 pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
1933 ret = stmmac_mdio_register(ndev);
1935 goto out_unregister;
1936 pr_debug("registered!\n");
1938 #ifdef CONFIG_STMMAC_DEBUG_FS
1939 ret = stmmac_init_fs(ndev);
1941 pr_warning("\tFailed debugFS registration");
1947 unregister_netdev(ndev);
1949 if (priv->plat->exit)
1950 priv->plat->exit(pdev);
1953 platform_set_drvdata(pdev, NULL);
1957 release_mem_region(res->start, resource_size(res));
1964 * @pdev: platform device pointer
1965 * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1966 * changes the link status, releases the DMA descriptor rings,
1967 * unregisters the MDIO bus and unmaps the allocated memory.
1969 static int stmmac_dvr_remove(struct platform_device *pdev)
1971 struct net_device *ndev = platform_get_drvdata(pdev);
1972 struct stmmac_priv *priv = netdev_priv(ndev);
1973 struct resource *res;
1975 pr_info("%s:\n\tremoving driver", __func__);
1977 priv->hw->dma->stop_rx(priv->ioaddr);
1978 priv->hw->dma->stop_tx(priv->ioaddr);
1980 stmmac_disable_mac(priv->ioaddr);
1982 netif_carrier_off(ndev);
1984 stmmac_mdio_unregister(ndev);
1986 if (priv->plat->exit)
1987 priv->plat->exit(pdev);
1989 platform_set_drvdata(pdev, NULL);
1990 unregister_netdev(ndev);
1992 iounmap((void *)priv->ioaddr);
1993 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1994 release_mem_region(res->start, resource_size(res));
1996 #ifdef CONFIG_STMMAC_DEBUG_FS
2006 static int stmmac_suspend(struct device *dev)
2008 struct net_device *ndev = dev_get_drvdata(dev);
2009 struct stmmac_priv *priv = netdev_priv(ndev);
2012 if (!ndev || !netif_running(ndev))
2016 phy_stop(priv->phydev);
2018 spin_lock(&priv->lock);
2020 netif_device_detach(ndev);
2021 netif_stop_queue(ndev);
2023 #ifdef CONFIG_STMMAC_TIMER
2024 priv->tm->timer_stop();
2025 if (likely(priv->tm->enable))
2028 napi_disable(&priv->napi);
2030 /* Stop TX/RX DMA */
2031 priv->hw->dma->stop_tx(priv->ioaddr);
2032 priv->hw->dma->stop_rx(priv->ioaddr);
2033 /* Clear the Rx/Tx descriptors */
2034 priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
2036 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
2038 /* Enable Power down mode by programming the PMT regs */
2039 if (device_may_wakeup(priv->device))
2040 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
2042 stmmac_disable_mac(priv->ioaddr);
2044 spin_unlock(&priv->lock);
2048 static int stmmac_resume(struct device *dev)
2050 struct net_device *ndev = dev_get_drvdata(dev);
2051 struct stmmac_priv *priv = netdev_priv(ndev);
2053 if (!netif_running(ndev))
2056 spin_lock(&priv->lock);
2058 /* Power Down bit, into the PM register, is cleared
2059 * automatically as soon as a magic packet or a Wake-up frame
2060 * is received. Anyway, it's better to manually clear
2061 * this bit because it can generate problems while resuming
2062 * from another devices (e.g. serial console). */
2063 if (device_may_wakeup(priv->device))
2064 priv->hw->mac->pmt(priv->ioaddr, 0);
2066 netif_device_attach(ndev);
2068 /* Enable the MAC and DMA */
2069 stmmac_enable_mac(priv->ioaddr);
2070 priv->hw->dma->start_tx(priv->ioaddr);
2071 priv->hw->dma->start_rx(priv->ioaddr);
2073 #ifdef CONFIG_STMMAC_TIMER
2074 if (likely(priv->tm->enable))
2075 priv->tm->timer_start(tmrate);
2077 napi_enable(&priv->napi);
2079 netif_start_queue(ndev);
2081 spin_unlock(&priv->lock);
2084 phy_start(priv->phydev);
2089 static int stmmac_freeze(struct device *dev)
2091 struct net_device *ndev = dev_get_drvdata(dev);
2093 if (!ndev || !netif_running(ndev))
2096 return stmmac_release(ndev);
2099 static int stmmac_restore(struct device *dev)
2101 struct net_device *ndev = dev_get_drvdata(dev);
2103 if (!ndev || !netif_running(ndev))
2106 return stmmac_open(ndev);
2109 static const struct dev_pm_ops stmmac_pm_ops = {
2110 .suspend = stmmac_suspend,
2111 .resume = stmmac_resume,
2112 .freeze = stmmac_freeze,
2113 .thaw = stmmac_restore,
2114 .restore = stmmac_restore,
2117 static const struct dev_pm_ops stmmac_pm_ops;
2118 #endif /* CONFIG_PM */
2120 static struct platform_driver stmmac_driver = {
2121 .probe = stmmac_dvr_probe,
2122 .remove = stmmac_dvr_remove,
2124 .name = STMMAC_RESOURCE_NAME,
2125 .owner = THIS_MODULE,
2126 .pm = &stmmac_pm_ops,
2131 * stmmac_init_module - Entry point for the driver
2132 * Description: This function is the entry point for the driver.
2134 static int __init stmmac_init_module(void)
2138 ret = platform_driver_register(&stmmac_driver);
2143 * stmmac_cleanup_module - Cleanup routine for the driver
2144 * Description: This function is the cleanup routine for the driver.
2146 static void __exit stmmac_cleanup_module(void)
2148 platform_driver_unregister(&stmmac_driver);
2152 static int __init stmmac_cmdline_opt(char *str)
2158 while ((opt = strsep(&str, ",")) != NULL) {
2159 if (!strncmp(opt, "debug:", 6)) {
2160 if (strict_strtoul(opt + 6, 0, (unsigned long *)&debug))
2162 } else if (!strncmp(opt, "phyaddr:", 8)) {
2163 if (strict_strtoul(opt + 8, 0,
2164 (unsigned long *)&phyaddr))
2166 } else if (!strncmp(opt, "dma_txsize:", 11)) {
2167 if (strict_strtoul(opt + 11, 0,
2168 (unsigned long *)&dma_txsize))
2170 } else if (!strncmp(opt, "dma_rxsize:", 11)) {
2171 if (strict_strtoul(opt + 11, 0,
2172 (unsigned long *)&dma_rxsize))
2174 } else if (!strncmp(opt, "buf_sz:", 7)) {
2175 if (strict_strtoul(opt + 7, 0,
2176 (unsigned long *)&buf_sz))
2178 } else if (!strncmp(opt, "tc:", 3)) {
2179 if (strict_strtoul(opt + 3, 0, (unsigned long *)&tc))
2181 } else if (!strncmp(opt, "watchdog:", 9)) {
2182 if (strict_strtoul(opt + 9, 0,
2183 (unsigned long *)&watchdog))
2185 } else if (!strncmp(opt, "flow_ctrl:", 10)) {
2186 if (strict_strtoul(opt + 10, 0,
2187 (unsigned long *)&flow_ctrl))
2189 } else if (!strncmp(opt, "pause:", 6)) {
2190 if (strict_strtoul(opt + 6, 0, (unsigned long *)&pause))
2192 #ifdef CONFIG_STMMAC_TIMER
2193 } else if (!strncmp(opt, "tmrate:", 7)) {
2194 if (strict_strtoul(opt + 7, 0,
2195 (unsigned long *)&tmrate))
2203 pr_err("%s: ERROR broken module parameter conversion", __func__);
2207 __setup("stmmaceth=", stmmac_cmdline_opt);
2210 module_init(stmmac_init_module);
2211 module_exit(stmmac_cleanup_module);
2213 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
2214 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
2215 MODULE_LICENSE("GPL");