drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

   1 /*******************************************************************************
   2   STMMAC Ethtool support
   3
   4   Copyright (C) 2007-2009  STMicroelectronics Ltd
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  23 *******************************************************************************/
  24
  25 #include <linux/etherdevice.h>
  26 #include <linux/ethtool.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/mii.h>
  29 #include <linux/phy.h>
  30 #include <asm/io.h>
  31
  32 #include "stmmac.h"
  33 #include "dwmac_dma.h"
  34
  35 #define REG_SPACE_SIZE  0x1054
  36 #define MAC100_ETHTOOL_NAME     "st_mac100"
  37 #define GMAC_ETHTOOL_NAME       "st_gmac"
  38
  39 struct stmmac_stats {
  40         char stat_string[ETH_GSTRING_LEN];
  41         int sizeof_stat;
  42         int stat_offset;
  43 };
  44
  45 #define STMMAC_STAT(m)  \
  46         { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m),       \
  47         offsetof(struct stmmac_priv, xstats.m)}
  48
  49 static const struct stmmac_stats stmmac_gstrings_stats[] = {
  50         STMMAC_STAT(tx_underflow),
  51         STMMAC_STAT(tx_carrier),
  52         STMMAC_STAT(tx_losscarrier),
  53         STMMAC_STAT(vlan_tag),
  54         STMMAC_STAT(tx_deferred),
  55         STMMAC_STAT(tx_vlan),
  56         STMMAC_STAT(rx_vlan),
  57         STMMAC_STAT(tx_jabber),
  58         STMMAC_STAT(tx_frame_flushed),
  59         STMMAC_STAT(tx_payload_error),
  60         STMMAC_STAT(tx_ip_header_error),
  61         STMMAC_STAT(rx_desc),
  62         STMMAC_STAT(sa_filter_fail),
  63         STMMAC_STAT(overflow_error),
  64         STMMAC_STAT(ipc_csum_error),
  65         STMMAC_STAT(rx_collision),
  66         STMMAC_STAT(rx_crc),
  67         STMMAC_STAT(rx_length),
  68         STMMAC_STAT(rx_mii),
  69         STMMAC_STAT(rx_multicast),
  70         STMMAC_STAT(rx_gmac_overflow),
  71         STMMAC_STAT(rx_watchdog),
  72         STMMAC_STAT(da_rx_filter_fail),
  73         STMMAC_STAT(sa_rx_filter_fail),
  74         STMMAC_STAT(rx_missed_cntr),
  75         STMMAC_STAT(rx_overflow_cntr),
  76         STMMAC_STAT(tx_undeflow_irq),
  77         STMMAC_STAT(tx_process_stopped_irq),
  78         STMMAC_STAT(tx_jabber_irq),
  79         STMMAC_STAT(rx_overflow_irq),
  80         STMMAC_STAT(rx_buf_unav_irq),
  81         STMMAC_STAT(rx_process_stopped_irq),
  82         STMMAC_STAT(rx_watchdog_irq),
  83         STMMAC_STAT(tx_early_irq),
  84         STMMAC_STAT(fatal_bus_error_irq),
  85         STMMAC_STAT(threshold),
  86         STMMAC_STAT(tx_pkt_n),
  87         STMMAC_STAT(rx_pkt_n),
  88         STMMAC_STAT(poll_n),
  89         STMMAC_STAT(sched_timer_n),
  90         STMMAC_STAT(normal_irq_n),
  91 };
  92 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
  93
  94 /* HW MAC Management counters (if supported) */
  95 #define STMMAC_MMC_STAT(m)      \
  96         { #m, FIELD_SIZEOF(struct stmmac_counters, m),  \
  97         offsetof(struct stmmac_priv, mmc.m)}
  98
  99 static const struct stmmac_stats stmmac_mmc[] = {
 100         STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
 101         STMMAC_MMC_STAT(mmc_tx_framecount_gb),
 102         STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
 103         STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
 104         STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
 105         STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
 106         STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
 107         STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
 108         STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
 109         STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
 110         STMMAC_MMC_STAT(mmc_tx_unicast_gb),
 111         STMMAC_MMC_STAT(mmc_tx_multicast_gb),
 112         STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
 113         STMMAC_MMC_STAT(mmc_tx_underflow_error),
 114         STMMAC_MMC_STAT(mmc_tx_singlecol_g),
 115         STMMAC_MMC_STAT(mmc_tx_multicol_g),
 116         STMMAC_MMC_STAT(mmc_tx_deferred),
 117         STMMAC_MMC_STAT(mmc_tx_latecol),
 118         STMMAC_MMC_STAT(mmc_tx_exesscol),
 119         STMMAC_MMC_STAT(mmc_tx_carrier_error),
 120         STMMAC_MMC_STAT(mmc_tx_octetcount_g),
 121         STMMAC_MMC_STAT(mmc_tx_framecount_g),
 122         STMMAC_MMC_STAT(mmc_tx_excessdef),
 123         STMMAC_MMC_STAT(mmc_tx_pause_frame),
 124         STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
 125         STMMAC_MMC_STAT(mmc_rx_framecount_gb),
 126         STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
 127         STMMAC_MMC_STAT(mmc_rx_octetcount_g),
 128         STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
 129         STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
 130         STMMAC_MMC_STAT(mmc_rx_crc_errror),
 131         STMMAC_MMC_STAT(mmc_rx_align_error),
 132         STMMAC_MMC_STAT(mmc_rx_run_error),
 133         STMMAC_MMC_STAT(mmc_rx_jabber_error),
 134         STMMAC_MMC_STAT(mmc_rx_undersize_g),
 135         STMMAC_MMC_STAT(mmc_rx_oversize_g),
 136         STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
 137         STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
 138         STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
 139         STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
 140         STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
 141         STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
 142         STMMAC_MMC_STAT(mmc_rx_unicast_g),
 143         STMMAC_MMC_STAT(mmc_rx_length_error),
 144         STMMAC_MMC_STAT(mmc_rx_autofrangetype),
 145         STMMAC_MMC_STAT(mmc_rx_pause_frames),
 146         STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
 147         STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
 148         STMMAC_MMC_STAT(mmc_rx_watchdog_error),
 149         STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
 150         STMMAC_MMC_STAT(mmc_rx_ipc_intr),
 151         STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
 152         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
 153         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
 154         STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
 155         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
 156         STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
 157         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
 158         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
 159         STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
 160         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
 161         STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
 162         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
 163         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
 164         STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
 165         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
 166         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
 167         STMMAC_MMC_STAT(mmc_rx_udp_gd),
 168         STMMAC_MMC_STAT(mmc_rx_udp_err),
 169         STMMAC_MMC_STAT(mmc_rx_tcp_gd),
 170         STMMAC_MMC_STAT(mmc_rx_tcp_err),
 171         STMMAC_MMC_STAT(mmc_rx_icmp_gd),
 172         STMMAC_MMC_STAT(mmc_rx_icmp_err),
 173         STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
 174         STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
 175         STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
 176         STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
 177         STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
 178         STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
 179 };
 180 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
 181
 182 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
 183                                       struct ethtool_drvinfo *info)
 184 {
 185         struct stmmac_priv *priv = netdev_priv(dev);
 186
 187         if (priv->plat->has_gmac)
 188                 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
 189         else
 190                 strlcpy(info->driver, MAC100_ETHTOOL_NAME,
 191                         sizeof(info->driver));
 192
 193         strcpy(info->version, DRV_MODULE_VERSION);
 194         info->fw_version[0] = '\0';
 195 }
 196
 197 static int stmmac_ethtool_getsettings(struct net_device *dev,
 198                                       struct ethtool_cmd *cmd)
 199 {
 200         struct stmmac_priv *priv = netdev_priv(dev);
 201         struct phy_device *phy = priv->phydev;
 202         int rc;
 203         if (phy == NULL) {
 204                 pr_err("%s: %s: PHY is not registered\n",
 205                        __func__, dev->name);
 206                 return -ENODEV;
 207         }
 208         if (!netif_running(dev)) {
 209                 pr_err("%s: interface is disabled: we cannot track "
 210                 "link speed / duplex setting\n", dev->name);
 211                 return -EBUSY;
 212         }
 213         cmd->transceiver = XCVR_INTERNAL;
 214         spin_lock_irq(&priv->lock);
 215         rc = phy_ethtool_gset(phy, cmd);
 216         spin_unlock_irq(&priv->lock);
 217         return rc;
 218 }
 219
 220 static int stmmac_ethtool_setsettings(struct net_device *dev,
 221                                       struct ethtool_cmd *cmd)
 222 {
 223         struct stmmac_priv *priv = netdev_priv(dev);
 224         struct phy_device *phy = priv->phydev;
 225         int rc;
 226
 227         spin_lock(&priv->lock);
 228         rc = phy_ethtool_sset(phy, cmd);
 229         spin_unlock(&priv->lock);
 230
 231         return rc;
 232 }
 233
 234 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
 235 {
 236         struct stmmac_priv *priv = netdev_priv(dev);
 237         return priv->msg_enable;
 238 }
 239
 240 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
 241 {
 242         struct stmmac_priv *priv = netdev_priv(dev);
 243         priv->msg_enable = level;
 244
 245 }
 246
 247 static int stmmac_check_if_running(struct net_device *dev)
 248 {
 249         if (!netif_running(dev))
 250                 return -EBUSY;
 251         return 0;
 252 }
 253
 254 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
 255 {
 256         return REG_SPACE_SIZE;
 257 }
 258
 259 static void stmmac_ethtool_gregs(struct net_device *dev,
 260                           struct ethtool_regs *regs, void *space)
 261 {
 262         int i;
 263         u32 *reg_space = (u32 *) space;
 264
 265         struct stmmac_priv *priv = netdev_priv(dev);
 266
 267         memset(reg_space, 0x0, REG_SPACE_SIZE);
 268
 269         if (!priv->plat->has_gmac) {
 270                 /* MAC registers */
 271                 for (i = 0; i < 12; i++)
 272                         reg_space[i] = readl(priv->ioaddr + (i * 4));
 273                 /* DMA registers */
 274                 for (i = 0; i < 9; i++)
 275                         reg_space[i + 12] =
 276                             readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4)));
 277                 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR);
 278                 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR);
 279         } else {
 280                 /* MAC registers */
 281                 for (i = 0; i < 55; i++)
 282                         reg_space[i] = readl(priv->ioaddr + (i * 4));
 283                 /* DMA registers */
 284                 for (i = 0; i < 22; i++)
 285                         reg_space[i + 55] =
 286                             readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4)));
 287         }
 288 }
 289
 290 static void
 291 stmmac_get_pauseparam(struct net_device *netdev,
 292                       struct ethtool_pauseparam *pause)
 293 {
 294         struct stmmac_priv *priv = netdev_priv(netdev);
 295
 296         spin_lock(&priv->lock);
 297
 298         pause->rx_pause = 0;
 299         pause->tx_pause = 0;
 300         pause->autoneg = priv->phydev->autoneg;
 301
 302         if (priv->flow_ctrl & FLOW_RX)
 303                 pause->rx_pause = 1;
 304         if (priv->flow_ctrl & FLOW_TX)
 305                 pause->tx_pause = 1;
 306
 307         spin_unlock(&priv->lock);
 308 }
 309
 310 static int
 311 stmmac_set_pauseparam(struct net_device *netdev,
 312                       struct ethtool_pauseparam *pause)
 313 {
 314         struct stmmac_priv *priv = netdev_priv(netdev);
 315         struct phy_device *phy = priv->phydev;
 316         int new_pause = FLOW_OFF;
 317         int ret = 0;
 318
 319         spin_lock(&priv->lock);
 320
 321         if (pause->rx_pause)
 322                 new_pause |= FLOW_RX;
 323         if (pause->tx_pause)
 324                 new_pause |= FLOW_TX;
 325
 326         priv->flow_ctrl = new_pause;
 327         phy->autoneg = pause->autoneg;
 328
 329         if (phy->autoneg) {
 330                 if (netif_running(netdev))
 331                         ret = phy_start_aneg(phy);
 332         } else
 333                 priv->hw->mac->flow_ctrl(priv->ioaddr, phy->duplex,
 334                                          priv->flow_ctrl, priv->pause);
 335         spin_unlock(&priv->lock);
 336         return ret;
 337 }
 338
 339 static void stmmac_get_ethtool_stats(struct net_device *dev,
 340                                  struct ethtool_stats *dummy, u64 *data)
 341 {
 342         struct stmmac_priv *priv = netdev_priv(dev);
 343         int i, j = 0;
 344
 345         /* Update the DMA HW counters for dwmac10/100 */
 346         if (!priv->plat->has_gmac)
 347                 priv->hw->dma->dma_diagnostic_fr(&dev->stats,
 348                                                  (void *) &priv->xstats,
 349                                                  priv->ioaddr);
 350         else {
 351                 /* If supported, for new GMAC chips expose the MMC counters */
 352                 if (priv->dma_cap.rmon) {
 353                         dwmac_mmc_read(priv->ioaddr, &priv->mmc);
 354
 355                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 356                                 char *p;
 357                                 p = (char *)priv + stmmac_mmc[i].stat_offset;
 358
 359                                 data[j++] = (stmmac_mmc[i].sizeof_stat ==
 360                                              sizeof(u64)) ? (*(u64 *)p) :
 361                                              (*(u32 *)p);
 362                         }
 363                 }
 364         }
 365         for (i = 0; i < STMMAC_STATS_LEN; i++) {
 366                 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
 367                 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
 368                              sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
 369         }
 370 }
 371
 372 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
 373 {
 374         struct stmmac_priv *priv = netdev_priv(netdev);
 375         int len;
 376
 377         switch (sset) {
 378         case ETH_SS_STATS:
 379                 len = STMMAC_STATS_LEN;
 380
 381                 if (priv->dma_cap.rmon)
 382                         len += STMMAC_MMC_STATS_LEN;
 383
 384                 return len;
 385         default:
 386                 return -EOPNOTSUPP;
 387         }
 388 }
 389
 390 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 391 {
 392         int i;
 393         u8 *p = data;
 394         struct stmmac_priv *priv = netdev_priv(dev);
 395
 396         switch (stringset) {
 397         case ETH_SS_STATS:
 398                 if (priv->dma_cap.rmon)
 399                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 400                                 memcpy(p, stmmac_mmc[i].stat_string,
 401                                        ETH_GSTRING_LEN);
 402                                 p += ETH_GSTRING_LEN;
 403                         }
 404                 for (i = 0; i < STMMAC_STATS_LEN; i++) {
 405                         memcpy(p, stmmac_gstrings_stats[i].stat_string,
 406                                 ETH_GSTRING_LEN);
 407                         p += ETH_GSTRING_LEN;
 408                 }
 409                 break;
 410         default:
 411                 WARN_ON(1);
 412                 break;
 413         }
 414 }
 415
 416 /* Currently only support WOL through Magic packet. */
 417 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 418 {
 419         struct stmmac_priv *priv = netdev_priv(dev);
 420
 421         spin_lock_irq(&priv->lock);
 422         if (device_can_wakeup(priv->device)) {
 423                 wol->supported = WAKE_MAGIC | WAKE_UCAST;
 424                 wol->wolopts = priv->wolopts;
 425         }
 426         spin_unlock_irq(&priv->lock);
 427 }
 428
 429 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 430 {
 431         struct stmmac_priv *priv = netdev_priv(dev);
 432         u32 support = WAKE_MAGIC | WAKE_UCAST;
 433
 434         /* By default almost all GMAC devices support the WoL via
 435          * magic frame but we can disable it if the HW capability
 436          * register shows no support for pmt_magic_frame. */
 437         if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
 438                 wol->wolopts &= ~WAKE_MAGIC;
 439
 440         if (!device_can_wakeup(priv->device))
 441                 return -EINVAL;
 442
 443         if (wol->wolopts & ~support)
 444                 return -EINVAL;
 445
 446         if (wol->wolopts) {
 447                 pr_info("stmmac: wakeup enable\n");
 448                 device_set_wakeup_enable(priv->device, 1);
 449                 enable_irq_wake(priv->wol_irq);
 450         } else {
 451                 device_set_wakeup_enable(priv->device, 0);
 452                 disable_irq_wake(priv->wol_irq);
 453         }
 454
 455         spin_lock_irq(&priv->lock);
 456         priv->wolopts = wol->wolopts;
 457         spin_unlock_irq(&priv->lock);
 458
 459         return 0;
 460 }
 461
 462 static struct ethtool_ops stmmac_ethtool_ops = {
 463         .begin = stmmac_check_if_running,
 464         .get_drvinfo = stmmac_ethtool_getdrvinfo,
 465         .get_settings = stmmac_ethtool_getsettings,
 466         .set_settings = stmmac_ethtool_setsettings,
 467         .get_msglevel = stmmac_ethtool_getmsglevel,
 468         .set_msglevel = stmmac_ethtool_setmsglevel,
 469         .get_regs = stmmac_ethtool_gregs,
 470         .get_regs_len = stmmac_ethtool_get_regs_len,
 471         .get_link = ethtool_op_get_link,
 472         .get_pauseparam = stmmac_get_pauseparam,
 473         .set_pauseparam = stmmac_set_pauseparam,
 474         .get_ethtool_stats = stmmac_get_ethtool_stats,
 475         .get_strings = stmmac_get_strings,
 476         .get_wol = stmmac_get_wol,
 477         .set_wol = stmmac_set_wol,
 478         .get_sset_count = stmmac_get_sset_count,
 479 };
 480
 481 void stmmac_set_ethtool_ops(struct net_device *netdev)
 482 {
 483         SET_ETHTOOL_OPS(netdev, &stmmac_ethtool_ops);
 484 }