1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_DISABLE] = "DISABLE",
80 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
81 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
82 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
83 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
84 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
85 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct *reset_workqueue;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static bool separate_tx_channels;
109 module_param(separate_tx_channels, bool, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight = 64;
118 /* This is the time (in jiffies) between invocations of the hardware
120 * On Falcon-based NICs, this will:
121 * - Check the on-board hardware monitor;
122 * - Poll the link state and reconfigure the hardware as necessary.
123 * On Siena-based NICs for power systems with EEH support, this will give EEH a
126 static unsigned int efx_monitor_interval = 1 * HZ;
128 /* Initial interrupt moderation settings. They can be modified after
129 * module load with ethtool.
131 * The default for RX should strike a balance between increasing the
132 * round-trip latency and reducing overhead.
134 static unsigned int rx_irq_mod_usec = 60;
136 /* Initial interrupt moderation settings. They can be modified after
137 * module load with ethtool.
139 * This default is chosen to ensure that a 10G link does not go idle
140 * while a TX queue is stopped after it has become full. A queue is
141 * restarted when it drops below half full. The time this takes (assuming
142 * worst case 3 descriptors per packet and 1024 descriptors) is
143 * 512 / 3 * 1.2 = 205 usec.
145 static unsigned int tx_irq_mod_usec = 150;
147 /* This is the first interrupt mode to try out of:
152 static unsigned int interrupt_mode;
154 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
155 * i.e. the number of CPUs among which we may distribute simultaneous
156 * interrupt handling.
158 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
159 * The default (0) means to assign an interrupt to each core.
161 static unsigned int rss_cpus;
162 module_param(rss_cpus, uint, 0444);
163 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
165 static bool phy_flash_cfg;
166 module_param(phy_flash_cfg, bool, 0644);
167 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
169 static unsigned irq_adapt_low_thresh = 8000;
170 module_param(irq_adapt_low_thresh, uint, 0644);
171 MODULE_PARM_DESC(irq_adapt_low_thresh,
172 "Threshold score for reducing IRQ moderation");
174 static unsigned irq_adapt_high_thresh = 16000;
175 module_param(irq_adapt_high_thresh, uint, 0644);
176 MODULE_PARM_DESC(irq_adapt_high_thresh,
177 "Threshold score for increasing IRQ moderation");
179 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
180 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
181 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
182 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
183 module_param(debug, uint, 0);
184 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
186 /**************************************************************************
188 * Utility functions and prototypes
190 *************************************************************************/
192 static int efx_soft_enable_interrupts(struct efx_nic *efx);
193 static void efx_soft_disable_interrupts(struct efx_nic *efx);
194 static void efx_remove_channel(struct efx_channel *channel);
195 static void efx_remove_channels(struct efx_nic *efx);
196 static const struct efx_channel_type efx_default_channel_type;
197 static void efx_remove_port(struct efx_nic *efx);
198 static void efx_init_napi_channel(struct efx_channel *channel);
199 static void efx_fini_napi(struct efx_nic *efx);
200 static void efx_fini_napi_channel(struct efx_channel *channel);
201 static void efx_fini_struct(struct efx_nic *efx);
202 static void efx_start_all(struct efx_nic *efx);
203 static void efx_stop_all(struct efx_nic *efx);
205 #define EFX_ASSERT_RESET_SERIALISED(efx) \
207 if ((efx->state == STATE_READY) || \
208 (efx->state == STATE_RECOVERY) || \
209 (efx->state == STATE_DISABLED)) \
213 static int efx_check_disabled(struct efx_nic *efx)
215 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
216 netif_err(efx, drv, efx->net_dev,
217 "device is disabled due to earlier errors\n");
223 /**************************************************************************
225 * Event queue processing
227 *************************************************************************/
229 /* Process channel's event queue
231 * This function is responsible for processing the event queue of a
232 * single channel. The caller must guarantee that this function will
233 * never be concurrently called more than once on the same channel,
234 * though different channels may be being processed concurrently.
236 static int efx_process_channel(struct efx_channel *channel, int budget)
240 if (unlikely(!channel->enabled))
243 spent = efx_nic_process_eventq(channel, budget);
244 if (spent && efx_channel_has_rx_queue(channel)) {
245 struct efx_rx_queue *rx_queue =
246 efx_channel_get_rx_queue(channel);
248 efx_rx_flush_packet(channel);
249 efx_fast_push_rx_descriptors(rx_queue);
257 * NAPI guarantees serialisation of polls of the same device, which
258 * provides the guarantee required by efx_process_channel().
260 static int efx_poll(struct napi_struct *napi, int budget)
262 struct efx_channel *channel =
263 container_of(napi, struct efx_channel, napi_str);
264 struct efx_nic *efx = channel->efx;
267 netif_vdbg(efx, intr, efx->net_dev,
268 "channel %d NAPI poll executing on CPU %d\n",
269 channel->channel, raw_smp_processor_id());
271 spent = efx_process_channel(channel, budget);
273 if (spent < budget) {
274 if (efx_channel_has_rx_queue(channel) &&
275 efx->irq_rx_adaptive &&
276 unlikely(++channel->irq_count == 1000)) {
277 if (unlikely(channel->irq_mod_score <
278 irq_adapt_low_thresh)) {
279 if (channel->irq_moderation > 1) {
280 channel->irq_moderation -= 1;
281 efx->type->push_irq_moderation(channel);
283 } else if (unlikely(channel->irq_mod_score >
284 irq_adapt_high_thresh)) {
285 if (channel->irq_moderation <
286 efx->irq_rx_moderation) {
287 channel->irq_moderation += 1;
288 efx->type->push_irq_moderation(channel);
291 channel->irq_count = 0;
292 channel->irq_mod_score = 0;
295 efx_filter_rfs_expire(channel);
297 /* There is no race here; although napi_disable() will
298 * only wait for napi_complete(), this isn't a problem
299 * since efx_nic_eventq_read_ack() will have no effect if
300 * interrupts have already been disabled.
303 efx_nic_eventq_read_ack(channel);
309 /* Create event queue
310 * Event queue memory allocations are done only once. If the channel
311 * is reset, the memory buffer will be reused; this guards against
312 * errors during channel reset and also simplifies interrupt handling.
314 static int efx_probe_eventq(struct efx_channel *channel)
316 struct efx_nic *efx = channel->efx;
317 unsigned long entries;
319 netif_dbg(efx, probe, efx->net_dev,
320 "chan %d create event queue\n", channel->channel);
322 /* Build an event queue with room for one event per tx and rx buffer,
323 * plus some extra for link state events and MCDI completions. */
324 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
325 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
326 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
328 return efx_nic_probe_eventq(channel);
331 /* Prepare channel's event queue */
332 static int efx_init_eventq(struct efx_channel *channel)
334 struct efx_nic *efx = channel->efx;
337 EFX_WARN_ON_PARANOID(channel->eventq_init);
339 netif_dbg(efx, drv, efx->net_dev,
340 "chan %d init event queue\n", channel->channel);
342 rc = efx_nic_init_eventq(channel);
344 efx->type->push_irq_moderation(channel);
345 channel->eventq_read_ptr = 0;
346 channel->eventq_init = true;
351 /* Enable event queue processing and NAPI */
352 static void efx_start_eventq(struct efx_channel *channel)
354 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
355 "chan %d start event queue\n", channel->channel);
357 /* Make sure the NAPI handler sees the enabled flag set */
358 channel->enabled = true;
361 napi_enable(&channel->napi_str);
362 efx_nic_eventq_read_ack(channel);
365 /* Disable event queue processing and NAPI */
366 static void efx_stop_eventq(struct efx_channel *channel)
368 if (!channel->enabled)
371 napi_disable(&channel->napi_str);
372 channel->enabled = false;
375 static void efx_fini_eventq(struct efx_channel *channel)
377 if (!channel->eventq_init)
380 netif_dbg(channel->efx, drv, channel->efx->net_dev,
381 "chan %d fini event queue\n", channel->channel);
383 efx_nic_fini_eventq(channel);
384 channel->eventq_init = false;
387 static void efx_remove_eventq(struct efx_channel *channel)
389 netif_dbg(channel->efx, drv, channel->efx->net_dev,
390 "chan %d remove event queue\n", channel->channel);
392 efx_nic_remove_eventq(channel);
395 /**************************************************************************
399 *************************************************************************/
401 /* Allocate and initialise a channel structure. */
402 static struct efx_channel *
403 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
405 struct efx_channel *channel;
406 struct efx_rx_queue *rx_queue;
407 struct efx_tx_queue *tx_queue;
410 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
415 channel->channel = i;
416 channel->type = &efx_default_channel_type;
418 for (j = 0; j < EFX_TXQ_TYPES; j++) {
419 tx_queue = &channel->tx_queue[j];
421 tx_queue->queue = i * EFX_TXQ_TYPES + j;
422 tx_queue->channel = channel;
425 rx_queue = &channel->rx_queue;
427 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
428 (unsigned long)rx_queue);
433 /* Allocate and initialise a channel structure, copying parameters
434 * (but not resources) from an old channel structure.
436 static struct efx_channel *
437 efx_copy_channel(const struct efx_channel *old_channel)
439 struct efx_channel *channel;
440 struct efx_rx_queue *rx_queue;
441 struct efx_tx_queue *tx_queue;
444 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
448 *channel = *old_channel;
450 channel->napi_dev = NULL;
451 memset(&channel->eventq, 0, sizeof(channel->eventq));
453 for (j = 0; j < EFX_TXQ_TYPES; j++) {
454 tx_queue = &channel->tx_queue[j];
455 if (tx_queue->channel)
456 tx_queue->channel = channel;
457 tx_queue->buffer = NULL;
458 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
461 rx_queue = &channel->rx_queue;
462 rx_queue->buffer = NULL;
463 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
464 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
465 (unsigned long)rx_queue);
470 static int efx_probe_channel(struct efx_channel *channel)
472 struct efx_tx_queue *tx_queue;
473 struct efx_rx_queue *rx_queue;
476 netif_dbg(channel->efx, probe, channel->efx->net_dev,
477 "creating channel %d\n", channel->channel);
479 rc = channel->type->pre_probe(channel);
483 rc = efx_probe_eventq(channel);
487 efx_for_each_channel_tx_queue(tx_queue, channel) {
488 rc = efx_probe_tx_queue(tx_queue);
493 efx_for_each_channel_rx_queue(rx_queue, channel) {
494 rc = efx_probe_rx_queue(rx_queue);
499 channel->n_rx_frm_trunc = 0;
504 efx_remove_channel(channel);
509 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
511 struct efx_nic *efx = channel->efx;
515 number = channel->channel;
516 if (efx->tx_channel_offset == 0) {
518 } else if (channel->channel < efx->tx_channel_offset) {
522 number -= efx->tx_channel_offset;
524 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
527 static void efx_set_channel_names(struct efx_nic *efx)
529 struct efx_channel *channel;
531 efx_for_each_channel(channel, efx)
532 channel->type->get_name(channel,
533 efx->msi_context[channel->channel].name,
534 sizeof(efx->msi_context[0].name));
537 static int efx_probe_channels(struct efx_nic *efx)
539 struct efx_channel *channel;
542 /* Restart special buffer allocation */
543 efx->next_buffer_table = 0;
545 /* Probe channels in reverse, so that any 'extra' channels
546 * use the start of the buffer table. This allows the traffic
547 * channels to be resized without moving them or wasting the
548 * entries before them.
550 efx_for_each_channel_rev(channel, efx) {
551 rc = efx_probe_channel(channel);
553 netif_err(efx, probe, efx->net_dev,
554 "failed to create channel %d\n",
559 efx_set_channel_names(efx);
564 efx_remove_channels(efx);
568 /* Channels are shutdown and reinitialised whilst the NIC is running
569 * to propagate configuration changes (mtu, checksum offload), or
570 * to clear hardware error conditions
572 static void efx_start_datapath(struct efx_nic *efx)
574 bool old_rx_scatter = efx->rx_scatter;
575 struct efx_tx_queue *tx_queue;
576 struct efx_rx_queue *rx_queue;
577 struct efx_channel *channel;
580 /* Calculate the rx buffer allocation parameters required to
581 * support the current MTU, including padding for header
582 * alignment and overruns.
584 efx->rx_dma_len = (efx->rx_prefix_size +
585 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
586 efx->type->rx_buffer_padding);
587 rx_buf_len = (sizeof(struct efx_rx_page_state) +
588 NET_IP_ALIGN + efx->rx_dma_len);
589 if (rx_buf_len <= PAGE_SIZE) {
590 efx->rx_scatter = efx->type->always_rx_scatter;
591 efx->rx_buffer_order = 0;
592 } else if (efx->type->can_rx_scatter) {
593 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
594 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
595 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
596 EFX_RX_BUF_ALIGNMENT) >
598 efx->rx_scatter = true;
599 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
600 efx->rx_buffer_order = 0;
602 efx->rx_scatter = false;
603 efx->rx_buffer_order = get_order(rx_buf_len);
606 efx_rx_config_page_split(efx);
607 if (efx->rx_buffer_order)
608 netif_dbg(efx, drv, efx->net_dev,
609 "RX buf len=%u; page order=%u batch=%u\n",
610 efx->rx_dma_len, efx->rx_buffer_order,
611 efx->rx_pages_per_batch);
613 netif_dbg(efx, drv, efx->net_dev,
614 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
615 efx->rx_dma_len, efx->rx_page_buf_step,
616 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
618 /* RX filters may also have scatter-enabled flags */
619 if (efx->rx_scatter != old_rx_scatter)
620 efx->type->filter_update_rx_scatter(efx);
622 /* We must keep at least one descriptor in a TX ring empty.
623 * We could avoid this when the queue size does not exactly
624 * match the hardware ring size, but it's not that important.
625 * Therefore we stop the queue when one more skb might fill
626 * the ring completely. We wake it when half way back to
629 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
630 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
632 /* Initialise the channels */
633 efx_for_each_channel(channel, efx) {
634 efx_for_each_channel_tx_queue(tx_queue, channel) {
635 efx_init_tx_queue(tx_queue);
636 atomic_inc(&efx->active_queues);
639 efx_for_each_channel_rx_queue(rx_queue, channel) {
640 efx_init_rx_queue(rx_queue);
641 atomic_inc(&efx->active_queues);
642 efx_nic_generate_fill_event(rx_queue);
645 WARN_ON(channel->rx_pkt_n_frags);
648 if (netif_device_present(efx->net_dev))
649 netif_tx_wake_all_queues(efx->net_dev);
652 static void efx_stop_datapath(struct efx_nic *efx)
654 struct efx_channel *channel;
655 struct efx_tx_queue *tx_queue;
656 struct efx_rx_queue *rx_queue;
659 EFX_ASSERT_RESET_SERIALISED(efx);
660 BUG_ON(efx->port_enabled);
663 efx_for_each_channel(channel, efx) {
664 efx_for_each_channel_rx_queue(rx_queue, channel)
665 rx_queue->refill_enabled = false;
668 efx_for_each_channel(channel, efx) {
669 /* RX packet processing is pipelined, so wait for the
670 * NAPI handler to complete. At least event queue 0
671 * might be kept active by non-data events, so don't
672 * use napi_synchronize() but actually disable NAPI
675 if (efx_channel_has_rx_queue(channel)) {
676 efx_stop_eventq(channel);
677 efx_start_eventq(channel);
681 rc = efx->type->fini_dmaq(efx);
682 if (rc && EFX_WORKAROUND_7803(efx)) {
683 /* Schedule a reset to recover from the flush failure. The
684 * descriptor caches reference memory we're about to free,
685 * but falcon_reconfigure_mac_wrapper() won't reconnect
686 * the MACs because of the pending reset.
688 netif_err(efx, drv, efx->net_dev,
689 "Resetting to recover from flush failure\n");
690 efx_schedule_reset(efx, RESET_TYPE_ALL);
692 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
694 netif_dbg(efx, drv, efx->net_dev,
695 "successfully flushed all queues\n");
698 efx_for_each_channel(channel, efx) {
699 efx_for_each_channel_rx_queue(rx_queue, channel)
700 efx_fini_rx_queue(rx_queue);
701 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
702 efx_fini_tx_queue(tx_queue);
706 static void efx_remove_channel(struct efx_channel *channel)
708 struct efx_tx_queue *tx_queue;
709 struct efx_rx_queue *rx_queue;
711 netif_dbg(channel->efx, drv, channel->efx->net_dev,
712 "destroy chan %d\n", channel->channel);
714 efx_for_each_channel_rx_queue(rx_queue, channel)
715 efx_remove_rx_queue(rx_queue);
716 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
717 efx_remove_tx_queue(tx_queue);
718 efx_remove_eventq(channel);
719 channel->type->post_remove(channel);
722 static void efx_remove_channels(struct efx_nic *efx)
724 struct efx_channel *channel;
726 efx_for_each_channel(channel, efx)
727 efx_remove_channel(channel);
731 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
733 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
734 u32 old_rxq_entries, old_txq_entries;
735 unsigned i, next_buffer_table = 0;
738 rc = efx_check_disabled(efx);
742 /* Not all channels should be reallocated. We must avoid
743 * reallocating their buffer table entries.
745 efx_for_each_channel(channel, efx) {
746 struct efx_rx_queue *rx_queue;
747 struct efx_tx_queue *tx_queue;
749 if (channel->type->copy)
751 next_buffer_table = max(next_buffer_table,
752 channel->eventq.index +
753 channel->eventq.entries);
754 efx_for_each_channel_rx_queue(rx_queue, channel)
755 next_buffer_table = max(next_buffer_table,
756 rx_queue->rxd.index +
757 rx_queue->rxd.entries);
758 efx_for_each_channel_tx_queue(tx_queue, channel)
759 next_buffer_table = max(next_buffer_table,
760 tx_queue->txd.index +
761 tx_queue->txd.entries);
764 efx_device_detach_sync(efx);
766 efx_soft_disable_interrupts(efx);
768 /* Clone channels (where possible) */
769 memset(other_channel, 0, sizeof(other_channel));
770 for (i = 0; i < efx->n_channels; i++) {
771 channel = efx->channel[i];
772 if (channel->type->copy)
773 channel = channel->type->copy(channel);
778 other_channel[i] = channel;
781 /* Swap entry counts and channel pointers */
782 old_rxq_entries = efx->rxq_entries;
783 old_txq_entries = efx->txq_entries;
784 efx->rxq_entries = rxq_entries;
785 efx->txq_entries = txq_entries;
786 for (i = 0; i < efx->n_channels; i++) {
787 channel = efx->channel[i];
788 efx->channel[i] = other_channel[i];
789 other_channel[i] = channel;
792 /* Restart buffer table allocation */
793 efx->next_buffer_table = next_buffer_table;
795 for (i = 0; i < efx->n_channels; i++) {
796 channel = efx->channel[i];
797 if (!channel->type->copy)
799 rc = efx_probe_channel(channel);
802 efx_init_napi_channel(efx->channel[i]);
806 /* Destroy unused channel structures */
807 for (i = 0; i < efx->n_channels; i++) {
808 channel = other_channel[i];
809 if (channel && channel->type->copy) {
810 efx_fini_napi_channel(channel);
811 efx_remove_channel(channel);
816 rc2 = efx_soft_enable_interrupts(efx);
819 netif_err(efx, drv, efx->net_dev,
820 "unable to restart interrupts on channel reallocation\n");
821 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
824 netif_device_attach(efx->net_dev);
830 efx->rxq_entries = old_rxq_entries;
831 efx->txq_entries = old_txq_entries;
832 for (i = 0; i < efx->n_channels; i++) {
833 channel = efx->channel[i];
834 efx->channel[i] = other_channel[i];
835 other_channel[i] = channel;
840 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
842 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
845 static const struct efx_channel_type efx_default_channel_type = {
846 .pre_probe = efx_channel_dummy_op_int,
847 .post_remove = efx_channel_dummy_op_void,
848 .get_name = efx_get_channel_name,
849 .copy = efx_copy_channel,
850 .keep_eventq = false,
853 int efx_channel_dummy_op_int(struct efx_channel *channel)
858 void efx_channel_dummy_op_void(struct efx_channel *channel)
862 /**************************************************************************
866 **************************************************************************/
868 /* This ensures that the kernel is kept informed (via
869 * netif_carrier_on/off) of the link status, and also maintains the
870 * link status's stop on the port's TX queue.
872 void efx_link_status_changed(struct efx_nic *efx)
874 struct efx_link_state *link_state = &efx->link_state;
876 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
877 * that no events are triggered between unregister_netdev() and the
878 * driver unloading. A more general condition is that NETDEV_CHANGE
879 * can only be generated between NETDEV_UP and NETDEV_DOWN */
880 if (!netif_running(efx->net_dev))
883 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
884 efx->n_link_state_changes++;
887 netif_carrier_on(efx->net_dev);
889 netif_carrier_off(efx->net_dev);
892 /* Status message for kernel log */
894 netif_info(efx, link, efx->net_dev,
895 "link up at %uMbps %s-duplex (MTU %d)\n",
896 link_state->speed, link_state->fd ? "full" : "half",
899 netif_info(efx, link, efx->net_dev, "link down\n");
902 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
904 efx->link_advertising = advertising;
906 if (advertising & ADVERTISED_Pause)
907 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
909 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
910 if (advertising & ADVERTISED_Asym_Pause)
911 efx->wanted_fc ^= EFX_FC_TX;
915 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
917 efx->wanted_fc = wanted_fc;
918 if (efx->link_advertising) {
919 if (wanted_fc & EFX_FC_RX)
920 efx->link_advertising |= (ADVERTISED_Pause |
921 ADVERTISED_Asym_Pause);
923 efx->link_advertising &= ~(ADVERTISED_Pause |
924 ADVERTISED_Asym_Pause);
925 if (wanted_fc & EFX_FC_TX)
926 efx->link_advertising ^= ADVERTISED_Asym_Pause;
930 static void efx_fini_port(struct efx_nic *efx);
932 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
933 * the MAC appropriately. All other PHY configuration changes are pushed
934 * through phy_op->set_settings(), and pushed asynchronously to the MAC
935 * through efx_monitor().
937 * Callers must hold the mac_lock
939 int __efx_reconfigure_port(struct efx_nic *efx)
941 enum efx_phy_mode phy_mode;
944 WARN_ON(!mutex_is_locked(&efx->mac_lock));
946 /* Disable PHY transmit in mac level loopbacks */
947 phy_mode = efx->phy_mode;
948 if (LOOPBACK_INTERNAL(efx))
949 efx->phy_mode |= PHY_MODE_TX_DISABLED;
951 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
953 rc = efx->type->reconfigure_port(efx);
956 efx->phy_mode = phy_mode;
961 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
963 int efx_reconfigure_port(struct efx_nic *efx)
967 EFX_ASSERT_RESET_SERIALISED(efx);
969 mutex_lock(&efx->mac_lock);
970 rc = __efx_reconfigure_port(efx);
971 mutex_unlock(&efx->mac_lock);
976 /* Asynchronous work item for changing MAC promiscuity and multicast
977 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
979 static void efx_mac_work(struct work_struct *data)
981 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
983 mutex_lock(&efx->mac_lock);
984 if (efx->port_enabled)
985 efx->type->reconfigure_mac(efx);
986 mutex_unlock(&efx->mac_lock);
989 static int efx_probe_port(struct efx_nic *efx)
993 netif_dbg(efx, probe, efx->net_dev, "create port\n");
996 efx->phy_mode = PHY_MODE_SPECIAL;
998 /* Connect up MAC/PHY operations table */
999 rc = efx->type->probe_port(efx);
1003 /* Initialise MAC address to permanent address */
1004 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
1009 static int efx_init_port(struct efx_nic *efx)
1013 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1015 mutex_lock(&efx->mac_lock);
1017 rc = efx->phy_op->init(efx);
1021 efx->port_initialized = true;
1023 /* Reconfigure the MAC before creating dma queues (required for
1024 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1025 efx->type->reconfigure_mac(efx);
1027 /* Ensure the PHY advertises the correct flow control settings */
1028 rc = efx->phy_op->reconfigure(efx);
1032 mutex_unlock(&efx->mac_lock);
1036 efx->phy_op->fini(efx);
1038 mutex_unlock(&efx->mac_lock);
1042 static void efx_start_port(struct efx_nic *efx)
1044 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1045 BUG_ON(efx->port_enabled);
1047 mutex_lock(&efx->mac_lock);
1048 efx->port_enabled = true;
1050 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1051 * and then cancelled by efx_flush_all() */
1052 efx->type->reconfigure_mac(efx);
1054 mutex_unlock(&efx->mac_lock);
1057 /* Prevent efx_mac_work() and efx_monitor() from working */
1058 static void efx_stop_port(struct efx_nic *efx)
1060 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1062 mutex_lock(&efx->mac_lock);
1063 efx->port_enabled = false;
1064 mutex_unlock(&efx->mac_lock);
1066 /* Serialise against efx_set_multicast_list() */
1067 netif_addr_lock_bh(efx->net_dev);
1068 netif_addr_unlock_bh(efx->net_dev);
1071 static void efx_fini_port(struct efx_nic *efx)
1073 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1075 if (!efx->port_initialized)
1078 efx->phy_op->fini(efx);
1079 efx->port_initialized = false;
1081 efx->link_state.up = false;
1082 efx_link_status_changed(efx);
1085 static void efx_remove_port(struct efx_nic *efx)
1087 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1089 efx->type->remove_port(efx);
1092 /**************************************************************************
1096 **************************************************************************/
1098 /* This configures the PCI device to enable I/O and DMA. */
1099 static int efx_init_io(struct efx_nic *efx)
1101 struct pci_dev *pci_dev = efx->pci_dev;
1102 dma_addr_t dma_mask = efx->type->max_dma_mask;
1103 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1106 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1108 rc = pci_enable_device(pci_dev);
1110 netif_err(efx, probe, efx->net_dev,
1111 "failed to enable PCI device\n");
1115 pci_set_master(pci_dev);
1117 /* Set the PCI DMA mask. Try all possibilities from our
1118 * genuine mask down to 32 bits, because some architectures
1119 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1120 * masks event though they reject 46 bit masks.
1122 while (dma_mask > 0x7fffffffUL) {
1123 if (dma_supported(&pci_dev->dev, dma_mask)) {
1124 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1131 netif_err(efx, probe, efx->net_dev,
1132 "could not find a suitable DMA mask\n");
1135 netif_dbg(efx, probe, efx->net_dev,
1136 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1138 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1139 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1141 netif_err(efx, probe, efx->net_dev,
1142 "request for memory BAR failed\n");
1146 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1147 if (!efx->membase) {
1148 netif_err(efx, probe, efx->net_dev,
1149 "could not map memory BAR at %llx+%x\n",
1150 (unsigned long long)efx->membase_phys, mem_map_size);
1154 netif_dbg(efx, probe, efx->net_dev,
1155 "memory BAR at %llx+%x (virtual %p)\n",
1156 (unsigned long long)efx->membase_phys, mem_map_size,
1162 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1164 efx->membase_phys = 0;
1166 pci_disable_device(efx->pci_dev);
1171 static void efx_fini_io(struct efx_nic *efx)
1173 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1176 iounmap(efx->membase);
1177 efx->membase = NULL;
1180 if (efx->membase_phys) {
1181 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1182 efx->membase_phys = 0;
1185 pci_disable_device(efx->pci_dev);
1188 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1190 cpumask_var_t thread_mask;
1197 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1198 netif_warn(efx, probe, efx->net_dev,
1199 "RSS disabled due to allocation failure\n");
1204 for_each_online_cpu(cpu) {
1205 if (!cpumask_test_cpu(cpu, thread_mask)) {
1207 cpumask_or(thread_mask, thread_mask,
1208 topology_thread_cpumask(cpu));
1212 free_cpumask_var(thread_mask);
1215 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1216 * table entries that are inaccessible to VFs
1218 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1219 count > efx_vf_size(efx)) {
1220 netif_warn(efx, probe, efx->net_dev,
1221 "Reducing number of RSS channels from %u to %u for "
1222 "VF support. Increase vf-msix-limit to use more "
1223 "channels on the PF.\n",
1224 count, efx_vf_size(efx));
1225 count = efx_vf_size(efx);
1231 /* Probe the number and type of interrupts we are able to obtain, and
1232 * the resulting numbers of channels and RX queues.
1234 static int efx_probe_interrupts(struct efx_nic *efx)
1236 unsigned int extra_channels = 0;
1240 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1241 if (efx->extra_channel_type[i])
1244 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1245 struct msix_entry xentries[EFX_MAX_CHANNELS];
1246 unsigned int n_channels;
1248 n_channels = efx_wanted_parallelism(efx);
1249 if (separate_tx_channels)
1251 n_channels += extra_channels;
1252 n_channels = min(n_channels, efx->max_channels);
1254 for (i = 0; i < n_channels; i++)
1255 xentries[i].entry = i;
1256 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1258 netif_err(efx, drv, efx->net_dev,
1259 "WARNING: Insufficient MSI-X vectors"
1260 " available (%d < %u).\n", rc, n_channels);
1261 netif_err(efx, drv, efx->net_dev,
1262 "WARNING: Performance may be reduced.\n");
1263 EFX_BUG_ON_PARANOID(rc >= n_channels);
1265 rc = pci_enable_msix(efx->pci_dev, xentries,
1270 efx->n_channels = n_channels;
1271 if (n_channels > extra_channels)
1272 n_channels -= extra_channels;
1273 if (separate_tx_channels) {
1274 efx->n_tx_channels = max(n_channels / 2, 1U);
1275 efx->n_rx_channels = max(n_channels -
1279 efx->n_tx_channels = n_channels;
1280 efx->n_rx_channels = n_channels;
1282 for (i = 0; i < efx->n_channels; i++)
1283 efx_get_channel(efx, i)->irq =
1286 /* Fall back to single channel MSI */
1287 efx->interrupt_mode = EFX_INT_MODE_MSI;
1288 netif_err(efx, drv, efx->net_dev,
1289 "could not enable MSI-X\n");
1293 /* Try single interrupt MSI */
1294 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1295 efx->n_channels = 1;
1296 efx->n_rx_channels = 1;
1297 efx->n_tx_channels = 1;
1298 rc = pci_enable_msi(efx->pci_dev);
1300 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1302 netif_err(efx, drv, efx->net_dev,
1303 "could not enable MSI\n");
1304 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1308 /* Assume legacy interrupts */
1309 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1310 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1311 efx->n_rx_channels = 1;
1312 efx->n_tx_channels = 1;
1313 efx->legacy_irq = efx->pci_dev->irq;
1316 /* Assign extra channels if possible */
1317 j = efx->n_channels;
1318 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1319 if (!efx->extra_channel_type[i])
1321 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1322 efx->n_channels <= extra_channels) {
1323 efx->extra_channel_type[i]->handle_no_channel(efx);
1326 efx_get_channel(efx, j)->type =
1327 efx->extra_channel_type[i];
1331 /* RSS might be usable on VFs even if it is disabled on the PF */
1332 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1333 efx->n_rx_channels : efx_vf_size(efx));
1338 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1340 struct efx_channel *channel, *end_channel;
1343 BUG_ON(efx->state == STATE_DISABLED);
1345 efx->irq_soft_enabled = true;
1348 efx_for_each_channel(channel, efx) {
1349 if (!channel->type->keep_eventq) {
1350 rc = efx_init_eventq(channel);
1354 efx_start_eventq(channel);
1357 efx_mcdi_mode_event(efx);
1361 end_channel = channel;
1362 efx_for_each_channel(channel, efx) {
1363 if (channel == end_channel)
1365 efx_stop_eventq(channel);
1366 if (!channel->type->keep_eventq)
1367 efx_fini_eventq(channel);
1373 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1375 struct efx_channel *channel;
1377 if (efx->state == STATE_DISABLED)
1380 efx_mcdi_mode_poll(efx);
1382 efx->irq_soft_enabled = false;
1385 if (efx->legacy_irq)
1386 synchronize_irq(efx->legacy_irq);
1388 efx_for_each_channel(channel, efx) {
1390 synchronize_irq(channel->irq);
1392 efx_stop_eventq(channel);
1393 if (!channel->type->keep_eventq)
1394 efx_fini_eventq(channel);
1397 /* Flush the asynchronous MCDI request queue */
1398 efx_mcdi_flush_async(efx);
1401 static int efx_enable_interrupts(struct efx_nic *efx)
1403 struct efx_channel *channel, *end_channel;
1406 BUG_ON(efx->state == STATE_DISABLED);
1408 if (efx->eeh_disabled_legacy_irq) {
1409 enable_irq(efx->legacy_irq);
1410 efx->eeh_disabled_legacy_irq = false;
1413 efx->type->irq_enable_master(efx);
1415 efx_for_each_channel(channel, efx) {
1416 if (channel->type->keep_eventq) {
1417 rc = efx_init_eventq(channel);
1423 rc = efx_soft_enable_interrupts(efx);
1430 end_channel = channel;
1431 efx_for_each_channel(channel, efx) {
1432 if (channel == end_channel)
1434 if (channel->type->keep_eventq)
1435 efx_fini_eventq(channel);
1438 efx->type->irq_disable_non_ev(efx);
1443 static void efx_disable_interrupts(struct efx_nic *efx)
1445 struct efx_channel *channel;
1447 efx_soft_disable_interrupts(efx);
1449 efx_for_each_channel(channel, efx) {
1450 if (channel->type->keep_eventq)
1451 efx_fini_eventq(channel);
1454 efx->type->irq_disable_non_ev(efx);
1457 static void efx_remove_interrupts(struct efx_nic *efx)
1459 struct efx_channel *channel;
1461 /* Remove MSI/MSI-X interrupts */
1462 efx_for_each_channel(channel, efx)
1464 pci_disable_msi(efx->pci_dev);
1465 pci_disable_msix(efx->pci_dev);
1467 /* Remove legacy interrupt */
1468 efx->legacy_irq = 0;
1471 static void efx_set_channels(struct efx_nic *efx)
1473 struct efx_channel *channel;
1474 struct efx_tx_queue *tx_queue;
1476 efx->tx_channel_offset =
1477 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1479 /* We need to mark which channels really have RX and TX
1480 * queues, and adjust the TX queue numbers if we have separate
1481 * RX-only and TX-only channels.
1483 efx_for_each_channel(channel, efx) {
1484 if (channel->channel < efx->n_rx_channels)
1485 channel->rx_queue.core_index = channel->channel;
1487 channel->rx_queue.core_index = -1;
1489 efx_for_each_channel_tx_queue(tx_queue, channel)
1490 tx_queue->queue -= (efx->tx_channel_offset *
1495 static int efx_probe_nic(struct efx_nic *efx)
1500 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1502 /* Carry out hardware-type specific initialisation */
1503 rc = efx->type->probe(efx);
1507 /* Determine the number of channels and queues by trying to hook
1508 * in MSI-X interrupts. */
1509 rc = efx_probe_interrupts(efx);
1513 rc = efx->type->dimension_resources(efx);
1517 if (efx->n_channels > 1)
1518 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1519 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1520 efx->rx_indir_table[i] =
1521 ethtool_rxfh_indir_default(i, efx->rss_spread);
1523 efx_set_channels(efx);
1524 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1525 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1527 /* Initialise the interrupt moderation settings */
1528 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1534 efx_remove_interrupts(efx);
1536 efx->type->remove(efx);
1540 static void efx_remove_nic(struct efx_nic *efx)
1542 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1544 efx_remove_interrupts(efx);
1545 efx->type->remove(efx);
1548 static int efx_probe_filters(struct efx_nic *efx)
1552 spin_lock_init(&efx->filter_lock);
1554 rc = efx->type->filter_table_probe(efx);
1558 #ifdef CONFIG_RFS_ACCEL
1559 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1560 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1561 sizeof(*efx->rps_flow_id),
1563 if (!efx->rps_flow_id) {
1564 efx->type->filter_table_remove(efx);
1573 static void efx_remove_filters(struct efx_nic *efx)
1575 #ifdef CONFIG_RFS_ACCEL
1576 kfree(efx->rps_flow_id);
1578 efx->type->filter_table_remove(efx);
1581 static void efx_restore_filters(struct efx_nic *efx)
1583 efx->type->filter_table_restore(efx);
1586 /**************************************************************************
1588 * NIC startup/shutdown
1590 *************************************************************************/
1592 static int efx_probe_all(struct efx_nic *efx)
1596 rc = efx_probe_nic(efx);
1598 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1602 rc = efx_probe_port(efx);
1604 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1608 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1609 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1613 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1615 rc = efx_probe_filters(efx);
1617 netif_err(efx, probe, efx->net_dev,
1618 "failed to create filter tables\n");
1622 rc = efx_probe_channels(efx);
1629 efx_remove_filters(efx);
1631 efx_remove_port(efx);
1633 efx_remove_nic(efx);
1638 /* If the interface is supposed to be running but is not, start
1639 * the hardware and software data path, regular activity for the port
1640 * (MAC statistics, link polling, etc.) and schedule the port to be
1641 * reconfigured. Interrupts must already be enabled. This function
1642 * is safe to call multiple times, so long as the NIC is not disabled.
1643 * Requires the RTNL lock.
1645 static void efx_start_all(struct efx_nic *efx)
1647 EFX_ASSERT_RESET_SERIALISED(efx);
1648 BUG_ON(efx->state == STATE_DISABLED);
1650 /* Check that it is appropriate to restart the interface. All
1651 * of these flags are safe to read under just the rtnl lock */
1652 if (efx->port_enabled || !netif_running(efx->net_dev))
1655 efx_start_port(efx);
1656 efx_start_datapath(efx);
1658 /* Start the hardware monitor if there is one */
1659 if (efx->type->monitor != NULL)
1660 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1661 efx_monitor_interval);
1663 /* If link state detection is normally event-driven, we have
1664 * to poll now because we could have missed a change
1666 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1667 mutex_lock(&efx->mac_lock);
1668 if (efx->phy_op->poll(efx))
1669 efx_link_status_changed(efx);
1670 mutex_unlock(&efx->mac_lock);
1673 efx->type->start_stats(efx);
1676 /* Flush all delayed work. Should only be called when no more delayed work
1677 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1678 * since we're holding the rtnl_lock at this point. */
1679 static void efx_flush_all(struct efx_nic *efx)
1681 /* Make sure the hardware monitor and event self-test are stopped */
1682 cancel_delayed_work_sync(&efx->monitor_work);
1683 efx_selftest_async_cancel(efx);
1684 /* Stop scheduled port reconfigurations */
1685 cancel_work_sync(&efx->mac_work);
1688 /* Quiesce the hardware and software data path, and regular activity
1689 * for the port without bringing the link down. Safe to call multiple
1690 * times with the NIC in almost any state, but interrupts should be
1691 * enabled. Requires the RTNL lock.
1693 static void efx_stop_all(struct efx_nic *efx)
1695 EFX_ASSERT_RESET_SERIALISED(efx);
1697 /* port_enabled can be read safely under the rtnl lock */
1698 if (!efx->port_enabled)
1701 efx->type->stop_stats(efx);
1704 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1707 /* Stop the kernel transmit interface. This is only valid if
1708 * the device is stopped or detached; otherwise the watchdog
1709 * may fire immediately.
1711 WARN_ON(netif_running(efx->net_dev) &&
1712 netif_device_present(efx->net_dev));
1713 netif_tx_disable(efx->net_dev);
1715 efx_stop_datapath(efx);
1718 static void efx_remove_all(struct efx_nic *efx)
1720 efx_remove_channels(efx);
1721 efx_remove_filters(efx);
1722 efx_remove_port(efx);
1723 efx_remove_nic(efx);
1726 /**************************************************************************
1728 * Interrupt moderation
1730 **************************************************************************/
1732 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1736 if (usecs * 1000 < quantum_ns)
1737 return 1; /* never round down to 0 */
1738 return usecs * 1000 / quantum_ns;
1741 /* Set interrupt moderation parameters */
1742 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1743 unsigned int rx_usecs, bool rx_adaptive,
1744 bool rx_may_override_tx)
1746 struct efx_channel *channel;
1747 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1748 efx->timer_quantum_ns,
1750 unsigned int tx_ticks;
1751 unsigned int rx_ticks;
1753 EFX_ASSERT_RESET_SERIALISED(efx);
1755 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1758 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1759 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1761 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1762 !rx_may_override_tx) {
1763 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1764 "RX and TX IRQ moderation must be equal\n");
1768 efx->irq_rx_adaptive = rx_adaptive;
1769 efx->irq_rx_moderation = rx_ticks;
1770 efx_for_each_channel(channel, efx) {
1771 if (efx_channel_has_rx_queue(channel))
1772 channel->irq_moderation = rx_ticks;
1773 else if (efx_channel_has_tx_queues(channel))
1774 channel->irq_moderation = tx_ticks;
1780 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1781 unsigned int *rx_usecs, bool *rx_adaptive)
1783 /* We must round up when converting ticks to microseconds
1784 * because we round down when converting the other way.
1787 *rx_adaptive = efx->irq_rx_adaptive;
1788 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1789 efx->timer_quantum_ns,
1792 /* If channels are shared between RX and TX, so is IRQ
1793 * moderation. Otherwise, IRQ moderation is the same for all
1794 * TX channels and is not adaptive.
1796 if (efx->tx_channel_offset == 0)
1797 *tx_usecs = *rx_usecs;
1799 *tx_usecs = DIV_ROUND_UP(
1800 efx->channel[efx->tx_channel_offset]->irq_moderation *
1801 efx->timer_quantum_ns,
1805 /**************************************************************************
1809 **************************************************************************/
1811 /* Run periodically off the general workqueue */
1812 static void efx_monitor(struct work_struct *data)
1814 struct efx_nic *efx = container_of(data, struct efx_nic,
1817 netif_vdbg(efx, timer, efx->net_dev,
1818 "hardware monitor executing on CPU %d\n",
1819 raw_smp_processor_id());
1820 BUG_ON(efx->type->monitor == NULL);
1822 /* If the mac_lock is already held then it is likely a port
1823 * reconfiguration is already in place, which will likely do
1824 * most of the work of monitor() anyway. */
1825 if (mutex_trylock(&efx->mac_lock)) {
1826 if (efx->port_enabled)
1827 efx->type->monitor(efx);
1828 mutex_unlock(&efx->mac_lock);
1831 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1832 efx_monitor_interval);
1835 /**************************************************************************
1839 *************************************************************************/
1842 * Context: process, rtnl_lock() held.
1844 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1846 struct efx_nic *efx = netdev_priv(net_dev);
1847 struct mii_ioctl_data *data = if_mii(ifr);
1849 if (cmd == SIOCSHWTSTAMP)
1850 return efx_ptp_ioctl(efx, ifr, cmd);
1852 /* Convert phy_id from older PRTAD/DEVAD format */
1853 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1854 (data->phy_id & 0xfc00) == 0x0400)
1855 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1857 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1860 /**************************************************************************
1864 **************************************************************************/
1866 static void efx_init_napi_channel(struct efx_channel *channel)
1868 struct efx_nic *efx = channel->efx;
1870 channel->napi_dev = efx->net_dev;
1871 netif_napi_add(channel->napi_dev, &channel->napi_str,
1872 efx_poll, napi_weight);
1875 static void efx_init_napi(struct efx_nic *efx)
1877 struct efx_channel *channel;
1879 efx_for_each_channel(channel, efx)
1880 efx_init_napi_channel(channel);
1883 static void efx_fini_napi_channel(struct efx_channel *channel)
1885 if (channel->napi_dev)
1886 netif_napi_del(&channel->napi_str);
1887 channel->napi_dev = NULL;
1890 static void efx_fini_napi(struct efx_nic *efx)
1892 struct efx_channel *channel;
1894 efx_for_each_channel(channel, efx)
1895 efx_fini_napi_channel(channel);
1898 /**************************************************************************
1900 * Kernel netpoll interface
1902 *************************************************************************/
1904 #ifdef CONFIG_NET_POLL_CONTROLLER
1906 /* Although in the common case interrupts will be disabled, this is not
1907 * guaranteed. However, all our work happens inside the NAPI callback,
1908 * so no locking is required.
1910 static void efx_netpoll(struct net_device *net_dev)
1912 struct efx_nic *efx = netdev_priv(net_dev);
1913 struct efx_channel *channel;
1915 efx_for_each_channel(channel, efx)
1916 efx_schedule_channel(channel);
1921 /**************************************************************************
1923 * Kernel net device interface
1925 *************************************************************************/
1927 /* Context: process, rtnl_lock() held. */
1928 static int efx_net_open(struct net_device *net_dev)
1930 struct efx_nic *efx = netdev_priv(net_dev);
1933 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1934 raw_smp_processor_id());
1936 rc = efx_check_disabled(efx);
1939 if (efx->phy_mode & PHY_MODE_SPECIAL)
1941 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1944 /* Notify the kernel of the link state polled during driver load,
1945 * before the monitor starts running */
1946 efx_link_status_changed(efx);
1949 efx_selftest_async_start(efx);
1953 /* Context: process, rtnl_lock() held.
1954 * Note that the kernel will ignore our return code; this method
1955 * should really be a void.
1957 static int efx_net_stop(struct net_device *net_dev)
1959 struct efx_nic *efx = netdev_priv(net_dev);
1961 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1962 raw_smp_processor_id());
1964 /* Stop the device and flush all the channels */
1970 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1971 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1972 struct rtnl_link_stats64 *stats)
1974 struct efx_nic *efx = netdev_priv(net_dev);
1976 spin_lock_bh(&efx->stats_lock);
1977 efx->type->update_stats(efx, NULL, stats);
1978 spin_unlock_bh(&efx->stats_lock);
1983 /* Context: netif_tx_lock held, BHs disabled. */
1984 static void efx_watchdog(struct net_device *net_dev)
1986 struct efx_nic *efx = netdev_priv(net_dev);
1988 netif_err(efx, tx_err, efx->net_dev,
1989 "TX stuck with port_enabled=%d: resetting channels\n",
1992 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1996 /* Context: process, rtnl_lock() held. */
1997 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1999 struct efx_nic *efx = netdev_priv(net_dev);
2002 rc = efx_check_disabled(efx);
2005 if (new_mtu > EFX_MAX_MTU)
2008 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2010 efx_device_detach_sync(efx);
2013 mutex_lock(&efx->mac_lock);
2014 net_dev->mtu = new_mtu;
2015 efx->type->reconfigure_mac(efx);
2016 mutex_unlock(&efx->mac_lock);
2019 netif_device_attach(efx->net_dev);
2023 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2025 struct efx_nic *efx = netdev_priv(net_dev);
2026 struct sockaddr *addr = data;
2027 char *new_addr = addr->sa_data;
2029 if (!is_valid_ether_addr(new_addr)) {
2030 netif_err(efx, drv, efx->net_dev,
2031 "invalid ethernet MAC address requested: %pM\n",
2033 return -EADDRNOTAVAIL;
2036 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
2037 efx_sriov_mac_address_changed(efx);
2039 /* Reconfigure the MAC */
2040 mutex_lock(&efx->mac_lock);
2041 efx->type->reconfigure_mac(efx);
2042 mutex_unlock(&efx->mac_lock);
2047 /* Context: netif_addr_lock held, BHs disabled. */
2048 static void efx_set_rx_mode(struct net_device *net_dev)
2050 struct efx_nic *efx = netdev_priv(net_dev);
2052 if (efx->port_enabled)
2053 queue_work(efx->workqueue, &efx->mac_work);
2054 /* Otherwise efx_start_port() will do this */
2057 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2059 struct efx_nic *efx = netdev_priv(net_dev);
2061 /* If disabling RX n-tuple filtering, clear existing filters */
2062 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2063 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2068 static const struct net_device_ops efx_farch_netdev_ops = {
2069 .ndo_open = efx_net_open,
2070 .ndo_stop = efx_net_stop,
2071 .ndo_get_stats64 = efx_net_stats,
2072 .ndo_tx_timeout = efx_watchdog,
2073 .ndo_start_xmit = efx_hard_start_xmit,
2074 .ndo_validate_addr = eth_validate_addr,
2075 .ndo_do_ioctl = efx_ioctl,
2076 .ndo_change_mtu = efx_change_mtu,
2077 .ndo_set_mac_address = efx_set_mac_address,
2078 .ndo_set_rx_mode = efx_set_rx_mode,
2079 .ndo_set_features = efx_set_features,
2080 #ifdef CONFIG_SFC_SRIOV
2081 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2082 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2083 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2084 .ndo_get_vf_config = efx_sriov_get_vf_config,
2086 #ifdef CONFIG_NET_POLL_CONTROLLER
2087 .ndo_poll_controller = efx_netpoll,
2089 .ndo_setup_tc = efx_setup_tc,
2090 #ifdef CONFIG_RFS_ACCEL
2091 .ndo_rx_flow_steer = efx_filter_rfs,
2095 static const struct net_device_ops efx_ef10_netdev_ops = {
2096 .ndo_open = efx_net_open,
2097 .ndo_stop = efx_net_stop,
2098 .ndo_get_stats64 = efx_net_stats,
2099 .ndo_tx_timeout = efx_watchdog,
2100 .ndo_start_xmit = efx_hard_start_xmit,
2101 .ndo_validate_addr = eth_validate_addr,
2102 .ndo_do_ioctl = efx_ioctl,
2103 .ndo_change_mtu = efx_change_mtu,
2104 .ndo_set_mac_address = efx_set_mac_address,
2105 .ndo_set_rx_mode = efx_set_rx_mode,
2106 .ndo_set_features = efx_set_features,
2107 #ifdef CONFIG_NET_POLL_CONTROLLER
2108 .ndo_poll_controller = efx_netpoll,
2110 #ifdef CONFIG_RFS_ACCEL
2111 .ndo_rx_flow_steer = efx_filter_rfs,
2115 static void efx_update_name(struct efx_nic *efx)
2117 strcpy(efx->name, efx->net_dev->name);
2118 efx_mtd_rename(efx);
2119 efx_set_channel_names(efx);
2122 static int efx_netdev_event(struct notifier_block *this,
2123 unsigned long event, void *ptr)
2125 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2127 if ((net_dev->netdev_ops == &efx_farch_netdev_ops ||
2128 net_dev->netdev_ops == &efx_ef10_netdev_ops) &&
2129 event == NETDEV_CHANGENAME)
2130 efx_update_name(netdev_priv(net_dev));
2135 static struct notifier_block efx_netdev_notifier = {
2136 .notifier_call = efx_netdev_event,
2140 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2142 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2143 return sprintf(buf, "%d\n", efx->phy_type);
2145 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2147 static int efx_register_netdev(struct efx_nic *efx)
2149 struct net_device *net_dev = efx->net_dev;
2150 struct efx_channel *channel;
2153 net_dev->watchdog_timeo = 5 * HZ;
2154 net_dev->irq = efx->pci_dev->irq;
2155 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
2156 net_dev->netdev_ops = &efx_ef10_netdev_ops;
2157 net_dev->priv_flags |= IFF_UNICAST_FLT;
2159 net_dev->netdev_ops = &efx_farch_netdev_ops;
2161 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2162 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2166 /* Enable resets to be scheduled and check whether any were
2167 * already requested. If so, the NIC is probably hosed so we
2170 efx->state = STATE_READY;
2171 smp_mb(); /* ensure we change state before checking reset_pending */
2172 if (efx->reset_pending) {
2173 netif_err(efx, probe, efx->net_dev,
2174 "aborting probe due to scheduled reset\n");
2179 rc = dev_alloc_name(net_dev, net_dev->name);
2182 efx_update_name(efx);
2184 /* Always start with carrier off; PHY events will detect the link */
2185 netif_carrier_off(net_dev);
2187 rc = register_netdevice(net_dev);
2191 efx_for_each_channel(channel, efx) {
2192 struct efx_tx_queue *tx_queue;
2193 efx_for_each_channel_tx_queue(tx_queue, channel)
2194 efx_init_tx_queue_core_txq(tx_queue);
2199 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2201 netif_err(efx, drv, efx->net_dev,
2202 "failed to init net dev attributes\n");
2203 goto fail_registered;
2210 unregister_netdevice(net_dev);
2212 efx->state = STATE_UNINIT;
2214 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2218 static void efx_unregister_netdev(struct efx_nic *efx)
2223 BUG_ON(netdev_priv(efx->net_dev) != efx);
2225 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2226 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2229 unregister_netdevice(efx->net_dev);
2230 efx->state = STATE_UNINIT;
2234 /**************************************************************************
2236 * Device reset and suspend
2238 **************************************************************************/
2240 /* Tears down the entire software state and most of the hardware state
2242 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2244 EFX_ASSERT_RESET_SERIALISED(efx);
2247 efx_disable_interrupts(efx);
2249 mutex_lock(&efx->mac_lock);
2250 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2251 efx->phy_op->fini(efx);
2252 efx->type->fini(efx);
2255 /* This function will always ensure that the locks acquired in
2256 * efx_reset_down() are released. A failure return code indicates
2257 * that we were unable to reinitialise the hardware, and the
2258 * driver should be disabled. If ok is false, then the rx and tx
2259 * engines are not restarted, pending a RESET_DISABLE. */
2260 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2264 EFX_ASSERT_RESET_SERIALISED(efx);
2266 rc = efx->type->init(efx);
2268 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2275 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2276 rc = efx->phy_op->init(efx);
2279 if (efx->phy_op->reconfigure(efx))
2280 netif_err(efx, drv, efx->net_dev,
2281 "could not restore PHY settings\n");
2284 rc = efx_enable_interrupts(efx);
2287 efx_restore_filters(efx);
2288 efx_sriov_reset(efx);
2290 mutex_unlock(&efx->mac_lock);
2297 efx->port_initialized = false;
2299 mutex_unlock(&efx->mac_lock);
2304 /* Reset the NIC using the specified method. Note that the reset may
2305 * fail, in which case the card will be left in an unusable state.
2307 * Caller must hold the rtnl_lock.
2309 int efx_reset(struct efx_nic *efx, enum reset_type method)
2314 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2315 RESET_TYPE(method));
2317 efx_device_detach_sync(efx);
2318 efx_reset_down(efx, method);
2320 rc = efx->type->reset(efx, method);
2322 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2326 /* Clear flags for the scopes we covered. We assume the NIC and
2327 * driver are now quiescent so that there is no race here.
2329 efx->reset_pending &= -(1 << (method + 1));
2331 /* Reinitialise bus-mastering, which may have been turned off before
2332 * the reset was scheduled. This is still appropriate, even in the
2333 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2334 * can respond to requests. */
2335 pci_set_master(efx->pci_dev);
2338 /* Leave device stopped if necessary */
2340 method == RESET_TYPE_DISABLE ||
2341 method == RESET_TYPE_RECOVER_OR_DISABLE;
2342 rc2 = efx_reset_up(efx, method, !disabled);
2350 dev_close(efx->net_dev);
2351 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2352 efx->state = STATE_DISABLED;
2354 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2355 netif_device_attach(efx->net_dev);
2360 /* Try recovery mechanisms.
2361 * For now only EEH is supported.
2362 * Returns 0 if the recovery mechanisms are unsuccessful.
2363 * Returns a non-zero value otherwise.
2365 int efx_try_recovery(struct efx_nic *efx)
2368 /* A PCI error can occur and not be seen by EEH because nothing
2369 * happens on the PCI bus. In this case the driver may fail and
2370 * schedule a 'recover or reset', leading to this recovery handler.
2371 * Manually call the eeh failure check function.
2373 struct eeh_dev *eehdev =
2374 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2376 if (eeh_dev_check_failure(eehdev)) {
2377 /* The EEH mechanisms will handle the error and reset the
2378 * device if necessary.
2386 /* The worker thread exists so that code that cannot sleep can
2387 * schedule a reset for later.
2389 static void efx_reset_work(struct work_struct *data)
2391 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2392 unsigned long pending;
2393 enum reset_type method;
2395 pending = ACCESS_ONCE(efx->reset_pending);
2396 method = fls(pending) - 1;
2398 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2399 method == RESET_TYPE_RECOVER_OR_ALL) &&
2400 efx_try_recovery(efx))
2408 /* We checked the state in efx_schedule_reset() but it may
2409 * have changed by now. Now that we have the RTNL lock,
2410 * it cannot change again.
2412 if (efx->state == STATE_READY)
2413 (void)efx_reset(efx, method);
2418 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2420 enum reset_type method;
2422 if (efx->state == STATE_RECOVERY) {
2423 netif_dbg(efx, drv, efx->net_dev,
2424 "recovering: skip scheduling %s reset\n",
2430 case RESET_TYPE_INVISIBLE:
2431 case RESET_TYPE_ALL:
2432 case RESET_TYPE_RECOVER_OR_ALL:
2433 case RESET_TYPE_WORLD:
2434 case RESET_TYPE_DISABLE:
2435 case RESET_TYPE_RECOVER_OR_DISABLE:
2437 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2438 RESET_TYPE(method));
2441 method = efx->type->map_reset_reason(type);
2442 netif_dbg(efx, drv, efx->net_dev,
2443 "scheduling %s reset for %s\n",
2444 RESET_TYPE(method), RESET_TYPE(type));
2448 set_bit(method, &efx->reset_pending);
2449 smp_mb(); /* ensure we change reset_pending before checking state */
2451 /* If we're not READY then just leave the flags set as the cue
2452 * to abort probing or reschedule the reset later.
2454 if (ACCESS_ONCE(efx->state) != STATE_READY)
2457 /* efx_process_channel() will no longer read events once a
2458 * reset is scheduled. So switch back to poll'd MCDI completions. */
2459 efx_mcdi_mode_poll(efx);
2461 queue_work(reset_workqueue, &efx->reset_work);
2464 /**************************************************************************
2466 * List of NICs we support
2468 **************************************************************************/
2470 /* PCI device ID table */
2471 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2472 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2473 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2474 .driver_data = (unsigned long) &falcon_a1_nic_type},
2475 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2476 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2477 .driver_data = (unsigned long) &falcon_b0_nic_type},
2478 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2479 .driver_data = (unsigned long) &siena_a0_nic_type},
2480 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2481 .driver_data = (unsigned long) &siena_a0_nic_type},
2482 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2483 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2484 {0} /* end of list */
2487 /**************************************************************************
2489 * Dummy PHY/MAC operations
2491 * Can be used for some unimplemented operations
2492 * Needed so all function pointers are valid and do not have to be tested
2495 **************************************************************************/
2496 int efx_port_dummy_op_int(struct efx_nic *efx)
2500 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2502 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2507 static const struct efx_phy_operations efx_dummy_phy_operations = {
2508 .init = efx_port_dummy_op_int,
2509 .reconfigure = efx_port_dummy_op_int,
2510 .poll = efx_port_dummy_op_poll,
2511 .fini = efx_port_dummy_op_void,
2514 /**************************************************************************
2518 **************************************************************************/
2520 /* This zeroes out and then fills in the invariants in a struct
2521 * efx_nic (including all sub-structures).
2523 static int efx_init_struct(struct efx_nic *efx,
2524 struct pci_dev *pci_dev, struct net_device *net_dev)
2528 /* Initialise common structures */
2529 spin_lock_init(&efx->biu_lock);
2530 #ifdef CONFIG_SFC_MTD
2531 INIT_LIST_HEAD(&efx->mtd_list);
2533 INIT_WORK(&efx->reset_work, efx_reset_work);
2534 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2535 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2536 efx->pci_dev = pci_dev;
2537 efx->msg_enable = debug;
2538 efx->state = STATE_UNINIT;
2539 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2541 efx->net_dev = net_dev;
2542 efx->rx_prefix_size = efx->type->rx_prefix_size;
2543 efx->rx_packet_hash_offset =
2544 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2545 spin_lock_init(&efx->stats_lock);
2546 mutex_init(&efx->mac_lock);
2547 efx->phy_op = &efx_dummy_phy_operations;
2548 efx->mdio.dev = net_dev;
2549 INIT_WORK(&efx->mac_work, efx_mac_work);
2550 init_waitqueue_head(&efx->flush_wq);
2552 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2553 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2554 if (!efx->channel[i])
2556 efx->msi_context[i].efx = efx;
2557 efx->msi_context[i].index = i;
2560 /* Higher numbered interrupt modes are less capable! */
2561 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2564 /* Would be good to use the net_dev name, but we're too early */
2565 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2567 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2568 if (!efx->workqueue)
2574 efx_fini_struct(efx);
2578 static void efx_fini_struct(struct efx_nic *efx)
2582 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2583 kfree(efx->channel[i]);
2585 if (efx->workqueue) {
2586 destroy_workqueue(efx->workqueue);
2587 efx->workqueue = NULL;
2591 /**************************************************************************
2595 **************************************************************************/
2597 /* Main body of final NIC shutdown code
2598 * This is called only at module unload (or hotplug removal).
2600 static void efx_pci_remove_main(struct efx_nic *efx)
2602 /* Flush reset_work. It can no longer be scheduled since we
2605 BUG_ON(efx->state == STATE_READY);
2606 cancel_work_sync(&efx->reset_work);
2608 efx_disable_interrupts(efx);
2609 efx_nic_fini_interrupt(efx);
2611 efx->type->fini(efx);
2613 efx_remove_all(efx);
2616 /* Final NIC shutdown
2617 * This is called only at module unload (or hotplug removal).
2619 static void efx_pci_remove(struct pci_dev *pci_dev)
2621 struct efx_nic *efx;
2623 efx = pci_get_drvdata(pci_dev);
2627 /* Mark the NIC as fini, then stop the interface */
2629 dev_close(efx->net_dev);
2630 efx_disable_interrupts(efx);
2633 efx_sriov_fini(efx);
2634 efx_unregister_netdev(efx);
2636 efx_mtd_remove(efx);
2638 efx_pci_remove_main(efx);
2641 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2643 efx_fini_struct(efx);
2644 pci_set_drvdata(pci_dev, NULL);
2645 free_netdev(efx->net_dev);
2647 pci_disable_pcie_error_reporting(pci_dev);
2650 /* NIC VPD information
2651 * Called during probe to display the part number of the
2652 * installed NIC. VPD is potentially very large but this should
2653 * always appear within the first 512 bytes.
2655 #define SFC_VPD_LEN 512
2656 static void efx_print_product_vpd(struct efx_nic *efx)
2658 struct pci_dev *dev = efx->pci_dev;
2659 char vpd_data[SFC_VPD_LEN];
2663 /* Get the vpd data from the device */
2664 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2665 if (vpd_size <= 0) {
2666 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2670 /* Get the Read only section */
2671 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2673 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2677 j = pci_vpd_lrdt_size(&vpd_data[i]);
2678 i += PCI_VPD_LRDT_TAG_SIZE;
2679 if (i + j > vpd_size)
2682 /* Get the Part number */
2683 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2685 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2689 j = pci_vpd_info_field_size(&vpd_data[i]);
2690 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2691 if (i + j > vpd_size) {
2692 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2696 netif_info(efx, drv, efx->net_dev,
2697 "Part Number : %.*s\n", j, &vpd_data[i]);
2701 /* Main body of NIC initialisation
2702 * This is called at module load (or hotplug insertion, theoretically).
2704 static int efx_pci_probe_main(struct efx_nic *efx)
2708 /* Do start-of-day initialisation */
2709 rc = efx_probe_all(efx);
2715 rc = efx->type->init(efx);
2717 netif_err(efx, probe, efx->net_dev,
2718 "failed to initialise NIC\n");
2722 rc = efx_init_port(efx);
2724 netif_err(efx, probe, efx->net_dev,
2725 "failed to initialise port\n");
2729 rc = efx_nic_init_interrupt(efx);
2732 rc = efx_enable_interrupts(efx);
2739 efx_nic_fini_interrupt(efx);
2743 efx->type->fini(efx);
2746 efx_remove_all(efx);
2751 /* NIC initialisation
2753 * This is called at module load (or hotplug insertion,
2754 * theoretically). It sets up PCI mappings, resets the NIC,
2755 * sets up and registers the network devices with the kernel and hooks
2756 * the interrupt service routine. It does not prepare the device for
2757 * transmission; this is left to the first time one of the network
2758 * interfaces is brought up (i.e. efx_net_open).
2760 static int efx_pci_probe(struct pci_dev *pci_dev,
2761 const struct pci_device_id *entry)
2763 struct net_device *net_dev;
2764 struct efx_nic *efx;
2767 /* Allocate and initialise a struct net_device and struct efx_nic */
2768 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2772 efx = netdev_priv(net_dev);
2773 efx->type = (const struct efx_nic_type *) entry->driver_data;
2774 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2775 NETIF_F_HIGHDMA | NETIF_F_TSO |
2777 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2778 net_dev->features |= NETIF_F_TSO6;
2779 /* Mask for features that also apply to VLAN devices */
2780 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2781 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2783 /* All offloads can be toggled */
2784 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2785 pci_set_drvdata(pci_dev, efx);
2786 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2787 rc = efx_init_struct(efx, pci_dev, net_dev);
2791 netif_info(efx, probe, efx->net_dev,
2792 "Solarflare NIC detected\n");
2794 efx_print_product_vpd(efx);
2796 /* Set up basic I/O (BAR mappings etc) */
2797 rc = efx_init_io(efx);
2801 rc = efx_pci_probe_main(efx);
2805 rc = efx_register_netdev(efx);
2809 rc = efx_sriov_init(efx);
2811 netif_err(efx, probe, efx->net_dev,
2812 "SR-IOV can't be enabled rc %d\n", rc);
2814 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2816 /* Try to create MTDs, but allow this to fail */
2818 rc = efx_mtd_probe(efx);
2821 netif_warn(efx, probe, efx->net_dev,
2822 "failed to create MTDs (%d)\n", rc);
2824 rc = pci_enable_pcie_error_reporting(pci_dev);
2825 if (rc && rc != -EINVAL)
2826 netif_warn(efx, probe, efx->net_dev,
2827 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2832 efx_pci_remove_main(efx);
2836 efx_fini_struct(efx);
2838 pci_set_drvdata(pci_dev, NULL);
2840 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2841 free_netdev(net_dev);
2845 static int efx_pm_freeze(struct device *dev)
2847 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2851 if (efx->state != STATE_DISABLED) {
2852 efx->state = STATE_UNINIT;
2854 efx_device_detach_sync(efx);
2857 efx_disable_interrupts(efx);
2865 static int efx_pm_thaw(struct device *dev)
2868 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2872 if (efx->state != STATE_DISABLED) {
2873 rc = efx_enable_interrupts(efx);
2877 mutex_lock(&efx->mac_lock);
2878 efx->phy_op->reconfigure(efx);
2879 mutex_unlock(&efx->mac_lock);
2883 netif_device_attach(efx->net_dev);
2885 efx->state = STATE_READY;
2887 efx->type->resume_wol(efx);
2892 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2893 queue_work(reset_workqueue, &efx->reset_work);
2903 static int efx_pm_poweroff(struct device *dev)
2905 struct pci_dev *pci_dev = to_pci_dev(dev);
2906 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2908 efx->type->fini(efx);
2910 efx->reset_pending = 0;
2912 pci_save_state(pci_dev);
2913 return pci_set_power_state(pci_dev, PCI_D3hot);
2916 /* Used for both resume and restore */
2917 static int efx_pm_resume(struct device *dev)
2919 struct pci_dev *pci_dev = to_pci_dev(dev);
2920 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2923 rc = pci_set_power_state(pci_dev, PCI_D0);
2926 pci_restore_state(pci_dev);
2927 rc = pci_enable_device(pci_dev);
2930 pci_set_master(efx->pci_dev);
2931 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2934 rc = efx->type->init(efx);
2937 rc = efx_pm_thaw(dev);
2941 static int efx_pm_suspend(struct device *dev)
2946 rc = efx_pm_poweroff(dev);
2952 static const struct dev_pm_ops efx_pm_ops = {
2953 .suspend = efx_pm_suspend,
2954 .resume = efx_pm_resume,
2955 .freeze = efx_pm_freeze,
2956 .thaw = efx_pm_thaw,
2957 .poweroff = efx_pm_poweroff,
2958 .restore = efx_pm_resume,
2961 /* A PCI error affecting this device was detected.
2962 * At this point MMIO and DMA may be disabled.
2963 * Stop the software path and request a slot reset.
2965 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
2966 enum pci_channel_state state)
2968 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2969 struct efx_nic *efx = pci_get_drvdata(pdev);
2971 if (state == pci_channel_io_perm_failure)
2972 return PCI_ERS_RESULT_DISCONNECT;
2976 if (efx->state != STATE_DISABLED) {
2977 efx->state = STATE_RECOVERY;
2978 efx->reset_pending = 0;
2980 efx_device_detach_sync(efx);
2983 efx_disable_interrupts(efx);
2985 status = PCI_ERS_RESULT_NEED_RESET;
2987 /* If the interface is disabled we don't want to do anything
2990 status = PCI_ERS_RESULT_RECOVERED;
2995 pci_disable_device(pdev);
3000 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
3001 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3003 struct efx_nic *efx = pci_get_drvdata(pdev);
3004 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3007 if (pci_enable_device(pdev)) {
3008 netif_err(efx, hw, efx->net_dev,
3009 "Cannot re-enable PCI device after reset.\n");
3010 status = PCI_ERS_RESULT_DISCONNECT;
3013 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3015 netif_err(efx, hw, efx->net_dev,
3016 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3017 /* Non-fatal error. Continue. */
3023 /* Perform the actual reset and resume I/O operations. */
3024 static void efx_io_resume(struct pci_dev *pdev)
3026 struct efx_nic *efx = pci_get_drvdata(pdev);
3031 if (efx->state == STATE_DISABLED)
3034 rc = efx_reset(efx, RESET_TYPE_ALL);
3036 netif_err(efx, hw, efx->net_dev,
3037 "efx_reset failed after PCI error (%d)\n", rc);
3039 efx->state = STATE_READY;
3040 netif_dbg(efx, hw, efx->net_dev,
3041 "Done resetting and resuming IO after PCI error.\n");
3048 /* For simplicity and reliability, we always require a slot reset and try to
3049 * reset the hardware when a pci error affecting the device is detected.
3050 * We leave both the link_reset and mmio_enabled callback unimplemented:
3051 * with our request for slot reset the mmio_enabled callback will never be
3052 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3054 static struct pci_error_handlers efx_err_handlers = {
3055 .error_detected = efx_io_error_detected,
3056 .slot_reset = efx_io_slot_reset,
3057 .resume = efx_io_resume,
3060 static struct pci_driver efx_pci_driver = {
3061 .name = KBUILD_MODNAME,
3062 .id_table = efx_pci_table,
3063 .probe = efx_pci_probe,
3064 .remove = efx_pci_remove,
3065 .driver.pm = &efx_pm_ops,
3066 .err_handler = &efx_err_handlers,
3069 /**************************************************************************
3071 * Kernel module interface
3073 *************************************************************************/
3075 module_param(interrupt_mode, uint, 0444);
3076 MODULE_PARM_DESC(interrupt_mode,
3077 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3079 static int __init efx_init_module(void)
3083 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3085 rc = register_netdevice_notifier(&efx_netdev_notifier);
3089 rc = efx_init_sriov();
3093 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3094 if (!reset_workqueue) {
3099 rc = pci_register_driver(&efx_pci_driver);
3106 destroy_workqueue(reset_workqueue);
3110 unregister_netdevice_notifier(&efx_netdev_notifier);
3115 static void __exit efx_exit_module(void)
3117 printk(KERN_INFO "Solarflare NET driver unloading\n");
3119 pci_unregister_driver(&efx_pci_driver);
3120 destroy_workqueue(reset_workqueue);
3122 unregister_netdevice_notifier(&efx_netdev_notifier);
3126 module_init(efx_init_module);
3127 module_exit(efx_exit_module);
3129 MODULE_AUTHOR("Solarflare Communications and "
3130 "Michael Brown <mbrown@fensystems.co.uk>");
3131 MODULE_DESCRIPTION("Solarflare Communications network driver");
3132 MODULE_LICENSE("GPL");
3133 MODULE_DEVICE_TABLE(pci, efx_pci_table);