1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
32 #include "workarounds.h"
34 /**************************************************************************
38 **************************************************************************
41 /* Loopback mode names (see LOOPBACK_MODE()) */
42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
43 const char *const efx_loopback_mode_names[] = {
44 [LOOPBACK_NONE] = "NONE",
45 [LOOPBACK_DATA] = "DATAPATH",
46 [LOOPBACK_GMAC] = "GMAC",
47 [LOOPBACK_XGMII] = "XGMII",
48 [LOOPBACK_XGXS] = "XGXS",
49 [LOOPBACK_XAUI] = "XAUI",
50 [LOOPBACK_GMII] = "GMII",
51 [LOOPBACK_SGMII] = "SGMII",
52 [LOOPBACK_XGBR] = "XGBR",
53 [LOOPBACK_XFI] = "XFI",
54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
55 [LOOPBACK_GMII_FAR] = "GMII_FAR",
56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
57 [LOOPBACK_XFI_FAR] = "XFI_FAR",
58 [LOOPBACK_GPHY] = "GPHY",
59 [LOOPBACK_PHYXS] = "PHYXS",
60 [LOOPBACK_PCS] = "PCS",
61 [LOOPBACK_PMAPMD] = "PMA/PMD",
62 [LOOPBACK_XPORT] = "XPORT",
63 [LOOPBACK_XGMII_WS] = "XGMII_WS",
64 [LOOPBACK_XAUI_WS] = "XAUI_WS",
65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
67 [LOOPBACK_GMII_WS] = "GMII_WS",
68 [LOOPBACK_XFI_WS] = "XFI_WS",
69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
74 const char *const efx_reset_type_names[] = {
75 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
76 [RESET_TYPE_ALL] = "ALL",
77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
78 [RESET_TYPE_WORLD] = "WORLD",
79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
80 [RESET_TYPE_DATAPATH] = "DATAPATH",
81 [RESET_TYPE_MC_BIST] = "MC_BIST",
82 [RESET_TYPE_DISABLE] = "DISABLE",
83 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
84 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
85 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
86 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
87 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
88 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
89 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
92 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
93 * queued onto this work queue. This is not a per-nic work queue, because
94 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
96 static struct workqueue_struct *reset_workqueue;
98 /* How often and how many times to poll for a reset while waiting for a
99 * BIST that another function started to complete.
101 #define BIST_WAIT_DELAY_MS 100
102 #define BIST_WAIT_DELAY_COUNT 100
104 /**************************************************************************
106 * Configurable values
108 *************************************************************************/
111 * Use separate channels for TX and RX events
113 * Set this to 1 to use separate channels for TX and RX. It allows us
114 * to control interrupt affinity separately for TX and RX.
116 * This is only used in MSI-X interrupt mode
118 bool efx_separate_tx_channels;
119 module_param(efx_separate_tx_channels, bool, 0444);
120 MODULE_PARM_DESC(efx_separate_tx_channels,
121 "Use separate channels for TX and RX");
123 /* This is the weight assigned to each of the (per-channel) virtual
126 static int napi_weight = 64;
128 /* This is the time (in jiffies) between invocations of the hardware
130 * On Falcon-based NICs, this will:
131 * - Check the on-board hardware monitor;
132 * - Poll the link state and reconfigure the hardware as necessary.
133 * On Siena-based NICs for power systems with EEH support, this will give EEH a
136 static unsigned int efx_monitor_interval = 1 * HZ;
138 /* Initial interrupt moderation settings. They can be modified after
139 * module load with ethtool.
141 * The default for RX should strike a balance between increasing the
142 * round-trip latency and reducing overhead.
144 static unsigned int rx_irq_mod_usec = 60;
146 /* Initial interrupt moderation settings. They can be modified after
147 * module load with ethtool.
149 * This default is chosen to ensure that a 10G link does not go idle
150 * while a TX queue is stopped after it has become full. A queue is
151 * restarted when it drops below half full. The time this takes (assuming
152 * worst case 3 descriptors per packet and 1024 descriptors) is
153 * 512 / 3 * 1.2 = 205 usec.
155 static unsigned int tx_irq_mod_usec = 150;
157 /* This is the first interrupt mode to try out of:
162 static unsigned int interrupt_mode;
164 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
165 * i.e. the number of CPUs among which we may distribute simultaneous
166 * interrupt handling.
168 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
169 * The default (0) means to assign an interrupt to each core.
171 static unsigned int rss_cpus;
172 module_param(rss_cpus, uint, 0444);
173 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
175 static bool phy_flash_cfg;
176 module_param(phy_flash_cfg, bool, 0644);
177 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
179 static unsigned irq_adapt_low_thresh = 8000;
180 module_param(irq_adapt_low_thresh, uint, 0644);
181 MODULE_PARM_DESC(irq_adapt_low_thresh,
182 "Threshold score for reducing IRQ moderation");
184 static unsigned irq_adapt_high_thresh = 16000;
185 module_param(irq_adapt_high_thresh, uint, 0644);
186 MODULE_PARM_DESC(irq_adapt_high_thresh,
187 "Threshold score for increasing IRQ moderation");
189 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
190 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
191 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
192 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
193 module_param(debug, uint, 0);
194 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
196 /**************************************************************************
198 * Utility functions and prototypes
200 *************************************************************************/
202 static int efx_soft_enable_interrupts(struct efx_nic *efx);
203 static void efx_soft_disable_interrupts(struct efx_nic *efx);
204 static void efx_remove_channel(struct efx_channel *channel);
205 static void efx_remove_channels(struct efx_nic *efx);
206 static const struct efx_channel_type efx_default_channel_type;
207 static void efx_remove_port(struct efx_nic *efx);
208 static void efx_init_napi_channel(struct efx_channel *channel);
209 static void efx_fini_napi(struct efx_nic *efx);
210 static void efx_fini_napi_channel(struct efx_channel *channel);
211 static void efx_fini_struct(struct efx_nic *efx);
212 static void efx_start_all(struct efx_nic *efx);
213 static void efx_stop_all(struct efx_nic *efx);
215 #define EFX_ASSERT_RESET_SERIALISED(efx) \
217 if ((efx->state == STATE_READY) || \
218 (efx->state == STATE_RECOVERY) || \
219 (efx->state == STATE_DISABLED)) \
223 static int efx_check_disabled(struct efx_nic *efx)
225 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
226 netif_err(efx, drv, efx->net_dev,
227 "device is disabled due to earlier errors\n");
233 /**************************************************************************
235 * Event queue processing
237 *************************************************************************/
239 /* Process channel's event queue
241 * This function is responsible for processing the event queue of a
242 * single channel. The caller must guarantee that this function will
243 * never be concurrently called more than once on the same channel,
244 * though different channels may be being processed concurrently.
246 static int efx_process_channel(struct efx_channel *channel, int budget)
248 struct efx_tx_queue *tx_queue;
251 if (unlikely(!channel->enabled))
254 efx_for_each_channel_tx_queue(tx_queue, channel) {
255 tx_queue->pkts_compl = 0;
256 tx_queue->bytes_compl = 0;
259 spent = efx_nic_process_eventq(channel, budget);
260 if (spent && efx_channel_has_rx_queue(channel)) {
261 struct efx_rx_queue *rx_queue =
262 efx_channel_get_rx_queue(channel);
264 efx_rx_flush_packet(channel);
265 efx_fast_push_rx_descriptors(rx_queue, true);
269 efx_for_each_channel_tx_queue(tx_queue, channel) {
270 if (tx_queue->bytes_compl) {
271 netdev_tx_completed_queue(tx_queue->core_txq,
272 tx_queue->pkts_compl, tx_queue->bytes_compl);
281 * NAPI guarantees serialisation of polls of the same device, which
282 * provides the guarantee required by efx_process_channel().
284 static int efx_poll(struct napi_struct *napi, int budget)
286 struct efx_channel *channel =
287 container_of(napi, struct efx_channel, napi_str);
288 struct efx_nic *efx = channel->efx;
291 if (!efx_channel_lock_napi(channel))
294 netif_vdbg(efx, intr, efx->net_dev,
295 "channel %d NAPI poll executing on CPU %d\n",
296 channel->channel, raw_smp_processor_id());
298 spent = efx_process_channel(channel, budget);
300 if (spent < budget) {
301 if (efx_channel_has_rx_queue(channel) &&
302 efx->irq_rx_adaptive &&
303 unlikely(++channel->irq_count == 1000)) {
304 if (unlikely(channel->irq_mod_score <
305 irq_adapt_low_thresh)) {
306 if (channel->irq_moderation > 1) {
307 channel->irq_moderation -= 1;
308 efx->type->push_irq_moderation(channel);
310 } else if (unlikely(channel->irq_mod_score >
311 irq_adapt_high_thresh)) {
312 if (channel->irq_moderation <
313 efx->irq_rx_moderation) {
314 channel->irq_moderation += 1;
315 efx->type->push_irq_moderation(channel);
318 channel->irq_count = 0;
319 channel->irq_mod_score = 0;
322 efx_filter_rfs_expire(channel);
324 /* There is no race here; although napi_disable() will
325 * only wait for napi_complete(), this isn't a problem
326 * since efx_nic_eventq_read_ack() will have no effect if
327 * interrupts have already been disabled.
330 efx_nic_eventq_read_ack(channel);
333 efx_channel_unlock_napi(channel);
337 /* Create event queue
338 * Event queue memory allocations are done only once. If the channel
339 * is reset, the memory buffer will be reused; this guards against
340 * errors during channel reset and also simplifies interrupt handling.
342 static int efx_probe_eventq(struct efx_channel *channel)
344 struct efx_nic *efx = channel->efx;
345 unsigned long entries;
347 netif_dbg(efx, probe, efx->net_dev,
348 "chan %d create event queue\n", channel->channel);
350 /* Build an event queue with room for one event per tx and rx buffer,
351 * plus some extra for link state events and MCDI completions. */
352 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
353 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
354 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
356 return efx_nic_probe_eventq(channel);
359 /* Prepare channel's event queue */
360 static int efx_init_eventq(struct efx_channel *channel)
362 struct efx_nic *efx = channel->efx;
365 EFX_WARN_ON_PARANOID(channel->eventq_init);
367 netif_dbg(efx, drv, efx->net_dev,
368 "chan %d init event queue\n", channel->channel);
370 rc = efx_nic_init_eventq(channel);
372 efx->type->push_irq_moderation(channel);
373 channel->eventq_read_ptr = 0;
374 channel->eventq_init = true;
379 /* Enable event queue processing and NAPI */
380 void efx_start_eventq(struct efx_channel *channel)
382 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
383 "chan %d start event queue\n", channel->channel);
385 /* Make sure the NAPI handler sees the enabled flag set */
386 channel->enabled = true;
389 efx_channel_enable(channel);
390 napi_enable(&channel->napi_str);
391 efx_nic_eventq_read_ack(channel);
394 /* Disable event queue processing and NAPI */
395 void efx_stop_eventq(struct efx_channel *channel)
397 if (!channel->enabled)
400 napi_disable(&channel->napi_str);
401 while (!efx_channel_disable(channel))
402 usleep_range(1000, 20000);
403 channel->enabled = false;
406 static void efx_fini_eventq(struct efx_channel *channel)
408 if (!channel->eventq_init)
411 netif_dbg(channel->efx, drv, channel->efx->net_dev,
412 "chan %d fini event queue\n", channel->channel);
414 efx_nic_fini_eventq(channel);
415 channel->eventq_init = false;
418 static void efx_remove_eventq(struct efx_channel *channel)
420 netif_dbg(channel->efx, drv, channel->efx->net_dev,
421 "chan %d remove event queue\n", channel->channel);
423 efx_nic_remove_eventq(channel);
426 /**************************************************************************
430 *************************************************************************/
432 /* Allocate and initialise a channel structure. */
433 static struct efx_channel *
434 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
436 struct efx_channel *channel;
437 struct efx_rx_queue *rx_queue;
438 struct efx_tx_queue *tx_queue;
441 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
446 channel->channel = i;
447 channel->type = &efx_default_channel_type;
449 for (j = 0; j < EFX_TXQ_TYPES; j++) {
450 tx_queue = &channel->tx_queue[j];
452 tx_queue->queue = i * EFX_TXQ_TYPES + j;
453 tx_queue->channel = channel;
456 rx_queue = &channel->rx_queue;
458 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
459 (unsigned long)rx_queue);
464 /* Allocate and initialise a channel structure, copying parameters
465 * (but not resources) from an old channel structure.
467 static struct efx_channel *
468 efx_copy_channel(const struct efx_channel *old_channel)
470 struct efx_channel *channel;
471 struct efx_rx_queue *rx_queue;
472 struct efx_tx_queue *tx_queue;
475 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
479 *channel = *old_channel;
481 channel->napi_dev = NULL;
482 memset(&channel->eventq, 0, sizeof(channel->eventq));
484 for (j = 0; j < EFX_TXQ_TYPES; j++) {
485 tx_queue = &channel->tx_queue[j];
486 if (tx_queue->channel)
487 tx_queue->channel = channel;
488 tx_queue->buffer = NULL;
489 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
492 rx_queue = &channel->rx_queue;
493 rx_queue->buffer = NULL;
494 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
495 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
496 (unsigned long)rx_queue);
501 static int efx_probe_channel(struct efx_channel *channel)
503 struct efx_tx_queue *tx_queue;
504 struct efx_rx_queue *rx_queue;
507 netif_dbg(channel->efx, probe, channel->efx->net_dev,
508 "creating channel %d\n", channel->channel);
510 rc = channel->type->pre_probe(channel);
514 rc = efx_probe_eventq(channel);
518 efx_for_each_channel_tx_queue(tx_queue, channel) {
519 rc = efx_probe_tx_queue(tx_queue);
524 efx_for_each_channel_rx_queue(rx_queue, channel) {
525 rc = efx_probe_rx_queue(rx_queue);
533 efx_remove_channel(channel);
538 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
540 struct efx_nic *efx = channel->efx;
544 number = channel->channel;
545 if (efx->tx_channel_offset == 0) {
547 } else if (channel->channel < efx->tx_channel_offset) {
551 number -= efx->tx_channel_offset;
553 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
556 static void efx_set_channel_names(struct efx_nic *efx)
558 struct efx_channel *channel;
560 efx_for_each_channel(channel, efx)
561 channel->type->get_name(channel,
562 efx->msi_context[channel->channel].name,
563 sizeof(efx->msi_context[0].name));
566 static int efx_probe_channels(struct efx_nic *efx)
568 struct efx_channel *channel;
571 /* Restart special buffer allocation */
572 efx->next_buffer_table = 0;
574 /* Probe channels in reverse, so that any 'extra' channels
575 * use the start of the buffer table. This allows the traffic
576 * channels to be resized without moving them or wasting the
577 * entries before them.
579 efx_for_each_channel_rev(channel, efx) {
580 rc = efx_probe_channel(channel);
582 netif_err(efx, probe, efx->net_dev,
583 "failed to create channel %d\n",
588 efx_set_channel_names(efx);
593 efx_remove_channels(efx);
597 /* Channels are shutdown and reinitialised whilst the NIC is running
598 * to propagate configuration changes (mtu, checksum offload), or
599 * to clear hardware error conditions
601 static void efx_start_datapath(struct efx_nic *efx)
603 bool old_rx_scatter = efx->rx_scatter;
604 struct efx_tx_queue *tx_queue;
605 struct efx_rx_queue *rx_queue;
606 struct efx_channel *channel;
609 /* Calculate the rx buffer allocation parameters required to
610 * support the current MTU, including padding for header
611 * alignment and overruns.
613 efx->rx_dma_len = (efx->rx_prefix_size +
614 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
615 efx->type->rx_buffer_padding);
616 rx_buf_len = (sizeof(struct efx_rx_page_state) +
617 efx->rx_ip_align + efx->rx_dma_len);
618 if (rx_buf_len <= PAGE_SIZE) {
619 efx->rx_scatter = efx->type->always_rx_scatter;
620 efx->rx_buffer_order = 0;
621 } else if (efx->type->can_rx_scatter) {
622 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
623 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
624 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
625 EFX_RX_BUF_ALIGNMENT) >
627 efx->rx_scatter = true;
628 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
629 efx->rx_buffer_order = 0;
631 efx->rx_scatter = false;
632 efx->rx_buffer_order = get_order(rx_buf_len);
635 efx_rx_config_page_split(efx);
636 if (efx->rx_buffer_order)
637 netif_dbg(efx, drv, efx->net_dev,
638 "RX buf len=%u; page order=%u batch=%u\n",
639 efx->rx_dma_len, efx->rx_buffer_order,
640 efx->rx_pages_per_batch);
642 netif_dbg(efx, drv, efx->net_dev,
643 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
644 efx->rx_dma_len, efx->rx_page_buf_step,
645 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
647 /* RX filters may also have scatter-enabled flags */
648 if (efx->rx_scatter != old_rx_scatter)
649 efx->type->filter_update_rx_scatter(efx);
651 /* We must keep at least one descriptor in a TX ring empty.
652 * We could avoid this when the queue size does not exactly
653 * match the hardware ring size, but it's not that important.
654 * Therefore we stop the queue when one more skb might fill
655 * the ring completely. We wake it when half way back to
658 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
659 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
661 /* Initialise the channels */
662 efx_for_each_channel(channel, efx) {
663 efx_for_each_channel_tx_queue(tx_queue, channel) {
664 efx_init_tx_queue(tx_queue);
665 atomic_inc(&efx->active_queues);
668 efx_for_each_channel_rx_queue(rx_queue, channel) {
669 efx_init_rx_queue(rx_queue);
670 atomic_inc(&efx->active_queues);
671 efx_stop_eventq(channel);
672 efx_fast_push_rx_descriptors(rx_queue, false);
673 efx_start_eventq(channel);
676 WARN_ON(channel->rx_pkt_n_frags);
679 efx_ptp_start_datapath(efx);
681 if (netif_device_present(efx->net_dev))
682 netif_tx_wake_all_queues(efx->net_dev);
685 static void efx_stop_datapath(struct efx_nic *efx)
687 struct efx_channel *channel;
688 struct efx_tx_queue *tx_queue;
689 struct efx_rx_queue *rx_queue;
692 EFX_ASSERT_RESET_SERIALISED(efx);
693 BUG_ON(efx->port_enabled);
695 efx_ptp_stop_datapath(efx);
698 efx_for_each_channel(channel, efx) {
699 efx_for_each_channel_rx_queue(rx_queue, channel)
700 rx_queue->refill_enabled = false;
703 efx_for_each_channel(channel, efx) {
704 /* RX packet processing is pipelined, so wait for the
705 * NAPI handler to complete. At least event queue 0
706 * might be kept active by non-data events, so don't
707 * use napi_synchronize() but actually disable NAPI
710 if (efx_channel_has_rx_queue(channel)) {
711 efx_stop_eventq(channel);
712 efx_start_eventq(channel);
716 rc = efx->type->fini_dmaq(efx);
717 if (rc && EFX_WORKAROUND_7803(efx)) {
718 /* Schedule a reset to recover from the flush failure. The
719 * descriptor caches reference memory we're about to free,
720 * but falcon_reconfigure_mac_wrapper() won't reconnect
721 * the MACs because of the pending reset.
723 netif_err(efx, drv, efx->net_dev,
724 "Resetting to recover from flush failure\n");
725 efx_schedule_reset(efx, RESET_TYPE_ALL);
727 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
729 netif_dbg(efx, drv, efx->net_dev,
730 "successfully flushed all queues\n");
733 efx_for_each_channel(channel, efx) {
734 efx_for_each_channel_rx_queue(rx_queue, channel)
735 efx_fini_rx_queue(rx_queue);
736 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
737 efx_fini_tx_queue(tx_queue);
741 static void efx_remove_channel(struct efx_channel *channel)
743 struct efx_tx_queue *tx_queue;
744 struct efx_rx_queue *rx_queue;
746 netif_dbg(channel->efx, drv, channel->efx->net_dev,
747 "destroy chan %d\n", channel->channel);
749 efx_for_each_channel_rx_queue(rx_queue, channel)
750 efx_remove_rx_queue(rx_queue);
751 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
752 efx_remove_tx_queue(tx_queue);
753 efx_remove_eventq(channel);
754 channel->type->post_remove(channel);
757 static void efx_remove_channels(struct efx_nic *efx)
759 struct efx_channel *channel;
761 efx_for_each_channel(channel, efx)
762 efx_remove_channel(channel);
766 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
768 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
769 u32 old_rxq_entries, old_txq_entries;
770 unsigned i, next_buffer_table = 0;
773 rc = efx_check_disabled(efx);
777 /* Not all channels should be reallocated. We must avoid
778 * reallocating their buffer table entries.
780 efx_for_each_channel(channel, efx) {
781 struct efx_rx_queue *rx_queue;
782 struct efx_tx_queue *tx_queue;
784 if (channel->type->copy)
786 next_buffer_table = max(next_buffer_table,
787 channel->eventq.index +
788 channel->eventq.entries);
789 efx_for_each_channel_rx_queue(rx_queue, channel)
790 next_buffer_table = max(next_buffer_table,
791 rx_queue->rxd.index +
792 rx_queue->rxd.entries);
793 efx_for_each_channel_tx_queue(tx_queue, channel)
794 next_buffer_table = max(next_buffer_table,
795 tx_queue->txd.index +
796 tx_queue->txd.entries);
799 efx_device_detach_sync(efx);
801 efx_soft_disable_interrupts(efx);
803 /* Clone channels (where possible) */
804 memset(other_channel, 0, sizeof(other_channel));
805 for (i = 0; i < efx->n_channels; i++) {
806 channel = efx->channel[i];
807 if (channel->type->copy)
808 channel = channel->type->copy(channel);
813 other_channel[i] = channel;
816 /* Swap entry counts and channel pointers */
817 old_rxq_entries = efx->rxq_entries;
818 old_txq_entries = efx->txq_entries;
819 efx->rxq_entries = rxq_entries;
820 efx->txq_entries = txq_entries;
821 for (i = 0; i < efx->n_channels; i++) {
822 channel = efx->channel[i];
823 efx->channel[i] = other_channel[i];
824 other_channel[i] = channel;
827 /* Restart buffer table allocation */
828 efx->next_buffer_table = next_buffer_table;
830 for (i = 0; i < efx->n_channels; i++) {
831 channel = efx->channel[i];
832 if (!channel->type->copy)
834 rc = efx_probe_channel(channel);
837 efx_init_napi_channel(efx->channel[i]);
841 /* Destroy unused channel structures */
842 for (i = 0; i < efx->n_channels; i++) {
843 channel = other_channel[i];
844 if (channel && channel->type->copy) {
845 efx_fini_napi_channel(channel);
846 efx_remove_channel(channel);
851 rc2 = efx_soft_enable_interrupts(efx);
854 netif_err(efx, drv, efx->net_dev,
855 "unable to restart interrupts on channel reallocation\n");
856 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
859 netif_device_attach(efx->net_dev);
865 efx->rxq_entries = old_rxq_entries;
866 efx->txq_entries = old_txq_entries;
867 for (i = 0; i < efx->n_channels; i++) {
868 channel = efx->channel[i];
869 efx->channel[i] = other_channel[i];
870 other_channel[i] = channel;
875 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
877 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
880 static const struct efx_channel_type efx_default_channel_type = {
881 .pre_probe = efx_channel_dummy_op_int,
882 .post_remove = efx_channel_dummy_op_void,
883 .get_name = efx_get_channel_name,
884 .copy = efx_copy_channel,
885 .keep_eventq = false,
888 int efx_channel_dummy_op_int(struct efx_channel *channel)
893 void efx_channel_dummy_op_void(struct efx_channel *channel)
897 /**************************************************************************
901 **************************************************************************/
903 /* This ensures that the kernel is kept informed (via
904 * netif_carrier_on/off) of the link status, and also maintains the
905 * link status's stop on the port's TX queue.
907 void efx_link_status_changed(struct efx_nic *efx)
909 struct efx_link_state *link_state = &efx->link_state;
911 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
912 * that no events are triggered between unregister_netdev() and the
913 * driver unloading. A more general condition is that NETDEV_CHANGE
914 * can only be generated between NETDEV_UP and NETDEV_DOWN */
915 if (!netif_running(efx->net_dev))
918 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
919 efx->n_link_state_changes++;
922 netif_carrier_on(efx->net_dev);
924 netif_carrier_off(efx->net_dev);
927 /* Status message for kernel log */
929 netif_info(efx, link, efx->net_dev,
930 "link up at %uMbps %s-duplex (MTU %d)\n",
931 link_state->speed, link_state->fd ? "full" : "half",
934 netif_info(efx, link, efx->net_dev, "link down\n");
937 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
939 efx->link_advertising = advertising;
941 if (advertising & ADVERTISED_Pause)
942 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
944 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
945 if (advertising & ADVERTISED_Asym_Pause)
946 efx->wanted_fc ^= EFX_FC_TX;
950 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
952 efx->wanted_fc = wanted_fc;
953 if (efx->link_advertising) {
954 if (wanted_fc & EFX_FC_RX)
955 efx->link_advertising |= (ADVERTISED_Pause |
956 ADVERTISED_Asym_Pause);
958 efx->link_advertising &= ~(ADVERTISED_Pause |
959 ADVERTISED_Asym_Pause);
960 if (wanted_fc & EFX_FC_TX)
961 efx->link_advertising ^= ADVERTISED_Asym_Pause;
965 static void efx_fini_port(struct efx_nic *efx);
967 /* We assume that efx->type->reconfigure_mac will always try to sync RX
968 * filters and therefore needs to read-lock the filter table against freeing
970 void efx_mac_reconfigure(struct efx_nic *efx)
972 down_read(&efx->filter_sem);
973 efx->type->reconfigure_mac(efx);
974 up_read(&efx->filter_sem);
977 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
978 * the MAC appropriately. All other PHY configuration changes are pushed
979 * through phy_op->set_settings(), and pushed asynchronously to the MAC
980 * through efx_monitor().
982 * Callers must hold the mac_lock
984 int __efx_reconfigure_port(struct efx_nic *efx)
986 enum efx_phy_mode phy_mode;
989 WARN_ON(!mutex_is_locked(&efx->mac_lock));
991 /* Disable PHY transmit in mac level loopbacks */
992 phy_mode = efx->phy_mode;
993 if (LOOPBACK_INTERNAL(efx))
994 efx->phy_mode |= PHY_MODE_TX_DISABLED;
996 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
998 rc = efx->type->reconfigure_port(efx);
1001 efx->phy_mode = phy_mode;
1006 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1008 int efx_reconfigure_port(struct efx_nic *efx)
1012 EFX_ASSERT_RESET_SERIALISED(efx);
1014 mutex_lock(&efx->mac_lock);
1015 rc = __efx_reconfigure_port(efx);
1016 mutex_unlock(&efx->mac_lock);
1021 /* Asynchronous work item for changing MAC promiscuity and multicast
1022 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1024 static void efx_mac_work(struct work_struct *data)
1026 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1028 mutex_lock(&efx->mac_lock);
1029 if (efx->port_enabled)
1030 efx_mac_reconfigure(efx);
1031 mutex_unlock(&efx->mac_lock);
1034 static int efx_probe_port(struct efx_nic *efx)
1038 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1041 efx->phy_mode = PHY_MODE_SPECIAL;
1043 /* Connect up MAC/PHY operations table */
1044 rc = efx->type->probe_port(efx);
1048 /* Initialise MAC address to permanent address */
1049 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1054 static int efx_init_port(struct efx_nic *efx)
1058 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1060 mutex_lock(&efx->mac_lock);
1062 rc = efx->phy_op->init(efx);
1066 efx->port_initialized = true;
1068 /* Reconfigure the MAC before creating dma queues (required for
1069 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1070 efx_mac_reconfigure(efx);
1072 /* Ensure the PHY advertises the correct flow control settings */
1073 rc = efx->phy_op->reconfigure(efx);
1074 if (rc && rc != -EPERM)
1077 mutex_unlock(&efx->mac_lock);
1081 efx->phy_op->fini(efx);
1083 mutex_unlock(&efx->mac_lock);
1087 static void efx_start_port(struct efx_nic *efx)
1089 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1090 BUG_ON(efx->port_enabled);
1092 mutex_lock(&efx->mac_lock);
1093 efx->port_enabled = true;
1095 /* Ensure MAC ingress/egress is enabled */
1096 efx_mac_reconfigure(efx);
1098 mutex_unlock(&efx->mac_lock);
1101 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1102 * and the async self-test, wait for them to finish and prevent them
1103 * being scheduled again. This doesn't cover online resets, which
1104 * should only be cancelled when removing the device.
1106 static void efx_stop_port(struct efx_nic *efx)
1108 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1110 EFX_ASSERT_RESET_SERIALISED(efx);
1112 mutex_lock(&efx->mac_lock);
1113 efx->port_enabled = false;
1114 mutex_unlock(&efx->mac_lock);
1116 /* Serialise against efx_set_multicast_list() */
1117 netif_addr_lock_bh(efx->net_dev);
1118 netif_addr_unlock_bh(efx->net_dev);
1120 cancel_delayed_work_sync(&efx->monitor_work);
1121 efx_selftest_async_cancel(efx);
1122 cancel_work_sync(&efx->mac_work);
1125 static void efx_fini_port(struct efx_nic *efx)
1127 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1129 if (!efx->port_initialized)
1132 efx->phy_op->fini(efx);
1133 efx->port_initialized = false;
1135 efx->link_state.up = false;
1136 efx_link_status_changed(efx);
1139 static void efx_remove_port(struct efx_nic *efx)
1141 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1143 efx->type->remove_port(efx);
1146 /**************************************************************************
1150 **************************************************************************/
1152 static LIST_HEAD(efx_primary_list);
1153 static LIST_HEAD(efx_unassociated_list);
1155 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1157 return left->type == right->type &&
1158 left->vpd_sn && right->vpd_sn &&
1159 !strcmp(left->vpd_sn, right->vpd_sn);
1162 static void efx_associate(struct efx_nic *efx)
1164 struct efx_nic *other, *next;
1166 if (efx->primary == efx) {
1167 /* Adding primary function; look for secondaries */
1169 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1170 list_add_tail(&efx->node, &efx_primary_list);
1172 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1174 if (efx_same_controller(efx, other)) {
1175 list_del(&other->node);
1176 netif_dbg(other, probe, other->net_dev,
1177 "moving to secondary list of %s %s\n",
1178 pci_name(efx->pci_dev),
1179 efx->net_dev->name);
1180 list_add_tail(&other->node,
1181 &efx->secondary_list);
1182 other->primary = efx;
1186 /* Adding secondary function; look for primary */
1188 list_for_each_entry(other, &efx_primary_list, node) {
1189 if (efx_same_controller(efx, other)) {
1190 netif_dbg(efx, probe, efx->net_dev,
1191 "adding to secondary list of %s %s\n",
1192 pci_name(other->pci_dev),
1193 other->net_dev->name);
1194 list_add_tail(&efx->node,
1195 &other->secondary_list);
1196 efx->primary = other;
1201 netif_dbg(efx, probe, efx->net_dev,
1202 "adding to unassociated list\n");
1203 list_add_tail(&efx->node, &efx_unassociated_list);
1207 static void efx_dissociate(struct efx_nic *efx)
1209 struct efx_nic *other, *next;
1211 list_del(&efx->node);
1212 efx->primary = NULL;
1214 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1215 list_del(&other->node);
1216 netif_dbg(other, probe, other->net_dev,
1217 "moving to unassociated list\n");
1218 list_add_tail(&other->node, &efx_unassociated_list);
1219 other->primary = NULL;
1223 /* This configures the PCI device to enable I/O and DMA. */
1224 static int efx_init_io(struct efx_nic *efx)
1226 struct pci_dev *pci_dev = efx->pci_dev;
1227 dma_addr_t dma_mask = efx->type->max_dma_mask;
1228 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1231 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1233 bar = efx->type->mem_bar;
1235 rc = pci_enable_device(pci_dev);
1237 netif_err(efx, probe, efx->net_dev,
1238 "failed to enable PCI device\n");
1242 pci_set_master(pci_dev);
1244 /* Set the PCI DMA mask. Try all possibilities from our
1245 * genuine mask down to 32 bits, because some architectures
1246 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1247 * masks event though they reject 46 bit masks.
1249 while (dma_mask > 0x7fffffffUL) {
1250 if (dma_supported(&pci_dev->dev, dma_mask)) {
1251 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1258 netif_err(efx, probe, efx->net_dev,
1259 "could not find a suitable DMA mask\n");
1262 netif_dbg(efx, probe, efx->net_dev,
1263 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1265 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1266 rc = pci_request_region(pci_dev, bar, "sfc");
1268 netif_err(efx, probe, efx->net_dev,
1269 "request for memory BAR failed\n");
1273 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1274 if (!efx->membase) {
1275 netif_err(efx, probe, efx->net_dev,
1276 "could not map memory BAR at %llx+%x\n",
1277 (unsigned long long)efx->membase_phys, mem_map_size);
1281 netif_dbg(efx, probe, efx->net_dev,
1282 "memory BAR at %llx+%x (virtual %p)\n",
1283 (unsigned long long)efx->membase_phys, mem_map_size,
1289 pci_release_region(efx->pci_dev, bar);
1291 efx->membase_phys = 0;
1293 pci_disable_device(efx->pci_dev);
1298 static void efx_fini_io(struct efx_nic *efx)
1302 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1305 iounmap(efx->membase);
1306 efx->membase = NULL;
1309 if (efx->membase_phys) {
1310 bar = efx->type->mem_bar;
1311 pci_release_region(efx->pci_dev, bar);
1312 efx->membase_phys = 0;
1315 /* Don't disable bus-mastering if VFs are assigned */
1316 if (!pci_vfs_assigned(efx->pci_dev))
1317 pci_disable_device(efx->pci_dev);
1320 void efx_set_default_rx_indir_table(struct efx_nic *efx)
1324 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1325 efx->rx_indir_table[i] =
1326 ethtool_rxfh_indir_default(i, efx->rss_spread);
1329 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1331 cpumask_var_t thread_mask;
1338 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1339 netif_warn(efx, probe, efx->net_dev,
1340 "RSS disabled due to allocation failure\n");
1345 for_each_online_cpu(cpu) {
1346 if (!cpumask_test_cpu(cpu, thread_mask)) {
1348 cpumask_or(thread_mask, thread_mask,
1349 topology_sibling_cpumask(cpu));
1353 free_cpumask_var(thread_mask);
1356 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1357 * table entries that are inaccessible to VFs
1359 #ifdef CONFIG_SFC_SRIOV
1360 if (efx->type->sriov_wanted) {
1361 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1362 count > efx_vf_size(efx)) {
1363 netif_warn(efx, probe, efx->net_dev,
1364 "Reducing number of RSS channels from %u to %u for "
1365 "VF support. Increase vf-msix-limit to use more "
1366 "channels on the PF.\n",
1367 count, efx_vf_size(efx));
1368 count = efx_vf_size(efx);
1376 /* Probe the number and type of interrupts we are able to obtain, and
1377 * the resulting numbers of channels and RX queues.
1379 static int efx_probe_interrupts(struct efx_nic *efx)
1381 unsigned int extra_channels = 0;
1385 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1386 if (efx->extra_channel_type[i])
1389 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1390 struct msix_entry xentries[EFX_MAX_CHANNELS];
1391 unsigned int n_channels;
1393 n_channels = efx_wanted_parallelism(efx);
1394 if (efx_separate_tx_channels)
1396 n_channels += extra_channels;
1397 n_channels = min(n_channels, efx->max_channels);
1399 for (i = 0; i < n_channels; i++)
1400 xentries[i].entry = i;
1401 rc = pci_enable_msix_range(efx->pci_dev,
1402 xentries, 1, n_channels);
1404 /* Fall back to single channel MSI */
1405 efx->interrupt_mode = EFX_INT_MODE_MSI;
1406 netif_err(efx, drv, efx->net_dev,
1407 "could not enable MSI-X\n");
1408 } else if (rc < n_channels) {
1409 netif_err(efx, drv, efx->net_dev,
1410 "WARNING: Insufficient MSI-X vectors"
1411 " available (%d < %u).\n", rc, n_channels);
1412 netif_err(efx, drv, efx->net_dev,
1413 "WARNING: Performance may be reduced.\n");
1418 efx->n_channels = n_channels;
1419 if (n_channels > extra_channels)
1420 n_channels -= extra_channels;
1421 if (efx_separate_tx_channels) {
1422 efx->n_tx_channels = min(max(n_channels / 2,
1424 efx->max_tx_channels);
1425 efx->n_rx_channels = max(n_channels -
1429 efx->n_tx_channels = min(n_channels,
1430 efx->max_tx_channels);
1431 efx->n_rx_channels = n_channels;
1433 for (i = 0; i < efx->n_channels; i++)
1434 efx_get_channel(efx, i)->irq =
1439 /* Try single interrupt MSI */
1440 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1441 efx->n_channels = 1;
1442 efx->n_rx_channels = 1;
1443 efx->n_tx_channels = 1;
1444 rc = pci_enable_msi(efx->pci_dev);
1446 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1448 netif_err(efx, drv, efx->net_dev,
1449 "could not enable MSI\n");
1450 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1454 /* Assume legacy interrupts */
1455 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1456 efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0);
1457 efx->n_rx_channels = 1;
1458 efx->n_tx_channels = 1;
1459 efx->legacy_irq = efx->pci_dev->irq;
1462 /* Assign extra channels if possible */
1463 j = efx->n_channels;
1464 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1465 if (!efx->extra_channel_type[i])
1467 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1468 efx->n_channels <= extra_channels) {
1469 efx->extra_channel_type[i]->handle_no_channel(efx);
1472 efx_get_channel(efx, j)->type =
1473 efx->extra_channel_type[i];
1477 /* RSS might be usable on VFs even if it is disabled on the PF */
1478 #ifdef CONFIG_SFC_SRIOV
1479 if (efx->type->sriov_wanted) {
1480 efx->rss_spread = ((efx->n_rx_channels > 1 ||
1481 !efx->type->sriov_wanted(efx)) ?
1482 efx->n_rx_channels : efx_vf_size(efx));
1486 efx->rss_spread = efx->n_rx_channels;
1491 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1493 struct efx_channel *channel, *end_channel;
1496 BUG_ON(efx->state == STATE_DISABLED);
1498 efx->irq_soft_enabled = true;
1501 efx_for_each_channel(channel, efx) {
1502 if (!channel->type->keep_eventq) {
1503 rc = efx_init_eventq(channel);
1507 efx_start_eventq(channel);
1510 efx_mcdi_mode_event(efx);
1514 end_channel = channel;
1515 efx_for_each_channel(channel, efx) {
1516 if (channel == end_channel)
1518 efx_stop_eventq(channel);
1519 if (!channel->type->keep_eventq)
1520 efx_fini_eventq(channel);
1526 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1528 struct efx_channel *channel;
1530 if (efx->state == STATE_DISABLED)
1533 efx_mcdi_mode_poll(efx);
1535 efx->irq_soft_enabled = false;
1538 if (efx->legacy_irq)
1539 synchronize_irq(efx->legacy_irq);
1541 efx_for_each_channel(channel, efx) {
1543 synchronize_irq(channel->irq);
1545 efx_stop_eventq(channel);
1546 if (!channel->type->keep_eventq)
1547 efx_fini_eventq(channel);
1550 /* Flush the asynchronous MCDI request queue */
1551 efx_mcdi_flush_async(efx);
1554 static int efx_enable_interrupts(struct efx_nic *efx)
1556 struct efx_channel *channel, *end_channel;
1559 BUG_ON(efx->state == STATE_DISABLED);
1561 if (efx->eeh_disabled_legacy_irq) {
1562 enable_irq(efx->legacy_irq);
1563 efx->eeh_disabled_legacy_irq = false;
1566 efx->type->irq_enable_master(efx);
1568 efx_for_each_channel(channel, efx) {
1569 if (channel->type->keep_eventq) {
1570 rc = efx_init_eventq(channel);
1576 rc = efx_soft_enable_interrupts(efx);
1583 end_channel = channel;
1584 efx_for_each_channel(channel, efx) {
1585 if (channel == end_channel)
1587 if (channel->type->keep_eventq)
1588 efx_fini_eventq(channel);
1591 efx->type->irq_disable_non_ev(efx);
1596 static void efx_disable_interrupts(struct efx_nic *efx)
1598 struct efx_channel *channel;
1600 efx_soft_disable_interrupts(efx);
1602 efx_for_each_channel(channel, efx) {
1603 if (channel->type->keep_eventq)
1604 efx_fini_eventq(channel);
1607 efx->type->irq_disable_non_ev(efx);
1610 static void efx_remove_interrupts(struct efx_nic *efx)
1612 struct efx_channel *channel;
1614 /* Remove MSI/MSI-X interrupts */
1615 efx_for_each_channel(channel, efx)
1617 pci_disable_msi(efx->pci_dev);
1618 pci_disable_msix(efx->pci_dev);
1620 /* Remove legacy interrupt */
1621 efx->legacy_irq = 0;
1624 static void efx_set_channels(struct efx_nic *efx)
1626 struct efx_channel *channel;
1627 struct efx_tx_queue *tx_queue;
1629 efx->tx_channel_offset =
1630 efx_separate_tx_channels ?
1631 efx->n_channels - efx->n_tx_channels : 0;
1633 /* We need to mark which channels really have RX and TX
1634 * queues, and adjust the TX queue numbers if we have separate
1635 * RX-only and TX-only channels.
1637 efx_for_each_channel(channel, efx) {
1638 if (channel->channel < efx->n_rx_channels)
1639 channel->rx_queue.core_index = channel->channel;
1641 channel->rx_queue.core_index = -1;
1643 efx_for_each_channel_tx_queue(tx_queue, channel)
1644 tx_queue->queue -= (efx->tx_channel_offset *
1649 static int efx_probe_nic(struct efx_nic *efx)
1653 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1655 /* Carry out hardware-type specific initialisation */
1656 rc = efx->type->probe(efx);
1661 if (!efx->max_channels || !efx->max_tx_channels) {
1662 netif_err(efx, drv, efx->net_dev,
1663 "Insufficient resources to allocate"
1669 /* Determine the number of channels and queues by trying
1670 * to hook in MSI-X interrupts.
1672 rc = efx_probe_interrupts(efx);
1676 efx_set_channels(efx);
1678 /* dimension_resources can fail with EAGAIN */
1679 rc = efx->type->dimension_resources(efx);
1680 if (rc != 0 && rc != -EAGAIN)
1684 /* try again with new max_channels */
1685 efx_remove_interrupts(efx);
1687 } while (rc == -EAGAIN);
1689 if (efx->n_channels > 1)
1690 netdev_rss_key_fill(&efx->rx_hash_key,
1691 sizeof(efx->rx_hash_key));
1692 efx_set_default_rx_indir_table(efx);
1694 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1695 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1697 /* Initialise the interrupt moderation settings */
1698 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1704 efx_remove_interrupts(efx);
1706 efx->type->remove(efx);
1710 static void efx_remove_nic(struct efx_nic *efx)
1712 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1714 efx_remove_interrupts(efx);
1715 efx->type->remove(efx);
1718 static int efx_probe_filters(struct efx_nic *efx)
1722 spin_lock_init(&efx->filter_lock);
1723 init_rwsem(&efx->filter_sem);
1724 down_write(&efx->filter_sem);
1725 rc = efx->type->filter_table_probe(efx);
1729 #ifdef CONFIG_RFS_ACCEL
1730 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1731 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1732 sizeof(*efx->rps_flow_id),
1734 if (!efx->rps_flow_id) {
1735 efx->type->filter_table_remove(efx);
1742 up_write(&efx->filter_sem);
1746 static void efx_remove_filters(struct efx_nic *efx)
1748 #ifdef CONFIG_RFS_ACCEL
1749 kfree(efx->rps_flow_id);
1751 down_write(&efx->filter_sem);
1752 efx->type->filter_table_remove(efx);
1753 up_write(&efx->filter_sem);
1756 static void efx_restore_filters(struct efx_nic *efx)
1758 down_read(&efx->filter_sem);
1759 efx->type->filter_table_restore(efx);
1760 up_read(&efx->filter_sem);
1763 /**************************************************************************
1765 * NIC startup/shutdown
1767 *************************************************************************/
1769 static int efx_probe_all(struct efx_nic *efx)
1773 rc = efx_probe_nic(efx);
1775 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1779 rc = efx_probe_port(efx);
1781 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1785 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1786 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1790 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1792 #ifdef CONFIG_SFC_SRIOV
1793 rc = efx->type->vswitching_probe(efx);
1794 if (rc) /* not fatal; the PF will still work fine */
1795 netif_warn(efx, probe, efx->net_dev,
1796 "failed to setup vswitching rc=%d;"
1797 " VFs may not function\n", rc);
1800 rc = efx_probe_filters(efx);
1802 netif_err(efx, probe, efx->net_dev,
1803 "failed to create filter tables\n");
1807 rc = efx_probe_channels(efx);
1814 efx_remove_filters(efx);
1816 #ifdef CONFIG_SFC_SRIOV
1817 efx->type->vswitching_remove(efx);
1820 efx_remove_port(efx);
1822 efx_remove_nic(efx);
1827 /* If the interface is supposed to be running but is not, start
1828 * the hardware and software data path, regular activity for the port
1829 * (MAC statistics, link polling, etc.) and schedule the port to be
1830 * reconfigured. Interrupts must already be enabled. This function
1831 * is safe to call multiple times, so long as the NIC is not disabled.
1832 * Requires the RTNL lock.
1834 static void efx_start_all(struct efx_nic *efx)
1836 EFX_ASSERT_RESET_SERIALISED(efx);
1837 BUG_ON(efx->state == STATE_DISABLED);
1839 /* Check that it is appropriate to restart the interface. All
1840 * of these flags are safe to read under just the rtnl lock */
1841 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1845 efx_start_port(efx);
1846 efx_start_datapath(efx);
1848 /* Start the hardware monitor if there is one */
1849 if (efx->type->monitor != NULL)
1850 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1851 efx_monitor_interval);
1853 /* If link state detection is normally event-driven, we have
1854 * to poll now because we could have missed a change
1856 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1857 mutex_lock(&efx->mac_lock);
1858 if (efx->phy_op->poll(efx))
1859 efx_link_status_changed(efx);
1860 mutex_unlock(&efx->mac_lock);
1863 efx->type->start_stats(efx);
1864 efx->type->pull_stats(efx);
1865 spin_lock_bh(&efx->stats_lock);
1866 efx->type->update_stats(efx, NULL, NULL);
1867 spin_unlock_bh(&efx->stats_lock);
1870 /* Quiesce the hardware and software data path, and regular activity
1871 * for the port without bringing the link down. Safe to call multiple
1872 * times with the NIC in almost any state, but interrupts should be
1873 * enabled. Requires the RTNL lock.
1875 static void efx_stop_all(struct efx_nic *efx)
1877 EFX_ASSERT_RESET_SERIALISED(efx);
1879 /* port_enabled can be read safely under the rtnl lock */
1880 if (!efx->port_enabled)
1883 /* update stats before we go down so we can accurately count
1886 efx->type->pull_stats(efx);
1887 spin_lock_bh(&efx->stats_lock);
1888 efx->type->update_stats(efx, NULL, NULL);
1889 spin_unlock_bh(&efx->stats_lock);
1890 efx->type->stop_stats(efx);
1893 /* Stop the kernel transmit interface. This is only valid if
1894 * the device is stopped or detached; otherwise the watchdog
1895 * may fire immediately.
1897 WARN_ON(netif_running(efx->net_dev) &&
1898 netif_device_present(efx->net_dev));
1899 netif_tx_disable(efx->net_dev);
1901 efx_stop_datapath(efx);
1904 static void efx_remove_all(struct efx_nic *efx)
1906 efx_remove_channels(efx);
1907 efx_remove_filters(efx);
1908 #ifdef CONFIG_SFC_SRIOV
1909 efx->type->vswitching_remove(efx);
1911 efx_remove_port(efx);
1912 efx_remove_nic(efx);
1915 /**************************************************************************
1917 * Interrupt moderation
1919 **************************************************************************/
1921 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1925 if (usecs * 1000 < quantum_ns)
1926 return 1; /* never round down to 0 */
1927 return usecs * 1000 / quantum_ns;
1930 /* Set interrupt moderation parameters */
1931 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1932 unsigned int rx_usecs, bool rx_adaptive,
1933 bool rx_may_override_tx)
1935 struct efx_channel *channel;
1936 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1937 efx->timer_quantum_ns,
1939 unsigned int tx_ticks;
1940 unsigned int rx_ticks;
1942 EFX_ASSERT_RESET_SERIALISED(efx);
1944 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1947 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1948 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1950 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1951 !rx_may_override_tx) {
1952 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1953 "RX and TX IRQ moderation must be equal\n");
1957 efx->irq_rx_adaptive = rx_adaptive;
1958 efx->irq_rx_moderation = rx_ticks;
1959 efx_for_each_channel(channel, efx) {
1960 if (efx_channel_has_rx_queue(channel))
1961 channel->irq_moderation = rx_ticks;
1962 else if (efx_channel_has_tx_queues(channel))
1963 channel->irq_moderation = tx_ticks;
1969 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1970 unsigned int *rx_usecs, bool *rx_adaptive)
1972 /* We must round up when converting ticks to microseconds
1973 * because we round down when converting the other way.
1976 *rx_adaptive = efx->irq_rx_adaptive;
1977 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1978 efx->timer_quantum_ns,
1981 /* If channels are shared between RX and TX, so is IRQ
1982 * moderation. Otherwise, IRQ moderation is the same for all
1983 * TX channels and is not adaptive.
1985 if (efx->tx_channel_offset == 0)
1986 *tx_usecs = *rx_usecs;
1988 *tx_usecs = DIV_ROUND_UP(
1989 efx->channel[efx->tx_channel_offset]->irq_moderation *
1990 efx->timer_quantum_ns,
1994 /**************************************************************************
1998 **************************************************************************/
2000 /* Run periodically off the general workqueue */
2001 static void efx_monitor(struct work_struct *data)
2003 struct efx_nic *efx = container_of(data, struct efx_nic,
2006 netif_vdbg(efx, timer, efx->net_dev,
2007 "hardware monitor executing on CPU %d\n",
2008 raw_smp_processor_id());
2009 BUG_ON(efx->type->monitor == NULL);
2011 /* If the mac_lock is already held then it is likely a port
2012 * reconfiguration is already in place, which will likely do
2013 * most of the work of monitor() anyway. */
2014 if (mutex_trylock(&efx->mac_lock)) {
2015 if (efx->port_enabled)
2016 efx->type->monitor(efx);
2017 mutex_unlock(&efx->mac_lock);
2020 queue_delayed_work(efx->workqueue, &efx->monitor_work,
2021 efx_monitor_interval);
2024 /**************************************************************************
2028 *************************************************************************/
2031 * Context: process, rtnl_lock() held.
2033 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2035 struct efx_nic *efx = netdev_priv(net_dev);
2036 struct mii_ioctl_data *data = if_mii(ifr);
2038 if (cmd == SIOCSHWTSTAMP)
2039 return efx_ptp_set_ts_config(efx, ifr);
2040 if (cmd == SIOCGHWTSTAMP)
2041 return efx_ptp_get_ts_config(efx, ifr);
2043 /* Convert phy_id from older PRTAD/DEVAD format */
2044 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2045 (data->phy_id & 0xfc00) == 0x0400)
2046 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2048 return mdio_mii_ioctl(&efx->mdio, data, cmd);
2051 /**************************************************************************
2055 **************************************************************************/
2057 static void efx_init_napi_channel(struct efx_channel *channel)
2059 struct efx_nic *efx = channel->efx;
2061 channel->napi_dev = efx->net_dev;
2062 netif_napi_add(channel->napi_dev, &channel->napi_str,
2063 efx_poll, napi_weight);
2064 napi_hash_add(&channel->napi_str);
2065 efx_channel_busy_poll_init(channel);
2068 static void efx_init_napi(struct efx_nic *efx)
2070 struct efx_channel *channel;
2072 efx_for_each_channel(channel, efx)
2073 efx_init_napi_channel(channel);
2076 static void efx_fini_napi_channel(struct efx_channel *channel)
2078 if (channel->napi_dev) {
2079 netif_napi_del(&channel->napi_str);
2080 napi_hash_del(&channel->napi_str);
2082 channel->napi_dev = NULL;
2085 static void efx_fini_napi(struct efx_nic *efx)
2087 struct efx_channel *channel;
2089 efx_for_each_channel(channel, efx)
2090 efx_fini_napi_channel(channel);
2093 /**************************************************************************
2095 * Kernel netpoll interface
2097 *************************************************************************/
2099 #ifdef CONFIG_NET_POLL_CONTROLLER
2101 /* Although in the common case interrupts will be disabled, this is not
2102 * guaranteed. However, all our work happens inside the NAPI callback,
2103 * so no locking is required.
2105 static void efx_netpoll(struct net_device *net_dev)
2107 struct efx_nic *efx = netdev_priv(net_dev);
2108 struct efx_channel *channel;
2110 efx_for_each_channel(channel, efx)
2111 efx_schedule_channel(channel);
2116 #ifdef CONFIG_NET_RX_BUSY_POLL
2117 static int efx_busy_poll(struct napi_struct *napi)
2119 struct efx_channel *channel =
2120 container_of(napi, struct efx_channel, napi_str);
2121 struct efx_nic *efx = channel->efx;
2123 int old_rx_packets, rx_packets;
2125 if (!netif_running(efx->net_dev))
2126 return LL_FLUSH_FAILED;
2128 if (!efx_channel_try_lock_poll(channel))
2129 return LL_FLUSH_BUSY;
2131 old_rx_packets = channel->rx_queue.rx_packets;
2132 efx_process_channel(channel, budget);
2134 rx_packets = channel->rx_queue.rx_packets - old_rx_packets;
2136 /* There is no race condition with NAPI here.
2137 * NAPI will automatically be rescheduled if it yielded during busy
2138 * polling, because it was not able to take the lock and thus returned
2141 efx_channel_unlock_poll(channel);
2147 /**************************************************************************
2149 * Kernel net device interface
2151 *************************************************************************/
2153 /* Context: process, rtnl_lock() held. */
2154 int efx_net_open(struct net_device *net_dev)
2156 struct efx_nic *efx = netdev_priv(net_dev);
2159 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2160 raw_smp_processor_id());
2162 rc = efx_check_disabled(efx);
2165 if (efx->phy_mode & PHY_MODE_SPECIAL)
2167 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2170 /* Notify the kernel of the link state polled during driver load,
2171 * before the monitor starts running */
2172 efx_link_status_changed(efx);
2175 efx_selftest_async_start(efx);
2179 /* Context: process, rtnl_lock() held.
2180 * Note that the kernel will ignore our return code; this method
2181 * should really be a void.
2183 int efx_net_stop(struct net_device *net_dev)
2185 struct efx_nic *efx = netdev_priv(net_dev);
2187 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2188 raw_smp_processor_id());
2190 /* Stop the device and flush all the channels */
2196 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2197 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
2198 struct rtnl_link_stats64 *stats)
2200 struct efx_nic *efx = netdev_priv(net_dev);
2202 spin_lock_bh(&efx->stats_lock);
2203 efx->type->update_stats(efx, NULL, stats);
2204 spin_unlock_bh(&efx->stats_lock);
2209 /* Context: netif_tx_lock held, BHs disabled. */
2210 static void efx_watchdog(struct net_device *net_dev)
2212 struct efx_nic *efx = netdev_priv(net_dev);
2214 netif_err(efx, tx_err, efx->net_dev,
2215 "TX stuck with port_enabled=%d: resetting channels\n",
2218 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2222 /* Context: process, rtnl_lock() held. */
2223 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2225 struct efx_nic *efx = netdev_priv(net_dev);
2228 rc = efx_check_disabled(efx);
2231 if (new_mtu > EFX_MAX_MTU)
2234 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2236 efx_device_detach_sync(efx);
2239 mutex_lock(&efx->mac_lock);
2240 net_dev->mtu = new_mtu;
2241 efx_mac_reconfigure(efx);
2242 mutex_unlock(&efx->mac_lock);
2245 netif_device_attach(efx->net_dev);
2249 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2251 struct efx_nic *efx = netdev_priv(net_dev);
2252 struct sockaddr *addr = data;
2253 u8 *new_addr = addr->sa_data;
2257 if (!is_valid_ether_addr(new_addr)) {
2258 netif_err(efx, drv, efx->net_dev,
2259 "invalid ethernet MAC address requested: %pM\n",
2261 return -EADDRNOTAVAIL;
2264 /* save old address */
2265 ether_addr_copy(old_addr, net_dev->dev_addr);
2266 ether_addr_copy(net_dev->dev_addr, new_addr);
2267 if (efx->type->set_mac_address) {
2268 rc = efx->type->set_mac_address(efx);
2270 ether_addr_copy(net_dev->dev_addr, old_addr);
2275 /* Reconfigure the MAC */
2276 mutex_lock(&efx->mac_lock);
2277 efx_mac_reconfigure(efx);
2278 mutex_unlock(&efx->mac_lock);
2283 /* Context: netif_addr_lock held, BHs disabled. */
2284 static void efx_set_rx_mode(struct net_device *net_dev)
2286 struct efx_nic *efx = netdev_priv(net_dev);
2288 if (efx->port_enabled)
2289 queue_work(efx->workqueue, &efx->mac_work);
2290 /* Otherwise efx_start_port() will do this */
2293 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2295 struct efx_nic *efx = netdev_priv(net_dev);
2297 /* If disabling RX n-tuple filtering, clear existing filters */
2298 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2299 return efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2304 static const struct net_device_ops efx_netdev_ops = {
2305 .ndo_open = efx_net_open,
2306 .ndo_stop = efx_net_stop,
2307 .ndo_get_stats64 = efx_net_stats,
2308 .ndo_tx_timeout = efx_watchdog,
2309 .ndo_start_xmit = efx_hard_start_xmit,
2310 .ndo_validate_addr = eth_validate_addr,
2311 .ndo_do_ioctl = efx_ioctl,
2312 .ndo_change_mtu = efx_change_mtu,
2313 .ndo_set_mac_address = efx_set_mac_address,
2314 .ndo_set_rx_mode = efx_set_rx_mode,
2315 .ndo_set_features = efx_set_features,
2316 #ifdef CONFIG_SFC_SRIOV
2317 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2318 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2319 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2320 .ndo_get_vf_config = efx_sriov_get_vf_config,
2321 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state,
2322 .ndo_get_phys_port_id = efx_sriov_get_phys_port_id,
2324 #ifdef CONFIG_NET_POLL_CONTROLLER
2325 .ndo_poll_controller = efx_netpoll,
2327 .ndo_setup_tc = efx_setup_tc,
2328 #ifdef CONFIG_NET_RX_BUSY_POLL
2329 .ndo_busy_poll = efx_busy_poll,
2331 #ifdef CONFIG_RFS_ACCEL
2332 .ndo_rx_flow_steer = efx_filter_rfs,
2336 static void efx_update_name(struct efx_nic *efx)
2338 strcpy(efx->name, efx->net_dev->name);
2339 efx_mtd_rename(efx);
2340 efx_set_channel_names(efx);
2343 static int efx_netdev_event(struct notifier_block *this,
2344 unsigned long event, void *ptr)
2346 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2348 if ((net_dev->netdev_ops == &efx_netdev_ops) &&
2349 event == NETDEV_CHANGENAME)
2350 efx_update_name(netdev_priv(net_dev));
2355 static struct notifier_block efx_netdev_notifier = {
2356 .notifier_call = efx_netdev_event,
2360 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2362 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2363 return sprintf(buf, "%d\n", efx->phy_type);
2365 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2367 #ifdef CONFIG_SFC_MCDI_LOGGING
2368 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
2371 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2372 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2374 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
2376 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
2377 const char *buf, size_t count)
2379 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2380 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2381 bool enable = count > 0 && *buf != '0';
2383 mcdi->logging_enabled = enable;
2386 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
2389 static int efx_register_netdev(struct efx_nic *efx)
2391 struct net_device *net_dev = efx->net_dev;
2392 struct efx_channel *channel;
2395 net_dev->watchdog_timeo = 5 * HZ;
2396 net_dev->irq = efx->pci_dev->irq;
2397 net_dev->netdev_ops = &efx_netdev_ops;
2398 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
2399 net_dev->priv_flags |= IFF_UNICAST_FLT;
2400 net_dev->ethtool_ops = &efx_ethtool_ops;
2401 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2405 /* Enable resets to be scheduled and check whether any were
2406 * already requested. If so, the NIC is probably hosed so we
2409 efx->state = STATE_READY;
2410 smp_mb(); /* ensure we change state before checking reset_pending */
2411 if (efx->reset_pending) {
2412 netif_err(efx, probe, efx->net_dev,
2413 "aborting probe due to scheduled reset\n");
2418 rc = dev_alloc_name(net_dev, net_dev->name);
2421 efx_update_name(efx);
2423 /* Always start with carrier off; PHY events will detect the link */
2424 netif_carrier_off(net_dev);
2426 rc = register_netdevice(net_dev);
2430 efx_for_each_channel(channel, efx) {
2431 struct efx_tx_queue *tx_queue;
2432 efx_for_each_channel_tx_queue(tx_queue, channel)
2433 efx_init_tx_queue_core_txq(tx_queue);
2440 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2442 netif_err(efx, drv, efx->net_dev,
2443 "failed to init net dev attributes\n");
2444 goto fail_registered;
2446 #ifdef CONFIG_SFC_MCDI_LOGGING
2447 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2449 netif_err(efx, drv, efx->net_dev,
2450 "failed to init net dev attributes\n");
2451 goto fail_attr_mcdi_logging;
2457 #ifdef CONFIG_SFC_MCDI_LOGGING
2458 fail_attr_mcdi_logging:
2459 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2463 efx_dissociate(efx);
2464 unregister_netdevice(net_dev);
2466 efx->state = STATE_UNINIT;
2468 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2472 static void efx_unregister_netdev(struct efx_nic *efx)
2477 BUG_ON(netdev_priv(efx->net_dev) != efx);
2479 if (efx_dev_registered(efx)) {
2480 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2481 #ifdef CONFIG_SFC_MCDI_LOGGING
2482 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2484 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2485 unregister_netdev(efx->net_dev);
2489 /**************************************************************************
2491 * Device reset and suspend
2493 **************************************************************************/
2495 /* Tears down the entire software state and most of the hardware state
2497 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2499 EFX_ASSERT_RESET_SERIALISED(efx);
2501 if (method == RESET_TYPE_MCDI_TIMEOUT)
2502 efx->type->prepare_flr(efx);
2505 efx_disable_interrupts(efx);
2507 mutex_lock(&efx->mac_lock);
2508 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2509 method != RESET_TYPE_DATAPATH)
2510 efx->phy_op->fini(efx);
2511 efx->type->fini(efx);
2514 /* This function will always ensure that the locks acquired in
2515 * efx_reset_down() are released. A failure return code indicates
2516 * that we were unable to reinitialise the hardware, and the
2517 * driver should be disabled. If ok is false, then the rx and tx
2518 * engines are not restarted, pending a RESET_DISABLE. */
2519 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2523 EFX_ASSERT_RESET_SERIALISED(efx);
2525 if (method == RESET_TYPE_MCDI_TIMEOUT)
2526 efx->type->finish_flr(efx);
2528 /* Ensure that SRAM is initialised even if we're disabling the device */
2529 rc = efx->type->init(efx);
2531 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2538 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2539 method != RESET_TYPE_DATAPATH) {
2540 rc = efx->phy_op->init(efx);
2543 rc = efx->phy_op->reconfigure(efx);
2544 if (rc && rc != -EPERM)
2545 netif_err(efx, drv, efx->net_dev,
2546 "could not restore PHY settings\n");
2549 rc = efx_enable_interrupts(efx);
2553 #ifdef CONFIG_SFC_SRIOV
2554 rc = efx->type->vswitching_restore(efx);
2555 if (rc) /* not fatal; the PF will still work fine */
2556 netif_warn(efx, probe, efx->net_dev,
2557 "failed to restore vswitching rc=%d;"
2558 " VFs may not function\n", rc);
2561 down_read(&efx->filter_sem);
2562 efx_restore_filters(efx);
2563 up_read(&efx->filter_sem);
2564 if (efx->type->sriov_reset)
2565 efx->type->sriov_reset(efx);
2567 mutex_unlock(&efx->mac_lock);
2574 efx->port_initialized = false;
2576 mutex_unlock(&efx->mac_lock);
2581 /* Reset the NIC using the specified method. Note that the reset may
2582 * fail, in which case the card will be left in an unusable state.
2584 * Caller must hold the rtnl_lock.
2586 int efx_reset(struct efx_nic *efx, enum reset_type method)
2591 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2592 RESET_TYPE(method));
2594 efx_device_detach_sync(efx);
2595 efx_reset_down(efx, method);
2597 rc = efx->type->reset(efx, method);
2599 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2603 /* Clear flags for the scopes we covered. We assume the NIC and
2604 * driver are now quiescent so that there is no race here.
2606 if (method < RESET_TYPE_MAX_METHOD)
2607 efx->reset_pending &= -(1 << (method + 1));
2608 else /* it doesn't fit into the well-ordered scope hierarchy */
2609 __clear_bit(method, &efx->reset_pending);
2611 /* Reinitialise bus-mastering, which may have been turned off before
2612 * the reset was scheduled. This is still appropriate, even in the
2613 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2614 * can respond to requests. */
2615 pci_set_master(efx->pci_dev);
2618 /* Leave device stopped if necessary */
2620 method == RESET_TYPE_DISABLE ||
2621 method == RESET_TYPE_RECOVER_OR_DISABLE;
2622 rc2 = efx_reset_up(efx, method, !disabled);
2630 dev_close(efx->net_dev);
2631 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2632 efx->state = STATE_DISABLED;
2634 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2635 netif_device_attach(efx->net_dev);
2640 /* Try recovery mechanisms.
2641 * For now only EEH is supported.
2642 * Returns 0 if the recovery mechanisms are unsuccessful.
2643 * Returns a non-zero value otherwise.
2645 int efx_try_recovery(struct efx_nic *efx)
2648 /* A PCI error can occur and not be seen by EEH because nothing
2649 * happens on the PCI bus. In this case the driver may fail and
2650 * schedule a 'recover or reset', leading to this recovery handler.
2651 * Manually call the eeh failure check function.
2653 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2654 if (eeh_dev_check_failure(eehdev)) {
2655 /* The EEH mechanisms will handle the error and reset the
2656 * device if necessary.
2664 static void efx_wait_for_bist_end(struct efx_nic *efx)
2668 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2669 if (efx_mcdi_poll_reboot(efx))
2671 msleep(BIST_WAIT_DELAY_MS);
2674 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2676 /* Either way unset the BIST flag. If we found no reboot we probably
2677 * won't recover, but we should try.
2679 efx->mc_bist_for_other_fn = false;
2682 /* The worker thread exists so that code that cannot sleep can
2683 * schedule a reset for later.
2685 static void efx_reset_work(struct work_struct *data)
2687 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2688 unsigned long pending;
2689 enum reset_type method;
2691 pending = ACCESS_ONCE(efx->reset_pending);
2692 method = fls(pending) - 1;
2694 if (method == RESET_TYPE_MC_BIST)
2695 efx_wait_for_bist_end(efx);
2697 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2698 method == RESET_TYPE_RECOVER_OR_ALL) &&
2699 efx_try_recovery(efx))
2707 /* We checked the state in efx_schedule_reset() but it may
2708 * have changed by now. Now that we have the RTNL lock,
2709 * it cannot change again.
2711 if (efx->state == STATE_READY)
2712 (void)efx_reset(efx, method);
2717 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2719 enum reset_type method;
2721 if (efx->state == STATE_RECOVERY) {
2722 netif_dbg(efx, drv, efx->net_dev,
2723 "recovering: skip scheduling %s reset\n",
2729 case RESET_TYPE_INVISIBLE:
2730 case RESET_TYPE_ALL:
2731 case RESET_TYPE_RECOVER_OR_ALL:
2732 case RESET_TYPE_WORLD:
2733 case RESET_TYPE_DISABLE:
2734 case RESET_TYPE_RECOVER_OR_DISABLE:
2735 case RESET_TYPE_DATAPATH:
2736 case RESET_TYPE_MC_BIST:
2737 case RESET_TYPE_MCDI_TIMEOUT:
2739 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2740 RESET_TYPE(method));
2743 method = efx->type->map_reset_reason(type);
2744 netif_dbg(efx, drv, efx->net_dev,
2745 "scheduling %s reset for %s\n",
2746 RESET_TYPE(method), RESET_TYPE(type));
2750 set_bit(method, &efx->reset_pending);
2751 smp_mb(); /* ensure we change reset_pending before checking state */
2753 /* If we're not READY then just leave the flags set as the cue
2754 * to abort probing or reschedule the reset later.
2756 if (ACCESS_ONCE(efx->state) != STATE_READY)
2759 /* efx_process_channel() will no longer read events once a
2760 * reset is scheduled. So switch back to poll'd MCDI completions. */
2761 efx_mcdi_mode_poll(efx);
2763 queue_work(reset_workqueue, &efx->reset_work);
2766 /**************************************************************************
2768 * List of NICs we support
2770 **************************************************************************/
2772 /* PCI device ID table */
2773 static const struct pci_device_id efx_pci_table[] = {
2774 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2775 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2776 .driver_data = (unsigned long) &falcon_a1_nic_type},
2777 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2778 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2779 .driver_data = (unsigned long) &falcon_b0_nic_type},
2780 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2781 .driver_data = (unsigned long) &siena_a0_nic_type},
2782 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2783 .driver_data = (unsigned long) &siena_a0_nic_type},
2784 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2785 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2786 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
2787 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2788 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
2789 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2790 {0} /* end of list */
2793 /**************************************************************************
2795 * Dummy PHY/MAC operations
2797 * Can be used for some unimplemented operations
2798 * Needed so all function pointers are valid and do not have to be tested
2801 **************************************************************************/
2802 int efx_port_dummy_op_int(struct efx_nic *efx)
2806 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2808 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2813 static const struct efx_phy_operations efx_dummy_phy_operations = {
2814 .init = efx_port_dummy_op_int,
2815 .reconfigure = efx_port_dummy_op_int,
2816 .poll = efx_port_dummy_op_poll,
2817 .fini = efx_port_dummy_op_void,
2820 /**************************************************************************
2824 **************************************************************************/
2826 /* This zeroes out and then fills in the invariants in a struct
2827 * efx_nic (including all sub-structures).
2829 static int efx_init_struct(struct efx_nic *efx,
2830 struct pci_dev *pci_dev, struct net_device *net_dev)
2834 /* Initialise common structures */
2835 INIT_LIST_HEAD(&efx->node);
2836 INIT_LIST_HEAD(&efx->secondary_list);
2837 spin_lock_init(&efx->biu_lock);
2838 #ifdef CONFIG_SFC_MTD
2839 INIT_LIST_HEAD(&efx->mtd_list);
2841 INIT_WORK(&efx->reset_work, efx_reset_work);
2842 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2843 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2844 efx->pci_dev = pci_dev;
2845 efx->msg_enable = debug;
2846 efx->state = STATE_UNINIT;
2847 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2849 efx->net_dev = net_dev;
2850 efx->rx_prefix_size = efx->type->rx_prefix_size;
2852 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2853 efx->rx_packet_hash_offset =
2854 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2855 efx->rx_packet_ts_offset =
2856 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2857 spin_lock_init(&efx->stats_lock);
2858 mutex_init(&efx->mac_lock);
2859 efx->phy_op = &efx_dummy_phy_operations;
2860 efx->mdio.dev = net_dev;
2861 INIT_WORK(&efx->mac_work, efx_mac_work);
2862 init_waitqueue_head(&efx->flush_wq);
2864 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2865 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2866 if (!efx->channel[i])
2868 efx->msi_context[i].efx = efx;
2869 efx->msi_context[i].index = i;
2872 /* Higher numbered interrupt modes are less capable! */
2873 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2876 /* Would be good to use the net_dev name, but we're too early */
2877 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2879 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2880 if (!efx->workqueue)
2886 efx_fini_struct(efx);
2890 static void efx_fini_struct(struct efx_nic *efx)
2894 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2895 kfree(efx->channel[i]);
2899 if (efx->workqueue) {
2900 destroy_workqueue(efx->workqueue);
2901 efx->workqueue = NULL;
2905 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
2907 u64 n_rx_nodesc_trunc = 0;
2908 struct efx_channel *channel;
2910 efx_for_each_channel(channel, efx)
2911 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
2912 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
2913 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
2916 /**************************************************************************
2920 **************************************************************************/
2922 /* Main body of final NIC shutdown code
2923 * This is called only at module unload (or hotplug removal).
2925 static void efx_pci_remove_main(struct efx_nic *efx)
2927 /* Flush reset_work. It can no longer be scheduled since we
2930 BUG_ON(efx->state == STATE_READY);
2931 cancel_work_sync(&efx->reset_work);
2933 efx_disable_interrupts(efx);
2934 efx_nic_fini_interrupt(efx);
2936 efx->type->fini(efx);
2938 efx_remove_all(efx);
2941 /* Final NIC shutdown
2942 * This is called only at module unload (or hotplug removal). A PF can call
2943 * this on its VFs to ensure they are unbound first.
2945 static void efx_pci_remove(struct pci_dev *pci_dev)
2947 struct efx_nic *efx;
2949 efx = pci_get_drvdata(pci_dev);
2953 /* Mark the NIC as fini, then stop the interface */
2955 efx_dissociate(efx);
2956 dev_close(efx->net_dev);
2957 efx_disable_interrupts(efx);
2958 efx->state = STATE_UNINIT;
2961 if (efx->type->sriov_fini)
2962 efx->type->sriov_fini(efx);
2964 efx_unregister_netdev(efx);
2966 efx_mtd_remove(efx);
2968 efx_pci_remove_main(efx);
2971 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2973 efx_fini_struct(efx);
2974 free_netdev(efx->net_dev);
2976 pci_disable_pcie_error_reporting(pci_dev);
2979 /* NIC VPD information
2980 * Called during probe to display the part number of the
2981 * installed NIC. VPD is potentially very large but this should
2982 * always appear within the first 512 bytes.
2984 #define SFC_VPD_LEN 512
2985 static void efx_probe_vpd_strings(struct efx_nic *efx)
2987 struct pci_dev *dev = efx->pci_dev;
2988 char vpd_data[SFC_VPD_LEN];
2990 int ro_start, ro_size, i, j;
2992 /* Get the vpd data from the device */
2993 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2994 if (vpd_size <= 0) {
2995 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2999 /* Get the Read only section */
3000 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
3002 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
3006 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
3008 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3009 if (i + j > vpd_size)
3012 /* Get the Part number */
3013 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
3015 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
3019 j = pci_vpd_info_field_size(&vpd_data[i]);
3020 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3021 if (i + j > vpd_size) {
3022 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
3026 netif_info(efx, drv, efx->net_dev,
3027 "Part Number : %.*s\n", j, &vpd_data[i]);
3029 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3031 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
3033 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
3037 j = pci_vpd_info_field_size(&vpd_data[i]);
3038 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3039 if (i + j > vpd_size) {
3040 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
3044 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
3048 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
3052 /* Main body of NIC initialisation
3053 * This is called at module load (or hotplug insertion, theoretically).
3055 static int efx_pci_probe_main(struct efx_nic *efx)
3059 /* Do start-of-day initialisation */
3060 rc = efx_probe_all(efx);
3066 rc = efx->type->init(efx);
3068 netif_err(efx, probe, efx->net_dev,
3069 "failed to initialise NIC\n");
3073 rc = efx_init_port(efx);
3075 netif_err(efx, probe, efx->net_dev,
3076 "failed to initialise port\n");
3080 rc = efx_nic_init_interrupt(efx);
3083 rc = efx_enable_interrupts(efx);
3090 efx_nic_fini_interrupt(efx);
3094 efx->type->fini(efx);
3097 efx_remove_all(efx);
3102 /* NIC initialisation
3104 * This is called at module load (or hotplug insertion,
3105 * theoretically). It sets up PCI mappings, resets the NIC,
3106 * sets up and registers the network devices with the kernel and hooks
3107 * the interrupt service routine. It does not prepare the device for
3108 * transmission; this is left to the first time one of the network
3109 * interfaces is brought up (i.e. efx_net_open).
3111 static int efx_pci_probe(struct pci_dev *pci_dev,
3112 const struct pci_device_id *entry)
3114 struct net_device *net_dev;
3115 struct efx_nic *efx;
3118 /* Allocate and initialise a struct net_device and struct efx_nic */
3119 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
3123 efx = netdev_priv(net_dev);
3124 efx->type = (const struct efx_nic_type *) entry->driver_data;
3125 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
3126 NETIF_F_HIGHDMA | NETIF_F_TSO |
3128 if (efx->type->offload_features & NETIF_F_V6_CSUM)
3129 net_dev->features |= NETIF_F_TSO6;
3130 /* Mask for features that also apply to VLAN devices */
3131 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
3132 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3134 /* All offloads can be toggled */
3135 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
3136 pci_set_drvdata(pci_dev, efx);
3137 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3138 rc = efx_init_struct(efx, pci_dev, net_dev);
3142 netif_info(efx, probe, efx->net_dev,
3143 "Solarflare NIC detected\n");
3145 if (!efx->type->is_vf)
3146 efx_probe_vpd_strings(efx);
3148 /* Set up basic I/O (BAR mappings etc) */
3149 rc = efx_init_io(efx);
3153 rc = efx_pci_probe_main(efx);
3157 rc = efx_register_netdev(efx);
3161 if (efx->type->sriov_init) {
3162 rc = efx->type->sriov_init(efx);
3164 netif_err(efx, probe, efx->net_dev,
3165 "SR-IOV can't be enabled rc %d\n", rc);
3168 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3170 /* Try to create MTDs, but allow this to fail */
3172 rc = efx_mtd_probe(efx);
3175 netif_warn(efx, probe, efx->net_dev,
3176 "failed to create MTDs (%d)\n", rc);
3178 rc = pci_enable_pcie_error_reporting(pci_dev);
3179 if (rc && rc != -EINVAL)
3180 netif_warn(efx, probe, efx->net_dev,
3181 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
3186 efx_pci_remove_main(efx);
3190 efx_fini_struct(efx);
3193 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3194 free_netdev(net_dev);
3198 /* efx_pci_sriov_configure returns the actual number of Virtual Functions
3199 * enabled on success
3201 #ifdef CONFIG_SFC_SRIOV
3202 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
3205 struct efx_nic *efx = pci_get_drvdata(dev);
3207 if (efx->type->sriov_configure) {
3208 rc = efx->type->sriov_configure(efx, num_vfs);
3218 static int efx_pm_freeze(struct device *dev)
3220 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3224 if (efx->state != STATE_DISABLED) {
3225 efx->state = STATE_UNINIT;
3227 efx_device_detach_sync(efx);
3230 efx_disable_interrupts(efx);
3238 static int efx_pm_thaw(struct device *dev)
3241 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3245 if (efx->state != STATE_DISABLED) {
3246 rc = efx_enable_interrupts(efx);
3250 mutex_lock(&efx->mac_lock);
3251 efx->phy_op->reconfigure(efx);
3252 mutex_unlock(&efx->mac_lock);
3256 netif_device_attach(efx->net_dev);
3258 efx->state = STATE_READY;
3260 efx->type->resume_wol(efx);
3265 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3266 queue_work(reset_workqueue, &efx->reset_work);
3276 static int efx_pm_poweroff(struct device *dev)
3278 struct pci_dev *pci_dev = to_pci_dev(dev);
3279 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3281 efx->type->fini(efx);
3283 efx->reset_pending = 0;
3285 pci_save_state(pci_dev);
3286 return pci_set_power_state(pci_dev, PCI_D3hot);
3289 /* Used for both resume and restore */
3290 static int efx_pm_resume(struct device *dev)
3292 struct pci_dev *pci_dev = to_pci_dev(dev);
3293 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3296 rc = pci_set_power_state(pci_dev, PCI_D0);
3299 pci_restore_state(pci_dev);
3300 rc = pci_enable_device(pci_dev);
3303 pci_set_master(efx->pci_dev);
3304 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3307 rc = efx->type->init(efx);
3310 rc = efx_pm_thaw(dev);
3314 static int efx_pm_suspend(struct device *dev)
3319 rc = efx_pm_poweroff(dev);
3325 static const struct dev_pm_ops efx_pm_ops = {
3326 .suspend = efx_pm_suspend,
3327 .resume = efx_pm_resume,
3328 .freeze = efx_pm_freeze,
3329 .thaw = efx_pm_thaw,
3330 .poweroff = efx_pm_poweroff,
3331 .restore = efx_pm_resume,
3334 /* A PCI error affecting this device was detected.
3335 * At this point MMIO and DMA may be disabled.
3336 * Stop the software path and request a slot reset.
3338 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3339 enum pci_channel_state state)
3341 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3342 struct efx_nic *efx = pci_get_drvdata(pdev);
3344 if (state == pci_channel_io_perm_failure)
3345 return PCI_ERS_RESULT_DISCONNECT;
3349 if (efx->state != STATE_DISABLED) {
3350 efx->state = STATE_RECOVERY;
3351 efx->reset_pending = 0;
3353 efx_device_detach_sync(efx);
3356 efx_disable_interrupts(efx);
3358 status = PCI_ERS_RESULT_NEED_RESET;
3360 /* If the interface is disabled we don't want to do anything
3363 status = PCI_ERS_RESULT_RECOVERED;
3368 pci_disable_device(pdev);
3373 /* Fake a successful reset, which will be performed later in efx_io_resume. */
3374 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3376 struct efx_nic *efx = pci_get_drvdata(pdev);
3377 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3380 if (pci_enable_device(pdev)) {
3381 netif_err(efx, hw, efx->net_dev,
3382 "Cannot re-enable PCI device after reset.\n");
3383 status = PCI_ERS_RESULT_DISCONNECT;
3386 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3388 netif_err(efx, hw, efx->net_dev,
3389 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3390 /* Non-fatal error. Continue. */
3396 /* Perform the actual reset and resume I/O operations. */
3397 static void efx_io_resume(struct pci_dev *pdev)
3399 struct efx_nic *efx = pci_get_drvdata(pdev);
3404 if (efx->state == STATE_DISABLED)
3407 rc = efx_reset(efx, RESET_TYPE_ALL);
3409 netif_err(efx, hw, efx->net_dev,
3410 "efx_reset failed after PCI error (%d)\n", rc);
3412 efx->state = STATE_READY;
3413 netif_dbg(efx, hw, efx->net_dev,
3414 "Done resetting and resuming IO after PCI error.\n");
3421 /* For simplicity and reliability, we always require a slot reset and try to
3422 * reset the hardware when a pci error affecting the device is detected.
3423 * We leave both the link_reset and mmio_enabled callback unimplemented:
3424 * with our request for slot reset the mmio_enabled callback will never be
3425 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3427 static struct pci_error_handlers efx_err_handlers = {
3428 .error_detected = efx_io_error_detected,
3429 .slot_reset = efx_io_slot_reset,
3430 .resume = efx_io_resume,
3433 static struct pci_driver efx_pci_driver = {
3434 .name = KBUILD_MODNAME,
3435 .id_table = efx_pci_table,
3436 .probe = efx_pci_probe,
3437 .remove = efx_pci_remove,
3438 .driver.pm = &efx_pm_ops,
3439 .err_handler = &efx_err_handlers,
3440 #ifdef CONFIG_SFC_SRIOV
3441 .sriov_configure = efx_pci_sriov_configure,
3445 /**************************************************************************
3447 * Kernel module interface
3449 *************************************************************************/
3451 module_param(interrupt_mode, uint, 0444);
3452 MODULE_PARM_DESC(interrupt_mode,
3453 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3455 static int __init efx_init_module(void)
3459 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3461 rc = register_netdevice_notifier(&efx_netdev_notifier);
3465 #ifdef CONFIG_SFC_SRIOV
3466 rc = efx_init_sriov();
3471 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3472 if (!reset_workqueue) {
3477 rc = pci_register_driver(&efx_pci_driver);
3484 destroy_workqueue(reset_workqueue);
3486 #ifdef CONFIG_SFC_SRIOV
3490 unregister_netdevice_notifier(&efx_netdev_notifier);
3495 static void __exit efx_exit_module(void)
3497 printk(KERN_INFO "Solarflare NET driver unloading\n");
3499 pci_unregister_driver(&efx_pci_driver);
3500 destroy_workqueue(reset_workqueue);
3501 #ifdef CONFIG_SFC_SRIOV
3504 unregister_netdevice_notifier(&efx_netdev_notifier);
3508 module_init(efx_init_module);
3509 module_exit(efx_exit_module);
3511 MODULE_AUTHOR("Solarflare Communications and "
3512 "Michael Brown <mbrown@fensystems.co.uk>");
3513 MODULE_DESCRIPTION("Solarflare network driver");
3514 MODULE_LICENSE("GPL");
3515 MODULE_DEVICE_TABLE(pci, efx_pci_table);