1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_MC_BIST] = "MC_BIST",
80 [RESET_TYPE_DISABLE] = "DISABLE",
81 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
82 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
83 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
84 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
85 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
86 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
87 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
90 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
91 * queued onto this work queue. This is not a per-nic work queue, because
92 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
94 static struct workqueue_struct *reset_workqueue;
96 /* How often and how many times to poll for a reset while waiting for a
97 * BIST that another function started to complete.
99 #define BIST_WAIT_DELAY_MS 100
100 #define BIST_WAIT_DELAY_COUNT 100
102 /**************************************************************************
104 * Configurable values
106 *************************************************************************/
109 * Use separate channels for TX and RX events
111 * Set this to 1 to use separate channels for TX and RX. It allows us
112 * to control interrupt affinity separately for TX and RX.
114 * This is only used in MSI-X interrupt mode
116 static bool separate_tx_channels;
117 module_param(separate_tx_channels, bool, 0444);
118 MODULE_PARM_DESC(separate_tx_channels,
119 "Use separate channels for TX and RX");
121 /* This is the weight assigned to each of the (per-channel) virtual
124 static int napi_weight = 64;
126 /* This is the time (in jiffies) between invocations of the hardware
128 * On Falcon-based NICs, this will:
129 * - Check the on-board hardware monitor;
130 * - Poll the link state and reconfigure the hardware as necessary.
131 * On Siena-based NICs for power systems with EEH support, this will give EEH a
134 static unsigned int efx_monitor_interval = 1 * HZ;
136 /* Initial interrupt moderation settings. They can be modified after
137 * module load with ethtool.
139 * The default for RX should strike a balance between increasing the
140 * round-trip latency and reducing overhead.
142 static unsigned int rx_irq_mod_usec = 60;
144 /* Initial interrupt moderation settings. They can be modified after
145 * module load with ethtool.
147 * This default is chosen to ensure that a 10G link does not go idle
148 * while a TX queue is stopped after it has become full. A queue is
149 * restarted when it drops below half full. The time this takes (assuming
150 * worst case 3 descriptors per packet and 1024 descriptors) is
151 * 512 / 3 * 1.2 = 205 usec.
153 static unsigned int tx_irq_mod_usec = 150;
155 /* This is the first interrupt mode to try out of:
160 static unsigned int interrupt_mode;
162 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
163 * i.e. the number of CPUs among which we may distribute simultaneous
164 * interrupt handling.
166 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
167 * The default (0) means to assign an interrupt to each core.
169 static unsigned int rss_cpus;
170 module_param(rss_cpus, uint, 0444);
171 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
173 static bool phy_flash_cfg;
174 module_param(phy_flash_cfg, bool, 0644);
175 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
177 static unsigned irq_adapt_low_thresh = 8000;
178 module_param(irq_adapt_low_thresh, uint, 0644);
179 MODULE_PARM_DESC(irq_adapt_low_thresh,
180 "Threshold score for reducing IRQ moderation");
182 static unsigned irq_adapt_high_thresh = 16000;
183 module_param(irq_adapt_high_thresh, uint, 0644);
184 MODULE_PARM_DESC(irq_adapt_high_thresh,
185 "Threshold score for increasing IRQ moderation");
187 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
188 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
189 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
190 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
191 module_param(debug, uint, 0);
192 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
194 /**************************************************************************
196 * Utility functions and prototypes
198 *************************************************************************/
200 static int efx_soft_enable_interrupts(struct efx_nic *efx);
201 static void efx_soft_disable_interrupts(struct efx_nic *efx);
202 static void efx_remove_channel(struct efx_channel *channel);
203 static void efx_remove_channels(struct efx_nic *efx);
204 static const struct efx_channel_type efx_default_channel_type;
205 static void efx_remove_port(struct efx_nic *efx);
206 static void efx_init_napi_channel(struct efx_channel *channel);
207 static void efx_fini_napi(struct efx_nic *efx);
208 static void efx_fini_napi_channel(struct efx_channel *channel);
209 static void efx_fini_struct(struct efx_nic *efx);
210 static void efx_start_all(struct efx_nic *efx);
211 static void efx_stop_all(struct efx_nic *efx);
213 #define EFX_ASSERT_RESET_SERIALISED(efx) \
215 if ((efx->state == STATE_READY) || \
216 (efx->state == STATE_RECOVERY) || \
217 (efx->state == STATE_DISABLED)) \
221 static int efx_check_disabled(struct efx_nic *efx)
223 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
224 netif_err(efx, drv, efx->net_dev,
225 "device is disabled due to earlier errors\n");
231 /**************************************************************************
233 * Event queue processing
235 *************************************************************************/
237 /* Process channel's event queue
239 * This function is responsible for processing the event queue of a
240 * single channel. The caller must guarantee that this function will
241 * never be concurrently called more than once on the same channel,
242 * though different channels may be being processed concurrently.
244 static int efx_process_channel(struct efx_channel *channel, int budget)
248 if (unlikely(!channel->enabled))
251 spent = efx_nic_process_eventq(channel, budget);
252 if (spent && efx_channel_has_rx_queue(channel)) {
253 struct efx_rx_queue *rx_queue =
254 efx_channel_get_rx_queue(channel);
256 efx_rx_flush_packet(channel);
257 efx_fast_push_rx_descriptors(rx_queue, true);
265 * NAPI guarantees serialisation of polls of the same device, which
266 * provides the guarantee required by efx_process_channel().
268 static int efx_poll(struct napi_struct *napi, int budget)
270 struct efx_channel *channel =
271 container_of(napi, struct efx_channel, napi_str);
272 struct efx_nic *efx = channel->efx;
275 if (!efx_channel_lock_napi(channel))
278 netif_vdbg(efx, intr, efx->net_dev,
279 "channel %d NAPI poll executing on CPU %d\n",
280 channel->channel, raw_smp_processor_id());
282 spent = efx_process_channel(channel, budget);
284 if (spent < budget) {
285 if (efx_channel_has_rx_queue(channel) &&
286 efx->irq_rx_adaptive &&
287 unlikely(++channel->irq_count == 1000)) {
288 if (unlikely(channel->irq_mod_score <
289 irq_adapt_low_thresh)) {
290 if (channel->irq_moderation > 1) {
291 channel->irq_moderation -= 1;
292 efx->type->push_irq_moderation(channel);
294 } else if (unlikely(channel->irq_mod_score >
295 irq_adapt_high_thresh)) {
296 if (channel->irq_moderation <
297 efx->irq_rx_moderation) {
298 channel->irq_moderation += 1;
299 efx->type->push_irq_moderation(channel);
302 channel->irq_count = 0;
303 channel->irq_mod_score = 0;
306 efx_filter_rfs_expire(channel);
308 /* There is no race here; although napi_disable() will
309 * only wait for napi_complete(), this isn't a problem
310 * since efx_nic_eventq_read_ack() will have no effect if
311 * interrupts have already been disabled.
314 efx_nic_eventq_read_ack(channel);
317 efx_channel_unlock_napi(channel);
321 /* Create event queue
322 * Event queue memory allocations are done only once. If the channel
323 * is reset, the memory buffer will be reused; this guards against
324 * errors during channel reset and also simplifies interrupt handling.
326 static int efx_probe_eventq(struct efx_channel *channel)
328 struct efx_nic *efx = channel->efx;
329 unsigned long entries;
331 netif_dbg(efx, probe, efx->net_dev,
332 "chan %d create event queue\n", channel->channel);
334 /* Build an event queue with room for one event per tx and rx buffer,
335 * plus some extra for link state events and MCDI completions. */
336 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
337 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
338 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
340 return efx_nic_probe_eventq(channel);
343 /* Prepare channel's event queue */
344 static int efx_init_eventq(struct efx_channel *channel)
346 struct efx_nic *efx = channel->efx;
349 EFX_WARN_ON_PARANOID(channel->eventq_init);
351 netif_dbg(efx, drv, efx->net_dev,
352 "chan %d init event queue\n", channel->channel);
354 rc = efx_nic_init_eventq(channel);
356 efx->type->push_irq_moderation(channel);
357 channel->eventq_read_ptr = 0;
358 channel->eventq_init = true;
363 /* Enable event queue processing and NAPI */
364 void efx_start_eventq(struct efx_channel *channel)
366 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
367 "chan %d start event queue\n", channel->channel);
369 /* Make sure the NAPI handler sees the enabled flag set */
370 channel->enabled = true;
373 efx_channel_enable(channel);
374 napi_enable(&channel->napi_str);
375 efx_nic_eventq_read_ack(channel);
378 /* Disable event queue processing and NAPI */
379 void efx_stop_eventq(struct efx_channel *channel)
381 if (!channel->enabled)
384 napi_disable(&channel->napi_str);
385 while (!efx_channel_disable(channel))
386 usleep_range(1000, 20000);
387 channel->enabled = false;
390 static void efx_fini_eventq(struct efx_channel *channel)
392 if (!channel->eventq_init)
395 netif_dbg(channel->efx, drv, channel->efx->net_dev,
396 "chan %d fini event queue\n", channel->channel);
398 efx_nic_fini_eventq(channel);
399 channel->eventq_init = false;
402 static void efx_remove_eventq(struct efx_channel *channel)
404 netif_dbg(channel->efx, drv, channel->efx->net_dev,
405 "chan %d remove event queue\n", channel->channel);
407 efx_nic_remove_eventq(channel);
410 /**************************************************************************
414 *************************************************************************/
416 /* Allocate and initialise a channel structure. */
417 static struct efx_channel *
418 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
420 struct efx_channel *channel;
421 struct efx_rx_queue *rx_queue;
422 struct efx_tx_queue *tx_queue;
425 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
430 channel->channel = i;
431 channel->type = &efx_default_channel_type;
433 for (j = 0; j < EFX_TXQ_TYPES; j++) {
434 tx_queue = &channel->tx_queue[j];
436 tx_queue->queue = i * EFX_TXQ_TYPES + j;
437 tx_queue->channel = channel;
440 rx_queue = &channel->rx_queue;
442 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
443 (unsigned long)rx_queue);
448 /* Allocate and initialise a channel structure, copying parameters
449 * (but not resources) from an old channel structure.
451 static struct efx_channel *
452 efx_copy_channel(const struct efx_channel *old_channel)
454 struct efx_channel *channel;
455 struct efx_rx_queue *rx_queue;
456 struct efx_tx_queue *tx_queue;
459 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
463 *channel = *old_channel;
465 channel->napi_dev = NULL;
466 memset(&channel->eventq, 0, sizeof(channel->eventq));
468 for (j = 0; j < EFX_TXQ_TYPES; j++) {
469 tx_queue = &channel->tx_queue[j];
470 if (tx_queue->channel)
471 tx_queue->channel = channel;
472 tx_queue->buffer = NULL;
473 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
476 rx_queue = &channel->rx_queue;
477 rx_queue->buffer = NULL;
478 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
479 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
480 (unsigned long)rx_queue);
485 static int efx_probe_channel(struct efx_channel *channel)
487 struct efx_tx_queue *tx_queue;
488 struct efx_rx_queue *rx_queue;
491 netif_dbg(channel->efx, probe, channel->efx->net_dev,
492 "creating channel %d\n", channel->channel);
494 rc = channel->type->pre_probe(channel);
498 rc = efx_probe_eventq(channel);
502 efx_for_each_channel_tx_queue(tx_queue, channel) {
503 rc = efx_probe_tx_queue(tx_queue);
508 efx_for_each_channel_rx_queue(rx_queue, channel) {
509 rc = efx_probe_rx_queue(rx_queue);
517 efx_remove_channel(channel);
522 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
524 struct efx_nic *efx = channel->efx;
528 number = channel->channel;
529 if (efx->tx_channel_offset == 0) {
531 } else if (channel->channel < efx->tx_channel_offset) {
535 number -= efx->tx_channel_offset;
537 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
540 static void efx_set_channel_names(struct efx_nic *efx)
542 struct efx_channel *channel;
544 efx_for_each_channel(channel, efx)
545 channel->type->get_name(channel,
546 efx->msi_context[channel->channel].name,
547 sizeof(efx->msi_context[0].name));
550 static int efx_probe_channels(struct efx_nic *efx)
552 struct efx_channel *channel;
555 /* Restart special buffer allocation */
556 efx->next_buffer_table = 0;
558 /* Probe channels in reverse, so that any 'extra' channels
559 * use the start of the buffer table. This allows the traffic
560 * channels to be resized without moving them or wasting the
561 * entries before them.
563 efx_for_each_channel_rev(channel, efx) {
564 rc = efx_probe_channel(channel);
566 netif_err(efx, probe, efx->net_dev,
567 "failed to create channel %d\n",
572 efx_set_channel_names(efx);
577 efx_remove_channels(efx);
581 /* Channels are shutdown and reinitialised whilst the NIC is running
582 * to propagate configuration changes (mtu, checksum offload), or
583 * to clear hardware error conditions
585 static void efx_start_datapath(struct efx_nic *efx)
587 bool old_rx_scatter = efx->rx_scatter;
588 struct efx_tx_queue *tx_queue;
589 struct efx_rx_queue *rx_queue;
590 struct efx_channel *channel;
593 /* Calculate the rx buffer allocation parameters required to
594 * support the current MTU, including padding for header
595 * alignment and overruns.
597 efx->rx_dma_len = (efx->rx_prefix_size +
598 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
599 efx->type->rx_buffer_padding);
600 rx_buf_len = (sizeof(struct efx_rx_page_state) +
601 efx->rx_ip_align + efx->rx_dma_len);
602 if (rx_buf_len <= PAGE_SIZE) {
603 efx->rx_scatter = efx->type->always_rx_scatter;
604 efx->rx_buffer_order = 0;
605 } else if (efx->type->can_rx_scatter) {
606 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
607 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
608 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
609 EFX_RX_BUF_ALIGNMENT) >
611 efx->rx_scatter = true;
612 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
613 efx->rx_buffer_order = 0;
615 efx->rx_scatter = false;
616 efx->rx_buffer_order = get_order(rx_buf_len);
619 efx_rx_config_page_split(efx);
620 if (efx->rx_buffer_order)
621 netif_dbg(efx, drv, efx->net_dev,
622 "RX buf len=%u; page order=%u batch=%u\n",
623 efx->rx_dma_len, efx->rx_buffer_order,
624 efx->rx_pages_per_batch);
626 netif_dbg(efx, drv, efx->net_dev,
627 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
628 efx->rx_dma_len, efx->rx_page_buf_step,
629 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
631 /* RX filters may also have scatter-enabled flags */
632 if (efx->rx_scatter != old_rx_scatter)
633 efx->type->filter_update_rx_scatter(efx);
635 /* We must keep at least one descriptor in a TX ring empty.
636 * We could avoid this when the queue size does not exactly
637 * match the hardware ring size, but it's not that important.
638 * Therefore we stop the queue when one more skb might fill
639 * the ring completely. We wake it when half way back to
642 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
643 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
645 /* Initialise the channels */
646 efx_for_each_channel(channel, efx) {
647 efx_for_each_channel_tx_queue(tx_queue, channel) {
648 efx_init_tx_queue(tx_queue);
649 atomic_inc(&efx->active_queues);
652 efx_for_each_channel_rx_queue(rx_queue, channel) {
653 efx_init_rx_queue(rx_queue);
654 atomic_inc(&efx->active_queues);
655 efx_stop_eventq(channel);
656 efx_fast_push_rx_descriptors(rx_queue, false);
657 efx_start_eventq(channel);
660 WARN_ON(channel->rx_pkt_n_frags);
663 efx_ptp_start_datapath(efx);
665 if (netif_device_present(efx->net_dev))
666 netif_tx_wake_all_queues(efx->net_dev);
669 static void efx_stop_datapath(struct efx_nic *efx)
671 struct efx_channel *channel;
672 struct efx_tx_queue *tx_queue;
673 struct efx_rx_queue *rx_queue;
676 EFX_ASSERT_RESET_SERIALISED(efx);
677 BUG_ON(efx->port_enabled);
679 efx_ptp_stop_datapath(efx);
682 efx_for_each_channel(channel, efx) {
683 efx_for_each_channel_rx_queue(rx_queue, channel)
684 rx_queue->refill_enabled = false;
687 efx_for_each_channel(channel, efx) {
688 /* RX packet processing is pipelined, so wait for the
689 * NAPI handler to complete. At least event queue 0
690 * might be kept active by non-data events, so don't
691 * use napi_synchronize() but actually disable NAPI
694 if (efx_channel_has_rx_queue(channel)) {
695 efx_stop_eventq(channel);
696 efx_start_eventq(channel);
700 rc = efx->type->fini_dmaq(efx);
701 if (rc && EFX_WORKAROUND_7803(efx)) {
702 /* Schedule a reset to recover from the flush failure. The
703 * descriptor caches reference memory we're about to free,
704 * but falcon_reconfigure_mac_wrapper() won't reconnect
705 * the MACs because of the pending reset.
707 netif_err(efx, drv, efx->net_dev,
708 "Resetting to recover from flush failure\n");
709 efx_schedule_reset(efx, RESET_TYPE_ALL);
711 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
713 netif_dbg(efx, drv, efx->net_dev,
714 "successfully flushed all queues\n");
717 efx_for_each_channel(channel, efx) {
718 efx_for_each_channel_rx_queue(rx_queue, channel)
719 efx_fini_rx_queue(rx_queue);
720 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
721 efx_fini_tx_queue(tx_queue);
725 static void efx_remove_channel(struct efx_channel *channel)
727 struct efx_tx_queue *tx_queue;
728 struct efx_rx_queue *rx_queue;
730 netif_dbg(channel->efx, drv, channel->efx->net_dev,
731 "destroy chan %d\n", channel->channel);
733 efx_for_each_channel_rx_queue(rx_queue, channel)
734 efx_remove_rx_queue(rx_queue);
735 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
736 efx_remove_tx_queue(tx_queue);
737 efx_remove_eventq(channel);
738 channel->type->post_remove(channel);
741 static void efx_remove_channels(struct efx_nic *efx)
743 struct efx_channel *channel;
745 efx_for_each_channel(channel, efx)
746 efx_remove_channel(channel);
750 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
752 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
753 u32 old_rxq_entries, old_txq_entries;
754 unsigned i, next_buffer_table = 0;
757 rc = efx_check_disabled(efx);
761 /* Not all channels should be reallocated. We must avoid
762 * reallocating their buffer table entries.
764 efx_for_each_channel(channel, efx) {
765 struct efx_rx_queue *rx_queue;
766 struct efx_tx_queue *tx_queue;
768 if (channel->type->copy)
770 next_buffer_table = max(next_buffer_table,
771 channel->eventq.index +
772 channel->eventq.entries);
773 efx_for_each_channel_rx_queue(rx_queue, channel)
774 next_buffer_table = max(next_buffer_table,
775 rx_queue->rxd.index +
776 rx_queue->rxd.entries);
777 efx_for_each_channel_tx_queue(tx_queue, channel)
778 next_buffer_table = max(next_buffer_table,
779 tx_queue->txd.index +
780 tx_queue->txd.entries);
783 efx_device_detach_sync(efx);
785 efx_soft_disable_interrupts(efx);
787 /* Clone channels (where possible) */
788 memset(other_channel, 0, sizeof(other_channel));
789 for (i = 0; i < efx->n_channels; i++) {
790 channel = efx->channel[i];
791 if (channel->type->copy)
792 channel = channel->type->copy(channel);
797 other_channel[i] = channel;
800 /* Swap entry counts and channel pointers */
801 old_rxq_entries = efx->rxq_entries;
802 old_txq_entries = efx->txq_entries;
803 efx->rxq_entries = rxq_entries;
804 efx->txq_entries = txq_entries;
805 for (i = 0; i < efx->n_channels; i++) {
806 channel = efx->channel[i];
807 efx->channel[i] = other_channel[i];
808 other_channel[i] = channel;
811 /* Restart buffer table allocation */
812 efx->next_buffer_table = next_buffer_table;
814 for (i = 0; i < efx->n_channels; i++) {
815 channel = efx->channel[i];
816 if (!channel->type->copy)
818 rc = efx_probe_channel(channel);
821 efx_init_napi_channel(efx->channel[i]);
825 /* Destroy unused channel structures */
826 for (i = 0; i < efx->n_channels; i++) {
827 channel = other_channel[i];
828 if (channel && channel->type->copy) {
829 efx_fini_napi_channel(channel);
830 efx_remove_channel(channel);
835 rc2 = efx_soft_enable_interrupts(efx);
838 netif_err(efx, drv, efx->net_dev,
839 "unable to restart interrupts on channel reallocation\n");
840 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
843 netif_device_attach(efx->net_dev);
849 efx->rxq_entries = old_rxq_entries;
850 efx->txq_entries = old_txq_entries;
851 for (i = 0; i < efx->n_channels; i++) {
852 channel = efx->channel[i];
853 efx->channel[i] = other_channel[i];
854 other_channel[i] = channel;
859 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
861 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
864 static const struct efx_channel_type efx_default_channel_type = {
865 .pre_probe = efx_channel_dummy_op_int,
866 .post_remove = efx_channel_dummy_op_void,
867 .get_name = efx_get_channel_name,
868 .copy = efx_copy_channel,
869 .keep_eventq = false,
872 int efx_channel_dummy_op_int(struct efx_channel *channel)
877 void efx_channel_dummy_op_void(struct efx_channel *channel)
881 /**************************************************************************
885 **************************************************************************/
887 /* This ensures that the kernel is kept informed (via
888 * netif_carrier_on/off) of the link status, and also maintains the
889 * link status's stop on the port's TX queue.
891 void efx_link_status_changed(struct efx_nic *efx)
893 struct efx_link_state *link_state = &efx->link_state;
895 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
896 * that no events are triggered between unregister_netdev() and the
897 * driver unloading. A more general condition is that NETDEV_CHANGE
898 * can only be generated between NETDEV_UP and NETDEV_DOWN */
899 if (!netif_running(efx->net_dev))
902 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
903 efx->n_link_state_changes++;
906 netif_carrier_on(efx->net_dev);
908 netif_carrier_off(efx->net_dev);
911 /* Status message for kernel log */
913 netif_info(efx, link, efx->net_dev,
914 "link up at %uMbps %s-duplex (MTU %d)\n",
915 link_state->speed, link_state->fd ? "full" : "half",
918 netif_info(efx, link, efx->net_dev, "link down\n");
921 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
923 efx->link_advertising = advertising;
925 if (advertising & ADVERTISED_Pause)
926 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
928 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
929 if (advertising & ADVERTISED_Asym_Pause)
930 efx->wanted_fc ^= EFX_FC_TX;
934 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
936 efx->wanted_fc = wanted_fc;
937 if (efx->link_advertising) {
938 if (wanted_fc & EFX_FC_RX)
939 efx->link_advertising |= (ADVERTISED_Pause |
940 ADVERTISED_Asym_Pause);
942 efx->link_advertising &= ~(ADVERTISED_Pause |
943 ADVERTISED_Asym_Pause);
944 if (wanted_fc & EFX_FC_TX)
945 efx->link_advertising ^= ADVERTISED_Asym_Pause;
949 static void efx_fini_port(struct efx_nic *efx);
951 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
952 * the MAC appropriately. All other PHY configuration changes are pushed
953 * through phy_op->set_settings(), and pushed asynchronously to the MAC
954 * through efx_monitor().
956 * Callers must hold the mac_lock
958 int __efx_reconfigure_port(struct efx_nic *efx)
960 enum efx_phy_mode phy_mode;
963 WARN_ON(!mutex_is_locked(&efx->mac_lock));
965 /* Disable PHY transmit in mac level loopbacks */
966 phy_mode = efx->phy_mode;
967 if (LOOPBACK_INTERNAL(efx))
968 efx->phy_mode |= PHY_MODE_TX_DISABLED;
970 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
972 rc = efx->type->reconfigure_port(efx);
975 efx->phy_mode = phy_mode;
980 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
982 int efx_reconfigure_port(struct efx_nic *efx)
986 EFX_ASSERT_RESET_SERIALISED(efx);
988 mutex_lock(&efx->mac_lock);
989 rc = __efx_reconfigure_port(efx);
990 mutex_unlock(&efx->mac_lock);
995 /* Asynchronous work item for changing MAC promiscuity and multicast
996 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
998 static void efx_mac_work(struct work_struct *data)
1000 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1002 mutex_lock(&efx->mac_lock);
1003 if (efx->port_enabled)
1004 efx->type->reconfigure_mac(efx);
1005 mutex_unlock(&efx->mac_lock);
1008 static int efx_probe_port(struct efx_nic *efx)
1012 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1015 efx->phy_mode = PHY_MODE_SPECIAL;
1017 /* Connect up MAC/PHY operations table */
1018 rc = efx->type->probe_port(efx);
1022 /* Initialise MAC address to permanent address */
1023 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1028 static int efx_init_port(struct efx_nic *efx)
1032 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1034 mutex_lock(&efx->mac_lock);
1036 rc = efx->phy_op->init(efx);
1040 efx->port_initialized = true;
1042 /* Reconfigure the MAC before creating dma queues (required for
1043 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1044 efx->type->reconfigure_mac(efx);
1046 /* Ensure the PHY advertises the correct flow control settings */
1047 rc = efx->phy_op->reconfigure(efx);
1051 mutex_unlock(&efx->mac_lock);
1055 efx->phy_op->fini(efx);
1057 mutex_unlock(&efx->mac_lock);
1061 static void efx_start_port(struct efx_nic *efx)
1063 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1064 BUG_ON(efx->port_enabled);
1066 mutex_lock(&efx->mac_lock);
1067 efx->port_enabled = true;
1069 /* Ensure MAC ingress/egress is enabled */
1070 efx->type->reconfigure_mac(efx);
1072 mutex_unlock(&efx->mac_lock);
1075 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1076 * and the async self-test, wait for them to finish and prevent them
1077 * being scheduled again. This doesn't cover online resets, which
1078 * should only be cancelled when removing the device.
1080 static void efx_stop_port(struct efx_nic *efx)
1082 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1084 EFX_ASSERT_RESET_SERIALISED(efx);
1086 mutex_lock(&efx->mac_lock);
1087 efx->port_enabled = false;
1088 mutex_unlock(&efx->mac_lock);
1090 /* Serialise against efx_set_multicast_list() */
1091 netif_addr_lock_bh(efx->net_dev);
1092 netif_addr_unlock_bh(efx->net_dev);
1094 cancel_delayed_work_sync(&efx->monitor_work);
1095 efx_selftest_async_cancel(efx);
1096 cancel_work_sync(&efx->mac_work);
1099 static void efx_fini_port(struct efx_nic *efx)
1101 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1103 if (!efx->port_initialized)
1106 efx->phy_op->fini(efx);
1107 efx->port_initialized = false;
1109 efx->link_state.up = false;
1110 efx_link_status_changed(efx);
1113 static void efx_remove_port(struct efx_nic *efx)
1115 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1117 efx->type->remove_port(efx);
1120 /**************************************************************************
1124 **************************************************************************/
1126 static LIST_HEAD(efx_primary_list);
1127 static LIST_HEAD(efx_unassociated_list);
1129 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1131 return left->type == right->type &&
1132 left->vpd_sn && right->vpd_sn &&
1133 !strcmp(left->vpd_sn, right->vpd_sn);
1136 static void efx_associate(struct efx_nic *efx)
1138 struct efx_nic *other, *next;
1140 if (efx->primary == efx) {
1141 /* Adding primary function; look for secondaries */
1143 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1144 list_add_tail(&efx->node, &efx_primary_list);
1146 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1148 if (efx_same_controller(efx, other)) {
1149 list_del(&other->node);
1150 netif_dbg(other, probe, other->net_dev,
1151 "moving to secondary list of %s %s\n",
1152 pci_name(efx->pci_dev),
1153 efx->net_dev->name);
1154 list_add_tail(&other->node,
1155 &efx->secondary_list);
1156 other->primary = efx;
1160 /* Adding secondary function; look for primary */
1162 list_for_each_entry(other, &efx_primary_list, node) {
1163 if (efx_same_controller(efx, other)) {
1164 netif_dbg(efx, probe, efx->net_dev,
1165 "adding to secondary list of %s %s\n",
1166 pci_name(other->pci_dev),
1167 other->net_dev->name);
1168 list_add_tail(&efx->node,
1169 &other->secondary_list);
1170 efx->primary = other;
1175 netif_dbg(efx, probe, efx->net_dev,
1176 "adding to unassociated list\n");
1177 list_add_tail(&efx->node, &efx_unassociated_list);
1181 static void efx_dissociate(struct efx_nic *efx)
1183 struct efx_nic *other, *next;
1185 list_del(&efx->node);
1186 efx->primary = NULL;
1188 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1189 list_del(&other->node);
1190 netif_dbg(other, probe, other->net_dev,
1191 "moving to unassociated list\n");
1192 list_add_tail(&other->node, &efx_unassociated_list);
1193 other->primary = NULL;
1197 /* This configures the PCI device to enable I/O and DMA. */
1198 static int efx_init_io(struct efx_nic *efx)
1200 struct pci_dev *pci_dev = efx->pci_dev;
1201 dma_addr_t dma_mask = efx->type->max_dma_mask;
1202 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1205 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1207 rc = pci_enable_device(pci_dev);
1209 netif_err(efx, probe, efx->net_dev,
1210 "failed to enable PCI device\n");
1214 pci_set_master(pci_dev);
1216 /* Set the PCI DMA mask. Try all possibilities from our
1217 * genuine mask down to 32 bits, because some architectures
1218 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1219 * masks event though they reject 46 bit masks.
1221 while (dma_mask > 0x7fffffffUL) {
1222 if (dma_supported(&pci_dev->dev, dma_mask)) {
1223 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1230 netif_err(efx, probe, efx->net_dev,
1231 "could not find a suitable DMA mask\n");
1234 netif_dbg(efx, probe, efx->net_dev,
1235 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1237 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1238 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1240 netif_err(efx, probe, efx->net_dev,
1241 "request for memory BAR failed\n");
1245 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1246 if (!efx->membase) {
1247 netif_err(efx, probe, efx->net_dev,
1248 "could not map memory BAR at %llx+%x\n",
1249 (unsigned long long)efx->membase_phys, mem_map_size);
1253 netif_dbg(efx, probe, efx->net_dev,
1254 "memory BAR at %llx+%x (virtual %p)\n",
1255 (unsigned long long)efx->membase_phys, mem_map_size,
1261 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1263 efx->membase_phys = 0;
1265 pci_disable_device(efx->pci_dev);
1270 static void efx_fini_io(struct efx_nic *efx)
1272 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1275 iounmap(efx->membase);
1276 efx->membase = NULL;
1279 if (efx->membase_phys) {
1280 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1281 efx->membase_phys = 0;
1284 pci_disable_device(efx->pci_dev);
1287 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1289 cpumask_var_t thread_mask;
1296 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1297 netif_warn(efx, probe, efx->net_dev,
1298 "RSS disabled due to allocation failure\n");
1303 for_each_online_cpu(cpu) {
1304 if (!cpumask_test_cpu(cpu, thread_mask)) {
1306 cpumask_or(thread_mask, thread_mask,
1307 topology_thread_cpumask(cpu));
1311 free_cpumask_var(thread_mask);
1314 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1315 * table entries that are inaccessible to VFs
1317 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1318 count > efx_vf_size(efx)) {
1319 netif_warn(efx, probe, efx->net_dev,
1320 "Reducing number of RSS channels from %u to %u for "
1321 "VF support. Increase vf-msix-limit to use more "
1322 "channels on the PF.\n",
1323 count, efx_vf_size(efx));
1324 count = efx_vf_size(efx);
1330 /* Probe the number and type of interrupts we are able to obtain, and
1331 * the resulting numbers of channels and RX queues.
1333 static int efx_probe_interrupts(struct efx_nic *efx)
1335 unsigned int extra_channels = 0;
1339 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1340 if (efx->extra_channel_type[i])
1343 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1344 struct msix_entry xentries[EFX_MAX_CHANNELS];
1345 unsigned int n_channels;
1347 n_channels = efx_wanted_parallelism(efx);
1348 if (separate_tx_channels)
1350 n_channels += extra_channels;
1351 n_channels = min(n_channels, efx->max_channels);
1353 for (i = 0; i < n_channels; i++)
1354 xentries[i].entry = i;
1355 rc = pci_enable_msix_range(efx->pci_dev,
1356 xentries, 1, n_channels);
1358 /* Fall back to single channel MSI */
1359 efx->interrupt_mode = EFX_INT_MODE_MSI;
1360 netif_err(efx, drv, efx->net_dev,
1361 "could not enable MSI-X\n");
1362 } else if (rc < n_channels) {
1363 netif_err(efx, drv, efx->net_dev,
1364 "WARNING: Insufficient MSI-X vectors"
1365 " available (%d < %u).\n", rc, n_channels);
1366 netif_err(efx, drv, efx->net_dev,
1367 "WARNING: Performance may be reduced.\n");
1372 efx->n_channels = n_channels;
1373 if (n_channels > extra_channels)
1374 n_channels -= extra_channels;
1375 if (separate_tx_channels) {
1376 efx->n_tx_channels = max(n_channels / 2, 1U);
1377 efx->n_rx_channels = max(n_channels -
1381 efx->n_tx_channels = n_channels;
1382 efx->n_rx_channels = n_channels;
1384 for (i = 0; i < efx->n_channels; i++)
1385 efx_get_channel(efx, i)->irq =
1390 /* Try single interrupt MSI */
1391 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1392 efx->n_channels = 1;
1393 efx->n_rx_channels = 1;
1394 efx->n_tx_channels = 1;
1395 rc = pci_enable_msi(efx->pci_dev);
1397 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1399 netif_err(efx, drv, efx->net_dev,
1400 "could not enable MSI\n");
1401 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1405 /* Assume legacy interrupts */
1406 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1407 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1408 efx->n_rx_channels = 1;
1409 efx->n_tx_channels = 1;
1410 efx->legacy_irq = efx->pci_dev->irq;
1413 /* Assign extra channels if possible */
1414 j = efx->n_channels;
1415 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1416 if (!efx->extra_channel_type[i])
1418 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1419 efx->n_channels <= extra_channels) {
1420 efx->extra_channel_type[i]->handle_no_channel(efx);
1423 efx_get_channel(efx, j)->type =
1424 efx->extra_channel_type[i];
1428 /* RSS might be usable on VFs even if it is disabled on the PF */
1429 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1430 efx->n_rx_channels : efx_vf_size(efx));
1435 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1437 struct efx_channel *channel, *end_channel;
1440 BUG_ON(efx->state == STATE_DISABLED);
1442 efx->irq_soft_enabled = true;
1445 efx_for_each_channel(channel, efx) {
1446 if (!channel->type->keep_eventq) {
1447 rc = efx_init_eventq(channel);
1451 efx_start_eventq(channel);
1454 efx_mcdi_mode_event(efx);
1458 end_channel = channel;
1459 efx_for_each_channel(channel, efx) {
1460 if (channel == end_channel)
1462 efx_stop_eventq(channel);
1463 if (!channel->type->keep_eventq)
1464 efx_fini_eventq(channel);
1470 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1472 struct efx_channel *channel;
1474 if (efx->state == STATE_DISABLED)
1477 efx_mcdi_mode_poll(efx);
1479 efx->irq_soft_enabled = false;
1482 if (efx->legacy_irq)
1483 synchronize_irq(efx->legacy_irq);
1485 efx_for_each_channel(channel, efx) {
1487 synchronize_irq(channel->irq);
1489 efx_stop_eventq(channel);
1490 if (!channel->type->keep_eventq)
1491 efx_fini_eventq(channel);
1494 /* Flush the asynchronous MCDI request queue */
1495 efx_mcdi_flush_async(efx);
1498 static int efx_enable_interrupts(struct efx_nic *efx)
1500 struct efx_channel *channel, *end_channel;
1503 BUG_ON(efx->state == STATE_DISABLED);
1505 if (efx->eeh_disabled_legacy_irq) {
1506 enable_irq(efx->legacy_irq);
1507 efx->eeh_disabled_legacy_irq = false;
1510 efx->type->irq_enable_master(efx);
1512 efx_for_each_channel(channel, efx) {
1513 if (channel->type->keep_eventq) {
1514 rc = efx_init_eventq(channel);
1520 rc = efx_soft_enable_interrupts(efx);
1527 end_channel = channel;
1528 efx_for_each_channel(channel, efx) {
1529 if (channel == end_channel)
1531 if (channel->type->keep_eventq)
1532 efx_fini_eventq(channel);
1535 efx->type->irq_disable_non_ev(efx);
1540 static void efx_disable_interrupts(struct efx_nic *efx)
1542 struct efx_channel *channel;
1544 efx_soft_disable_interrupts(efx);
1546 efx_for_each_channel(channel, efx) {
1547 if (channel->type->keep_eventq)
1548 efx_fini_eventq(channel);
1551 efx->type->irq_disable_non_ev(efx);
1554 static void efx_remove_interrupts(struct efx_nic *efx)
1556 struct efx_channel *channel;
1558 /* Remove MSI/MSI-X interrupts */
1559 efx_for_each_channel(channel, efx)
1561 pci_disable_msi(efx->pci_dev);
1562 pci_disable_msix(efx->pci_dev);
1564 /* Remove legacy interrupt */
1565 efx->legacy_irq = 0;
1568 static void efx_set_channels(struct efx_nic *efx)
1570 struct efx_channel *channel;
1571 struct efx_tx_queue *tx_queue;
1573 efx->tx_channel_offset =
1574 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1576 /* We need to mark which channels really have RX and TX
1577 * queues, and adjust the TX queue numbers if we have separate
1578 * RX-only and TX-only channels.
1580 efx_for_each_channel(channel, efx) {
1581 if (channel->channel < efx->n_rx_channels)
1582 channel->rx_queue.core_index = channel->channel;
1584 channel->rx_queue.core_index = -1;
1586 efx_for_each_channel_tx_queue(tx_queue, channel)
1587 tx_queue->queue -= (efx->tx_channel_offset *
1592 static int efx_probe_nic(struct efx_nic *efx)
1597 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1599 /* Carry out hardware-type specific initialisation */
1600 rc = efx->type->probe(efx);
1604 /* Determine the number of channels and queues by trying to hook
1605 * in MSI-X interrupts. */
1606 rc = efx_probe_interrupts(efx);
1610 efx_set_channels(efx);
1612 rc = efx->type->dimension_resources(efx);
1616 if (efx->n_channels > 1)
1617 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1618 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1619 efx->rx_indir_table[i] =
1620 ethtool_rxfh_indir_default(i, efx->rss_spread);
1622 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1623 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1625 /* Initialise the interrupt moderation settings */
1626 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1632 efx_remove_interrupts(efx);
1634 efx->type->remove(efx);
1638 static void efx_remove_nic(struct efx_nic *efx)
1640 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1642 efx_remove_interrupts(efx);
1643 efx->type->remove(efx);
1646 static int efx_probe_filters(struct efx_nic *efx)
1650 spin_lock_init(&efx->filter_lock);
1652 rc = efx->type->filter_table_probe(efx);
1656 #ifdef CONFIG_RFS_ACCEL
1657 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1658 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1659 sizeof(*efx->rps_flow_id),
1661 if (!efx->rps_flow_id) {
1662 efx->type->filter_table_remove(efx);
1671 static void efx_remove_filters(struct efx_nic *efx)
1673 #ifdef CONFIG_RFS_ACCEL
1674 kfree(efx->rps_flow_id);
1676 efx->type->filter_table_remove(efx);
1679 static void efx_restore_filters(struct efx_nic *efx)
1681 efx->type->filter_table_restore(efx);
1684 /**************************************************************************
1686 * NIC startup/shutdown
1688 *************************************************************************/
1690 static int efx_probe_all(struct efx_nic *efx)
1694 rc = efx_probe_nic(efx);
1696 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1700 rc = efx_probe_port(efx);
1702 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1706 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1707 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1711 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1713 rc = efx_probe_filters(efx);
1715 netif_err(efx, probe, efx->net_dev,
1716 "failed to create filter tables\n");
1720 rc = efx_probe_channels(efx);
1727 efx_remove_filters(efx);
1729 efx_remove_port(efx);
1731 efx_remove_nic(efx);
1736 /* If the interface is supposed to be running but is not, start
1737 * the hardware and software data path, regular activity for the port
1738 * (MAC statistics, link polling, etc.) and schedule the port to be
1739 * reconfigured. Interrupts must already be enabled. This function
1740 * is safe to call multiple times, so long as the NIC is not disabled.
1741 * Requires the RTNL lock.
1743 static void efx_start_all(struct efx_nic *efx)
1745 EFX_ASSERT_RESET_SERIALISED(efx);
1746 BUG_ON(efx->state == STATE_DISABLED);
1748 /* Check that it is appropriate to restart the interface. All
1749 * of these flags are safe to read under just the rtnl lock */
1750 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1754 efx_start_port(efx);
1755 efx_start_datapath(efx);
1757 /* Start the hardware monitor if there is one */
1758 if (efx->type->monitor != NULL)
1759 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1760 efx_monitor_interval);
1762 /* If link state detection is normally event-driven, we have
1763 * to poll now because we could have missed a change
1765 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1766 mutex_lock(&efx->mac_lock);
1767 if (efx->phy_op->poll(efx))
1768 efx_link_status_changed(efx);
1769 mutex_unlock(&efx->mac_lock);
1772 efx->type->start_stats(efx);
1773 efx->type->pull_stats(efx);
1774 spin_lock_bh(&efx->stats_lock);
1775 efx->type->update_stats(efx, NULL, NULL);
1776 spin_unlock_bh(&efx->stats_lock);
1779 /* Quiesce the hardware and software data path, and regular activity
1780 * for the port without bringing the link down. Safe to call multiple
1781 * times with the NIC in almost any state, but interrupts should be
1782 * enabled. Requires the RTNL lock.
1784 static void efx_stop_all(struct efx_nic *efx)
1786 EFX_ASSERT_RESET_SERIALISED(efx);
1788 /* port_enabled can be read safely under the rtnl lock */
1789 if (!efx->port_enabled)
1792 /* update stats before we go down so we can accurately count
1795 efx->type->pull_stats(efx);
1796 spin_lock_bh(&efx->stats_lock);
1797 efx->type->update_stats(efx, NULL, NULL);
1798 spin_unlock_bh(&efx->stats_lock);
1799 efx->type->stop_stats(efx);
1802 /* Stop the kernel transmit interface. This is only valid if
1803 * the device is stopped or detached; otherwise the watchdog
1804 * may fire immediately.
1806 WARN_ON(netif_running(efx->net_dev) &&
1807 netif_device_present(efx->net_dev));
1808 netif_tx_disable(efx->net_dev);
1810 efx_stop_datapath(efx);
1813 static void efx_remove_all(struct efx_nic *efx)
1815 efx_remove_channels(efx);
1816 efx_remove_filters(efx);
1817 efx_remove_port(efx);
1818 efx_remove_nic(efx);
1821 /**************************************************************************
1823 * Interrupt moderation
1825 **************************************************************************/
1827 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1831 if (usecs * 1000 < quantum_ns)
1832 return 1; /* never round down to 0 */
1833 return usecs * 1000 / quantum_ns;
1836 /* Set interrupt moderation parameters */
1837 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1838 unsigned int rx_usecs, bool rx_adaptive,
1839 bool rx_may_override_tx)
1841 struct efx_channel *channel;
1842 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1843 efx->timer_quantum_ns,
1845 unsigned int tx_ticks;
1846 unsigned int rx_ticks;
1848 EFX_ASSERT_RESET_SERIALISED(efx);
1850 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1853 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1854 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1856 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1857 !rx_may_override_tx) {
1858 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1859 "RX and TX IRQ moderation must be equal\n");
1863 efx->irq_rx_adaptive = rx_adaptive;
1864 efx->irq_rx_moderation = rx_ticks;
1865 efx_for_each_channel(channel, efx) {
1866 if (efx_channel_has_rx_queue(channel))
1867 channel->irq_moderation = rx_ticks;
1868 else if (efx_channel_has_tx_queues(channel))
1869 channel->irq_moderation = tx_ticks;
1875 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1876 unsigned int *rx_usecs, bool *rx_adaptive)
1878 /* We must round up when converting ticks to microseconds
1879 * because we round down when converting the other way.
1882 *rx_adaptive = efx->irq_rx_adaptive;
1883 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1884 efx->timer_quantum_ns,
1887 /* If channels are shared between RX and TX, so is IRQ
1888 * moderation. Otherwise, IRQ moderation is the same for all
1889 * TX channels and is not adaptive.
1891 if (efx->tx_channel_offset == 0)
1892 *tx_usecs = *rx_usecs;
1894 *tx_usecs = DIV_ROUND_UP(
1895 efx->channel[efx->tx_channel_offset]->irq_moderation *
1896 efx->timer_quantum_ns,
1900 /**************************************************************************
1904 **************************************************************************/
1906 /* Run periodically off the general workqueue */
1907 static void efx_monitor(struct work_struct *data)
1909 struct efx_nic *efx = container_of(data, struct efx_nic,
1912 netif_vdbg(efx, timer, efx->net_dev,
1913 "hardware monitor executing on CPU %d\n",
1914 raw_smp_processor_id());
1915 BUG_ON(efx->type->monitor == NULL);
1917 /* If the mac_lock is already held then it is likely a port
1918 * reconfiguration is already in place, which will likely do
1919 * most of the work of monitor() anyway. */
1920 if (mutex_trylock(&efx->mac_lock)) {
1921 if (efx->port_enabled)
1922 efx->type->monitor(efx);
1923 mutex_unlock(&efx->mac_lock);
1926 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1927 efx_monitor_interval);
1930 /**************************************************************************
1934 *************************************************************************/
1937 * Context: process, rtnl_lock() held.
1939 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1941 struct efx_nic *efx = netdev_priv(net_dev);
1942 struct mii_ioctl_data *data = if_mii(ifr);
1944 if (cmd == SIOCSHWTSTAMP)
1945 return efx_ptp_set_ts_config(efx, ifr);
1946 if (cmd == SIOCGHWTSTAMP)
1947 return efx_ptp_get_ts_config(efx, ifr);
1949 /* Convert phy_id from older PRTAD/DEVAD format */
1950 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1951 (data->phy_id & 0xfc00) == 0x0400)
1952 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1954 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1957 /**************************************************************************
1961 **************************************************************************/
1963 static void efx_init_napi_channel(struct efx_channel *channel)
1965 struct efx_nic *efx = channel->efx;
1967 channel->napi_dev = efx->net_dev;
1968 netif_napi_add(channel->napi_dev, &channel->napi_str,
1969 efx_poll, napi_weight);
1970 napi_hash_add(&channel->napi_str);
1971 efx_channel_init_lock(channel);
1974 static void efx_init_napi(struct efx_nic *efx)
1976 struct efx_channel *channel;
1978 efx_for_each_channel(channel, efx)
1979 efx_init_napi_channel(channel);
1982 static void efx_fini_napi_channel(struct efx_channel *channel)
1984 if (channel->napi_dev) {
1985 netif_napi_del(&channel->napi_str);
1986 napi_hash_del(&channel->napi_str);
1988 channel->napi_dev = NULL;
1991 static void efx_fini_napi(struct efx_nic *efx)
1993 struct efx_channel *channel;
1995 efx_for_each_channel(channel, efx)
1996 efx_fini_napi_channel(channel);
1999 /**************************************************************************
2001 * Kernel netpoll interface
2003 *************************************************************************/
2005 #ifdef CONFIG_NET_POLL_CONTROLLER
2007 /* Although in the common case interrupts will be disabled, this is not
2008 * guaranteed. However, all our work happens inside the NAPI callback,
2009 * so no locking is required.
2011 static void efx_netpoll(struct net_device *net_dev)
2013 struct efx_nic *efx = netdev_priv(net_dev);
2014 struct efx_channel *channel;
2016 efx_for_each_channel(channel, efx)
2017 efx_schedule_channel(channel);
2022 #ifdef CONFIG_NET_RX_BUSY_POLL
2023 static int efx_busy_poll(struct napi_struct *napi)
2025 struct efx_channel *channel =
2026 container_of(napi, struct efx_channel, napi_str);
2027 struct efx_nic *efx = channel->efx;
2029 int old_rx_packets, rx_packets;
2031 if (!netif_running(efx->net_dev))
2032 return LL_FLUSH_FAILED;
2034 if (!efx_channel_lock_poll(channel))
2035 return LL_FLUSH_BUSY;
2037 old_rx_packets = channel->rx_queue.rx_packets;
2038 efx_process_channel(channel, budget);
2040 rx_packets = channel->rx_queue.rx_packets - old_rx_packets;
2042 /* There is no race condition with NAPI here.
2043 * NAPI will automatically be rescheduled if it yielded during busy
2044 * polling, because it was not able to take the lock and thus returned
2047 efx_channel_unlock_poll(channel);
2053 /**************************************************************************
2055 * Kernel net device interface
2057 *************************************************************************/
2059 /* Context: process, rtnl_lock() held. */
2060 static int efx_net_open(struct net_device *net_dev)
2062 struct efx_nic *efx = netdev_priv(net_dev);
2065 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2066 raw_smp_processor_id());
2068 rc = efx_check_disabled(efx);
2071 if (efx->phy_mode & PHY_MODE_SPECIAL)
2073 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2076 /* Notify the kernel of the link state polled during driver load,
2077 * before the monitor starts running */
2078 efx_link_status_changed(efx);
2081 efx_selftest_async_start(efx);
2085 /* Context: process, rtnl_lock() held.
2086 * Note that the kernel will ignore our return code; this method
2087 * should really be a void.
2089 static int efx_net_stop(struct net_device *net_dev)
2091 struct efx_nic *efx = netdev_priv(net_dev);
2093 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2094 raw_smp_processor_id());
2096 /* Stop the device and flush all the channels */
2102 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2103 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
2104 struct rtnl_link_stats64 *stats)
2106 struct efx_nic *efx = netdev_priv(net_dev);
2108 spin_lock_bh(&efx->stats_lock);
2109 efx->type->update_stats(efx, NULL, stats);
2110 spin_unlock_bh(&efx->stats_lock);
2115 /* Context: netif_tx_lock held, BHs disabled. */
2116 static void efx_watchdog(struct net_device *net_dev)
2118 struct efx_nic *efx = netdev_priv(net_dev);
2120 netif_err(efx, tx_err, efx->net_dev,
2121 "TX stuck with port_enabled=%d: resetting channels\n",
2124 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2128 /* Context: process, rtnl_lock() held. */
2129 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2131 struct efx_nic *efx = netdev_priv(net_dev);
2134 rc = efx_check_disabled(efx);
2137 if (new_mtu > EFX_MAX_MTU)
2140 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2142 efx_device_detach_sync(efx);
2145 mutex_lock(&efx->mac_lock);
2146 net_dev->mtu = new_mtu;
2147 efx->type->reconfigure_mac(efx);
2148 mutex_unlock(&efx->mac_lock);
2151 netif_device_attach(efx->net_dev);
2155 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2157 struct efx_nic *efx = netdev_priv(net_dev);
2158 struct sockaddr *addr = data;
2159 u8 *new_addr = addr->sa_data;
2161 if (!is_valid_ether_addr(new_addr)) {
2162 netif_err(efx, drv, efx->net_dev,
2163 "invalid ethernet MAC address requested: %pM\n",
2165 return -EADDRNOTAVAIL;
2168 ether_addr_copy(net_dev->dev_addr, new_addr);
2169 efx_sriov_mac_address_changed(efx);
2171 /* Reconfigure the MAC */
2172 mutex_lock(&efx->mac_lock);
2173 efx->type->reconfigure_mac(efx);
2174 mutex_unlock(&efx->mac_lock);
2179 /* Context: netif_addr_lock held, BHs disabled. */
2180 static void efx_set_rx_mode(struct net_device *net_dev)
2182 struct efx_nic *efx = netdev_priv(net_dev);
2184 if (efx->port_enabled)
2185 queue_work(efx->workqueue, &efx->mac_work);
2186 /* Otherwise efx_start_port() will do this */
2189 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2191 struct efx_nic *efx = netdev_priv(net_dev);
2193 /* If disabling RX n-tuple filtering, clear existing filters */
2194 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2195 return efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2200 static const struct net_device_ops efx_farch_netdev_ops = {
2201 .ndo_open = efx_net_open,
2202 .ndo_stop = efx_net_stop,
2203 .ndo_get_stats64 = efx_net_stats,
2204 .ndo_tx_timeout = efx_watchdog,
2205 .ndo_start_xmit = efx_hard_start_xmit,
2206 .ndo_validate_addr = eth_validate_addr,
2207 .ndo_do_ioctl = efx_ioctl,
2208 .ndo_change_mtu = efx_change_mtu,
2209 .ndo_set_mac_address = efx_set_mac_address,
2210 .ndo_set_rx_mode = efx_set_rx_mode,
2211 .ndo_set_features = efx_set_features,
2212 #ifdef CONFIG_SFC_SRIOV
2213 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2214 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2215 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2216 .ndo_get_vf_config = efx_sriov_get_vf_config,
2218 #ifdef CONFIG_NET_POLL_CONTROLLER
2219 .ndo_poll_controller = efx_netpoll,
2221 .ndo_setup_tc = efx_setup_tc,
2222 #ifdef CONFIG_NET_RX_BUSY_POLL
2223 .ndo_busy_poll = efx_busy_poll,
2225 #ifdef CONFIG_RFS_ACCEL
2226 .ndo_rx_flow_steer = efx_filter_rfs,
2230 static const struct net_device_ops efx_ef10_netdev_ops = {
2231 .ndo_open = efx_net_open,
2232 .ndo_stop = efx_net_stop,
2233 .ndo_get_stats64 = efx_net_stats,
2234 .ndo_tx_timeout = efx_watchdog,
2235 .ndo_start_xmit = efx_hard_start_xmit,
2236 .ndo_validate_addr = eth_validate_addr,
2237 .ndo_do_ioctl = efx_ioctl,
2238 .ndo_change_mtu = efx_change_mtu,
2239 .ndo_set_mac_address = efx_set_mac_address,
2240 .ndo_set_rx_mode = efx_set_rx_mode,
2241 .ndo_set_features = efx_set_features,
2242 #ifdef CONFIG_NET_POLL_CONTROLLER
2243 .ndo_poll_controller = efx_netpoll,
2245 #ifdef CONFIG_NET_RX_BUSY_POLL
2246 .ndo_busy_poll = efx_busy_poll,
2248 #ifdef CONFIG_RFS_ACCEL
2249 .ndo_rx_flow_steer = efx_filter_rfs,
2253 static void efx_update_name(struct efx_nic *efx)
2255 strcpy(efx->name, efx->net_dev->name);
2256 efx_mtd_rename(efx);
2257 efx_set_channel_names(efx);
2260 static int efx_netdev_event(struct notifier_block *this,
2261 unsigned long event, void *ptr)
2263 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2265 if ((net_dev->netdev_ops == &efx_farch_netdev_ops ||
2266 net_dev->netdev_ops == &efx_ef10_netdev_ops) &&
2267 event == NETDEV_CHANGENAME)
2268 efx_update_name(netdev_priv(net_dev));
2273 static struct notifier_block efx_netdev_notifier = {
2274 .notifier_call = efx_netdev_event,
2278 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2280 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2281 return sprintf(buf, "%d\n", efx->phy_type);
2283 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2285 static int efx_register_netdev(struct efx_nic *efx)
2287 struct net_device *net_dev = efx->net_dev;
2288 struct efx_channel *channel;
2291 net_dev->watchdog_timeo = 5 * HZ;
2292 net_dev->irq = efx->pci_dev->irq;
2293 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
2294 net_dev->netdev_ops = &efx_ef10_netdev_ops;
2295 net_dev->priv_flags |= IFF_UNICAST_FLT;
2297 net_dev->netdev_ops = &efx_farch_netdev_ops;
2299 net_dev->ethtool_ops = &efx_ethtool_ops;
2300 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2304 /* Enable resets to be scheduled and check whether any were
2305 * already requested. If so, the NIC is probably hosed so we
2308 efx->state = STATE_READY;
2309 smp_mb(); /* ensure we change state before checking reset_pending */
2310 if (efx->reset_pending) {
2311 netif_err(efx, probe, efx->net_dev,
2312 "aborting probe due to scheduled reset\n");
2317 rc = dev_alloc_name(net_dev, net_dev->name);
2320 efx_update_name(efx);
2322 /* Always start with carrier off; PHY events will detect the link */
2323 netif_carrier_off(net_dev);
2325 rc = register_netdevice(net_dev);
2329 efx_for_each_channel(channel, efx) {
2330 struct efx_tx_queue *tx_queue;
2331 efx_for_each_channel_tx_queue(tx_queue, channel)
2332 efx_init_tx_queue_core_txq(tx_queue);
2339 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2341 netif_err(efx, drv, efx->net_dev,
2342 "failed to init net dev attributes\n");
2343 goto fail_registered;
2350 efx_dissociate(efx);
2351 unregister_netdevice(net_dev);
2353 efx->state = STATE_UNINIT;
2355 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2359 static void efx_unregister_netdev(struct efx_nic *efx)
2364 BUG_ON(netdev_priv(efx->net_dev) != efx);
2366 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2367 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2370 unregister_netdevice(efx->net_dev);
2371 efx->state = STATE_UNINIT;
2375 /**************************************************************************
2377 * Device reset and suspend
2379 **************************************************************************/
2381 /* Tears down the entire software state and most of the hardware state
2383 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2385 EFX_ASSERT_RESET_SERIALISED(efx);
2387 if (method == RESET_TYPE_MCDI_TIMEOUT)
2388 efx->type->prepare_flr(efx);
2391 efx_disable_interrupts(efx);
2393 mutex_lock(&efx->mac_lock);
2394 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2395 efx->phy_op->fini(efx);
2396 efx->type->fini(efx);
2399 /* This function will always ensure that the locks acquired in
2400 * efx_reset_down() are released. A failure return code indicates
2401 * that we were unable to reinitialise the hardware, and the
2402 * driver should be disabled. If ok is false, then the rx and tx
2403 * engines are not restarted, pending a RESET_DISABLE. */
2404 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2408 EFX_ASSERT_RESET_SERIALISED(efx);
2410 if (method == RESET_TYPE_MCDI_TIMEOUT)
2411 efx->type->finish_flr(efx);
2413 /* Ensure that SRAM is initialised even if we're disabling the device */
2414 rc = efx->type->init(efx);
2416 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2423 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2424 rc = efx->phy_op->init(efx);
2427 if (efx->phy_op->reconfigure(efx))
2428 netif_err(efx, drv, efx->net_dev,
2429 "could not restore PHY settings\n");
2432 rc = efx_enable_interrupts(efx);
2435 efx_restore_filters(efx);
2436 efx_sriov_reset(efx);
2438 mutex_unlock(&efx->mac_lock);
2445 efx->port_initialized = false;
2447 mutex_unlock(&efx->mac_lock);
2452 /* Reset the NIC using the specified method. Note that the reset may
2453 * fail, in which case the card will be left in an unusable state.
2455 * Caller must hold the rtnl_lock.
2457 int efx_reset(struct efx_nic *efx, enum reset_type method)
2462 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2463 RESET_TYPE(method));
2465 efx_device_detach_sync(efx);
2466 efx_reset_down(efx, method);
2468 rc = efx->type->reset(efx, method);
2470 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2474 /* Clear flags for the scopes we covered. We assume the NIC and
2475 * driver are now quiescent so that there is no race here.
2477 if (method < RESET_TYPE_MAX_METHOD)
2478 efx->reset_pending &= -(1 << (method + 1));
2479 else /* it doesn't fit into the well-ordered scope hierarchy */
2480 __clear_bit(method, &efx->reset_pending);
2482 /* Reinitialise bus-mastering, which may have been turned off before
2483 * the reset was scheduled. This is still appropriate, even in the
2484 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2485 * can respond to requests. */
2486 pci_set_master(efx->pci_dev);
2489 /* Leave device stopped if necessary */
2491 method == RESET_TYPE_DISABLE ||
2492 method == RESET_TYPE_RECOVER_OR_DISABLE;
2493 rc2 = efx_reset_up(efx, method, !disabled);
2501 dev_close(efx->net_dev);
2502 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2503 efx->state = STATE_DISABLED;
2505 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2506 netif_device_attach(efx->net_dev);
2511 /* Try recovery mechanisms.
2512 * For now only EEH is supported.
2513 * Returns 0 if the recovery mechanisms are unsuccessful.
2514 * Returns a non-zero value otherwise.
2516 int efx_try_recovery(struct efx_nic *efx)
2519 /* A PCI error can occur and not be seen by EEH because nothing
2520 * happens on the PCI bus. In this case the driver may fail and
2521 * schedule a 'recover or reset', leading to this recovery handler.
2522 * Manually call the eeh failure check function.
2524 struct eeh_dev *eehdev =
2525 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2527 if (eeh_dev_check_failure(eehdev)) {
2528 /* The EEH mechanisms will handle the error and reset the
2529 * device if necessary.
2537 static void efx_wait_for_bist_end(struct efx_nic *efx)
2541 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2542 if (efx_mcdi_poll_reboot(efx))
2544 msleep(BIST_WAIT_DELAY_MS);
2547 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2549 /* Either way unset the BIST flag. If we found no reboot we probably
2550 * won't recover, but we should try.
2552 efx->mc_bist_for_other_fn = false;
2555 /* The worker thread exists so that code that cannot sleep can
2556 * schedule a reset for later.
2558 static void efx_reset_work(struct work_struct *data)
2560 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2561 unsigned long pending;
2562 enum reset_type method;
2564 pending = ACCESS_ONCE(efx->reset_pending);
2565 method = fls(pending) - 1;
2567 if (method == RESET_TYPE_MC_BIST)
2568 efx_wait_for_bist_end(efx);
2570 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2571 method == RESET_TYPE_RECOVER_OR_ALL) &&
2572 efx_try_recovery(efx))
2580 /* We checked the state in efx_schedule_reset() but it may
2581 * have changed by now. Now that we have the RTNL lock,
2582 * it cannot change again.
2584 if (efx->state == STATE_READY)
2585 (void)efx_reset(efx, method);
2590 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2592 enum reset_type method;
2594 if (efx->state == STATE_RECOVERY) {
2595 netif_dbg(efx, drv, efx->net_dev,
2596 "recovering: skip scheduling %s reset\n",
2602 case RESET_TYPE_INVISIBLE:
2603 case RESET_TYPE_ALL:
2604 case RESET_TYPE_RECOVER_OR_ALL:
2605 case RESET_TYPE_WORLD:
2606 case RESET_TYPE_DISABLE:
2607 case RESET_TYPE_RECOVER_OR_DISABLE:
2608 case RESET_TYPE_MC_BIST:
2609 case RESET_TYPE_MCDI_TIMEOUT:
2611 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2612 RESET_TYPE(method));
2615 method = efx->type->map_reset_reason(type);
2616 netif_dbg(efx, drv, efx->net_dev,
2617 "scheduling %s reset for %s\n",
2618 RESET_TYPE(method), RESET_TYPE(type));
2622 set_bit(method, &efx->reset_pending);
2623 smp_mb(); /* ensure we change reset_pending before checking state */
2625 /* If we're not READY then just leave the flags set as the cue
2626 * to abort probing or reschedule the reset later.
2628 if (ACCESS_ONCE(efx->state) != STATE_READY)
2631 /* efx_process_channel() will no longer read events once a
2632 * reset is scheduled. So switch back to poll'd MCDI completions. */
2633 efx_mcdi_mode_poll(efx);
2635 queue_work(reset_workqueue, &efx->reset_work);
2638 /**************************************************************************
2640 * List of NICs we support
2642 **************************************************************************/
2644 /* PCI device ID table */
2645 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2646 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2647 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2648 .driver_data = (unsigned long) &falcon_a1_nic_type},
2649 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2650 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2651 .driver_data = (unsigned long) &falcon_b0_nic_type},
2652 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2653 .driver_data = (unsigned long) &siena_a0_nic_type},
2654 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2655 .driver_data = (unsigned long) &siena_a0_nic_type},
2656 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2657 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2658 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
2659 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2660 {0} /* end of list */
2663 /**************************************************************************
2665 * Dummy PHY/MAC operations
2667 * Can be used for some unimplemented operations
2668 * Needed so all function pointers are valid and do not have to be tested
2671 **************************************************************************/
2672 int efx_port_dummy_op_int(struct efx_nic *efx)
2676 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2678 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2683 static const struct efx_phy_operations efx_dummy_phy_operations = {
2684 .init = efx_port_dummy_op_int,
2685 .reconfigure = efx_port_dummy_op_int,
2686 .poll = efx_port_dummy_op_poll,
2687 .fini = efx_port_dummy_op_void,
2690 /**************************************************************************
2694 **************************************************************************/
2696 /* This zeroes out and then fills in the invariants in a struct
2697 * efx_nic (including all sub-structures).
2699 static int efx_init_struct(struct efx_nic *efx,
2700 struct pci_dev *pci_dev, struct net_device *net_dev)
2704 /* Initialise common structures */
2705 INIT_LIST_HEAD(&efx->node);
2706 INIT_LIST_HEAD(&efx->secondary_list);
2707 spin_lock_init(&efx->biu_lock);
2708 #ifdef CONFIG_SFC_MTD
2709 INIT_LIST_HEAD(&efx->mtd_list);
2711 INIT_WORK(&efx->reset_work, efx_reset_work);
2712 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2713 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2714 efx->pci_dev = pci_dev;
2715 efx->msg_enable = debug;
2716 efx->state = STATE_UNINIT;
2717 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2719 efx->net_dev = net_dev;
2720 efx->rx_prefix_size = efx->type->rx_prefix_size;
2722 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2723 efx->rx_packet_hash_offset =
2724 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2725 efx->rx_packet_ts_offset =
2726 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2727 spin_lock_init(&efx->stats_lock);
2728 mutex_init(&efx->mac_lock);
2729 efx->phy_op = &efx_dummy_phy_operations;
2730 efx->mdio.dev = net_dev;
2731 INIT_WORK(&efx->mac_work, efx_mac_work);
2732 init_waitqueue_head(&efx->flush_wq);
2734 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2735 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2736 if (!efx->channel[i])
2738 efx->msi_context[i].efx = efx;
2739 efx->msi_context[i].index = i;
2742 /* Higher numbered interrupt modes are less capable! */
2743 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2746 /* Would be good to use the net_dev name, but we're too early */
2747 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2749 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2750 if (!efx->workqueue)
2756 efx_fini_struct(efx);
2760 static void efx_fini_struct(struct efx_nic *efx)
2764 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2765 kfree(efx->channel[i]);
2769 if (efx->workqueue) {
2770 destroy_workqueue(efx->workqueue);
2771 efx->workqueue = NULL;
2775 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
2777 u64 n_rx_nodesc_trunc = 0;
2778 struct efx_channel *channel;
2780 efx_for_each_channel(channel, efx)
2781 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
2782 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
2783 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
2786 /**************************************************************************
2790 **************************************************************************/
2792 /* Main body of final NIC shutdown code
2793 * This is called only at module unload (or hotplug removal).
2795 static void efx_pci_remove_main(struct efx_nic *efx)
2797 /* Flush reset_work. It can no longer be scheduled since we
2800 BUG_ON(efx->state == STATE_READY);
2801 cancel_work_sync(&efx->reset_work);
2803 efx_disable_interrupts(efx);
2804 efx_nic_fini_interrupt(efx);
2806 efx->type->fini(efx);
2808 efx_remove_all(efx);
2811 /* Final NIC shutdown
2812 * This is called only at module unload (or hotplug removal).
2814 static void efx_pci_remove(struct pci_dev *pci_dev)
2816 struct efx_nic *efx;
2818 efx = pci_get_drvdata(pci_dev);
2822 /* Mark the NIC as fini, then stop the interface */
2824 efx_dissociate(efx);
2825 dev_close(efx->net_dev);
2826 efx_disable_interrupts(efx);
2829 efx_sriov_fini(efx);
2830 efx_unregister_netdev(efx);
2832 efx_mtd_remove(efx);
2834 efx_pci_remove_main(efx);
2837 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2839 efx_fini_struct(efx);
2840 free_netdev(efx->net_dev);
2842 pci_disable_pcie_error_reporting(pci_dev);
2845 /* NIC VPD information
2846 * Called during probe to display the part number of the
2847 * installed NIC. VPD is potentially very large but this should
2848 * always appear within the first 512 bytes.
2850 #define SFC_VPD_LEN 512
2851 static void efx_probe_vpd_strings(struct efx_nic *efx)
2853 struct pci_dev *dev = efx->pci_dev;
2854 char vpd_data[SFC_VPD_LEN];
2856 int ro_start, ro_size, i, j;
2858 /* Get the vpd data from the device */
2859 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2860 if (vpd_size <= 0) {
2861 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2865 /* Get the Read only section */
2866 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2868 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2872 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
2874 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2875 if (i + j > vpd_size)
2878 /* Get the Part number */
2879 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2881 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2885 j = pci_vpd_info_field_size(&vpd_data[i]);
2886 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2887 if (i + j > vpd_size) {
2888 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2892 netif_info(efx, drv, efx->net_dev,
2893 "Part Number : %.*s\n", j, &vpd_data[i]);
2895 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2897 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
2899 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
2903 j = pci_vpd_info_field_size(&vpd_data[i]);
2904 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2905 if (i + j > vpd_size) {
2906 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
2910 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
2914 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
2918 /* Main body of NIC initialisation
2919 * This is called at module load (or hotplug insertion, theoretically).
2921 static int efx_pci_probe_main(struct efx_nic *efx)
2925 /* Do start-of-day initialisation */
2926 rc = efx_probe_all(efx);
2932 rc = efx->type->init(efx);
2934 netif_err(efx, probe, efx->net_dev,
2935 "failed to initialise NIC\n");
2939 rc = efx_init_port(efx);
2941 netif_err(efx, probe, efx->net_dev,
2942 "failed to initialise port\n");
2946 rc = efx_nic_init_interrupt(efx);
2949 rc = efx_enable_interrupts(efx);
2956 efx_nic_fini_interrupt(efx);
2960 efx->type->fini(efx);
2963 efx_remove_all(efx);
2968 /* NIC initialisation
2970 * This is called at module load (or hotplug insertion,
2971 * theoretically). It sets up PCI mappings, resets the NIC,
2972 * sets up and registers the network devices with the kernel and hooks
2973 * the interrupt service routine. It does not prepare the device for
2974 * transmission; this is left to the first time one of the network
2975 * interfaces is brought up (i.e. efx_net_open).
2977 static int efx_pci_probe(struct pci_dev *pci_dev,
2978 const struct pci_device_id *entry)
2980 struct net_device *net_dev;
2981 struct efx_nic *efx;
2984 /* Allocate and initialise a struct net_device and struct efx_nic */
2985 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2989 efx = netdev_priv(net_dev);
2990 efx->type = (const struct efx_nic_type *) entry->driver_data;
2991 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2992 NETIF_F_HIGHDMA | NETIF_F_TSO |
2994 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2995 net_dev->features |= NETIF_F_TSO6;
2996 /* Mask for features that also apply to VLAN devices */
2997 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2998 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3000 /* All offloads can be toggled */
3001 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
3002 pci_set_drvdata(pci_dev, efx);
3003 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3004 rc = efx_init_struct(efx, pci_dev, net_dev);
3008 netif_info(efx, probe, efx->net_dev,
3009 "Solarflare NIC detected\n");
3011 efx_probe_vpd_strings(efx);
3013 /* Set up basic I/O (BAR mappings etc) */
3014 rc = efx_init_io(efx);
3018 rc = efx_pci_probe_main(efx);
3022 rc = efx_register_netdev(efx);
3026 rc = efx_sriov_init(efx);
3028 netif_err(efx, probe, efx->net_dev,
3029 "SR-IOV can't be enabled rc %d\n", rc);
3031 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3033 /* Try to create MTDs, but allow this to fail */
3035 rc = efx_mtd_probe(efx);
3038 netif_warn(efx, probe, efx->net_dev,
3039 "failed to create MTDs (%d)\n", rc);
3041 rc = pci_enable_pcie_error_reporting(pci_dev);
3042 if (rc && rc != -EINVAL)
3043 netif_warn(efx, probe, efx->net_dev,
3044 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
3049 efx_pci_remove_main(efx);
3053 efx_fini_struct(efx);
3056 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3057 free_netdev(net_dev);
3061 static int efx_pm_freeze(struct device *dev)
3063 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3067 if (efx->state != STATE_DISABLED) {
3068 efx->state = STATE_UNINIT;
3070 efx_device_detach_sync(efx);
3073 efx_disable_interrupts(efx);
3081 static int efx_pm_thaw(struct device *dev)
3084 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3088 if (efx->state != STATE_DISABLED) {
3089 rc = efx_enable_interrupts(efx);
3093 mutex_lock(&efx->mac_lock);
3094 efx->phy_op->reconfigure(efx);
3095 mutex_unlock(&efx->mac_lock);
3099 netif_device_attach(efx->net_dev);
3101 efx->state = STATE_READY;
3103 efx->type->resume_wol(efx);
3108 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3109 queue_work(reset_workqueue, &efx->reset_work);
3119 static int efx_pm_poweroff(struct device *dev)
3121 struct pci_dev *pci_dev = to_pci_dev(dev);
3122 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3124 efx->type->fini(efx);
3126 efx->reset_pending = 0;
3128 pci_save_state(pci_dev);
3129 return pci_set_power_state(pci_dev, PCI_D3hot);
3132 /* Used for both resume and restore */
3133 static int efx_pm_resume(struct device *dev)
3135 struct pci_dev *pci_dev = to_pci_dev(dev);
3136 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3139 rc = pci_set_power_state(pci_dev, PCI_D0);
3142 pci_restore_state(pci_dev);
3143 rc = pci_enable_device(pci_dev);
3146 pci_set_master(efx->pci_dev);
3147 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3150 rc = efx->type->init(efx);
3153 rc = efx_pm_thaw(dev);
3157 static int efx_pm_suspend(struct device *dev)
3162 rc = efx_pm_poweroff(dev);
3168 static const struct dev_pm_ops efx_pm_ops = {
3169 .suspend = efx_pm_suspend,
3170 .resume = efx_pm_resume,
3171 .freeze = efx_pm_freeze,
3172 .thaw = efx_pm_thaw,
3173 .poweroff = efx_pm_poweroff,
3174 .restore = efx_pm_resume,
3177 /* A PCI error affecting this device was detected.
3178 * At this point MMIO and DMA may be disabled.
3179 * Stop the software path and request a slot reset.
3181 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3182 enum pci_channel_state state)
3184 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3185 struct efx_nic *efx = pci_get_drvdata(pdev);
3187 if (state == pci_channel_io_perm_failure)
3188 return PCI_ERS_RESULT_DISCONNECT;
3192 if (efx->state != STATE_DISABLED) {
3193 efx->state = STATE_RECOVERY;
3194 efx->reset_pending = 0;
3196 efx_device_detach_sync(efx);
3199 efx_disable_interrupts(efx);
3201 status = PCI_ERS_RESULT_NEED_RESET;
3203 /* If the interface is disabled we don't want to do anything
3206 status = PCI_ERS_RESULT_RECOVERED;
3211 pci_disable_device(pdev);
3216 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
3217 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3219 struct efx_nic *efx = pci_get_drvdata(pdev);
3220 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3223 if (pci_enable_device(pdev)) {
3224 netif_err(efx, hw, efx->net_dev,
3225 "Cannot re-enable PCI device after reset.\n");
3226 status = PCI_ERS_RESULT_DISCONNECT;
3229 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3231 netif_err(efx, hw, efx->net_dev,
3232 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3233 /* Non-fatal error. Continue. */
3239 /* Perform the actual reset and resume I/O operations. */
3240 static void efx_io_resume(struct pci_dev *pdev)
3242 struct efx_nic *efx = pci_get_drvdata(pdev);
3247 if (efx->state == STATE_DISABLED)
3250 rc = efx_reset(efx, RESET_TYPE_ALL);
3252 netif_err(efx, hw, efx->net_dev,
3253 "efx_reset failed after PCI error (%d)\n", rc);
3255 efx->state = STATE_READY;
3256 netif_dbg(efx, hw, efx->net_dev,
3257 "Done resetting and resuming IO after PCI error.\n");
3264 /* For simplicity and reliability, we always require a slot reset and try to
3265 * reset the hardware when a pci error affecting the device is detected.
3266 * We leave both the link_reset and mmio_enabled callback unimplemented:
3267 * with our request for slot reset the mmio_enabled callback will never be
3268 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3270 static struct pci_error_handlers efx_err_handlers = {
3271 .error_detected = efx_io_error_detected,
3272 .slot_reset = efx_io_slot_reset,
3273 .resume = efx_io_resume,
3276 static struct pci_driver efx_pci_driver = {
3277 .name = KBUILD_MODNAME,
3278 .id_table = efx_pci_table,
3279 .probe = efx_pci_probe,
3280 .remove = efx_pci_remove,
3281 .driver.pm = &efx_pm_ops,
3282 .err_handler = &efx_err_handlers,
3285 /**************************************************************************
3287 * Kernel module interface
3289 *************************************************************************/
3291 module_param(interrupt_mode, uint, 0444);
3292 MODULE_PARM_DESC(interrupt_mode,
3293 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3295 static int __init efx_init_module(void)
3299 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3301 rc = register_netdevice_notifier(&efx_netdev_notifier);
3305 rc = efx_init_sriov();
3309 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3310 if (!reset_workqueue) {
3315 rc = pci_register_driver(&efx_pci_driver);
3322 destroy_workqueue(reset_workqueue);
3326 unregister_netdevice_notifier(&efx_netdev_notifier);
3331 static void __exit efx_exit_module(void)
3333 printk(KERN_INFO "Solarflare NET driver unloading\n");
3335 pci_unregister_driver(&efx_pci_driver);
3336 destroy_workqueue(reset_workqueue);
3338 unregister_netdevice_notifier(&efx_netdev_notifier);
3342 module_init(efx_init_module);
3343 module_exit(efx_exit_module);
3345 MODULE_AUTHOR("Solarflare Communications and "
3346 "Michael Brown <mbrown@fensystems.co.uk>");
3347 MODULE_DESCRIPTION("Solarflare network driver");
3348 MODULE_LICENSE("GPL");
3349 MODULE_DEVICE_TABLE(pci, efx_pci_table);