1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_WORLD] = "WORLD",
77 [RESET_TYPE_DISABLE] = "DISABLE",
78 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
79 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
80 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
81 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
82 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
83 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
84 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
87 #define EFX_MAX_MTU (9 * 1024)
89 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
90 * queued onto this work queue. This is not a per-nic work queue, because
91 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
93 static struct workqueue_struct *reset_workqueue;
95 /**************************************************************************
99 *************************************************************************/
102 * Use separate channels for TX and RX events
104 * Set this to 1 to use separate channels for TX and RX. It allows us
105 * to control interrupt affinity separately for TX and RX.
107 * This is only used in MSI-X interrupt mode
109 static unsigned int separate_tx_channels;
110 module_param(separate_tx_channels, uint, 0444);
111 MODULE_PARM_DESC(separate_tx_channels,
112 "Use separate channels for TX and RX");
114 /* This is the weight assigned to each of the (per-channel) virtual
117 static int napi_weight = 64;
119 /* This is the time (in jiffies) between invocations of the hardware
120 * monitor. On Falcon-based NICs, this will:
121 * - Check the on-board hardware monitor;
122 * - Poll the link state and reconfigure the hardware as necessary.
124 static unsigned int efx_monitor_interval = 1 * HZ;
126 /* Initial interrupt moderation settings. They can be modified after
127 * module load with ethtool.
129 * The default for RX should strike a balance between increasing the
130 * round-trip latency and reducing overhead.
132 static unsigned int rx_irq_mod_usec = 60;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * This default is chosen to ensure that a 10G link does not go idle
138 * while a TX queue is stopped after it has become full. A queue is
139 * restarted when it drops below half full. The time this takes (assuming
140 * worst case 3 descriptors per packet and 1024 descriptors) is
141 * 512 / 3 * 1.2 = 205 usec.
143 static unsigned int tx_irq_mod_usec = 150;
145 /* This is the first interrupt mode to try out of:
150 static unsigned int interrupt_mode;
152 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
153 * i.e. the number of CPUs among which we may distribute simultaneous
154 * interrupt handling.
156 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
157 * The default (0) means to assign an interrupt to each core.
159 static unsigned int rss_cpus;
160 module_param(rss_cpus, uint, 0444);
161 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
163 static int phy_flash_cfg;
164 module_param(phy_flash_cfg, int, 0644);
165 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
167 static unsigned irq_adapt_low_thresh = 8000;
168 module_param(irq_adapt_low_thresh, uint, 0644);
169 MODULE_PARM_DESC(irq_adapt_low_thresh,
170 "Threshold score for reducing IRQ moderation");
172 static unsigned irq_adapt_high_thresh = 16000;
173 module_param(irq_adapt_high_thresh, uint, 0644);
174 MODULE_PARM_DESC(irq_adapt_high_thresh,
175 "Threshold score for increasing IRQ moderation");
177 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
178 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
179 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
180 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
181 module_param(debug, uint, 0);
182 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
184 /**************************************************************************
186 * Utility functions and prototypes
188 *************************************************************************/
190 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq);
191 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq);
192 static void efx_remove_channel(struct efx_channel *channel);
193 static void efx_remove_channels(struct efx_nic *efx);
194 static const struct efx_channel_type efx_default_channel_type;
195 static void efx_remove_port(struct efx_nic *efx);
196 static void efx_init_napi_channel(struct efx_channel *channel);
197 static void efx_fini_napi(struct efx_nic *efx);
198 static void efx_fini_napi_channel(struct efx_channel *channel);
199 static void efx_fini_struct(struct efx_nic *efx);
200 static void efx_start_all(struct efx_nic *efx);
201 static void efx_stop_all(struct efx_nic *efx);
203 #define EFX_ASSERT_RESET_SERIALISED(efx) \
205 if ((efx->state == STATE_RUNNING) || \
206 (efx->state == STATE_DISABLED)) \
210 /**************************************************************************
212 * Event queue processing
214 *************************************************************************/
216 /* Process channel's event queue
218 * This function is responsible for processing the event queue of a
219 * single channel. The caller must guarantee that this function will
220 * never be concurrently called more than once on the same channel,
221 * though different channels may be being processed concurrently.
223 static int efx_process_channel(struct efx_channel *channel, int budget)
227 if (unlikely(!channel->enabled))
230 spent = efx_nic_process_eventq(channel, budget);
231 if (spent && efx_channel_has_rx_queue(channel)) {
232 struct efx_rx_queue *rx_queue =
233 efx_channel_get_rx_queue(channel);
235 /* Deliver last RX packet. */
236 if (channel->rx_pkt) {
237 __efx_rx_packet(channel, channel->rx_pkt);
238 channel->rx_pkt = NULL;
240 if (rx_queue->enabled) {
241 efx_rx_strategy(channel);
242 efx_fast_push_rx_descriptors(rx_queue);
249 /* Mark channel as finished processing
251 * Note that since we will not receive further interrupts for this
252 * channel before we finish processing and call the eventq_read_ack()
253 * method, there is no need to use the interrupt hold-off timers.
255 static inline void efx_channel_processed(struct efx_channel *channel)
257 /* The interrupt handler for this channel may set work_pending
258 * as soon as we acknowledge the events we've seen. Make sure
259 * it's cleared before then. */
260 channel->work_pending = false;
263 efx_nic_eventq_read_ack(channel);
268 * NAPI guarantees serialisation of polls of the same device, which
269 * provides the guarantee required by efx_process_channel().
271 static int efx_poll(struct napi_struct *napi, int budget)
273 struct efx_channel *channel =
274 container_of(napi, struct efx_channel, napi_str);
275 struct efx_nic *efx = channel->efx;
278 netif_vdbg(efx, intr, efx->net_dev,
279 "channel %d NAPI poll executing on CPU %d\n",
280 channel->channel, raw_smp_processor_id());
282 spent = efx_process_channel(channel, budget);
284 if (spent < budget) {
285 if (efx_channel_has_rx_queue(channel) &&
286 efx->irq_rx_adaptive &&
287 unlikely(++channel->irq_count == 1000)) {
288 if (unlikely(channel->irq_mod_score <
289 irq_adapt_low_thresh)) {
290 if (channel->irq_moderation > 1) {
291 channel->irq_moderation -= 1;
292 efx->type->push_irq_moderation(channel);
294 } else if (unlikely(channel->irq_mod_score >
295 irq_adapt_high_thresh)) {
296 if (channel->irq_moderation <
297 efx->irq_rx_moderation) {
298 channel->irq_moderation += 1;
299 efx->type->push_irq_moderation(channel);
302 channel->irq_count = 0;
303 channel->irq_mod_score = 0;
306 efx_filter_rfs_expire(channel);
308 /* There is no race here; although napi_disable() will
309 * only wait for napi_complete(), this isn't a problem
310 * since efx_channel_processed() will have no effect if
311 * interrupts have already been disabled.
314 efx_channel_processed(channel);
320 /* Process the eventq of the specified channel immediately on this CPU
322 * Disable hardware generated interrupts, wait for any existing
323 * processing to finish, then directly poll (and ack ) the eventq.
324 * Finally reenable NAPI and interrupts.
326 * This is for use only during a loopback self-test. It must not
327 * deliver any packets up the stack as this can result in deadlock.
329 void efx_process_channel_now(struct efx_channel *channel)
331 struct efx_nic *efx = channel->efx;
333 BUG_ON(channel->channel >= efx->n_channels);
334 BUG_ON(!channel->enabled);
335 BUG_ON(!efx->loopback_selftest);
337 /* Disable interrupts and wait for ISRs to complete */
338 efx_nic_disable_interrupts(efx);
339 if (efx->legacy_irq) {
340 synchronize_irq(efx->legacy_irq);
341 efx->legacy_irq_enabled = false;
344 synchronize_irq(channel->irq);
346 /* Wait for any NAPI processing to complete */
347 napi_disable(&channel->napi_str);
349 /* Poll the channel */
350 efx_process_channel(channel, channel->eventq_mask + 1);
352 /* Ack the eventq. This may cause an interrupt to be generated
353 * when they are reenabled */
354 efx_channel_processed(channel);
356 napi_enable(&channel->napi_str);
358 efx->legacy_irq_enabled = true;
359 efx_nic_enable_interrupts(efx);
362 /* Create event queue
363 * Event queue memory allocations are done only once. If the channel
364 * is reset, the memory buffer will be reused; this guards against
365 * errors during channel reset and also simplifies interrupt handling.
367 static int efx_probe_eventq(struct efx_channel *channel)
369 struct efx_nic *efx = channel->efx;
370 unsigned long entries;
372 netif_dbg(efx, probe, efx->net_dev,
373 "chan %d create event queue\n", channel->channel);
375 /* Build an event queue with room for one event per tx and rx buffer,
376 * plus some extra for link state events and MCDI completions. */
377 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
378 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
379 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
381 return efx_nic_probe_eventq(channel);
384 /* Prepare channel's event queue */
385 static void efx_init_eventq(struct efx_channel *channel)
387 netif_dbg(channel->efx, drv, channel->efx->net_dev,
388 "chan %d init event queue\n", channel->channel);
390 channel->eventq_read_ptr = 0;
392 efx_nic_init_eventq(channel);
395 /* Enable event queue processing and NAPI */
396 static void efx_start_eventq(struct efx_channel *channel)
398 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
399 "chan %d start event queue\n", channel->channel);
401 /* The interrupt handler for this channel may set work_pending
402 * as soon as we enable it. Make sure it's cleared before
403 * then. Similarly, make sure it sees the enabled flag set.
405 channel->work_pending = false;
406 channel->enabled = true;
409 napi_enable(&channel->napi_str);
410 efx_nic_eventq_read_ack(channel);
413 /* Disable event queue processing and NAPI */
414 static void efx_stop_eventq(struct efx_channel *channel)
416 if (!channel->enabled)
419 napi_disable(&channel->napi_str);
420 channel->enabled = false;
423 static void efx_fini_eventq(struct efx_channel *channel)
425 netif_dbg(channel->efx, drv, channel->efx->net_dev,
426 "chan %d fini event queue\n", channel->channel);
428 efx_nic_fini_eventq(channel);
431 static void efx_remove_eventq(struct efx_channel *channel)
433 netif_dbg(channel->efx, drv, channel->efx->net_dev,
434 "chan %d remove event queue\n", channel->channel);
436 efx_nic_remove_eventq(channel);
439 /**************************************************************************
443 *************************************************************************/
445 /* Allocate and initialise a channel structure. */
446 static struct efx_channel *
447 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
449 struct efx_channel *channel;
450 struct efx_rx_queue *rx_queue;
451 struct efx_tx_queue *tx_queue;
454 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
459 channel->channel = i;
460 channel->type = &efx_default_channel_type;
462 for (j = 0; j < EFX_TXQ_TYPES; j++) {
463 tx_queue = &channel->tx_queue[j];
465 tx_queue->queue = i * EFX_TXQ_TYPES + j;
466 tx_queue->channel = channel;
469 rx_queue = &channel->rx_queue;
471 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
472 (unsigned long)rx_queue);
477 /* Allocate and initialise a channel structure, copying parameters
478 * (but not resources) from an old channel structure.
480 static struct efx_channel *
481 efx_copy_channel(const struct efx_channel *old_channel)
483 struct efx_channel *channel;
484 struct efx_rx_queue *rx_queue;
485 struct efx_tx_queue *tx_queue;
488 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
492 *channel = *old_channel;
494 channel->napi_dev = NULL;
495 memset(&channel->eventq, 0, sizeof(channel->eventq));
497 for (j = 0; j < EFX_TXQ_TYPES; j++) {
498 tx_queue = &channel->tx_queue[j];
499 if (tx_queue->channel)
500 tx_queue->channel = channel;
501 tx_queue->buffer = NULL;
502 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
505 rx_queue = &channel->rx_queue;
506 rx_queue->buffer = NULL;
507 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
508 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
509 (unsigned long)rx_queue);
514 static int efx_probe_channel(struct efx_channel *channel)
516 struct efx_tx_queue *tx_queue;
517 struct efx_rx_queue *rx_queue;
520 netif_dbg(channel->efx, probe, channel->efx->net_dev,
521 "creating channel %d\n", channel->channel);
523 rc = channel->type->pre_probe(channel);
527 rc = efx_probe_eventq(channel);
531 efx_for_each_channel_tx_queue(tx_queue, channel) {
532 rc = efx_probe_tx_queue(tx_queue);
537 efx_for_each_channel_rx_queue(rx_queue, channel) {
538 rc = efx_probe_rx_queue(rx_queue);
543 channel->n_rx_frm_trunc = 0;
548 efx_remove_channel(channel);
553 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
555 struct efx_nic *efx = channel->efx;
559 number = channel->channel;
560 if (efx->tx_channel_offset == 0) {
562 } else if (channel->channel < efx->tx_channel_offset) {
566 number -= efx->tx_channel_offset;
568 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
571 static void efx_set_channel_names(struct efx_nic *efx)
573 struct efx_channel *channel;
575 efx_for_each_channel(channel, efx)
576 channel->type->get_name(channel,
577 efx->channel_name[channel->channel],
578 sizeof(efx->channel_name[0]));
581 static int efx_probe_channels(struct efx_nic *efx)
583 struct efx_channel *channel;
586 /* Restart special buffer allocation */
587 efx->next_buffer_table = 0;
589 /* Probe channels in reverse, so that any 'extra' channels
590 * use the start of the buffer table. This allows the traffic
591 * channels to be resized without moving them or wasting the
592 * entries before them.
594 efx_for_each_channel_rev(channel, efx) {
595 rc = efx_probe_channel(channel);
597 netif_err(efx, probe, efx->net_dev,
598 "failed to create channel %d\n",
603 efx_set_channel_names(efx);
608 efx_remove_channels(efx);
612 /* Channels are shutdown and reinitialised whilst the NIC is running
613 * to propagate configuration changes (mtu, checksum offload), or
614 * to clear hardware error conditions
616 static void efx_start_datapath(struct efx_nic *efx)
618 struct efx_tx_queue *tx_queue;
619 struct efx_rx_queue *rx_queue;
620 struct efx_channel *channel;
622 /* Calculate the rx buffer allocation parameters required to
623 * support the current MTU, including padding for header
624 * alignment and overruns.
626 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
627 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
628 efx->type->rx_buffer_hash_size +
629 efx->type->rx_buffer_padding);
630 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
631 sizeof(struct efx_rx_page_state));
633 /* Initialise the channels */
634 efx_for_each_channel(channel, efx) {
635 efx_for_each_channel_tx_queue(tx_queue, channel)
636 efx_init_tx_queue(tx_queue);
638 /* The rx buffer allocation strategy is MTU dependent */
639 efx_rx_strategy(channel);
641 efx_for_each_channel_rx_queue(rx_queue, channel) {
642 efx_init_rx_queue(rx_queue);
643 efx_nic_generate_fill_event(rx_queue);
646 WARN_ON(channel->rx_pkt != NULL);
647 efx_rx_strategy(channel);
650 if (netif_device_present(efx->net_dev))
651 netif_tx_wake_all_queues(efx->net_dev);
654 static void efx_stop_datapath(struct efx_nic *efx)
656 struct efx_channel *channel;
657 struct efx_tx_queue *tx_queue;
658 struct efx_rx_queue *rx_queue;
661 EFX_ASSERT_RESET_SERIALISED(efx);
662 BUG_ON(efx->port_enabled);
664 rc = efx_nic_flush_queues(efx);
665 if (rc && EFX_WORKAROUND_7803(efx)) {
666 /* Schedule a reset to recover from the flush failure. The
667 * descriptor caches reference memory we're about to free,
668 * but falcon_reconfigure_mac_wrapper() won't reconnect
669 * the MACs because of the pending reset. */
670 netif_err(efx, drv, efx->net_dev,
671 "Resetting to recover from flush failure\n");
672 efx_schedule_reset(efx, RESET_TYPE_ALL);
674 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
676 netif_dbg(efx, drv, efx->net_dev,
677 "successfully flushed all queues\n");
680 efx_for_each_channel(channel, efx) {
681 /* RX packet processing is pipelined, so wait for the
682 * NAPI handler to complete. At least event queue 0
683 * might be kept active by non-data events, so don't
684 * use napi_synchronize() but actually disable NAPI
687 if (efx_channel_has_rx_queue(channel)) {
688 efx_stop_eventq(channel);
689 efx_start_eventq(channel);
692 efx_for_each_channel_rx_queue(rx_queue, channel)
693 efx_fini_rx_queue(rx_queue);
694 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
695 efx_fini_tx_queue(tx_queue);
699 static void efx_remove_channel(struct efx_channel *channel)
701 struct efx_tx_queue *tx_queue;
702 struct efx_rx_queue *rx_queue;
704 netif_dbg(channel->efx, drv, channel->efx->net_dev,
705 "destroy chan %d\n", channel->channel);
707 efx_for_each_channel_rx_queue(rx_queue, channel)
708 efx_remove_rx_queue(rx_queue);
709 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
710 efx_remove_tx_queue(tx_queue);
711 efx_remove_eventq(channel);
714 static void efx_remove_channels(struct efx_nic *efx)
716 struct efx_channel *channel;
718 efx_for_each_channel(channel, efx)
719 efx_remove_channel(channel);
723 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
725 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
726 u32 old_rxq_entries, old_txq_entries;
727 unsigned i, next_buffer_table = 0;
730 /* Not all channels should be reallocated. We must avoid
731 * reallocating their buffer table entries.
733 efx_for_each_channel(channel, efx) {
734 struct efx_rx_queue *rx_queue;
735 struct efx_tx_queue *tx_queue;
737 if (channel->type->copy)
739 next_buffer_table = max(next_buffer_table,
740 channel->eventq.index +
741 channel->eventq.entries);
742 efx_for_each_channel_rx_queue(rx_queue, channel)
743 next_buffer_table = max(next_buffer_table,
744 rx_queue->rxd.index +
745 rx_queue->rxd.entries);
746 efx_for_each_channel_tx_queue(tx_queue, channel)
747 next_buffer_table = max(next_buffer_table,
748 tx_queue->txd.index +
749 tx_queue->txd.entries);
753 efx_stop_interrupts(efx, true);
755 /* Clone channels (where possible) */
756 memset(other_channel, 0, sizeof(other_channel));
757 for (i = 0; i < efx->n_channels; i++) {
758 channel = efx->channel[i];
759 if (channel->type->copy)
760 channel = channel->type->copy(channel);
765 other_channel[i] = channel;
768 /* Swap entry counts and channel pointers */
769 old_rxq_entries = efx->rxq_entries;
770 old_txq_entries = efx->txq_entries;
771 efx->rxq_entries = rxq_entries;
772 efx->txq_entries = txq_entries;
773 for (i = 0; i < efx->n_channels; i++) {
774 channel = efx->channel[i];
775 efx->channel[i] = other_channel[i];
776 other_channel[i] = channel;
779 /* Restart buffer table allocation */
780 efx->next_buffer_table = next_buffer_table;
782 for (i = 0; i < efx->n_channels; i++) {
783 channel = efx->channel[i];
784 if (!channel->type->copy)
786 rc = efx_probe_channel(channel);
789 efx_init_napi_channel(efx->channel[i]);
793 /* Destroy unused channel structures */
794 for (i = 0; i < efx->n_channels; i++) {
795 channel = other_channel[i];
796 if (channel && channel->type->copy) {
797 efx_fini_napi_channel(channel);
798 efx_remove_channel(channel);
803 efx_start_interrupts(efx, true);
809 efx->rxq_entries = old_rxq_entries;
810 efx->txq_entries = old_txq_entries;
811 for (i = 0; i < efx->n_channels; i++) {
812 channel = efx->channel[i];
813 efx->channel[i] = other_channel[i];
814 other_channel[i] = channel;
819 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
821 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
824 static const struct efx_channel_type efx_default_channel_type = {
825 .pre_probe = efx_channel_dummy_op_int,
826 .get_name = efx_get_channel_name,
827 .copy = efx_copy_channel,
828 .keep_eventq = false,
831 int efx_channel_dummy_op_int(struct efx_channel *channel)
836 /**************************************************************************
840 **************************************************************************/
842 /* This ensures that the kernel is kept informed (via
843 * netif_carrier_on/off) of the link status, and also maintains the
844 * link status's stop on the port's TX queue.
846 void efx_link_status_changed(struct efx_nic *efx)
848 struct efx_link_state *link_state = &efx->link_state;
850 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
851 * that no events are triggered between unregister_netdev() and the
852 * driver unloading. A more general condition is that NETDEV_CHANGE
853 * can only be generated between NETDEV_UP and NETDEV_DOWN */
854 if (!netif_running(efx->net_dev))
857 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
858 efx->n_link_state_changes++;
861 netif_carrier_on(efx->net_dev);
863 netif_carrier_off(efx->net_dev);
866 /* Status message for kernel log */
868 netif_info(efx, link, efx->net_dev,
869 "link up at %uMbps %s-duplex (MTU %d)%s\n",
870 link_state->speed, link_state->fd ? "full" : "half",
872 (efx->promiscuous ? " [PROMISC]" : ""));
874 netif_info(efx, link, efx->net_dev, "link down\n");
877 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
879 efx->link_advertising = advertising;
881 if (advertising & ADVERTISED_Pause)
882 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
884 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
885 if (advertising & ADVERTISED_Asym_Pause)
886 efx->wanted_fc ^= EFX_FC_TX;
890 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
892 efx->wanted_fc = wanted_fc;
893 if (efx->link_advertising) {
894 if (wanted_fc & EFX_FC_RX)
895 efx->link_advertising |= (ADVERTISED_Pause |
896 ADVERTISED_Asym_Pause);
898 efx->link_advertising &= ~(ADVERTISED_Pause |
899 ADVERTISED_Asym_Pause);
900 if (wanted_fc & EFX_FC_TX)
901 efx->link_advertising ^= ADVERTISED_Asym_Pause;
905 static void efx_fini_port(struct efx_nic *efx);
907 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
908 * the MAC appropriately. All other PHY configuration changes are pushed
909 * through phy_op->set_settings(), and pushed asynchronously to the MAC
910 * through efx_monitor().
912 * Callers must hold the mac_lock
914 int __efx_reconfigure_port(struct efx_nic *efx)
916 enum efx_phy_mode phy_mode;
919 WARN_ON(!mutex_is_locked(&efx->mac_lock));
921 /* Serialise the promiscuous flag with efx_set_rx_mode. */
922 netif_addr_lock_bh(efx->net_dev);
923 netif_addr_unlock_bh(efx->net_dev);
925 /* Disable PHY transmit in mac level loopbacks */
926 phy_mode = efx->phy_mode;
927 if (LOOPBACK_INTERNAL(efx))
928 efx->phy_mode |= PHY_MODE_TX_DISABLED;
930 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
932 rc = efx->type->reconfigure_port(efx);
935 efx->phy_mode = phy_mode;
940 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
942 int efx_reconfigure_port(struct efx_nic *efx)
946 EFX_ASSERT_RESET_SERIALISED(efx);
948 mutex_lock(&efx->mac_lock);
949 rc = __efx_reconfigure_port(efx);
950 mutex_unlock(&efx->mac_lock);
955 /* Asynchronous work item for changing MAC promiscuity and multicast
956 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
958 static void efx_mac_work(struct work_struct *data)
960 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
962 mutex_lock(&efx->mac_lock);
963 if (efx->port_enabled)
964 efx->type->reconfigure_mac(efx);
965 mutex_unlock(&efx->mac_lock);
968 static int efx_probe_port(struct efx_nic *efx)
972 netif_dbg(efx, probe, efx->net_dev, "create port\n");
975 efx->phy_mode = PHY_MODE_SPECIAL;
977 /* Connect up MAC/PHY operations table */
978 rc = efx->type->probe_port(efx);
982 /* Initialise MAC address to permanent address */
983 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
988 static int efx_init_port(struct efx_nic *efx)
992 netif_dbg(efx, drv, efx->net_dev, "init port\n");
994 mutex_lock(&efx->mac_lock);
996 rc = efx->phy_op->init(efx);
1000 efx->port_initialized = true;
1002 /* Reconfigure the MAC before creating dma queues (required for
1003 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1004 efx->type->reconfigure_mac(efx);
1006 /* Ensure the PHY advertises the correct flow control settings */
1007 rc = efx->phy_op->reconfigure(efx);
1011 mutex_unlock(&efx->mac_lock);
1015 efx->phy_op->fini(efx);
1017 mutex_unlock(&efx->mac_lock);
1021 static void efx_start_port(struct efx_nic *efx)
1023 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1024 BUG_ON(efx->port_enabled);
1026 mutex_lock(&efx->mac_lock);
1027 efx->port_enabled = true;
1029 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1030 * and then cancelled by efx_flush_all() */
1031 efx->type->reconfigure_mac(efx);
1033 mutex_unlock(&efx->mac_lock);
1036 /* Prevent efx_mac_work() and efx_monitor() from working */
1037 static void efx_stop_port(struct efx_nic *efx)
1039 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1041 mutex_lock(&efx->mac_lock);
1042 efx->port_enabled = false;
1043 mutex_unlock(&efx->mac_lock);
1045 /* Serialise against efx_set_multicast_list() */
1046 netif_addr_lock_bh(efx->net_dev);
1047 netif_addr_unlock_bh(efx->net_dev);
1050 static void efx_fini_port(struct efx_nic *efx)
1052 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1054 if (!efx->port_initialized)
1057 efx->phy_op->fini(efx);
1058 efx->port_initialized = false;
1060 efx->link_state.up = false;
1061 efx_link_status_changed(efx);
1064 static void efx_remove_port(struct efx_nic *efx)
1066 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1068 efx->type->remove_port(efx);
1071 /**************************************************************************
1075 **************************************************************************/
1077 /* This configures the PCI device to enable I/O and DMA. */
1078 static int efx_init_io(struct efx_nic *efx)
1080 struct pci_dev *pci_dev = efx->pci_dev;
1081 dma_addr_t dma_mask = efx->type->max_dma_mask;
1084 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1086 rc = pci_enable_device(pci_dev);
1088 netif_err(efx, probe, efx->net_dev,
1089 "failed to enable PCI device\n");
1093 pci_set_master(pci_dev);
1095 /* Set the PCI DMA mask. Try all possibilities from our
1096 * genuine mask down to 32 bits, because some architectures
1097 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1098 * masks event though they reject 46 bit masks.
1100 while (dma_mask > 0x7fffffffUL) {
1101 if (pci_dma_supported(pci_dev, dma_mask)) {
1102 rc = pci_set_dma_mask(pci_dev, dma_mask);
1109 netif_err(efx, probe, efx->net_dev,
1110 "could not find a suitable DMA mask\n");
1113 netif_dbg(efx, probe, efx->net_dev,
1114 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1115 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1117 /* pci_set_consistent_dma_mask() is not *allowed* to
1118 * fail with a mask that pci_set_dma_mask() accepted,
1119 * but just in case...
1121 netif_err(efx, probe, efx->net_dev,
1122 "failed to set consistent DMA mask\n");
1126 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1127 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1129 netif_err(efx, probe, efx->net_dev,
1130 "request for memory BAR failed\n");
1134 efx->membase = ioremap_nocache(efx->membase_phys,
1135 efx->type->mem_map_size);
1136 if (!efx->membase) {
1137 netif_err(efx, probe, efx->net_dev,
1138 "could not map memory BAR at %llx+%x\n",
1139 (unsigned long long)efx->membase_phys,
1140 efx->type->mem_map_size);
1144 netif_dbg(efx, probe, efx->net_dev,
1145 "memory BAR at %llx+%x (virtual %p)\n",
1146 (unsigned long long)efx->membase_phys,
1147 efx->type->mem_map_size, efx->membase);
1152 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1154 efx->membase_phys = 0;
1156 pci_disable_device(efx->pci_dev);
1161 static void efx_fini_io(struct efx_nic *efx)
1163 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1166 iounmap(efx->membase);
1167 efx->membase = NULL;
1170 if (efx->membase_phys) {
1171 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1172 efx->membase_phys = 0;
1175 pci_disable_device(efx->pci_dev);
1178 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1180 cpumask_var_t thread_mask;
1187 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1188 netif_warn(efx, probe, efx->net_dev,
1189 "RSS disabled due to allocation failure\n");
1194 for_each_online_cpu(cpu) {
1195 if (!cpumask_test_cpu(cpu, thread_mask)) {
1197 cpumask_or(thread_mask, thread_mask,
1198 topology_thread_cpumask(cpu));
1202 free_cpumask_var(thread_mask);
1205 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1206 * table entries that are inaccessible to VFs
1208 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1209 count > efx_vf_size(efx)) {
1210 netif_warn(efx, probe, efx->net_dev,
1211 "Reducing number of RSS channels from %u to %u for "
1212 "VF support. Increase vf-msix-limit to use more "
1213 "channels on the PF.\n",
1214 count, efx_vf_size(efx));
1215 count = efx_vf_size(efx);
1222 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1224 #ifdef CONFIG_RFS_ACCEL
1228 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1229 if (!efx->net_dev->rx_cpu_rmap)
1231 for (i = 0; i < efx->n_rx_channels; i++) {
1232 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1233 xentries[i].vector);
1235 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1236 efx->net_dev->rx_cpu_rmap = NULL;
1244 /* Probe the number and type of interrupts we are able to obtain, and
1245 * the resulting numbers of channels and RX queues.
1247 static int efx_probe_interrupts(struct efx_nic *efx)
1249 unsigned int max_channels =
1250 min(efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1251 unsigned int extra_channels = 0;
1255 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1256 if (efx->extra_channel_type[i])
1259 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1260 struct msix_entry xentries[EFX_MAX_CHANNELS];
1261 unsigned int n_channels;
1263 n_channels = efx_wanted_parallelism(efx);
1264 if (separate_tx_channels)
1266 n_channels += extra_channels;
1267 n_channels = min(n_channels, max_channels);
1269 for (i = 0; i < n_channels; i++)
1270 xentries[i].entry = i;
1271 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1273 netif_err(efx, drv, efx->net_dev,
1274 "WARNING: Insufficient MSI-X vectors"
1275 " available (%d < %u).\n", rc, n_channels);
1276 netif_err(efx, drv, efx->net_dev,
1277 "WARNING: Performance may be reduced.\n");
1278 EFX_BUG_ON_PARANOID(rc >= n_channels);
1280 rc = pci_enable_msix(efx->pci_dev, xentries,
1285 efx->n_channels = n_channels;
1286 if (n_channels > extra_channels)
1287 n_channels -= extra_channels;
1288 if (separate_tx_channels) {
1289 efx->n_tx_channels = max(n_channels / 2, 1U);
1290 efx->n_rx_channels = max(n_channels -
1294 efx->n_tx_channels = n_channels;
1295 efx->n_rx_channels = n_channels;
1297 rc = efx_init_rx_cpu_rmap(efx, xentries);
1299 pci_disable_msix(efx->pci_dev);
1302 for (i = 0; i < efx->n_channels; i++)
1303 efx_get_channel(efx, i)->irq =
1306 /* Fall back to single channel MSI */
1307 efx->interrupt_mode = EFX_INT_MODE_MSI;
1308 netif_err(efx, drv, efx->net_dev,
1309 "could not enable MSI-X\n");
1313 /* Try single interrupt MSI */
1314 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1315 efx->n_channels = 1;
1316 efx->n_rx_channels = 1;
1317 efx->n_tx_channels = 1;
1318 rc = pci_enable_msi(efx->pci_dev);
1320 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1322 netif_err(efx, drv, efx->net_dev,
1323 "could not enable MSI\n");
1324 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1328 /* Assume legacy interrupts */
1329 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1330 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1331 efx->n_rx_channels = 1;
1332 efx->n_tx_channels = 1;
1333 efx->legacy_irq = efx->pci_dev->irq;
1336 /* Assign extra channels if possible */
1337 j = efx->n_channels;
1338 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1339 if (!efx->extra_channel_type[i])
1341 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1342 efx->n_channels <= extra_channels) {
1343 efx->extra_channel_type[i]->handle_no_channel(efx);
1346 efx_get_channel(efx, j)->type =
1347 efx->extra_channel_type[i];
1351 /* RSS might be usable on VFs even if it is disabled on the PF */
1352 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1353 efx->n_rx_channels : efx_vf_size(efx));
1358 /* Enable interrupts, then probe and start the event queues */
1359 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1361 struct efx_channel *channel;
1363 if (efx->legacy_irq)
1364 efx->legacy_irq_enabled = true;
1365 efx_nic_enable_interrupts(efx);
1367 efx_for_each_channel(channel, efx) {
1368 if (!channel->type->keep_eventq || !may_keep_eventq)
1369 efx_init_eventq(channel);
1370 efx_start_eventq(channel);
1373 efx_mcdi_mode_event(efx);
1376 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1378 struct efx_channel *channel;
1380 efx_mcdi_mode_poll(efx);
1382 efx_nic_disable_interrupts(efx);
1383 if (efx->legacy_irq) {
1384 synchronize_irq(efx->legacy_irq);
1385 efx->legacy_irq_enabled = false;
1388 efx_for_each_channel(channel, efx) {
1390 synchronize_irq(channel->irq);
1392 efx_stop_eventq(channel);
1393 if (!channel->type->keep_eventq || !may_keep_eventq)
1394 efx_fini_eventq(channel);
1398 static void efx_remove_interrupts(struct efx_nic *efx)
1400 struct efx_channel *channel;
1402 /* Remove MSI/MSI-X interrupts */
1403 efx_for_each_channel(channel, efx)
1405 pci_disable_msi(efx->pci_dev);
1406 pci_disable_msix(efx->pci_dev);
1408 /* Remove legacy interrupt */
1409 efx->legacy_irq = 0;
1412 static void efx_set_channels(struct efx_nic *efx)
1414 struct efx_channel *channel;
1415 struct efx_tx_queue *tx_queue;
1417 efx->tx_channel_offset =
1418 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1420 /* We need to adjust the TX queue numbers if we have separate
1421 * RX-only and TX-only channels.
1423 efx_for_each_channel(channel, efx) {
1424 efx_for_each_channel_tx_queue(tx_queue, channel)
1425 tx_queue->queue -= (efx->tx_channel_offset *
1430 static int efx_probe_nic(struct efx_nic *efx)
1435 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1437 /* Carry out hardware-type specific initialisation */
1438 rc = efx->type->probe(efx);
1442 /* Determine the number of channels and queues by trying to hook
1443 * in MSI-X interrupts. */
1444 rc = efx_probe_interrupts(efx);
1448 efx->type->dimension_resources(efx);
1450 if (efx->n_channels > 1)
1451 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1452 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1453 efx->rx_indir_table[i] =
1454 ethtool_rxfh_indir_default(i, efx->rss_spread);
1456 efx_set_channels(efx);
1457 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1458 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1460 /* Initialise the interrupt moderation settings */
1461 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1467 efx->type->remove(efx);
1471 static void efx_remove_nic(struct efx_nic *efx)
1473 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1475 efx_remove_interrupts(efx);
1476 efx->type->remove(efx);
1479 /**************************************************************************
1481 * NIC startup/shutdown
1483 *************************************************************************/
1485 static int efx_probe_all(struct efx_nic *efx)
1489 rc = efx_probe_nic(efx);
1491 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1495 rc = efx_probe_port(efx);
1497 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1501 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1503 rc = efx_probe_filters(efx);
1505 netif_err(efx, probe, efx->net_dev,
1506 "failed to create filter tables\n");
1510 rc = efx_probe_channels(efx);
1517 efx_remove_filters(efx);
1519 efx_remove_port(efx);
1521 efx_remove_nic(efx);
1526 /* Called after previous invocation(s) of efx_stop_all, restarts the port,
1527 * kernel transmit queues and NAPI processing, and ensures that the port is
1528 * scheduled to be reconfigured. This function is safe to call multiple
1529 * times when the NIC is in any state.
1531 static void efx_start_all(struct efx_nic *efx)
1533 EFX_ASSERT_RESET_SERIALISED(efx);
1535 /* Check that it is appropriate to restart the interface. All
1536 * of these flags are safe to read under just the rtnl lock */
1537 if (efx->port_enabled)
1539 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1541 if (!netif_running(efx->net_dev))
1544 efx_start_port(efx);
1545 efx_start_datapath(efx);
1547 /* Start the hardware monitor if there is one. Otherwise (we're link
1548 * event driven), we have to poll the PHY because after an event queue
1549 * flush, we could have a missed a link state change */
1550 if (efx->type->monitor != NULL) {
1551 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1552 efx_monitor_interval);
1554 mutex_lock(&efx->mac_lock);
1555 if (efx->phy_op->poll(efx))
1556 efx_link_status_changed(efx);
1557 mutex_unlock(&efx->mac_lock);
1560 efx->type->start_stats(efx);
1563 /* Flush all delayed work. Should only be called when no more delayed work
1564 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1565 * since we're holding the rtnl_lock at this point. */
1566 static void efx_flush_all(struct efx_nic *efx)
1568 /* Make sure the hardware monitor and event self-test are stopped */
1569 cancel_delayed_work_sync(&efx->monitor_work);
1570 efx_selftest_async_cancel(efx);
1571 /* Stop scheduled port reconfigurations */
1572 cancel_work_sync(&efx->mac_work);
1575 /* Quiesce hardware and software without bringing the link down.
1576 * Safe to call multiple times, when the nic and interface is in any
1577 * state. The caller is guaranteed to subsequently be in a position
1578 * to modify any hardware and software state they see fit without
1580 static void efx_stop_all(struct efx_nic *efx)
1582 EFX_ASSERT_RESET_SERIALISED(efx);
1584 /* port_enabled can be read safely under the rtnl lock */
1585 if (!efx->port_enabled)
1588 efx->type->stop_stats(efx);
1591 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1594 /* Stop the kernel transmit interface late, so the watchdog
1595 * timer isn't ticking over the flush */
1596 netif_tx_disable(efx->net_dev);
1598 efx_stop_datapath(efx);
1601 static void efx_remove_all(struct efx_nic *efx)
1603 efx_remove_channels(efx);
1604 efx_remove_filters(efx);
1605 efx_remove_port(efx);
1606 efx_remove_nic(efx);
1609 /**************************************************************************
1611 * Interrupt moderation
1613 **************************************************************************/
1615 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1619 if (usecs * 1000 < quantum_ns)
1620 return 1; /* never round down to 0 */
1621 return usecs * 1000 / quantum_ns;
1624 /* Set interrupt moderation parameters */
1625 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1626 unsigned int rx_usecs, bool rx_adaptive,
1627 bool rx_may_override_tx)
1629 struct efx_channel *channel;
1630 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1631 efx->timer_quantum_ns,
1633 unsigned int tx_ticks;
1634 unsigned int rx_ticks;
1636 EFX_ASSERT_RESET_SERIALISED(efx);
1638 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1641 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1642 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1644 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1645 !rx_may_override_tx) {
1646 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1647 "RX and TX IRQ moderation must be equal\n");
1651 efx->irq_rx_adaptive = rx_adaptive;
1652 efx->irq_rx_moderation = rx_ticks;
1653 efx_for_each_channel(channel, efx) {
1654 if (efx_channel_has_rx_queue(channel))
1655 channel->irq_moderation = rx_ticks;
1656 else if (efx_channel_has_tx_queues(channel))
1657 channel->irq_moderation = tx_ticks;
1663 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1664 unsigned int *rx_usecs, bool *rx_adaptive)
1666 /* We must round up when converting ticks to microseconds
1667 * because we round down when converting the other way.
1670 *rx_adaptive = efx->irq_rx_adaptive;
1671 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1672 efx->timer_quantum_ns,
1675 /* If channels are shared between RX and TX, so is IRQ
1676 * moderation. Otherwise, IRQ moderation is the same for all
1677 * TX channels and is not adaptive.
1679 if (efx->tx_channel_offset == 0)
1680 *tx_usecs = *rx_usecs;
1682 *tx_usecs = DIV_ROUND_UP(
1683 efx->channel[efx->tx_channel_offset]->irq_moderation *
1684 efx->timer_quantum_ns,
1688 /**************************************************************************
1692 **************************************************************************/
1694 /* Run periodically off the general workqueue */
1695 static void efx_monitor(struct work_struct *data)
1697 struct efx_nic *efx = container_of(data, struct efx_nic,
1700 netif_vdbg(efx, timer, efx->net_dev,
1701 "hardware monitor executing on CPU %d\n",
1702 raw_smp_processor_id());
1703 BUG_ON(efx->type->monitor == NULL);
1705 /* If the mac_lock is already held then it is likely a port
1706 * reconfiguration is already in place, which will likely do
1707 * most of the work of monitor() anyway. */
1708 if (mutex_trylock(&efx->mac_lock)) {
1709 if (efx->port_enabled)
1710 efx->type->monitor(efx);
1711 mutex_unlock(&efx->mac_lock);
1714 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1715 efx_monitor_interval);
1718 /**************************************************************************
1722 *************************************************************************/
1725 * Context: process, rtnl_lock() held.
1727 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1729 struct efx_nic *efx = netdev_priv(net_dev);
1730 struct mii_ioctl_data *data = if_mii(ifr);
1732 EFX_ASSERT_RESET_SERIALISED(efx);
1734 /* Convert phy_id from older PRTAD/DEVAD format */
1735 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1736 (data->phy_id & 0xfc00) == 0x0400)
1737 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1739 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1742 /**************************************************************************
1746 **************************************************************************/
1748 static void efx_init_napi_channel(struct efx_channel *channel)
1750 struct efx_nic *efx = channel->efx;
1752 channel->napi_dev = efx->net_dev;
1753 netif_napi_add(channel->napi_dev, &channel->napi_str,
1754 efx_poll, napi_weight);
1757 static void efx_init_napi(struct efx_nic *efx)
1759 struct efx_channel *channel;
1761 efx_for_each_channel(channel, efx)
1762 efx_init_napi_channel(channel);
1765 static void efx_fini_napi_channel(struct efx_channel *channel)
1767 if (channel->napi_dev)
1768 netif_napi_del(&channel->napi_str);
1769 channel->napi_dev = NULL;
1772 static void efx_fini_napi(struct efx_nic *efx)
1774 struct efx_channel *channel;
1776 efx_for_each_channel(channel, efx)
1777 efx_fini_napi_channel(channel);
1780 /**************************************************************************
1782 * Kernel netpoll interface
1784 *************************************************************************/
1786 #ifdef CONFIG_NET_POLL_CONTROLLER
1788 /* Although in the common case interrupts will be disabled, this is not
1789 * guaranteed. However, all our work happens inside the NAPI callback,
1790 * so no locking is required.
1792 static void efx_netpoll(struct net_device *net_dev)
1794 struct efx_nic *efx = netdev_priv(net_dev);
1795 struct efx_channel *channel;
1797 efx_for_each_channel(channel, efx)
1798 efx_schedule_channel(channel);
1803 /**************************************************************************
1805 * Kernel net device interface
1807 *************************************************************************/
1809 /* Context: process, rtnl_lock() held. */
1810 static int efx_net_open(struct net_device *net_dev)
1812 struct efx_nic *efx = netdev_priv(net_dev);
1813 EFX_ASSERT_RESET_SERIALISED(efx);
1815 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1816 raw_smp_processor_id());
1818 if (efx->state == STATE_DISABLED)
1820 if (efx->phy_mode & PHY_MODE_SPECIAL)
1822 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1825 /* Notify the kernel of the link state polled during driver load,
1826 * before the monitor starts running */
1827 efx_link_status_changed(efx);
1830 efx_selftest_async_start(efx);
1834 /* Context: process, rtnl_lock() held.
1835 * Note that the kernel will ignore our return code; this method
1836 * should really be a void.
1838 static int efx_net_stop(struct net_device *net_dev)
1840 struct efx_nic *efx = netdev_priv(net_dev);
1842 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1843 raw_smp_processor_id());
1845 if (efx->state != STATE_DISABLED) {
1846 /* Stop the device and flush all the channels */
1853 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1854 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1855 struct rtnl_link_stats64 *stats)
1857 struct efx_nic *efx = netdev_priv(net_dev);
1858 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1860 spin_lock_bh(&efx->stats_lock);
1862 efx->type->update_stats(efx);
1864 stats->rx_packets = mac_stats->rx_packets;
1865 stats->tx_packets = mac_stats->tx_packets;
1866 stats->rx_bytes = mac_stats->rx_bytes;
1867 stats->tx_bytes = mac_stats->tx_bytes;
1868 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1869 stats->multicast = mac_stats->rx_multicast;
1870 stats->collisions = mac_stats->tx_collision;
1871 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1872 mac_stats->rx_length_error);
1873 stats->rx_crc_errors = mac_stats->rx_bad;
1874 stats->rx_frame_errors = mac_stats->rx_align_error;
1875 stats->rx_fifo_errors = mac_stats->rx_overflow;
1876 stats->rx_missed_errors = mac_stats->rx_missed;
1877 stats->tx_window_errors = mac_stats->tx_late_collision;
1879 stats->rx_errors = (stats->rx_length_errors +
1880 stats->rx_crc_errors +
1881 stats->rx_frame_errors +
1882 mac_stats->rx_symbol_error);
1883 stats->tx_errors = (stats->tx_window_errors +
1886 spin_unlock_bh(&efx->stats_lock);
1891 /* Context: netif_tx_lock held, BHs disabled. */
1892 static void efx_watchdog(struct net_device *net_dev)
1894 struct efx_nic *efx = netdev_priv(net_dev);
1896 netif_err(efx, tx_err, efx->net_dev,
1897 "TX stuck with port_enabled=%d: resetting channels\n",
1900 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1904 /* Context: process, rtnl_lock() held. */
1905 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1907 struct efx_nic *efx = netdev_priv(net_dev);
1909 EFX_ASSERT_RESET_SERIALISED(efx);
1911 if (new_mtu > EFX_MAX_MTU)
1916 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1918 mutex_lock(&efx->mac_lock);
1919 /* Reconfigure the MAC before enabling the dma queues so that
1920 * the RX buffers don't overflow */
1921 net_dev->mtu = new_mtu;
1922 efx->type->reconfigure_mac(efx);
1923 mutex_unlock(&efx->mac_lock);
1929 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1931 struct efx_nic *efx = netdev_priv(net_dev);
1932 struct sockaddr *addr = data;
1933 char *new_addr = addr->sa_data;
1935 EFX_ASSERT_RESET_SERIALISED(efx);
1937 if (!is_valid_ether_addr(new_addr)) {
1938 netif_err(efx, drv, efx->net_dev,
1939 "invalid ethernet MAC address requested: %pM\n",
1941 return -EADDRNOTAVAIL;
1944 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1945 efx_sriov_mac_address_changed(efx);
1947 /* Reconfigure the MAC */
1948 mutex_lock(&efx->mac_lock);
1949 efx->type->reconfigure_mac(efx);
1950 mutex_unlock(&efx->mac_lock);
1955 /* Context: netif_addr_lock held, BHs disabled. */
1956 static void efx_set_rx_mode(struct net_device *net_dev)
1958 struct efx_nic *efx = netdev_priv(net_dev);
1959 struct netdev_hw_addr *ha;
1960 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1964 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1966 /* Build multicast hash table */
1967 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1968 memset(mc_hash, 0xff, sizeof(*mc_hash));
1970 memset(mc_hash, 0x00, sizeof(*mc_hash));
1971 netdev_for_each_mc_addr(ha, net_dev) {
1972 crc = ether_crc_le(ETH_ALEN, ha->addr);
1973 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1974 set_bit_le(bit, mc_hash->byte);
1977 /* Broadcast packets go through the multicast hash filter.
1978 * ether_crc_le() of the broadcast address is 0xbe2612ff
1979 * so we always add bit 0xff to the mask.
1981 set_bit_le(0xff, mc_hash->byte);
1984 if (efx->port_enabled)
1985 queue_work(efx->workqueue, &efx->mac_work);
1986 /* Otherwise efx_start_port() will do this */
1989 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
1991 struct efx_nic *efx = netdev_priv(net_dev);
1993 /* If disabling RX n-tuple filtering, clear existing filters */
1994 if (net_dev->features & ~data & NETIF_F_NTUPLE)
1995 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2000 static const struct net_device_ops efx_netdev_ops = {
2001 .ndo_open = efx_net_open,
2002 .ndo_stop = efx_net_stop,
2003 .ndo_get_stats64 = efx_net_stats,
2004 .ndo_tx_timeout = efx_watchdog,
2005 .ndo_start_xmit = efx_hard_start_xmit,
2006 .ndo_validate_addr = eth_validate_addr,
2007 .ndo_do_ioctl = efx_ioctl,
2008 .ndo_change_mtu = efx_change_mtu,
2009 .ndo_set_mac_address = efx_set_mac_address,
2010 .ndo_set_rx_mode = efx_set_rx_mode,
2011 .ndo_set_features = efx_set_features,
2012 #ifdef CONFIG_SFC_SRIOV
2013 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2014 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2015 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2016 .ndo_get_vf_config = efx_sriov_get_vf_config,
2018 #ifdef CONFIG_NET_POLL_CONTROLLER
2019 .ndo_poll_controller = efx_netpoll,
2021 .ndo_setup_tc = efx_setup_tc,
2022 #ifdef CONFIG_RFS_ACCEL
2023 .ndo_rx_flow_steer = efx_filter_rfs,
2027 static void efx_update_name(struct efx_nic *efx)
2029 strcpy(efx->name, efx->net_dev->name);
2030 efx_mtd_rename(efx);
2031 efx_set_channel_names(efx);
2034 static int efx_netdev_event(struct notifier_block *this,
2035 unsigned long event, void *ptr)
2037 struct net_device *net_dev = ptr;
2039 if (net_dev->netdev_ops == &efx_netdev_ops &&
2040 event == NETDEV_CHANGENAME)
2041 efx_update_name(netdev_priv(net_dev));
2046 static struct notifier_block efx_netdev_notifier = {
2047 .notifier_call = efx_netdev_event,
2051 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2053 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2054 return sprintf(buf, "%d\n", efx->phy_type);
2056 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
2058 static int efx_register_netdev(struct efx_nic *efx)
2060 struct net_device *net_dev = efx->net_dev;
2061 struct efx_channel *channel;
2064 net_dev->watchdog_timeo = 5 * HZ;
2065 net_dev->irq = efx->pci_dev->irq;
2066 net_dev->netdev_ops = &efx_netdev_ops;
2067 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2071 rc = dev_alloc_name(net_dev, net_dev->name);
2074 efx_update_name(efx);
2076 rc = register_netdevice(net_dev);
2080 efx_for_each_channel(channel, efx) {
2081 struct efx_tx_queue *tx_queue;
2082 efx_for_each_channel_tx_queue(tx_queue, channel)
2083 efx_init_tx_queue_core_txq(tx_queue);
2086 /* Always start with carrier off; PHY events will detect the link */
2087 netif_carrier_off(net_dev);
2091 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2093 netif_err(efx, drv, efx->net_dev,
2094 "failed to init net dev attributes\n");
2095 goto fail_registered;
2102 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2106 unregister_netdev(net_dev);
2110 static void efx_unregister_netdev(struct efx_nic *efx)
2112 struct efx_channel *channel;
2113 struct efx_tx_queue *tx_queue;
2118 BUG_ON(netdev_priv(efx->net_dev) != efx);
2120 /* Free up any skbs still remaining. This has to happen before
2121 * we try to unregister the netdev as running their destructors
2122 * may be needed to get the device ref. count to 0. */
2123 efx_for_each_channel(channel, efx) {
2124 efx_for_each_channel_tx_queue(tx_queue, channel)
2125 efx_release_tx_buffers(tx_queue);
2128 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2129 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2130 unregister_netdev(efx->net_dev);
2133 /**************************************************************************
2135 * Device reset and suspend
2137 **************************************************************************/
2139 /* Tears down the entire software state and most of the hardware state
2141 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2143 EFX_ASSERT_RESET_SERIALISED(efx);
2146 mutex_lock(&efx->mac_lock);
2148 efx_stop_interrupts(efx, false);
2149 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2150 efx->phy_op->fini(efx);
2151 efx->type->fini(efx);
2154 /* This function will always ensure that the locks acquired in
2155 * efx_reset_down() are released. A failure return code indicates
2156 * that we were unable to reinitialise the hardware, and the
2157 * driver should be disabled. If ok is false, then the rx and tx
2158 * engines are not restarted, pending a RESET_DISABLE. */
2159 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2163 EFX_ASSERT_RESET_SERIALISED(efx);
2165 rc = efx->type->init(efx);
2167 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2174 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2175 rc = efx->phy_op->init(efx);
2178 if (efx->phy_op->reconfigure(efx))
2179 netif_err(efx, drv, efx->net_dev,
2180 "could not restore PHY settings\n");
2183 efx->type->reconfigure_mac(efx);
2185 efx_start_interrupts(efx, false);
2186 efx_restore_filters(efx);
2187 efx_sriov_reset(efx);
2189 mutex_unlock(&efx->mac_lock);
2196 efx->port_initialized = false;
2198 mutex_unlock(&efx->mac_lock);
2203 /* Reset the NIC using the specified method. Note that the reset may
2204 * fail, in which case the card will be left in an unusable state.
2206 * Caller must hold the rtnl_lock.
2208 int efx_reset(struct efx_nic *efx, enum reset_type method)
2213 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2214 RESET_TYPE(method));
2216 netif_device_detach(efx->net_dev);
2217 efx_reset_down(efx, method);
2219 rc = efx->type->reset(efx, method);
2221 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2225 /* Clear flags for the scopes we covered. We assume the NIC and
2226 * driver are now quiescent so that there is no race here.
2228 efx->reset_pending &= -(1 << (method + 1));
2230 /* Reinitialise bus-mastering, which may have been turned off before
2231 * the reset was scheduled. This is still appropriate, even in the
2232 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2233 * can respond to requests. */
2234 pci_set_master(efx->pci_dev);
2237 /* Leave device stopped if necessary */
2238 disabled = rc || method == RESET_TYPE_DISABLE;
2239 rc2 = efx_reset_up(efx, method, !disabled);
2247 dev_close(efx->net_dev);
2248 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2249 efx->state = STATE_DISABLED;
2251 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2252 netif_device_attach(efx->net_dev);
2257 /* The worker thread exists so that code that cannot sleep can
2258 * schedule a reset for later.
2260 static void efx_reset_work(struct work_struct *data)
2262 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2263 unsigned long pending = ACCESS_ONCE(efx->reset_pending);
2268 /* If we're not RUNNING then don't reset. Leave the reset_pending
2269 * flags set so that efx_pci_probe_main will be retried */
2270 if (efx->state != STATE_RUNNING) {
2271 netif_info(efx, drv, efx->net_dev,
2272 "scheduled reset quenched. NIC not RUNNING\n");
2277 (void)efx_reset(efx, fls(pending) - 1);
2281 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2283 enum reset_type method;
2286 case RESET_TYPE_INVISIBLE:
2287 case RESET_TYPE_ALL:
2288 case RESET_TYPE_WORLD:
2289 case RESET_TYPE_DISABLE:
2291 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2292 RESET_TYPE(method));
2295 method = efx->type->map_reset_reason(type);
2296 netif_dbg(efx, drv, efx->net_dev,
2297 "scheduling %s reset for %s\n",
2298 RESET_TYPE(method), RESET_TYPE(type));
2302 set_bit(method, &efx->reset_pending);
2304 /* efx_process_channel() will no longer read events once a
2305 * reset is scheduled. So switch back to poll'd MCDI completions. */
2306 efx_mcdi_mode_poll(efx);
2308 queue_work(reset_workqueue, &efx->reset_work);
2311 /**************************************************************************
2313 * List of NICs we support
2315 **************************************************************************/
2317 /* PCI device ID table */
2318 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2319 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2320 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2321 .driver_data = (unsigned long) &falcon_a1_nic_type},
2322 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2323 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2324 .driver_data = (unsigned long) &falcon_b0_nic_type},
2325 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2326 .driver_data = (unsigned long) &siena_a0_nic_type},
2327 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2328 .driver_data = (unsigned long) &siena_a0_nic_type},
2329 {0} /* end of list */
2332 /**************************************************************************
2334 * Dummy PHY/MAC operations
2336 * Can be used for some unimplemented operations
2337 * Needed so all function pointers are valid and do not have to be tested
2340 **************************************************************************/
2341 int efx_port_dummy_op_int(struct efx_nic *efx)
2345 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2347 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2352 static const struct efx_phy_operations efx_dummy_phy_operations = {
2353 .init = efx_port_dummy_op_int,
2354 .reconfigure = efx_port_dummy_op_int,
2355 .poll = efx_port_dummy_op_poll,
2356 .fini = efx_port_dummy_op_void,
2359 /**************************************************************************
2363 **************************************************************************/
2365 /* This zeroes out and then fills in the invariants in a struct
2366 * efx_nic (including all sub-structures).
2368 static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
2369 struct pci_dev *pci_dev, struct net_device *net_dev)
2373 /* Initialise common structures */
2374 memset(efx, 0, sizeof(*efx));
2375 spin_lock_init(&efx->biu_lock);
2376 #ifdef CONFIG_SFC_MTD
2377 INIT_LIST_HEAD(&efx->mtd_list);
2379 INIT_WORK(&efx->reset_work, efx_reset_work);
2380 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2381 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2382 efx->pci_dev = pci_dev;
2383 efx->msg_enable = debug;
2384 efx->state = STATE_INIT;
2385 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2387 efx->net_dev = net_dev;
2388 spin_lock_init(&efx->stats_lock);
2389 mutex_init(&efx->mac_lock);
2390 efx->phy_op = &efx_dummy_phy_operations;
2391 efx->mdio.dev = net_dev;
2392 INIT_WORK(&efx->mac_work, efx_mac_work);
2393 init_waitqueue_head(&efx->flush_wq);
2395 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2396 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2397 if (!efx->channel[i])
2403 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2405 /* Higher numbered interrupt modes are less capable! */
2406 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2409 /* Would be good to use the net_dev name, but we're too early */
2410 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2412 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2413 if (!efx->workqueue)
2419 efx_fini_struct(efx);
2423 static void efx_fini_struct(struct efx_nic *efx)
2427 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2428 kfree(efx->channel[i]);
2430 if (efx->workqueue) {
2431 destroy_workqueue(efx->workqueue);
2432 efx->workqueue = NULL;
2436 /**************************************************************************
2440 **************************************************************************/
2442 /* Main body of final NIC shutdown code
2443 * This is called only at module unload (or hotplug removal).
2445 static void efx_pci_remove_main(struct efx_nic *efx)
2447 #ifdef CONFIG_RFS_ACCEL
2448 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2449 efx->net_dev->rx_cpu_rmap = NULL;
2451 efx_stop_interrupts(efx, false);
2452 efx_nic_fini_interrupt(efx);
2454 efx->type->fini(efx);
2456 efx_remove_all(efx);
2459 /* Final NIC shutdown
2460 * This is called only at module unload (or hotplug removal).
2462 static void efx_pci_remove(struct pci_dev *pci_dev)
2464 struct efx_nic *efx;
2466 efx = pci_get_drvdata(pci_dev);
2470 /* Mark the NIC as fini, then stop the interface */
2472 efx->state = STATE_FINI;
2473 dev_close(efx->net_dev);
2475 /* Allow any queued efx_resets() to complete */
2478 efx_stop_interrupts(efx, false);
2479 efx_sriov_fini(efx);
2480 efx_unregister_netdev(efx);
2482 efx_mtd_remove(efx);
2484 /* Wait for any scheduled resets to complete. No more will be
2485 * scheduled from this point because efx_stop_all() has been
2486 * called, we are no longer registered with driverlink, and
2487 * the net_device's have been removed. */
2488 cancel_work_sync(&efx->reset_work);
2490 efx_pci_remove_main(efx);
2493 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2495 pci_set_drvdata(pci_dev, NULL);
2496 efx_fini_struct(efx);
2497 free_netdev(efx->net_dev);
2500 /* NIC VPD information
2501 * Called during probe to display the part number of the
2502 * installed NIC. VPD is potentially very large but this should
2503 * always appear within the first 512 bytes.
2505 #define SFC_VPD_LEN 512
2506 static void efx_print_product_vpd(struct efx_nic *efx)
2508 struct pci_dev *dev = efx->pci_dev;
2509 char vpd_data[SFC_VPD_LEN];
2513 /* Get the vpd data from the device */
2514 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2515 if (vpd_size <= 0) {
2516 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2520 /* Get the Read only section */
2521 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2523 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2527 j = pci_vpd_lrdt_size(&vpd_data[i]);
2528 i += PCI_VPD_LRDT_TAG_SIZE;
2529 if (i + j > vpd_size)
2532 /* Get the Part number */
2533 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2535 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2539 j = pci_vpd_info_field_size(&vpd_data[i]);
2540 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2541 if (i + j > vpd_size) {
2542 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2546 netif_info(efx, drv, efx->net_dev,
2547 "Part Number : %.*s\n", j, &vpd_data[i]);
2551 /* Main body of NIC initialisation
2552 * This is called at module load (or hotplug insertion, theoretically).
2554 static int efx_pci_probe_main(struct efx_nic *efx)
2558 /* Do start-of-day initialisation */
2559 rc = efx_probe_all(efx);
2565 rc = efx->type->init(efx);
2567 netif_err(efx, probe, efx->net_dev,
2568 "failed to initialise NIC\n");
2572 rc = efx_init_port(efx);
2574 netif_err(efx, probe, efx->net_dev,
2575 "failed to initialise port\n");
2579 rc = efx_nic_init_interrupt(efx);
2582 efx_start_interrupts(efx, false);
2589 efx->type->fini(efx);
2592 efx_remove_all(efx);
2597 /* NIC initialisation
2599 * This is called at module load (or hotplug insertion,
2600 * theoretically). It sets up PCI mappings, resets the NIC,
2601 * sets up and registers the network devices with the kernel and hooks
2602 * the interrupt service routine. It does not prepare the device for
2603 * transmission; this is left to the first time one of the network
2604 * interfaces is brought up (i.e. efx_net_open).
2606 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2607 const struct pci_device_id *entry)
2609 const struct efx_nic_type *type = (const struct efx_nic_type *) entry->driver_data;
2610 struct net_device *net_dev;
2611 struct efx_nic *efx;
2614 /* Allocate and initialise a struct net_device and struct efx_nic */
2615 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2619 net_dev->features |= (type->offload_features | NETIF_F_SG |
2620 NETIF_F_HIGHDMA | NETIF_F_TSO |
2622 if (type->offload_features & NETIF_F_V6_CSUM)
2623 net_dev->features |= NETIF_F_TSO6;
2624 /* Mask for features that also apply to VLAN devices */
2625 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2626 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2628 /* All offloads can be toggled */
2629 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2630 efx = netdev_priv(net_dev);
2631 pci_set_drvdata(pci_dev, efx);
2632 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2633 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2637 netif_info(efx, probe, efx->net_dev,
2638 "Solarflare NIC detected\n");
2640 efx_print_product_vpd(efx);
2642 /* Set up basic I/O (BAR mappings etc) */
2643 rc = efx_init_io(efx);
2647 rc = efx_pci_probe_main(efx);
2649 /* Serialise against efx_reset(). No more resets will be
2650 * scheduled since efx_stop_all() has been called, and we have
2651 * not and never have been registered.
2653 cancel_work_sync(&efx->reset_work);
2658 /* If there was a scheduled reset during probe, the NIC is
2659 * probably hosed anyway.
2661 if (efx->reset_pending) {
2666 /* Switch to the running state before we expose the device to the OS,
2667 * so that dev_open()|efx_start_all() will actually start the device */
2668 efx->state = STATE_RUNNING;
2670 rc = efx_register_netdev(efx);
2674 rc = efx_sriov_init(efx);
2676 netif_err(efx, probe, efx->net_dev,
2677 "SR-IOV can't be enabled rc %d\n", rc);
2679 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2681 /* Try to create MTDs, but allow this to fail */
2683 rc = efx_mtd_probe(efx);
2686 netif_warn(efx, probe, efx->net_dev,
2687 "failed to create MTDs (%d)\n", rc);
2692 efx_pci_remove_main(efx);
2696 efx_fini_struct(efx);
2699 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2700 free_netdev(net_dev);
2704 static int efx_pm_freeze(struct device *dev)
2706 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2708 efx->state = STATE_FINI;
2710 netif_device_detach(efx->net_dev);
2713 efx_stop_interrupts(efx, false);
2718 static int efx_pm_thaw(struct device *dev)
2720 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2722 efx->state = STATE_INIT;
2724 efx_start_interrupts(efx, false);
2726 mutex_lock(&efx->mac_lock);
2727 efx->phy_op->reconfigure(efx);
2728 mutex_unlock(&efx->mac_lock);
2732 netif_device_attach(efx->net_dev);
2734 efx->state = STATE_RUNNING;
2736 efx->type->resume_wol(efx);
2738 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2739 queue_work(reset_workqueue, &efx->reset_work);
2744 static int efx_pm_poweroff(struct device *dev)
2746 struct pci_dev *pci_dev = to_pci_dev(dev);
2747 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2749 efx->type->fini(efx);
2751 efx->reset_pending = 0;
2753 pci_save_state(pci_dev);
2754 return pci_set_power_state(pci_dev, PCI_D3hot);
2757 /* Used for both resume and restore */
2758 static int efx_pm_resume(struct device *dev)
2760 struct pci_dev *pci_dev = to_pci_dev(dev);
2761 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2764 rc = pci_set_power_state(pci_dev, PCI_D0);
2767 pci_restore_state(pci_dev);
2768 rc = pci_enable_device(pci_dev);
2771 pci_set_master(efx->pci_dev);
2772 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2775 rc = efx->type->init(efx);
2782 static int efx_pm_suspend(struct device *dev)
2787 rc = efx_pm_poweroff(dev);
2793 static const struct dev_pm_ops efx_pm_ops = {
2794 .suspend = efx_pm_suspend,
2795 .resume = efx_pm_resume,
2796 .freeze = efx_pm_freeze,
2797 .thaw = efx_pm_thaw,
2798 .poweroff = efx_pm_poweroff,
2799 .restore = efx_pm_resume,
2802 static struct pci_driver efx_pci_driver = {
2803 .name = KBUILD_MODNAME,
2804 .id_table = efx_pci_table,
2805 .probe = efx_pci_probe,
2806 .remove = efx_pci_remove,
2807 .driver.pm = &efx_pm_ops,
2810 /**************************************************************************
2812 * Kernel module interface
2814 *************************************************************************/
2816 module_param(interrupt_mode, uint, 0444);
2817 MODULE_PARM_DESC(interrupt_mode,
2818 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2820 static int __init efx_init_module(void)
2824 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2826 rc = register_netdevice_notifier(&efx_netdev_notifier);
2830 rc = efx_init_sriov();
2834 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2835 if (!reset_workqueue) {
2840 rc = pci_register_driver(&efx_pci_driver);
2847 destroy_workqueue(reset_workqueue);
2851 unregister_netdevice_notifier(&efx_netdev_notifier);
2856 static void __exit efx_exit_module(void)
2858 printk(KERN_INFO "Solarflare NET driver unloading\n");
2860 pci_unregister_driver(&efx_pci_driver);
2861 destroy_workqueue(reset_workqueue);
2863 unregister_netdevice_notifier(&efx_netdev_notifier);
2867 module_init(efx_init_module);
2868 module_exit(efx_exit_module);
2870 MODULE_AUTHOR("Solarflare Communications and "
2871 "Michael Brown <mbrown@fensystems.co.uk>");
2872 MODULE_DESCRIPTION("Solarflare Communications network driver");
2873 MODULE_LICENSE("GPL");
2874 MODULE_DEVICE_TABLE(pci, efx_pci_table);