drivers/net/ethernet/rockchip/gmac/stmmac_platform.c

   1 /*******************************************************************************
   2   This contains the functions to handle the platform driver.
   3
   4   Copyright (C) 2007-2011  STMicroelectronics Ltd
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  23 *******************************************************************************/
  24
  25 #include <linux/platform_device.h>
  26 #include <linux/io.h>
  27 #include <linux/of.h>
  28 #include <linux/of_net.h>
  29 #include <linux/gpio.h>
  30 #include <linux/of_gpio.h>
  31 #include <linux/of_device.h>
  32 #include <dt-bindings/gpio/gpio.h>
  33 #include "stmmac.h"
  34 #include <linux/rockchip/iomap.h>
  35 #include <linux/rockchip/grf.h>
  36 #include <linux/regulator/consumer.h>
  37
  38 #define grf_readl(offset)       readl_relaxed(RK_GRF_VIRT + offset)
  39 #define grf_writel(v, offset)   do { writel_relaxed(v, RK_GRF_VIRT + offset); dsb(); } while (0)
  40
  41 //RK3288_GRF_SOC_CON1
  42 //RK3128_GRF_MAC_CON1
  43 #define GMAC_PHY_INTF_SEL_RGMII ((0x01C0 << 16) | (0x0040))
  44 #define GMAC_PHY_INTF_SEL_RMII  ((0x01C0 << 16) | (0x0100))
  45 #define GMAC_FLOW_CTRL          ((0x0200 << 16) | (0x0200))
  46 #define GMAC_FLOW_CTRL_CLR      ((0x0200 << 16) | (0x0000))
  47 #define GMAC_SPEED_10M          ((0x0400 << 16) | (0x0000))
  48 #define GMAC_SPEED_100M         ((0x0400 << 16) | (0x0400))
  49 #define GMAC_RMII_CLK_25M       ((0x0800 << 16) | (0x0800))
  50 #define GMAC_RMII_CLK_2_5M      ((0x0800 << 16) | (0x0000))
  51 #define GMAC_CLK_125M           ((0x3000 << 16) | (0x0000))
  52 #define GMAC_CLK_25M            ((0x3000 << 16) | (0x3000))
  53 #define GMAC_CLK_2_5M           ((0x3000 << 16) | (0x2000))
  54 #define GMAC_RMII_MODE          ((0x4000 << 16) | (0x4000))
  55 #define GMAC_RMII_MODE_CLR      ((0x4000 << 16) | (0x0000))
  56
  57 //RK3288_GRF_SOC_CON3
  58 //RK3128_GRF_MAC_CON0
  59 #define GMAC_TXCLK_DLY_ENABLE   ((0x4000 << 16) | (0x4000))
  60 #define GMAC_TXCLK_DLY_DISABLE  ((0x4000 << 16) | (0x0000))
  61 #define GMAC_RXCLK_DLY_ENABLE   ((0x8000 << 16) | (0x8000))
  62 #define GMAC_RXCLK_DLY_DISABLE  ((0x8000 << 16) | (0x0000))
  63 #define GMAC_CLK_RX_DL_CFG(val) ((0x3F80 << 16) | (val<<7))        // 7bit
  64 #define GMAC_CLK_TX_DL_CFG(val) ((0x007F << 16) | (val))           // 7bit
  65
  66 static void SET_RGMII(int type, int tx_delay, int rx_delay)
  67 {
  68     if (type == RK3288_GMAC) {
  69         grf_writel(GMAC_PHY_INTF_SEL_RGMII, RK3288_GRF_SOC_CON1);
  70         grf_writel(GMAC_RMII_MODE_CLR, RK3288_GRF_SOC_CON1);
  71         grf_writel(GMAC_RXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
  72         grf_writel(GMAC_TXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
  73         grf_writel(GMAC_CLK_RX_DL_CFG(rx_delay), RK3288_GRF_SOC_CON3);
  74         grf_writel(GMAC_CLK_TX_DL_CFG(tx_delay), RK3288_GRF_SOC_CON3);
  75         pr_info("tx delay=0x%x\nrx delay=0x%x\n", tx_delay, rx_delay);
  76         //grf_writel(0xffffffff,RK3288_GRF_GPIO3D_E);
  77         //grf_writel(grf_readl(RK3288_GRF_GPIO4B_E) | 0x3<<2<<16 | 0x3<<2, RK3288_GRF_GPIO4B_E);
  78         //grf_writel(0xffffffff,RK3288_GRF_GPIO4A_E);
  79     } else if (type == RK312X_GMAC) {
  80         grf_writel(GMAC_PHY_INTF_SEL_RGMII, RK312X_GRF_MAC_CON1);
  81         grf_writel(GMAC_RMII_MODE_CLR, RK312X_GRF_MAC_CON1);
  82         grf_writel(GMAC_RXCLK_DLY_ENABLE, RK312X_GRF_MAC_CON0);
  83         grf_writel(GMAC_TXCLK_DLY_ENABLE, RK312X_GRF_MAC_CON0);
  84         grf_writel(GMAC_CLK_RX_DL_CFG(rx_delay), RK312X_GRF_MAC_CON0);
  85         grf_writel(GMAC_CLK_TX_DL_CFG(tx_delay), RK312X_GRF_MAC_CON0);
  86         pr_info("tx delay=0x%x\nrx delay=0x%x\n", tx_delay, rx_delay);
  87     }
  88 }
  89
  90 static void SET_RMII(int type)
  91 {
  92     if (type == RK3288_GMAC) {
  93         grf_writel(GMAC_PHY_INTF_SEL_RMII, RK3288_GRF_SOC_CON1);
  94         grf_writel(GMAC_RMII_MODE, RK3288_GRF_SOC_CON1);
  95     } else if (type == RK312X_GMAC) {
  96         grf_writel(GMAC_PHY_INTF_SEL_RMII, RK312X_GRF_MAC_CON1);
  97         grf_writel(GMAC_RMII_MODE, RK312X_GRF_MAC_CON1);
  98     }
  99 }
 100
 101 static void SET_RGMII_10M(int type)
 102 {
 103     if (type == RK3288_GMAC) {
 104         grf_writel(GMAC_CLK_2_5M, RK3288_GRF_SOC_CON1);
 105     } else if (type == RK312X_GMAC) {
 106         grf_writel(GMAC_CLK_2_5M, RK312X_GRF_MAC_CON1);
 107     }
 108 }
 109
 110 static void SET_RGMII_100M(int type)
 111 {
 112     if (type == RK3288_GMAC) {
 113         grf_writel(GMAC_CLK_25M, RK3288_GRF_SOC_CON1);
 114     } else if (type == RK312X_GMAC) {
 115         grf_writel(GMAC_CLK_25M, RK312X_GRF_MAC_CON1);
 116     }
 117 }
 118
 119 static void SET_RGMII_1000M(int type)
 120 {
 121     if (type == RK3288_GMAC) {
 122         grf_writel(GMAC_CLK_125M, RK3288_GRF_SOC_CON1);
 123     } else if (type == RK312X_GMAC) {
 124         grf_writel(GMAC_CLK_125M, RK312X_GRF_MAC_CON1);
 125     }
 126 }
 127
 128 static void SET_RMII_10M(int type)
 129 {
 130     if (type == RK3288_GMAC) {
 131         grf_writel(GMAC_RMII_CLK_2_5M, RK3288_GRF_SOC_CON1);
 132         grf_writel(GMAC_SPEED_10M, RK3288_GRF_SOC_CON1);
 133     } else if (type == RK312X_GMAC) {
 134         grf_writel(GMAC_RMII_CLK_2_5M, RK312X_GRF_MAC_CON1);
 135         grf_writel(GMAC_SPEED_10M, RK312X_GRF_MAC_CON1);
 136     }
 137 }
 138
 139 static void SET_RMII_100M(int type)
 140 {
 141     if (type == RK3288_GMAC) {
 142         grf_writel(GMAC_RMII_CLK_25M, RK3288_GRF_SOC_CON1);
 143         grf_writel(GMAC_SPEED_100M, RK3288_GRF_SOC_CON1);
 144     } else if (type == RK312X_GMAC) {
 145         grf_writel(GMAC_RMII_CLK_25M, RK312X_GRF_MAC_CON1);
 146         grf_writel(GMAC_SPEED_100M, RK312X_GRF_MAC_CON1);
 147     }
 148 }
 149
 150 struct bsp_priv g_bsp_priv;
 151
 152 int gmac_clk_init(struct device *device)
 153 {
 154         struct bsp_priv * bsp_priv = &g_bsp_priv;
 155
 156         bsp_priv->clk_enable = false;
 157
 158         bsp_priv->mac_clk_rx = clk_get(device,"mac_clk_rx");
 159         if (IS_ERR(bsp_priv->mac_clk_rx)) {
 160                 pr_warn("%s: warning: cannot get mac_clk_rx clock\n", __func__);
 161         }
 162
 163         bsp_priv->mac_clk_tx = clk_get(device,"mac_clk_tx");
 164         if (IS_ERR(bsp_priv->mac_clk_tx)) {
 165                 pr_warn("%s: warning: cannot get mac_clk_tx clock\n", __func__);
 166         }
 167
 168         bsp_priv->clk_mac_ref = clk_get(device,"clk_mac_ref");
 169         if (IS_ERR(bsp_priv->clk_mac_ref)) {
 170                 pr_warn("%s: warning: cannot get clk_mac_ref clock\n", __func__);
 171         }
 172
 173         bsp_priv->clk_mac_refout = clk_get(device,"clk_mac_refout");
 174         if (IS_ERR(bsp_priv->clk_mac_refout)) {
 175                 pr_warn("%s: warning: cannot get clk_mac_refout clock\n", __func__);
 176         }
 177
 178         bsp_priv->aclk_mac = clk_get(device,"aclk_mac");
 179         if (IS_ERR(bsp_priv->aclk_mac)) {
 180                 pr_warn("%s: warning: cannot get aclk_mac clock\n", __func__);
 181         }
 182
 183         bsp_priv->pclk_mac = clk_get(device,"pclk_mac");
 184         if (IS_ERR(bsp_priv->pclk_mac)) {
 185                 pr_warn("%s: warning: cannot get pclk_mac clock\n", __func__);
 186         }
 187
 188         bsp_priv->clk_mac_pll = clk_get(device,"clk_mac_pll");
 189         if (IS_ERR(bsp_priv->clk_mac_pll)) {
 190                 pr_warn("%s: warning: cannot get clk_mac_pll clock\n", __func__);
 191         }
 192
 193         bsp_priv->gmac_clkin = clk_get(device,"gmac_clkin");
 194         if (IS_ERR(bsp_priv->gmac_clkin)) {
 195                 pr_warn("%s: warning: cannot get gmac_clkin clock\n", __func__);
 196         }
 197
 198         bsp_priv->clk_mac = clk_get(device, "clk_mac");
 199         if (IS_ERR(bsp_priv->clk_mac)) {
 200                 pr_warn("%s: warning: cannot get clk_mac clock\n", __func__);
 201         }
 202
 203         if (bsp_priv->clock_input) {
 204                 if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) {
 205                         clk_set_rate(bsp_priv->gmac_clkin, 50000000);
 206                 }
 207                 clk_set_parent(bsp_priv->clk_mac, bsp_priv->gmac_clkin);
 208         } else {
 209                 if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII) {
 210                         clk_set_rate(bsp_priv->clk_mac_pll, 50000000);
 211                 }
 212                 clk_set_parent(bsp_priv->clk_mac, bsp_priv->clk_mac_pll);
 213         }
 214         return 0;
 215 }
 216
 217 static int gmac_clk_enable(bool enable) {
 218         int phy_iface = -1;
 219         struct bsp_priv * bsp_priv = &g_bsp_priv;
 220         phy_iface = bsp_priv->phy_iface;
 221
 222         if (enable) {
 223                 if (!bsp_priv->clk_enable) {
 224                         if (phy_iface == PHY_INTERFACE_MODE_RMII) {
 225                                 if (!IS_ERR(bsp_priv->mac_clk_rx))
 226                                         clk_prepare_enable(bsp_priv->mac_clk_rx);
 227
 228                                 if (!IS_ERR(bsp_priv->clk_mac_ref))
 229                                         clk_prepare_enable(bsp_priv->clk_mac_ref);
 230
 231                                 if (!IS_ERR(bsp_priv->clk_mac_refout))
 232                                         clk_prepare_enable(bsp_priv->clk_mac_refout);
 233                         }
 234
 235                         if (!IS_ERR(bsp_priv->aclk_mac))
 236                                 clk_prepare_enable(bsp_priv->aclk_mac);
 237
 238                         if (!IS_ERR(bsp_priv->pclk_mac))
 239                                 clk_prepare_enable(bsp_priv->pclk_mac);
 240
 241                         if (!IS_ERR(bsp_priv->mac_clk_tx))
 242                                 clk_prepare_enable(bsp_priv->mac_clk_tx);
 243
 244                         if (!IS_ERR(bsp_priv->clk_mac))
 245                                 clk_prepare_enable(bsp_priv->clk_mac);
 246
 247
 248                         bsp_priv->clk_enable = true;
 249                 }
 250         } else {
 251                 if (bsp_priv->clk_enable) {
 252                         if (phy_iface == PHY_INTERFACE_MODE_RMII) {
 253                                 if (!IS_ERR(bsp_priv->mac_clk_rx))
 254                                         clk_disable_unprepare(bsp_priv->mac_clk_rx);
 255
 256                                 if (!IS_ERR(bsp_priv->clk_mac_ref))
 257                                         clk_disable_unprepare(bsp_priv->clk_mac_ref);
 258
 259                                 if (!IS_ERR(bsp_priv->clk_mac_refout))
 260                                         clk_disable_unprepare(bsp_priv->clk_mac_refout);
 261                         }
 262
 263                         if (!IS_ERR(bsp_priv->aclk_mac))
 264                                 clk_disable_unprepare(bsp_priv->aclk_mac);
 265
 266                         if (!IS_ERR(bsp_priv->pclk_mac))
 267                                 clk_disable_unprepare(bsp_priv->pclk_mac);
 268
 269                         if (!IS_ERR(bsp_priv->mac_clk_tx))
 270                                 clk_disable_unprepare(bsp_priv->mac_clk_tx);
 271
 272                         if (!IS_ERR(bsp_priv->clk_mac))
 273                                 clk_disable_unprepare(bsp_priv->clk_mac);
 274
 275                         bsp_priv->clk_enable = false;
 276                 }
 277         }
 278
 279         return 0;
 280 }
 281
 282 static int power_on_by_pmu(bool enable) {
 283         struct bsp_priv * bsp_priv = &g_bsp_priv;
 284         struct regulator * ldo;
 285         char * ldostr = bsp_priv->pmu_regulator;
 286         int ret;
 287
 288         if (ldostr == NULL) {
 289                 pr_err("%s: no ldo found\n", __func__);
 290                 return -1;
 291         }
 292
 293         ldo = regulator_get(NULL, ldostr);
 294         if (ldo == NULL) {
 295                 pr_err("\n%s get ldo %s failed\n", __func__, ldostr);
 296         } else {
 297                 if (enable) {
 298                         if(!regulator_is_enabled(ldo)) {
 299                                 regulator_set_voltage(ldo, 3300000, 3300000);
 300                                 ret = regulator_enable(ldo);
 301                                 if(ret != 0){
 302                                         pr_err("%s: faild to enable %s\n", __func__, ldostr);
 303                                 } else {
 304                                         pr_info("turn on ldo done.\n");
 305                                 }
 306                         } else {
 307                                 pr_warn("%s is enabled before enable", ldostr);
 308                         }
 309                 } else {
 310                         if(regulator_is_enabled(ldo)) {
 311                                 ret = regulator_disable(ldo);
 312                                 if(ret != 0){
 313                                         pr_err("%s: faild to disable %s\n", __func__, ldostr);
 314                                 } else {
 315                                         pr_info("turn off ldo done.\n");
 316                                 }
 317                         } else {
 318                                 pr_warn("%s is disabled before disable", ldostr);
 319                         }
 320                 }
 321                 regulator_put(ldo);
 322                 msleep(100);
 323
 324                 if (enable) {
 325                         //reset
 326                         if (gpio_is_valid(bsp_priv->reset_io)) {
 327                                 gpio_direction_output(bsp_priv->reset_io, bsp_priv->reset_io_level);
 328                                 msleep(10);
 329                                 gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
 330                         }
 331
 332                         msleep(100);
 333                 } else {
 334                         //pull up reset
 335                         if (gpio_is_valid(bsp_priv->reset_io)) {
 336                                 gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
 337                         }
 338                 }
 339
 340         }
 341
 342         return 0;
 343 }
 344
 345 static int power_on_by_gpio(bool enable) {
 346         struct bsp_priv * bsp_priv = &g_bsp_priv;
 347         if (enable) {
 348                 //power on
 349                 if (gpio_is_valid(bsp_priv->power_io)) {
 350                         gpio_direction_output(bsp_priv->power_io, bsp_priv->power_io_level);
 351                 }
 352
 353                 //reset
 354                 if (gpio_is_valid(bsp_priv->reset_io)) {
 355                         gpio_direction_output(bsp_priv->reset_io, bsp_priv->reset_io_level);
 356                         msleep(10);
 357                         gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
 358                 }
 359                 msleep(100);
 360         } else {
 361                 //power off
 362                 if (gpio_is_valid(bsp_priv->power_io)) {
 363                         gpio_direction_output(bsp_priv->power_io, !bsp_priv->power_io_level);
 364                 }
 365                 //pull down reset
 366                 if (gpio_is_valid(bsp_priv->reset_io)) {
 367                         gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
 368                 }
 369         }
 370
 371         return 0;
 372 }
 373
 374 static int phy_power_on(bool enable)
 375 {
 376         struct bsp_priv *bsp_priv = &g_bsp_priv;
 377         printk("%s: enable = %d \n", __func__, enable);
 378
 379         if (bsp_priv->power_ctrl_by_pmu) {
 380                 return power_on_by_pmu(enable);
 381         } else {
 382                 return power_on_by_gpio(enable);
 383         }
 384 }
 385
 386 int stmmc_pltfr_init(struct platform_device *pdev) {
 387         int phy_iface;
 388         int err;
 389         struct bsp_priv *bsp_priv;
 390
 391         pr_info("%s: \n", __func__);
 392
 393 //iomux
 394 #if 0
 395         if ((pdev->dev.pins) && (pdev->dev.pins->p)) {
 396                 gmac_state = pinctrl_lookup_state(pdev->dev.pins->p, "default");
 397                 if (IS_ERR(gmac_state)) {
 398                                 dev_err(&pdev->dev, "no gmc pinctrl state\n");
 399                                 return -1;
 400                 }
 401
 402                 pinctrl_select_state(pdev->dev.pins->p, gmac_state);
 403         }
 404 #endif
 405
 406         bsp_priv = &g_bsp_priv;
 407         phy_iface = bsp_priv->phy_iface;
 408 //power
 409         if (!gpio_is_valid(bsp_priv->power_io)) {
 410                 pr_err("%s: ERROR: Get power-gpio failed.\n", __func__);
 411         } else {
 412                 err = gpio_request(bsp_priv->power_io, "gmac_phy_power");
 413                 if (err) {
 414                         pr_err("%s: ERROR: Request gmac phy power pin failed.\n", __func__);
 415                 }
 416         }
 417
 418         if (!gpio_is_valid(bsp_priv->reset_io)) {
 419                 pr_err("%s: ERROR: Get reset-gpio failed.\n", __func__);
 420         } else {
 421                 err = gpio_request(bsp_priv->reset_io, "gmac_phy_reset");
 422                 if (err) {
 423                         pr_err("%s: ERROR: Request gmac phy reset pin failed.\n", __func__);
 424                 }
 425         }
 426 //rmii or rgmii
 427         if (phy_iface == PHY_INTERFACE_MODE_RGMII) {
 428                 pr_info("%s: init for RGMII\n", __func__);
 429                 SET_RGMII(bsp_priv->chip, bsp_priv->tx_delay, bsp_priv->rx_delay);
 430         } else if (phy_iface == PHY_INTERFACE_MODE_RMII) {
 431                 pr_info("%s: init for RMII\n", __func__);
 432                 SET_RMII(bsp_priv->chip);
 433         } else {
 434                 pr_err("%s: ERROR: NO interface defined!\n", __func__);
 435         }
 436
 437         return 0;
 438 }
 439
 440 void stmmc_pltfr_fix_mac_speed(void *priv, unsigned int speed){
 441         struct bsp_priv * bsp_priv = priv;
 442         int interface;
 443
 444         pr_info("%s: fix speed to %d\n", __func__, speed);
 445
 446         if (bsp_priv) {
 447                 interface = bsp_priv->phy_iface;
 448         }
 449
 450         if (interface == PHY_INTERFACE_MODE_RGMII) {
 451                 pr_info("%s: fix speed for RGMII\n", __func__);
 452
 453                 switch (speed) {
 454                         case 10: {
 455                                 SET_RGMII_10M(bsp_priv->chip);
 456                                 break;
 457                         }
 458                         case 100: {
 459                                 SET_RGMII_100M(bsp_priv->chip);
 460                                 break;
 461                         }
 462                         case 1000: {
 463                                 SET_RGMII_1000M(bsp_priv->chip);
 464                                 break;
 465                         }
 466                         default: {
 467                                 pr_err("%s: ERROR: speed %d is not defined!\n", __func__, speed);
 468                         }
 469                 }
 470
 471         } else if (interface == PHY_INTERFACE_MODE_RMII) {
 472                 pr_info("%s: fix speed for RMII\n", __func__);
 473                 switch (speed) {
 474                         case 10: {
 475                                 SET_RMII_10M(bsp_priv->chip);
 476                                 break;
 477                         }
 478                         case 100: {
 479                                 SET_RMII_100M(bsp_priv->chip);
 480                                 break;
 481                         }
 482                         default: {
 483                                 pr_err("%s: ERROR: speed %d is not defined!\n", __func__, speed);
 484                         }
 485                 }
 486         } else {
 487                 pr_err("%s: ERROR: NO interface defined!\n", __func__);
 488         }
 489 }
 490
 491
 492 #ifdef CONFIG_OF
 493 static int stmmac_probe_config_dt(struct platform_device *pdev,
 494                                   struct plat_stmmacenet_data *plat,
 495                                   const char **mac)
 496 {
 497         struct device_node *np = pdev->dev.of_node;
 498         enum of_gpio_flags flags;
 499         int ret;
 500         const char * strings = NULL;
 501         int value;
 502
 503         if (!np)
 504                 return -ENODEV;
 505
 506         *mac = of_get_mac_address(np);
 507         plat->interface = of_get_phy_mode(np);
 508
 509         plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
 510                                            sizeof(struct stmmac_mdio_bus_data),
 511                                            GFP_KERNEL);
 512
 513         plat->init = stmmc_pltfr_init;
 514         plat->fix_mac_speed = stmmc_pltfr_fix_mac_speed;
 515
 516         ret = of_property_read_string(np, "pmu_regulator", &strings);
 517         if (ret) {
 518                 pr_err("%s: Can not read property: pmu_regulator.\n", __func__);
 519                 g_bsp_priv.power_ctrl_by_pmu = false;
 520         } else {
 521                 pr_info("%s: ethernet phy power controled by pmu(%s).\n", __func__, strings);
 522                 g_bsp_priv.power_ctrl_by_pmu = true;
 523                 strcpy(g_bsp_priv.pmu_regulator, strings);
 524         }
 525
 526         ret = of_property_read_u32(np, "pmu_enable_level", &value);
 527         if (ret) {
 528                 pr_err("%s: Can not read property: pmu_enable_level.\n", __func__);
 529                 g_bsp_priv.power_ctrl_by_pmu = false;
 530         } else {
 531                 pr_info("%s: ethernet phy power controled by pmu(level = %s).\n", __func__, (value == 1)?"HIGH":"LOW");
 532                 g_bsp_priv.power_ctrl_by_pmu = true;
 533                 g_bsp_priv.pmu_enable_level = value;
 534         }
 535
 536         ret = of_property_read_string(np, "clock_in_out", &strings);
 537         if (ret) {
 538                 pr_err("%s: Can not read property: clock_in_out.\n", __func__);
 539                 g_bsp_priv.clock_input = true;
 540         } else {
 541                 pr_info("%s: clock input or output? (%s).\n", __func__, strings);
 542                 if (!strcmp(strings, "input")) {
 543                         g_bsp_priv.clock_input = true;
 544                 } else {
 545                         g_bsp_priv.clock_input = false;
 546                 }
 547         }
 548
 549         ret = of_property_read_u32(np, "tx_delay", &value);
 550         if (ret) {
 551                 g_bsp_priv.tx_delay = 0x30;
 552                 pr_err("%s: Can not read property: tx_delay. set tx_delay to 0x%x\n", __func__, g_bsp_priv.tx_delay);
 553         } else {
 554                 pr_info("%s: TX delay(0x%x).\n", __func__, value);
 555                 g_bsp_priv.tx_delay = value;
 556         }
 557
 558         ret = of_property_read_u32(np, "rx_delay", &value);
 559         if (ret) {
 560                 g_bsp_priv.rx_delay = 0x10;
 561                 pr_err("%s: Can not read property: rx_delay. set rx_delay to 0x%x\n", __func__, g_bsp_priv.rx_delay);
 562         } else {
 563                 pr_info("%s: RX delay(0x%x).\n", __func__, value);
 564                 g_bsp_priv.rx_delay = value;
 565         }
 566
 567         g_bsp_priv.reset_io =
 568                         of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
 569         g_bsp_priv.reset_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
 570         g_bsp_priv.power_io =
 571                         of_get_named_gpio_flags(np, "power-gpio", 0, &flags);
 572         g_bsp_priv.power_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
 573
 574         g_bsp_priv.phy_iface = plat->interface;
 575         g_bsp_priv.phy_power_on = phy_power_on;
 576         g_bsp_priv.gmac_clk_enable = gmac_clk_enable;
 577
 578         plat->bsp_priv = &g_bsp_priv;
 579
 580         /*
 581          * Currently only the properties needed on SPEAr600
 582          * are provided. All other properties should be added
 583          * once needed on other platforms.
 584          */
 585         if (of_device_is_compatible(np, "rockchip,rk3288-gmac") ||
 586             of_device_is_compatible(np, "rockchip,rk312x-gmac")) {
 587                 plat->has_gmac = 1;
 588                 plat->pmt = 1;
 589         }
 590
 591         if (of_device_is_compatible(np, "rockchip,rk3288-gmac")) {
 592                 g_bsp_priv.chip = RK3288_GMAC;
 593                 printk("%s: is rockchip,rk3288-gmac", __func__);
 594         } if (of_device_is_compatible(np, "rockchip,rk312x-gmac")) {
 595                 g_bsp_priv.chip = RK312X_GMAC;
 596                 printk("%s: is rockchip,rk312x-gmac", __func__);
 597         }
 598
 599         return 0;
 600 }
 601 #else
 602 static int stmmac_probe_config_dt(struct platform_device *pdev,
 603                                   struct plat_stmmacenet_data *plat,
 604                                   const char **mac)
 605 {
 606         return -ENOSYS;
 607 }
 608 #endif /* CONFIG_OF */
 609
 610 static struct class *vmac_class = NULL;
 611 static CLASS_ATTR(exist, 0664, NULL, NULL);
 612 int rockchip_gmac_sysif_init(void)
 613 {
 614        int ret;
 615
 616        vmac_class = class_create(THIS_MODULE, "vmac");
 617        ret = class_create_file(vmac_class, &class_attr_exist);
 618        if(ret) {
 619            printk("%s: Fail to creat class\n",__func__);
 620            return ret;
 621        }
 622        return 0;
 623 }
 624
 625 /**
 626  * stmmac_pltfr_probe
 627  * @pdev: platform device pointer
 628  * Description: platform_device probe function. It allocates
 629  * the necessary resources and invokes the main to init
 630  * the net device, register the mdio bus etc.
 631  */
 632 static int stmmac_pltfr_probe(struct platform_device *pdev)
 633 {
 634         int ret = 0;
 635         struct resource *res;
 636         struct device *dev = &pdev->dev;
 637         void __iomem *addr = NULL;
 638         struct stmmac_priv *priv = NULL;
 639         struct plat_stmmacenet_data *plat_dat = NULL;
 640         const char *mac = NULL;
 641
 642         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 643         if (!res)
 644                 return -ENODEV;
 645
 646         addr = devm_ioremap_resource(dev, res);
 647         if (IS_ERR(addr))
 648                 return PTR_ERR(addr);
 649
 650         if (pdev->dev.of_node) {
 651                 plat_dat = devm_kzalloc(&pdev->dev,
 652                                         sizeof(struct plat_stmmacenet_data),
 653                                         GFP_KERNEL);
 654                 if (!plat_dat) {
 655                         pr_err("%s: ERROR: no memory", __func__);
 656                         return  -ENOMEM;
 657                 }
 658
 659                 ret = stmmac_probe_config_dt(pdev, plat_dat, &mac);
 660                 if (ret) {
 661                         pr_err("%s: main dt probe failed", __func__);
 662                         return ret;
 663                 }
 664         } else {
 665                 plat_dat = pdev->dev.platform_data;
 666         }
 667
 668         /* Custom initialisation (if needed)*/
 669         if (plat_dat->init) {
 670                 ret = plat_dat->init(pdev);
 671                 if (unlikely(ret))
 672                         return ret;
 673         }
 674
 675         gmac_clk_init(&(pdev->dev));
 676
 677         priv = stmmac_dvr_probe(&(pdev->dev), plat_dat, addr);
 678         if (!priv) {
 679                 pr_err("%s: main driver probe failed", __func__);
 680                 return -ENODEV;
 681         }
 682
 683
 684         /* Get MAC address if available (DT) */
 685         if (mac)
 686                 memcpy(priv->dev->dev_addr, mac, ETH_ALEN);
 687
 688         /* Get the MAC information */
 689         priv->dev->irq = platform_get_irq_byname(pdev, "macirq");
 690         if (priv->dev->irq == -ENXIO) {
 691                 pr_err("%s: ERROR: MAC IRQ configuration "
 692                        "information not found\n", __func__);
 693                 return -ENXIO;
 694         }
 695
 696         /*
 697          * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
 698          * The external wake up irq can be passed through the platform code
 699          * named as "eth_wake_irq"
 700          *
 701          * In case the wake up interrupt is not passed from the platform
 702          * so the driver will continue to use the mac irq (ndev->irq)
 703          */
 704         priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
 705         if (priv->wol_irq == -ENXIO)
 706                 priv->wol_irq = priv->dev->irq;
 707
 708         priv->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
 709
 710         platform_set_drvdata(pdev, priv->dev);
 711
 712         rockchip_gmac_sysif_init();
 713
 714         pr_debug("STMMAC platform driver registration completed");
 715
 716         return 0;
 717 }
 718
 719 /**
 720  * stmmac_pltfr_remove
 721  * @pdev: platform device pointer
 722  * Description: this function calls the main to free the net resources
 723  * and calls the platforms hook and release the resources (e.g. mem).
 724  */
 725 static int stmmac_pltfr_remove(struct platform_device *pdev)
 726 {
 727         struct net_device *ndev = platform_get_drvdata(pdev);
 728         struct stmmac_priv *priv = netdev_priv(ndev);
 729         int ret = stmmac_dvr_remove(ndev);
 730
 731         if (priv->plat->exit)
 732                 priv->plat->exit(pdev);
 733
 734         platform_set_drvdata(pdev, NULL);
 735
 736         return ret;
 737 }
 738
 739 #ifdef CONFIG_PM
 740 static int stmmac_pltfr_suspend(struct device *dev)
 741 {
 742         struct net_device *ndev = dev_get_drvdata(dev);
 743
 744         return stmmac_suspend(ndev);
 745 }
 746
 747 static int stmmac_pltfr_resume(struct device *dev)
 748 {
 749         struct net_device *ndev = dev_get_drvdata(dev);
 750
 751         return stmmac_resume(ndev);
 752 }
 753
 754 int stmmac_pltfr_freeze(struct device *dev)
 755 {
 756         int ret;
 757         struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
 758         struct net_device *ndev = dev_get_drvdata(dev);
 759         struct platform_device *pdev = to_platform_device(dev);
 760
 761         ret = stmmac_freeze(ndev);
 762         if (plat_dat->exit)
 763                 plat_dat->exit(pdev);
 764
 765         return ret;
 766 }
 767
 768 int stmmac_pltfr_restore(struct device *dev)
 769 {
 770         struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
 771         struct net_device *ndev = dev_get_drvdata(dev);
 772         struct platform_device *pdev = to_platform_device(dev);
 773
 774         if (plat_dat->init)
 775                 plat_dat->init(pdev);
 776
 777         return stmmac_restore(ndev);
 778 }
 779
 780 static const struct dev_pm_ops stmmac_pltfr_pm_ops = {
 781         .suspend = stmmac_pltfr_suspend,
 782         .resume = stmmac_pltfr_resume,
 783         .freeze = stmmac_pltfr_freeze,
 784         .thaw = stmmac_pltfr_restore,
 785         .restore = stmmac_pltfr_restore,
 786 };
 787 #else
 788 static const struct dev_pm_ops stmmac_pltfr_pm_ops;
 789 #endif /* CONFIG_PM */
 790
 791 static const struct of_device_id stmmac_dt_ids[] = {
 792         { .compatible = "rockchip,rk3288-gmac"},
 793         { .compatible = "rockchip,rk312x-gmac"},
 794         { /* sentinel */ }
 795 };
 796 MODULE_DEVICE_TABLE(of, stmmac_dt_ids);
 797
 798 struct platform_driver stmmac_pltfr_driver = {
 799         .probe = stmmac_pltfr_probe,
 800         .remove = stmmac_pltfr_remove,
 801         .driver = {
 802                    .name = STMMAC_RESOURCE_NAME,
 803                    .owner = THIS_MODULE,
 804                    .pm = &stmmac_pltfr_pm_ops,
 805                    .of_match_table = of_match_ptr(stmmac_dt_ids),
 806                    },
 807 };
 808
 809 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet PLATFORM driver");
 810 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
 811 MODULE_LICENSE("GPL");