1 /*******************************************************************************
2 This contains the functions to handle the platform driver.
4 Copyright (C) 2007-2011 STMicroelectronics Ltd
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23 *******************************************************************************/
25 #include <linux/platform_device.h>
28 #include <linux/of_net.h>
29 #include <linux/gpio.h>
30 #include <linux/of_gpio.h>
31 #include <linux/of_device.h>
32 #include <dt-bindings/gpio/gpio.h>
34 #include <linux/rockchip/iomap.h>
35 #include <linux/rockchip/grf.h>
37 #define grf_readl(offset) readl_relaxed(RK_GRF_VIRT + offset)
38 #define grf_writel(v, offset) do { writel_relaxed(v, RK_GRF_VIRT + offset); dsb(); } while (0)
40 // RK3288_GRF_SOC_CON1
41 #define GMAC_PHY_INTF_SEL_RGMII ((0x01C0 << 16) | (0x0040))
42 #define GMAC_PHY_INTF_SEL_RMII ((0x01C0 << 16) | (0x0100))
43 #define GMAC_FLOW_CTRL ((0x0200 << 16) | (0x0200))
44 #define GMAC_FLOW_CTRL_CLR ((0x0200 << 16) | (0x0000))
45 #define GMAC_SPEED_10M ((0x0400 << 16) | (0x0400))
46 #define GMAC_SPEED_100M ((0x0400 << 16) | (0x0000))
47 #define GMAC_RMII_CLK_25M ((0x0800 << 16) | (0x0800))
48 #define GMAC_RMII_CLK_2_5M ((0x0800 << 16) | (0x0000))
49 #define GMAC_CLK_125M ((0x3000 << 16) | (0x0000))
50 #define GMAC_CLK_25M ((0x3000 << 16) | (0x3000))
51 #define GMAC_CLK_2_5M ((0x3000 << 16) | (0x2000))
52 #define GMAC_RMII_MODE ((0x4000 << 16) | (0x4000))
53 #define GMAC_RMII_MODE_CLR ((0x4000 << 16) | (0x0000))
55 // RK3288_GRF_SOC_CON3
56 #define GMAC_TXCLK_DLY_ENABLE ((0x4000 << 16) | (0x4000))
57 #define GMAC_TXCLK_DLY_DISABLE ((0x4000 << 16) | (0x0000))
58 #define GMAC_RXCLK_DLY_ENABLE ((0x8000 << 16) | (0x8000))
59 #define GMAC_RXCLK_DLY_DISABLE ((0x8000 << 16) | (0x0000))
61 #define GMAC_CLK_RX_DL_CFG ((0x3F80 << 16) | (0x0800))
62 #define GMAC_CLK_TX_DL_CFG ((0x007F << 16) | (0x0040))
64 #define GMAC_CLK_RX_DL_CFG(val) ((0x3F80 << 16) | (val<<7)) // 7bit
65 #define GMAC_CLK_TX_DL_CFG(val) ((0x007F << 16) | (val)) // 7bit
67 struct bsp_priv g_bsp_priv;
69 static int phy_power_on(struct plat_stmmacenet_data *plat, int enable)
71 struct bsp_priv * bsp_priv;
73 pr_info("%s: enable = %d \n", __func__, enable);
75 if ((plat) && (plat->bsp_priv)) {
76 bsp_priv = plat->bsp_priv;
78 pr_err("%s: ERROR: platform data or private data is NULL.\n", __FUNCTION__);
84 if (gpio_is_valid(bsp_priv->power_io)) {
85 gpio_direction_output(bsp_priv->power_io, !bsp_priv->power_io_level);
87 gpio_direction_output(bsp_priv->power_io, bsp_priv->power_io_level);
88 //gpio_set_value(bsp_priv->power_io, 1);
92 if (gpio_is_valid(bsp_priv->reset_io)) {
93 gpio_direction_output(bsp_priv->reset_io, bsp_priv->reset_io_level);
94 //gpio_set_value(bsp_priv->reset_io, 0);
96 gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
101 if (gpio_is_valid(bsp_priv->power_io)) {
102 gpio_direction_output(bsp_priv->power_io, !bsp_priv->power_io_level);
103 //gpio_set_value(bsp_priv->power_io, 0);
110 int stmmc_pltfr_init(struct platform_device *pdev) {
111 //struct pinctrl_state *gmac_state;
114 struct bsp_priv *bsp_priv;
116 pr_info("%s: \n", __func__);
120 if ((pdev->dev.pins) && (pdev->dev.pins->p)) {
121 gmac_state = pinctrl_lookup_state(pdev->dev.pins->p, "default");
122 if (IS_ERR(gmac_state)) {
123 dev_err(&pdev->dev, "no gmc pinctrl state\n");
127 pinctrl_select_state(pdev->dev.pins->p, gmac_state);
131 bsp_priv = &g_bsp_priv;
132 phy_iface = bsp_priv->phy_iface;
134 if (!gpio_is_valid(bsp_priv->power_io)) {
135 pr_err("%s: ERROR: Get power-gpio failed.\n", __func__);
139 err = gpio_request(bsp_priv->power_io, "gmac_phy_power");
141 pr_err("%s: ERROR: Request gmac phy power pin failed.\n", __func__);
145 if (!gpio_is_valid(bsp_priv->reset_io)) {
146 pr_err("%s: ERROR: Get reset-gpio failed.\n", __func__);
150 err = gpio_request(bsp_priv->reset_io, "gmac_phy_reset");
152 pr_err("%s: ERROR: Request gmac phy reset pin failed.\n", __func__);
157 if (phy_iface & PHY_INTERFACE_MODE_RGMII) {
158 pr_info("%s: init for RGMII\n", __func__);
159 grf_writel(GMAC_PHY_INTF_SEL_RGMII, RK3288_GRF_SOC_CON1);
160 grf_writel(GMAC_RMII_MODE_CLR, RK3288_GRF_SOC_CON1);
161 grf_writel(GMAC_RXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
162 grf_writel(GMAC_TXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
163 grf_writel(GMAC_CLK_RX_DL_CFG(0x10), RK3288_GRF_SOC_CON3);
164 grf_writel(GMAC_CLK_TX_DL_CFG(0x40), RK3288_GRF_SOC_CON3);
165 } else if (phy_iface & PHY_INTERFACE_MODE_RMII) {
166 pr_info("%s: init for RMII\n", __func__);
167 grf_writel(GMAC_PHY_INTF_SEL_RMII, RK3288_GRF_SOC_CON1);
168 grf_writel(GMAC_RMII_MODE, RK3288_GRF_SOC_CON1);
170 pr_err("%s: ERROR: NO interface defined!\n", __func__);
176 void stmmc_pltfr_fix_mac_speed(void *priv, unsigned int speed){
177 struct bsp_priv * bsp_priv = priv;
180 pr_info("%s: fix speed to %d\n", __func__, speed);
183 interface = bsp_priv->phy_iface;
186 if (interface & PHY_INTERFACE_MODE_RGMII) {
187 pr_info("%s: fix speed for RGMII\n", __func__);
191 grf_writel(GMAC_CLK_2_5M, RK3288_GRF_SOC_CON1);
195 grf_writel(GMAC_CLK_25M, RK3288_GRF_SOC_CON1);
199 grf_writel(GMAC_CLK_125M, RK3288_GRF_SOC_CON1);
203 pr_err("%s: ERROR: speed %d is not defined!\n", __func__, speed);
207 } else if (interface & PHY_INTERFACE_MODE_RMII) {
208 pr_info("%s: fix speed for RMII\n", __func__);
211 grf_writel(GMAC_RMII_CLK_2_5M, RK3288_GRF_SOC_CON1);
215 grf_writel(GMAC_RMII_CLK_25M, RK3288_GRF_SOC_CON1);
219 pr_err("%s: ERROR: speed %d is not defined!\n", __func__, speed);
223 pr_err("%s: ERROR: NO interface defined!\n", __func__);
229 static int stmmac_probe_config_dt(struct platform_device *pdev,
230 struct plat_stmmacenet_data *plat,
233 struct device_node *np = pdev->dev.of_node;
234 enum of_gpio_flags flags;
239 *mac = of_get_mac_address(np);
240 plat->interface = of_get_phy_mode(np);
241 plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
242 sizeof(struct stmmac_mdio_bus_data),
245 plat->init = stmmc_pltfr_init;
246 plat->fix_mac_speed = stmmc_pltfr_fix_mac_speed;
248 g_bsp_priv.reset_io =
249 of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
250 g_bsp_priv.reset_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
251 g_bsp_priv.power_io =
252 of_get_named_gpio_flags(np, "power-gpio", 0, &flags);
253 g_bsp_priv.power_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
255 g_bsp_priv.phy_iface = plat->interface;
256 g_bsp_priv.phy_power_on = phy_power_on;
258 plat->bsp_priv = &g_bsp_priv;
261 * Currently only the properties needed on SPEAr600
262 * are provided. All other properties should be added
263 * once needed on other platforms.
265 if (of_device_is_compatible(np, "rockchip,gmac")) {
273 static int stmmac_probe_config_dt(struct platform_device *pdev,
274 struct plat_stmmacenet_data *plat,
279 #endif /* CONFIG_OF */
283 * @pdev: platform device pointer
284 * Description: platform_device probe function. It allocates
285 * the necessary resources and invokes the main to init
286 * the net device, register the mdio bus etc.
288 static int stmmac_pltfr_probe(struct platform_device *pdev)
291 struct resource *res;
292 struct device *dev = &pdev->dev;
293 void __iomem *addr = NULL;
294 struct stmmac_priv *priv = NULL;
295 struct plat_stmmacenet_data *plat_dat = NULL;
296 const char *mac = NULL;
298 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
302 addr = devm_ioremap_resource(dev, res);
304 return PTR_ERR(addr);
306 if (pdev->dev.of_node) {
307 plat_dat = devm_kzalloc(&pdev->dev,
308 sizeof(struct plat_stmmacenet_data),
311 pr_err("%s: ERROR: no memory", __func__);
315 ret = stmmac_probe_config_dt(pdev, plat_dat, &mac);
317 pr_err("%s: ERROR: main dt probe failed", __func__);
321 plat_dat = pdev->dev.platform_data;
324 /* Custom initialisation (if needed)*/
325 if (plat_dat->init) {
326 ret = plat_dat->init(pdev);
331 priv = stmmac_dvr_probe(&(pdev->dev), plat_dat, addr);
333 pr_err("%s: ERROR: main driver probe failed", __func__);
337 /* Get MAC address if available (DT) */
339 memcpy(priv->dev->dev_addr, mac, ETH_ALEN);
341 /* Get the MAC information */
342 priv->dev->irq = platform_get_irq_byname(pdev, "macirq");
343 if (priv->dev->irq == -ENXIO) {
344 pr_err("%s: ERROR: MAC IRQ configuration "
345 "information not found\n", __func__);
350 * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
351 * The external wake up irq can be passed through the platform code
352 * named as "eth_wake_irq"
354 * In case the wake up interrupt is not passed from the platform
355 * so the driver will continue to use the mac irq (ndev->irq)
357 priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
358 if (priv->wol_irq == -ENXIO)
359 priv->wol_irq = priv->dev->irq;
361 priv->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
363 platform_set_drvdata(pdev, priv->dev);
365 pr_debug("STMMAC platform driver registration completed");
371 * stmmac_pltfr_remove
372 * @pdev: platform device pointer
373 * Description: this function calls the main to free the net resources
374 * and calls the platforms hook and release the resources (e.g. mem).
376 static int stmmac_pltfr_remove(struct platform_device *pdev)
378 struct net_device *ndev = platform_get_drvdata(pdev);
379 struct stmmac_priv *priv = netdev_priv(ndev);
380 int ret = stmmac_dvr_remove(ndev);
382 if (priv->plat->exit)
383 priv->plat->exit(pdev);
385 platform_set_drvdata(pdev, NULL);
391 static int stmmac_pltfr_suspend(struct device *dev)
393 struct net_device *ndev = dev_get_drvdata(dev);
395 return stmmac_suspend(ndev);
398 static int stmmac_pltfr_resume(struct device *dev)
400 struct net_device *ndev = dev_get_drvdata(dev);
402 return stmmac_resume(ndev);
405 int stmmac_pltfr_freeze(struct device *dev)
408 struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
409 struct net_device *ndev = dev_get_drvdata(dev);
410 struct platform_device *pdev = to_platform_device(dev);
412 ret = stmmac_freeze(ndev);
414 plat_dat->exit(pdev);
419 int stmmac_pltfr_restore(struct device *dev)
421 struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
422 struct net_device *ndev = dev_get_drvdata(dev);
423 struct platform_device *pdev = to_platform_device(dev);
426 plat_dat->init(pdev);
428 return stmmac_restore(ndev);
431 static const struct dev_pm_ops stmmac_pltfr_pm_ops = {
432 .suspend = stmmac_pltfr_suspend,
433 .resume = stmmac_pltfr_resume,
434 .freeze = stmmac_pltfr_freeze,
435 .thaw = stmmac_pltfr_restore,
436 .restore = stmmac_pltfr_restore,
439 static const struct dev_pm_ops stmmac_pltfr_pm_ops;
440 #endif /* CONFIG_PM */
442 static const struct of_device_id stmmac_dt_ids[] = {
443 { .compatible = "rockchip,gmac"},
446 MODULE_DEVICE_TABLE(of, stmmac_dt_ids);
448 struct platform_driver stmmac_pltfr_driver = {
449 .probe = stmmac_pltfr_probe,
450 .remove = stmmac_pltfr_remove,
452 .name = STMMAC_RESOURCE_NAME,
453 .owner = THIS_MODULE,
454 .pm = &stmmac_pltfr_pm_ops,
455 .of_match_table = of_match_ptr(stmmac_dt_ids),
459 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet PLATFORM driver");
460 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
461 MODULE_LICENSE("GPL");