drivers/net/ethernet/rockchip/gmac/stmmac_platform.c

   1 /*******************************************************************************
   2   This contains the functions to handle the platform driver.
   3
   4   Copyright (C) 2007-2011  STMicroelectronics Ltd
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  23 *******************************************************************************/
  24
  25 #include <linux/platform_device.h>
  26 #include <linux/io.h>
  27 #include <linux/of.h>
  28 #include <linux/of_net.h>
  29 #include <linux/gpio.h>
  30 #include <linux/of_gpio.h>
  31 #include <linux/of_device.h>
  32 #include <dt-bindings/gpio/gpio.h>
  33 #include "stmmac.h"
  34 #include <linux/rockchip/iomap.h>
  35 #include <linux/rockchip/grf.h>
  36 #include <linux/regulator/consumer.h>
  37
  38 #define grf_readl(offset)       readl_relaxed(RK_GRF_VIRT + offset)
  39 #define grf_writel(v, offset)   do { writel_relaxed(v, RK_GRF_VIRT + offset); dsb(); } while (0)
  40
  41 //RK3288_GRF_SOC_CON1
  42 //RK3128_GRF_MAC_CON1
  43 #define GMAC_PHY_INTF_SEL_RGMII ((0x01C0 << 16) | (0x0040))
  44 #define GMAC_PHY_INTF_SEL_RMII  ((0x01C0 << 16) | (0x0100))
  45 #define GMAC_FLOW_CTRL          ((0x0200 << 16) | (0x0200))
  46 #define GMAC_FLOW_CTRL_CLR      ((0x0200 << 16) | (0x0000))
  47 #define GMAC_SPEED_10M          ((0x0400 << 16) | (0x0000))
  48 #define GMAC_SPEED_100M         ((0x0400 << 16) | (0x0400))
  49 #define GMAC_RMII_CLK_25M       ((0x0800 << 16) | (0x0800))
  50 #define GMAC_RMII_CLK_2_5M      ((0x0800 << 16) | (0x0000))
  51 #define GMAC_CLK_125M           ((0x3000 << 16) | (0x0000))
  52 #define GMAC_CLK_25M            ((0x3000 << 16) | (0x3000))
  53 #define GMAC_CLK_2_5M           ((0x3000 << 16) | (0x2000))
  54 #define GMAC_RMII_MODE          ((0x4000 << 16) | (0x4000))
  55 #define GMAC_RMII_MODE_CLR      ((0x4000 << 16) | (0x0000))
  56
  57 //RK3288_GRF_SOC_CON3
  58 //RK3128_GRF_MAC_CON0
  59 #define GMAC_TXCLK_DLY_ENABLE   ((0x4000 << 16) | (0x4000))
  60 #define GMAC_TXCLK_DLY_DISABLE  ((0x4000 << 16) | (0x0000))
  61 #define GMAC_RXCLK_DLY_ENABLE   ((0x8000 << 16) | (0x8000))
  62 #define GMAC_RXCLK_DLY_DISABLE  ((0x8000 << 16) | (0x0000))
  63 #define GMAC_CLK_RX_DL_CFG(val) ((0x3F80 << 16) | (val<<7))        // 7bit
  64 #define GMAC_CLK_TX_DL_CFG(val) ((0x007F << 16) | (val))           // 7bit
  65
  66
  67 #if 0 //3288
  68 #define SET_RGMII       {       \
  69                                 grf_writel(GMAC_PHY_INTF_SEL_RGMII, RK3288_GRF_SOC_CON1);       \
  70                                 grf_writel(GMAC_RMII_MODE_CLR, RK3288_GRF_SOC_CON1);    \
  71                                 grf_writel(GMAC_RXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3); \
  72                                 grf_writel(GMAC_TXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3); \
  73                                 grf_writel(GMAC_CLK_RX_DL_CFG(0x10), RK3288_GRF_SOC_CON3);      \
  74                                 grf_writel(GMAC_CLK_TX_DL_CFG(0x30), RK3288_GRF_SOC_CON3);      \
  75                                 grf_writel(0xffffffff,RK3288_GRF_GPIO3D_E);     \
  76                                 grf_writel(grf_readl(RK3288_GRF_GPIO4B_E) | 0x3<<2<<16 | 0x3<<2, RK3288_GRF_GPIO4B_E);  \
  77                                 grf_writel(0xffffffff,RK3288_GRF_GPIO4A_E);     \
  78                         }
  79
  80 #define SET_RMII        {       \
  81                                 grf_writel(GMAC_PHY_INTF_SEL_RMII, RK3288_GRF_SOC_CON1);        \
  82                                 grf_writel(GMAC_RMII_MODE, RK3288_GRF_SOC_CON1);        \
  83                         }
  84
  85 #define SET_RGMII_10M   {       \
  86                                 grf_writel(GMAC_CLK_2_5M, RK3288_GRF_SOC_CON1); \
  87                         }
  88
  89 #define SET_RGMII_100M  {       \
  90                                 grf_writel(GMAC_CLK_25M, RK3288_GRF_SOC_CON1);  \
  91                         }
  92
  93 #define SET_RGMII_1000M {       \
  94                                 grf_writel(GMAC_CLK_125M, RK3288_GRF_SOC_CON1); \
  95                         }
  96
  97 #define SET_RMII_10M    {       \
  98                                 grf_writel(GMAC_RMII_CLK_2_5M, RK3288_GRF_SOC_CON1);    \
  99                                 grf_writel(GMAC_SPEED_10M, RK3288_GRF_SOC_CON1);        \
 100                         }
 101
 102 #define SET_RMII_100M   {       \
 103                                 grf_writel(GMAC_RMII_CLK_25M, RK3288_GRF_SOC_CON1);     \
 104                                 grf_writel(GMAC_SPEED_100M, RK3288_GRF_SOC_CON1);       \
 105                         }
 106 #else //3128
 107 #define SET_RGMII       {       \
 108                                 grf_writel(GMAC_PHY_INTF_SEL_RGMII, RK312X_GRF_MAC_CON1);       \
 109                                 grf_writel(GMAC_RMII_MODE_CLR, RK312X_GRF_MAC_CON1);            \
 110                                 grf_writel(GMAC_RXCLK_DLY_ENABLE, RK312X_GRF_MAC_CON0);         \
 111                                 grf_writel(GMAC_TXCLK_DLY_ENABLE, RK312X_GRF_MAC_CON0);         \
 112                                 grf_writel(GMAC_CLK_RX_DL_CFG(0x10), RK312X_GRF_MAC_CON0);      \
 113                                 grf_writel(GMAC_CLK_TX_DL_CFG(0x30), RK312X_GRF_MAC_CON0);      \
 114                         }
 115
 116 #define SET_RMII        {       \
 117                                 grf_writel(GMAC_PHY_INTF_SEL_RMII, RK312X_GRF_MAC_CON1);        \
 118                                 grf_writel(GMAC_RMII_MODE, RK312X_GRF_MAC_CON1);        \
 119                         }
 120
 121 #define SET_RGMII_10M   {       \
 122                                 grf_writel(GMAC_CLK_2_5M, RK312X_GRF_MAC_CON1); \
 123                         }
 124
 125 #define SET_RGMII_100M  {       \
 126                                 grf_writel(GMAC_CLK_25M, RK312X_GRF_MAC_CON1);  \
 127                         }
 128
 129 #define SET_RGMII_1000M {       \
 130                                 grf_writel(GMAC_CLK_125M, RK312X_GRF_MAC_CON1); \
 131                         }
 132
 133 #define SET_RMII_10M    {       \
 134                                 grf_writel(GMAC_RMII_CLK_2_5M, RK312X_GRF_MAC_CON1);    \
 135                                 grf_writel(GMAC_SPEED_10M, RK312X_GRF_MAC_CON1);        \
 136                         }
 137
 138 #define SET_RMII_100M   {       \
 139                                 grf_writel(GMAC_RMII_CLK_25M, RK312X_GRF_MAC_CON1);     \
 140                                 grf_writel(GMAC_SPEED_100M, RK312X_GRF_MAC_CON1);       \
 141                         }
 142
 143 #endif
 144
 145 struct bsp_priv g_bsp_priv;
 146
 147 int gmac_clk_init(struct device *device)
 148 {
 149         struct bsp_priv * bsp_priv = &g_bsp_priv;
 150
 151         bsp_priv->clk_enable = false;
 152
 153         bsp_priv->mac_clk_rx = clk_get(device,"mac_clk_rx");
 154         if (IS_ERR(bsp_priv->mac_clk_rx)) {
 155                 pr_warn("%s: warning: cannot get mac_clk_rx clock\n", __func__);
 156         }
 157
 158         bsp_priv->mac_clk_tx = clk_get(device,"mac_clk_tx");
 159         if (IS_ERR(bsp_priv->mac_clk_tx)) {
 160                 pr_warn("%s: warning: cannot get mac_clk_tx clock\n", __func__);
 161         }
 162
 163         bsp_priv->clk_mac_ref = clk_get(device,"clk_mac_ref");
 164         if (IS_ERR(bsp_priv->clk_mac_ref)) {
 165                 pr_warn("%s: warning: cannot get clk_mac_ref clock\n", __func__);
 166         }
 167
 168         bsp_priv->clk_mac_refout = clk_get(device,"clk_mac_refout");
 169         if (IS_ERR(bsp_priv->clk_mac_refout)) {
 170                 pr_warn("%s: warning: cannot get clk_mac_refout clock\n", __func__);
 171         }
 172
 173         bsp_priv->aclk_mac = clk_get(device,"aclk_mac");
 174         if (IS_ERR(bsp_priv->aclk_mac)) {
 175                 pr_warn("%s: warning: cannot get aclk_mac clock\n", __func__);
 176         }
 177
 178         bsp_priv->pclk_mac = clk_get(device,"pclk_mac");
 179         if (IS_ERR(bsp_priv->pclk_mac)) {
 180                 pr_warn("%s: warning: cannot get pclk_mac clock\n", __func__);
 181         }
 182
 183         bsp_priv->clk_mac_pll = clk_get(device,"clk_mac_pll");
 184         if (IS_ERR(bsp_priv->clk_mac_pll)) {
 185                 pr_warn("%s: warning: cannot get clk_mac_pll clock\n", __func__);
 186         }
 187
 188         bsp_priv->gmac_clkin = clk_get(device,"gmac_clkin");
 189         if (IS_ERR(bsp_priv->gmac_clkin)) {
 190                 pr_warn("%s: warning: cannot get gmac_clkin clock\n", __func__);
 191         }
 192
 193         bsp_priv->clk_mac = clk_get(device, "clk_mac");
 194         if (IS_ERR(bsp_priv->clk_mac)) {
 195                 pr_warn("%s: warning: cannot get clk_mac clock\n", __func__);
 196         }
 197
 198 #ifdef CONFIG_GMAC_CLK_IN
 199         clk_set_parent(bsp_priv->clk_mac, bsp_priv->gmac_clkin);
 200 #else
 201         clk_set_parent(bsp_priv->clk_mac, bsp_priv->clk_mac_pll);
 202 #endif
 203         return 0;
 204 }
 205
 206 static int gmac_clk_enable(bool enable) {
 207         int phy_iface = -1;
 208         struct bsp_priv * bsp_priv = &g_bsp_priv;
 209         phy_iface = bsp_priv->phy_iface;
 210
 211         if (enable) {
 212                 if (!bsp_priv->clk_enable) {
 213                         if (phy_iface == PHY_INTERFACE_MODE_RMII) {
 214                                 if (!IS_ERR(bsp_priv->clk_mac))
 215                                         clk_set_rate(bsp_priv->clk_mac, 50000000);
 216
 217                                 if (!IS_ERR(bsp_priv->mac_clk_rx))
 218                                         clk_prepare_enable(bsp_priv->mac_clk_rx);
 219
 220                                 if (!IS_ERR(bsp_priv->clk_mac_ref))
 221                                         clk_prepare_enable(bsp_priv->clk_mac_ref);
 222
 223                                 if (!IS_ERR(bsp_priv->clk_mac_refout))
 224                                         clk_prepare_enable(bsp_priv->clk_mac_refout);
 225                         }
 226
 227                         if (!IS_ERR(bsp_priv->aclk_mac))
 228                                 clk_prepare_enable(bsp_priv->aclk_mac);
 229
 230                         if (!IS_ERR(bsp_priv->pclk_mac))
 231                                 clk_prepare_enable(bsp_priv->pclk_mac);
 232
 233                         if (!IS_ERR(bsp_priv->mac_clk_tx))
 234                                 clk_prepare_enable(bsp_priv->mac_clk_tx);
 235
 236                         if (!IS_ERR(bsp_priv->clk_mac))
 237                                 clk_prepare_enable(bsp_priv->clk_mac);
 238
 239
 240                         bsp_priv->clk_enable = true;
 241                 }
 242         } else {
 243                 if (bsp_priv->clk_enable) {
 244                         if (phy_iface == PHY_INTERFACE_MODE_RMII) {
 245                                 if (!IS_ERR(bsp_priv->mac_clk_rx))
 246                                         clk_disable_unprepare(bsp_priv->mac_clk_rx);
 247
 248                                 if (!IS_ERR(bsp_priv->clk_mac_ref))
 249                                         clk_disable_unprepare(bsp_priv->clk_mac_ref);
 250
 251                                 if (!IS_ERR(bsp_priv->clk_mac_refout))
 252                                         clk_disable_unprepare(bsp_priv->clk_mac_refout);
 253                         }
 254
 255                         if (!IS_ERR(bsp_priv->aclk_mac))
 256                                 clk_disable_unprepare(bsp_priv->aclk_mac);
 257
 258                         if (!IS_ERR(bsp_priv->pclk_mac))
 259                                 clk_disable_unprepare(bsp_priv->pclk_mac);
 260
 261                         if (!IS_ERR(bsp_priv->mac_clk_tx))
 262                                 clk_disable_unprepare(bsp_priv->mac_clk_tx);
 263
 264                         if (!IS_ERR(bsp_priv->clk_mac))
 265                                 clk_disable_unprepare(bsp_priv->clk_mac);
 266
 267                         bsp_priv->clk_enable = false;
 268                 }
 269         }
 270
 271         return 0;
 272 }
 273
 274 static int power_on_by_pmu(bool enable) {
 275         struct bsp_priv * bsp_priv = &g_bsp_priv;
 276         struct regulator * ldo;
 277         char * ldostr = bsp_priv->pmu_regulator;
 278         int ret;
 279
 280         if (ldostr == NULL) {
 281                 pr_err("%s: no ldo found\n", __func__);
 282                 return -1;
 283         }
 284
 285         ldo = regulator_get(NULL, ldostr);
 286         if (ldo == NULL) {
 287                 pr_err("\n%s get ldo %s failed\n", __func__, ldostr);
 288         } else {
 289                 if (enable) {
 290                         if(!regulator_is_enabled(ldo)) {
 291                                 regulator_set_voltage(ldo, 3300000, 3300000);
 292                                 ret = regulator_enable(ldo);
 293                                 if(ret != 0){
 294                                         pr_err("%s: faild to enable %s\n", __func__, ldostr);
 295                                 } else {
 296                                         pr_info("turn on ldo done.\n");
 297                                 }
 298                         } else {
 299                                 pr_warn("%s is enabled before enable", ldostr);
 300                         }
 301                 } else {
 302                         if(regulator_is_enabled(ldo)) {
 303                                 ret = regulator_disable(ldo);
 304                                 if(ret != 0){
 305                                         pr_err("%s: faild to disable %s\n", __func__, ldostr);
 306                                 } else {
 307                                         pr_info("turn off ldo done.\n");
 308                                 }
 309                         } else {
 310                                 pr_warn("%s is disabled before disable", ldostr);
 311                         }
 312                 }
 313                 regulator_put(ldo);
 314                 msleep(100);
 315
 316                 if (enable) {
 317                         //reset
 318                         if (gpio_is_valid(bsp_priv->reset_io)) {
 319                                 gpio_direction_output(bsp_priv->reset_io, bsp_priv->reset_io_level);
 320                                 msleep(10);
 321                                 gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
 322                         }
 323
 324                         msleep(100);
 325                 } else {
 326                         //pull up reset
 327                         if (gpio_is_valid(bsp_priv->reset_io)) {
 328                                 gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
 329                         }
 330                 }
 331
 332         }
 333
 334         return 0;
 335 }
 336
 337 static int power_on_by_gpio(bool enable) {
 338         struct bsp_priv * bsp_priv = &g_bsp_priv;
 339         if (enable) {
 340                 //power on
 341                 if (gpio_is_valid(bsp_priv->power_io)) {
 342                         gpio_direction_output(bsp_priv->power_io, bsp_priv->power_io_level);
 343                 }
 344
 345                 //reset
 346                 if (gpio_is_valid(bsp_priv->reset_io)) {
 347                         gpio_direction_output(bsp_priv->reset_io, bsp_priv->reset_io_level);
 348                         msleep(10);
 349                         gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
 350                 }
 351                 msleep(100);
 352         } else {
 353                 //power off
 354                 if (gpio_is_valid(bsp_priv->power_io)) {
 355                         gpio_direction_output(bsp_priv->power_io, !bsp_priv->power_io_level);
 356                 }
 357                 //pull down reset
 358                 if (gpio_is_valid(bsp_priv->reset_io)) {
 359                         gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
 360                 }
 361         }
 362
 363         return 0;
 364 }
 365
 366 static int phy_power_on(bool enable)
 367 {
 368         struct bsp_priv *bsp_priv = &g_bsp_priv;
 369         printk("%s: enable = %d \n", __func__, enable);
 370
 371         if (bsp_priv->power_ctrl_by_pmu) {
 372                 return power_on_by_pmu(enable);
 373         } else {
 374                 return power_on_by_gpio(enable);
 375         }
 376 }
 377
 378 int stmmc_pltfr_init(struct platform_device *pdev) {
 379         int phy_iface;
 380         int err;
 381         struct bsp_priv *bsp_priv;
 382
 383         pr_info("%s: \n", __func__);
 384
 385 //iomux
 386 #if 0
 387         if ((pdev->dev.pins) && (pdev->dev.pins->p)) {
 388                 gmac_state = pinctrl_lookup_state(pdev->dev.pins->p, "default");
 389                 if (IS_ERR(gmac_state)) {
 390                                 dev_err(&pdev->dev, "no gmc pinctrl state\n");
 391                                 return -1;
 392                 }
 393
 394                 pinctrl_select_state(pdev->dev.pins->p, gmac_state);
 395         }
 396 #endif
 397
 398         bsp_priv = &g_bsp_priv;
 399         phy_iface = bsp_priv->phy_iface;
 400 //power
 401         if (!gpio_is_valid(bsp_priv->power_io)) {
 402                 pr_err("%s: ERROR: Get power-gpio failed.\n", __func__);
 403         } else {
 404                 err = gpio_request(bsp_priv->power_io, "gmac_phy_power");
 405                 if (err) {
 406                         pr_err("%s: ERROR: Request gmac phy power pin failed.\n", __func__);
 407                 }
 408         }
 409
 410         if (!gpio_is_valid(bsp_priv->reset_io)) {
 411                 pr_err("%s: ERROR: Get reset-gpio failed.\n", __func__);
 412         } else {
 413                 err = gpio_request(bsp_priv->reset_io, "gmac_phy_reset");
 414                 if (err) {
 415                         pr_err("%s: ERROR: Request gmac phy reset pin failed.\n", __func__);
 416                 }
 417         }
 418 //rmii or rgmii
 419         if (phy_iface == PHY_INTERFACE_MODE_RGMII) {
 420                 pr_info("%s: init for RGMII\n", __func__);
 421                 SET_RGMII
 422         } else if (phy_iface == PHY_INTERFACE_MODE_RMII) {
 423                 pr_info("%s: init for RMII\n", __func__);
 424                 SET_RMII
 425         } else {
 426                 pr_err("%s: ERROR: NO interface defined!\n", __func__);
 427         }
 428
 429         return 0;
 430 }
 431
 432 void stmmc_pltfr_fix_mac_speed(void *priv, unsigned int speed){
 433         struct bsp_priv * bsp_priv = priv;
 434         int interface;
 435
 436         pr_info("%s: fix speed to %d\n", __func__, speed);
 437
 438         if (bsp_priv) {
 439                 interface = bsp_priv->phy_iface;
 440         }
 441
 442         if (interface == PHY_INTERFACE_MODE_RGMII) {
 443                 pr_info("%s: fix speed for RGMII\n", __func__);
 444
 445                 switch (speed) {
 446                         case 10: {
 447                                 SET_RGMII_10M
 448                                 break;
 449                         }
 450                         case 100: {
 451                                 SET_RGMII_100M
 452                                 break;
 453                         }
 454                         case 1000: {
 455                                 SET_RGMII_1000M
 456                                 break;
 457                         }
 458                         default: {
 459                                 pr_err("%s: ERROR: speed %d is not defined!\n", __func__, speed);
 460                         }
 461                 }
 462
 463         } else if (interface == PHY_INTERFACE_MODE_RMII) {
 464                 pr_info("%s: fix speed for RMII\n", __func__);
 465                 switch (speed) {
 466                         case 10: {
 467                                 SET_RMII_10M
 468                                 break;
 469                         }
 470                         case 100: {
 471                                 SET_RMII_100M
 472                                 break;
 473                         }
 474                         default: {
 475                                 pr_err("%s: ERROR: speed %d is not defined!\n", __func__, speed);
 476                         }
 477                 }
 478         } else {
 479                 pr_err("%s: ERROR: NO interface defined!\n", __func__);
 480         }
 481 }
 482
 483
 484 #ifdef CONFIG_OF
 485 static int stmmac_probe_config_dt(struct platform_device *pdev,
 486                                   struct plat_stmmacenet_data *plat,
 487                                   const char **mac)
 488 {
 489         struct device_node *np = pdev->dev.of_node;
 490         enum of_gpio_flags flags;
 491         int ret;
 492         const char * strings = NULL;
 493         int value;
 494
 495         if (!np)
 496                 return -ENODEV;
 497
 498         *mac = of_get_mac_address(np);
 499         plat->interface = of_get_phy_mode(np);
 500 //don't care about the return value of of_get_phy_mode(np)
 501 #ifdef CONFIG_GMAC_PHY_RMII
 502         plat->interface = PHY_INTERFACE_MODE_RMII;
 503 #else
 504         plat->interface = PHY_INTERFACE_MODE_RGMII;
 505 #endif
 506
 507         plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
 508                                            sizeof(struct stmmac_mdio_bus_data),
 509                                            GFP_KERNEL);
 510
 511         plat->init = stmmc_pltfr_init;
 512         plat->fix_mac_speed = stmmc_pltfr_fix_mac_speed;
 513
 514         ret = of_property_read_string(np, "pmu_regulator", &strings);
 515         if (ret) {
 516                 pr_err("%s: Can not read property: pmu_regulator.\n", __func__);
 517                 g_bsp_priv.power_ctrl_by_pmu = false;
 518         } else {
 519                 pr_info("%s: ethernet phy power controled by pmu(%s).\n", __func__, strings);
 520                 g_bsp_priv.power_ctrl_by_pmu = true;
 521                 strcpy(g_bsp_priv.pmu_regulator, strings);
 522         }
 523         ret = of_property_read_u32(np, "pmu_enable_level", &value);
 524         if (ret) {
 525                 pr_err("%s: Can not read property: pmu_enable_level.\n", __func__);
 526                 g_bsp_priv.power_ctrl_by_pmu = false;
 527         } else {
 528                 pr_info("%s: ethernet phy power controled by pmu(level = %s).\n", __func__, (value == 1)?"HIGH":"LOW");
 529                 g_bsp_priv.power_ctrl_by_pmu = true;
 530                 g_bsp_priv.pmu_enable_level = value;
 531         }
 532
 533         g_bsp_priv.reset_io =
 534                         of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
 535         g_bsp_priv.reset_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
 536         g_bsp_priv.power_io =
 537                         of_get_named_gpio_flags(np, "power-gpio", 0, &flags);
 538         g_bsp_priv.power_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
 539
 540         g_bsp_priv.phy_iface = plat->interface;
 541         g_bsp_priv.phy_power_on = phy_power_on;
 542         g_bsp_priv.gmac_clk_enable = gmac_clk_enable;
 543
 544         plat->bsp_priv = &g_bsp_priv;
 545
 546         /*
 547          * Currently only the properties needed on SPEAr600
 548          * are provided. All other properties should be added
 549          * once needed on other platforms.
 550          */
 551         if (of_device_is_compatible(np, "rockchip,gmac")) {
 552                 plat->has_gmac = 1;
 553                 plat->pmt = 1;
 554         }
 555
 556         return 0;
 557 }
 558 #else
 559 static int stmmac_probe_config_dt(struct platform_device *pdev,
 560                                   struct plat_stmmacenet_data *plat,
 561                                   const char **mac)
 562 {
 563         return -ENOSYS;
 564 }
 565 #endif /* CONFIG_OF */
 566
 567 static struct class *vmac_class = NULL;
 568 static CLASS_ATTR(exist, 0664, NULL, NULL);
 569 int rockchip_gmac_sysif_init(void)
 570 {
 571        int ret;
 572
 573        vmac_class = class_create(THIS_MODULE, "vmac");
 574        ret = class_create_file(vmac_class, &class_attr_exist);
 575        if(ret) {
 576            printk("%s: Fail to creat class\n",__func__);
 577            return ret;
 578        }
 579        return 0;
 580 }
 581
 582 /**
 583  * stmmac_pltfr_probe
 584  * @pdev: platform device pointer
 585  * Description: platform_device probe function. It allocates
 586  * the necessary resources and invokes the main to init
 587  * the net device, register the mdio bus etc.
 588  */
 589 static int stmmac_pltfr_probe(struct platform_device *pdev)
 590 {
 591         int ret = 0;
 592         struct resource *res;
 593         struct device *dev = &pdev->dev;
 594         void __iomem *addr = NULL;
 595         struct stmmac_priv *priv = NULL;
 596         struct plat_stmmacenet_data *plat_dat = NULL;
 597         const char *mac = NULL;
 598
 599         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 600         if (!res)
 601                 return -ENODEV;
 602
 603         addr = devm_ioremap_resource(dev, res);
 604         if (IS_ERR(addr))
 605                 return PTR_ERR(addr);
 606
 607         if (pdev->dev.of_node) {
 608                 plat_dat = devm_kzalloc(&pdev->dev,
 609                                         sizeof(struct plat_stmmacenet_data),
 610                                         GFP_KERNEL);
 611                 if (!plat_dat) {
 612                         pr_err("%s: ERROR: no memory", __func__);
 613                         return  -ENOMEM;
 614                 }
 615
 616                 ret = stmmac_probe_config_dt(pdev, plat_dat, &mac);
 617                 if (ret) {
 618                         pr_err("%s: main dt probe failed", __func__);
 619                         return ret;
 620                 }
 621         } else {
 622                 plat_dat = pdev->dev.platform_data;
 623         }
 624
 625         /* Custom initialisation (if needed)*/
 626         if (plat_dat->init) {
 627                 ret = plat_dat->init(pdev);
 628                 if (unlikely(ret))
 629                         return ret;
 630         }
 631
 632         gmac_clk_init(&(pdev->dev));
 633
 634         priv = stmmac_dvr_probe(&(pdev->dev), plat_dat, addr);
 635         if (!priv) {
 636                 pr_err("%s: main driver probe failed", __func__);
 637                 return -ENODEV;
 638         }
 639
 640
 641         /* Get MAC address if available (DT) */
 642         if (mac)
 643                 memcpy(priv->dev->dev_addr, mac, ETH_ALEN);
 644
 645         /* Get the MAC information */
 646         priv->dev->irq = platform_get_irq_byname(pdev, "macirq");
 647         if (priv->dev->irq == -ENXIO) {
 648                 pr_err("%s: ERROR: MAC IRQ configuration "
 649                        "information not found\n", __func__);
 650                 return -ENXIO;
 651         }
 652
 653         /*
 654          * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
 655          * The external wake up irq can be passed through the platform code
 656          * named as "eth_wake_irq"
 657          *
 658          * In case the wake up interrupt is not passed from the platform
 659          * so the driver will continue to use the mac irq (ndev->irq)
 660          */
 661         priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
 662         if (priv->wol_irq == -ENXIO)
 663                 priv->wol_irq = priv->dev->irq;
 664
 665         priv->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
 666
 667         platform_set_drvdata(pdev, priv->dev);
 668
 669         rockchip_gmac_sysif_init();
 670
 671         pr_debug("STMMAC platform driver registration completed");
 672
 673         return 0;
 674 }
 675
 676 /**
 677  * stmmac_pltfr_remove
 678  * @pdev: platform device pointer
 679  * Description: this function calls the main to free the net resources
 680  * and calls the platforms hook and release the resources (e.g. mem).
 681  */
 682 static int stmmac_pltfr_remove(struct platform_device *pdev)
 683 {
 684         struct net_device *ndev = platform_get_drvdata(pdev);
 685         struct stmmac_priv *priv = netdev_priv(ndev);
 686         int ret = stmmac_dvr_remove(ndev);
 687
 688         if (priv->plat->exit)
 689                 priv->plat->exit(pdev);
 690
 691         platform_set_drvdata(pdev, NULL);
 692
 693         return ret;
 694 }
 695
 696 #ifdef CONFIG_PM
 697 static int stmmac_pltfr_suspend(struct device *dev)
 698 {
 699         struct net_device *ndev = dev_get_drvdata(dev);
 700
 701         return stmmac_suspend(ndev);
 702 }
 703
 704 static int stmmac_pltfr_resume(struct device *dev)
 705 {
 706         struct net_device *ndev = dev_get_drvdata(dev);
 707
 708         return stmmac_resume(ndev);
 709 }
 710
 711 int stmmac_pltfr_freeze(struct device *dev)
 712 {
 713         int ret;
 714         struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
 715         struct net_device *ndev = dev_get_drvdata(dev);
 716         struct platform_device *pdev = to_platform_device(dev);
 717
 718         ret = stmmac_freeze(ndev);
 719         if (plat_dat->exit)
 720                 plat_dat->exit(pdev);
 721
 722         return ret;
 723 }
 724
 725 int stmmac_pltfr_restore(struct device *dev)
 726 {
 727         struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
 728         struct net_device *ndev = dev_get_drvdata(dev);
 729         struct platform_device *pdev = to_platform_device(dev);
 730
 731         if (plat_dat->init)
 732                 plat_dat->init(pdev);
 733
 734         return stmmac_restore(ndev);
 735 }
 736
 737 static const struct dev_pm_ops stmmac_pltfr_pm_ops = {
 738         .suspend = stmmac_pltfr_suspend,
 739         .resume = stmmac_pltfr_resume,
 740         .freeze = stmmac_pltfr_freeze,
 741         .thaw = stmmac_pltfr_restore,
 742         .restore = stmmac_pltfr_restore,
 743 };
 744 #else
 745 static const struct dev_pm_ops stmmac_pltfr_pm_ops;
 746 #endif /* CONFIG_PM */
 747
 748 static const struct of_device_id stmmac_dt_ids[] = {
 749         { .compatible = "rockchip,gmac"},
 750         { /* sentinel */ }
 751 };
 752 MODULE_DEVICE_TABLE(of, stmmac_dt_ids);
 753
 754 struct platform_driver stmmac_pltfr_driver = {
 755         .probe = stmmac_pltfr_probe,
 756         .remove = stmmac_pltfr_remove,
 757         .driver = {
 758                    .name = STMMAC_RESOURCE_NAME,
 759                    .owner = THIS_MODULE,
 760                    .pm = &stmmac_pltfr_pm_ops,
 761                    .of_match_table = of_match_ptr(stmmac_dt_ids),
 762                    },
 763 };
 764
 765 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet PLATFORM driver");
 766 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
 767 MODULE_LICENSE("GPL");