1 /*******************************************************************************
2 This contains the functions to handle the platform driver.
4 Copyright (C) 2007-2011 STMicroelectronics Ltd
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23 *******************************************************************************/
25 #include <linux/platform_device.h>
28 #include <linux/of_net.h>
29 #include <linux/gpio.h>
30 #include <linux/of_gpio.h>
31 #include <linux/of_device.h>
32 #include <dt-bindings/gpio/gpio.h>
34 #include <linux/rockchip/iomap.h>
35 #include <linux/rockchip/grf.h>
36 #include <linux/regulator/consumer.h>
38 #define grf_readl(offset) readl_relaxed(RK_GRF_VIRT + offset)
39 #define grf_writel(v, offset) do { writel_relaxed(v, RK_GRF_VIRT + offset); dsb(); } while (0)
41 // RK3288_GRF_SOC_CON1
42 #define GMAC_PHY_INTF_SEL_RGMII ((0x01C0 << 16) | (0x0040))
43 #define GMAC_PHY_INTF_SEL_RMII ((0x01C0 << 16) | (0x0100))
44 #define GMAC_FLOW_CTRL ((0x0200 << 16) | (0x0200))
45 #define GMAC_FLOW_CTRL_CLR ((0x0200 << 16) | (0x0000))
46 #define GMAC_SPEED_10M ((0x0400 << 16) | (0x0000))
47 #define GMAC_SPEED_100M ((0x0400 << 16) | (0x0400))
48 #define GMAC_RMII_CLK_25M ((0x0800 << 16) | (0x0800))
49 #define GMAC_RMII_CLK_2_5M ((0x0800 << 16) | (0x0000))
50 #define GMAC_CLK_125M ((0x3000 << 16) | (0x0000))
51 #define GMAC_CLK_25M ((0x3000 << 16) | (0x3000))
52 #define GMAC_CLK_2_5M ((0x3000 << 16) | (0x2000))
53 #define GMAC_RMII_MODE ((0x4000 << 16) | (0x4000))
54 #define GMAC_RMII_MODE_CLR ((0x4000 << 16) | (0x0000))
56 // RK3288_GRF_SOC_CON3
57 #define GMAC_TXCLK_DLY_ENABLE ((0x4000 << 16) | (0x4000))
58 #define GMAC_TXCLK_DLY_DISABLE ((0x4000 << 16) | (0x0000))
59 #define GMAC_RXCLK_DLY_ENABLE ((0x8000 << 16) | (0x8000))
60 #define GMAC_RXCLK_DLY_DISABLE ((0x8000 << 16) | (0x0000))
62 #define GMAC_CLK_RX_DL_CFG ((0x3F80 << 16) | (0x0800))
63 #define GMAC_CLK_TX_DL_CFG ((0x007F << 16) | (0x0040))
65 #define GMAC_CLK_RX_DL_CFG(val) ((0x3F80 << 16) | (val<<7)) // 7bit
66 #define GMAC_CLK_TX_DL_CFG(val) ((0x007F << 16) | (val)) // 7bit
68 struct bsp_priv g_bsp_priv;
70 static int phy_power_on(struct plat_stmmacenet_data *plat, int enable)
72 struct bsp_priv * bsp_priv;
75 printk("%s: enable = %d \n", __func__, enable);
77 if ((plat) && (plat->bsp_priv)) {
78 bsp_priv = plat->bsp_priv;
80 pr_err("%s: ERROR: platform data or private data is NULL.\n", __FUNCTION__);
86 if (gpio_is_valid(bsp_priv->power_io)) {
87 gpio_direction_output(bsp_priv->power_io, !bsp_priv->power_io_level);
89 gpio_direction_output(bsp_priv->power_io, bsp_priv->power_io_level);
90 //gpio_set_value(bsp_priv->power_io, 1);
94 if (gpio_is_valid(bsp_priv->reset_io)) {
95 gpio_direction_output(bsp_priv->reset_io, bsp_priv->reset_io_level);
96 //gpio_set_value(bsp_priv->reset_io, 0);
98 gpio_direction_output(bsp_priv->reset_io, !bsp_priv->reset_io_level);
103 if (gpio_is_valid(bsp_priv->power_io)) {
104 gpio_direction_output(bsp_priv->power_io, !bsp_priv->power_io_level);
105 //gpio_set_value(bsp_priv->power_io, 0);
112 int stmmc_pltfr_init(struct platform_device *pdev) {
115 struct bsp_priv *bsp_priv;
117 pr_info("%s: \n", __func__);
121 if ((pdev->dev.pins) && (pdev->dev.pins->p)) {
122 gmac_state = pinctrl_lookup_state(pdev->dev.pins->p, "default");
123 if (IS_ERR(gmac_state)) {
124 dev_err(&pdev->dev, "no gmc pinctrl state\n");
128 pinctrl_select_state(pdev->dev.pins->p, gmac_state);
132 bsp_priv = &g_bsp_priv;
133 phy_iface = bsp_priv->phy_iface;
135 if (!gpio_is_valid(bsp_priv->power_io)) {
136 pr_err("%s: ERROR: Get power-gpio failed.\n", __func__);
139 err = gpio_request(bsp_priv->power_io, "gmac_phy_power");
141 pr_err("%s: ERROR: Request gmac phy power pin failed.\n", __func__);
146 if (!gpio_is_valid(bsp_priv->reset_io)) {
147 pr_err("%s: ERROR: Get reset-gpio failed.\n", __func__);
150 err = gpio_request(bsp_priv->reset_io, "gmac_phy_reset");
152 pr_err("%s: ERROR: Request gmac phy reset pin failed.\n", __func__);
157 if (phy_iface == PHY_INTERFACE_MODE_RGMII) {
158 pr_info("%s: init for RGMII\n", __func__);
159 grf_writel(GMAC_PHY_INTF_SEL_RGMII, RK3288_GRF_SOC_CON1);
160 grf_writel(GMAC_RMII_MODE_CLR, RK3288_GRF_SOC_CON1);
161 grf_writel(GMAC_RXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
162 grf_writel(GMAC_TXCLK_DLY_ENABLE, RK3288_GRF_SOC_CON3);
163 grf_writel(GMAC_CLK_RX_DL_CFG(0x10), RK3288_GRF_SOC_CON3);
164 grf_writel(GMAC_CLK_TX_DL_CFG(0x30), RK3288_GRF_SOC_CON3);
165 grf_writel(0xffffffff,RK3288_GRF_GPIO3D_E);
166 grf_writel(grf_readl(RK3288_GRF_GPIO4B_E) | 0x3<<2<<16 | 0x3<<2, RK3288_GRF_GPIO4B_E);
167 grf_writel(0xffffffff,RK3288_GRF_GPIO4A_E);
169 } else if (phy_iface == PHY_INTERFACE_MODE_RMII) {
170 pr_info("%s: init for RMII\n", __func__);
171 grf_writel(GMAC_PHY_INTF_SEL_RMII, RK3288_GRF_SOC_CON1);
172 grf_writel(GMAC_RMII_MODE, RK3288_GRF_SOC_CON1);
174 pr_err("%s: ERROR: NO interface defined!\n", __func__);
180 void stmmc_pltfr_fix_mac_speed(void *priv, unsigned int speed){
181 struct bsp_priv * bsp_priv = priv;
184 pr_info("%s: fix speed to %d\n", __func__, speed);
187 interface = bsp_priv->phy_iface;
190 if (interface == PHY_INTERFACE_MODE_RGMII) {
191 pr_info("%s: fix speed for RGMII\n", __func__);
195 grf_writel(GMAC_CLK_2_5M, RK3288_GRF_SOC_CON1);
199 grf_writel(GMAC_CLK_25M, RK3288_GRF_SOC_CON1);
203 grf_writel(GMAC_CLK_125M, RK3288_GRF_SOC_CON1);
207 pr_err("%s: ERROR: speed %d is not defined!\n", __func__, speed);
211 } else if (interface == PHY_INTERFACE_MODE_RMII) {
212 pr_info("%s: fix speed for RMII\n", __func__);
215 grf_writel(GMAC_RMII_CLK_2_5M, RK3288_GRF_SOC_CON1);
216 grf_writel(GMAC_SPEED_10M, RK3288_GRF_SOC_CON1);
220 grf_writel(GMAC_RMII_CLK_25M, RK3288_GRF_SOC_CON1);
221 grf_writel(GMAC_SPEED_100M, RK3288_GRF_SOC_CON1);
225 pr_err("%s: ERROR: speed %d is not defined!\n", __func__, speed);
229 pr_err("%s: ERROR: NO interface defined!\n", __func__);
235 static int stmmac_probe_config_dt(struct platform_device *pdev,
236 struct plat_stmmacenet_data *plat,
239 struct device_node *np = pdev->dev.of_node;
240 enum of_gpio_flags flags;
242 const char * strings = NULL;
248 *mac = of_get_mac_address(np);
249 plat->interface = of_get_phy_mode(np);
250 //don't care about the return value of of_get_phy_mode(np)
251 #ifdef CONFIG_GMAC_PHY_RMII
252 plat->interface = PHY_INTERFACE_MODE_RMII;
254 plat->interface = PHY_INTERFACE_MODE_RGMII;
257 plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
258 sizeof(struct stmmac_mdio_bus_data),
261 plat->init = stmmc_pltfr_init;
262 plat->fix_mac_speed = stmmc_pltfr_fix_mac_speed;
264 ret = of_property_read_string(np, "pmu_regulator", &strings);
266 pr_err("%s: Can not read property: pmu_regulator.\n", __func__);
267 g_bsp_priv.power_ctrl_by_pmu = false;
269 pr_info("%s: ethernet phy power controled by pmu(%s).\n", __func__, strings);
270 g_bsp_priv.power_ctrl_by_pmu = true;
271 strcpy(g_bsp_priv.pmu_regulator, strings);
273 ret = of_property_read_u32(np, "pmu_enable_level", &value);
275 pr_err("%s: Can not read property: pmu_enable_level.\n", __func__);
276 g_bsp_priv.power_ctrl_by_pmu = false;
278 pr_info("%s: ethernet phy power controled by pmu(level = %s).\n", __func__, (value == 1)?"HIGH":"LOW");
279 g_bsp_priv.power_ctrl_by_pmu = true;
280 g_bsp_priv.pmu_enable_level = value;
283 g_bsp_priv.reset_io =
284 of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
285 g_bsp_priv.reset_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
286 g_bsp_priv.power_io =
287 of_get_named_gpio_flags(np, "power-gpio", 0, &flags);
288 g_bsp_priv.power_io_level = (flags == GPIO_ACTIVE_HIGH) ? 1 : 0;
290 g_bsp_priv.phy_iface = plat->interface;
291 g_bsp_priv.phy_power_on = phy_power_on;
293 plat->bsp_priv = &g_bsp_priv;
296 * Currently only the properties needed on SPEAr600
297 * are provided. All other properties should be added
298 * once needed on other platforms.
300 if (of_device_is_compatible(np, "rockchip,gmac")) {
308 static int stmmac_probe_config_dt(struct platform_device *pdev,
309 struct plat_stmmacenet_data *plat,
314 #endif /* CONFIG_OF */
318 * @pdev: platform device pointer
319 * Description: platform_device probe function. It allocates
320 * the necessary resources and invokes the main to init
321 * the net device, register the mdio bus etc.
323 static int stmmac_pltfr_probe(struct platform_device *pdev)
326 struct resource *res;
327 struct device *dev = &pdev->dev;
328 void __iomem *addr = NULL;
329 struct stmmac_priv *priv = NULL;
330 struct plat_stmmacenet_data *plat_dat = NULL;
331 const char *mac = NULL;
333 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
337 addr = devm_ioremap_resource(dev, res);
339 return PTR_ERR(addr);
341 if (pdev->dev.of_node) {
342 plat_dat = devm_kzalloc(&pdev->dev,
343 sizeof(struct plat_stmmacenet_data),
346 pr_err("%s: ERROR: no memory", __func__);
350 ret = stmmac_probe_config_dt(pdev, plat_dat, &mac);
352 pr_err("%s: ERROR: main dt probe failed", __func__);
356 plat_dat = pdev->dev.platform_data;
359 /* Custom initialisation (if needed)*/
360 if (plat_dat->init) {
361 ret = plat_dat->init(pdev);
366 priv = stmmac_dvr_probe(&(pdev->dev), plat_dat, addr);
368 pr_err("%s: ERROR: main driver probe failed", __func__);
372 /* Get MAC address if available (DT) */
374 memcpy(priv->dev->dev_addr, mac, ETH_ALEN);
376 /* Get the MAC information */
377 priv->dev->irq = platform_get_irq_byname(pdev, "macirq");
378 if (priv->dev->irq == -ENXIO) {
379 pr_err("%s: ERROR: MAC IRQ configuration "
380 "information not found\n", __func__);
385 * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
386 * The external wake up irq can be passed through the platform code
387 * named as "eth_wake_irq"
389 * In case the wake up interrupt is not passed from the platform
390 * so the driver will continue to use the mac irq (ndev->irq)
392 priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
393 if (priv->wol_irq == -ENXIO)
394 priv->wol_irq = priv->dev->irq;
396 priv->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
398 platform_set_drvdata(pdev, priv->dev);
400 pr_debug("STMMAC platform driver registration completed");
406 * stmmac_pltfr_remove
407 * @pdev: platform device pointer
408 * Description: this function calls the main to free the net resources
409 * and calls the platforms hook and release the resources (e.g. mem).
411 static int stmmac_pltfr_remove(struct platform_device *pdev)
413 struct net_device *ndev = platform_get_drvdata(pdev);
414 struct stmmac_priv *priv = netdev_priv(ndev);
415 int ret = stmmac_dvr_remove(ndev);
417 if (priv->plat->exit)
418 priv->plat->exit(pdev);
420 platform_set_drvdata(pdev, NULL);
426 static int stmmac_pltfr_suspend(struct device *dev)
428 struct net_device *ndev = dev_get_drvdata(dev);
430 return stmmac_suspend(ndev);
433 static int stmmac_pltfr_resume(struct device *dev)
435 struct net_device *ndev = dev_get_drvdata(dev);
437 return stmmac_resume(ndev);
440 int stmmac_pltfr_freeze(struct device *dev)
443 struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
444 struct net_device *ndev = dev_get_drvdata(dev);
445 struct platform_device *pdev = to_platform_device(dev);
447 ret = stmmac_freeze(ndev);
449 plat_dat->exit(pdev);
454 int stmmac_pltfr_restore(struct device *dev)
456 struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
457 struct net_device *ndev = dev_get_drvdata(dev);
458 struct platform_device *pdev = to_platform_device(dev);
461 plat_dat->init(pdev);
463 return stmmac_restore(ndev);
466 static const struct dev_pm_ops stmmac_pltfr_pm_ops = {
467 .suspend = stmmac_pltfr_suspend,
468 .resume = stmmac_pltfr_resume,
469 .freeze = stmmac_pltfr_freeze,
470 .thaw = stmmac_pltfr_restore,
471 .restore = stmmac_pltfr_restore,
474 static const struct dev_pm_ops stmmac_pltfr_pm_ops;
475 #endif /* CONFIG_PM */
477 static const struct of_device_id stmmac_dt_ids[] = {
478 { .compatible = "rockchip,gmac"},
481 MODULE_DEVICE_TABLE(of, stmmac_dt_ids);
483 struct platform_driver stmmac_pltfr_driver = {
484 .probe = stmmac_pltfr_probe,
485 .remove = stmmac_pltfr_remove,
487 .name = STMMAC_RESOURCE_NAME,
488 .owner = THIS_MODULE,
489 .pm = &stmmac_pltfr_pm_ops,
490 .of_match_table = of_match_ptr(stmmac_dt_ids),
494 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet PLATFORM driver");
495 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
496 MODULE_LICENSE("GPL");