2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
20 #include <linux/tcp.h>
21 #include <linux/skbuff.h>
22 #include <linux/firmware.h>
23 #include <linux/ethtool.h>
24 #include <linux/mii.h>
25 #include <linux/timer.h>
26 #include <linux/irq.h>
27 #include <linux/vmalloc.h>
29 #include <asm/byteorder.h>
30 #include <linux/bitops.h>
31 #include <linux/if_vlan.h>
33 #include "qlcnic_hdr.h"
34 #include "qlcnic_hw.h"
35 #include "qlcnic_83xx_hw.h"
36 #include "qlcnic_dcb.h"
38 #define _QLCNIC_LINUX_MAJOR 5
39 #define _QLCNIC_LINUX_MINOR 3
40 #define _QLCNIC_LINUX_SUBVERSION 63
41 #define QLCNIC_LINUX_VERSIONID "5.3.63"
42 #define QLCNIC_DRV_IDC_VER 0x01
43 #define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) |\
44 (_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
46 #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c))
47 #define _major(v) (((v) >> 24) & 0xff)
48 #define _minor(v) (((v) >> 16) & 0xff)
49 #define _build(v) ((v) & 0xffff)
51 /* version in image has weird encoding:
54 * 31:16 - build (little endian)
56 #define QLCNIC_DECODE_VERSION(v) \
57 QLCNIC_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
59 #define QLCNIC_MIN_FW_VERSION QLCNIC_VERSION_CODE(4, 4, 2)
60 #define QLCNIC_NUM_FLASH_SECTORS (64)
61 #define QLCNIC_FLASH_SECTOR_SIZE (64 * 1024)
62 #define QLCNIC_FLASH_TOTAL_SIZE (QLCNIC_NUM_FLASH_SECTORS \
63 * QLCNIC_FLASH_SECTOR_SIZE)
65 #define RCV_DESC_RINGSIZE(rds_ring) \
66 (sizeof(struct rcv_desc) * (rds_ring)->num_desc)
67 #define RCV_BUFF_RINGSIZE(rds_ring) \
68 (sizeof(struct qlcnic_rx_buffer) * rds_ring->num_desc)
69 #define STATUS_DESC_RINGSIZE(sds_ring) \
70 (sizeof(struct status_desc) * (sds_ring)->num_desc)
71 #define TX_BUFF_RINGSIZE(tx_ring) \
72 (sizeof(struct qlcnic_cmd_buffer) * tx_ring->num_desc)
73 #define TX_DESC_RINGSIZE(tx_ring) \
74 (sizeof(struct cmd_desc_type0) * tx_ring->num_desc)
76 #define QLCNIC_P3P_A0 0x50
77 #define QLCNIC_P3P_C0 0x58
79 #define QLCNIC_IS_REVISION_P3P(REVISION) (REVISION >= QLCNIC_P3P_A0)
81 #define FIRST_PAGE_GROUP_START 0
82 #define FIRST_PAGE_GROUP_END 0x100000
84 #define P3P_MAX_MTU (9600)
85 #define P3P_MIN_MTU (68)
86 #define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
88 #define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
89 #define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
90 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
91 #define QLCNIC_LRO_BUFFER_EXTRA 2048
94 #define QLCNIC_MAX_FRAGS_PER_TX 14
95 #define MAX_TSO_HEADER_DESC 2
96 #define MGMT_CMD_DESC_RESV 4
97 #define TX_STOP_THRESH ((MAX_SKB_FRAGS >> 2) + MAX_TSO_HEADER_DESC \
99 #define QLCNIC_MAX_TX_TIMEOUTS 2
101 /* Driver will use 1 Tx ring in INT-x/MSI/SRIOV mode. */
102 #define QLCNIC_SINGLE_RING 1
103 #define QLCNIC_DEF_SDS_RINGS 4
104 #define QLCNIC_DEF_TX_RINGS 4
105 #define QLCNIC_MAX_VNIC_TX_RINGS 4
106 #define QLCNIC_MAX_VNIC_SDS_RINGS 4
107 #define QLCNIC_83XX_MINIMUM_VECTOR 3
108 #define QLCNIC_82XX_MINIMUM_VECTOR 2
110 enum qlcnic_queue_type {
115 /* Operational mode for driver */
116 #define QLCNIC_VNIC_MODE 0xFF
117 #define QLCNIC_DEFAULT_MODE 0x0
119 /* Virtual NIC function count */
120 #define QLC_DEFAULT_VNIC_COUNT 8
121 #define QLC_84XX_VNIC_COUNT 16
124 * Following are the states of the Phantom. Phantom will set them and
125 * Host will read to check if the fields are correct.
127 #define PHAN_INITIALIZE_FAILED 0xffff
128 #define PHAN_INITIALIZE_COMPLETE 0xff01
130 /* Host writes the following to notify that it has done the init-handshake */
131 #define PHAN_INITIALIZE_ACK 0xf00f
132 #define PHAN_PEG_RCV_INITIALIZED 0xff01
134 #define NUM_RCV_DESC_RINGS 3
136 #define RCV_RING_NORMAL 0
137 #define RCV_RING_JUMBO 1
139 #define MIN_CMD_DESCRIPTORS 64
140 #define MIN_RCV_DESCRIPTORS 64
141 #define MIN_JUMBO_DESCRIPTORS 32
143 #define MAX_CMD_DESCRIPTORS 1024
144 #define MAX_RCV_DESCRIPTORS_1G 4096
145 #define MAX_RCV_DESCRIPTORS_10G 8192
146 #define MAX_RCV_DESCRIPTORS_VF 2048
147 #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512
148 #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024
150 #define DEFAULT_RCV_DESCRIPTORS_1G 2048
151 #define DEFAULT_RCV_DESCRIPTORS_10G 4096
152 #define DEFAULT_RCV_DESCRIPTORS_VF 1024
153 #define MAX_RDS_RINGS 2
155 #define get_next_index(index, length) \
156 (((index) + 1) & ((length) - 1))
159 * Following data structures describe the descriptors that will be used.
160 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
161 * we are doing LSO (above the 1500 size packet) only.
163 struct cmd_desc_type0 {
164 u8 tcp_hdr_offset; /* For LSO only */
165 u8 ip_hdr_offset; /* For LSO only */
166 __le16 flags_opcode; /* 15:13 unused, 12:7 opcode, 6:0 flags */
167 __le32 nfrags__length; /* 31:8 total len, 7:0 frag count */
171 __le16 encap_descr; /* 15:10 offset of outer L3 header,
172 * 9:6 number of 32bit words in outer L3 header,
173 * 5 offload outer L4 checksum,
174 * 4 offload outer L3 checksum,
175 * 3 Inner L4 type, TCP=0, UDP=1,
176 * 2 Inner L3 type, IPv4=0, IPv6=1,
177 * 1 Outer L3 type,IPv4=0, IPv6=1,
178 * 0 type of encapsulation, GRE=0, VXLAN=1
181 u8 port_ctxid; /* 7:4 ctxid 3:0 port */
182 u8 hdr_length; /* LSO only : MAC+IP+TCP Hdr size */
183 u8 outer_hdr_length; /* Encapsulation only */
189 __le16 buffer_length[4];
193 u8 eth_addr[ETH_ALEN];
194 __le16 vlan_TCI; /* In case of encapsulation,
195 * this is for outer VLAN
198 } __attribute__ ((aligned(64)));
200 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
202 __le16 reference_handle;
204 __le32 buffer_length; /* allocated buffer length (usually 2K) */
209 __le64 status_desc_data[2];
210 } __attribute__ ((aligned(16)));
212 /* UNIFIED ROMIMAGE */
213 #define QLCNIC_UNI_FW_MIN_SIZE 0xc8000
214 #define QLCNIC_UNI_DIR_SECT_PRODUCT_TBL 0x0
215 #define QLCNIC_UNI_DIR_SECT_BOOTLD 0x6
216 #define QLCNIC_UNI_DIR_SECT_FW 0x7
219 #define QLCNIC_UNI_CHIP_REV_OFF 10
220 #define QLCNIC_UNI_FLAGS_OFF 11
221 #define QLCNIC_UNI_BIOS_VERSION_OFF 12
222 #define QLCNIC_UNI_BOOTLD_IDX_OFF 27
223 #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29
225 struct uni_table_desc{
232 struct uni_data_desc{
238 /* Flash Defines and Structures */
239 #define QLCNIC_FLT_LOCATION 0x3F1000
240 #define QLCNIC_FDT_LOCATION 0x3F0000
241 #define QLCNIC_B0_FW_IMAGE_REGION 0x74
242 #define QLCNIC_C0_FW_IMAGE_REGION 0x97
243 #define QLCNIC_BOOTLD_REGION 0X72
244 struct qlcnic_flt_header {
251 struct qlcnic_flt_entry {
261 /* Flash Descriptor Table */
275 u8 write_enable_bits;
276 u8 write_statusreg_cmd;
277 u8 unprotected_sec_cmd;
282 u32 write_enable_data;
284 u8 write_disable_bits;
288 u8 protected_sec_cmd;
291 /* Magic number to let user know flash is programmed */
292 #define QLCNIC_BDINFO_MAGIC 0x12345678
294 #define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021
295 #define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022
296 #define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023
297 #define QLCNIC_BRDTYPE_P3P_4_GB 0x0024
298 #define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025
299 #define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
300 #define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
301 #define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028
302 #define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029
303 #define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a
304 #define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b
305 #define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031
306 #define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032
307 #define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080
309 #define QLCNIC_MSIX_TABLE_OFFSET 0x44
311 /* Flash memory map */
312 #define QLCNIC_BRDCFG_START 0x4000 /* board config */
313 #define QLCNIC_BOOTLD_START 0x10000 /* bootld */
314 #define QLCNIC_IMAGE_START 0x43000 /* compressed image */
315 #define QLCNIC_USER_START 0x3E8000 /* Firmware info */
317 #define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408)
318 #define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c)
319 #define QLCNIC_FW_SERIAL_NUM_OFFSET (QLCNIC_USER_START+0x81c)
320 #define QLCNIC_BIOS_VERSION_OFFSET (QLCNIC_USER_START+0x83c)
322 #define QLCNIC_BRDTYPE_OFFSET (QLCNIC_BRDCFG_START+0x8)
323 #define QLCNIC_FW_MAGIC_OFFSET (QLCNIC_BRDCFG_START+0x128)
325 #define QLCNIC_FW_MIN_SIZE (0x3fffff)
326 #define QLCNIC_UNIFIED_ROMIMAGE 0
327 #define QLCNIC_FLASH_ROMIMAGE 1
328 #define QLCNIC_UNKNOWN_ROMIMAGE 0xff
330 #define QLCNIC_UNIFIED_ROMIMAGE_NAME "phanfw.bin"
331 #define QLCNIC_FLASH_ROMIMAGE_NAME "flash"
333 extern char qlcnic_driver_name[];
335 extern int qlcnic_use_msi;
336 extern int qlcnic_use_msi_x;
337 extern int qlcnic_auto_fw_reset;
338 extern int qlcnic_load_fw_file;
340 /* Number of status descriptors to handle per interrupt */
341 #define MAX_STATUS_HANDLE (64)
344 * qlcnic_skb_frag{} is to contain mapping info for each SG list. This
345 * has to be freed when DMA is complete. This is part of qlcnic_tx_buffer{}.
347 struct qlcnic_skb_frag {
352 /* Following defines are for the state of the buffers */
353 #define QLCNIC_BUFFER_FREE 0
354 #define QLCNIC_BUFFER_BUSY 1
357 * There will be one qlcnic_buffer per skb packet. These will be
358 * used to save the dma info for pci_unmap_page()
360 struct qlcnic_cmd_buffer {
362 struct qlcnic_skb_frag frag_array[MAX_SKB_FRAGS + 1];
366 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
367 struct qlcnic_rx_buffer {
370 struct list_head list;
375 #define QLCNIC_GBE 0x01
376 #define QLCNIC_XGBE 0x02
379 * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
380 * adjusted based on configured MTU.
382 #define QLCNIC_INTR_COAL_TYPE_RX 1
383 #define QLCNIC_INTR_COAL_TYPE_TX 2
384 #define QLCNIC_INTR_COAL_TYPE_RX_TX 3
386 #define QLCNIC_DEF_INTR_COALESCE_RX_TIME_US 3
387 #define QLCNIC_DEF_INTR_COALESCE_RX_PACKETS 256
389 #define QLCNIC_DEF_INTR_COALESCE_TX_TIME_US 64
390 #define QLCNIC_DEF_INTR_COALESCE_TX_PACKETS 64
392 #define QLCNIC_INTR_DEFAULT 0x04
393 #define QLCNIC_CONFIG_INTR_COALESCE 3
394 #define QLCNIC_DEV_INFO_SIZE 2
396 struct qlcnic_nic_intr_coalesce {
407 struct qlcnic_83xx_dump_template_hdr {
424 struct qlcnic_82xx_dump_template_hdr {
442 #define QLC_PEX_DMA_READ_SIZE (PAGE_SIZE * 16)
444 struct qlcnic_fw_dump {
445 u8 clr; /* flag to indicate if dump is cleared */
446 bool enable; /* enable/disable dump */
447 u32 size; /* total size of the dump */
448 u32 cap_mask; /* Current capture mask */
449 void *data; /* dump data area */
451 dma_addr_t phys_addr;
454 /* Read only elements which are common between 82xx and 83xx
455 * template header. Update these values immediately after we read
456 * template header from Firmware
465 * One hardware_context{} per adapter
466 * contains interrupt info as well shared hardware info.
468 struct qlcnic_hardware_context {
469 void __iomem *pci_base0;
470 void __iomem *ocm_win_crb;
472 unsigned long pci_len0;
475 struct mutex mem_lock;
517 u32 extra_capability[3];
522 struct qlcnic_hardware_ops *hw_ops;
523 struct qlcnic_nic_intr_coalesce coal;
524 struct qlcnic_fw_dump fw_dump;
525 struct qlcnic_fdt fdt;
526 struct qlc_83xx_reset reset;
527 struct qlc_83xx_idc idc;
528 struct qlc_83xx_fw_info *fw_info;
529 struct qlcnic_intrpt_config *intr_tbl;
530 struct qlcnic_sriov *sriov;
533 u32 mbox_aen[QLC_83XX_MBX_AEN_CNT];
535 struct qlcnic_mailbox *mailbox;
537 u8 phys_port_id[ETH_ALEN];
541 struct device *hwmon_dev;
546 struct qlcnic_adapter_stats {
558 u64 encap_lso_frames;
559 u64 encap_tx_csummed;
560 u64 encap_rx_csummed;
563 u64 skb_alloc_failure;
565 u64 rx_dma_map_error;
566 u64 tx_dma_map_error;
568 u64 mac_filter_limit_overrun;
572 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
573 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
575 struct qlcnic_host_rds_ring {
576 void __iomem *crb_rcv_producer;
577 struct rcv_desc *desc_head;
578 struct qlcnic_rx_buffer *rx_buf_arr;
584 struct list_head free_list;
586 dma_addr_t phys_addr;
587 } ____cacheline_internodealigned_in_smp;
589 struct qlcnic_host_sds_ring {
592 void __iomem *crb_sts_consumer;
594 struct qlcnic_host_tx_ring *tx_ring;
595 struct status_desc *desc_head;
596 struct qlcnic_adapter *adapter;
597 struct napi_struct napi;
598 struct list_head free_list[NUM_RCV_DESC_RINGS];
600 void __iomem *crb_intr_mask;
603 dma_addr_t phys_addr;
604 char name[IFNAMSIZ + 12];
605 } ____cacheline_internodealigned_in_smp;
607 struct qlcnic_tx_queue_stats {
615 struct qlcnic_host_tx_ring {
617 void __iomem *crb_intr_mask;
618 char name[IFNAMSIZ + 12];
626 struct qlcnic_tx_queue_stats tx_stats;
628 void __iomem *crb_cmd_producer;
629 struct cmd_desc_type0 *desc_head;
630 struct qlcnic_adapter *adapter;
631 struct napi_struct napi;
632 struct qlcnic_cmd_buffer *cmd_buf_arr;
635 dma_addr_t phys_addr;
636 dma_addr_t hw_cons_phys_addr;
637 struct netdev_queue *txq;
638 /* Lock to protect Tx descriptors cleanup */
639 spinlock_t tx_clean_lock;
640 } ____cacheline_internodealigned_in_smp;
643 * Receive context. There is one such structure per instance of the
644 * receive processing. Any state information that is relevant to
645 * the receive, and is must be in this structure. The global data may be
648 struct qlcnic_recv_context {
649 struct qlcnic_host_rds_ring *rds_rings;
650 struct qlcnic_host_sds_ring *sds_rings;
656 /* HW context creation */
658 #define QLCNIC_OS_CRB_RETRY_COUNT 4000
660 #define QLCNIC_CDRP_CMD_BIT 0x80000000
663 * All responses must have the QLCNIC_CDRP_CMD_BIT cleared
664 * in the crb QLCNIC_CDRP_CRB_OFFSET.
666 #define QLCNIC_CDRP_FORM_RSP(rsp) (rsp)
667 #define QLCNIC_CDRP_IS_RSP(rsp) (((rsp) & QLCNIC_CDRP_CMD_BIT) == 0)
669 #define QLCNIC_CDRP_RSP_OK 0x00000001
670 #define QLCNIC_CDRP_RSP_FAIL 0x00000002
671 #define QLCNIC_CDRP_RSP_TIMEOUT 0x00000003
674 * All commands must have the QLCNIC_CDRP_CMD_BIT set in
675 * the crb QLCNIC_CDRP_CRB_OFFSET.
677 #define QLCNIC_CDRP_FORM_CMD(cmd) (QLCNIC_CDRP_CMD_BIT | (cmd))
679 #define QLCNIC_RCODE_SUCCESS 0
680 #define QLCNIC_RCODE_INVALID_ARGS 6
681 #define QLCNIC_RCODE_NOT_SUPPORTED 9
682 #define QLCNIC_RCODE_NOT_PERMITTED 10
683 #define QLCNIC_RCODE_NOT_IMPL 15
684 #define QLCNIC_RCODE_INVALID 16
685 #define QLCNIC_RCODE_TIMEOUT 17
686 #define QLCNIC_DESTROY_CTX_RESET 0
689 * Capabilities Announced
691 #define QLCNIC_CAP0_LEGACY_CONTEXT (1)
692 #define QLCNIC_CAP0_LEGACY_MN (1 << 2)
693 #define QLCNIC_CAP0_LSO (1 << 6)
694 #define QLCNIC_CAP0_JUMBO_CONTIGUOUS (1 << 7)
695 #define QLCNIC_CAP0_LRO_CONTIGUOUS (1 << 8)
696 #define QLCNIC_CAP0_VALIDOFF (1 << 11)
697 #define QLCNIC_CAP0_LRO_MSS (1 << 21)
698 #define QLCNIC_CAP0_TX_MULTI (1 << 22)
703 #define QLCNIC_HOST_CTX_STATE_FREED 0
704 #define QLCNIC_HOST_CTX_STATE_ACTIVE 2
710 struct qlcnic_hostrq_sds_ring {
711 __le64 host_phys_addr; /* Ring base addr */
712 __le32 ring_size; /* Ring entries */
714 __le16 rsvd; /* Padding */
717 struct qlcnic_hostrq_rds_ring {
718 __le64 host_phys_addr; /* Ring base addr */
719 __le64 buff_size; /* Packet buffer size */
720 __le32 ring_size; /* Ring entries */
721 __le32 ring_kind; /* Class of ring */
724 struct qlcnic_hostrq_rx_ctx {
725 __le64 host_rsp_dma_addr; /* Response dma'd here */
726 __le32 capabilities[4]; /* Flag bit vector */
727 __le32 host_int_crb_mode; /* Interrupt crb usage */
728 __le32 host_rds_crb_mode; /* RDS crb usage */
729 /* These ring offsets are relative to data[0] below */
730 __le32 rds_ring_offset; /* Offset to RDS config */
731 __le32 sds_ring_offset; /* Offset to SDS config */
732 __le16 num_rds_rings; /* Count of RDS rings */
733 __le16 num_sds_rings; /* Count of SDS rings */
734 __le16 valid_field_offset;
737 u8 reserved[128]; /* reserve space for future expansion*/
738 /* MUST BE 64-bit aligned.
739 The following is packed:
741 - N hostrq_sds_rings */
745 struct qlcnic_cardrsp_rds_ring{
746 __le32 host_producer_crb; /* Crb to use */
747 __le32 rsvd1; /* Padding */
750 struct qlcnic_cardrsp_sds_ring {
751 __le32 host_consumer_crb; /* Crb to use */
752 __le32 interrupt_crb; /* Crb to use */
755 struct qlcnic_cardrsp_rx_ctx {
756 /* These ring offsets are relative to data[0] below */
757 __le32 rds_ring_offset; /* Offset to RDS config */
758 __le32 sds_ring_offset; /* Offset to SDS config */
759 __le32 host_ctx_state; /* Starting State */
760 __le32 num_fn_per_port; /* How many PCI fn share the port */
761 __le16 num_rds_rings; /* Count of RDS rings */
762 __le16 num_sds_rings; /* Count of SDS rings */
763 __le16 context_id; /* Handle for context */
764 u8 phys_port; /* Physical id of port */
765 u8 virt_port; /* Virtual/Logical id of port */
766 u8 reserved[128]; /* save space for future expansion */
767 /* MUST BE 64-bit aligned.
768 The following is packed:
769 - N cardrsp_rds_rings
770 - N cardrs_sds_rings */
774 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \
775 (sizeof(HOSTRQ_RX) + \
776 (rds_rings)*(sizeof(struct qlcnic_hostrq_rds_ring)) + \
777 (sds_rings)*(sizeof(struct qlcnic_hostrq_sds_ring)))
779 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \
780 (sizeof(CARDRSP_RX) + \
781 (rds_rings)*(sizeof(struct qlcnic_cardrsp_rds_ring)) + \
782 (sds_rings)*(sizeof(struct qlcnic_cardrsp_sds_ring)))
788 struct qlcnic_hostrq_cds_ring {
789 __le64 host_phys_addr; /* Ring base addr */
790 __le32 ring_size; /* Ring entries */
791 __le32 rsvd; /* Padding */
794 struct qlcnic_hostrq_tx_ctx {
795 __le64 host_rsp_dma_addr; /* Response dma'd here */
796 __le64 cmd_cons_dma_addr; /* */
797 __le64 dummy_dma_addr; /* */
798 __le32 capabilities[4]; /* Flag bit vector */
799 __le32 host_int_crb_mode; /* Interrupt crb usage */
800 __le32 rsvd1; /* Padding */
801 __le16 rsvd2; /* Padding */
802 __le16 interrupt_ctl;
804 __le16 rsvd3; /* Padding */
805 struct qlcnic_hostrq_cds_ring cds_ring; /* Desc of cds ring */
806 u8 reserved[128]; /* future expansion */
809 struct qlcnic_cardrsp_cds_ring {
810 __le32 host_producer_crb; /* Crb to use */
811 __le32 interrupt_crb; /* Crb to use */
814 struct qlcnic_cardrsp_tx_ctx {
815 __le32 host_ctx_state; /* Starting state */
816 __le16 context_id; /* Handle for context */
817 u8 phys_port; /* Physical id of port */
818 u8 virt_port; /* Virtual/Logical id of port */
819 struct qlcnic_cardrsp_cds_ring cds_ring; /* Card cds settings */
820 u8 reserved[128]; /* future expansion */
823 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) (sizeof(HOSTRQ_TX))
824 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) (sizeof(CARDRSP_TX))
828 #define QLCNIC_HOST_RDS_CRB_MODE_UNIQUE 0
829 #define QLCNIC_HOST_RDS_CRB_MODE_SHARED 1
830 #define QLCNIC_HOST_RDS_CRB_MODE_CUSTOM 2
831 #define QLCNIC_HOST_RDS_CRB_MODE_MAX 3
833 #define QLCNIC_HOST_INT_CRB_MODE_UNIQUE 0
834 #define QLCNIC_HOST_INT_CRB_MODE_SHARED 1
835 #define QLCNIC_HOST_INT_CRB_MODE_NORX 2
836 #define QLCNIC_HOST_INT_CRB_MODE_NOTX 3
837 #define QLCNIC_HOST_INT_CRB_MODE_NORXTX 4
842 #define MC_COUNT_P3P 38
844 #define QLCNIC_MAC_NOOP 0
845 #define QLCNIC_MAC_ADD 1
846 #define QLCNIC_MAC_DEL 2
847 #define QLCNIC_MAC_VLAN_ADD 3
848 #define QLCNIC_MAC_VLAN_DEL 4
850 enum qlcnic_mac_type {
852 QLCNIC_MULTICAST_MAC,
853 QLCNIC_BROADCAST_MAC,
856 struct qlcnic_mac_vlan_list {
857 struct list_head list;
858 uint8_t mac_addr[ETH_ALEN+2];
860 enum qlcnic_mac_type mac_type;
864 #define NO_MAC_LEARN 0
865 #define DRV_MAC_LEARN 1
866 #define FDB_MAC_LEARN 2
868 #define QLCNIC_HOST_REQUEST 0x13
869 #define QLCNIC_REQUEST 0x14
871 #define QLCNIC_MAC_EVENT 0x1
873 #define QLCNIC_IP_UP 2
874 #define QLCNIC_IP_DOWN 3
876 #define QLCNIC_ILB_MODE 0x1
877 #define QLCNIC_ELB_MODE 0x2
878 #define QLCNIC_LB_MODE_MASK 0x3
880 #define QLCNIC_LINKEVENT 0x1
881 #define QLCNIC_LB_RESPONSE 0x2
882 #define QLCNIC_IS_LB_CONFIGURED(VAL) \
883 (VAL == (QLCNIC_LINKEVENT | QLCNIC_LB_RESPONSE))
886 * Driver --> Firmware
888 #define QLCNIC_H2C_OPCODE_CONFIG_RSS 0x1
889 #define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE 0x3
890 #define QLCNIC_H2C_OPCODE_CONFIG_LED 0x4
891 #define QLCNIC_H2C_OPCODE_LRO_REQUEST 0x7
892 #define QLCNIC_H2C_OPCODE_SET_MAC_RECEIVE_MODE 0xc
893 #define QLCNIC_H2C_OPCODE_CONFIG_IPADDR 0x12
895 #define QLCNIC_H2C_OPCODE_GET_LINKEVENT 0x15
896 #define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING 0x17
897 #define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO 0x18
898 #define QLCNIC_H2C_OPCODE_CONFIG_LOOPBACK 0x13
901 * Firmware --> Driver
904 #define QLCNIC_C2H_OPCODE_CONFIG_LOOPBACK 0x8f
905 #define QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE 0x8D
906 #define QLCNIC_C2H_OPCODE_GET_DCB_AEN 0x90
908 #define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
909 #define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
910 #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
912 #define QLCNIC_LRO_REQUEST_CLEANUP 4
914 /* Capabilites received */
915 #define QLCNIC_FW_CAPABILITY_TSO BIT_1
916 #define QLCNIC_FW_CAPABILITY_BDG BIT_8
917 #define QLCNIC_FW_CAPABILITY_FVLANTX BIT_9
918 #define QLCNIC_FW_CAPABILITY_HW_LRO BIT_10
919 #define QLCNIC_FW_CAPABILITY_2_MULTI_TX BIT_4
920 #define QLCNIC_FW_CAPABILITY_MULTI_LOOPBACK BIT_27
921 #define QLCNIC_FW_CAPABILITY_MORE_CAPS BIT_31
923 #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2
924 #define QLCNIC_FW_CAP2_HW_LRO_IPV6 BIT_3
925 #define QLCNIC_FW_CAPABILITY_SET_DRV_VER BIT_5
926 #define QLCNIC_FW_CAPABILITY_2_BEACON BIT_7
927 #define QLCNIC_FW_CAPABILITY_2_PER_PORT_ESWITCH_CFG BIT_9
928 #define QLCNIC_FW_CAPABILITY_2_EXT_ISCSI_DUMP BIT_13
930 #define QLCNIC_83XX_FW_CAPAB_ENCAP_RX_OFFLOAD BIT_0
931 #define QLCNIC_83XX_FW_CAPAB_ENCAP_TX_OFFLOAD BIT_1
932 #define QLCNIC_83XX_FW_CAPAB_ENCAP_CKO_OFFLOAD BIT_4
935 #define LINKEVENT_MODULE_NOT_PRESENT 1
936 #define LINKEVENT_MODULE_OPTICAL_UNKNOWN 2
937 #define LINKEVENT_MODULE_OPTICAL_SRLR 3
938 #define LINKEVENT_MODULE_OPTICAL_LRM 4
939 #define LINKEVENT_MODULE_OPTICAL_SFP_1G 5
940 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE 6
941 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN 7
942 #define LINKEVENT_MODULE_TWINAX 8
944 #define LINKSPEED_10GBPS 10000
945 #define LINKSPEED_1GBPS 1000
946 #define LINKSPEED_100MBPS 100
947 #define LINKSPEED_10MBPS 10
949 #define LINKSPEED_ENCODED_10MBPS 0
950 #define LINKSPEED_ENCODED_100MBPS 1
951 #define LINKSPEED_ENCODED_1GBPS 2
953 #define LINKEVENT_AUTONEG_DISABLED 0
954 #define LINKEVENT_AUTONEG_ENABLED 1
956 #define LINKEVENT_HALF_DUPLEX 0
957 #define LINKEVENT_FULL_DUPLEX 1
959 #define LINKEVENT_LINKSPEED_MBPS 0
960 #define LINKEVENT_LINKSPEED_ENCODED 1
962 /* firmware response header:
963 * 63:58 - message type
967 * 47:40 - completion id
972 #define qlcnic_get_nic_msg_opcode(msg_hdr) \
973 ((msg_hdr >> 32) & 0xFF)
975 struct qlcnic_fw_msg {
985 struct qlcnic_nic_req {
991 struct qlcnic_mac_req {
997 struct qlcnic_vlan_req {
1002 struct qlcnic_ipaddr {
1007 #define QLCNIC_MSI_ENABLED 0x02
1008 #define QLCNIC_MSIX_ENABLED 0x04
1009 #define QLCNIC_LRO_ENABLED 0x01
1010 #define QLCNIC_LRO_DISABLED 0x00
1011 #define QLCNIC_BRIDGE_ENABLED 0X10
1012 #define QLCNIC_DIAG_ENABLED 0x20
1013 #define QLCNIC_ESWITCH_ENABLED 0x40
1014 #define QLCNIC_ADAPTER_INITIALIZED 0x80
1015 #define QLCNIC_TAGGING_ENABLED 0x100
1016 #define QLCNIC_MACSPOOF 0x200
1017 #define QLCNIC_MAC_OVERRIDE_DISABLED 0x400
1018 #define QLCNIC_PROMISC_DISABLED 0x800
1019 #define QLCNIC_NEED_FLR 0x1000
1020 #define QLCNIC_FW_RESET_OWNER 0x2000
1021 #define QLCNIC_FW_HANG 0x4000
1022 #define QLCNIC_FW_LRO_MSS_CAP 0x8000
1023 #define QLCNIC_TX_INTR_SHARED 0x10000
1024 #define QLCNIC_APP_CHANGED_FLAGS 0x20000
1025 #define QLCNIC_HAS_PHYS_PORT_ID 0x40000
1026 #define QLCNIC_TSS_RSS 0x80000
1028 #ifdef CONFIG_QLCNIC_VXLAN
1029 #define QLCNIC_ADD_VXLAN_PORT 0x100000
1030 #define QLCNIC_DEL_VXLAN_PORT 0x200000
1033 #define QLCNIC_VLAN_FILTERING 0x800000
1035 #define QLCNIC_IS_MSI_FAMILY(adapter) \
1036 ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED))
1037 #define QLCNIC_IS_TSO_CAPABLE(adapter) \
1038 ((adapter)->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1040 #define QLCNIC_BEACON_EANBLE 0xC
1041 #define QLCNIC_BEACON_DISABLE 0xD
1043 #define QLCNIC_BEACON_ON 2
1044 #define QLCNIC_BEACON_OFF 0
1046 #define QLCNIC_MSIX_TBL_SPACE 8192
1047 #define QLCNIC_PCI_REG_MSIX_TBL 0x44
1048 #define QLCNIC_MSIX_TBL_PGSIZE 4096
1050 #define QLCNIC_ADAPTER_UP_MAGIC 777
1052 #define __QLCNIC_FW_ATTACHED 0
1053 #define __QLCNIC_DEV_UP 1
1054 #define __QLCNIC_RESETTING 2
1055 #define __QLCNIC_START_FW 4
1056 #define __QLCNIC_AER 5
1057 #define __QLCNIC_DIAG_RES_ALLOC 6
1058 #define __QLCNIC_LED_ENABLE 7
1059 #define __QLCNIC_ELB_INPROGRESS 8
1060 #define __QLCNIC_MULTI_TX_UNIQUE 9
1061 #define __QLCNIC_SRIOV_ENABLE 10
1062 #define __QLCNIC_SRIOV_CAPABLE 11
1063 #define __QLCNIC_MBX_POLL_ENABLE 12
1064 #define __QLCNIC_DIAG_MODE 13
1065 #define __QLCNIC_MAINTENANCE_MODE 16
1067 #define QLCNIC_INTERRUPT_TEST 1
1068 #define QLCNIC_LOOPBACK_TEST 2
1069 #define QLCNIC_LED_TEST 3
1071 #define QLCNIC_FILTER_AGE 80
1072 #define QLCNIC_READD_AGE 20
1073 #define QLCNIC_LB_MAX_FILTERS 64
1074 #define QLCNIC_LB_BUCKET_SIZE 32
1075 #define QLCNIC_ILB_MAX_RCV_LOOP 10
1077 struct qlcnic_filter {
1078 struct hlist_node fnode;
1081 unsigned long ftime;
1084 struct qlcnic_filter_hash {
1085 struct hlist_head *fhead;
1091 /* Mailbox specific data structures */
1092 struct qlcnic_mailbox {
1093 struct workqueue_struct *work_q;
1094 struct qlcnic_adapter *adapter;
1095 struct qlcnic_mbx_ops *ops;
1096 struct work_struct work;
1097 struct completion completion;
1098 struct list_head cmd_q;
1099 unsigned long status;
1100 spinlock_t queue_lock; /* Mailbox queue lock */
1101 spinlock_t aen_lock; /* Mailbox response/AEN lock */
1102 atomic_t rsp_status;
1106 struct qlcnic_adapter {
1107 struct qlcnic_hardware_context *ahw;
1108 struct qlcnic_recv_context *recv_ctx;
1109 struct qlcnic_host_tx_ring *tx_ring;
1110 struct net_device *netdev;
1111 struct pci_dev *pdev;
1113 unsigned long state;
1124 u8 max_sds_rings; /* max sds rings supported by adapter */
1125 u8 max_tx_rings; /* max tx rings supported by adapter */
1127 u8 drv_tx_rings; /* max tx rings supported by driver */
1128 u8 drv_sds_rings; /* max sds rings supported by driver */
1130 u8 drv_tss_rings; /* tss ring input */
1131 u8 drv_rss_rings; /* rss ring input */
1153 u8 mac_addr[ETH_ALEN];
1159 unsigned long vlans[BITS_TO_LONGS(VLAN_N_VID)];
1161 struct qlcnic_npar_info *npars;
1162 struct qlcnic_eswitch *eswitch;
1163 struct qlcnic_nic_template *nic_ops;
1165 struct qlcnic_adapter_stats stats;
1166 struct list_head mac_list;
1168 void __iomem *tgt_mask_reg;
1169 void __iomem *tgt_status_reg;
1170 void __iomem *crb_int_state_reg;
1171 void __iomem *isr_int_vec;
1173 struct msix_entry *msix_entries;
1174 struct workqueue_struct *qlcnic_wq;
1175 struct delayed_work fw_work;
1176 struct delayed_work idc_aen_work;
1177 struct delayed_work mbx_poll_work;
1178 struct qlcnic_dcb *dcb;
1180 struct qlcnic_filter_hash fhash;
1181 struct qlcnic_filter_hash rx_fhash;
1182 struct list_head vf_mc_list;
1184 spinlock_t mac_learn_lock;
1185 /* spinlock for catching rcv filters for eswitch traffic */
1186 spinlock_t rx_mac_learn_lock;
1187 u32 file_prd_off; /*File fw product offset*/
1190 const struct firmware *fw;
1193 struct qlcnic_info_le {
1195 __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */
1197 __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */
1199 __le32 capabilities;
1209 __le16 max_bw_reg_offset;
1210 __le16 max_linkspeed_reg_offset;
1214 __le16 max_tx_mac_filters;
1215 __le16 max_rx_mcast_mac_filters;
1216 __le16 max_rx_ucast_mac_filters;
1217 __le16 max_rx_ip_addr;
1218 __le16 max_rx_lro_flow;
1219 __le16 max_rx_status_rings;
1220 __le16 max_rx_buf_rings;
1221 __le16 max_tx_vlan_keys;
1223 u8 total_rss_engines;
1225 __le16 linkstate_reg_offset;
1227 __le16 max_local_ipv6_addrs;
1228 __le16 max_remote_ipv6_addrs;
1232 struct qlcnic_info {
1245 u16 max_bw_reg_offset;
1246 u16 max_linkspeed_reg_offset;
1250 u16 max_tx_mac_filters;
1251 u16 max_rx_mcast_mac_filters;
1252 u16 max_rx_ucast_mac_filters;
1254 u16 max_rx_lro_flow;
1255 u16 max_rx_status_rings;
1256 u16 max_rx_buf_rings;
1257 u16 max_tx_vlan_keys;
1259 u8 total_rss_engines;
1261 u16 linkstate_reg_offset;
1263 u16 max_local_ipv6_addrs;
1264 u16 max_remote_ipv6_addrs;
1267 struct qlcnic_pci_info_le {
1268 __le16 id; /* pci function id */
1269 __le16 active; /* 1 = Enabled */
1270 __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */
1271 __le16 default_port; /* default port number */
1273 __le16 tx_min_bw; /* Multiple of 100mbpc */
1275 __le16 reserved1[2];
1283 struct qlcnic_pci_info {
1294 struct qlcnic_npar_info {
1295 bool eswitch_status;
1313 struct qlcnic_eswitch {
1317 u8 active_ucast_filters;
1318 u8 max_ucast_filters;
1319 u8 max_active_vlans;
1322 #define QLCNIC_SWITCH_ENABLE BIT_1
1323 #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2
1324 #define QLCNIC_SWITCH_PROMISC_MODE BIT_3
1325 #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4
1329 #define MAX_BW 100 /* % of link speed */
1330 #define MIN_BW 1 /* % of link speed */
1331 #define MAX_VLAN_ID 4095
1332 #define MIN_VLAN_ID 2
1333 #define DEFAULT_MAC_LEARN 1
1335 #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID)
1336 #define IS_VALID_BW(bw) (bw <= MAX_BW)
1338 struct qlcnic_pci_func_cfg {
1345 u8 def_mac_addr[ETH_ALEN];
1348 struct qlcnic_npar_func_cfg {
1359 struct qlcnic_pm_func_cfg {
1366 struct qlcnic_esw_func_cfg {
1380 #define QLCNIC_STATS_VERSION 1
1381 #define QLCNIC_STATS_PORT 1
1382 #define QLCNIC_STATS_ESWITCH 2
1383 #define QLCNIC_QUERY_RX_COUNTER 0
1384 #define QLCNIC_QUERY_TX_COUNTER 1
1385 #define QLCNIC_STATS_NOT_AVAIL 0xffffffffffffffffULL
1386 #define QLCNIC_FILL_STATS(VAL1) \
1387 (((VAL1) == QLCNIC_STATS_NOT_AVAIL) ? 0 : VAL1)
1388 #define QLCNIC_MAC_STATS 1
1389 #define QLCNIC_ESW_STATS 2
1391 #define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\
1393 if (((VAL1) == QLCNIC_STATS_NOT_AVAIL) && \
1394 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1396 else if (((VAL1) != QLCNIC_STATS_NOT_AVAIL) && \
1397 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1401 struct qlcnic_mac_statistics_le {
1402 __le64 mac_tx_frames;
1403 __le64 mac_tx_bytes;
1404 __le64 mac_tx_mcast_pkts;
1405 __le64 mac_tx_bcast_pkts;
1406 __le64 mac_tx_pause_cnt;
1407 __le64 mac_tx_ctrl_pkt;
1408 __le64 mac_tx_lt_64b_pkts;
1409 __le64 mac_tx_lt_127b_pkts;
1410 __le64 mac_tx_lt_255b_pkts;
1411 __le64 mac_tx_lt_511b_pkts;
1412 __le64 mac_tx_lt_1023b_pkts;
1413 __le64 mac_tx_lt_1518b_pkts;
1414 __le64 mac_tx_gt_1518b_pkts;
1417 __le64 mac_rx_frames;
1418 __le64 mac_rx_bytes;
1419 __le64 mac_rx_mcast_pkts;
1420 __le64 mac_rx_bcast_pkts;
1421 __le64 mac_rx_pause_cnt;
1422 __le64 mac_rx_ctrl_pkt;
1423 __le64 mac_rx_lt_64b_pkts;
1424 __le64 mac_rx_lt_127b_pkts;
1425 __le64 mac_rx_lt_255b_pkts;
1426 __le64 mac_rx_lt_511b_pkts;
1427 __le64 mac_rx_lt_1023b_pkts;
1428 __le64 mac_rx_lt_1518b_pkts;
1429 __le64 mac_rx_gt_1518b_pkts;
1432 __le64 mac_rx_length_error;
1433 __le64 mac_rx_length_small;
1434 __le64 mac_rx_length_large;
1435 __le64 mac_rx_jabber;
1436 __le64 mac_rx_dropped;
1437 __le64 mac_rx_crc_error;
1438 __le64 mac_align_error;
1441 struct qlcnic_mac_statistics {
1444 u64 mac_tx_mcast_pkts;
1445 u64 mac_tx_bcast_pkts;
1446 u64 mac_tx_pause_cnt;
1447 u64 mac_tx_ctrl_pkt;
1448 u64 mac_tx_lt_64b_pkts;
1449 u64 mac_tx_lt_127b_pkts;
1450 u64 mac_tx_lt_255b_pkts;
1451 u64 mac_tx_lt_511b_pkts;
1452 u64 mac_tx_lt_1023b_pkts;
1453 u64 mac_tx_lt_1518b_pkts;
1454 u64 mac_tx_gt_1518b_pkts;
1458 u64 mac_rx_mcast_pkts;
1459 u64 mac_rx_bcast_pkts;
1460 u64 mac_rx_pause_cnt;
1461 u64 mac_rx_ctrl_pkt;
1462 u64 mac_rx_lt_64b_pkts;
1463 u64 mac_rx_lt_127b_pkts;
1464 u64 mac_rx_lt_255b_pkts;
1465 u64 mac_rx_lt_511b_pkts;
1466 u64 mac_rx_lt_1023b_pkts;
1467 u64 mac_rx_lt_1518b_pkts;
1468 u64 mac_rx_gt_1518b_pkts;
1470 u64 mac_rx_length_error;
1471 u64 mac_rx_length_small;
1472 u64 mac_rx_length_large;
1475 u64 mac_rx_crc_error;
1476 u64 mac_align_error;
1479 struct qlcnic_esw_stats_le {
1484 __le64 unicast_frames;
1485 __le64 multicast_frames;
1486 __le64 broadcast_frames;
1487 __le64 dropped_frames;
1489 __le64 local_frames;
1494 struct __qlcnic_esw_statistics {
1500 u64 multicast_frames;
1501 u64 broadcast_frames;
1509 struct qlcnic_esw_statistics {
1510 struct __qlcnic_esw_statistics rx;
1511 struct __qlcnic_esw_statistics tx;
1514 #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed
1515 #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed
1516 #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed
1517 #define QLCNIC_FORCE_FW_RESET 0xdeaddead
1518 #define QLCNIC_SET_QUIESCENT 0xadd00010
1519 #define QLCNIC_RESET_QUIESCENT 0xadd00020
1526 struct qlcnic_cmd_args {
1527 struct completion completion;
1528 struct list_head list;
1529 struct _cdrp_cmd req;
1530 struct _cdrp_cmd rsp;
1531 atomic_t rsp_status;
1538 u32 *hdr; /* Back channel message header */
1539 u32 *pay; /* Back channel message payload */
1543 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
1544 int qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config);
1545 int qlcnic_pci_mem_write_2M(struct qlcnic_adapter *, u64 off, u64 data);
1546 int qlcnic_pci_mem_read_2M(struct qlcnic_adapter *, u64 off, u64 *data);
1548 #define ADDR_IN_RANGE(addr, low, high) \
1549 (((addr) < (high)) && ((addr) >= (low)))
1551 #define QLCRD32(adapter, off, err) \
1552 (adapter->ahw->hw_ops->read_reg)(adapter, off, err)
1554 #define QLCWR32(adapter, off, val) \
1555 adapter->ahw->hw_ops->write_reg(adapter, off, val)
1557 int qlcnic_pcie_sem_lock(struct qlcnic_adapter *, int, u32);
1558 void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int);
1560 #define qlcnic_rom_lock(a) \
1561 qlcnic_pcie_sem_lock((a), 2, QLCNIC_ROM_LOCK_ID)
1562 #define qlcnic_rom_unlock(a) \
1563 qlcnic_pcie_sem_unlock((a), 2)
1564 #define qlcnic_phy_lock(a) \
1565 qlcnic_pcie_sem_lock((a), 3, QLCNIC_PHY_LOCK_ID)
1566 #define qlcnic_phy_unlock(a) \
1567 qlcnic_pcie_sem_unlock((a), 3)
1568 #define qlcnic_sw_lock(a) \
1569 qlcnic_pcie_sem_lock((a), 6, 0)
1570 #define qlcnic_sw_unlock(a) \
1571 qlcnic_pcie_sem_unlock((a), 6)
1572 #define crb_win_lock(a) \
1573 qlcnic_pcie_sem_lock((a), 7, QLCNIC_CRB_WIN_LOCK_ID)
1574 #define crb_win_unlock(a) \
1575 qlcnic_pcie_sem_unlock((a), 7)
1577 #define __QLCNIC_MAX_LED_RATE 0xf
1578 #define __QLCNIC_MAX_LED_STATE 0x2
1580 #define MAX_CTL_CHECK 1000
1582 void qlcnic_prune_lb_filters(struct qlcnic_adapter *adapter);
1583 void qlcnic_delete_lb_filters(struct qlcnic_adapter *adapter);
1584 int qlcnic_dump_fw(struct qlcnic_adapter *);
1585 int qlcnic_enable_fw_dump_state(struct qlcnic_adapter *);
1586 bool qlcnic_check_fw_dump_state(struct qlcnic_adapter *);
1588 /* Functions from qlcnic_init.c */
1589 void qlcnic_schedule_work(struct qlcnic_adapter *, work_func_t, int);
1590 int qlcnic_load_firmware(struct qlcnic_adapter *adapter);
1591 int qlcnic_need_fw_reset(struct qlcnic_adapter *adapter);
1592 void qlcnic_request_firmware(struct qlcnic_adapter *adapter);
1593 void qlcnic_release_firmware(struct qlcnic_adapter *adapter);
1594 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter);
1595 int qlcnic_setup_idc_param(struct qlcnic_adapter *adapter);
1596 int qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter);
1598 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp);
1599 int qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
1600 u8 *bytes, size_t size);
1601 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter);
1602 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter);
1604 void __iomem *qlcnic_get_ioaddr(struct qlcnic_hardware_context *, u32);
1606 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter);
1607 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter);
1609 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter);
1610 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter);
1612 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter);
1613 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter);
1614 void qlcnic_release_tx_buffers(struct qlcnic_adapter *,
1615 struct qlcnic_host_tx_ring *);
1617 int qlcnic_check_fw_status(struct qlcnic_adapter *adapter);
1618 void qlcnic_watchdog_task(struct work_struct *work);
1619 void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
1620 struct qlcnic_host_rds_ring *rds_ring, u8 ring_id);
1621 void qlcnic_set_multi(struct net_device *netdev);
1622 void qlcnic_flush_mcast_mac(struct qlcnic_adapter *);
1623 int qlcnic_nic_add_mac(struct qlcnic_adapter *, const u8 *, u16,
1624 enum qlcnic_mac_type);
1625 int qlcnic_nic_del_mac(struct qlcnic_adapter *, const u8 *);
1626 void qlcnic_82xx_free_mac_list(struct qlcnic_adapter *adapter);
1627 int qlcnic_82xx_read_phys_port_id(struct qlcnic_adapter *);
1629 int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu);
1630 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *, u32);
1631 int qlcnic_change_mtu(struct net_device *netdev, int new_mtu);
1632 netdev_features_t qlcnic_fix_features(struct net_device *netdev,
1633 netdev_features_t features);
1634 int qlcnic_set_features(struct net_device *netdev, netdev_features_t features);
1635 int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable);
1636 void qlcnic_update_cmd_producer(struct qlcnic_host_tx_ring *);
1638 /* Functions from qlcnic_ethtool.c */
1639 int qlcnic_check_loopback_buff(unsigned char *, u8 []);
1640 int qlcnic_do_lb_test(struct qlcnic_adapter *, u8);
1642 /* Functions from qlcnic_main.c */
1643 int qlcnic_reset_context(struct qlcnic_adapter *);
1644 void qlcnic_diag_free_res(struct net_device *netdev, int);
1645 int qlcnic_diag_alloc_res(struct net_device *netdev, int);
1646 netdev_tx_t qlcnic_xmit_frame(struct sk_buff *, struct net_device *);
1647 void qlcnic_set_tx_ring_count(struct qlcnic_adapter *, u8);
1648 void qlcnic_set_sds_ring_count(struct qlcnic_adapter *, u8);
1649 int qlcnic_setup_rings(struct qlcnic_adapter *);
1650 int qlcnic_validate_rings(struct qlcnic_adapter *, __u32, int);
1651 void qlcnic_alloc_lb_filters_mem(struct qlcnic_adapter *adapter);
1652 int qlcnic_enable_msix(struct qlcnic_adapter *, u32);
1653 void qlcnic_set_drv_version(struct qlcnic_adapter *);
1655 /* eSwitch management functions */
1656 int qlcnic_config_switch_port(struct qlcnic_adapter *,
1657 struct qlcnic_esw_func_cfg *);
1659 int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
1660 struct qlcnic_esw_func_cfg *);
1661 int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
1662 int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,
1663 struct __qlcnic_esw_statistics *);
1664 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,
1665 struct __qlcnic_esw_statistics *);
1666 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);
1667 int qlcnic_get_mac_stats(struct qlcnic_adapter *, struct qlcnic_mac_statistics *);
1669 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd);
1671 int qlcnic_alloc_sds_rings(struct qlcnic_recv_context *, int);
1672 void qlcnic_free_sds_rings(struct qlcnic_recv_context *);
1673 void qlcnic_advert_link_change(struct qlcnic_adapter *, int);
1674 void qlcnic_free_tx_rings(struct qlcnic_adapter *);
1675 int qlcnic_alloc_tx_rings(struct qlcnic_adapter *, struct net_device *);
1676 void qlcnic_dump_mbx(struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1678 void qlcnic_create_sysfs_entries(struct qlcnic_adapter *adapter);
1679 void qlcnic_remove_sysfs_entries(struct qlcnic_adapter *adapter);
1680 void qlcnic_82xx_add_sysfs(struct qlcnic_adapter *adapter);
1681 void qlcnic_82xx_remove_sysfs(struct qlcnic_adapter *adapter);
1683 int qlcnicvf_config_bridged_mode(struct qlcnic_adapter *, u32);
1684 int qlcnicvf_config_led(struct qlcnic_adapter *, u32, u32);
1685 void qlcnic_set_vlan_config(struct qlcnic_adapter *,
1686 struct qlcnic_esw_func_cfg *);
1687 void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *,
1688 struct qlcnic_esw_func_cfg *);
1689 int qlcnic_setup_tss_rss_intr(struct qlcnic_adapter *);
1690 void qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1691 int qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1692 void __qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1693 void qlcnic_detach(struct qlcnic_adapter *);
1694 void qlcnic_teardown_intr(struct qlcnic_adapter *);
1695 int qlcnic_attach(struct qlcnic_adapter *);
1696 int __qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1697 void qlcnic_restore_indev_addr(struct net_device *, unsigned long);
1699 int qlcnic_check_temp(struct qlcnic_adapter *);
1700 int qlcnic_init_pci_info(struct qlcnic_adapter *);
1701 int qlcnic_set_default_offload_settings(struct qlcnic_adapter *);
1702 int qlcnic_reset_npar_config(struct qlcnic_adapter *);
1703 int qlcnic_set_eswitch_port_config(struct qlcnic_adapter *);
1704 int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter);
1705 int qlcnic_read_mac_addr(struct qlcnic_adapter *);
1706 int qlcnic_setup_netdev(struct qlcnic_adapter *, struct net_device *, int);
1707 void qlcnic_set_netdev_features(struct qlcnic_adapter *,
1708 struct qlcnic_esw_func_cfg *);
1709 void qlcnic_sriov_vf_set_multi(struct net_device *);
1710 int qlcnic_is_valid_nic_func(struct qlcnic_adapter *, u8);
1711 int qlcnic_get_pci_func_type(struct qlcnic_adapter *, u16, u16 *, u16 *,
1715 * QLOGIC Board information
1718 #define QLCNIC_MAX_BOARD_NAME_LEN 100
1719 struct qlcnic_board_info {
1720 unsigned short vendor;
1721 unsigned short device;
1722 unsigned short sub_vendor;
1723 unsigned short sub_device;
1724 char short_name[QLCNIC_MAX_BOARD_NAME_LEN];
1727 static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
1729 if (likely(tx_ring->producer < tx_ring->sw_consumer))
1730 return tx_ring->sw_consumer - tx_ring->producer;
1732 return tx_ring->sw_consumer + tx_ring->num_desc -
1736 struct qlcnic_nic_template {
1737 int (*config_bridged_mode) (struct qlcnic_adapter *, u32);
1738 int (*config_led) (struct qlcnic_adapter *, u32, u32);
1739 int (*start_firmware) (struct qlcnic_adapter *);
1740 int (*init_driver) (struct qlcnic_adapter *);
1741 void (*request_reset) (struct qlcnic_adapter *, u32);
1742 void (*cancel_idc_work) (struct qlcnic_adapter *);
1743 int (*napi_add)(struct qlcnic_adapter *, struct net_device *);
1744 void (*napi_del)(struct qlcnic_adapter *);
1745 void (*config_ipaddr)(struct qlcnic_adapter *, __be32, int);
1746 irqreturn_t (*clear_legacy_intr)(struct qlcnic_adapter *);
1747 int (*shutdown)(struct pci_dev *);
1748 int (*resume)(struct qlcnic_adapter *);
1751 struct qlcnic_mbx_ops {
1752 int (*enqueue_cmd) (struct qlcnic_adapter *,
1753 struct qlcnic_cmd_args *, unsigned long *);
1754 void (*dequeue_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1755 void (*decode_resp) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1756 void (*encode_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1757 void (*nofity_fw) (struct qlcnic_adapter *, u8);
1760 int qlcnic_83xx_init_mailbox_work(struct qlcnic_adapter *);
1761 void qlcnic_83xx_detach_mailbox_work(struct qlcnic_adapter *);
1762 void qlcnic_83xx_reinit_mbx_work(struct qlcnic_mailbox *mbx);
1763 void qlcnic_83xx_free_mailbox(struct qlcnic_mailbox *mbx);
1764 void qlcnic_update_stats(struct qlcnic_adapter *);
1766 /* Adapter hardware abstraction */
1767 struct qlcnic_hardware_ops {
1768 void (*read_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1769 void (*write_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1770 int (*read_reg) (struct qlcnic_adapter *, ulong, int *);
1771 int (*write_reg) (struct qlcnic_adapter *, ulong, u32);
1772 void (*get_ocm_win) (struct qlcnic_hardware_context *);
1773 int (*get_mac_address) (struct qlcnic_adapter *, u8 *, u8);
1774 int (*setup_intr) (struct qlcnic_adapter *);
1775 int (*alloc_mbx_args)(struct qlcnic_cmd_args *,
1776 struct qlcnic_adapter *, u32);
1777 int (*mbx_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1778 void (*get_func_no) (struct qlcnic_adapter *);
1779 int (*api_lock) (struct qlcnic_adapter *);
1780 void (*api_unlock) (struct qlcnic_adapter *);
1781 void (*add_sysfs) (struct qlcnic_adapter *);
1782 void (*remove_sysfs) (struct qlcnic_adapter *);
1783 void (*process_lb_rcv_ring_diag) (struct qlcnic_host_sds_ring *);
1784 int (*create_rx_ctx) (struct qlcnic_adapter *);
1785 int (*create_tx_ctx) (struct qlcnic_adapter *,
1786 struct qlcnic_host_tx_ring *, int);
1787 void (*del_rx_ctx) (struct qlcnic_adapter *);
1788 void (*del_tx_ctx) (struct qlcnic_adapter *,
1789 struct qlcnic_host_tx_ring *);
1790 int (*setup_link_event) (struct qlcnic_adapter *, int);
1791 int (*get_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *, u8);
1792 int (*get_pci_info) (struct qlcnic_adapter *, struct qlcnic_pci_info *);
1793 int (*set_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *);
1794 int (*change_macvlan) (struct qlcnic_adapter *, u8*, u16, u8);
1795 void (*napi_enable) (struct qlcnic_adapter *);
1796 void (*napi_disable) (struct qlcnic_adapter *);
1797 int (*config_intr_coal) (struct qlcnic_adapter *,
1798 struct ethtool_coalesce *);
1799 int (*config_rss) (struct qlcnic_adapter *, int);
1800 int (*config_hw_lro) (struct qlcnic_adapter *, int);
1801 int (*config_loopback) (struct qlcnic_adapter *, u8);
1802 int (*clear_loopback) (struct qlcnic_adapter *, u8);
1803 int (*config_promisc_mode) (struct qlcnic_adapter *, u32);
1804 void (*change_l2_filter) (struct qlcnic_adapter *, u64 *, u16);
1805 int (*get_board_info) (struct qlcnic_adapter *);
1806 void (*set_mac_filter_count) (struct qlcnic_adapter *);
1807 void (*free_mac_list) (struct qlcnic_adapter *);
1808 int (*read_phys_port_id) (struct qlcnic_adapter *);
1809 pci_ers_result_t (*io_error_detected) (struct pci_dev *,
1810 pci_channel_state_t);
1811 pci_ers_result_t (*io_slot_reset) (struct pci_dev *);
1812 void (*io_resume) (struct pci_dev *);
1813 void (*get_beacon_state)(struct qlcnic_adapter *);
1814 void (*enable_sds_intr) (struct qlcnic_adapter *,
1815 struct qlcnic_host_sds_ring *);
1816 void (*disable_sds_intr) (struct qlcnic_adapter *,
1817 struct qlcnic_host_sds_ring *);
1818 void (*enable_tx_intr) (struct qlcnic_adapter *,
1819 struct qlcnic_host_tx_ring *);
1820 void (*disable_tx_intr) (struct qlcnic_adapter *,
1821 struct qlcnic_host_tx_ring *);
1822 u32 (*get_saved_state)(void *, u32);
1823 void (*set_saved_state)(void *, u32, u32);
1824 void (*cache_tmpl_hdr_values)(struct qlcnic_fw_dump *);
1825 u32 (*get_cap_size)(void *, int);
1826 void (*set_sys_info)(void *, int, u32);
1827 void (*store_cap_mask)(void *, u32);
1830 extern struct qlcnic_nic_template qlcnic_vf_ops;
1832 static inline bool qlcnic_encap_tx_offload(struct qlcnic_adapter *adapter)
1834 return adapter->ahw->extra_capability[0] &
1835 QLCNIC_83XX_FW_CAPAB_ENCAP_TX_OFFLOAD;
1838 static inline bool qlcnic_encap_rx_offload(struct qlcnic_adapter *adapter)
1840 return adapter->ahw->extra_capability[0] &
1841 QLCNIC_83XX_FW_CAPAB_ENCAP_RX_OFFLOAD;
1844 static inline int qlcnic_start_firmware(struct qlcnic_adapter *adapter)
1846 return adapter->nic_ops->start_firmware(adapter);
1849 static inline void qlcnic_read_crb(struct qlcnic_adapter *adapter, char *buf,
1850 loff_t offset, size_t size)
1852 adapter->ahw->hw_ops->read_crb(adapter, buf, offset, size);
1855 static inline void qlcnic_write_crb(struct qlcnic_adapter *adapter, char *buf,
1856 loff_t offset, size_t size)
1858 adapter->ahw->hw_ops->write_crb(adapter, buf, offset, size);
1861 static inline int qlcnic_hw_write_wx_2M(struct qlcnic_adapter *adapter,
1862 ulong off, u32 data)
1864 return adapter->ahw->hw_ops->write_reg(adapter, off, data);
1867 static inline int qlcnic_get_mac_address(struct qlcnic_adapter *adapter,
1868 u8 *mac, u8 function)
1870 return adapter->ahw->hw_ops->get_mac_address(adapter, mac, function);
1873 static inline int qlcnic_setup_intr(struct qlcnic_adapter *adapter)
1875 return adapter->ahw->hw_ops->setup_intr(adapter);
1878 static inline int qlcnic_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
1879 struct qlcnic_adapter *adapter, u32 arg)
1881 return adapter->ahw->hw_ops->alloc_mbx_args(mbx, adapter, arg);
1884 static inline int qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
1885 struct qlcnic_cmd_args *cmd)
1887 if (adapter->ahw->hw_ops->mbx_cmd)
1888 return adapter->ahw->hw_ops->mbx_cmd(adapter, cmd);
1893 static inline void qlcnic_get_func_no(struct qlcnic_adapter *adapter)
1895 adapter->ahw->hw_ops->get_func_no(adapter);
1898 static inline int qlcnic_api_lock(struct qlcnic_adapter *adapter)
1900 return adapter->ahw->hw_ops->api_lock(adapter);
1903 static inline void qlcnic_api_unlock(struct qlcnic_adapter *adapter)
1905 adapter->ahw->hw_ops->api_unlock(adapter);
1908 static inline void qlcnic_add_sysfs(struct qlcnic_adapter *adapter)
1910 if (adapter->ahw->hw_ops->add_sysfs)
1911 adapter->ahw->hw_ops->add_sysfs(adapter);
1914 static inline void qlcnic_remove_sysfs(struct qlcnic_adapter *adapter)
1916 if (adapter->ahw->hw_ops->remove_sysfs)
1917 adapter->ahw->hw_ops->remove_sysfs(adapter);
1921 qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
1923 sds_ring->adapter->ahw->hw_ops->process_lb_rcv_ring_diag(sds_ring);
1926 static inline int qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
1928 return adapter->ahw->hw_ops->create_rx_ctx(adapter);
1931 static inline int qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
1932 struct qlcnic_host_tx_ring *ptr,
1935 return adapter->ahw->hw_ops->create_tx_ctx(adapter, ptr, ring);
1938 static inline void qlcnic_fw_cmd_del_rx_ctx(struct qlcnic_adapter *adapter)
1940 return adapter->ahw->hw_ops->del_rx_ctx(adapter);
1943 static inline void qlcnic_fw_cmd_del_tx_ctx(struct qlcnic_adapter *adapter,
1944 struct qlcnic_host_tx_ring *ptr)
1946 return adapter->ahw->hw_ops->del_tx_ctx(adapter, ptr);
1949 static inline int qlcnic_linkevent_request(struct qlcnic_adapter *adapter,
1952 return adapter->ahw->hw_ops->setup_link_event(adapter, enable);
1955 static inline int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
1956 struct qlcnic_info *info, u8 id)
1958 return adapter->ahw->hw_ops->get_nic_info(adapter, info, id);
1961 static inline int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
1962 struct qlcnic_pci_info *info)
1964 return adapter->ahw->hw_ops->get_pci_info(adapter, info);
1967 static inline int qlcnic_set_nic_info(struct qlcnic_adapter *adapter,
1968 struct qlcnic_info *info)
1970 return adapter->ahw->hw_ops->set_nic_info(adapter, info);
1973 static inline int qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter,
1974 u8 *addr, u16 id, u8 cmd)
1976 return adapter->ahw->hw_ops->change_macvlan(adapter, addr, id, cmd);
1979 static inline int qlcnic_napi_add(struct qlcnic_adapter *adapter,
1980 struct net_device *netdev)
1982 return adapter->nic_ops->napi_add(adapter, netdev);
1985 static inline void qlcnic_napi_del(struct qlcnic_adapter *adapter)
1987 adapter->nic_ops->napi_del(adapter);
1990 static inline void qlcnic_napi_enable(struct qlcnic_adapter *adapter)
1992 adapter->ahw->hw_ops->napi_enable(adapter);
1995 static inline int __qlcnic_shutdown(struct pci_dev *pdev)
1997 struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1999 return adapter->nic_ops->shutdown(pdev);
2002 static inline int __qlcnic_resume(struct qlcnic_adapter *adapter)
2004 return adapter->nic_ops->resume(adapter);
2007 static inline void qlcnic_napi_disable(struct qlcnic_adapter *adapter)
2009 adapter->ahw->hw_ops->napi_disable(adapter);
2012 static inline int qlcnic_config_intr_coalesce(struct qlcnic_adapter *adapter,
2013 struct ethtool_coalesce *ethcoal)
2015 return adapter->ahw->hw_ops->config_intr_coal(adapter, ethcoal);
2018 static inline int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable)
2020 return adapter->ahw->hw_ops->config_rss(adapter, enable);
2023 static inline int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter,
2026 return adapter->ahw->hw_ops->config_hw_lro(adapter, enable);
2029 static inline int qlcnic_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
2031 return adapter->ahw->hw_ops->config_loopback(adapter, mode);
2034 static inline int qlcnic_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
2036 return adapter->ahw->hw_ops->clear_loopback(adapter, mode);
2039 static inline int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter,
2042 return adapter->ahw->hw_ops->config_promisc_mode(adapter, mode);
2045 static inline void qlcnic_change_filter(struct qlcnic_adapter *adapter,
2048 adapter->ahw->hw_ops->change_l2_filter(adapter, addr, id);
2051 static inline int qlcnic_get_board_info(struct qlcnic_adapter *adapter)
2053 return adapter->ahw->hw_ops->get_board_info(adapter);
2056 static inline void qlcnic_free_mac_list(struct qlcnic_adapter *adapter)
2058 return adapter->ahw->hw_ops->free_mac_list(adapter);
2061 static inline void qlcnic_set_mac_filter_count(struct qlcnic_adapter *adapter)
2063 if (adapter->ahw->hw_ops->set_mac_filter_count)
2064 adapter->ahw->hw_ops->set_mac_filter_count(adapter);
2067 static inline void qlcnic_get_beacon_state(struct qlcnic_adapter *adapter)
2069 adapter->ahw->hw_ops->get_beacon_state(adapter);
2072 static inline void qlcnic_read_phys_port_id(struct qlcnic_adapter *adapter)
2074 if (adapter->ahw->hw_ops->read_phys_port_id)
2075 adapter->ahw->hw_ops->read_phys_port_id(adapter);
2078 static inline u32 qlcnic_get_saved_state(struct qlcnic_adapter *adapter,
2079 void *t_hdr, u32 index)
2081 return adapter->ahw->hw_ops->get_saved_state(t_hdr, index);
2084 static inline void qlcnic_set_saved_state(struct qlcnic_adapter *adapter,
2085 void *t_hdr, u32 index, u32 value)
2087 adapter->ahw->hw_ops->set_saved_state(t_hdr, index, value);
2090 static inline void qlcnic_cache_tmpl_hdr_values(struct qlcnic_adapter *adapter,
2091 struct qlcnic_fw_dump *fw_dump)
2093 adapter->ahw->hw_ops->cache_tmpl_hdr_values(fw_dump);
2096 static inline u32 qlcnic_get_cap_size(struct qlcnic_adapter *adapter,
2097 void *tmpl_hdr, int index)
2099 return adapter->ahw->hw_ops->get_cap_size(tmpl_hdr, index);
2102 static inline void qlcnic_set_sys_info(struct qlcnic_adapter *adapter,
2103 void *tmpl_hdr, int idx, u32 value)
2105 adapter->ahw->hw_ops->set_sys_info(tmpl_hdr, idx, value);
2108 static inline void qlcnic_store_cap_mask(struct qlcnic_adapter *adapter,
2109 void *tmpl_hdr, u32 mask)
2111 adapter->ahw->hw_ops->store_cap_mask(tmpl_hdr, mask);
2114 static inline void qlcnic_dev_request_reset(struct qlcnic_adapter *adapter,
2117 if (adapter->nic_ops->request_reset)
2118 adapter->nic_ops->request_reset(adapter, key);
2121 static inline void qlcnic_cancel_idc_work(struct qlcnic_adapter *adapter)
2123 if (adapter->nic_ops->cancel_idc_work)
2124 adapter->nic_ops->cancel_idc_work(adapter);
2127 static inline irqreturn_t
2128 qlcnic_clear_legacy_intr(struct qlcnic_adapter *adapter)
2130 return adapter->nic_ops->clear_legacy_intr(adapter);
2133 static inline int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state,
2136 return adapter->nic_ops->config_led(adapter, state, rate);
2139 static inline void qlcnic_config_ipaddr(struct qlcnic_adapter *adapter,
2142 adapter->nic_ops->config_ipaddr(adapter, ip, cmd);
2145 static inline bool qlcnic_check_multi_tx(struct qlcnic_adapter *adapter)
2147 return test_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2151 qlcnic_82xx_enable_tx_intr(struct qlcnic_adapter *adapter,
2152 struct qlcnic_host_tx_ring *tx_ring)
2154 if (qlcnic_check_multi_tx(adapter) &&
2155 !adapter->ahw->diag_test)
2156 writel(0x0, tx_ring->crb_intr_mask);
2160 qlcnic_82xx_disable_tx_intr(struct qlcnic_adapter *adapter,
2161 struct qlcnic_host_tx_ring *tx_ring)
2163 if (qlcnic_check_multi_tx(adapter) &&
2164 !adapter->ahw->diag_test)
2165 writel(1, tx_ring->crb_intr_mask);
2169 qlcnic_83xx_enable_tx_intr(struct qlcnic_adapter *adapter,
2170 struct qlcnic_host_tx_ring *tx_ring)
2172 writel(0, tx_ring->crb_intr_mask);
2176 qlcnic_83xx_disable_tx_intr(struct qlcnic_adapter *adapter,
2177 struct qlcnic_host_tx_ring *tx_ring)
2179 writel(1, tx_ring->crb_intr_mask);
2182 /* Enable MSI-x and INT-x interrupts */
2184 qlcnic_83xx_enable_sds_intr(struct qlcnic_adapter *adapter,
2185 struct qlcnic_host_sds_ring *sds_ring)
2187 writel(0, sds_ring->crb_intr_mask);
2190 /* Disable MSI-x and INT-x interrupts */
2192 qlcnic_83xx_disable_sds_intr(struct qlcnic_adapter *adapter,
2193 struct qlcnic_host_sds_ring *sds_ring)
2195 writel(1, sds_ring->crb_intr_mask);
2198 static inline void qlcnic_disable_multi_tx(struct qlcnic_adapter *adapter)
2200 test_and_clear_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2201 adapter->drv_tx_rings = QLCNIC_SINGLE_RING;
2204 /* When operating in a muti tx mode, driver needs to write 0x1
2205 * to src register, instead of 0x0 to disable receiving interrupt.
2208 qlcnic_82xx_disable_sds_intr(struct qlcnic_adapter *adapter,
2209 struct qlcnic_host_sds_ring *sds_ring)
2211 if (qlcnic_check_multi_tx(adapter) &&
2212 !adapter->ahw->diag_test &&
2213 (adapter->flags & QLCNIC_MSIX_ENABLED))
2214 writel(0x1, sds_ring->crb_intr_mask);
2216 writel(0, sds_ring->crb_intr_mask);
2219 static inline void qlcnic_enable_sds_intr(struct qlcnic_adapter *adapter,
2220 struct qlcnic_host_sds_ring *sds_ring)
2222 if (adapter->ahw->hw_ops->enable_sds_intr)
2223 adapter->ahw->hw_ops->enable_sds_intr(adapter, sds_ring);
2227 qlcnic_disable_sds_intr(struct qlcnic_adapter *adapter,
2228 struct qlcnic_host_sds_ring *sds_ring)
2230 if (adapter->ahw->hw_ops->disable_sds_intr)
2231 adapter->ahw->hw_ops->disable_sds_intr(adapter, sds_ring);
2234 static inline void qlcnic_enable_tx_intr(struct qlcnic_adapter *adapter,
2235 struct qlcnic_host_tx_ring *tx_ring)
2237 if (adapter->ahw->hw_ops->enable_tx_intr)
2238 adapter->ahw->hw_ops->enable_tx_intr(adapter, tx_ring);
2241 static inline void qlcnic_disable_tx_intr(struct qlcnic_adapter *adapter,
2242 struct qlcnic_host_tx_ring *tx_ring)
2244 if (adapter->ahw->hw_ops->disable_tx_intr)
2245 adapter->ahw->hw_ops->disable_tx_intr(adapter, tx_ring);
2248 /* When operating in a muti tx mode, driver needs to write 0x0
2249 * to src register, instead of 0x1 to enable receiving interrupts.
2252 qlcnic_82xx_enable_sds_intr(struct qlcnic_adapter *adapter,
2253 struct qlcnic_host_sds_ring *sds_ring)
2255 if (qlcnic_check_multi_tx(adapter) &&
2256 !adapter->ahw->diag_test &&
2257 (adapter->flags & QLCNIC_MSIX_ENABLED))
2258 writel(0, sds_ring->crb_intr_mask);
2260 writel(0x1, sds_ring->crb_intr_mask);
2262 if (!QLCNIC_IS_MSI_FAMILY(adapter))
2263 writel(0xfbff, adapter->tgt_mask_reg);
2266 static inline int qlcnic_get_diag_lock(struct qlcnic_adapter *adapter)
2268 return test_and_set_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2271 static inline void qlcnic_release_diag_lock(struct qlcnic_adapter *adapter)
2273 clear_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2276 static inline int qlcnic_check_diag_status(struct qlcnic_adapter *adapter)
2278 return test_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2281 extern const struct ethtool_ops qlcnic_sriov_vf_ethtool_ops;
2282 extern const struct ethtool_ops qlcnic_ethtool_ops;
2283 extern const struct ethtool_ops qlcnic_ethtool_failed_ops;
2285 #define QLCDB(adapter, lvl, _fmt, _args...) do { \
2286 if (NETIF_MSG_##lvl & adapter->ahw->msg_enable) \
2287 printk(KERN_INFO "%s: %s: " _fmt, \
2288 dev_name(&adapter->pdev->dev), \
2289 __func__, ##_args); \
2292 #define PCI_DEVICE_ID_QLOGIC_QLE824X 0x8020
2293 #define PCI_DEVICE_ID_QLOGIC_QLE834X 0x8030
2294 #define PCI_DEVICE_ID_QLOGIC_VF_QLE834X 0x8430
2295 #define PCI_DEVICE_ID_QLOGIC_QLE8830 0x8830
2296 #define PCI_DEVICE_ID_QLOGIC_VF_QLE8C30 0x8C30
2297 #define PCI_DEVICE_ID_QLOGIC_QLE844X 0x8040
2298 #define PCI_DEVICE_ID_QLOGIC_VF_QLE844X 0x8440
2300 static inline bool qlcnic_82xx_check(struct qlcnic_adapter *adapter)
2302 unsigned short device = adapter->pdev->device;
2303 return (device == PCI_DEVICE_ID_QLOGIC_QLE824X) ? true : false;
2306 static inline bool qlcnic_84xx_check(struct qlcnic_adapter *adapter)
2308 unsigned short device = adapter->pdev->device;
2310 return ((device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2311 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X)) ? true : false;
2314 static inline bool qlcnic_83xx_check(struct qlcnic_adapter *adapter)
2316 unsigned short device = adapter->pdev->device;
2319 status = ((device == PCI_DEVICE_ID_QLOGIC_QLE834X) ||
2320 (device == PCI_DEVICE_ID_QLOGIC_QLE8830) ||
2321 (device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2322 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X) ||
2323 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ||
2324 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE8C30)) ? true : false;
2329 static inline bool qlcnic_sriov_pf_check(struct qlcnic_adapter *adapter)
2331 return (adapter->ahw->op_mode == QLCNIC_SRIOV_PF_FUNC) ? true : false;
2334 static inline bool qlcnic_sriov_vf_check(struct qlcnic_adapter *adapter)
2336 unsigned short device = adapter->pdev->device;
2339 status = ((device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ||
2340 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X) ||
2341 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE8C30)) ? true : false;
2346 static inline bool qlcnic_83xx_pf_check(struct qlcnic_adapter *adapter)
2348 unsigned short device = adapter->pdev->device;
2350 return (device == PCI_DEVICE_ID_QLOGIC_QLE834X) ? true : false;
2353 static inline bool qlcnic_83xx_vf_check(struct qlcnic_adapter *adapter)
2355 unsigned short device = adapter->pdev->device;
2357 return ((device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ||
2358 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE8C30)) ? true : false;
2361 static inline bool qlcnic_sriov_check(struct qlcnic_adapter *adapter)
2365 status = (qlcnic_sriov_pf_check(adapter) ||
2366 qlcnic_sriov_vf_check(adapter)) ? true : false;
2371 static inline u32 qlcnic_get_vnic_func_count(struct qlcnic_adapter *adapter)
2373 if (qlcnic_84xx_check(adapter))
2374 return QLC_84XX_VNIC_COUNT;
2376 return QLC_DEFAULT_VNIC_COUNT;
2379 static inline void qlcnic_swap32_buffer(u32 *buffer, int count)
2381 #if defined(__BIG_ENDIAN)
2385 for (i = 0; i < count; i++) {
2386 *tmp = swab32(*tmp);
2392 #ifdef CONFIG_QLCNIC_HWMON
2393 void qlcnic_register_hwmon_dev(struct qlcnic_adapter *);
2394 void qlcnic_unregister_hwmon_dev(struct qlcnic_adapter *);
2396 static inline void qlcnic_register_hwmon_dev(struct qlcnic_adapter *adapter)
2400 static inline void qlcnic_unregister_hwmon_dev(struct qlcnic_adapter *adapter)
2405 #endif /* __QLCNIC_H_ */