2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
20 #include <linux/tcp.h>
21 #include <linux/skbuff.h>
22 #include <linux/firmware.h>
23 #include <linux/ethtool.h>
24 #include <linux/mii.h>
25 #include <linux/timer.h>
26 #include <linux/irq.h>
28 #include <linux/vmalloc.h>
31 #include <asm/byteorder.h>
32 #include <linux/bitops.h>
33 #include <linux/if_vlan.h>
35 #include "qlcnic_hdr.h"
36 #include "qlcnic_hw.h"
37 #include "qlcnic_83xx_hw.h"
38 #include "qlcnic_dcb.h"
40 #define _QLCNIC_LINUX_MAJOR 5
41 #define _QLCNIC_LINUX_MINOR 3
42 #define _QLCNIC_LINUX_SUBVERSION 61
43 #define QLCNIC_LINUX_VERSIONID "5.3.61"
44 #define QLCNIC_DRV_IDC_VER 0x01
45 #define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) |\
46 (_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
48 #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c))
49 #define _major(v) (((v) >> 24) & 0xff)
50 #define _minor(v) (((v) >> 16) & 0xff)
51 #define _build(v) ((v) & 0xffff)
53 /* version in image has weird encoding:
56 * 31:16 - build (little endian)
58 #define QLCNIC_DECODE_VERSION(v) \
59 QLCNIC_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
61 #define QLCNIC_MIN_FW_VERSION QLCNIC_VERSION_CODE(4, 4, 2)
62 #define QLCNIC_NUM_FLASH_SECTORS (64)
63 #define QLCNIC_FLASH_SECTOR_SIZE (64 * 1024)
64 #define QLCNIC_FLASH_TOTAL_SIZE (QLCNIC_NUM_FLASH_SECTORS \
65 * QLCNIC_FLASH_SECTOR_SIZE)
67 #define RCV_DESC_RINGSIZE(rds_ring) \
68 (sizeof(struct rcv_desc) * (rds_ring)->num_desc)
69 #define RCV_BUFF_RINGSIZE(rds_ring) \
70 (sizeof(struct qlcnic_rx_buffer) * rds_ring->num_desc)
71 #define STATUS_DESC_RINGSIZE(sds_ring) \
72 (sizeof(struct status_desc) * (sds_ring)->num_desc)
73 #define TX_BUFF_RINGSIZE(tx_ring) \
74 (sizeof(struct qlcnic_cmd_buffer) * tx_ring->num_desc)
75 #define TX_DESC_RINGSIZE(tx_ring) \
76 (sizeof(struct cmd_desc_type0) * tx_ring->num_desc)
78 #define QLCNIC_P3P_A0 0x50
79 #define QLCNIC_P3P_C0 0x58
81 #define QLCNIC_IS_REVISION_P3P(REVISION) (REVISION >= QLCNIC_P3P_A0)
83 #define FIRST_PAGE_GROUP_START 0
84 #define FIRST_PAGE_GROUP_END 0x100000
86 #define P3P_MAX_MTU (9600)
87 #define P3P_MIN_MTU (68)
88 #define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
90 #define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
91 #define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
92 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
93 #define QLCNIC_LRO_BUFFER_EXTRA 2048
96 #define QLCNIC_MAX_FRAGS_PER_TX 14
97 #define MAX_TSO_HEADER_DESC 2
98 #define MGMT_CMD_DESC_RESV 4
99 #define TX_STOP_THRESH ((MAX_SKB_FRAGS >> 2) + MAX_TSO_HEADER_DESC \
100 + MGMT_CMD_DESC_RESV)
101 #define QLCNIC_MAX_TX_TIMEOUTS 2
103 /* Driver will use 1 Tx ring in INT-x/MSI/SRIOV mode. */
104 #define QLCNIC_SINGLE_RING 1
105 #define QLCNIC_DEF_SDS_RINGS 4
106 #define QLCNIC_DEF_TX_RINGS 4
107 #define QLCNIC_MAX_VNIC_TX_RINGS 4
108 #define QLCNIC_MAX_VNIC_SDS_RINGS 4
109 #define QLCNIC_83XX_MINIMUM_VECTOR 3
110 #define QLCNIC_82XX_MINIMUM_VECTOR 2
112 enum qlcnic_queue_type {
117 /* Operational mode for driver */
118 #define QLCNIC_VNIC_MODE 0xFF
119 #define QLCNIC_DEFAULT_MODE 0x0
121 /* Virtual NIC function count */
122 #define QLC_DEFAULT_VNIC_COUNT 8
123 #define QLC_84XX_VNIC_COUNT 16
126 * Following are the states of the Phantom. Phantom will set them and
127 * Host will read to check if the fields are correct.
129 #define PHAN_INITIALIZE_FAILED 0xffff
130 #define PHAN_INITIALIZE_COMPLETE 0xff01
132 /* Host writes the following to notify that it has done the init-handshake */
133 #define PHAN_INITIALIZE_ACK 0xf00f
134 #define PHAN_PEG_RCV_INITIALIZED 0xff01
136 #define NUM_RCV_DESC_RINGS 3
138 #define RCV_RING_NORMAL 0
139 #define RCV_RING_JUMBO 1
141 #define MIN_CMD_DESCRIPTORS 64
142 #define MIN_RCV_DESCRIPTORS 64
143 #define MIN_JUMBO_DESCRIPTORS 32
145 #define MAX_CMD_DESCRIPTORS 1024
146 #define MAX_RCV_DESCRIPTORS_1G 4096
147 #define MAX_RCV_DESCRIPTORS_10G 8192
148 #define MAX_RCV_DESCRIPTORS_VF 2048
149 #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512
150 #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024
152 #define DEFAULT_RCV_DESCRIPTORS_1G 2048
153 #define DEFAULT_RCV_DESCRIPTORS_10G 4096
154 #define DEFAULT_RCV_DESCRIPTORS_VF 1024
155 #define MAX_RDS_RINGS 2
157 #define get_next_index(index, length) \
158 (((index) + 1) & ((length) - 1))
161 * Following data structures describe the descriptors that will be used.
162 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
163 * we are doing LSO (above the 1500 size packet) only.
165 struct cmd_desc_type0 {
166 u8 tcp_hdr_offset; /* For LSO only */
167 u8 ip_hdr_offset; /* For LSO only */
168 __le16 flags_opcode; /* 15:13 unused, 12:7 opcode, 6:0 flags */
169 __le32 nfrags__length; /* 31:8 total len, 7:0 frag count */
173 __le16 encap_descr; /* 15:10 offset of outer L3 header,
174 * 9:6 number of 32bit words in outer L3 header,
175 * 5 offload outer L4 checksum,
176 * 4 offload outer L3 checksum,
177 * 3 Inner L4 type, TCP=0, UDP=1,
178 * 2 Inner L3 type, IPv4=0, IPv6=1,
179 * 1 Outer L3 type,IPv4=0, IPv6=1,
180 * 0 type of encapsulation, GRE=0, VXLAN=1
183 u8 port_ctxid; /* 7:4 ctxid 3:0 port */
184 u8 hdr_length; /* LSO only : MAC+IP+TCP Hdr size */
185 u8 outer_hdr_length; /* Encapsulation only */
191 __le16 buffer_length[4];
195 u8 eth_addr[ETH_ALEN];
196 __le16 vlan_TCI; /* In case of encapsulation,
197 * this is for outer VLAN
200 } __attribute__ ((aligned(64)));
202 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
204 __le16 reference_handle;
206 __le32 buffer_length; /* allocated buffer length (usually 2K) */
211 __le64 status_desc_data[2];
212 } __attribute__ ((aligned(16)));
214 /* UNIFIED ROMIMAGE */
215 #define QLCNIC_UNI_FW_MIN_SIZE 0xc8000
216 #define QLCNIC_UNI_DIR_SECT_PRODUCT_TBL 0x0
217 #define QLCNIC_UNI_DIR_SECT_BOOTLD 0x6
218 #define QLCNIC_UNI_DIR_SECT_FW 0x7
221 #define QLCNIC_UNI_CHIP_REV_OFF 10
222 #define QLCNIC_UNI_FLAGS_OFF 11
223 #define QLCNIC_UNI_BIOS_VERSION_OFF 12
224 #define QLCNIC_UNI_BOOTLD_IDX_OFF 27
225 #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29
227 struct uni_table_desc{
234 struct uni_data_desc{
240 /* Flash Defines and Structures */
241 #define QLCNIC_FLT_LOCATION 0x3F1000
242 #define QLCNIC_FDT_LOCATION 0x3F0000
243 #define QLCNIC_B0_FW_IMAGE_REGION 0x74
244 #define QLCNIC_C0_FW_IMAGE_REGION 0x97
245 #define QLCNIC_BOOTLD_REGION 0X72
246 struct qlcnic_flt_header {
253 struct qlcnic_flt_entry {
263 /* Flash Descriptor Table */
277 u8 write_enable_bits;
278 u8 write_statusreg_cmd;
279 u8 unprotected_sec_cmd;
284 u32 write_enable_data;
286 u8 write_disable_bits;
290 u8 protected_sec_cmd;
293 /* Magic number to let user know flash is programmed */
294 #define QLCNIC_BDINFO_MAGIC 0x12345678
296 #define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021
297 #define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022
298 #define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023
299 #define QLCNIC_BRDTYPE_P3P_4_GB 0x0024
300 #define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025
301 #define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
302 #define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
303 #define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028
304 #define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029
305 #define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a
306 #define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b
307 #define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031
308 #define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032
309 #define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080
311 #define QLCNIC_MSIX_TABLE_OFFSET 0x44
313 /* Flash memory map */
314 #define QLCNIC_BRDCFG_START 0x4000 /* board config */
315 #define QLCNIC_BOOTLD_START 0x10000 /* bootld */
316 #define QLCNIC_IMAGE_START 0x43000 /* compressed image */
317 #define QLCNIC_USER_START 0x3E8000 /* Firmare info */
319 #define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408)
320 #define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c)
321 #define QLCNIC_FW_SERIAL_NUM_OFFSET (QLCNIC_USER_START+0x81c)
322 #define QLCNIC_BIOS_VERSION_OFFSET (QLCNIC_USER_START+0x83c)
324 #define QLCNIC_BRDTYPE_OFFSET (QLCNIC_BRDCFG_START+0x8)
325 #define QLCNIC_FW_MAGIC_OFFSET (QLCNIC_BRDCFG_START+0x128)
327 #define QLCNIC_FW_MIN_SIZE (0x3fffff)
328 #define QLCNIC_UNIFIED_ROMIMAGE 0
329 #define QLCNIC_FLASH_ROMIMAGE 1
330 #define QLCNIC_UNKNOWN_ROMIMAGE 0xff
332 #define QLCNIC_UNIFIED_ROMIMAGE_NAME "phanfw.bin"
333 #define QLCNIC_FLASH_ROMIMAGE_NAME "flash"
335 extern char qlcnic_driver_name[];
337 extern int qlcnic_use_msi;
338 extern int qlcnic_use_msi_x;
339 extern int qlcnic_auto_fw_reset;
340 extern int qlcnic_load_fw_file;
342 /* Number of status descriptors to handle per interrupt */
343 #define MAX_STATUS_HANDLE (64)
346 * qlcnic_skb_frag{} is to contain mapping info for each SG list. This
347 * has to be freed when DMA is complete. This is part of qlcnic_tx_buffer{}.
349 struct qlcnic_skb_frag {
354 /* Following defines are for the state of the buffers */
355 #define QLCNIC_BUFFER_FREE 0
356 #define QLCNIC_BUFFER_BUSY 1
359 * There will be one qlcnic_buffer per skb packet. These will be
360 * used to save the dma info for pci_unmap_page()
362 struct qlcnic_cmd_buffer {
364 struct qlcnic_skb_frag frag_array[MAX_SKB_FRAGS + 1];
368 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
369 struct qlcnic_rx_buffer {
372 struct list_head list;
377 #define QLCNIC_GBE 0x01
378 #define QLCNIC_XGBE 0x02
381 * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
382 * adjusted based on configured MTU.
384 #define QLCNIC_INTR_COAL_TYPE_RX 1
385 #define QLCNIC_INTR_COAL_TYPE_TX 2
386 #define QLCNIC_INTR_COAL_TYPE_RX_TX 3
388 #define QLCNIC_DEF_INTR_COALESCE_RX_TIME_US 3
389 #define QLCNIC_DEF_INTR_COALESCE_RX_PACKETS 256
391 #define QLCNIC_DEF_INTR_COALESCE_TX_TIME_US 64
392 #define QLCNIC_DEF_INTR_COALESCE_TX_PACKETS 64
394 #define QLCNIC_INTR_DEFAULT 0x04
395 #define QLCNIC_CONFIG_INTR_COALESCE 3
396 #define QLCNIC_DEV_INFO_SIZE 2
398 struct qlcnic_nic_intr_coalesce {
409 struct qlcnic_83xx_dump_template_hdr {
426 struct qlcnic_82xx_dump_template_hdr {
444 #define QLC_PEX_DMA_READ_SIZE (PAGE_SIZE * 16)
446 struct qlcnic_fw_dump {
447 u8 clr; /* flag to indicate if dump is cleared */
448 bool enable; /* enable/disable dump */
449 u32 size; /* total size of the dump */
450 u32 cap_mask; /* Current capture mask */
451 void *data; /* dump data area */
453 dma_addr_t phys_addr;
456 /* Read only elements which are common between 82xx and 83xx
457 * template header. Update these values immediately after we read
458 * template header from Firmware
467 * One hardware_context{} per adapter
468 * contains interrupt info as well shared hardware info.
470 struct qlcnic_hardware_context {
471 void __iomem *pci_base0;
472 void __iomem *ocm_win_crb;
474 unsigned long pci_len0;
477 struct mutex mem_lock;
519 u32 extra_capability[3];
524 struct qlcnic_hardware_ops *hw_ops;
525 struct qlcnic_nic_intr_coalesce coal;
526 struct qlcnic_fw_dump fw_dump;
527 struct qlcnic_fdt fdt;
528 struct qlc_83xx_reset reset;
529 struct qlc_83xx_idc idc;
530 struct qlc_83xx_fw_info *fw_info;
531 struct qlcnic_intrpt_config *intr_tbl;
532 struct qlcnic_sriov *sriov;
535 u32 mbox_aen[QLC_83XX_MBX_AEN_CNT];
537 struct qlcnic_mailbox *mailbox;
539 u8 phys_port_id[ETH_ALEN];
542 struct device *hwmon_dev;
545 struct qlcnic_adapter_stats {
557 u64 encap_lso_frames;
558 u64 encap_tx_csummed;
559 u64 encap_rx_csummed;
562 u64 skb_alloc_failure;
564 u64 rx_dma_map_error;
565 u64 tx_dma_map_error;
567 u64 mac_filter_limit_overrun;
571 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
572 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
574 struct qlcnic_host_rds_ring {
575 void __iomem *crb_rcv_producer;
576 struct rcv_desc *desc_head;
577 struct qlcnic_rx_buffer *rx_buf_arr;
583 struct list_head free_list;
585 dma_addr_t phys_addr;
586 } ____cacheline_internodealigned_in_smp;
588 struct qlcnic_host_sds_ring {
591 void __iomem *crb_sts_consumer;
593 struct qlcnic_host_tx_ring *tx_ring;
594 struct status_desc *desc_head;
595 struct qlcnic_adapter *adapter;
596 struct napi_struct napi;
597 struct list_head free_list[NUM_RCV_DESC_RINGS];
599 void __iomem *crb_intr_mask;
602 dma_addr_t phys_addr;
603 char name[IFNAMSIZ + 12];
604 } ____cacheline_internodealigned_in_smp;
606 struct qlcnic_tx_queue_stats {
614 struct qlcnic_host_tx_ring {
616 void __iomem *crb_intr_mask;
617 char name[IFNAMSIZ + 12];
625 struct qlcnic_tx_queue_stats tx_stats;
627 void __iomem *crb_cmd_producer;
628 struct cmd_desc_type0 *desc_head;
629 struct qlcnic_adapter *adapter;
630 struct napi_struct napi;
631 struct qlcnic_cmd_buffer *cmd_buf_arr;
634 dma_addr_t phys_addr;
635 dma_addr_t hw_cons_phys_addr;
636 struct netdev_queue *txq;
637 /* Lock to protect Tx descriptors cleanup */
638 spinlock_t tx_clean_lock;
639 } ____cacheline_internodealigned_in_smp;
642 * Receive context. There is one such structure per instance of the
643 * receive processing. Any state information that is relevant to
644 * the receive, and is must be in this structure. The global data may be
647 struct qlcnic_recv_context {
648 struct qlcnic_host_rds_ring *rds_rings;
649 struct qlcnic_host_sds_ring *sds_rings;
655 /* HW context creation */
657 #define QLCNIC_OS_CRB_RETRY_COUNT 4000
659 #define QLCNIC_CDRP_CMD_BIT 0x80000000
662 * All responses must have the QLCNIC_CDRP_CMD_BIT cleared
663 * in the crb QLCNIC_CDRP_CRB_OFFSET.
665 #define QLCNIC_CDRP_FORM_RSP(rsp) (rsp)
666 #define QLCNIC_CDRP_IS_RSP(rsp) (((rsp) & QLCNIC_CDRP_CMD_BIT) == 0)
668 #define QLCNIC_CDRP_RSP_OK 0x00000001
669 #define QLCNIC_CDRP_RSP_FAIL 0x00000002
670 #define QLCNIC_CDRP_RSP_TIMEOUT 0x00000003
673 * All commands must have the QLCNIC_CDRP_CMD_BIT set in
674 * the crb QLCNIC_CDRP_CRB_OFFSET.
676 #define QLCNIC_CDRP_FORM_CMD(cmd) (QLCNIC_CDRP_CMD_BIT | (cmd))
678 #define QLCNIC_RCODE_SUCCESS 0
679 #define QLCNIC_RCODE_INVALID_ARGS 6
680 #define QLCNIC_RCODE_NOT_SUPPORTED 9
681 #define QLCNIC_RCODE_NOT_PERMITTED 10
682 #define QLCNIC_RCODE_NOT_IMPL 15
683 #define QLCNIC_RCODE_INVALID 16
684 #define QLCNIC_RCODE_TIMEOUT 17
685 #define QLCNIC_DESTROY_CTX_RESET 0
688 * Capabilities Announced
690 #define QLCNIC_CAP0_LEGACY_CONTEXT (1)
691 #define QLCNIC_CAP0_LEGACY_MN (1 << 2)
692 #define QLCNIC_CAP0_LSO (1 << 6)
693 #define QLCNIC_CAP0_JUMBO_CONTIGUOUS (1 << 7)
694 #define QLCNIC_CAP0_LRO_CONTIGUOUS (1 << 8)
695 #define QLCNIC_CAP0_VALIDOFF (1 << 11)
696 #define QLCNIC_CAP0_LRO_MSS (1 << 21)
697 #define QLCNIC_CAP0_TX_MULTI (1 << 22)
702 #define QLCNIC_HOST_CTX_STATE_FREED 0
703 #define QLCNIC_HOST_CTX_STATE_ACTIVE 2
709 struct qlcnic_hostrq_sds_ring {
710 __le64 host_phys_addr; /* Ring base addr */
711 __le32 ring_size; /* Ring entries */
713 __le16 rsvd; /* Padding */
716 struct qlcnic_hostrq_rds_ring {
717 __le64 host_phys_addr; /* Ring base addr */
718 __le64 buff_size; /* Packet buffer size */
719 __le32 ring_size; /* Ring entries */
720 __le32 ring_kind; /* Class of ring */
723 struct qlcnic_hostrq_rx_ctx {
724 __le64 host_rsp_dma_addr; /* Response dma'd here */
725 __le32 capabilities[4]; /* Flag bit vector */
726 __le32 host_int_crb_mode; /* Interrupt crb usage */
727 __le32 host_rds_crb_mode; /* RDS crb usage */
728 /* These ring offsets are relative to data[0] below */
729 __le32 rds_ring_offset; /* Offset to RDS config */
730 __le32 sds_ring_offset; /* Offset to SDS config */
731 __le16 num_rds_rings; /* Count of RDS rings */
732 __le16 num_sds_rings; /* Count of SDS rings */
733 __le16 valid_field_offset;
736 u8 reserved[128]; /* reserve space for future expansion*/
737 /* MUST BE 64-bit aligned.
738 The following is packed:
740 - N hostrq_sds_rings */
744 struct qlcnic_cardrsp_rds_ring{
745 __le32 host_producer_crb; /* Crb to use */
746 __le32 rsvd1; /* Padding */
749 struct qlcnic_cardrsp_sds_ring {
750 __le32 host_consumer_crb; /* Crb to use */
751 __le32 interrupt_crb; /* Crb to use */
754 struct qlcnic_cardrsp_rx_ctx {
755 /* These ring offsets are relative to data[0] below */
756 __le32 rds_ring_offset; /* Offset to RDS config */
757 __le32 sds_ring_offset; /* Offset to SDS config */
758 __le32 host_ctx_state; /* Starting State */
759 __le32 num_fn_per_port; /* How many PCI fn share the port */
760 __le16 num_rds_rings; /* Count of RDS rings */
761 __le16 num_sds_rings; /* Count of SDS rings */
762 __le16 context_id; /* Handle for context */
763 u8 phys_port; /* Physical id of port */
764 u8 virt_port; /* Virtual/Logical id of port */
765 u8 reserved[128]; /* save space for future expansion */
766 /* MUST BE 64-bit aligned.
767 The following is packed:
768 - N cardrsp_rds_rings
769 - N cardrs_sds_rings */
773 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \
774 (sizeof(HOSTRQ_RX) + \
775 (rds_rings)*(sizeof(struct qlcnic_hostrq_rds_ring)) + \
776 (sds_rings)*(sizeof(struct qlcnic_hostrq_sds_ring)))
778 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \
779 (sizeof(CARDRSP_RX) + \
780 (rds_rings)*(sizeof(struct qlcnic_cardrsp_rds_ring)) + \
781 (sds_rings)*(sizeof(struct qlcnic_cardrsp_sds_ring)))
787 struct qlcnic_hostrq_cds_ring {
788 __le64 host_phys_addr; /* Ring base addr */
789 __le32 ring_size; /* Ring entries */
790 __le32 rsvd; /* Padding */
793 struct qlcnic_hostrq_tx_ctx {
794 __le64 host_rsp_dma_addr; /* Response dma'd here */
795 __le64 cmd_cons_dma_addr; /* */
796 __le64 dummy_dma_addr; /* */
797 __le32 capabilities[4]; /* Flag bit vector */
798 __le32 host_int_crb_mode; /* Interrupt crb usage */
799 __le32 rsvd1; /* Padding */
800 __le16 rsvd2; /* Padding */
801 __le16 interrupt_ctl;
803 __le16 rsvd3; /* Padding */
804 struct qlcnic_hostrq_cds_ring cds_ring; /* Desc of cds ring */
805 u8 reserved[128]; /* future expansion */
808 struct qlcnic_cardrsp_cds_ring {
809 __le32 host_producer_crb; /* Crb to use */
810 __le32 interrupt_crb; /* Crb to use */
813 struct qlcnic_cardrsp_tx_ctx {
814 __le32 host_ctx_state; /* Starting state */
815 __le16 context_id; /* Handle for context */
816 u8 phys_port; /* Physical id of port */
817 u8 virt_port; /* Virtual/Logical id of port */
818 struct qlcnic_cardrsp_cds_ring cds_ring; /* Card cds settings */
819 u8 reserved[128]; /* future expansion */
822 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) (sizeof(HOSTRQ_TX))
823 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) (sizeof(CARDRSP_TX))
827 #define QLCNIC_HOST_RDS_CRB_MODE_UNIQUE 0
828 #define QLCNIC_HOST_RDS_CRB_MODE_SHARED 1
829 #define QLCNIC_HOST_RDS_CRB_MODE_CUSTOM 2
830 #define QLCNIC_HOST_RDS_CRB_MODE_MAX 3
832 #define QLCNIC_HOST_INT_CRB_MODE_UNIQUE 0
833 #define QLCNIC_HOST_INT_CRB_MODE_SHARED 1
834 #define QLCNIC_HOST_INT_CRB_MODE_NORX 2
835 #define QLCNIC_HOST_INT_CRB_MODE_NOTX 3
836 #define QLCNIC_HOST_INT_CRB_MODE_NORXTX 4
841 #define MC_COUNT_P3P 38
843 #define QLCNIC_MAC_NOOP 0
844 #define QLCNIC_MAC_ADD 1
845 #define QLCNIC_MAC_DEL 2
846 #define QLCNIC_MAC_VLAN_ADD 3
847 #define QLCNIC_MAC_VLAN_DEL 4
849 struct qlcnic_mac_vlan_list {
850 struct list_head list;
851 uint8_t mac_addr[ETH_ALEN+2];
856 #define NO_MAC_LEARN 0
857 #define DRV_MAC_LEARN 1
858 #define FDB_MAC_LEARN 2
860 #define QLCNIC_HOST_REQUEST 0x13
861 #define QLCNIC_REQUEST 0x14
863 #define QLCNIC_MAC_EVENT 0x1
865 #define QLCNIC_IP_UP 2
866 #define QLCNIC_IP_DOWN 3
868 #define QLCNIC_ILB_MODE 0x1
869 #define QLCNIC_ELB_MODE 0x2
870 #define QLCNIC_LB_MODE_MASK 0x3
872 #define QLCNIC_LINKEVENT 0x1
873 #define QLCNIC_LB_RESPONSE 0x2
874 #define QLCNIC_IS_LB_CONFIGURED(VAL) \
875 (VAL == (QLCNIC_LINKEVENT | QLCNIC_LB_RESPONSE))
878 * Driver --> Firmware
880 #define QLCNIC_H2C_OPCODE_CONFIG_RSS 0x1
881 #define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE 0x3
882 #define QLCNIC_H2C_OPCODE_CONFIG_LED 0x4
883 #define QLCNIC_H2C_OPCODE_LRO_REQUEST 0x7
884 #define QLCNIC_H2C_OPCODE_SET_MAC_RECEIVE_MODE 0xc
885 #define QLCNIC_H2C_OPCODE_CONFIG_IPADDR 0x12
887 #define QLCNIC_H2C_OPCODE_GET_LINKEVENT 0x15
888 #define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING 0x17
889 #define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO 0x18
890 #define QLCNIC_H2C_OPCODE_CONFIG_LOOPBACK 0x13
893 * Firmware --> Driver
896 #define QLCNIC_C2H_OPCODE_CONFIG_LOOPBACK 0x8f
897 #define QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE 0x8D
898 #define QLCNIC_C2H_OPCODE_GET_DCB_AEN 0x90
900 #define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
901 #define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
902 #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
904 #define QLCNIC_LRO_REQUEST_CLEANUP 4
906 /* Capabilites received */
907 #define QLCNIC_FW_CAPABILITY_TSO BIT_1
908 #define QLCNIC_FW_CAPABILITY_BDG BIT_8
909 #define QLCNIC_FW_CAPABILITY_FVLANTX BIT_9
910 #define QLCNIC_FW_CAPABILITY_HW_LRO BIT_10
911 #define QLCNIC_FW_CAPABILITY_2_MULTI_TX BIT_4
912 #define QLCNIC_FW_CAPABILITY_MULTI_LOOPBACK BIT_27
913 #define QLCNIC_FW_CAPABILITY_MORE_CAPS BIT_31
915 #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2
916 #define QLCNIC_FW_CAP2_HW_LRO_IPV6 BIT_3
917 #define QLCNIC_FW_CAPABILITY_SET_DRV_VER BIT_5
918 #define QLCNIC_FW_CAPABILITY_2_BEACON BIT_7
919 #define QLCNIC_FW_CAPABILITY_2_PER_PORT_ESWITCH_CFG BIT_9
921 #define QLCNIC_83XX_FW_CAPAB_ENCAP_RX_OFFLOAD BIT_0
922 #define QLCNIC_83XX_FW_CAPAB_ENCAP_TX_OFFLOAD BIT_1
923 #define QLCNIC_83XX_FW_CAPAB_ENCAP_CKO_OFFLOAD BIT_4
926 #define LINKEVENT_MODULE_NOT_PRESENT 1
927 #define LINKEVENT_MODULE_OPTICAL_UNKNOWN 2
928 #define LINKEVENT_MODULE_OPTICAL_SRLR 3
929 #define LINKEVENT_MODULE_OPTICAL_LRM 4
930 #define LINKEVENT_MODULE_OPTICAL_SFP_1G 5
931 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE 6
932 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN 7
933 #define LINKEVENT_MODULE_TWINAX 8
935 #define LINKSPEED_10GBPS 10000
936 #define LINKSPEED_1GBPS 1000
937 #define LINKSPEED_100MBPS 100
938 #define LINKSPEED_10MBPS 10
940 #define LINKSPEED_ENCODED_10MBPS 0
941 #define LINKSPEED_ENCODED_100MBPS 1
942 #define LINKSPEED_ENCODED_1GBPS 2
944 #define LINKEVENT_AUTONEG_DISABLED 0
945 #define LINKEVENT_AUTONEG_ENABLED 1
947 #define LINKEVENT_HALF_DUPLEX 0
948 #define LINKEVENT_FULL_DUPLEX 1
950 #define LINKEVENT_LINKSPEED_MBPS 0
951 #define LINKEVENT_LINKSPEED_ENCODED 1
953 /* firmware response header:
954 * 63:58 - message type
958 * 47:40 - completion id
963 #define qlcnic_get_nic_msg_opcode(msg_hdr) \
964 ((msg_hdr >> 32) & 0xFF)
966 struct qlcnic_fw_msg {
976 struct qlcnic_nic_req {
982 struct qlcnic_mac_req {
988 struct qlcnic_vlan_req {
993 struct qlcnic_ipaddr {
998 #define QLCNIC_MSI_ENABLED 0x02
999 #define QLCNIC_MSIX_ENABLED 0x04
1000 #define QLCNIC_LRO_ENABLED 0x01
1001 #define QLCNIC_LRO_DISABLED 0x00
1002 #define QLCNIC_BRIDGE_ENABLED 0X10
1003 #define QLCNIC_DIAG_ENABLED 0x20
1004 #define QLCNIC_ESWITCH_ENABLED 0x40
1005 #define QLCNIC_ADAPTER_INITIALIZED 0x80
1006 #define QLCNIC_TAGGING_ENABLED 0x100
1007 #define QLCNIC_MACSPOOF 0x200
1008 #define QLCNIC_MAC_OVERRIDE_DISABLED 0x400
1009 #define QLCNIC_PROMISC_DISABLED 0x800
1010 #define QLCNIC_NEED_FLR 0x1000
1011 #define QLCNIC_FW_RESET_OWNER 0x2000
1012 #define QLCNIC_FW_HANG 0x4000
1013 #define QLCNIC_FW_LRO_MSS_CAP 0x8000
1014 #define QLCNIC_TX_INTR_SHARED 0x10000
1015 #define QLCNIC_APP_CHANGED_FLAGS 0x20000
1016 #define QLCNIC_HAS_PHYS_PORT_ID 0x40000
1017 #define QLCNIC_TSS_RSS 0x80000
1019 #ifdef CONFIG_QLCNIC_VXLAN
1020 #define QLCNIC_ADD_VXLAN_PORT 0x100000
1021 #define QLCNIC_DEL_VXLAN_PORT 0x200000
1024 #define QLCNIC_VLAN_FILTERING 0x800000
1026 #define QLCNIC_IS_MSI_FAMILY(adapter) \
1027 ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED))
1028 #define QLCNIC_IS_TSO_CAPABLE(adapter) \
1029 ((adapter)->ahw->capabilities & QLCNIC_FW_CAPABILITY_TSO)
1031 #define QLCNIC_BEACON_EANBLE 0xC
1032 #define QLCNIC_BEACON_DISABLE 0xD
1034 #define QLCNIC_BEACON_ON 2
1035 #define QLCNIC_BEACON_OFF 0
1037 #define QLCNIC_MSIX_TBL_SPACE 8192
1038 #define QLCNIC_PCI_REG_MSIX_TBL 0x44
1039 #define QLCNIC_MSIX_TBL_PGSIZE 4096
1041 #define QLCNIC_ADAPTER_UP_MAGIC 777
1043 #define __QLCNIC_FW_ATTACHED 0
1044 #define __QLCNIC_DEV_UP 1
1045 #define __QLCNIC_RESETTING 2
1046 #define __QLCNIC_START_FW 4
1047 #define __QLCNIC_AER 5
1048 #define __QLCNIC_DIAG_RES_ALLOC 6
1049 #define __QLCNIC_LED_ENABLE 7
1050 #define __QLCNIC_ELB_INPROGRESS 8
1051 #define __QLCNIC_MULTI_TX_UNIQUE 9
1052 #define __QLCNIC_SRIOV_ENABLE 10
1053 #define __QLCNIC_SRIOV_CAPABLE 11
1054 #define __QLCNIC_MBX_POLL_ENABLE 12
1055 #define __QLCNIC_DIAG_MODE 13
1056 #define __QLCNIC_MAINTENANCE_MODE 16
1058 #define QLCNIC_INTERRUPT_TEST 1
1059 #define QLCNIC_LOOPBACK_TEST 2
1060 #define QLCNIC_LED_TEST 3
1062 #define QLCNIC_FILTER_AGE 80
1063 #define QLCNIC_READD_AGE 20
1064 #define QLCNIC_LB_MAX_FILTERS 64
1065 #define QLCNIC_LB_BUCKET_SIZE 32
1066 #define QLCNIC_ILB_MAX_RCV_LOOP 10
1068 struct qlcnic_filter {
1069 struct hlist_node fnode;
1072 unsigned long ftime;
1075 struct qlcnic_filter_hash {
1076 struct hlist_head *fhead;
1082 /* Mailbox specific data structures */
1083 struct qlcnic_mailbox {
1084 struct workqueue_struct *work_q;
1085 struct qlcnic_adapter *adapter;
1086 struct qlcnic_mbx_ops *ops;
1087 struct work_struct work;
1088 struct completion completion;
1089 struct list_head cmd_q;
1090 unsigned long status;
1091 spinlock_t queue_lock; /* Mailbox queue lock */
1092 spinlock_t aen_lock; /* Mailbox response/AEN lock */
1093 atomic_t rsp_status;
1097 struct qlcnic_adapter {
1098 struct qlcnic_hardware_context *ahw;
1099 struct qlcnic_recv_context *recv_ctx;
1100 struct qlcnic_host_tx_ring *tx_ring;
1101 struct net_device *netdev;
1102 struct pci_dev *pdev;
1104 unsigned long state;
1115 u8 max_sds_rings; /* max sds rings supported by adapter */
1116 u8 max_tx_rings; /* max tx rings supported by adapter */
1118 u8 drv_tx_rings; /* max tx rings supported by driver */
1119 u8 drv_sds_rings; /* max sds rings supported by driver */
1121 u8 drv_tss_rings; /* tss ring input */
1122 u8 drv_rss_rings; /* rss ring input */
1144 u8 mac_addr[ETH_ALEN];
1150 unsigned long vlans[BITS_TO_LONGS(VLAN_N_VID)];
1152 struct qlcnic_npar_info *npars;
1153 struct qlcnic_eswitch *eswitch;
1154 struct qlcnic_nic_template *nic_ops;
1156 struct qlcnic_adapter_stats stats;
1157 struct list_head mac_list;
1159 void __iomem *tgt_mask_reg;
1160 void __iomem *tgt_status_reg;
1161 void __iomem *crb_int_state_reg;
1162 void __iomem *isr_int_vec;
1164 struct msix_entry *msix_entries;
1165 struct workqueue_struct *qlcnic_wq;
1166 struct delayed_work fw_work;
1167 struct delayed_work idc_aen_work;
1168 struct delayed_work mbx_poll_work;
1169 struct qlcnic_dcb *dcb;
1171 struct qlcnic_filter_hash fhash;
1172 struct qlcnic_filter_hash rx_fhash;
1173 struct list_head vf_mc_list;
1175 spinlock_t mac_learn_lock;
1176 /* spinlock for catching rcv filters for eswitch traffic */
1177 spinlock_t rx_mac_learn_lock;
1178 u32 file_prd_off; /*File fw product offset*/
1181 const struct firmware *fw;
1184 struct qlcnic_info_le {
1186 __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */
1188 __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */
1190 __le32 capabilities;
1200 __le16 max_bw_reg_offset;
1201 __le16 max_linkspeed_reg_offset;
1205 __le16 max_tx_mac_filters;
1206 __le16 max_rx_mcast_mac_filters;
1207 __le16 max_rx_ucast_mac_filters;
1208 __le16 max_rx_ip_addr;
1209 __le16 max_rx_lro_flow;
1210 __le16 max_rx_status_rings;
1211 __le16 max_rx_buf_rings;
1212 __le16 max_tx_vlan_keys;
1214 u8 total_rss_engines;
1216 __le16 linkstate_reg_offset;
1218 __le16 max_local_ipv6_addrs;
1219 __le16 max_remote_ipv6_addrs;
1223 struct qlcnic_info {
1236 u16 max_bw_reg_offset;
1237 u16 max_linkspeed_reg_offset;
1241 u16 max_tx_mac_filters;
1242 u16 max_rx_mcast_mac_filters;
1243 u16 max_rx_ucast_mac_filters;
1245 u16 max_rx_lro_flow;
1246 u16 max_rx_status_rings;
1247 u16 max_rx_buf_rings;
1248 u16 max_tx_vlan_keys;
1250 u8 total_rss_engines;
1252 u16 linkstate_reg_offset;
1254 u16 max_local_ipv6_addrs;
1255 u16 max_remote_ipv6_addrs;
1258 struct qlcnic_pci_info_le {
1259 __le16 id; /* pci function id */
1260 __le16 active; /* 1 = Enabled */
1261 __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */
1262 __le16 default_port; /* default port number */
1264 __le16 tx_min_bw; /* Multiple of 100mbpc */
1266 __le16 reserved1[2];
1274 struct qlcnic_pci_info {
1285 struct qlcnic_npar_info {
1286 bool eswitch_status;
1304 struct qlcnic_eswitch {
1308 u8 active_ucast_filters;
1309 u8 max_ucast_filters;
1310 u8 max_active_vlans;
1313 #define QLCNIC_SWITCH_ENABLE BIT_1
1314 #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2
1315 #define QLCNIC_SWITCH_PROMISC_MODE BIT_3
1316 #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4
1320 /* Return codes for Error handling */
1321 #define QL_STATUS_INVALID_PARAM -1
1323 #define MAX_BW 100 /* % of link speed */
1324 #define MIN_BW 1 /* % of link speed */
1325 #define MAX_VLAN_ID 4095
1326 #define MIN_VLAN_ID 2
1327 #define DEFAULT_MAC_LEARN 1
1329 #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID)
1330 #define IS_VALID_BW(bw) (bw <= MAX_BW)
1332 struct qlcnic_pci_func_cfg {
1339 u8 def_mac_addr[ETH_ALEN];
1342 struct qlcnic_npar_func_cfg {
1353 struct qlcnic_pm_func_cfg {
1360 struct qlcnic_esw_func_cfg {
1374 #define QLCNIC_STATS_VERSION 1
1375 #define QLCNIC_STATS_PORT 1
1376 #define QLCNIC_STATS_ESWITCH 2
1377 #define QLCNIC_QUERY_RX_COUNTER 0
1378 #define QLCNIC_QUERY_TX_COUNTER 1
1379 #define QLCNIC_STATS_NOT_AVAIL 0xffffffffffffffffULL
1380 #define QLCNIC_FILL_STATS(VAL1) \
1381 (((VAL1) == QLCNIC_STATS_NOT_AVAIL) ? 0 : VAL1)
1382 #define QLCNIC_MAC_STATS 1
1383 #define QLCNIC_ESW_STATS 2
1385 #define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\
1387 if (((VAL1) == QLCNIC_STATS_NOT_AVAIL) && \
1388 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1390 else if (((VAL1) != QLCNIC_STATS_NOT_AVAIL) && \
1391 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1395 struct qlcnic_mac_statistics_le {
1396 __le64 mac_tx_frames;
1397 __le64 mac_tx_bytes;
1398 __le64 mac_tx_mcast_pkts;
1399 __le64 mac_tx_bcast_pkts;
1400 __le64 mac_tx_pause_cnt;
1401 __le64 mac_tx_ctrl_pkt;
1402 __le64 mac_tx_lt_64b_pkts;
1403 __le64 mac_tx_lt_127b_pkts;
1404 __le64 mac_tx_lt_255b_pkts;
1405 __le64 mac_tx_lt_511b_pkts;
1406 __le64 mac_tx_lt_1023b_pkts;
1407 __le64 mac_tx_lt_1518b_pkts;
1408 __le64 mac_tx_gt_1518b_pkts;
1411 __le64 mac_rx_frames;
1412 __le64 mac_rx_bytes;
1413 __le64 mac_rx_mcast_pkts;
1414 __le64 mac_rx_bcast_pkts;
1415 __le64 mac_rx_pause_cnt;
1416 __le64 mac_rx_ctrl_pkt;
1417 __le64 mac_rx_lt_64b_pkts;
1418 __le64 mac_rx_lt_127b_pkts;
1419 __le64 mac_rx_lt_255b_pkts;
1420 __le64 mac_rx_lt_511b_pkts;
1421 __le64 mac_rx_lt_1023b_pkts;
1422 __le64 mac_rx_lt_1518b_pkts;
1423 __le64 mac_rx_gt_1518b_pkts;
1426 __le64 mac_rx_length_error;
1427 __le64 mac_rx_length_small;
1428 __le64 mac_rx_length_large;
1429 __le64 mac_rx_jabber;
1430 __le64 mac_rx_dropped;
1431 __le64 mac_rx_crc_error;
1432 __le64 mac_align_error;
1435 struct qlcnic_mac_statistics {
1438 u64 mac_tx_mcast_pkts;
1439 u64 mac_tx_bcast_pkts;
1440 u64 mac_tx_pause_cnt;
1441 u64 mac_tx_ctrl_pkt;
1442 u64 mac_tx_lt_64b_pkts;
1443 u64 mac_tx_lt_127b_pkts;
1444 u64 mac_tx_lt_255b_pkts;
1445 u64 mac_tx_lt_511b_pkts;
1446 u64 mac_tx_lt_1023b_pkts;
1447 u64 mac_tx_lt_1518b_pkts;
1448 u64 mac_tx_gt_1518b_pkts;
1452 u64 mac_rx_mcast_pkts;
1453 u64 mac_rx_bcast_pkts;
1454 u64 mac_rx_pause_cnt;
1455 u64 mac_rx_ctrl_pkt;
1456 u64 mac_rx_lt_64b_pkts;
1457 u64 mac_rx_lt_127b_pkts;
1458 u64 mac_rx_lt_255b_pkts;
1459 u64 mac_rx_lt_511b_pkts;
1460 u64 mac_rx_lt_1023b_pkts;
1461 u64 mac_rx_lt_1518b_pkts;
1462 u64 mac_rx_gt_1518b_pkts;
1464 u64 mac_rx_length_error;
1465 u64 mac_rx_length_small;
1466 u64 mac_rx_length_large;
1469 u64 mac_rx_crc_error;
1470 u64 mac_align_error;
1473 struct qlcnic_esw_stats_le {
1478 __le64 unicast_frames;
1479 __le64 multicast_frames;
1480 __le64 broadcast_frames;
1481 __le64 dropped_frames;
1483 __le64 local_frames;
1488 struct __qlcnic_esw_statistics {
1494 u64 multicast_frames;
1495 u64 broadcast_frames;
1503 struct qlcnic_esw_statistics {
1504 struct __qlcnic_esw_statistics rx;
1505 struct __qlcnic_esw_statistics tx;
1508 #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed
1509 #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed
1510 #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed
1511 #define QLCNIC_FORCE_FW_RESET 0xdeaddead
1512 #define QLCNIC_SET_QUIESCENT 0xadd00010
1513 #define QLCNIC_RESET_QUIESCENT 0xadd00020
1520 struct qlcnic_cmd_args {
1521 struct completion completion;
1522 struct list_head list;
1523 struct _cdrp_cmd req;
1524 struct _cdrp_cmd rsp;
1525 atomic_t rsp_status;
1532 u32 *hdr; /* Back channel message header */
1533 u32 *pay; /* Back channel message payload */
1537 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
1538 int qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config);
1539 int qlcnic_pci_mem_write_2M(struct qlcnic_adapter *, u64 off, u64 data);
1540 int qlcnic_pci_mem_read_2M(struct qlcnic_adapter *, u64 off, u64 *data);
1542 #define ADDR_IN_RANGE(addr, low, high) \
1543 (((addr) < (high)) && ((addr) >= (low)))
1545 #define QLCRD32(adapter, off, err) \
1546 (adapter->ahw->hw_ops->read_reg)(adapter, off, err)
1548 #define QLCWR32(adapter, off, val) \
1549 adapter->ahw->hw_ops->write_reg(adapter, off, val)
1551 int qlcnic_pcie_sem_lock(struct qlcnic_adapter *, int, u32);
1552 void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int);
1554 #define qlcnic_rom_lock(a) \
1555 qlcnic_pcie_sem_lock((a), 2, QLCNIC_ROM_LOCK_ID)
1556 #define qlcnic_rom_unlock(a) \
1557 qlcnic_pcie_sem_unlock((a), 2)
1558 #define qlcnic_phy_lock(a) \
1559 qlcnic_pcie_sem_lock((a), 3, QLCNIC_PHY_LOCK_ID)
1560 #define qlcnic_phy_unlock(a) \
1561 qlcnic_pcie_sem_unlock((a), 3)
1562 #define qlcnic_sw_lock(a) \
1563 qlcnic_pcie_sem_lock((a), 6, 0)
1564 #define qlcnic_sw_unlock(a) \
1565 qlcnic_pcie_sem_unlock((a), 6)
1566 #define crb_win_lock(a) \
1567 qlcnic_pcie_sem_lock((a), 7, QLCNIC_CRB_WIN_LOCK_ID)
1568 #define crb_win_unlock(a) \
1569 qlcnic_pcie_sem_unlock((a), 7)
1571 #define __QLCNIC_MAX_LED_RATE 0xf
1572 #define __QLCNIC_MAX_LED_STATE 0x2
1574 #define MAX_CTL_CHECK 1000
1576 void qlcnic_prune_lb_filters(struct qlcnic_adapter *adapter);
1577 void qlcnic_delete_lb_filters(struct qlcnic_adapter *adapter);
1578 int qlcnic_dump_fw(struct qlcnic_adapter *);
1579 int qlcnic_enable_fw_dump_state(struct qlcnic_adapter *);
1580 bool qlcnic_check_fw_dump_state(struct qlcnic_adapter *);
1582 /* Functions from qlcnic_init.c */
1583 void qlcnic_schedule_work(struct qlcnic_adapter *, work_func_t, int);
1584 int qlcnic_load_firmware(struct qlcnic_adapter *adapter);
1585 int qlcnic_need_fw_reset(struct qlcnic_adapter *adapter);
1586 void qlcnic_request_firmware(struct qlcnic_adapter *adapter);
1587 void qlcnic_release_firmware(struct qlcnic_adapter *adapter);
1588 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter);
1589 int qlcnic_setup_idc_param(struct qlcnic_adapter *adapter);
1590 int qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter);
1592 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp);
1593 int qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
1594 u8 *bytes, size_t size);
1595 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter);
1596 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter);
1598 void __iomem *qlcnic_get_ioaddr(struct qlcnic_hardware_context *, u32);
1600 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter);
1601 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter);
1603 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter);
1604 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter);
1606 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter);
1607 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter);
1608 void qlcnic_release_tx_buffers(struct qlcnic_adapter *,
1609 struct qlcnic_host_tx_ring *);
1611 int qlcnic_check_fw_status(struct qlcnic_adapter *adapter);
1612 void qlcnic_watchdog_task(struct work_struct *work);
1613 void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
1614 struct qlcnic_host_rds_ring *rds_ring, u8 ring_id);
1615 void qlcnic_set_multi(struct net_device *netdev);
1616 int qlcnic_nic_add_mac(struct qlcnic_adapter *, const u8 *, u16);
1617 int qlcnic_nic_del_mac(struct qlcnic_adapter *, const u8 *);
1618 void qlcnic_82xx_free_mac_list(struct qlcnic_adapter *adapter);
1619 int qlcnic_82xx_read_phys_port_id(struct qlcnic_adapter *);
1621 int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu);
1622 int qlcnic_fw_cmd_set_drv_version(struct qlcnic_adapter *, u32);
1623 int qlcnic_change_mtu(struct net_device *netdev, int new_mtu);
1624 netdev_features_t qlcnic_fix_features(struct net_device *netdev,
1625 netdev_features_t features);
1626 int qlcnic_set_features(struct net_device *netdev, netdev_features_t features);
1627 int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable);
1628 void qlcnic_update_cmd_producer(struct qlcnic_host_tx_ring *);
1630 /* Functions from qlcnic_ethtool.c */
1631 int qlcnic_check_loopback_buff(unsigned char *, u8 []);
1632 int qlcnic_do_lb_test(struct qlcnic_adapter *, u8);
1634 /* Functions from qlcnic_main.c */
1635 int qlcnic_reset_context(struct qlcnic_adapter *);
1636 void qlcnic_diag_free_res(struct net_device *netdev, int);
1637 int qlcnic_diag_alloc_res(struct net_device *netdev, int);
1638 netdev_tx_t qlcnic_xmit_frame(struct sk_buff *, struct net_device *);
1639 void qlcnic_set_tx_ring_count(struct qlcnic_adapter *, u8);
1640 void qlcnic_set_sds_ring_count(struct qlcnic_adapter *, u8);
1641 int qlcnic_setup_rings(struct qlcnic_adapter *);
1642 int qlcnic_validate_rings(struct qlcnic_adapter *, __u32, int);
1643 void qlcnic_alloc_lb_filters_mem(struct qlcnic_adapter *adapter);
1644 int qlcnic_enable_msix(struct qlcnic_adapter *, u32);
1645 void qlcnic_set_drv_version(struct qlcnic_adapter *);
1647 /* eSwitch management functions */
1648 int qlcnic_config_switch_port(struct qlcnic_adapter *,
1649 struct qlcnic_esw_func_cfg *);
1651 int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
1652 struct qlcnic_esw_func_cfg *);
1653 int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
1654 int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,
1655 struct __qlcnic_esw_statistics *);
1656 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,
1657 struct __qlcnic_esw_statistics *);
1658 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);
1659 int qlcnic_get_mac_stats(struct qlcnic_adapter *, struct qlcnic_mac_statistics *);
1661 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd);
1663 int qlcnic_alloc_sds_rings(struct qlcnic_recv_context *, int);
1664 void qlcnic_free_sds_rings(struct qlcnic_recv_context *);
1665 void qlcnic_advert_link_change(struct qlcnic_adapter *, int);
1666 void qlcnic_free_tx_rings(struct qlcnic_adapter *);
1667 int qlcnic_alloc_tx_rings(struct qlcnic_adapter *, struct net_device *);
1668 void qlcnic_dump_mbx(struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1670 void qlcnic_create_sysfs_entries(struct qlcnic_adapter *adapter);
1671 void qlcnic_remove_sysfs_entries(struct qlcnic_adapter *adapter);
1672 void qlcnic_82xx_add_sysfs(struct qlcnic_adapter *adapter);
1673 void qlcnic_82xx_remove_sysfs(struct qlcnic_adapter *adapter);
1675 int qlcnicvf_config_bridged_mode(struct qlcnic_adapter *, u32);
1676 int qlcnicvf_config_led(struct qlcnic_adapter *, u32, u32);
1677 void qlcnic_set_vlan_config(struct qlcnic_adapter *,
1678 struct qlcnic_esw_func_cfg *);
1679 void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *,
1680 struct qlcnic_esw_func_cfg *);
1681 int qlcnic_setup_tss_rss_intr(struct qlcnic_adapter *);
1682 void qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1683 int qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1684 void __qlcnic_down(struct qlcnic_adapter *, struct net_device *);
1685 void qlcnic_detach(struct qlcnic_adapter *);
1686 void qlcnic_teardown_intr(struct qlcnic_adapter *);
1687 int qlcnic_attach(struct qlcnic_adapter *);
1688 int __qlcnic_up(struct qlcnic_adapter *, struct net_device *);
1689 void qlcnic_restore_indev_addr(struct net_device *, unsigned long);
1691 int qlcnic_check_temp(struct qlcnic_adapter *);
1692 int qlcnic_init_pci_info(struct qlcnic_adapter *);
1693 int qlcnic_set_default_offload_settings(struct qlcnic_adapter *);
1694 int qlcnic_reset_npar_config(struct qlcnic_adapter *);
1695 int qlcnic_set_eswitch_port_config(struct qlcnic_adapter *);
1696 int qlcnic_83xx_configure_opmode(struct qlcnic_adapter *adapter);
1697 int qlcnic_read_mac_addr(struct qlcnic_adapter *);
1698 int qlcnic_setup_netdev(struct qlcnic_adapter *, struct net_device *, int);
1699 void qlcnic_set_netdev_features(struct qlcnic_adapter *,
1700 struct qlcnic_esw_func_cfg *);
1701 void qlcnic_sriov_vf_set_multi(struct net_device *);
1702 int qlcnic_is_valid_nic_func(struct qlcnic_adapter *, u8);
1703 int qlcnic_get_pci_func_type(struct qlcnic_adapter *, u16, u16 *, u16 *,
1707 * QLOGIC Board information
1710 #define QLCNIC_MAX_BOARD_NAME_LEN 100
1711 struct qlcnic_board_info {
1712 unsigned short vendor;
1713 unsigned short device;
1714 unsigned short sub_vendor;
1715 unsigned short sub_device;
1716 char short_name[QLCNIC_MAX_BOARD_NAME_LEN];
1719 static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
1721 if (likely(tx_ring->producer < tx_ring->sw_consumer))
1722 return tx_ring->sw_consumer - tx_ring->producer;
1724 return tx_ring->sw_consumer + tx_ring->num_desc -
1728 struct qlcnic_nic_template {
1729 int (*config_bridged_mode) (struct qlcnic_adapter *, u32);
1730 int (*config_led) (struct qlcnic_adapter *, u32, u32);
1731 int (*start_firmware) (struct qlcnic_adapter *);
1732 int (*init_driver) (struct qlcnic_adapter *);
1733 void (*request_reset) (struct qlcnic_adapter *, u32);
1734 void (*cancel_idc_work) (struct qlcnic_adapter *);
1735 int (*napi_add)(struct qlcnic_adapter *, struct net_device *);
1736 void (*napi_del)(struct qlcnic_adapter *);
1737 void (*config_ipaddr)(struct qlcnic_adapter *, __be32, int);
1738 irqreturn_t (*clear_legacy_intr)(struct qlcnic_adapter *);
1739 int (*shutdown)(struct pci_dev *);
1740 int (*resume)(struct qlcnic_adapter *);
1743 struct qlcnic_mbx_ops {
1744 int (*enqueue_cmd) (struct qlcnic_adapter *,
1745 struct qlcnic_cmd_args *, unsigned long *);
1746 void (*dequeue_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1747 void (*decode_resp) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1748 void (*encode_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1749 void (*nofity_fw) (struct qlcnic_adapter *, u8);
1752 int qlcnic_83xx_init_mailbox_work(struct qlcnic_adapter *);
1753 void qlcnic_83xx_detach_mailbox_work(struct qlcnic_adapter *);
1754 void qlcnic_83xx_reinit_mbx_work(struct qlcnic_mailbox *mbx);
1755 void qlcnic_83xx_free_mailbox(struct qlcnic_mailbox *mbx);
1756 void qlcnic_update_stats(struct qlcnic_adapter *);
1758 /* Adapter hardware abstraction */
1759 struct qlcnic_hardware_ops {
1760 void (*read_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1761 void (*write_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1762 int (*read_reg) (struct qlcnic_adapter *, ulong, int *);
1763 int (*write_reg) (struct qlcnic_adapter *, ulong, u32);
1764 void (*get_ocm_win) (struct qlcnic_hardware_context *);
1765 int (*get_mac_address) (struct qlcnic_adapter *, u8 *, u8);
1766 int (*setup_intr) (struct qlcnic_adapter *);
1767 int (*alloc_mbx_args)(struct qlcnic_cmd_args *,
1768 struct qlcnic_adapter *, u32);
1769 int (*mbx_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1770 void (*get_func_no) (struct qlcnic_adapter *);
1771 int (*api_lock) (struct qlcnic_adapter *);
1772 void (*api_unlock) (struct qlcnic_adapter *);
1773 void (*add_sysfs) (struct qlcnic_adapter *);
1774 void (*remove_sysfs) (struct qlcnic_adapter *);
1775 void (*process_lb_rcv_ring_diag) (struct qlcnic_host_sds_ring *);
1776 int (*create_rx_ctx) (struct qlcnic_adapter *);
1777 int (*create_tx_ctx) (struct qlcnic_adapter *,
1778 struct qlcnic_host_tx_ring *, int);
1779 void (*del_rx_ctx) (struct qlcnic_adapter *);
1780 void (*del_tx_ctx) (struct qlcnic_adapter *,
1781 struct qlcnic_host_tx_ring *);
1782 int (*setup_link_event) (struct qlcnic_adapter *, int);
1783 int (*get_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *, u8);
1784 int (*get_pci_info) (struct qlcnic_adapter *, struct qlcnic_pci_info *);
1785 int (*set_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *);
1786 int (*change_macvlan) (struct qlcnic_adapter *, u8*, u16, u8);
1787 void (*napi_enable) (struct qlcnic_adapter *);
1788 void (*napi_disable) (struct qlcnic_adapter *);
1789 int (*config_intr_coal) (struct qlcnic_adapter *,
1790 struct ethtool_coalesce *);
1791 int (*config_rss) (struct qlcnic_adapter *, int);
1792 int (*config_hw_lro) (struct qlcnic_adapter *, int);
1793 int (*config_loopback) (struct qlcnic_adapter *, u8);
1794 int (*clear_loopback) (struct qlcnic_adapter *, u8);
1795 int (*config_promisc_mode) (struct qlcnic_adapter *, u32);
1796 void (*change_l2_filter) (struct qlcnic_adapter *, u64 *, u16);
1797 int (*get_board_info) (struct qlcnic_adapter *);
1798 void (*set_mac_filter_count) (struct qlcnic_adapter *);
1799 void (*free_mac_list) (struct qlcnic_adapter *);
1800 int (*read_phys_port_id) (struct qlcnic_adapter *);
1801 pci_ers_result_t (*io_error_detected) (struct pci_dev *,
1802 pci_channel_state_t);
1803 pci_ers_result_t (*io_slot_reset) (struct pci_dev *);
1804 void (*io_resume) (struct pci_dev *);
1805 void (*get_beacon_state)(struct qlcnic_adapter *);
1806 void (*enable_sds_intr) (struct qlcnic_adapter *,
1807 struct qlcnic_host_sds_ring *);
1808 void (*disable_sds_intr) (struct qlcnic_adapter *,
1809 struct qlcnic_host_sds_ring *);
1810 void (*enable_tx_intr) (struct qlcnic_adapter *,
1811 struct qlcnic_host_tx_ring *);
1812 void (*disable_tx_intr) (struct qlcnic_adapter *,
1813 struct qlcnic_host_tx_ring *);
1814 u32 (*get_saved_state)(void *, u32);
1815 void (*set_saved_state)(void *, u32, u32);
1816 void (*cache_tmpl_hdr_values)(struct qlcnic_fw_dump *);
1817 u32 (*get_cap_size)(void *, int);
1818 void (*set_sys_info)(void *, int, u32);
1819 void (*store_cap_mask)(void *, u32);
1822 extern struct qlcnic_nic_template qlcnic_vf_ops;
1824 static inline bool qlcnic_encap_tx_offload(struct qlcnic_adapter *adapter)
1826 return adapter->ahw->extra_capability[0] &
1827 QLCNIC_83XX_FW_CAPAB_ENCAP_TX_OFFLOAD;
1830 static inline bool qlcnic_encap_rx_offload(struct qlcnic_adapter *adapter)
1832 return adapter->ahw->extra_capability[0] &
1833 QLCNIC_83XX_FW_CAPAB_ENCAP_RX_OFFLOAD;
1836 static inline int qlcnic_start_firmware(struct qlcnic_adapter *adapter)
1838 return adapter->nic_ops->start_firmware(adapter);
1841 static inline void qlcnic_read_crb(struct qlcnic_adapter *adapter, char *buf,
1842 loff_t offset, size_t size)
1844 adapter->ahw->hw_ops->read_crb(adapter, buf, offset, size);
1847 static inline void qlcnic_write_crb(struct qlcnic_adapter *adapter, char *buf,
1848 loff_t offset, size_t size)
1850 adapter->ahw->hw_ops->write_crb(adapter, buf, offset, size);
1853 static inline int qlcnic_hw_write_wx_2M(struct qlcnic_adapter *adapter,
1854 ulong off, u32 data)
1856 return adapter->ahw->hw_ops->write_reg(adapter, off, data);
1859 static inline int qlcnic_get_mac_address(struct qlcnic_adapter *adapter,
1860 u8 *mac, u8 function)
1862 return adapter->ahw->hw_ops->get_mac_address(adapter, mac, function);
1865 static inline int qlcnic_setup_intr(struct qlcnic_adapter *adapter)
1867 return adapter->ahw->hw_ops->setup_intr(adapter);
1870 static inline int qlcnic_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
1871 struct qlcnic_adapter *adapter, u32 arg)
1873 return adapter->ahw->hw_ops->alloc_mbx_args(mbx, adapter, arg);
1876 static inline int qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
1877 struct qlcnic_cmd_args *cmd)
1879 if (adapter->ahw->hw_ops->mbx_cmd)
1880 return adapter->ahw->hw_ops->mbx_cmd(adapter, cmd);
1885 static inline void qlcnic_get_func_no(struct qlcnic_adapter *adapter)
1887 adapter->ahw->hw_ops->get_func_no(adapter);
1890 static inline int qlcnic_api_lock(struct qlcnic_adapter *adapter)
1892 return adapter->ahw->hw_ops->api_lock(adapter);
1895 static inline void qlcnic_api_unlock(struct qlcnic_adapter *adapter)
1897 adapter->ahw->hw_ops->api_unlock(adapter);
1900 static inline void qlcnic_add_sysfs(struct qlcnic_adapter *adapter)
1902 if (adapter->ahw->hw_ops->add_sysfs)
1903 adapter->ahw->hw_ops->add_sysfs(adapter);
1906 static inline void qlcnic_remove_sysfs(struct qlcnic_adapter *adapter)
1908 if (adapter->ahw->hw_ops->remove_sysfs)
1909 adapter->ahw->hw_ops->remove_sysfs(adapter);
1913 qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
1915 sds_ring->adapter->ahw->hw_ops->process_lb_rcv_ring_diag(sds_ring);
1918 static inline int qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
1920 return adapter->ahw->hw_ops->create_rx_ctx(adapter);
1923 static inline int qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
1924 struct qlcnic_host_tx_ring *ptr,
1927 return adapter->ahw->hw_ops->create_tx_ctx(adapter, ptr, ring);
1930 static inline void qlcnic_fw_cmd_del_rx_ctx(struct qlcnic_adapter *adapter)
1932 return adapter->ahw->hw_ops->del_rx_ctx(adapter);
1935 static inline void qlcnic_fw_cmd_del_tx_ctx(struct qlcnic_adapter *adapter,
1936 struct qlcnic_host_tx_ring *ptr)
1938 return adapter->ahw->hw_ops->del_tx_ctx(adapter, ptr);
1941 static inline int qlcnic_linkevent_request(struct qlcnic_adapter *adapter,
1944 return adapter->ahw->hw_ops->setup_link_event(adapter, enable);
1947 static inline int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
1948 struct qlcnic_info *info, u8 id)
1950 return adapter->ahw->hw_ops->get_nic_info(adapter, info, id);
1953 static inline int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
1954 struct qlcnic_pci_info *info)
1956 return adapter->ahw->hw_ops->get_pci_info(adapter, info);
1959 static inline int qlcnic_set_nic_info(struct qlcnic_adapter *adapter,
1960 struct qlcnic_info *info)
1962 return adapter->ahw->hw_ops->set_nic_info(adapter, info);
1965 static inline int qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter,
1966 u8 *addr, u16 id, u8 cmd)
1968 return adapter->ahw->hw_ops->change_macvlan(adapter, addr, id, cmd);
1971 static inline int qlcnic_napi_add(struct qlcnic_adapter *adapter,
1972 struct net_device *netdev)
1974 return adapter->nic_ops->napi_add(adapter, netdev);
1977 static inline void qlcnic_napi_del(struct qlcnic_adapter *adapter)
1979 adapter->nic_ops->napi_del(adapter);
1982 static inline void qlcnic_napi_enable(struct qlcnic_adapter *adapter)
1984 adapter->ahw->hw_ops->napi_enable(adapter);
1987 static inline int __qlcnic_shutdown(struct pci_dev *pdev)
1989 struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1991 return adapter->nic_ops->shutdown(pdev);
1994 static inline int __qlcnic_resume(struct qlcnic_adapter *adapter)
1996 return adapter->nic_ops->resume(adapter);
1999 static inline void qlcnic_napi_disable(struct qlcnic_adapter *adapter)
2001 adapter->ahw->hw_ops->napi_disable(adapter);
2004 static inline int qlcnic_config_intr_coalesce(struct qlcnic_adapter *adapter,
2005 struct ethtool_coalesce *ethcoal)
2007 return adapter->ahw->hw_ops->config_intr_coal(adapter, ethcoal);
2010 static inline int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable)
2012 return adapter->ahw->hw_ops->config_rss(adapter, enable);
2015 static inline int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter,
2018 return adapter->ahw->hw_ops->config_hw_lro(adapter, enable);
2021 static inline int qlcnic_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
2023 return adapter->ahw->hw_ops->config_loopback(adapter, mode);
2026 static inline int qlcnic_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
2028 return adapter->ahw->hw_ops->clear_loopback(adapter, mode);
2031 static inline int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter,
2034 return adapter->ahw->hw_ops->config_promisc_mode(adapter, mode);
2037 static inline void qlcnic_change_filter(struct qlcnic_adapter *adapter,
2040 adapter->ahw->hw_ops->change_l2_filter(adapter, addr, id);
2043 static inline int qlcnic_get_board_info(struct qlcnic_adapter *adapter)
2045 return adapter->ahw->hw_ops->get_board_info(adapter);
2048 static inline void qlcnic_free_mac_list(struct qlcnic_adapter *adapter)
2050 return adapter->ahw->hw_ops->free_mac_list(adapter);
2053 static inline void qlcnic_set_mac_filter_count(struct qlcnic_adapter *adapter)
2055 if (adapter->ahw->hw_ops->set_mac_filter_count)
2056 adapter->ahw->hw_ops->set_mac_filter_count(adapter);
2059 static inline void qlcnic_get_beacon_state(struct qlcnic_adapter *adapter)
2061 adapter->ahw->hw_ops->get_beacon_state(adapter);
2064 static inline void qlcnic_read_phys_port_id(struct qlcnic_adapter *adapter)
2066 if (adapter->ahw->hw_ops->read_phys_port_id)
2067 adapter->ahw->hw_ops->read_phys_port_id(adapter);
2070 static inline u32 qlcnic_get_saved_state(struct qlcnic_adapter *adapter,
2071 void *t_hdr, u32 index)
2073 return adapter->ahw->hw_ops->get_saved_state(t_hdr, index);
2076 static inline void qlcnic_set_saved_state(struct qlcnic_adapter *adapter,
2077 void *t_hdr, u32 index, u32 value)
2079 adapter->ahw->hw_ops->set_saved_state(t_hdr, index, value);
2082 static inline void qlcnic_cache_tmpl_hdr_values(struct qlcnic_adapter *adapter,
2083 struct qlcnic_fw_dump *fw_dump)
2085 adapter->ahw->hw_ops->cache_tmpl_hdr_values(fw_dump);
2088 static inline u32 qlcnic_get_cap_size(struct qlcnic_adapter *adapter,
2089 void *tmpl_hdr, int index)
2091 return adapter->ahw->hw_ops->get_cap_size(tmpl_hdr, index);
2094 static inline void qlcnic_set_sys_info(struct qlcnic_adapter *adapter,
2095 void *tmpl_hdr, int idx, u32 value)
2097 adapter->ahw->hw_ops->set_sys_info(tmpl_hdr, idx, value);
2100 static inline void qlcnic_store_cap_mask(struct qlcnic_adapter *adapter,
2101 void *tmpl_hdr, u32 mask)
2103 adapter->ahw->hw_ops->store_cap_mask(tmpl_hdr, mask);
2106 static inline void qlcnic_dev_request_reset(struct qlcnic_adapter *adapter,
2109 if (adapter->nic_ops->request_reset)
2110 adapter->nic_ops->request_reset(adapter, key);
2113 static inline void qlcnic_cancel_idc_work(struct qlcnic_adapter *adapter)
2115 if (adapter->nic_ops->cancel_idc_work)
2116 adapter->nic_ops->cancel_idc_work(adapter);
2119 static inline irqreturn_t
2120 qlcnic_clear_legacy_intr(struct qlcnic_adapter *adapter)
2122 return adapter->nic_ops->clear_legacy_intr(adapter);
2125 static inline int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state,
2128 return adapter->nic_ops->config_led(adapter, state, rate);
2131 static inline void qlcnic_config_ipaddr(struct qlcnic_adapter *adapter,
2134 adapter->nic_ops->config_ipaddr(adapter, ip, cmd);
2137 static inline bool qlcnic_check_multi_tx(struct qlcnic_adapter *adapter)
2139 return test_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2143 qlcnic_82xx_enable_tx_intr(struct qlcnic_adapter *adapter,
2144 struct qlcnic_host_tx_ring *tx_ring)
2146 if (qlcnic_check_multi_tx(adapter) &&
2147 !adapter->ahw->diag_test)
2148 writel(0x0, tx_ring->crb_intr_mask);
2152 qlcnic_82xx_disable_tx_intr(struct qlcnic_adapter *adapter,
2153 struct qlcnic_host_tx_ring *tx_ring)
2155 if (qlcnic_check_multi_tx(adapter) &&
2156 !adapter->ahw->diag_test)
2157 writel(1, tx_ring->crb_intr_mask);
2161 qlcnic_83xx_enable_tx_intr(struct qlcnic_adapter *adapter,
2162 struct qlcnic_host_tx_ring *tx_ring)
2164 writel(0, tx_ring->crb_intr_mask);
2168 qlcnic_83xx_disable_tx_intr(struct qlcnic_adapter *adapter,
2169 struct qlcnic_host_tx_ring *tx_ring)
2171 writel(1, tx_ring->crb_intr_mask);
2174 /* Enable MSI-x and INT-x interrupts */
2176 qlcnic_83xx_enable_sds_intr(struct qlcnic_adapter *adapter,
2177 struct qlcnic_host_sds_ring *sds_ring)
2179 writel(0, sds_ring->crb_intr_mask);
2182 /* Disable MSI-x and INT-x interrupts */
2184 qlcnic_83xx_disable_sds_intr(struct qlcnic_adapter *adapter,
2185 struct qlcnic_host_sds_ring *sds_ring)
2187 writel(1, sds_ring->crb_intr_mask);
2190 static inline void qlcnic_disable_multi_tx(struct qlcnic_adapter *adapter)
2192 test_and_clear_bit(__QLCNIC_MULTI_TX_UNIQUE, &adapter->state);
2193 adapter->drv_tx_rings = QLCNIC_SINGLE_RING;
2196 /* When operating in a muti tx mode, driver needs to write 0x1
2197 * to src register, instead of 0x0 to disable receiving interrupt.
2200 qlcnic_82xx_disable_sds_intr(struct qlcnic_adapter *adapter,
2201 struct qlcnic_host_sds_ring *sds_ring)
2203 if (qlcnic_check_multi_tx(adapter) &&
2204 !adapter->ahw->diag_test &&
2205 (adapter->flags & QLCNIC_MSIX_ENABLED))
2206 writel(0x1, sds_ring->crb_intr_mask);
2208 writel(0, sds_ring->crb_intr_mask);
2211 static inline void qlcnic_enable_sds_intr(struct qlcnic_adapter *adapter,
2212 struct qlcnic_host_sds_ring *sds_ring)
2214 if (adapter->ahw->hw_ops->enable_sds_intr)
2215 adapter->ahw->hw_ops->enable_sds_intr(adapter, sds_ring);
2219 qlcnic_disable_sds_intr(struct qlcnic_adapter *adapter,
2220 struct qlcnic_host_sds_ring *sds_ring)
2222 if (adapter->ahw->hw_ops->disable_sds_intr)
2223 adapter->ahw->hw_ops->disable_sds_intr(adapter, sds_ring);
2226 static inline void qlcnic_enable_tx_intr(struct qlcnic_adapter *adapter,
2227 struct qlcnic_host_tx_ring *tx_ring)
2229 if (adapter->ahw->hw_ops->enable_tx_intr)
2230 adapter->ahw->hw_ops->enable_tx_intr(adapter, tx_ring);
2233 static inline void qlcnic_disable_tx_intr(struct qlcnic_adapter *adapter,
2234 struct qlcnic_host_tx_ring *tx_ring)
2236 if (adapter->ahw->hw_ops->disable_tx_intr)
2237 adapter->ahw->hw_ops->disable_tx_intr(adapter, tx_ring);
2240 /* When operating in a muti tx mode, driver needs to write 0x0
2241 * to src register, instead of 0x1 to enable receiving interrupts.
2244 qlcnic_82xx_enable_sds_intr(struct qlcnic_adapter *adapter,
2245 struct qlcnic_host_sds_ring *sds_ring)
2247 if (qlcnic_check_multi_tx(adapter) &&
2248 !adapter->ahw->diag_test &&
2249 (adapter->flags & QLCNIC_MSIX_ENABLED))
2250 writel(0, sds_ring->crb_intr_mask);
2252 writel(0x1, sds_ring->crb_intr_mask);
2254 if (!QLCNIC_IS_MSI_FAMILY(adapter))
2255 writel(0xfbff, adapter->tgt_mask_reg);
2258 static inline int qlcnic_get_diag_lock(struct qlcnic_adapter *adapter)
2260 return test_and_set_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2263 static inline void qlcnic_release_diag_lock(struct qlcnic_adapter *adapter)
2265 clear_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2268 static inline int qlcnic_check_diag_status(struct qlcnic_adapter *adapter)
2270 return test_bit(__QLCNIC_DIAG_MODE, &adapter->state);
2273 extern const struct ethtool_ops qlcnic_sriov_vf_ethtool_ops;
2274 extern const struct ethtool_ops qlcnic_ethtool_ops;
2275 extern const struct ethtool_ops qlcnic_ethtool_failed_ops;
2277 #define QLCDB(adapter, lvl, _fmt, _args...) do { \
2278 if (NETIF_MSG_##lvl & adapter->ahw->msg_enable) \
2279 printk(KERN_INFO "%s: %s: " _fmt, \
2280 dev_name(&adapter->pdev->dev), \
2281 __func__, ##_args); \
2284 #define PCI_DEVICE_ID_QLOGIC_QLE824X 0x8020
2285 #define PCI_DEVICE_ID_QLOGIC_QLE834X 0x8030
2286 #define PCI_DEVICE_ID_QLOGIC_VF_QLE834X 0x8430
2287 #define PCI_DEVICE_ID_QLOGIC_QLE844X 0x8040
2288 #define PCI_DEVICE_ID_QLOGIC_VF_QLE844X 0x8440
2290 static inline bool qlcnic_82xx_check(struct qlcnic_adapter *adapter)
2292 unsigned short device = adapter->pdev->device;
2293 return (device == PCI_DEVICE_ID_QLOGIC_QLE824X) ? true : false;
2296 static inline bool qlcnic_84xx_check(struct qlcnic_adapter *adapter)
2298 unsigned short device = adapter->pdev->device;
2300 return ((device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2301 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X)) ? true : false;
2304 static inline bool qlcnic_83xx_check(struct qlcnic_adapter *adapter)
2306 unsigned short device = adapter->pdev->device;
2309 status = ((device == PCI_DEVICE_ID_QLOGIC_QLE834X) ||
2310 (device == PCI_DEVICE_ID_QLOGIC_QLE844X) ||
2311 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X) ||
2312 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X)) ? true : false;
2317 static inline bool qlcnic_sriov_pf_check(struct qlcnic_adapter *adapter)
2319 return (adapter->ahw->op_mode == QLCNIC_SRIOV_PF_FUNC) ? true : false;
2322 static inline bool qlcnic_sriov_vf_check(struct qlcnic_adapter *adapter)
2324 unsigned short device = adapter->pdev->device;
2327 status = ((device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ||
2328 (device == PCI_DEVICE_ID_QLOGIC_VF_QLE844X)) ? true : false;
2333 static inline bool qlcnic_83xx_pf_check(struct qlcnic_adapter *adapter)
2335 unsigned short device = adapter->pdev->device;
2337 return (device == PCI_DEVICE_ID_QLOGIC_QLE834X) ? true : false;
2340 static inline bool qlcnic_83xx_vf_check(struct qlcnic_adapter *adapter)
2342 unsigned short device = adapter->pdev->device;
2344 return (device == PCI_DEVICE_ID_QLOGIC_VF_QLE834X) ? true : false;
2347 static inline bool qlcnic_sriov_check(struct qlcnic_adapter *adapter)
2351 status = (qlcnic_sriov_pf_check(adapter) ||
2352 qlcnic_sriov_vf_check(adapter)) ? true : false;
2357 static inline u32 qlcnic_get_vnic_func_count(struct qlcnic_adapter *adapter)
2359 if (qlcnic_84xx_check(adapter))
2360 return QLC_84XX_VNIC_COUNT;
2362 return QLC_DEFAULT_VNIC_COUNT;
2365 #ifdef CONFIG_QLCNIC_HWMON
2366 void qlcnic_register_hwmon_dev(struct qlcnic_adapter *);
2367 void qlcnic_unregister_hwmon_dev(struct qlcnic_adapter *);
2369 static inline void qlcnic_register_hwmon_dev(struct qlcnic_adapter *adapter)
2373 static inline void qlcnic_unregister_hwmon_dev(struct qlcnic_adapter *adapter)
2378 #endif /* __QLCNIC_H_ */