2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
41 struct mlx4_mod_stat_cfg {
63 int max_requester_per_qp;
64 int max_responder_per_qp;
66 int local_ca_ack_delay;
69 int ib_mtu[MLX4_MAX_PORTS + 1];
70 int max_port_width[MLX4_MAX_PORTS + 1];
71 int max_vl[MLX4_MAX_PORTS + 1];
72 int max_gids[MLX4_MAX_PORTS + 1];
73 int max_pkeys[MLX4_MAX_PORTS + 1];
74 u64 def_mac[MLX4_MAX_PORTS + 1];
75 u16 eth_mtu[MLX4_MAX_PORTS + 1];
76 int trans_type[MLX4_MAX_PORTS + 1];
77 int vendor_oui[MLX4_MAX_PORTS + 1];
78 u16 wavelength[MLX4_MAX_PORTS + 1];
79 u64 trans_code[MLX4_MAX_PORTS + 1];
80 u16 stat_rate_support;
81 int fs_log_max_ucast_qp_range_size;
82 int fs_max_num_qp_per_entry;
117 u8 supported_port_types[MLX4_MAX_PORTS + 1];
118 u8 suggested_type[MLX4_MAX_PORTS + 1];
119 u8 default_sense[MLX4_MAX_PORTS + 1];
120 u8 log_max_macs[MLX4_MAX_PORTS + 1];
121 u8 log_max_vlans[MLX4_MAX_PORTS + 1];
125 struct mlx4_func_cap {
128 u32 pf_context_behaviour;
137 u8 physical_port[MLX4_MAX_PORTS + 1];
138 u8 port_flags[MLX4_MAX_PORTS + 1];
141 struct mlx4_adapter {
142 char board_id[MLX4_BOARD_ID_LEN];
146 struct mlx4_init_hca_param {
169 u8 uar_page_sz; /* log pg sz in 4k chunks */
170 u8 fs_hash_enable_bits;
173 struct mlx4_init_ib_param {
187 struct mlx4_set_ib_param {
194 int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap);
195 int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, struct mlx4_func_cap *func_cap);
196 int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave,
197 struct mlx4_vhcr *vhcr,
198 struct mlx4_cmd_mailbox *inbox,
199 struct mlx4_cmd_mailbox *outbox,
200 struct mlx4_cmd_info *cmd);
201 int mlx4_MAP_FA(struct mlx4_dev *dev, struct mlx4_icm *icm);
202 int mlx4_UNMAP_FA(struct mlx4_dev *dev);
203 int mlx4_RUN_FW(struct mlx4_dev *dev);
204 int mlx4_QUERY_FW(struct mlx4_dev *dev);
205 int mlx4_QUERY_ADAPTER(struct mlx4_dev *dev, struct mlx4_adapter *adapter);
206 int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param);
207 int mlx4_QUERY_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param);
208 int mlx4_CLOSE_HCA(struct mlx4_dev *dev, int panic);
209 int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt);
210 int mlx4_SET_ICM_SIZE(struct mlx4_dev *dev, u64 icm_size, u64 *aux_pages);
211 int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm);
212 int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev);
213 int mlx4_NOP(struct mlx4_dev *dev);
214 int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg);
216 #endif /* MLX4_FW_H */