net/mlx4_en: Fix BlueFlame race
[firefly-linux-kernel-4.4.55.git] / drivers / net / ethernet / mellanox / mlx4 / en_tx.c
1 /*
2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33
34 #include <asm/page.h>
35 #include <linux/mlx4/cq.h>
36 #include <linux/slab.h>
37 #include <linux/mlx4/qp.h>
38 #include <linux/skbuff.h>
39 #include <linux/if_vlan.h>
40 #include <linux/vmalloc.h>
41 #include <linux/tcp.h>
42 #include <linux/moduleparam.h>
43
44 #include "mlx4_en.h"
45
46 enum {
47         MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */
48         MAX_BF = 256,
49 };
50
51 static int inline_thold __read_mostly = MAX_INLINE;
52
53 module_param_named(inline_thold, inline_thold, int, 0444);
54 MODULE_PARM_DESC(inline_thold, "threshold for using inline data");
55
56 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
57                            struct mlx4_en_tx_ring *ring, int qpn, u32 size,
58                            u16 stride)
59 {
60         struct mlx4_en_dev *mdev = priv->mdev;
61         int tmp;
62         int err;
63
64         ring->size = size;
65         ring->size_mask = size - 1;
66         ring->stride = stride;
67
68         inline_thold = min(inline_thold, MAX_INLINE);
69
70         tmp = size * sizeof(struct mlx4_en_tx_info);
71         ring->tx_info = vmalloc(tmp);
72         if (!ring->tx_info)
73                 return -ENOMEM;
74
75         en_dbg(DRV, priv, "Allocated tx_info ring at addr:%p size:%d\n",
76                  ring->tx_info, tmp);
77
78         ring->bounce_buf = kmalloc(MAX_DESC_SIZE, GFP_KERNEL);
79         if (!ring->bounce_buf) {
80                 err = -ENOMEM;
81                 goto err_tx;
82         }
83         ring->buf_size = ALIGN(size * ring->stride, MLX4_EN_PAGE_SIZE);
84
85         err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size,
86                                  2 * PAGE_SIZE);
87         if (err) {
88                 en_err(priv, "Failed allocating hwq resources\n");
89                 goto err_bounce;
90         }
91
92         err = mlx4_en_map_buffer(&ring->wqres.buf);
93         if (err) {
94                 en_err(priv, "Failed to map TX buffer\n");
95                 goto err_hwq_res;
96         }
97
98         ring->buf = ring->wqres.buf.direct.buf;
99
100         en_dbg(DRV, priv, "Allocated TX ring (addr:%p) - buf:%p size:%d "
101                "buf_size:%d dma:%llx\n", ring, ring->buf, ring->size,
102                ring->buf_size, (unsigned long long) ring->wqres.buf.direct.map);
103
104         ring->qpn = qpn;
105         err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp);
106         if (err) {
107                 en_err(priv, "Failed allocating qp %d\n", ring->qpn);
108                 goto err_map;
109         }
110         ring->qp.event = mlx4_en_sqp_event;
111
112         err = mlx4_bf_alloc(mdev->dev, &ring->bf);
113         if (err) {
114                 en_dbg(DRV, priv, "working without blueflame (%d)", err);
115                 ring->bf.uar = &mdev->priv_uar;
116                 ring->bf.uar->map = mdev->uar_map;
117                 ring->bf_enabled = false;
118         } else
119                 ring->bf_enabled = true;
120
121         ring->hwtstamp_tx_type = priv->hwtstamp_config.tx_type;
122
123         return 0;
124
125 err_map:
126         mlx4_en_unmap_buffer(&ring->wqres.buf);
127 err_hwq_res:
128         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
129 err_bounce:
130         kfree(ring->bounce_buf);
131         ring->bounce_buf = NULL;
132 err_tx:
133         vfree(ring->tx_info);
134         ring->tx_info = NULL;
135         return err;
136 }
137
138 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
139                              struct mlx4_en_tx_ring *ring)
140 {
141         struct mlx4_en_dev *mdev = priv->mdev;
142         en_dbg(DRV, priv, "Destroying tx ring, qpn: %d\n", ring->qpn);
143
144         if (ring->bf_enabled)
145                 mlx4_bf_free(mdev->dev, &ring->bf);
146         mlx4_qp_remove(mdev->dev, &ring->qp);
147         mlx4_qp_free(mdev->dev, &ring->qp);
148         mlx4_en_unmap_buffer(&ring->wqres.buf);
149         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
150         kfree(ring->bounce_buf);
151         ring->bounce_buf = NULL;
152         vfree(ring->tx_info);
153         ring->tx_info = NULL;
154 }
155
156 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
157                              struct mlx4_en_tx_ring *ring,
158                              int cq, int user_prio)
159 {
160         struct mlx4_en_dev *mdev = priv->mdev;
161         int err;
162
163         ring->cqn = cq;
164         ring->prod = 0;
165         ring->cons = 0xffffffff;
166         ring->last_nr_txbb = 1;
167         ring->poll_cnt = 0;
168         memset(ring->tx_info, 0, ring->size * sizeof(struct mlx4_en_tx_info));
169         memset(ring->buf, 0, ring->buf_size);
170
171         ring->qp_state = MLX4_QP_STATE_RST;
172         ring->doorbell_qpn = ring->qp.qpn << 8;
173
174         mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 1, 0, ring->qpn,
175                                 ring->cqn, user_prio, &ring->context);
176         if (ring->bf_enabled)
177                 ring->context.usr_page = cpu_to_be32(ring->bf.uar->index);
178
179         err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, &ring->context,
180                                &ring->qp, &ring->qp_state);
181
182         return err;
183 }
184
185 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
186                                 struct mlx4_en_tx_ring *ring)
187 {
188         struct mlx4_en_dev *mdev = priv->mdev;
189
190         mlx4_qp_modify(mdev->dev, NULL, ring->qp_state,
191                        MLX4_QP_STATE_RST, NULL, 0, 0, &ring->qp);
192 }
193
194 static void mlx4_en_stamp_wqe(struct mlx4_en_priv *priv,
195                               struct mlx4_en_tx_ring *ring, int index,
196                               u8 owner)
197 {
198         __be32 stamp = cpu_to_be32(STAMP_VAL | (!!owner << STAMP_SHIFT));
199         struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
200         struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
201         void *end = ring->buf + ring->buf_size;
202         __be32 *ptr = (__be32 *)tx_desc;
203         int i;
204
205         /* Optimize the common case when there are no wraparounds */
206         if (likely((void *)tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
207                 /* Stamp the freed descriptor */
208                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE;
209                      i += STAMP_STRIDE) {
210                         *ptr = stamp;
211                         ptr += STAMP_DWORDS;
212                 }
213         } else {
214                 /* Stamp the freed descriptor */
215                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE;
216                      i += STAMP_STRIDE) {
217                         *ptr = stamp;
218                         ptr += STAMP_DWORDS;
219                         if ((void *)ptr >= end) {
220                                 ptr = ring->buf;
221                                 stamp ^= cpu_to_be32(0x80000000);
222                         }
223                 }
224         }
225 }
226
227
228 static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
229                                 struct mlx4_en_tx_ring *ring,
230                                 int index, u8 owner, u64 timestamp)
231 {
232         struct mlx4_en_dev *mdev = priv->mdev;
233         struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
234         struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
235         struct mlx4_wqe_data_seg *data = (void *) tx_desc + tx_info->data_offset;
236         struct sk_buff *skb = tx_info->skb;
237         struct skb_frag_struct *frag;
238         void *end = ring->buf + ring->buf_size;
239         int frags = skb_shinfo(skb)->nr_frags;
240         int i;
241         struct skb_shared_hwtstamps hwts;
242
243         if (timestamp) {
244                 mlx4_en_fill_hwtstamps(mdev, &hwts, timestamp);
245                 skb_tstamp_tx(skb, &hwts);
246         }
247
248         /* Optimize the common case when there are no wraparounds */
249         if (likely((void *) tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
250                 if (!tx_info->inl) {
251                         if (tx_info->linear) {
252                                 dma_unmap_single(priv->ddev,
253                                         (dma_addr_t) be64_to_cpu(data->addr),
254                                          be32_to_cpu(data->byte_count),
255                                          PCI_DMA_TODEVICE);
256                                 ++data;
257                         }
258
259                         for (i = 0; i < frags; i++) {
260                                 frag = &skb_shinfo(skb)->frags[i];
261                                 dma_unmap_page(priv->ddev,
262                                         (dma_addr_t) be64_to_cpu(data[i].addr),
263                                         skb_frag_size(frag), PCI_DMA_TODEVICE);
264                         }
265                 }
266         } else {
267                 if (!tx_info->inl) {
268                         if ((void *) data >= end) {
269                                 data = ring->buf + ((void *)data - end);
270                         }
271
272                         if (tx_info->linear) {
273                                 dma_unmap_single(priv->ddev,
274                                         (dma_addr_t) be64_to_cpu(data->addr),
275                                          be32_to_cpu(data->byte_count),
276                                          PCI_DMA_TODEVICE);
277                                 ++data;
278                         }
279
280                         for (i = 0; i < frags; i++) {
281                                 /* Check for wraparound before unmapping */
282                                 if ((void *) data >= end)
283                                         data = ring->buf;
284                                 frag = &skb_shinfo(skb)->frags[i];
285                                 dma_unmap_page(priv->ddev,
286                                         (dma_addr_t) be64_to_cpu(data->addr),
287                                          skb_frag_size(frag), PCI_DMA_TODEVICE);
288                                 ++data;
289                         }
290                 }
291         }
292         dev_kfree_skb_any(skb);
293         return tx_info->nr_txbb;
294 }
295
296
297 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring)
298 {
299         struct mlx4_en_priv *priv = netdev_priv(dev);
300         int cnt = 0;
301
302         /* Skip last polled descriptor */
303         ring->cons += ring->last_nr_txbb;
304         en_dbg(DRV, priv, "Freeing Tx buf - cons:0x%x prod:0x%x\n",
305                  ring->cons, ring->prod);
306
307         if ((u32) (ring->prod - ring->cons) > ring->size) {
308                 if (netif_msg_tx_err(priv))
309                         en_warn(priv, "Tx consumer passed producer!\n");
310                 return 0;
311         }
312
313         while (ring->cons != ring->prod) {
314                 ring->last_nr_txbb = mlx4_en_free_tx_desc(priv, ring,
315                                                 ring->cons & ring->size_mask,
316                                                 !!(ring->cons & ring->size), 0);
317                 ring->cons += ring->last_nr_txbb;
318                 cnt++;
319         }
320
321         netdev_tx_reset_queue(ring->tx_queue);
322
323         if (cnt)
324                 en_dbg(DRV, priv, "Freed %d uncompleted tx descriptors\n", cnt);
325
326         return cnt;
327 }
328
329 static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)
330 {
331         struct mlx4_en_priv *priv = netdev_priv(dev);
332         struct mlx4_cq *mcq = &cq->mcq;
333         struct mlx4_en_tx_ring *ring = &priv->tx_ring[cq->ring];
334         struct mlx4_cqe *cqe;
335         u16 index;
336         u16 new_index, ring_index, stamp_index;
337         u32 txbbs_skipped = 0;
338         u32 txbbs_stamp = 0;
339         u32 cons_index = mcq->cons_index;
340         int size = cq->size;
341         u32 size_mask = ring->size_mask;
342         struct mlx4_cqe *buf = cq->buf;
343         u32 packets = 0;
344         u32 bytes = 0;
345         int factor = priv->cqe_factor;
346         u64 timestamp = 0;
347
348         if (!priv->port_up)
349                 return;
350
351         index = cons_index & size_mask;
352         cqe = &buf[(index << factor) + factor];
353         ring_index = ring->cons & size_mask;
354         stamp_index = ring_index;
355
356         /* Process all completed CQEs */
357         while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
358                         cons_index & size)) {
359                 /*
360                  * make sure we read the CQE after we read the
361                  * ownership bit
362                  */
363                 rmb();
364
365                 /* Skip over last polled CQE */
366                 new_index = be16_to_cpu(cqe->wqe_index) & size_mask;
367
368                 do {
369                         txbbs_skipped += ring->last_nr_txbb;
370                         ring_index = (ring_index + ring->last_nr_txbb) & size_mask;
371                         if (ring->tx_info[ring_index].ts_requested)
372                                 timestamp = mlx4_en_get_cqe_ts(cqe);
373
374                         /* free next descriptor */
375                         ring->last_nr_txbb = mlx4_en_free_tx_desc(
376                                         priv, ring, ring_index,
377                                         !!((ring->cons + txbbs_skipped) &
378                                         ring->size), timestamp);
379
380                         mlx4_en_stamp_wqe(priv, ring, stamp_index,
381                                           !!((ring->cons + txbbs_stamp) &
382                                                 ring->size));
383                         stamp_index = ring_index;
384                         txbbs_stamp = txbbs_skipped;
385                         packets++;
386                         bytes += ring->tx_info[ring_index].nr_bytes;
387                 } while (ring_index != new_index);
388
389                 ++cons_index;
390                 index = cons_index & size_mask;
391                 cqe = &buf[(index << factor) + factor];
392         }
393
394
395         /*
396          * To prevent CQ overflow we first update CQ consumer and only then
397          * the ring consumer.
398          */
399         mcq->cons_index = cons_index;
400         mlx4_cq_set_ci(mcq);
401         wmb();
402         ring->cons += txbbs_skipped;
403         netdev_tx_completed_queue(ring->tx_queue, packets, bytes);
404
405         /*
406          * Wakeup Tx queue if this stopped, and at least 1 packet
407          * was completed
408          */
409         if (netif_tx_queue_stopped(ring->tx_queue) && txbbs_skipped > 0) {
410                 netif_tx_wake_queue(ring->tx_queue);
411                 priv->port_stats.wake_queue++;
412         }
413 }
414
415 void mlx4_en_tx_irq(struct mlx4_cq *mcq)
416 {
417         struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
418         struct mlx4_en_priv *priv = netdev_priv(cq->dev);
419
420         mlx4_en_process_tx_cq(cq->dev, cq);
421         mlx4_en_arm_cq(priv, cq);
422 }
423
424
425 static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv,
426                                                       struct mlx4_en_tx_ring *ring,
427                                                       u32 index,
428                                                       unsigned int desc_size)
429 {
430         u32 copy = (ring->size - index) * TXBB_SIZE;
431         int i;
432
433         for (i = desc_size - copy - 4; i >= 0; i -= 4) {
434                 if ((i & (TXBB_SIZE - 1)) == 0)
435                         wmb();
436
437                 *((u32 *) (ring->buf + i)) =
438                         *((u32 *) (ring->bounce_buf + copy + i));
439         }
440
441         for (i = copy - 4; i >= 4 ; i -= 4) {
442                 if ((i & (TXBB_SIZE - 1)) == 0)
443                         wmb();
444
445                 *((u32 *) (ring->buf + index * TXBB_SIZE + i)) =
446                         *((u32 *) (ring->bounce_buf + i));
447         }
448
449         /* Return real descriptor location */
450         return ring->buf + index * TXBB_SIZE;
451 }
452
453 static int is_inline(struct sk_buff *skb, void **pfrag)
454 {
455         void *ptr;
456
457         if (inline_thold && !skb_is_gso(skb) && skb->len <= inline_thold) {
458                 if (skb_shinfo(skb)->nr_frags == 1) {
459                         ptr = skb_frag_address_safe(&skb_shinfo(skb)->frags[0]);
460                         if (unlikely(!ptr))
461                                 return 0;
462
463                         if (pfrag)
464                                 *pfrag = ptr;
465
466                         return 1;
467                 } else if (unlikely(skb_shinfo(skb)->nr_frags))
468                         return 0;
469                 else
470                         return 1;
471         }
472
473         return 0;
474 }
475
476 static int inline_size(struct sk_buff *skb)
477 {
478         if (skb->len + CTRL_SIZE + sizeof(struct mlx4_wqe_inline_seg)
479             <= MLX4_INLINE_ALIGN)
480                 return ALIGN(skb->len + CTRL_SIZE +
481                              sizeof(struct mlx4_wqe_inline_seg), 16);
482         else
483                 return ALIGN(skb->len + CTRL_SIZE + 2 *
484                              sizeof(struct mlx4_wqe_inline_seg), 16);
485 }
486
487 static int get_real_size(struct sk_buff *skb, struct net_device *dev,
488                          int *lso_header_size)
489 {
490         struct mlx4_en_priv *priv = netdev_priv(dev);
491         int real_size;
492
493         if (skb_is_gso(skb)) {
494                 *lso_header_size = skb_transport_offset(skb) + tcp_hdrlen(skb);
495                 real_size = CTRL_SIZE + skb_shinfo(skb)->nr_frags * DS_SIZE +
496                         ALIGN(*lso_header_size + 4, DS_SIZE);
497                 if (unlikely(*lso_header_size != skb_headlen(skb))) {
498                         /* We add a segment for the skb linear buffer only if
499                          * it contains data */
500                         if (*lso_header_size < skb_headlen(skb))
501                                 real_size += DS_SIZE;
502                         else {
503                                 if (netif_msg_tx_err(priv))
504                                         en_warn(priv, "Non-linear headers\n");
505                                 return 0;
506                         }
507                 }
508         } else {
509                 *lso_header_size = 0;
510                 if (!is_inline(skb, NULL))
511                         real_size = CTRL_SIZE + (skb_shinfo(skb)->nr_frags + 1) * DS_SIZE;
512                 else
513                         real_size = inline_size(skb);
514         }
515
516         return real_size;
517 }
518
519 static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *skb,
520                              int real_size, u16 *vlan_tag, int tx_ind, void *fragptr)
521 {
522         struct mlx4_wqe_inline_seg *inl = &tx_desc->inl;
523         int spc = MLX4_INLINE_ALIGN - CTRL_SIZE - sizeof *inl;
524
525         if (skb->len <= spc) {
526                 inl->byte_count = cpu_to_be32(1 << 31 | skb->len);
527                 skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
528                 if (skb_shinfo(skb)->nr_frags)
529                         memcpy(((void *)(inl + 1)) + skb_headlen(skb), fragptr,
530                                skb_frag_size(&skb_shinfo(skb)->frags[0]));
531
532         } else {
533                 inl->byte_count = cpu_to_be32(1 << 31 | spc);
534                 if (skb_headlen(skb) <= spc) {
535                         skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
536                         if (skb_headlen(skb) < spc) {
537                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb),
538                                         fragptr, spc - skb_headlen(skb));
539                                 fragptr +=  spc - skb_headlen(skb);
540                         }
541                         inl = (void *) (inl + 1) + spc;
542                         memcpy(((void *)(inl + 1)), fragptr, skb->len - spc);
543                 } else {
544                         skb_copy_from_linear_data(skb, inl + 1, spc);
545                         inl = (void *) (inl + 1) + spc;
546                         skb_copy_from_linear_data_offset(skb, spc, inl + 1,
547                                         skb_headlen(skb) - spc);
548                         if (skb_shinfo(skb)->nr_frags)
549                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb) - spc,
550                                         fragptr, skb_frag_size(&skb_shinfo(skb)->frags[0]));
551                 }
552
553                 wmb();
554                 inl->byte_count = cpu_to_be32(1 << 31 | (skb->len - spc));
555         }
556 }
557
558 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb)
559 {
560         struct mlx4_en_priv *priv = netdev_priv(dev);
561         u16 rings_p_up = priv->num_tx_rings_p_up;
562         u8 up = 0;
563
564         if (dev->num_tc)
565                 return skb_tx_hash(dev, skb);
566
567         if (vlan_tx_tag_present(skb))
568                 up = vlan_tx_tag_get(skb) >> VLAN_PRIO_SHIFT;
569
570         return __skb_tx_hash(dev, skb, rings_p_up) + up * rings_p_up;
571 }
572
573 static void mlx4_bf_copy(void __iomem *dst, unsigned long *src, unsigned bytecnt)
574 {
575         __iowrite64_copy(dst, src, bytecnt / 8);
576 }
577
578 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
579 {
580         struct mlx4_en_priv *priv = netdev_priv(dev);
581         struct mlx4_en_dev *mdev = priv->mdev;
582         struct mlx4_en_tx_ring *ring;
583         struct mlx4_en_tx_desc *tx_desc;
584         struct mlx4_wqe_data_seg *data;
585         struct skb_frag_struct *frag;
586         struct mlx4_en_tx_info *tx_info;
587         struct ethhdr *ethh;
588         int tx_ind = 0;
589         int nr_txbb;
590         int desc_size;
591         int real_size;
592         dma_addr_t dma;
593         u32 index, bf_index;
594         __be32 op_own;
595         u16 vlan_tag = 0;
596         int i;
597         int lso_header_size;
598         void *fragptr;
599         bool bounce = false;
600
601         if (!priv->port_up)
602                 goto tx_drop;
603
604         real_size = get_real_size(skb, dev, &lso_header_size);
605         if (unlikely(!real_size))
606                 goto tx_drop;
607
608         /* Align descriptor to TXBB size */
609         desc_size = ALIGN(real_size, TXBB_SIZE);
610         nr_txbb = desc_size / TXBB_SIZE;
611         if (unlikely(nr_txbb > MAX_DESC_TXBBS)) {
612                 if (netif_msg_tx_err(priv))
613                         en_warn(priv, "Oversized header or SG list\n");
614                 goto tx_drop;
615         }
616
617         tx_ind = skb->queue_mapping;
618         ring = &priv->tx_ring[tx_ind];
619         if (vlan_tx_tag_present(skb))
620                 vlan_tag = vlan_tx_tag_get(skb);
621
622         /* Check available TXBBs And 2K spare for prefetch */
623         if (unlikely(((int)(ring->prod - ring->cons)) >
624                      ring->size - HEADROOM - MAX_DESC_TXBBS)) {
625                 /* every full Tx ring stops queue */
626                 netif_tx_stop_queue(ring->tx_queue);
627                 priv->port_stats.queue_stopped++;
628
629                 /* If queue was emptied after the if, and before the
630                  * stop_queue - need to wake the queue, or else it will remain
631                  * stopped forever.
632                  * Need a memory barrier to make sure ring->cons was not
633                  * updated before queue was stopped.
634                  */
635                 wmb();
636
637                 if (unlikely(((int)(ring->prod - ring->cons)) <=
638                              ring->size - HEADROOM - MAX_DESC_TXBBS)) {
639                         netif_tx_wake_queue(ring->tx_queue);
640                         priv->port_stats.wake_queue++;
641                 } else {
642                         return NETDEV_TX_BUSY;
643                 }
644         }
645
646         /* Track current inflight packets for performance analysis */
647         AVG_PERF_COUNTER(priv->pstats.inflight_avg,
648                          (u32) (ring->prod - ring->cons - 1));
649
650         /* Packet is good - grab an index and transmit it */
651         index = ring->prod & ring->size_mask;
652         bf_index = ring->prod;
653
654         /* See if we have enough space for whole descriptor TXBB for setting
655          * SW ownership on next descriptor; if not, use a bounce buffer. */
656         if (likely(index + nr_txbb <= ring->size))
657                 tx_desc = ring->buf + index * TXBB_SIZE;
658         else {
659                 tx_desc = (struct mlx4_en_tx_desc *) ring->bounce_buf;
660                 bounce = true;
661         }
662
663         /* Save skb in tx_info ring */
664         tx_info = &ring->tx_info[index];
665         tx_info->skb = skb;
666         tx_info->nr_txbb = nr_txbb;
667
668         /*
669          * For timestamping add flag to skb_shinfo and
670          * set flag for further reference
671          */
672         if (ring->hwtstamp_tx_type == HWTSTAMP_TX_ON &&
673             skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
674                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
675                 tx_info->ts_requested = 1;
676         }
677
678         /* Prepare ctrl segement apart opcode+ownership, which depends on
679          * whether LSO is used */
680         tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag);
681         tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_VLAN *
682                 !!vlan_tx_tag_present(skb);
683         tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f;
684         tx_desc->ctrl.srcrb_flags = priv->ctrl_flags;
685         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
686                 tx_desc->ctrl.srcrb_flags |= cpu_to_be32(MLX4_WQE_CTRL_IP_CSUM |
687                                                          MLX4_WQE_CTRL_TCP_UDP_CSUM);
688                 ring->tx_csum++;
689         }
690
691         if (priv->flags & MLX4_EN_FLAG_ENABLE_HW_LOOPBACK) {
692                 /* Copy dst mac address to wqe. This allows loopback in eSwitch,
693                  * so that VFs and PF can communicate with each other
694                  */
695                 ethh = (struct ethhdr *)skb->data;
696                 tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest);
697                 tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2));
698         }
699
700         /* Handle LSO (TSO) packets */
701         if (lso_header_size) {
702                 /* Mark opcode as LSO */
703                 op_own = cpu_to_be32(MLX4_OPCODE_LSO | (1 << 6)) |
704                         ((ring->prod & ring->size) ?
705                                 cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
706
707                 /* Fill in the LSO prefix */
708                 tx_desc->lso.mss_hdr_size = cpu_to_be32(
709                         skb_shinfo(skb)->gso_size << 16 | lso_header_size);
710
711                 /* Copy headers;
712                  * note that we already verified that it is linear */
713                 memcpy(tx_desc->lso.header, skb->data, lso_header_size);
714                 data = ((void *) &tx_desc->lso +
715                         ALIGN(lso_header_size + 4, DS_SIZE));
716
717                 priv->port_stats.tso_packets++;
718                 i = ((skb->len - lso_header_size) / skb_shinfo(skb)->gso_size) +
719                         !!((skb->len - lso_header_size) % skb_shinfo(skb)->gso_size);
720                 tx_info->nr_bytes = skb->len + (i - 1) * lso_header_size;
721                 ring->packets += i;
722         } else {
723                 /* Normal (Non LSO) packet */
724                 op_own = cpu_to_be32(MLX4_OPCODE_SEND) |
725                         ((ring->prod & ring->size) ?
726                          cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
727                 data = &tx_desc->data;
728                 tx_info->nr_bytes = max_t(unsigned int, skb->len, ETH_ZLEN);
729                 ring->packets++;
730
731         }
732         ring->bytes += tx_info->nr_bytes;
733         netdev_tx_sent_queue(ring->tx_queue, tx_info->nr_bytes);
734         AVG_PERF_COUNTER(priv->pstats.tx_pktsz_avg, skb->len);
735
736
737         /* valid only for none inline segments */
738         tx_info->data_offset = (void *) data - (void *) tx_desc;
739
740         tx_info->linear = (lso_header_size < skb_headlen(skb) && !is_inline(skb, NULL)) ? 1 : 0;
741         data += skb_shinfo(skb)->nr_frags + tx_info->linear - 1;
742
743         if (!is_inline(skb, &fragptr)) {
744                 /* Map fragments */
745                 for (i = skb_shinfo(skb)->nr_frags - 1; i >= 0; i--) {
746                         frag = &skb_shinfo(skb)->frags[i];
747                         dma = skb_frag_dma_map(priv->ddev, frag,
748                                                0, skb_frag_size(frag),
749                                                DMA_TO_DEVICE);
750                         data->addr = cpu_to_be64(dma);
751                         data->lkey = cpu_to_be32(mdev->mr.key);
752                         wmb();
753                         data->byte_count = cpu_to_be32(skb_frag_size(frag));
754                         --data;
755                 }
756
757                 /* Map linear part */
758                 if (tx_info->linear) {
759                         dma = dma_map_single(priv->ddev, skb->data + lso_header_size,
760                                              skb_headlen(skb) - lso_header_size, PCI_DMA_TODEVICE);
761                         data->addr = cpu_to_be64(dma);
762                         data->lkey = cpu_to_be32(mdev->mr.key);
763                         wmb();
764                         data->byte_count = cpu_to_be32(skb_headlen(skb) - lso_header_size);
765                 }
766                 tx_info->inl = 0;
767         } else {
768                 build_inline_wqe(tx_desc, skb, real_size, &vlan_tag, tx_ind, fragptr);
769                 tx_info->inl = 1;
770         }
771
772         ring->prod += nr_txbb;
773
774         /* If we used a bounce buffer then copy descriptor back into place */
775         if (bounce)
776                 tx_desc = mlx4_en_bounce_to_desc(priv, ring, index, desc_size);
777
778         skb_tx_timestamp(skb);
779
780         if (ring->bf_enabled && desc_size <= MAX_BF && !bounce && !vlan_tx_tag_present(skb)) {
781                 *(__be32 *) (&tx_desc->ctrl.vlan_tag) |= cpu_to_be32(ring->doorbell_qpn);
782                 op_own |= htonl((bf_index & 0xffff) << 8);
783                 /* Ensure new descirptor hits memory
784                 * before setting ownership of this descriptor to HW */
785                 wmb();
786                 tx_desc->ctrl.owner_opcode = op_own;
787
788                 wmb();
789
790                 mlx4_bf_copy(ring->bf.reg + ring->bf.offset, (unsigned long *) &tx_desc->ctrl,
791                      desc_size);
792
793                 wmb();
794
795                 ring->bf.offset ^= ring->bf.buf_size;
796         } else {
797                 /* Ensure new descirptor hits memory
798                 * before setting ownership of this descriptor to HW */
799                 wmb();
800                 tx_desc->ctrl.owner_opcode = op_own;
801                 wmb();
802                 iowrite32be(ring->doorbell_qpn, ring->bf.uar->map + MLX4_SEND_DOORBELL);
803         }
804
805         return NETDEV_TX_OK;
806
807 tx_drop:
808         dev_kfree_skb_any(skb);
809         priv->stats.tx_dropped++;
810         return NETDEV_TX_OK;
811 }
812