2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <net/busy_poll.h>
35 #include <linux/mlx4/cq.h>
36 #include <linux/slab.h>
37 #include <linux/mlx4/qp.h>
38 #include <linux/skbuff.h>
39 #include <linux/rculist.h>
40 #include <linux/if_ether.h>
41 #include <linux/if_vlan.h>
42 #include <linux/vmalloc.h>
46 static int mlx4_alloc_pages(struct mlx4_en_priv *priv,
47 struct mlx4_en_rx_alloc *page_alloc,
48 const struct mlx4_en_frag_info *frag_info,
55 for (order = MLX4_EN_ALLOC_PREFER_ORDER; ;) {
59 gfp |= __GFP_COMP | __GFP_NOWARN;
60 page = alloc_pages(gfp, order);
64 ((PAGE_SIZE << order) < frag_info->frag_size))
67 dma = dma_map_page(priv->ddev, page, 0, PAGE_SIZE << order,
69 if (dma_mapping_error(priv->ddev, dma)) {
73 page_alloc->page_size = PAGE_SIZE << order;
74 page_alloc->page = page;
75 page_alloc->dma = dma;
76 page_alloc->page_offset = frag_info->frag_align;
77 /* Not doing get_page() for each frag is a big win
78 * on asymetric workloads.
80 atomic_set(&page->_count,
81 page_alloc->page_size / frag_info->frag_stride);
85 static int mlx4_en_alloc_frags(struct mlx4_en_priv *priv,
86 struct mlx4_en_rx_desc *rx_desc,
87 struct mlx4_en_rx_alloc *frags,
88 struct mlx4_en_rx_alloc *ring_alloc,
91 struct mlx4_en_rx_alloc page_alloc[MLX4_EN_MAX_RX_FRAGS];
92 const struct mlx4_en_frag_info *frag_info;
97 for (i = 0; i < priv->num_frags; i++) {
98 frag_info = &priv->frag_info[i];
99 page_alloc[i] = ring_alloc[i];
100 page_alloc[i].page_offset += frag_info->frag_stride;
102 if (page_alloc[i].page_offset + frag_info->frag_stride <=
103 ring_alloc[i].page_size)
106 if (mlx4_alloc_pages(priv, &page_alloc[i], frag_info, gfp))
110 for (i = 0; i < priv->num_frags; i++) {
111 frags[i] = ring_alloc[i];
112 dma = ring_alloc[i].dma + ring_alloc[i].page_offset;
113 ring_alloc[i] = page_alloc[i];
114 rx_desc->data[i].addr = cpu_to_be64(dma);
121 frag_info = &priv->frag_info[i];
122 if (page_alloc[i].page != ring_alloc[i].page) {
123 dma_unmap_page(priv->ddev, page_alloc[i].dma,
124 page_alloc[i].page_size, PCI_DMA_FROMDEVICE);
125 page = page_alloc[i].page;
126 atomic_set(&page->_count, 1);
133 static void mlx4_en_free_frag(struct mlx4_en_priv *priv,
134 struct mlx4_en_rx_alloc *frags,
137 const struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
138 u32 next_frag_end = frags[i].page_offset + 2 * frag_info->frag_stride;
141 if (next_frag_end > frags[i].page_size)
142 dma_unmap_page(priv->ddev, frags[i].dma, frags[i].page_size,
146 put_page(frags[i].page);
149 static int mlx4_en_init_allocator(struct mlx4_en_priv *priv,
150 struct mlx4_en_rx_ring *ring)
153 struct mlx4_en_rx_alloc *page_alloc;
155 for (i = 0; i < priv->num_frags; i++) {
156 const struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
158 if (mlx4_alloc_pages(priv, &ring->page_alloc[i],
159 frag_info, GFP_KERNEL))
168 page_alloc = &ring->page_alloc[i];
169 dma_unmap_page(priv->ddev, page_alloc->dma,
170 page_alloc->page_size, PCI_DMA_FROMDEVICE);
171 page = page_alloc->page;
172 atomic_set(&page->_count, 1);
174 page_alloc->page = NULL;
179 static void mlx4_en_destroy_allocator(struct mlx4_en_priv *priv,
180 struct mlx4_en_rx_ring *ring)
182 struct mlx4_en_rx_alloc *page_alloc;
185 for (i = 0; i < priv->num_frags; i++) {
186 const struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
188 page_alloc = &ring->page_alloc[i];
189 en_dbg(DRV, priv, "Freeing allocator:%d count:%d\n",
190 i, page_count(page_alloc->page));
192 dma_unmap_page(priv->ddev, page_alloc->dma,
193 page_alloc->page_size, PCI_DMA_FROMDEVICE);
194 while (page_alloc->page_offset + frag_info->frag_stride <
195 page_alloc->page_size) {
196 put_page(page_alloc->page);
197 page_alloc->page_offset += frag_info->frag_stride;
199 page_alloc->page = NULL;
203 static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
204 struct mlx4_en_rx_ring *ring, int index)
206 struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index;
210 /* Set size and memtype fields */
211 for (i = 0; i < priv->num_frags; i++) {
212 rx_desc->data[i].byte_count =
213 cpu_to_be32(priv->frag_info[i].frag_size);
214 rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key);
217 /* If the number of used fragments does not fill up the ring stride,
218 * remaining (unused) fragments must be padded with null address/size
219 * and a special memory key */
220 possible_frags = (ring->stride - sizeof(struct mlx4_en_rx_desc)) / DS_SIZE;
221 for (i = priv->num_frags; i < possible_frags; i++) {
222 rx_desc->data[i].byte_count = 0;
223 rx_desc->data[i].lkey = cpu_to_be32(MLX4_EN_MEMTYPE_PAD);
224 rx_desc->data[i].addr = 0;
228 static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,
229 struct mlx4_en_rx_ring *ring, int index,
232 struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride);
233 struct mlx4_en_rx_alloc *frags = ring->rx_info +
234 (index << priv->log_rx_info);
236 return mlx4_en_alloc_frags(priv, rx_desc, frags, ring->page_alloc, gfp);
239 static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring)
241 *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff);
244 static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
245 struct mlx4_en_rx_ring *ring,
248 struct mlx4_en_rx_alloc *frags;
251 frags = ring->rx_info + (index << priv->log_rx_info);
252 for (nr = 0; nr < priv->num_frags; nr++) {
253 en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
254 mlx4_en_free_frag(priv, frags, nr);
258 static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
260 struct mlx4_en_rx_ring *ring;
265 for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) {
266 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
267 ring = &priv->rx_ring[ring_ind];
269 if (mlx4_en_prepare_rx_desc(priv, ring,
272 if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) {
273 en_err(priv, "Failed to allocate "
274 "enough rx buffers\n");
277 new_size = rounddown_pow_of_two(ring->actual_size);
278 en_warn(priv, "Only %d buffers allocated "
279 "reducing ring size to %d",
280 ring->actual_size, new_size);
291 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
292 ring = &priv->rx_ring[ring_ind];
293 while (ring->actual_size > new_size) {
296 mlx4_en_free_rx_desc(priv, ring, ring->actual_size);
303 static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv,
304 struct mlx4_en_rx_ring *ring)
308 en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n",
309 ring->cons, ring->prod);
311 /* Unmap and free Rx buffers */
312 BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size);
313 while (ring->cons != ring->prod) {
314 index = ring->cons & ring->size_mask;
315 en_dbg(DRV, priv, "Processing descriptor:%d\n", index);
316 mlx4_en_free_rx_desc(priv, ring, index);
321 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
322 struct mlx4_en_rx_ring *ring, u32 size, u16 stride)
324 struct mlx4_en_dev *mdev = priv->mdev;
331 ring->size_mask = size - 1;
332 ring->stride = stride;
333 ring->log_stride = ffs(ring->stride) - 1;
334 ring->buf_size = ring->size * ring->stride + TXBB_SIZE;
336 tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *
337 sizeof(struct mlx4_en_rx_alloc));
338 ring->rx_info = vmalloc(tmp);
342 en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d\n",
345 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres,
346 ring->buf_size, 2 * PAGE_SIZE);
350 err = mlx4_en_map_buffer(&ring->wqres.buf);
352 en_err(priv, "Failed to map RX buffer\n");
355 ring->buf = ring->wqres.buf.direct.buf;
357 ring->hwtstamp_rx_filter = priv->hwtstamp_config.rx_filter;
362 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
364 vfree(ring->rx_info);
365 ring->rx_info = NULL;
369 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
371 struct mlx4_en_rx_ring *ring;
375 int stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
376 DS_SIZE * priv->num_frags);
378 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
379 ring = &priv->rx_ring[ring_ind];
383 ring->actual_size = 0;
384 ring->cqn = priv->rx_cq[ring_ind].mcq.cqn;
386 ring->stride = stride;
387 if (ring->stride <= TXBB_SIZE)
388 ring->buf += TXBB_SIZE;
390 ring->log_stride = ffs(ring->stride) - 1;
391 ring->buf_size = ring->size * ring->stride;
393 memset(ring->buf, 0, ring->buf_size);
394 mlx4_en_update_rx_prod_db(ring);
396 /* Initialize all descriptors */
397 for (i = 0; i < ring->size; i++)
398 mlx4_en_init_rx_desc(priv, ring, i);
400 /* Initialize page allocators */
401 err = mlx4_en_init_allocator(priv, ring);
403 en_err(priv, "Failed initializing ring allocator\n");
404 if (ring->stride <= TXBB_SIZE)
405 ring->buf -= TXBB_SIZE;
410 err = mlx4_en_fill_rx_buffers(priv);
414 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
415 ring = &priv->rx_ring[ring_ind];
417 ring->size_mask = ring->actual_size - 1;
418 mlx4_en_update_rx_prod_db(ring);
424 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++)
425 mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]);
427 ring_ind = priv->rx_ring_num - 1;
429 while (ring_ind >= 0) {
430 if (priv->rx_ring[ring_ind].stride <= TXBB_SIZE)
431 priv->rx_ring[ring_ind].buf -= TXBB_SIZE;
432 mlx4_en_destroy_allocator(priv, &priv->rx_ring[ring_ind]);
438 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
439 struct mlx4_en_rx_ring *ring, u32 size, u16 stride)
441 struct mlx4_en_dev *mdev = priv->mdev;
443 mlx4_en_unmap_buffer(&ring->wqres.buf);
444 mlx4_free_hwq_res(mdev->dev, &ring->wqres, size * stride + TXBB_SIZE);
445 vfree(ring->rx_info);
446 ring->rx_info = NULL;
447 #ifdef CONFIG_RFS_ACCEL
448 mlx4_en_cleanup_filters(priv, ring);
452 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
453 struct mlx4_en_rx_ring *ring)
455 mlx4_en_free_rx_buf(priv, ring);
456 if (ring->stride <= TXBB_SIZE)
457 ring->buf -= TXBB_SIZE;
458 mlx4_en_destroy_allocator(priv, ring);
462 static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,
463 struct mlx4_en_rx_desc *rx_desc,
464 struct mlx4_en_rx_alloc *frags,
468 struct skb_frag_struct *skb_frags_rx = skb_shinfo(skb)->frags;
469 struct mlx4_en_frag_info *frag_info;
473 /* Collect used fragments while replacing them in the HW descriptors */
474 for (nr = 0; nr < priv->num_frags; nr++) {
475 frag_info = &priv->frag_info[nr];
476 if (length <= frag_info->frag_prefix_size)
481 dma = be64_to_cpu(rx_desc->data[nr].addr);
482 dma_sync_single_for_cpu(priv->ddev, dma, frag_info->frag_size,
485 /* Save page reference in skb */
486 __skb_frag_set_page(&skb_frags_rx[nr], frags[nr].page);
487 skb_frag_size_set(&skb_frags_rx[nr], frag_info->frag_size);
488 skb_frags_rx[nr].page_offset = frags[nr].page_offset;
489 skb->truesize += frag_info->frag_stride;
490 frags[nr].page = NULL;
492 /* Adjust size of last fragment to match actual length */
494 skb_frag_size_set(&skb_frags_rx[nr - 1],
495 length - priv->frag_info[nr - 1].frag_prefix_size);
501 __skb_frag_unref(&skb_frags_rx[nr]);
507 static struct sk_buff *mlx4_en_rx_skb(struct mlx4_en_priv *priv,
508 struct mlx4_en_rx_desc *rx_desc,
509 struct mlx4_en_rx_alloc *frags,
517 skb = netdev_alloc_skb(priv->dev, SMALL_PACKET_SIZE + NET_IP_ALIGN);
519 en_dbg(RX_ERR, priv, "Failed allocating skb\n");
522 skb_reserve(skb, NET_IP_ALIGN);
525 /* Get pointer to first fragment so we could copy the headers into the
526 * (linear part of the) skb */
527 va = page_address(frags[0].page) + frags[0].page_offset;
529 if (length <= SMALL_PACKET_SIZE) {
530 /* We are copying all relevant data to the skb - temporarily
531 * sync buffers for the copy */
532 dma = be64_to_cpu(rx_desc->data[0].addr);
533 dma_sync_single_for_cpu(priv->ddev, dma, length,
535 skb_copy_to_linear_data(skb, va, length);
538 /* Move relevant fragments to skb */
539 used_frags = mlx4_en_complete_rx_desc(priv, rx_desc, frags,
541 if (unlikely(!used_frags)) {
545 skb_shinfo(skb)->nr_frags = used_frags;
547 /* Copy headers into the skb linear buffer */
548 memcpy(skb->data, va, HEADER_COPY_SIZE);
549 skb->tail += HEADER_COPY_SIZE;
551 /* Skip headers in first fragment */
552 skb_shinfo(skb)->frags[0].page_offset += HEADER_COPY_SIZE;
554 /* Adjust size of first fragment */
555 skb_frag_size_sub(&skb_shinfo(skb)->frags[0], HEADER_COPY_SIZE);
556 skb->data_len = length - HEADER_COPY_SIZE;
561 static void validate_loopback(struct mlx4_en_priv *priv, struct sk_buff *skb)
564 int offset = ETH_HLEN;
566 for (i = 0; i < MLX4_LOOPBACK_TEST_PAYLOAD; i++, offset++) {
567 if (*(skb->data + offset) != (unsigned char) (i & 0xff))
571 priv->loopback_ok = 1;
574 dev_kfree_skb_any(skb);
577 static void mlx4_en_refill_rx_buffers(struct mlx4_en_priv *priv,
578 struct mlx4_en_rx_ring *ring)
580 int index = ring->prod & ring->size_mask;
582 while ((u32) (ring->prod - ring->cons) < ring->actual_size) {
583 if (mlx4_en_prepare_rx_desc(priv, ring, index, GFP_ATOMIC))
586 index = ring->prod & ring->size_mask;
590 int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
592 struct mlx4_en_priv *priv = netdev_priv(dev);
593 struct mlx4_en_dev *mdev = priv->mdev;
594 struct mlx4_cqe *cqe;
595 struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
596 struct mlx4_en_rx_alloc *frags;
597 struct mlx4_en_rx_desc *rx_desc;
604 int factor = priv->cqe_factor;
610 /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
611 * descriptor offset can be deduced from the CQE index instead of
612 * reading 'cqe->index' */
613 index = cq->mcq.cons_index & ring->size_mask;
614 cqe = &cq->buf[(index << factor) + factor];
616 /* Process all completed CQEs */
617 while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
618 cq->mcq.cons_index & cq->size)) {
620 frags = ring->rx_info + (index << priv->log_rx_info);
621 rx_desc = ring->buf + (index << ring->log_stride);
624 * make sure we read the CQE after we read the ownership bit
628 /* Drop packet on bad receive or bad checksum */
629 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
630 MLX4_CQE_OPCODE_ERROR)) {
631 en_err(priv, "CQE completed in error - vendor "
632 "syndrom:%d syndrom:%d\n",
633 ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome,
634 ((struct mlx4_err_cqe *) cqe)->syndrome);
637 if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) {
638 en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n");
642 /* Check if we need to drop the packet if SRIOV is not enabled
643 * and not performing the selftest or flb disabled
645 if (priv->flags & MLX4_EN_FLAG_RX_FILTER_NEEDED) {
648 /* Get pointer to first fragment since we haven't
649 * skb yet and cast it to ethhdr struct
651 dma = be64_to_cpu(rx_desc->data[0].addr);
652 dma_sync_single_for_cpu(priv->ddev, dma, sizeof(*ethh),
654 ethh = (struct ethhdr *)(page_address(frags[0].page) +
655 frags[0].page_offset);
657 if (is_multicast_ether_addr(ethh->h_dest)) {
658 struct mlx4_mac_entry *entry;
659 struct hlist_head *bucket;
660 unsigned int mac_hash;
662 /* Drop the packet, since HW loopback-ed it */
663 mac_hash = ethh->h_source[MLX4_EN_MAC_HASH_IDX];
664 bucket = &priv->mac_hash[mac_hash];
666 hlist_for_each_entry_rcu(entry, bucket, hlist) {
667 if (ether_addr_equal_64bits(entry->mac,
678 * Packet is OK - process it.
680 length = be32_to_cpu(cqe->byte_cnt);
681 length -= ring->fcs_del;
682 ring->bytes += length;
685 if (likely(dev->features & NETIF_F_RXCSUM)) {
686 if ((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&
687 (cqe->checksum == cpu_to_be16(0xffff))) {
689 /* This packet is eligible for GRO if it is:
690 * - DIX Ethernet (type interpretation)
692 * - without IP options
693 * - not an IP fragment
694 * - no LLS polling in progress
696 if (!mlx4_en_cq_ll_polling(cq) &&
697 (dev->features & NETIF_F_GRO)) {
698 struct sk_buff *gro_skb = napi_get_frags(&cq->napi);
702 nr = mlx4_en_complete_rx_desc(priv,
703 rx_desc, frags, gro_skb,
708 skb_shinfo(gro_skb)->nr_frags = nr;
709 gro_skb->len = length;
710 gro_skb->data_len = length;
711 gro_skb->ip_summed = CHECKSUM_UNNECESSARY;
713 if ((cqe->vlan_my_qpn &
714 cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK)) &&
715 (dev->features & NETIF_F_HW_VLAN_CTAG_RX)) {
716 u16 vid = be16_to_cpu(cqe->sl_vid);
718 __vlan_hwaccel_put_tag(gro_skb, htons(ETH_P_8021Q), vid);
721 if (dev->features & NETIF_F_RXHASH)
722 gro_skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid);
724 skb_record_rx_queue(gro_skb, cq->ring);
726 if (ring->hwtstamp_rx_filter == HWTSTAMP_FILTER_ALL) {
727 timestamp = mlx4_en_get_cqe_ts(cqe);
728 mlx4_en_fill_hwtstamps(mdev,
729 skb_hwtstamps(gro_skb),
733 napi_gro_frags(&cq->napi);
737 /* GRO not possible, complete processing here */
738 ip_summed = CHECKSUM_UNNECESSARY;
740 ip_summed = CHECKSUM_NONE;
744 ip_summed = CHECKSUM_NONE;
748 skb = mlx4_en_rx_skb(priv, rx_desc, frags, length);
750 priv->stats.rx_dropped++;
754 if (unlikely(priv->validate_loopback)) {
755 validate_loopback(priv, skb);
759 skb->ip_summed = ip_summed;
760 skb->protocol = eth_type_trans(skb, dev);
761 skb_record_rx_queue(skb, cq->ring);
763 if (dev->features & NETIF_F_RXHASH)
764 skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid);
766 if ((be32_to_cpu(cqe->vlan_my_qpn) &
767 MLX4_CQE_VLAN_PRESENT_MASK) &&
768 (dev->features & NETIF_F_HW_VLAN_CTAG_RX))
769 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), be16_to_cpu(cqe->sl_vid));
771 if (ring->hwtstamp_rx_filter == HWTSTAMP_FILTER_ALL) {
772 timestamp = mlx4_en_get_cqe_ts(cqe);
773 mlx4_en_fill_hwtstamps(mdev, skb_hwtstamps(skb),
777 skb_mark_napi_id(skb, &cq->napi);
779 /* Push it up the stack */
780 netif_receive_skb(skb);
783 for (nr = 0; nr < priv->num_frags; nr++)
784 mlx4_en_free_frag(priv, frags, nr);
786 ++cq->mcq.cons_index;
787 index = (cq->mcq.cons_index) & ring->size_mask;
788 cqe = &cq->buf[(index << factor) + factor];
789 if (++polled == budget)
794 AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled);
795 mlx4_cq_set_ci(&cq->mcq);
796 wmb(); /* ensure HW sees CQ consumer before we post new buffers */
797 ring->cons = cq->mcq.cons_index;
798 mlx4_en_refill_rx_buffers(priv, ring);
799 mlx4_en_update_rx_prod_db(ring);
804 void mlx4_en_rx_irq(struct mlx4_cq *mcq)
806 struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
807 struct mlx4_en_priv *priv = netdev_priv(cq->dev);
810 napi_schedule(&cq->napi);
812 mlx4_en_arm_cq(priv, cq);
815 /* Rx CQ polling - called by NAPI */
816 int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget)
818 struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
819 struct net_device *dev = cq->dev;
820 struct mlx4_en_priv *priv = netdev_priv(dev);
823 if (!mlx4_en_cq_lock_napi(cq))
826 done = mlx4_en_process_rx_cq(dev, cq, budget);
828 mlx4_en_cq_unlock_napi(cq);
830 /* If we used up all the quota - we're probably not done yet... */
832 INC_PERF_COUNTER(priv->pstats.napi_quota);
836 mlx4_en_arm_cq(priv, cq);
841 static const int frag_sizes[] = {
848 void mlx4_en_calc_rx_buf(struct net_device *dev)
850 struct mlx4_en_priv *priv = netdev_priv(dev);
851 int eff_mtu = dev->mtu + ETH_HLEN + VLAN_HLEN + ETH_LLC_SNAP_SIZE;
855 while (buf_size < eff_mtu) {
856 priv->frag_info[i].frag_size =
857 (eff_mtu > buf_size + frag_sizes[i]) ?
858 frag_sizes[i] : eff_mtu - buf_size;
859 priv->frag_info[i].frag_prefix_size = buf_size;
861 priv->frag_info[i].frag_align = NET_IP_ALIGN;
862 priv->frag_info[i].frag_stride =
863 ALIGN(frag_sizes[i] + NET_IP_ALIGN, SMP_CACHE_BYTES);
865 priv->frag_info[i].frag_align = 0;
866 priv->frag_info[i].frag_stride =
867 ALIGN(frag_sizes[i], SMP_CACHE_BYTES);
869 buf_size += priv->frag_info[i].frag_size;
874 priv->rx_skb_size = eff_mtu;
875 priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct mlx4_en_rx_alloc));
877 en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d "
878 "num_frags:%d):\n", eff_mtu, priv->num_frags);
879 for (i = 0; i < priv->num_frags; i++) {
881 " frag:%d - size:%d prefix:%d align:%d stride:%d\n",
883 priv->frag_info[i].frag_size,
884 priv->frag_info[i].frag_prefix_size,
885 priv->frag_info[i].frag_align,
886 priv->frag_info[i].frag_stride);
890 /* RSS related functions */
892 static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn,
893 struct mlx4_en_rx_ring *ring,
894 enum mlx4_qp_state *state,
897 struct mlx4_en_dev *mdev = priv->mdev;
898 struct mlx4_qp_context *context;
901 context = kmalloc(sizeof(*context), GFP_KERNEL);
905 err = mlx4_qp_alloc(mdev->dev, qpn, qp);
907 en_err(priv, "Failed to allocate qp #%x\n", qpn);
910 qp->event = mlx4_en_sqp_event;
912 memset(context, 0, sizeof *context);
913 mlx4_en_fill_qp_context(priv, ring->actual_size, ring->stride, 0, 0,
914 qpn, ring->cqn, -1, context);
915 context->db_rec_addr = cpu_to_be64(ring->wqres.db.dma);
917 /* Cancel FCS removal if FW allows */
918 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) {
919 context->param3 |= cpu_to_be32(1 << 29);
920 ring->fcs_del = ETH_FCS_LEN;
924 err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, context, qp, state);
926 mlx4_qp_remove(mdev->dev, qp);
927 mlx4_qp_free(mdev->dev, qp);
929 mlx4_en_update_rx_prod_db(ring);
935 int mlx4_en_create_drop_qp(struct mlx4_en_priv *priv)
940 err = mlx4_qp_reserve_range(priv->mdev->dev, 1, 1, &qpn);
942 en_err(priv, "Failed reserving drop qpn\n");
945 err = mlx4_qp_alloc(priv->mdev->dev, qpn, &priv->drop_qp);
947 en_err(priv, "Failed allocating drop qp\n");
948 mlx4_qp_release_range(priv->mdev->dev, qpn, 1);
955 void mlx4_en_destroy_drop_qp(struct mlx4_en_priv *priv)
959 qpn = priv->drop_qp.qpn;
960 mlx4_qp_remove(priv->mdev->dev, &priv->drop_qp);
961 mlx4_qp_free(priv->mdev->dev, &priv->drop_qp);
962 mlx4_qp_release_range(priv->mdev->dev, qpn, 1);
965 /* Allocate rx qp's and configure them according to rss map */
966 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
968 struct mlx4_en_dev *mdev = priv->mdev;
969 struct mlx4_en_rss_map *rss_map = &priv->rss_map;
970 struct mlx4_qp_context context;
971 struct mlx4_rss_context *rss_context;
974 u8 rss_mask = (MLX4_RSS_IPV4 | MLX4_RSS_TCP_IPV4 | MLX4_RSS_IPV6 |
979 static const u32 rsskey[10] = { 0xD181C62C, 0xF7F4DB5B, 0x1983A2FC,
980 0x943E1ADB, 0xD9389E6B, 0xD1039C2C, 0xA74499AD,
981 0x593D56D9, 0xF3253C06, 0x2ADC1FFC};
983 en_dbg(DRV, priv, "Configuring rss steering\n");
984 err = mlx4_qp_reserve_range(mdev->dev, priv->rx_ring_num,
988 en_err(priv, "Failed reserving %d qps\n", priv->rx_ring_num);
992 for (i = 0; i < priv->rx_ring_num; i++) {
993 qpn = rss_map->base_qpn + i;
994 err = mlx4_en_config_rss_qp(priv, qpn, &priv->rx_ring[i],
1003 /* Configure RSS indirection qp */
1004 err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp);
1006 en_err(priv, "Failed to allocate RSS indirection QP\n");
1009 rss_map->indir_qp.event = mlx4_en_sqp_event;
1010 mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn,
1011 priv->rx_ring[0].cqn, -1, &context);
1013 if (!priv->prof->rss_rings || priv->prof->rss_rings > priv->rx_ring_num)
1014 rss_rings = priv->rx_ring_num;
1016 rss_rings = priv->prof->rss_rings;
1018 ptr = ((void *) &context) + offsetof(struct mlx4_qp_context, pri_path)
1019 + MLX4_RSS_OFFSET_IN_QPC_PRI_PATH;
1021 rss_context->base_qpn = cpu_to_be32(ilog2(rss_rings) << 24 |
1022 (rss_map->base_qpn));
1023 rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn);
1024 if (priv->mdev->profile.udp_rss) {
1025 rss_mask |= MLX4_RSS_UDP_IPV4 | MLX4_RSS_UDP_IPV6;
1026 rss_context->base_qpn_udp = rss_context->default_qpn;
1028 rss_context->flags = rss_mask;
1029 rss_context->hash_fn = MLX4_RSS_HASH_TOP;
1030 for (i = 0; i < 10; i++)
1031 rss_context->rss_key[i] = cpu_to_be32(rsskey[i]);
1033 err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context,
1034 &rss_map->indir_qp, &rss_map->indir_state);
1041 mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
1042 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
1043 mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
1044 mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
1046 for (i = 0; i < good_qps; i++) {
1047 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
1048 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
1049 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
1050 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
1052 mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
1056 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv)
1058 struct mlx4_en_dev *mdev = priv->mdev;
1059 struct mlx4_en_rss_map *rss_map = &priv->rss_map;
1062 mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
1063 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
1064 mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
1065 mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
1067 for (i = 0; i < priv->rx_ring_num; i++) {
1068 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
1069 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
1070 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
1071 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
1073 mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);