1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/ethtool.h>
47 #include <linux/if_vlan.h>
48 #include <linux/if_macvlan.h>
49 #include <linux/if_bridge.h>
50 #include <linux/prefetch.h>
51 #include <scsi/fc/fc_fcoe.h>
54 #include "ixgbe_common.h"
55 #include "ixgbe_dcb_82599.h"
56 #include "ixgbe_sriov.h"
58 char ixgbe_driver_name[] = "ixgbe";
59 static const char ixgbe_driver_string[] =
60 "Intel(R) 10 Gigabit PCI Express Network Driver";
62 char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
65 static char ixgbe_default_device_descr[] =
66 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION "3.19.1-k"
69 const char ixgbe_driver_version[] = DRV_VERSION;
70 static const char ixgbe_copyright[] =
71 "Copyright (c) 1999-2014 Intel Corporation.";
73 static const struct ixgbe_info *ixgbe_info_tbl[] = {
74 [board_82598] = &ixgbe_82598_info,
75 [board_82599] = &ixgbe_82599_info,
76 [board_X540] = &ixgbe_X540_info,
79 /* ixgbe_pci_tbl - PCI Device ID Table
81 * Wildcard entries (PCI_ANY_ID) should come last
82 * Last entry must be all 0s
84 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
85 * Class, Class Mask, private data (not used) }
87 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
118 /* required last entry */
121 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
123 #ifdef CONFIG_IXGBE_DCA
124 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
126 static struct notifier_block dca_notifier = {
127 .notifier_call = ixgbe_notify_dca,
133 #ifdef CONFIG_PCI_IOV
134 static unsigned int max_vfs;
135 module_param(max_vfs, uint, 0);
136 MODULE_PARM_DESC(max_vfs,
137 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
138 #endif /* CONFIG_PCI_IOV */
140 static unsigned int allow_unsupported_sfp;
141 module_param(allow_unsupported_sfp, uint, 0);
142 MODULE_PARM_DESC(allow_unsupported_sfp,
143 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
145 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
146 static int debug = -1;
147 module_param(debug, int, 0);
148 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
150 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
151 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
152 MODULE_LICENSE("GPL");
153 MODULE_VERSION(DRV_VERSION);
155 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
157 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
160 struct pci_dev *parent_dev;
161 struct pci_bus *parent_bus;
163 parent_bus = adapter->pdev->bus->parent;
167 parent_dev = parent_bus->self;
171 if (!pci_is_pcie(parent_dev))
174 pcie_capability_read_word(parent_dev, reg, value);
175 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
176 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
181 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
183 struct ixgbe_hw *hw = &adapter->hw;
187 hw->bus.type = ixgbe_bus_type_pci_express;
189 /* Get the negotiated link width and speed from PCI config space of the
190 * parent, as this device is behind a switch
192 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
194 /* assume caller will handle error case */
198 hw->bus.width = ixgbe_convert_bus_width(link_status);
199 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
205 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
206 * @hw: hw specific details
208 * This function is used by probe to determine whether a device's PCI-Express
209 * bandwidth details should be gathered from the parent bus instead of from the
210 * device. Used to ensure that various locations all have the correct device ID
213 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
215 switch (hw->device_id) {
216 case IXGBE_DEV_ID_82599_SFP_SF_QP:
217 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
224 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
228 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
229 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
230 struct pci_dev *pdev;
232 /* determine whether to use the the parent device
234 if (ixgbe_pcie_from_parent(&adapter->hw))
235 pdev = adapter->pdev->bus->parent->self;
237 pdev = adapter->pdev;
239 if (pcie_get_minimum_link(pdev, &speed, &width) ||
240 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
241 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
246 case PCIE_SPEED_2_5GT:
247 /* 8b/10b encoding reduces max throughput by 20% */
250 case PCIE_SPEED_5_0GT:
251 /* 8b/10b encoding reduces max throughput by 20% */
254 case PCIE_SPEED_8_0GT:
255 /* 128b/130b encoding reduces throughput by less than 2% */
259 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
263 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
265 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
266 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
267 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
268 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
271 (speed == PCIE_SPEED_2_5GT ? "20%" :
272 speed == PCIE_SPEED_5_0GT ? "20%" :
273 speed == PCIE_SPEED_8_0GT ? "<2%" :
276 if (max_gts < expected_gts) {
277 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
278 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
280 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
284 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
286 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
287 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
288 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
289 schedule_work(&adapter->service_task);
292 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
294 struct ixgbe_adapter *adapter = hw->back;
299 e_dev_err("Adapter removed\n");
300 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
301 ixgbe_service_event_schedule(adapter);
304 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
308 /* The following check not only optimizes a bit by not
309 * performing a read on the status register when the
310 * register just read was a status register read that
311 * returned IXGBE_FAILED_READ_REG. It also blocks any
312 * potential recursion.
314 if (reg == IXGBE_STATUS) {
315 ixgbe_remove_adapter(hw);
318 value = ixgbe_read_reg(hw, IXGBE_STATUS);
319 if (value == IXGBE_FAILED_READ_REG)
320 ixgbe_remove_adapter(hw);
324 * ixgbe_read_reg - Read from device register
325 * @hw: hw specific details
326 * @reg: offset of register to read
328 * Returns : value read or IXGBE_FAILED_READ_REG if removed
330 * This function is used to read device registers. It checks for device
331 * removal by confirming any read that returns all ones by checking the
332 * status register value for all ones. This function avoids reading from
333 * the hardware if a removal was previously detected in which case it
334 * returns IXGBE_FAILED_READ_REG (all ones).
336 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
338 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
341 if (ixgbe_removed(reg_addr))
342 return IXGBE_FAILED_READ_REG;
343 value = readl(reg_addr + reg);
344 if (unlikely(value == IXGBE_FAILED_READ_REG))
345 ixgbe_check_remove(hw, reg);
349 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
353 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
354 if (value == IXGBE_FAILED_READ_CFG_WORD) {
355 ixgbe_remove_adapter(hw);
361 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
363 struct ixgbe_adapter *adapter = hw->back;
366 if (ixgbe_removed(hw->hw_addr))
367 return IXGBE_FAILED_READ_CFG_WORD;
368 pci_read_config_word(adapter->pdev, reg, &value);
369 if (value == IXGBE_FAILED_READ_CFG_WORD &&
370 ixgbe_check_cfg_remove(hw, adapter->pdev))
371 return IXGBE_FAILED_READ_CFG_WORD;
375 #ifdef CONFIG_PCI_IOV
376 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
378 struct ixgbe_adapter *adapter = hw->back;
381 if (ixgbe_removed(hw->hw_addr))
382 return IXGBE_FAILED_READ_CFG_DWORD;
383 pci_read_config_dword(adapter->pdev, reg, &value);
384 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
385 ixgbe_check_cfg_remove(hw, adapter->pdev))
386 return IXGBE_FAILED_READ_CFG_DWORD;
389 #endif /* CONFIG_PCI_IOV */
391 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
393 struct ixgbe_adapter *adapter = hw->back;
395 if (ixgbe_removed(hw->hw_addr))
397 pci_write_config_word(adapter->pdev, reg, value);
400 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
402 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
404 /* flush memory to make sure state is correct before next watchdog */
405 smp_mb__before_atomic();
406 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
409 struct ixgbe_reg_info {
414 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
416 /* General Registers */
417 {IXGBE_CTRL, "CTRL"},
418 {IXGBE_STATUS, "STATUS"},
419 {IXGBE_CTRL_EXT, "CTRL_EXT"},
421 /* Interrupt Registers */
422 {IXGBE_EICR, "EICR"},
425 {IXGBE_SRRCTL(0), "SRRCTL"},
426 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
427 {IXGBE_RDLEN(0), "RDLEN"},
428 {IXGBE_RDH(0), "RDH"},
429 {IXGBE_RDT(0), "RDT"},
430 {IXGBE_RXDCTL(0), "RXDCTL"},
431 {IXGBE_RDBAL(0), "RDBAL"},
432 {IXGBE_RDBAH(0), "RDBAH"},
435 {IXGBE_TDBAL(0), "TDBAL"},
436 {IXGBE_TDBAH(0), "TDBAH"},
437 {IXGBE_TDLEN(0), "TDLEN"},
438 {IXGBE_TDH(0), "TDH"},
439 {IXGBE_TDT(0), "TDT"},
440 {IXGBE_TXDCTL(0), "TXDCTL"},
442 /* List Terminator */
448 * ixgbe_regdump - register printout routine
450 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
456 switch (reginfo->ofs) {
457 case IXGBE_SRRCTL(0):
458 for (i = 0; i < 64; i++)
459 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
461 case IXGBE_DCA_RXCTRL(0):
462 for (i = 0; i < 64; i++)
463 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
466 for (i = 0; i < 64; i++)
467 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
470 for (i = 0; i < 64; i++)
471 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
474 for (i = 0; i < 64; i++)
475 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
477 case IXGBE_RXDCTL(0):
478 for (i = 0; i < 64; i++)
479 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
482 for (i = 0; i < 64; i++)
483 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
486 for (i = 0; i < 64; i++)
487 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
490 for (i = 0; i < 64; i++)
491 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
494 for (i = 0; i < 64; i++)
495 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
498 for (i = 0; i < 64; i++)
499 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
502 for (i = 0; i < 64; i++)
503 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
506 for (i = 0; i < 64; i++)
507 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
509 case IXGBE_TXDCTL(0):
510 for (i = 0; i < 64; i++)
511 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
514 pr_info("%-15s %08x\n", reginfo->name,
515 IXGBE_READ_REG(hw, reginfo->ofs));
519 for (i = 0; i < 8; i++) {
520 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
521 pr_err("%-15s", rname);
522 for (j = 0; j < 8; j++)
523 pr_cont(" %08x", regs[i*8+j]);
530 * ixgbe_dump - Print registers, tx-rings and rx-rings
532 static void ixgbe_dump(struct ixgbe_adapter *adapter)
534 struct net_device *netdev = adapter->netdev;
535 struct ixgbe_hw *hw = &adapter->hw;
536 struct ixgbe_reg_info *reginfo;
538 struct ixgbe_ring *tx_ring;
539 struct ixgbe_tx_buffer *tx_buffer;
540 union ixgbe_adv_tx_desc *tx_desc;
541 struct my_u0 { u64 a; u64 b; } *u0;
542 struct ixgbe_ring *rx_ring;
543 union ixgbe_adv_rx_desc *rx_desc;
544 struct ixgbe_rx_buffer *rx_buffer_info;
548 if (!netif_msg_hw(adapter))
551 /* Print netdevice Info */
553 dev_info(&adapter->pdev->dev, "Net device Info\n");
554 pr_info("Device Name state "
555 "trans_start last_rx\n");
556 pr_info("%-15s %016lX %016lX %016lX\n",
563 /* Print Registers */
564 dev_info(&adapter->pdev->dev, "Register Dump\n");
565 pr_info(" Register Name Value\n");
566 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
567 reginfo->name; reginfo++) {
568 ixgbe_regdump(hw, reginfo);
571 /* Print TX Ring Summary */
572 if (!netdev || !netif_running(netdev))
575 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
576 pr_info(" %s %s %s %s\n",
577 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
578 "leng", "ntw", "timestamp");
579 for (n = 0; n < adapter->num_tx_queues; n++) {
580 tx_ring = adapter->tx_ring[n];
581 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
582 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
583 n, tx_ring->next_to_use, tx_ring->next_to_clean,
584 (u64)dma_unmap_addr(tx_buffer, dma),
585 dma_unmap_len(tx_buffer, len),
586 tx_buffer->next_to_watch,
587 (u64)tx_buffer->time_stamp);
591 if (!netif_msg_tx_done(adapter))
592 goto rx_ring_summary;
594 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
596 /* Transmit Descriptor Formats
598 * 82598 Advanced Transmit Descriptor
599 * +--------------------------------------------------------------+
600 * 0 | Buffer Address [63:0] |
601 * +--------------------------------------------------------------+
602 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
603 * +--------------------------------------------------------------+
604 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
606 * 82598 Advanced Transmit Descriptor (Write-Back Format)
607 * +--------------------------------------------------------------+
609 * +--------------------------------------------------------------+
610 * 8 | RSV | STA | NXTSEQ |
611 * +--------------------------------------------------------------+
614 * 82599+ Advanced Transmit Descriptor
615 * +--------------------------------------------------------------+
616 * 0 | Buffer Address [63:0] |
617 * +--------------------------------------------------------------+
618 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
619 * +--------------------------------------------------------------+
620 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
622 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
623 * +--------------------------------------------------------------+
625 * +--------------------------------------------------------------+
626 * 8 | RSV | STA | RSV |
627 * +--------------------------------------------------------------+
631 for (n = 0; n < adapter->num_tx_queues; n++) {
632 tx_ring = adapter->tx_ring[n];
633 pr_info("------------------------------------\n");
634 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
635 pr_info("------------------------------------\n");
636 pr_info("%s%s %s %s %s %s\n",
637 "T [desc] [address 63:0 ] ",
638 "[PlPOIdStDDt Ln] [bi->dma ] ",
639 "leng", "ntw", "timestamp", "bi->skb");
641 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
642 tx_desc = IXGBE_TX_DESC(tx_ring, i);
643 tx_buffer = &tx_ring->tx_buffer_info[i];
644 u0 = (struct my_u0 *)tx_desc;
645 if (dma_unmap_len(tx_buffer, len) > 0) {
646 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
650 (u64)dma_unmap_addr(tx_buffer, dma),
651 dma_unmap_len(tx_buffer, len),
652 tx_buffer->next_to_watch,
653 (u64)tx_buffer->time_stamp,
655 if (i == tx_ring->next_to_use &&
656 i == tx_ring->next_to_clean)
658 else if (i == tx_ring->next_to_use)
660 else if (i == tx_ring->next_to_clean)
665 if (netif_msg_pktdata(adapter) &&
667 print_hex_dump(KERN_INFO, "",
668 DUMP_PREFIX_ADDRESS, 16, 1,
669 tx_buffer->skb->data,
670 dma_unmap_len(tx_buffer, len),
676 /* Print RX Rings Summary */
678 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
679 pr_info("Queue [NTU] [NTC]\n");
680 for (n = 0; n < adapter->num_rx_queues; n++) {
681 rx_ring = adapter->rx_ring[n];
682 pr_info("%5d %5X %5X\n",
683 n, rx_ring->next_to_use, rx_ring->next_to_clean);
687 if (!netif_msg_rx_status(adapter))
690 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
692 /* Receive Descriptor Formats
694 * 82598 Advanced Receive Descriptor (Read) Format
696 * +-----------------------------------------------------+
697 * 0 | Packet Buffer Address [63:1] |A0/NSE|
698 * +----------------------------------------------+------+
699 * 8 | Header Buffer Address [63:1] | DD |
700 * +-----------------------------------------------------+
703 * 82598 Advanced Receive Descriptor (Write-Back) Format
705 * 63 48 47 32 31 30 21 20 16 15 4 3 0
706 * +------------------------------------------------------+
707 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
708 * | Packet | IP | | | | Type | Type |
709 * | Checksum | Ident | | | | | |
710 * +------------------------------------------------------+
711 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
712 * +------------------------------------------------------+
713 * 63 48 47 32 31 20 19 0
715 * 82599+ Advanced Receive Descriptor (Read) Format
717 * +-----------------------------------------------------+
718 * 0 | Packet Buffer Address [63:1] |A0/NSE|
719 * +----------------------------------------------+------+
720 * 8 | Header Buffer Address [63:1] | DD |
721 * +-----------------------------------------------------+
724 * 82599+ Advanced Receive Descriptor (Write-Back) Format
726 * 63 48 47 32 31 30 21 20 17 16 4 3 0
727 * +------------------------------------------------------+
728 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
729 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
730 * |/ Flow Dir Flt ID | | | | | |
731 * +------------------------------------------------------+
732 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
733 * +------------------------------------------------------+
734 * 63 48 47 32 31 20 19 0
737 for (n = 0; n < adapter->num_rx_queues; n++) {
738 rx_ring = adapter->rx_ring[n];
739 pr_info("------------------------------------\n");
740 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
741 pr_info("------------------------------------\n");
743 "R [desc] [ PktBuf A0] ",
744 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
745 "<-- Adv Rx Read format\n");
747 "RWB[desc] [PcsmIpSHl PtRs] ",
748 "[vl er S cks ln] ---------------- [bi->skb ] ",
749 "<-- Adv Rx Write-Back format\n");
751 for (i = 0; i < rx_ring->count; i++) {
752 rx_buffer_info = &rx_ring->rx_buffer_info[i];
753 rx_desc = IXGBE_RX_DESC(rx_ring, i);
754 u0 = (struct my_u0 *)rx_desc;
755 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
756 if (staterr & IXGBE_RXD_STAT_DD) {
757 /* Descriptor Done */
758 pr_info("RWB[0x%03X] %016llX "
759 "%016llX ---------------- %p", i,
762 rx_buffer_info->skb);
764 pr_info("R [0x%03X] %016llX "
765 "%016llX %016llX %p", i,
768 (u64)rx_buffer_info->dma,
769 rx_buffer_info->skb);
771 if (netif_msg_pktdata(adapter) &&
772 rx_buffer_info->dma) {
773 print_hex_dump(KERN_INFO, "",
774 DUMP_PREFIX_ADDRESS, 16, 1,
775 page_address(rx_buffer_info->page) +
776 rx_buffer_info->page_offset,
777 ixgbe_rx_bufsz(rx_ring), true);
781 if (i == rx_ring->next_to_use)
783 else if (i == rx_ring->next_to_clean)
792 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
796 /* Let firmware take over control of h/w */
797 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
798 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
799 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
802 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
806 /* Let firmware know the driver has taken over */
807 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
808 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
809 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
813 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
814 * @adapter: pointer to adapter struct
815 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
816 * @queue: queue to map the corresponding interrupt to
817 * @msix_vector: the vector to map to the corresponding queue
820 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
821 u8 queue, u8 msix_vector)
824 struct ixgbe_hw *hw = &adapter->hw;
825 switch (hw->mac.type) {
826 case ixgbe_mac_82598EB:
827 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
830 index = (((direction * 64) + queue) >> 2) & 0x1F;
831 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
832 ivar &= ~(0xFF << (8 * (queue & 0x3)));
833 ivar |= (msix_vector << (8 * (queue & 0x3)));
834 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
836 case ixgbe_mac_82599EB:
838 if (direction == -1) {
840 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
841 index = ((queue & 1) * 8);
842 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
843 ivar &= ~(0xFF << index);
844 ivar |= (msix_vector << index);
845 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
848 /* tx or rx causes */
849 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
850 index = ((16 * (queue & 1)) + (8 * direction));
851 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
852 ivar &= ~(0xFF << index);
853 ivar |= (msix_vector << index);
854 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
862 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
867 switch (adapter->hw.mac.type) {
868 case ixgbe_mac_82598EB:
869 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
870 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
872 case ixgbe_mac_82599EB:
874 mask = (qmask & 0xFFFFFFFF);
875 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
876 mask = (qmask >> 32);
877 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
884 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
885 struct ixgbe_tx_buffer *tx_buffer)
887 if (tx_buffer->skb) {
888 dev_kfree_skb_any(tx_buffer->skb);
889 if (dma_unmap_len(tx_buffer, len))
890 dma_unmap_single(ring->dev,
891 dma_unmap_addr(tx_buffer, dma),
892 dma_unmap_len(tx_buffer, len),
894 } else if (dma_unmap_len(tx_buffer, len)) {
895 dma_unmap_page(ring->dev,
896 dma_unmap_addr(tx_buffer, dma),
897 dma_unmap_len(tx_buffer, len),
900 tx_buffer->next_to_watch = NULL;
901 tx_buffer->skb = NULL;
902 dma_unmap_len_set(tx_buffer, len, 0);
903 /* tx_buffer must be completely set up in the transmit path */
906 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
908 struct ixgbe_hw *hw = &adapter->hw;
909 struct ixgbe_hw_stats *hwstats = &adapter->stats;
913 if ((hw->fc.current_mode != ixgbe_fc_full) &&
914 (hw->fc.current_mode != ixgbe_fc_rx_pause))
917 switch (hw->mac.type) {
918 case ixgbe_mac_82598EB:
919 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
922 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
924 hwstats->lxoffrxc += data;
926 /* refill credits (no tx hang) if we received xoff */
930 for (i = 0; i < adapter->num_tx_queues; i++)
931 clear_bit(__IXGBE_HANG_CHECK_ARMED,
932 &adapter->tx_ring[i]->state);
935 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
937 struct ixgbe_hw *hw = &adapter->hw;
938 struct ixgbe_hw_stats *hwstats = &adapter->stats;
942 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
944 if (adapter->ixgbe_ieee_pfc)
945 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
947 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
948 ixgbe_update_xoff_rx_lfc(adapter);
952 /* update stats for each tc, only valid with PFC enabled */
953 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
956 switch (hw->mac.type) {
957 case ixgbe_mac_82598EB:
958 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
961 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
963 hwstats->pxoffrxc[i] += pxoffrxc;
964 /* Get the TC for given UP */
965 tc = netdev_get_prio_tc_map(adapter->netdev, i);
966 xoff[tc] += pxoffrxc;
969 /* disarm tx queues that have received xoff frames */
970 for (i = 0; i < adapter->num_tx_queues; i++) {
971 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
973 tc = tx_ring->dcb_tc;
975 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
979 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
981 return ring->stats.packets;
984 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
986 struct ixgbe_adapter *adapter;
990 if (ring->l2_accel_priv)
991 adapter = ring->l2_accel_priv->real_adapter;
993 adapter = netdev_priv(ring->netdev);
996 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
997 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1000 return (head < tail) ?
1001 tail - head : (tail + ring->count - head);
1006 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1008 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1009 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1010 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1012 clear_check_for_tx_hang(tx_ring);
1015 * Check for a hung queue, but be thorough. This verifies
1016 * that a transmit has been completed since the previous
1017 * check AND there is at least one packet pending. The
1018 * ARMED bit is set to indicate a potential hang. The
1019 * bit is cleared if a pause frame is received to remove
1020 * false hang detection due to PFC or 802.3x frames. By
1021 * requiring this to fail twice we avoid races with
1022 * pfc clearing the ARMED bit and conditions where we
1023 * run the check_tx_hang logic with a transmit completion
1024 * pending but without time to complete it yet.
1026 if (tx_done_old == tx_done && tx_pending)
1027 /* make sure it is true for two checks in a row */
1028 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1030 /* update completed stats and continue */
1031 tx_ring->tx_stats.tx_done_old = tx_done;
1032 /* reset the countdown */
1033 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1039 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1040 * @adapter: driver private struct
1042 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1045 /* Do the reset outside of interrupt context */
1046 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1047 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1048 e_warn(drv, "initiating reset due to tx timeout\n");
1049 ixgbe_service_event_schedule(adapter);
1054 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1055 * @q_vector: structure containing interrupt and ring information
1056 * @tx_ring: tx ring to clean
1058 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1059 struct ixgbe_ring *tx_ring)
1061 struct ixgbe_adapter *adapter = q_vector->adapter;
1062 struct ixgbe_tx_buffer *tx_buffer;
1063 union ixgbe_adv_tx_desc *tx_desc;
1064 unsigned int total_bytes = 0, total_packets = 0;
1065 unsigned int budget = q_vector->tx.work_limit;
1066 unsigned int i = tx_ring->next_to_clean;
1068 if (test_bit(__IXGBE_DOWN, &adapter->state))
1071 tx_buffer = &tx_ring->tx_buffer_info[i];
1072 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1073 i -= tx_ring->count;
1076 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1078 /* if next_to_watch is not set then there is no work pending */
1082 /* prevent any other reads prior to eop_desc */
1083 read_barrier_depends();
1085 /* if DD is not set pending work has not been completed */
1086 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1089 /* clear next_to_watch to prevent false hangs */
1090 tx_buffer->next_to_watch = NULL;
1092 /* update the statistics for this packet */
1093 total_bytes += tx_buffer->bytecount;
1094 total_packets += tx_buffer->gso_segs;
1097 dev_kfree_skb_any(tx_buffer->skb);
1099 /* unmap skb header data */
1100 dma_unmap_single(tx_ring->dev,
1101 dma_unmap_addr(tx_buffer, dma),
1102 dma_unmap_len(tx_buffer, len),
1105 /* clear tx_buffer data */
1106 tx_buffer->skb = NULL;
1107 dma_unmap_len_set(tx_buffer, len, 0);
1109 /* unmap remaining buffers */
1110 while (tx_desc != eop_desc) {
1115 i -= tx_ring->count;
1116 tx_buffer = tx_ring->tx_buffer_info;
1117 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1120 /* unmap any remaining paged data */
1121 if (dma_unmap_len(tx_buffer, len)) {
1122 dma_unmap_page(tx_ring->dev,
1123 dma_unmap_addr(tx_buffer, dma),
1124 dma_unmap_len(tx_buffer, len),
1126 dma_unmap_len_set(tx_buffer, len, 0);
1130 /* move us one more past the eop_desc for start of next pkt */
1135 i -= tx_ring->count;
1136 tx_buffer = tx_ring->tx_buffer_info;
1137 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1140 /* issue prefetch for next Tx descriptor */
1143 /* update budget accounting */
1145 } while (likely(budget));
1147 i += tx_ring->count;
1148 tx_ring->next_to_clean = i;
1149 u64_stats_update_begin(&tx_ring->syncp);
1150 tx_ring->stats.bytes += total_bytes;
1151 tx_ring->stats.packets += total_packets;
1152 u64_stats_update_end(&tx_ring->syncp);
1153 q_vector->tx.total_bytes += total_bytes;
1154 q_vector->tx.total_packets += total_packets;
1156 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1157 /* schedule immediate reset if we believe we hung */
1158 struct ixgbe_hw *hw = &adapter->hw;
1159 e_err(drv, "Detected Tx Unit Hang\n"
1161 " TDH, TDT <%x>, <%x>\n"
1162 " next_to_use <%x>\n"
1163 " next_to_clean <%x>\n"
1164 "tx_buffer_info[next_to_clean]\n"
1165 " time_stamp <%lx>\n"
1167 tx_ring->queue_index,
1168 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1169 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1170 tx_ring->next_to_use, i,
1171 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1173 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1176 "tx hang %d detected on queue %d, resetting adapter\n",
1177 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1179 /* schedule immediate reset if we believe we hung */
1180 ixgbe_tx_timeout_reset(adapter);
1182 /* the adapter is about to reset, no point in enabling stuff */
1186 netdev_tx_completed_queue(txring_txq(tx_ring),
1187 total_packets, total_bytes);
1189 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1190 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1191 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1192 /* Make sure that anybody stopping the queue after this
1193 * sees the new next_to_clean.
1196 if (__netif_subqueue_stopped(tx_ring->netdev,
1197 tx_ring->queue_index)
1198 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1199 netif_wake_subqueue(tx_ring->netdev,
1200 tx_ring->queue_index);
1201 ++tx_ring->tx_stats.restart_queue;
1208 #ifdef CONFIG_IXGBE_DCA
1209 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1210 struct ixgbe_ring *tx_ring,
1213 struct ixgbe_hw *hw = &adapter->hw;
1214 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1217 switch (hw->mac.type) {
1218 case ixgbe_mac_82598EB:
1219 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1221 case ixgbe_mac_82599EB:
1222 case ixgbe_mac_X540:
1223 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1224 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1227 /* for unknown hardware do not write register */
1232 * We can enable relaxed ordering for reads, but not writes when
1233 * DCA is enabled. This is due to a known issue in some chipsets
1234 * which will cause the DCA tag to be cleared.
1236 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1237 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1238 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1240 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1243 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1244 struct ixgbe_ring *rx_ring,
1247 struct ixgbe_hw *hw = &adapter->hw;
1248 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1249 u8 reg_idx = rx_ring->reg_idx;
1252 switch (hw->mac.type) {
1253 case ixgbe_mac_82599EB:
1254 case ixgbe_mac_X540:
1255 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1262 * We can enable relaxed ordering for reads, but not writes when
1263 * DCA is enabled. This is due to a known issue in some chipsets
1264 * which will cause the DCA tag to be cleared.
1266 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1267 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1269 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1272 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1274 struct ixgbe_adapter *adapter = q_vector->adapter;
1275 struct ixgbe_ring *ring;
1276 int cpu = get_cpu();
1278 if (q_vector->cpu == cpu)
1281 ixgbe_for_each_ring(ring, q_vector->tx)
1282 ixgbe_update_tx_dca(adapter, ring, cpu);
1284 ixgbe_for_each_ring(ring, q_vector->rx)
1285 ixgbe_update_rx_dca(adapter, ring, cpu);
1287 q_vector->cpu = cpu;
1292 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1296 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1299 /* always use CB2 mode, difference is masked in the CB driver */
1300 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1302 for (i = 0; i < adapter->num_q_vectors; i++) {
1303 adapter->q_vector[i]->cpu = -1;
1304 ixgbe_update_dca(adapter->q_vector[i]);
1308 static int __ixgbe_notify_dca(struct device *dev, void *data)
1310 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1311 unsigned long event = *(unsigned long *)data;
1313 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1317 case DCA_PROVIDER_ADD:
1318 /* if we're already enabled, don't do it again */
1319 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1321 if (dca_add_requester(dev) == 0) {
1322 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1323 ixgbe_setup_dca(adapter);
1326 /* Fall Through since DCA is disabled. */
1327 case DCA_PROVIDER_REMOVE:
1328 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1329 dca_remove_requester(dev);
1330 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1331 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1339 #endif /* CONFIG_IXGBE_DCA */
1340 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1341 union ixgbe_adv_rx_desc *rx_desc,
1342 struct sk_buff *skb)
1344 if (ring->netdev->features & NETIF_F_RXHASH)
1346 le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1352 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1353 * @ring: structure containing ring specific data
1354 * @rx_desc: advanced rx descriptor
1356 * Returns : true if it is FCoE pkt
1358 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1359 union ixgbe_adv_rx_desc *rx_desc)
1361 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1363 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1364 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1365 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1366 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1369 #endif /* IXGBE_FCOE */
1371 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1372 * @ring: structure containing ring specific data
1373 * @rx_desc: current Rx descriptor being processed
1374 * @skb: skb currently being received and modified
1376 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1377 union ixgbe_adv_rx_desc *rx_desc,
1378 struct sk_buff *skb)
1380 skb_checksum_none_assert(skb);
1382 /* Rx csum disabled */
1383 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1386 /* if IP and error */
1387 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1388 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1389 ring->rx_stats.csum_err++;
1393 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1396 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1397 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1400 * 82599 errata, UDP frames with a 0 checksum can be marked as
1403 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1404 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1407 ring->rx_stats.csum_err++;
1411 /* It must be a TCP or UDP packet with a valid checksum */
1412 skb->ip_summed = CHECKSUM_UNNECESSARY;
1415 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1417 rx_ring->next_to_use = val;
1419 /* update next to alloc since we have filled the ring */
1420 rx_ring->next_to_alloc = val;
1422 * Force memory writes to complete before letting h/w
1423 * know there are new descriptors to fetch. (Only
1424 * applicable for weak-ordered memory model archs,
1428 ixgbe_write_tail(rx_ring, val);
1431 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1432 struct ixgbe_rx_buffer *bi)
1434 struct page *page = bi->page;
1435 dma_addr_t dma = bi->dma;
1437 /* since we are recycling buffers we should seldom need to alloc */
1441 /* alloc new page for storage */
1442 if (likely(!page)) {
1443 page = __skb_alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1444 bi->skb, ixgbe_rx_pg_order(rx_ring));
1445 if (unlikely(!page)) {
1446 rx_ring->rx_stats.alloc_rx_page_failed++;
1452 /* map page for use */
1453 dma = dma_map_page(rx_ring->dev, page, 0,
1454 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1457 * if mapping failed free memory back to system since
1458 * there isn't much point in holding memory we can't use
1460 if (dma_mapping_error(rx_ring->dev, dma)) {
1461 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1464 rx_ring->rx_stats.alloc_rx_page_failed++;
1469 bi->page_offset = 0;
1475 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1476 * @rx_ring: ring to place buffers on
1477 * @cleaned_count: number of buffers to replace
1479 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1481 union ixgbe_adv_rx_desc *rx_desc;
1482 struct ixgbe_rx_buffer *bi;
1483 u16 i = rx_ring->next_to_use;
1489 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1490 bi = &rx_ring->rx_buffer_info[i];
1491 i -= rx_ring->count;
1494 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1498 * Refresh the desc even if buffer_addrs didn't change
1499 * because each write-back erases this info.
1501 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1507 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1508 bi = rx_ring->rx_buffer_info;
1509 i -= rx_ring->count;
1512 /* clear the hdr_addr for the next_to_use descriptor */
1513 rx_desc->read.hdr_addr = 0;
1516 } while (cleaned_count);
1518 i += rx_ring->count;
1520 if (rx_ring->next_to_use != i)
1521 ixgbe_release_rx_desc(rx_ring, i);
1525 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1526 * @data: pointer to the start of the headers
1527 * @max_len: total length of section to find headers in
1529 * This function is meant to determine the length of headers that will
1530 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1531 * motivation of doing this is to only perform one pull for IPv4 TCP
1532 * packets so that we can do basic things like calculating the gso_size
1533 * based on the average data per packet.
1535 static unsigned int ixgbe_get_headlen(unsigned char *data,
1536 unsigned int max_len)
1539 unsigned char *network;
1542 struct vlan_hdr *vlan;
1545 struct ipv6hdr *ipv6;
1548 u8 nexthdr = 0; /* default to not TCP */
1551 /* this should never happen, but better safe than sorry */
1552 if (max_len < ETH_HLEN)
1555 /* initialize network frame pointer */
1558 /* set first protocol and move network header forward */
1559 protocol = hdr.eth->h_proto;
1560 hdr.network += ETH_HLEN;
1562 /* handle any vlan tag if present */
1563 if (protocol == htons(ETH_P_8021Q)) {
1564 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1567 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1568 hdr.network += VLAN_HLEN;
1571 /* handle L3 protocols */
1572 if (protocol == htons(ETH_P_IP)) {
1573 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1576 /* access ihl as a u8 to avoid unaligned access on ia64 */
1577 hlen = (hdr.network[0] & 0x0F) << 2;
1579 /* verify hlen meets minimum size requirements */
1580 if (hlen < sizeof(struct iphdr))
1581 return hdr.network - data;
1583 /* record next protocol if header is present */
1584 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
1585 nexthdr = hdr.ipv4->protocol;
1586 } else if (protocol == htons(ETH_P_IPV6)) {
1587 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
1590 /* record next protocol */
1591 nexthdr = hdr.ipv6->nexthdr;
1592 hlen = sizeof(struct ipv6hdr);
1594 } else if (protocol == htons(ETH_P_FCOE)) {
1595 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1597 hlen = FCOE_HEADER_LEN;
1600 return hdr.network - data;
1603 /* relocate pointer to start of L4 header */
1604 hdr.network += hlen;
1606 /* finally sort out TCP/UDP */
1607 if (nexthdr == IPPROTO_TCP) {
1608 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1611 /* access doff as a u8 to avoid unaligned access on ia64 */
1612 hlen = (hdr.network[12] & 0xF0) >> 2;
1614 /* verify hlen meets minimum size requirements */
1615 if (hlen < sizeof(struct tcphdr))
1616 return hdr.network - data;
1618 hdr.network += hlen;
1619 } else if (nexthdr == IPPROTO_UDP) {
1620 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
1623 hdr.network += sizeof(struct udphdr);
1627 * If everything has gone correctly hdr.network should be the
1628 * data section of the packet and will be the end of the header.
1629 * If not then it probably represents the end of the last recognized
1632 if ((hdr.network - data) < max_len)
1633 return hdr.network - data;
1638 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1639 struct sk_buff *skb)
1641 u16 hdr_len = skb_headlen(skb);
1643 /* set gso_size to avoid messing up TCP MSS */
1644 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1645 IXGBE_CB(skb)->append_cnt);
1646 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1649 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1650 struct sk_buff *skb)
1652 /* if append_cnt is 0 then frame is not RSC */
1653 if (!IXGBE_CB(skb)->append_cnt)
1656 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1657 rx_ring->rx_stats.rsc_flush++;
1659 ixgbe_set_rsc_gso_size(rx_ring, skb);
1661 /* gso_size is computed using append_cnt so always clear it last */
1662 IXGBE_CB(skb)->append_cnt = 0;
1666 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1667 * @rx_ring: rx descriptor ring packet is being transacted on
1668 * @rx_desc: pointer to the EOP Rx descriptor
1669 * @skb: pointer to current skb being populated
1671 * This function checks the ring, descriptor, and packet information in
1672 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1673 * other fields within the skb.
1675 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1676 union ixgbe_adv_rx_desc *rx_desc,
1677 struct sk_buff *skb)
1679 struct net_device *dev = rx_ring->netdev;
1681 ixgbe_update_rsc_stats(rx_ring, skb);
1683 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1685 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1687 if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1688 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1690 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1691 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1692 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1693 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1696 skb_record_rx_queue(skb, rx_ring->queue_index);
1698 skb->protocol = eth_type_trans(skb, dev);
1701 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1702 struct sk_buff *skb)
1704 struct ixgbe_adapter *adapter = q_vector->adapter;
1706 if (ixgbe_qv_busy_polling(q_vector))
1707 netif_receive_skb(skb);
1708 else if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1709 napi_gro_receive(&q_vector->napi, skb);
1715 * ixgbe_is_non_eop - process handling of non-EOP buffers
1716 * @rx_ring: Rx ring being processed
1717 * @rx_desc: Rx descriptor for current buffer
1718 * @skb: Current socket buffer containing buffer in progress
1720 * This function updates next to clean. If the buffer is an EOP buffer
1721 * this function exits returning false, otherwise it will place the
1722 * sk_buff in the next buffer to be chained and return true indicating
1723 * that this is in fact a non-EOP buffer.
1725 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1726 union ixgbe_adv_rx_desc *rx_desc,
1727 struct sk_buff *skb)
1729 u32 ntc = rx_ring->next_to_clean + 1;
1731 /* fetch, update, and store next to clean */
1732 ntc = (ntc < rx_ring->count) ? ntc : 0;
1733 rx_ring->next_to_clean = ntc;
1735 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1737 /* update RSC append count if present */
1738 if (ring_is_rsc_enabled(rx_ring)) {
1739 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1740 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1742 if (unlikely(rsc_enabled)) {
1743 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1745 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1746 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1748 /* update ntc based on RSC value */
1749 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1750 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1751 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1755 /* if we are the last buffer then there is nothing else to do */
1756 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1759 /* place skb in next buffer to be received */
1760 rx_ring->rx_buffer_info[ntc].skb = skb;
1761 rx_ring->rx_stats.non_eop_descs++;
1767 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1768 * @rx_ring: rx descriptor ring packet is being transacted on
1769 * @skb: pointer to current skb being adjusted
1771 * This function is an ixgbe specific version of __pskb_pull_tail. The
1772 * main difference between this version and the original function is that
1773 * this function can make several assumptions about the state of things
1774 * that allow for significant optimizations versus the standard function.
1775 * As a result we can do things like drop a frag and maintain an accurate
1776 * truesize for the skb.
1778 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1779 struct sk_buff *skb)
1781 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1783 unsigned int pull_len;
1786 * it is valid to use page_address instead of kmap since we are
1787 * working with pages allocated out of the lomem pool per
1788 * alloc_page(GFP_ATOMIC)
1790 va = skb_frag_address(frag);
1793 * we need the header to contain the greater of either ETH_HLEN or
1794 * 60 bytes if the skb->len is less than 60 for skb_pad.
1796 pull_len = ixgbe_get_headlen(va, IXGBE_RX_HDR_SIZE);
1798 /* align pull length to size of long to optimize memcpy performance */
1799 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1801 /* update all of the pointers */
1802 skb_frag_size_sub(frag, pull_len);
1803 frag->page_offset += pull_len;
1804 skb->data_len -= pull_len;
1805 skb->tail += pull_len;
1809 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1810 * @rx_ring: rx descriptor ring packet is being transacted on
1811 * @skb: pointer to current skb being updated
1813 * This function provides a basic DMA sync up for the first fragment of an
1814 * skb. The reason for doing this is that the first fragment cannot be
1815 * unmapped until we have reached the end of packet descriptor for a buffer
1818 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1819 struct sk_buff *skb)
1821 /* if the page was released unmap it, else just sync our portion */
1822 if (unlikely(IXGBE_CB(skb)->page_released)) {
1823 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1824 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1825 IXGBE_CB(skb)->page_released = false;
1827 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1829 dma_sync_single_range_for_cpu(rx_ring->dev,
1832 ixgbe_rx_bufsz(rx_ring),
1835 IXGBE_CB(skb)->dma = 0;
1839 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1840 * @rx_ring: rx descriptor ring packet is being transacted on
1841 * @rx_desc: pointer to the EOP Rx descriptor
1842 * @skb: pointer to current skb being fixed
1844 * Check for corrupted packet headers caused by senders on the local L2
1845 * embedded NIC switch not setting up their Tx Descriptors right. These
1846 * should be very rare.
1848 * Also address the case where we are pulling data in on pages only
1849 * and as such no data is present in the skb header.
1851 * In addition if skb is not at least 60 bytes we need to pad it so that
1852 * it is large enough to qualify as a valid Ethernet frame.
1854 * Returns true if an error was encountered and skb was freed.
1856 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1857 union ixgbe_adv_rx_desc *rx_desc,
1858 struct sk_buff *skb)
1860 struct net_device *netdev = rx_ring->netdev;
1862 /* verify that the packet does not have any known errors */
1863 if (unlikely(ixgbe_test_staterr(rx_desc,
1864 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1865 !(netdev->features & NETIF_F_RXALL))) {
1866 dev_kfree_skb_any(skb);
1870 /* place header in linear portion of buffer */
1871 if (skb_is_nonlinear(skb))
1872 ixgbe_pull_tail(rx_ring, skb);
1875 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1876 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1880 /* if skb_pad returns an error the skb was freed */
1881 if (unlikely(skb->len < 60)) {
1882 int pad_len = 60 - skb->len;
1884 if (skb_pad(skb, pad_len))
1886 __skb_put(skb, pad_len);
1893 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1894 * @rx_ring: rx descriptor ring to store buffers on
1895 * @old_buff: donor buffer to have page reused
1897 * Synchronizes page for reuse by the adapter
1899 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1900 struct ixgbe_rx_buffer *old_buff)
1902 struct ixgbe_rx_buffer *new_buff;
1903 u16 nta = rx_ring->next_to_alloc;
1905 new_buff = &rx_ring->rx_buffer_info[nta];
1907 /* update, and store next to alloc */
1909 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1911 /* transfer page from old buffer to new buffer */
1912 new_buff->page = old_buff->page;
1913 new_buff->dma = old_buff->dma;
1914 new_buff->page_offset = old_buff->page_offset;
1916 /* sync the buffer for use by the device */
1917 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1918 new_buff->page_offset,
1919 ixgbe_rx_bufsz(rx_ring),
1924 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1925 * @rx_ring: rx descriptor ring to transact packets on
1926 * @rx_buffer: buffer containing page to add
1927 * @rx_desc: descriptor containing length of buffer written by hardware
1928 * @skb: sk_buff to place the data into
1930 * This function will add the data contained in rx_buffer->page to the skb.
1931 * This is done either through a direct copy if the data in the buffer is
1932 * less than the skb header size, otherwise it will just attach the page as
1933 * a frag to the skb.
1935 * The function will then update the page offset if necessary and return
1936 * true if the buffer can be reused by the adapter.
1938 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1939 struct ixgbe_rx_buffer *rx_buffer,
1940 union ixgbe_adv_rx_desc *rx_desc,
1941 struct sk_buff *skb)
1943 struct page *page = rx_buffer->page;
1944 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1945 #if (PAGE_SIZE < 8192)
1946 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1948 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1949 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1950 ixgbe_rx_bufsz(rx_ring);
1953 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1954 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1956 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1958 /* we can reuse buffer as-is, just make sure it is local */
1959 if (likely(page_to_nid(page) == numa_node_id()))
1962 /* this page cannot be reused so discard it */
1967 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1968 rx_buffer->page_offset, size, truesize);
1970 /* avoid re-using remote pages */
1971 if (unlikely(page_to_nid(page) != numa_node_id()))
1974 #if (PAGE_SIZE < 8192)
1975 /* if we are only owner of page we can reuse it */
1976 if (unlikely(page_count(page) != 1))
1979 /* flip page offset to other buffer */
1980 rx_buffer->page_offset ^= truesize;
1983 * since we are the only owner of the page and we need to
1984 * increment it, just set the value to 2 in order to avoid
1985 * an unecessary locked operation
1987 atomic_set(&page->_count, 2);
1989 /* move offset up to the next cache line */
1990 rx_buffer->page_offset += truesize;
1992 if (rx_buffer->page_offset > last_offset)
1995 /* bump ref count on page before it is given to the stack */
2002 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
2003 union ixgbe_adv_rx_desc *rx_desc)
2005 struct ixgbe_rx_buffer *rx_buffer;
2006 struct sk_buff *skb;
2009 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2010 page = rx_buffer->page;
2013 skb = rx_buffer->skb;
2016 void *page_addr = page_address(page) +
2017 rx_buffer->page_offset;
2019 /* prefetch first cache line of first page */
2020 prefetch(page_addr);
2021 #if L1_CACHE_BYTES < 128
2022 prefetch(page_addr + L1_CACHE_BYTES);
2025 /* allocate a skb to store the frags */
2026 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
2028 if (unlikely(!skb)) {
2029 rx_ring->rx_stats.alloc_rx_buff_failed++;
2034 * we will be copying header into skb->data in
2035 * pskb_may_pull so it is in our interest to prefetch
2036 * it now to avoid a possible cache miss
2038 prefetchw(skb->data);
2041 * Delay unmapping of the first packet. It carries the
2042 * header information, HW may still access the header
2043 * after the writeback. Only unmap it when EOP is
2046 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2049 IXGBE_CB(skb)->dma = rx_buffer->dma;
2051 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2052 ixgbe_dma_sync_frag(rx_ring, skb);
2055 /* we are reusing so sync this buffer for CPU use */
2056 dma_sync_single_range_for_cpu(rx_ring->dev,
2058 rx_buffer->page_offset,
2059 ixgbe_rx_bufsz(rx_ring),
2063 /* pull page into skb */
2064 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2065 /* hand second half of page back to the ring */
2066 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2067 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2068 /* the page has been released from the ring */
2069 IXGBE_CB(skb)->page_released = true;
2071 /* we are not reusing the buffer so unmap it */
2072 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2073 ixgbe_rx_pg_size(rx_ring),
2077 /* clear contents of buffer_info */
2078 rx_buffer->skb = NULL;
2080 rx_buffer->page = NULL;
2086 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2087 * @q_vector: structure containing interrupt and ring information
2088 * @rx_ring: rx descriptor ring to transact packets on
2089 * @budget: Total limit on number of packets to process
2091 * This function provides a "bounce buffer" approach to Rx interrupt
2092 * processing. The advantage to this is that on systems that have
2093 * expensive overhead for IOMMU access this provides a means of avoiding
2094 * it by maintaining the mapping of the page to the syste.
2096 * Returns amount of work completed
2098 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2099 struct ixgbe_ring *rx_ring,
2102 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2104 struct ixgbe_adapter *adapter = q_vector->adapter;
2106 unsigned int mss = 0;
2107 #endif /* IXGBE_FCOE */
2108 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2110 while (likely(total_rx_packets < budget)) {
2111 union ixgbe_adv_rx_desc *rx_desc;
2112 struct sk_buff *skb;
2114 /* return some buffers to hardware, one at a time is too slow */
2115 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2116 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2120 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2122 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
2126 * This memory barrier is needed to keep us from reading
2127 * any other fields out of the rx_desc until we know the
2128 * RXD_STAT_DD bit is set
2132 /* retrieve a buffer from the ring */
2133 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2135 /* exit if we failed to retrieve a buffer */
2141 /* place incomplete frames back on ring for completion */
2142 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2145 /* verify the packet layout is correct */
2146 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2149 /* probably a little skewed due to removing CRC */
2150 total_rx_bytes += skb->len;
2152 /* populate checksum, timestamp, VLAN, and protocol */
2153 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2156 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2157 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2158 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2159 /* include DDPed FCoE data */
2160 if (ddp_bytes > 0) {
2162 mss = rx_ring->netdev->mtu -
2163 sizeof(struct fcoe_hdr) -
2164 sizeof(struct fc_frame_header) -
2165 sizeof(struct fcoe_crc_eof);
2169 total_rx_bytes += ddp_bytes;
2170 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2174 dev_kfree_skb_any(skb);
2179 #endif /* IXGBE_FCOE */
2180 skb_mark_napi_id(skb, &q_vector->napi);
2181 ixgbe_rx_skb(q_vector, skb);
2183 /* update budget accounting */
2187 u64_stats_update_begin(&rx_ring->syncp);
2188 rx_ring->stats.packets += total_rx_packets;
2189 rx_ring->stats.bytes += total_rx_bytes;
2190 u64_stats_update_end(&rx_ring->syncp);
2191 q_vector->rx.total_packets += total_rx_packets;
2192 q_vector->rx.total_bytes += total_rx_bytes;
2195 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2197 return total_rx_packets;
2200 #ifdef CONFIG_NET_RX_BUSY_POLL
2201 /* must be called with local_bh_disable()d */
2202 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2204 struct ixgbe_q_vector *q_vector =
2205 container_of(napi, struct ixgbe_q_vector, napi);
2206 struct ixgbe_adapter *adapter = q_vector->adapter;
2207 struct ixgbe_ring *ring;
2210 if (test_bit(__IXGBE_DOWN, &adapter->state))
2211 return LL_FLUSH_FAILED;
2213 if (!ixgbe_qv_lock_poll(q_vector))
2214 return LL_FLUSH_BUSY;
2216 ixgbe_for_each_ring(ring, q_vector->rx) {
2217 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2218 #ifdef BP_EXTENDED_STATS
2220 ring->stats.cleaned += found;
2222 ring->stats.misses++;
2228 ixgbe_qv_unlock_poll(q_vector);
2232 #endif /* CONFIG_NET_RX_BUSY_POLL */
2235 * ixgbe_configure_msix - Configure MSI-X hardware
2236 * @adapter: board private structure
2238 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2241 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2243 struct ixgbe_q_vector *q_vector;
2247 /* Populate MSIX to EITR Select */
2248 if (adapter->num_vfs > 32) {
2249 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2250 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2254 * Populate the IVAR table and set the ITR values to the
2255 * corresponding register.
2257 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2258 struct ixgbe_ring *ring;
2259 q_vector = adapter->q_vector[v_idx];
2261 ixgbe_for_each_ring(ring, q_vector->rx)
2262 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2264 ixgbe_for_each_ring(ring, q_vector->tx)
2265 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2267 ixgbe_write_eitr(q_vector);
2270 switch (adapter->hw.mac.type) {
2271 case ixgbe_mac_82598EB:
2272 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2275 case ixgbe_mac_82599EB:
2276 case ixgbe_mac_X540:
2277 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2282 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2284 /* set up to autoclear timer, and the vectors */
2285 mask = IXGBE_EIMS_ENABLE_MASK;
2286 mask &= ~(IXGBE_EIMS_OTHER |
2287 IXGBE_EIMS_MAILBOX |
2290 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2293 enum latency_range {
2297 latency_invalid = 255
2301 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2302 * @q_vector: structure containing interrupt and ring information
2303 * @ring_container: structure containing ring performance data
2305 * Stores a new ITR value based on packets and byte
2306 * counts during the last interrupt. The advantage of per interrupt
2307 * computation is faster updates and more accurate ITR for the current
2308 * traffic pattern. Constants in this function were computed
2309 * based on theoretical maximum wire speed and thresholds were set based
2310 * on testing data as well as attempting to minimize response time
2311 * while increasing bulk throughput.
2312 * this functionality is controlled by the InterruptThrottleRate module
2313 * parameter (see ixgbe_param.c)
2315 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2316 struct ixgbe_ring_container *ring_container)
2318 int bytes = ring_container->total_bytes;
2319 int packets = ring_container->total_packets;
2322 u8 itr_setting = ring_container->itr;
2327 /* simple throttlerate management
2328 * 0-10MB/s lowest (100000 ints/s)
2329 * 10-20MB/s low (20000 ints/s)
2330 * 20-1249MB/s bulk (8000 ints/s)
2332 /* what was last interrupt timeslice? */
2333 timepassed_us = q_vector->itr >> 2;
2334 if (timepassed_us == 0)
2337 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2339 switch (itr_setting) {
2340 case lowest_latency:
2341 if (bytes_perint > 10)
2342 itr_setting = low_latency;
2345 if (bytes_perint > 20)
2346 itr_setting = bulk_latency;
2347 else if (bytes_perint <= 10)
2348 itr_setting = lowest_latency;
2351 if (bytes_perint <= 20)
2352 itr_setting = low_latency;
2356 /* clear work counters since we have the values we need */
2357 ring_container->total_bytes = 0;
2358 ring_container->total_packets = 0;
2360 /* write updated itr to ring container */
2361 ring_container->itr = itr_setting;
2365 * ixgbe_write_eitr - write EITR register in hardware specific way
2366 * @q_vector: structure containing interrupt and ring information
2368 * This function is made to be called by ethtool and by the driver
2369 * when it needs to update EITR registers at runtime. Hardware
2370 * specific quirks/differences are taken care of here.
2372 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2374 struct ixgbe_adapter *adapter = q_vector->adapter;
2375 struct ixgbe_hw *hw = &adapter->hw;
2376 int v_idx = q_vector->v_idx;
2377 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2379 switch (adapter->hw.mac.type) {
2380 case ixgbe_mac_82598EB:
2381 /* must write high and low 16 bits to reset counter */
2382 itr_reg |= (itr_reg << 16);
2384 case ixgbe_mac_82599EB:
2385 case ixgbe_mac_X540:
2387 * set the WDIS bit to not clear the timer bits and cause an
2388 * immediate assertion of the interrupt
2390 itr_reg |= IXGBE_EITR_CNT_WDIS;
2395 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2398 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2400 u32 new_itr = q_vector->itr;
2403 ixgbe_update_itr(q_vector, &q_vector->tx);
2404 ixgbe_update_itr(q_vector, &q_vector->rx);
2406 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2408 switch (current_itr) {
2409 /* counts and packets in update_itr are dependent on these numbers */
2410 case lowest_latency:
2411 new_itr = IXGBE_100K_ITR;
2414 new_itr = IXGBE_20K_ITR;
2417 new_itr = IXGBE_8K_ITR;
2423 if (new_itr != q_vector->itr) {
2424 /* do an exponential smoothing */
2425 new_itr = (10 * new_itr * q_vector->itr) /
2426 ((9 * new_itr) + q_vector->itr);
2428 /* save the algorithm value here */
2429 q_vector->itr = new_itr;
2431 ixgbe_write_eitr(q_vector);
2436 * ixgbe_check_overtemp_subtask - check for over temperature
2437 * @adapter: pointer to adapter
2439 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2441 struct ixgbe_hw *hw = &adapter->hw;
2442 u32 eicr = adapter->interrupt_event;
2444 if (test_bit(__IXGBE_DOWN, &adapter->state))
2447 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2448 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2451 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2453 switch (hw->device_id) {
2454 case IXGBE_DEV_ID_82599_T3_LOM:
2456 * Since the warning interrupt is for both ports
2457 * we don't have to check if:
2458 * - This interrupt wasn't for our port.
2459 * - We may have missed the interrupt so always have to
2460 * check if we got a LSC
2462 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2463 !(eicr & IXGBE_EICR_LSC))
2466 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2468 bool link_up = false;
2470 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2476 /* Check if this is not due to overtemp */
2477 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2482 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2487 "Network adapter has been stopped because it has over heated. "
2488 "Restart the computer. If the problem persists, "
2489 "power off the system and replace the adapter\n");
2491 adapter->interrupt_event = 0;
2494 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2496 struct ixgbe_hw *hw = &adapter->hw;
2498 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2499 (eicr & IXGBE_EICR_GPI_SDP1)) {
2500 e_crit(probe, "Fan has stopped, replace the adapter\n");
2501 /* write to clear the interrupt */
2502 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2506 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2508 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2511 switch (adapter->hw.mac.type) {
2512 case ixgbe_mac_82599EB:
2514 * Need to check link state so complete overtemp check
2517 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2518 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2519 adapter->interrupt_event = eicr;
2520 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2521 ixgbe_service_event_schedule(adapter);
2525 case ixgbe_mac_X540:
2526 if (!(eicr & IXGBE_EICR_TS))
2534 "Network adapter has been stopped because it has over heated. "
2535 "Restart the computer. If the problem persists, "
2536 "power off the system and replace the adapter\n");
2539 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2541 struct ixgbe_hw *hw = &adapter->hw;
2543 if (eicr & IXGBE_EICR_GPI_SDP2) {
2544 /* Clear the interrupt */
2545 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2546 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2547 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2548 ixgbe_service_event_schedule(adapter);
2552 if (eicr & IXGBE_EICR_GPI_SDP1) {
2553 /* Clear the interrupt */
2554 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2555 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2556 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2557 ixgbe_service_event_schedule(adapter);
2562 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2564 struct ixgbe_hw *hw = &adapter->hw;
2567 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2568 adapter->link_check_timeout = jiffies;
2569 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2570 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2571 IXGBE_WRITE_FLUSH(hw);
2572 ixgbe_service_event_schedule(adapter);
2576 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2580 struct ixgbe_hw *hw = &adapter->hw;
2582 switch (hw->mac.type) {
2583 case ixgbe_mac_82598EB:
2584 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2585 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2587 case ixgbe_mac_82599EB:
2588 case ixgbe_mac_X540:
2589 mask = (qmask & 0xFFFFFFFF);
2591 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2592 mask = (qmask >> 32);
2594 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2599 /* skip the flush */
2602 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2606 struct ixgbe_hw *hw = &adapter->hw;
2608 switch (hw->mac.type) {
2609 case ixgbe_mac_82598EB:
2610 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2611 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2613 case ixgbe_mac_82599EB:
2614 case ixgbe_mac_X540:
2615 mask = (qmask & 0xFFFFFFFF);
2617 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2618 mask = (qmask >> 32);
2620 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2625 /* skip the flush */
2629 * ixgbe_irq_enable - Enable default interrupt generation settings
2630 * @adapter: board private structure
2632 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2635 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2637 /* don't reenable LSC while waiting for link */
2638 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2639 mask &= ~IXGBE_EIMS_LSC;
2641 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2642 switch (adapter->hw.mac.type) {
2643 case ixgbe_mac_82599EB:
2644 mask |= IXGBE_EIMS_GPI_SDP0;
2646 case ixgbe_mac_X540:
2647 mask |= IXGBE_EIMS_TS;
2652 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2653 mask |= IXGBE_EIMS_GPI_SDP1;
2654 switch (adapter->hw.mac.type) {
2655 case ixgbe_mac_82599EB:
2656 mask |= IXGBE_EIMS_GPI_SDP1;
2657 mask |= IXGBE_EIMS_GPI_SDP2;
2658 case ixgbe_mac_X540:
2659 mask |= IXGBE_EIMS_ECC;
2660 mask |= IXGBE_EIMS_MAILBOX;
2666 if (adapter->hw.mac.type == ixgbe_mac_X540)
2667 mask |= IXGBE_EIMS_TIMESYNC;
2669 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2670 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2671 mask |= IXGBE_EIMS_FLOW_DIR;
2673 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2675 ixgbe_irq_enable_queues(adapter, ~0);
2677 IXGBE_WRITE_FLUSH(&adapter->hw);
2680 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2682 struct ixgbe_adapter *adapter = data;
2683 struct ixgbe_hw *hw = &adapter->hw;
2687 * Workaround for Silicon errata. Use clear-by-write instead
2688 * of clear-by-read. Reading with EICS will return the
2689 * interrupt causes without clearing, which later be done
2690 * with the write to EICR.
2692 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2694 /* The lower 16bits of the EICR register are for the queue interrupts
2695 * which should be masked here in order to not accidently clear them if
2696 * the bits are high when ixgbe_msix_other is called. There is a race
2697 * condition otherwise which results in possible performance loss
2698 * especially if the ixgbe_msix_other interrupt is triggering
2699 * consistently (as it would when PPS is turned on for the X540 device)
2703 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2705 if (eicr & IXGBE_EICR_LSC)
2706 ixgbe_check_lsc(adapter);
2708 if (eicr & IXGBE_EICR_MAILBOX)
2709 ixgbe_msg_task(adapter);
2711 switch (hw->mac.type) {
2712 case ixgbe_mac_82599EB:
2713 case ixgbe_mac_X540:
2714 if (eicr & IXGBE_EICR_ECC) {
2715 e_info(link, "Received ECC Err, initiating reset\n");
2716 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2717 ixgbe_service_event_schedule(adapter);
2718 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2720 /* Handle Flow Director Full threshold interrupt */
2721 if (eicr & IXGBE_EICR_FLOW_DIR) {
2722 int reinit_count = 0;
2724 for (i = 0; i < adapter->num_tx_queues; i++) {
2725 struct ixgbe_ring *ring = adapter->tx_ring[i];
2726 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2731 /* no more flow director interrupts until after init */
2732 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2733 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2734 ixgbe_service_event_schedule(adapter);
2737 ixgbe_check_sfp_event(adapter, eicr);
2738 ixgbe_check_overtemp_event(adapter, eicr);
2744 ixgbe_check_fan_failure(adapter, eicr);
2746 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2747 ixgbe_ptp_check_pps_event(adapter, eicr);
2749 /* re-enable the original interrupt state, no lsc, no queues */
2750 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2751 ixgbe_irq_enable(adapter, false, false);
2756 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2758 struct ixgbe_q_vector *q_vector = data;
2760 /* EIAM disabled interrupts (on this vector) for us */
2762 if (q_vector->rx.ring || q_vector->tx.ring)
2763 napi_schedule(&q_vector->napi);
2769 * ixgbe_poll - NAPI Rx polling callback
2770 * @napi: structure for representing this polling device
2771 * @budget: how many packets driver is allowed to clean
2773 * This function is used for legacy and MSI, NAPI mode
2775 int ixgbe_poll(struct napi_struct *napi, int budget)
2777 struct ixgbe_q_vector *q_vector =
2778 container_of(napi, struct ixgbe_q_vector, napi);
2779 struct ixgbe_adapter *adapter = q_vector->adapter;
2780 struct ixgbe_ring *ring;
2781 int per_ring_budget;
2782 bool clean_complete = true;
2784 #ifdef CONFIG_IXGBE_DCA
2785 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2786 ixgbe_update_dca(q_vector);
2789 ixgbe_for_each_ring(ring, q_vector->tx)
2790 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2792 if (!ixgbe_qv_lock_napi(q_vector))
2795 /* attempt to distribute budget to each queue fairly, but don't allow
2796 * the budget to go below 1 because we'll exit polling */
2797 if (q_vector->rx.count > 1)
2798 per_ring_budget = max(budget/q_vector->rx.count, 1);
2800 per_ring_budget = budget;
2802 ixgbe_for_each_ring(ring, q_vector->rx)
2803 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2804 per_ring_budget) < per_ring_budget);
2806 ixgbe_qv_unlock_napi(q_vector);
2807 /* If all work not completed, return budget and keep polling */
2808 if (!clean_complete)
2811 /* all work done, exit the polling mode */
2812 napi_complete(napi);
2813 if (adapter->rx_itr_setting & 1)
2814 ixgbe_set_itr(q_vector);
2815 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2816 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2822 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2823 * @adapter: board private structure
2825 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2826 * interrupts from the kernel.
2828 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2830 struct net_device *netdev = adapter->netdev;
2834 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2835 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2836 struct msix_entry *entry = &adapter->msix_entries[vector];
2838 if (q_vector->tx.ring && q_vector->rx.ring) {
2839 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2840 "%s-%s-%d", netdev->name, "TxRx", ri++);
2842 } else if (q_vector->rx.ring) {
2843 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2844 "%s-%s-%d", netdev->name, "rx", ri++);
2845 } else if (q_vector->tx.ring) {
2846 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2847 "%s-%s-%d", netdev->name, "tx", ti++);
2849 /* skip this unused q_vector */
2852 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2853 q_vector->name, q_vector);
2855 e_err(probe, "request_irq failed for MSIX interrupt "
2856 "Error: %d\n", err);
2857 goto free_queue_irqs;
2859 /* If Flow Director is enabled, set interrupt affinity */
2860 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2861 /* assign the mask for this irq */
2862 irq_set_affinity_hint(entry->vector,
2863 &q_vector->affinity_mask);
2867 err = request_irq(adapter->msix_entries[vector].vector,
2868 ixgbe_msix_other, 0, netdev->name, adapter);
2870 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2871 goto free_queue_irqs;
2879 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2881 free_irq(adapter->msix_entries[vector].vector,
2882 adapter->q_vector[vector]);
2884 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2885 pci_disable_msix(adapter->pdev);
2886 kfree(adapter->msix_entries);
2887 adapter->msix_entries = NULL;
2892 * ixgbe_intr - legacy mode Interrupt Handler
2893 * @irq: interrupt number
2894 * @data: pointer to a network interface device structure
2896 static irqreturn_t ixgbe_intr(int irq, void *data)
2898 struct ixgbe_adapter *adapter = data;
2899 struct ixgbe_hw *hw = &adapter->hw;
2900 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2904 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2905 * before the read of EICR.
2907 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2909 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2910 * therefore no explicit interrupt disable is necessary */
2911 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2914 * shared interrupt alert!
2915 * make sure interrupts are enabled because the read will
2916 * have disabled interrupts due to EIAM
2917 * finish the workaround of silicon errata on 82598. Unmask
2918 * the interrupt that we masked before the EICR read.
2920 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2921 ixgbe_irq_enable(adapter, true, true);
2922 return IRQ_NONE; /* Not our interrupt */
2925 if (eicr & IXGBE_EICR_LSC)
2926 ixgbe_check_lsc(adapter);
2928 switch (hw->mac.type) {
2929 case ixgbe_mac_82599EB:
2930 ixgbe_check_sfp_event(adapter, eicr);
2932 case ixgbe_mac_X540:
2933 if (eicr & IXGBE_EICR_ECC) {
2934 e_info(link, "Received ECC Err, initiating reset\n");
2935 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2936 ixgbe_service_event_schedule(adapter);
2937 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2939 ixgbe_check_overtemp_event(adapter, eicr);
2945 ixgbe_check_fan_failure(adapter, eicr);
2946 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2947 ixgbe_ptp_check_pps_event(adapter, eicr);
2949 /* would disable interrupts here but EIAM disabled it */
2950 napi_schedule(&q_vector->napi);
2953 * re-enable link(maybe) and non-queue interrupts, no flush.
2954 * ixgbe_poll will re-enable the queue interrupts
2956 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2957 ixgbe_irq_enable(adapter, false, false);
2963 * ixgbe_request_irq - initialize interrupts
2964 * @adapter: board private structure
2966 * Attempts to configure interrupts using the best available
2967 * capabilities of the hardware and kernel.
2969 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2971 struct net_device *netdev = adapter->netdev;
2974 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2975 err = ixgbe_request_msix_irqs(adapter);
2976 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2977 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2978 netdev->name, adapter);
2980 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2981 netdev->name, adapter);
2984 e_err(probe, "request_irq failed, Error %d\n", err);
2989 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2993 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2994 free_irq(adapter->pdev->irq, adapter);
2998 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2999 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3000 struct msix_entry *entry = &adapter->msix_entries[vector];
3002 /* free only the irqs that were actually requested */
3003 if (!q_vector->rx.ring && !q_vector->tx.ring)
3006 /* clear the affinity_mask in the IRQ descriptor */
3007 irq_set_affinity_hint(entry->vector, NULL);
3009 free_irq(entry->vector, q_vector);
3012 free_irq(adapter->msix_entries[vector++].vector, adapter);
3016 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3017 * @adapter: board private structure
3019 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3021 switch (adapter->hw.mac.type) {
3022 case ixgbe_mac_82598EB:
3023 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3025 case ixgbe_mac_82599EB:
3026 case ixgbe_mac_X540:
3027 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3028 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3029 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3034 IXGBE_WRITE_FLUSH(&adapter->hw);
3035 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3038 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3039 synchronize_irq(adapter->msix_entries[vector].vector);
3041 synchronize_irq(adapter->msix_entries[vector++].vector);
3043 synchronize_irq(adapter->pdev->irq);
3048 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3051 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3053 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3055 ixgbe_write_eitr(q_vector);
3057 ixgbe_set_ivar(adapter, 0, 0, 0);
3058 ixgbe_set_ivar(adapter, 1, 0, 0);
3060 e_info(hw, "Legacy interrupt IVAR setup done\n");
3064 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3065 * @adapter: board private structure
3066 * @ring: structure containing ring specific data
3068 * Configure the Tx descriptor ring after a reset.
3070 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3071 struct ixgbe_ring *ring)
3073 struct ixgbe_hw *hw = &adapter->hw;
3074 u64 tdba = ring->dma;
3076 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3077 u8 reg_idx = ring->reg_idx;
3079 /* disable queue to avoid issues while updating state */
3080 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3081 IXGBE_WRITE_FLUSH(hw);
3083 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3084 (tdba & DMA_BIT_MASK(32)));
3085 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3086 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3087 ring->count * sizeof(union ixgbe_adv_tx_desc));
3088 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3089 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3090 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3093 * set WTHRESH to encourage burst writeback, it should not be set
3094 * higher than 1 when:
3095 * - ITR is 0 as it could cause false TX hangs
3096 * - ITR is set to > 100k int/sec and BQL is enabled
3098 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3099 * to or less than the number of on chip descriptors, which is
3102 #if IS_ENABLED(CONFIG_BQL)
3103 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3105 if (!ring->q_vector || (ring->q_vector->itr < 8))
3107 txdctl |= (1 << 16); /* WTHRESH = 1 */
3109 txdctl |= (8 << 16); /* WTHRESH = 8 */
3112 * Setting PTHRESH to 32 both improves performance
3113 * and avoids a TX hang with DFP enabled
3115 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3116 32; /* PTHRESH = 32 */
3118 /* reinitialize flowdirector state */
3119 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3120 ring->atr_sample_rate = adapter->atr_sample_rate;
3121 ring->atr_count = 0;
3122 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3124 ring->atr_sample_rate = 0;
3127 /* initialize XPS */
3128 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3129 struct ixgbe_q_vector *q_vector = ring->q_vector;
3132 netif_set_xps_queue(ring->netdev,
3133 &q_vector->affinity_mask,
3137 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3140 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3142 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3143 if (hw->mac.type == ixgbe_mac_82598EB &&
3144 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3147 /* poll to verify queue is enabled */
3149 usleep_range(1000, 2000);
3150 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3151 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3153 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3156 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3158 struct ixgbe_hw *hw = &adapter->hw;
3160 u8 tcs = netdev_get_num_tc(adapter->netdev);
3162 if (hw->mac.type == ixgbe_mac_82598EB)
3165 /* disable the arbiter while setting MTQC */
3166 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3167 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3168 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3170 /* set transmit pool layout */
3171 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3172 mtqc = IXGBE_MTQC_VT_ENA;
3174 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3176 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3177 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3178 mtqc |= IXGBE_MTQC_32VF;
3180 mtqc |= IXGBE_MTQC_64VF;
3183 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3185 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3187 mtqc = IXGBE_MTQC_64Q_1PB;
3190 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3192 /* Enable Security TX Buffer IFG for multiple pb */
3194 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3195 sectx |= IXGBE_SECTX_DCB;
3196 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3199 /* re-enable the arbiter */
3200 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3201 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3205 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3206 * @adapter: board private structure
3208 * Configure the Tx unit of the MAC after a reset.
3210 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3212 struct ixgbe_hw *hw = &adapter->hw;
3216 ixgbe_setup_mtqc(adapter);
3218 if (hw->mac.type != ixgbe_mac_82598EB) {
3219 /* DMATXCTL.EN must be before Tx queues are enabled */
3220 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3221 dmatxctl |= IXGBE_DMATXCTL_TE;
3222 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3225 /* Setup the HW Tx Head and Tail descriptor pointers */
3226 for (i = 0; i < adapter->num_tx_queues; i++)
3227 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3230 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3231 struct ixgbe_ring *ring)
3233 struct ixgbe_hw *hw = &adapter->hw;
3234 u8 reg_idx = ring->reg_idx;
3235 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3237 srrctl |= IXGBE_SRRCTL_DROP_EN;
3239 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3242 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3243 struct ixgbe_ring *ring)
3245 struct ixgbe_hw *hw = &adapter->hw;
3246 u8 reg_idx = ring->reg_idx;
3247 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3249 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3251 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3254 #ifdef CONFIG_IXGBE_DCB
3255 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3257 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3261 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3263 if (adapter->ixgbe_ieee_pfc)
3264 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3267 * We should set the drop enable bit if:
3270 * Number of Rx queues > 1 and flow control is disabled
3272 * This allows us to avoid head of line blocking for security
3273 * and performance reasons.
3275 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3276 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3277 for (i = 0; i < adapter->num_rx_queues; i++)
3278 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3280 for (i = 0; i < adapter->num_rx_queues; i++)
3281 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3285 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3287 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3288 struct ixgbe_ring *rx_ring)
3290 struct ixgbe_hw *hw = &adapter->hw;
3292 u8 reg_idx = rx_ring->reg_idx;
3294 if (hw->mac.type == ixgbe_mac_82598EB) {
3295 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3298 * if VMDq is not active we must program one srrctl register
3299 * per RSS queue since we have enabled RDRXCTL.MVMEN
3304 /* configure header buffer length, needed for RSC */
3305 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3307 /* configure the packet buffer length */
3308 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3310 /* configure descriptor type */
3311 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3313 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3316 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3318 struct ixgbe_hw *hw = &adapter->hw;
3319 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
3320 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
3321 0x6A3E67EA, 0x14364D17, 0x3BED200D};
3322 u32 mrqc = 0, reta = 0;
3325 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3328 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3329 * make full use of any rings they may have. We will use the
3330 * PSRTYPE register to control how many rings we use within the PF.
3332 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3335 /* Fill out hash function seeds */
3336 for (i = 0; i < 10; i++)
3337 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
3339 /* Fill out redirection table */
3340 for (i = 0, j = 0; i < 128; i++, j++) {
3343 /* reta = 4-byte sliding window of
3344 * 0x00..(indices-1)(indices-1)00..etc. */
3345 reta = (reta << 8) | (j * 0x11);
3347 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3350 /* Disable indicating checksum in descriptor, enables RSS hash */
3351 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3352 rxcsum |= IXGBE_RXCSUM_PCSD;
3353 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3355 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3356 if (adapter->ring_feature[RING_F_RSS].mask)
3357 mrqc = IXGBE_MRQC_RSSEN;
3359 u8 tcs = netdev_get_num_tc(adapter->netdev);
3361 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3363 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3365 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3366 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3367 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3369 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3372 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3374 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3376 mrqc = IXGBE_MRQC_RSSEN;
3380 /* Perform hash on these packet types */
3381 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3382 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3383 IXGBE_MRQC_RSS_FIELD_IPV6 |
3384 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3386 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3387 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3388 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3389 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3391 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3395 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3396 * @adapter: address of board private structure
3397 * @index: index of ring to set
3399 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3400 struct ixgbe_ring *ring)
3402 struct ixgbe_hw *hw = &adapter->hw;
3404 u8 reg_idx = ring->reg_idx;
3406 if (!ring_is_rsc_enabled(ring))
3409 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3410 rscctrl |= IXGBE_RSCCTL_RSCEN;
3412 * we must limit the number of descriptors so that the
3413 * total size of max desc * buf_len is not greater
3416 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3417 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3420 #define IXGBE_MAX_RX_DESC_POLL 10
3421 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3422 struct ixgbe_ring *ring)
3424 struct ixgbe_hw *hw = &adapter->hw;
3425 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3427 u8 reg_idx = ring->reg_idx;
3429 if (ixgbe_removed(hw->hw_addr))
3431 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3432 if (hw->mac.type == ixgbe_mac_82598EB &&
3433 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3437 usleep_range(1000, 2000);
3438 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3439 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3442 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3443 "the polling period\n", reg_idx);
3447 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3448 struct ixgbe_ring *ring)
3450 struct ixgbe_hw *hw = &adapter->hw;
3451 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3453 u8 reg_idx = ring->reg_idx;
3455 if (ixgbe_removed(hw->hw_addr))
3457 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3458 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3460 /* write value back with RXDCTL.ENABLE bit cleared */
3461 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3463 if (hw->mac.type == ixgbe_mac_82598EB &&
3464 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3467 /* the hardware may take up to 100us to really disable the rx queue */
3470 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3471 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3474 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3475 "the polling period\n", reg_idx);
3479 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3480 struct ixgbe_ring *ring)
3482 struct ixgbe_hw *hw = &adapter->hw;
3483 u64 rdba = ring->dma;
3485 u8 reg_idx = ring->reg_idx;
3487 /* disable queue to avoid issues while updating state */
3488 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3489 ixgbe_disable_rx_queue(adapter, ring);
3491 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3492 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3493 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3494 ring->count * sizeof(union ixgbe_adv_rx_desc));
3495 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3496 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3497 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3499 ixgbe_configure_srrctl(adapter, ring);
3500 ixgbe_configure_rscctl(adapter, ring);
3502 if (hw->mac.type == ixgbe_mac_82598EB) {
3504 * enable cache line friendly hardware writes:
3505 * PTHRESH=32 descriptors (half the internal cache),
3506 * this also removes ugly rx_no_buffer_count increment
3507 * HTHRESH=4 descriptors (to minimize latency on fetch)
3508 * WTHRESH=8 burst writeback up to two cache lines
3510 rxdctl &= ~0x3FFFFF;
3514 /* enable receive descriptor ring */
3515 rxdctl |= IXGBE_RXDCTL_ENABLE;
3516 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3518 ixgbe_rx_desc_queue_enable(adapter, ring);
3519 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3522 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3524 struct ixgbe_hw *hw = &adapter->hw;
3525 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3528 /* PSRTYPE must be initialized in non 82598 adapters */
3529 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3530 IXGBE_PSRTYPE_UDPHDR |
3531 IXGBE_PSRTYPE_IPV4HDR |
3532 IXGBE_PSRTYPE_L2HDR |
3533 IXGBE_PSRTYPE_IPV6HDR;
3535 if (hw->mac.type == ixgbe_mac_82598EB)
3543 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3544 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3547 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3549 struct ixgbe_hw *hw = &adapter->hw;
3550 u32 reg_offset, vf_shift;
3551 u32 gcr_ext, vmdctl;
3554 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3557 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3558 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3559 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3560 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3561 vmdctl |= IXGBE_VT_CTL_REPLEN;
3562 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3564 vf_shift = VMDQ_P(0) % 32;
3565 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3567 /* Enable only the PF's pool for Tx/Rx */
3568 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3569 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3570 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3571 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3572 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
3573 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3575 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3576 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3579 * Set up VF register offsets for selected VT Mode,
3580 * i.e. 32 or 64 VFs for SR-IOV
3582 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3583 case IXGBE_82599_VMDQ_8Q_MASK:
3584 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3586 case IXGBE_82599_VMDQ_4Q_MASK:
3587 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3590 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3594 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3597 /* Enable MAC Anti-Spoofing */
3598 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3600 /* For VFs that have spoof checking turned off */
3601 for (i = 0; i < adapter->num_vfs; i++) {
3602 if (!adapter->vfinfo[i].spoofchk_enabled)
3603 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3607 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3609 struct ixgbe_hw *hw = &adapter->hw;
3610 struct net_device *netdev = adapter->netdev;
3611 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3612 struct ixgbe_ring *rx_ring;
3617 /* adjust max frame to be able to do baby jumbo for FCoE */
3618 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3619 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3620 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3622 #endif /* IXGBE_FCOE */
3624 /* adjust max frame to be at least the size of a standard frame */
3625 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3626 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3628 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3629 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3630 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3631 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3633 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3636 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3637 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3638 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3639 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3642 * Setup the HW Rx Head and Tail Descriptor Pointers and
3643 * the Base and Length of the Rx Descriptor Ring
3645 for (i = 0; i < adapter->num_rx_queues; i++) {
3646 rx_ring = adapter->rx_ring[i];
3647 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3648 set_ring_rsc_enabled(rx_ring);
3650 clear_ring_rsc_enabled(rx_ring);
3654 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3656 struct ixgbe_hw *hw = &adapter->hw;
3657 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3659 switch (hw->mac.type) {
3660 case ixgbe_mac_82598EB:
3662 * For VMDq support of different descriptor types or
3663 * buffer sizes through the use of multiple SRRCTL
3664 * registers, RDRXCTL.MVMEN must be set to 1
3666 * also, the manual doesn't mention it clearly but DCA hints
3667 * will only use queue 0's tags unless this bit is set. Side
3668 * effects of setting this bit are only that SRRCTL must be
3669 * fully programmed [0..15]
3671 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3673 case ixgbe_mac_82599EB:
3674 case ixgbe_mac_X540:
3675 /* Disable RSC for ACK packets */
3676 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3677 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3678 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3679 /* hardware requires some bits to be set by default */
3680 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3681 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3684 /* We should do nothing since we don't know this hardware */
3688 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3692 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3693 * @adapter: board private structure
3695 * Configure the Rx unit of the MAC after a reset.
3697 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3699 struct ixgbe_hw *hw = &adapter->hw;
3703 /* disable receives while setting up the descriptors */
3704 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3705 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3707 ixgbe_setup_psrtype(adapter);
3708 ixgbe_setup_rdrxctl(adapter);
3711 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3712 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3713 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3714 rfctl |= IXGBE_RFCTL_RSC_DIS;
3715 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3717 /* Program registers for the distribution of queues */
3718 ixgbe_setup_mrqc(adapter);
3720 /* set_rx_buffer_len must be called before ring initialization */
3721 ixgbe_set_rx_buffer_len(adapter);
3724 * Setup the HW Rx Head and Tail Descriptor Pointers and
3725 * the Base and Length of the Rx Descriptor Ring
3727 for (i = 0; i < adapter->num_rx_queues; i++)
3728 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3730 /* disable drop enable for 82598 parts */
3731 if (hw->mac.type == ixgbe_mac_82598EB)
3732 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3734 /* enable all receives */
3735 rxctrl |= IXGBE_RXCTRL_RXEN;
3736 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3739 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3740 __be16 proto, u16 vid)
3742 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3743 struct ixgbe_hw *hw = &adapter->hw;
3745 /* add VID to filter table */
3746 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3747 set_bit(vid, adapter->active_vlans);
3752 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3753 __be16 proto, u16 vid)
3755 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3756 struct ixgbe_hw *hw = &adapter->hw;
3758 /* remove VID from filter table */
3759 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3760 clear_bit(vid, adapter->active_vlans);
3766 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3767 * @adapter: driver data
3769 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3771 struct ixgbe_hw *hw = &adapter->hw;
3775 switch (hw->mac.type) {
3776 case ixgbe_mac_82598EB:
3777 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3778 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3779 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3781 case ixgbe_mac_82599EB:
3782 case ixgbe_mac_X540:
3783 for (i = 0; i < adapter->num_rx_queues; i++) {
3784 struct ixgbe_ring *ring = adapter->rx_ring[i];
3786 if (ring->l2_accel_priv)
3789 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3790 vlnctrl &= ~IXGBE_RXDCTL_VME;
3791 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3800 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3801 * @adapter: driver data
3803 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3805 struct ixgbe_hw *hw = &adapter->hw;
3809 switch (hw->mac.type) {
3810 case ixgbe_mac_82598EB:
3811 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3812 vlnctrl |= IXGBE_VLNCTRL_VME;
3813 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3815 case ixgbe_mac_82599EB:
3816 case ixgbe_mac_X540:
3817 for (i = 0; i < adapter->num_rx_queues; i++) {
3818 struct ixgbe_ring *ring = adapter->rx_ring[i];
3820 if (ring->l2_accel_priv)
3823 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3824 vlnctrl |= IXGBE_RXDCTL_VME;
3825 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3833 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3837 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3839 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3840 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3844 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3845 * @netdev: network interface device structure
3847 * Writes multicast address list to the MTA hash table.
3848 * Returns: -ENOMEM on failure
3849 * 0 on no addresses written
3850 * X on writing X addresses to MTA
3852 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
3854 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3855 struct ixgbe_hw *hw = &adapter->hw;
3857 if (!netif_running(netdev))
3860 if (hw->mac.ops.update_mc_addr_list)
3861 hw->mac.ops.update_mc_addr_list(hw, netdev);
3865 #ifdef CONFIG_PCI_IOV
3866 ixgbe_restore_vf_multicasts(adapter);
3869 return netdev_mc_count(netdev);
3872 #ifdef CONFIG_PCI_IOV
3873 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
3875 struct ixgbe_hw *hw = &adapter->hw;
3877 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3878 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
3879 hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
3880 adapter->mac_table[i].queue,
3883 hw->mac.ops.clear_rar(hw, i);
3885 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
3890 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
3892 struct ixgbe_hw *hw = &adapter->hw;
3894 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3895 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
3896 if (adapter->mac_table[i].state &
3897 IXGBE_MAC_STATE_IN_USE)
3898 hw->mac.ops.set_rar(hw, i,
3899 adapter->mac_table[i].addr,
3900 adapter->mac_table[i].queue,
3903 hw->mac.ops.clear_rar(hw, i);
3905 adapter->mac_table[i].state &=
3906 ~(IXGBE_MAC_STATE_MODIFIED);
3911 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
3914 struct ixgbe_hw *hw = &adapter->hw;
3916 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3917 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
3918 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
3919 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
3920 adapter->mac_table[i].queue = 0;
3922 ixgbe_sync_mac_table(adapter);
3925 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
3927 struct ixgbe_hw *hw = &adapter->hw;
3930 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3931 if (adapter->mac_table[i].state == 0)
3937 /* this function destroys the first RAR entry */
3938 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
3941 struct ixgbe_hw *hw = &adapter->hw;
3943 memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
3944 adapter->mac_table[0].queue = VMDQ_P(0);
3945 adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
3946 IXGBE_MAC_STATE_IN_USE);
3947 hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
3948 adapter->mac_table[0].queue,
3952 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
3954 struct ixgbe_hw *hw = &adapter->hw;
3957 if (is_zero_ether_addr(addr))
3960 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3961 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
3963 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
3964 IXGBE_MAC_STATE_IN_USE);
3965 ether_addr_copy(adapter->mac_table[i].addr, addr);
3966 adapter->mac_table[i].queue = queue;
3967 ixgbe_sync_mac_table(adapter);
3973 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
3975 /* search table for addr, if found, set to 0 and sync */
3977 struct ixgbe_hw *hw = &adapter->hw;
3979 if (is_zero_ether_addr(addr))
3982 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3983 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
3984 adapter->mac_table[i].queue == queue) {
3985 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
3986 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
3987 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
3988 adapter->mac_table[i].queue = 0;
3989 ixgbe_sync_mac_table(adapter);
3996 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3997 * @netdev: network interface device structure
3999 * Writes unicast address list to the RAR table.
4000 * Returns: -ENOMEM on failure/insufficient address space
4001 * 0 on no addresses written
4002 * X on writing X addresses to the RAR table
4004 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4006 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4009 /* return ENOMEM indicating insufficient memory for addresses */
4010 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4013 if (!netdev_uc_empty(netdev)) {
4014 struct netdev_hw_addr *ha;
4015 netdev_for_each_uc_addr(ha, netdev) {
4016 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4017 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4025 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4026 * @netdev: network interface device structure
4028 * The set_rx_method entry point is called whenever the unicast/multicast
4029 * address list or the network interface flags are updated. This routine is
4030 * responsible for configuring the hardware for proper unicast, multicast and
4033 void ixgbe_set_rx_mode(struct net_device *netdev)
4035 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4036 struct ixgbe_hw *hw = &adapter->hw;
4037 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4041 /* Check for Promiscuous and All Multicast modes */
4042 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4043 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4045 /* set all bits that we expect to always be set */
4046 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4047 fctrl |= IXGBE_FCTRL_BAM;
4048 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4049 fctrl |= IXGBE_FCTRL_PMCF;
4051 /* clear the bits we are changing the status of */
4052 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4053 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4054 if (netdev->flags & IFF_PROMISC) {
4055 hw->addr_ctrl.user_set_promisc = true;
4056 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4057 vmolr |= IXGBE_VMOLR_MPE;
4058 /* Only disable hardware filter vlans in promiscuous mode
4059 * if SR-IOV and VMDQ are disabled - otherwise ensure
4060 * that hardware VLAN filters remain enabled.
4062 if (!(adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4063 IXGBE_FLAG_SRIOV_ENABLED)))
4064 vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4066 if (netdev->flags & IFF_ALLMULTI) {
4067 fctrl |= IXGBE_FCTRL_MPE;
4068 vmolr |= IXGBE_VMOLR_MPE;
4070 vlnctrl |= IXGBE_VLNCTRL_VFE;
4071 hw->addr_ctrl.user_set_promisc = false;
4075 * Write addresses to available RAR registers, if there is not
4076 * sufficient space to store all the addresses then enable
4077 * unicast promiscuous mode
4079 count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4081 fctrl |= IXGBE_FCTRL_UPE;
4082 vmolr |= IXGBE_VMOLR_ROPE;
4085 /* Write addresses to the MTA, if the attempt fails
4086 * then we should just turn on promiscuous mode so
4087 * that we can at least receive multicast traffic
4089 count = ixgbe_write_mc_addr_list(netdev);
4091 fctrl |= IXGBE_FCTRL_MPE;
4092 vmolr |= IXGBE_VMOLR_MPE;
4094 vmolr |= IXGBE_VMOLR_ROMPE;
4097 if (hw->mac.type != ixgbe_mac_82598EB) {
4098 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4099 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4101 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4104 /* This is useful for sniffing bad packets. */
4105 if (adapter->netdev->features & NETIF_F_RXALL) {
4106 /* UPE and MPE will be handled by normal PROMISC logic
4107 * in e1000e_set_rx_mode */
4108 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4109 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4110 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4112 fctrl &= ~(IXGBE_FCTRL_DPF);
4113 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4116 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4117 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4119 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4120 ixgbe_vlan_strip_enable(adapter);
4122 ixgbe_vlan_strip_disable(adapter);
4125 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4129 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4130 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4131 napi_enable(&adapter->q_vector[q_idx]->napi);
4135 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4139 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4140 napi_disable(&adapter->q_vector[q_idx]->napi);
4141 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4142 pr_info("QV %d locked\n", q_idx);
4143 usleep_range(1000, 20000);
4148 #ifdef CONFIG_IXGBE_DCB
4150 * ixgbe_configure_dcb - Configure DCB hardware
4151 * @adapter: ixgbe adapter struct
4153 * This is called by the driver on open to configure the DCB hardware.
4154 * This is also called by the gennetlink interface when reconfiguring
4157 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4159 struct ixgbe_hw *hw = &adapter->hw;
4160 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4162 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4163 if (hw->mac.type == ixgbe_mac_82598EB)
4164 netif_set_gso_max_size(adapter->netdev, 65536);
4168 if (hw->mac.type == ixgbe_mac_82598EB)
4169 netif_set_gso_max_size(adapter->netdev, 32768);
4172 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4173 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4176 /* reconfigure the hardware */
4177 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4178 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4180 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4182 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4183 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4184 ixgbe_dcb_hw_ets(&adapter->hw,
4185 adapter->ixgbe_ieee_ets,
4187 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4188 adapter->ixgbe_ieee_pfc->pfc_en,
4189 adapter->ixgbe_ieee_ets->prio_tc);
4192 /* Enable RSS Hash per TC */
4193 if (hw->mac.type != ixgbe_mac_82598EB) {
4195 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4202 /* write msb to all 8 TCs in one write */
4203 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4208 /* Additional bittime to account for IXGBE framing */
4209 #define IXGBE_ETH_FRAMING 20
4212 * ixgbe_hpbthresh - calculate high water mark for flow control
4214 * @adapter: board private structure to calculate for
4215 * @pb: packet buffer to calculate
4217 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4219 struct ixgbe_hw *hw = &adapter->hw;
4220 struct net_device *dev = adapter->netdev;
4221 int link, tc, kb, marker;
4224 /* Calculate max LAN frame size */
4225 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4228 /* FCoE traffic class uses FCOE jumbo frames */
4229 if ((dev->features & NETIF_F_FCOE_MTU) &&
4230 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4231 (pb == ixgbe_fcoe_get_tc(adapter)))
4232 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4235 /* Calculate delay value for device */
4236 switch (hw->mac.type) {
4237 case ixgbe_mac_X540:
4238 dv_id = IXGBE_DV_X540(link, tc);
4241 dv_id = IXGBE_DV(link, tc);
4245 /* Loopback switch introduces additional latency */
4246 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4247 dv_id += IXGBE_B2BT(tc);
4249 /* Delay value is calculated in bit times convert to KB */
4250 kb = IXGBE_BT2KB(dv_id);
4251 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4253 marker = rx_pba - kb;
4255 /* It is possible that the packet buffer is not large enough
4256 * to provide required headroom. In this case throw an error
4257 * to user and a do the best we can.
4260 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4261 "headroom to support flow control."
4262 "Decrease MTU or number of traffic classes\n", pb);
4270 * ixgbe_lpbthresh - calculate low water mark for for flow control
4272 * @adapter: board private structure to calculate for
4273 * @pb: packet buffer to calculate
4275 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4277 struct ixgbe_hw *hw = &adapter->hw;
4278 struct net_device *dev = adapter->netdev;
4282 /* Calculate max LAN frame size */
4283 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4286 /* FCoE traffic class uses FCOE jumbo frames */
4287 if ((dev->features & NETIF_F_FCOE_MTU) &&
4288 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4289 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4290 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4293 /* Calculate delay value for device */
4294 switch (hw->mac.type) {
4295 case ixgbe_mac_X540:
4296 dv_id = IXGBE_LOW_DV_X540(tc);
4299 dv_id = IXGBE_LOW_DV(tc);
4303 /* Delay value is calculated in bit times convert to KB */
4304 return IXGBE_BT2KB(dv_id);
4308 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4310 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4312 struct ixgbe_hw *hw = &adapter->hw;
4313 int num_tc = netdev_get_num_tc(adapter->netdev);
4319 for (i = 0; i < num_tc; i++) {
4320 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4321 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4323 /* Low water marks must not be larger than high water marks */
4324 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4325 hw->fc.low_water[i] = 0;
4328 for (; i < MAX_TRAFFIC_CLASS; i++)
4329 hw->fc.high_water[i] = 0;
4332 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4334 struct ixgbe_hw *hw = &adapter->hw;
4336 u8 tc = netdev_get_num_tc(adapter->netdev);
4338 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4339 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4340 hdrm = 32 << adapter->fdir_pballoc;
4344 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4345 ixgbe_pbthresh_setup(adapter);
4348 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4350 struct ixgbe_hw *hw = &adapter->hw;
4351 struct hlist_node *node2;
4352 struct ixgbe_fdir_filter *filter;
4354 spin_lock(&adapter->fdir_perfect_lock);
4356 if (!hlist_empty(&adapter->fdir_filter_list))
4357 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4359 hlist_for_each_entry_safe(filter, node2,
4360 &adapter->fdir_filter_list, fdir_node) {
4361 ixgbe_fdir_write_perfect_filter_82599(hw,
4364 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4365 IXGBE_FDIR_DROP_QUEUE :
4366 adapter->rx_ring[filter->action]->reg_idx);
4369 spin_unlock(&adapter->fdir_perfect_lock);
4372 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4373 struct ixgbe_adapter *adapter)
4375 struct ixgbe_hw *hw = &adapter->hw;
4378 /* No unicast promiscuous support for VMDQ devices. */
4379 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4380 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4382 /* clear the affected bit */
4383 vmolr &= ~IXGBE_VMOLR_MPE;
4385 if (dev->flags & IFF_ALLMULTI) {
4386 vmolr |= IXGBE_VMOLR_MPE;
4388 vmolr |= IXGBE_VMOLR_ROMPE;
4389 hw->mac.ops.update_mc_addr_list(hw, dev);
4391 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4392 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4395 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4397 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4398 int rss_i = adapter->num_rx_queues_per_pool;
4399 struct ixgbe_hw *hw = &adapter->hw;
4400 u16 pool = vadapter->pool;
4401 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4402 IXGBE_PSRTYPE_UDPHDR |
4403 IXGBE_PSRTYPE_IPV4HDR |
4404 IXGBE_PSRTYPE_L2HDR |
4405 IXGBE_PSRTYPE_IPV6HDR;
4407 if (hw->mac.type == ixgbe_mac_82598EB)
4415 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4419 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4420 * @rx_ring: ring to free buffers from
4422 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4424 struct device *dev = rx_ring->dev;
4428 /* ring already cleared, nothing to do */
4429 if (!rx_ring->rx_buffer_info)
4432 /* Free all the Rx ring sk_buffs */
4433 for (i = 0; i < rx_ring->count; i++) {
4434 struct ixgbe_rx_buffer *rx_buffer;
4436 rx_buffer = &rx_ring->rx_buffer_info[i];
4437 if (rx_buffer->skb) {
4438 struct sk_buff *skb = rx_buffer->skb;
4439 if (IXGBE_CB(skb)->page_released) {
4442 ixgbe_rx_bufsz(rx_ring),
4444 IXGBE_CB(skb)->page_released = false;
4448 rx_buffer->skb = NULL;
4450 dma_unmap_page(dev, rx_buffer->dma,
4451 ixgbe_rx_pg_size(rx_ring),
4454 if (rx_buffer->page)
4455 __free_pages(rx_buffer->page,
4456 ixgbe_rx_pg_order(rx_ring));
4457 rx_buffer->page = NULL;
4460 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4461 memset(rx_ring->rx_buffer_info, 0, size);
4463 /* Zero out the descriptor ring */
4464 memset(rx_ring->desc, 0, rx_ring->size);
4466 rx_ring->next_to_alloc = 0;
4467 rx_ring->next_to_clean = 0;
4468 rx_ring->next_to_use = 0;
4471 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4472 struct ixgbe_ring *rx_ring)
4474 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4475 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4477 /* shutdown specific queue receive and wait for dma to settle */
4478 ixgbe_disable_rx_queue(adapter, rx_ring);
4479 usleep_range(10000, 20000);
4480 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4481 ixgbe_clean_rx_ring(rx_ring);
4482 rx_ring->l2_accel_priv = NULL;
4485 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4486 struct ixgbe_fwd_adapter *accel)
4488 struct ixgbe_adapter *adapter = accel->real_adapter;
4489 unsigned int rxbase = accel->rx_base_queue;
4490 unsigned int txbase = accel->tx_base_queue;
4493 netif_tx_stop_all_queues(vdev);
4495 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4496 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4497 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4500 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4501 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4502 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4509 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4510 struct ixgbe_fwd_adapter *accel)
4512 struct ixgbe_adapter *adapter = accel->real_adapter;
4513 unsigned int rxbase, txbase, queues;
4514 int i, baseq, err = 0;
4516 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4519 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4520 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4521 accel->pool, adapter->num_rx_pools,
4522 baseq, baseq + adapter->num_rx_queues_per_pool,
4523 adapter->fwd_bitmask);
4525 accel->netdev = vdev;
4526 accel->rx_base_queue = rxbase = baseq;
4527 accel->tx_base_queue = txbase = baseq;
4529 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4530 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4532 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4533 adapter->rx_ring[rxbase + i]->netdev = vdev;
4534 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4535 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4538 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4539 adapter->tx_ring[txbase + i]->netdev = vdev;
4540 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4543 queues = min_t(unsigned int,
4544 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4545 err = netif_set_real_num_tx_queues(vdev, queues);
4549 err = netif_set_real_num_rx_queues(vdev, queues);
4553 if (is_valid_ether_addr(vdev->dev_addr))
4554 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4556 ixgbe_fwd_psrtype(accel);
4557 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4560 ixgbe_fwd_ring_down(vdev, accel);
4564 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4566 struct net_device *upper;
4567 struct list_head *iter;
4570 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4571 if (netif_is_macvlan(upper)) {
4572 struct macvlan_dev *dfwd = netdev_priv(upper);
4573 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4575 if (dfwd->fwd_priv) {
4576 err = ixgbe_fwd_ring_up(upper, vadapter);
4584 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4586 struct ixgbe_hw *hw = &adapter->hw;
4588 ixgbe_configure_pb(adapter);
4589 #ifdef CONFIG_IXGBE_DCB
4590 ixgbe_configure_dcb(adapter);
4593 * We must restore virtualization before VLANs or else
4594 * the VLVF registers will not be populated
4596 ixgbe_configure_virtualization(adapter);
4598 ixgbe_set_rx_mode(adapter->netdev);
4599 ixgbe_restore_vlan(adapter);
4601 switch (hw->mac.type) {
4602 case ixgbe_mac_82599EB:
4603 case ixgbe_mac_X540:
4604 hw->mac.ops.disable_rx_buff(hw);
4610 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4611 ixgbe_init_fdir_signature_82599(&adapter->hw,
4612 adapter->fdir_pballoc);
4613 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4614 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4615 adapter->fdir_pballoc);
4616 ixgbe_fdir_filter_restore(adapter);
4619 switch (hw->mac.type) {
4620 case ixgbe_mac_82599EB:
4621 case ixgbe_mac_X540:
4622 hw->mac.ops.enable_rx_buff(hw);
4629 /* configure FCoE L2 filters, redirection table, and Rx control */
4630 ixgbe_configure_fcoe(adapter);
4632 #endif /* IXGBE_FCOE */
4633 ixgbe_configure_tx(adapter);
4634 ixgbe_configure_rx(adapter);
4635 ixgbe_configure_dfwd(adapter);
4638 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
4640 switch (hw->phy.type) {
4641 case ixgbe_phy_sfp_avago:
4642 case ixgbe_phy_sfp_ftl:
4643 case ixgbe_phy_sfp_intel:
4644 case ixgbe_phy_sfp_unknown:
4645 case ixgbe_phy_sfp_passive_tyco:
4646 case ixgbe_phy_sfp_passive_unknown:
4647 case ixgbe_phy_sfp_active_unknown:
4648 case ixgbe_phy_sfp_ftl_active:
4649 case ixgbe_phy_qsfp_passive_unknown:
4650 case ixgbe_phy_qsfp_active_unknown:
4651 case ixgbe_phy_qsfp_intel:
4652 case ixgbe_phy_qsfp_unknown:
4653 /* ixgbe_phy_none is set when no SFP module is present */
4654 case ixgbe_phy_none:
4657 if (hw->mac.type == ixgbe_mac_82598EB)
4665 * ixgbe_sfp_link_config - set up SFP+ link
4666 * @adapter: pointer to private adapter struct
4668 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4671 * We are assuming the worst case scenario here, and that
4672 * is that an SFP was inserted/removed after the reset
4673 * but before SFP detection was enabled. As such the best
4674 * solution is to just start searching as soon as we start
4676 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4677 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4679 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4683 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4684 * @hw: pointer to private hardware struct
4686 * Returns 0 on success, negative on failure
4688 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4691 bool autoneg, link_up = false;
4692 u32 ret = IXGBE_ERR_LINK_SETUP;
4694 if (hw->mac.ops.check_link)
4695 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4700 speed = hw->phy.autoneg_advertised;
4701 if ((!speed) && (hw->mac.ops.get_link_capabilities))
4702 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4707 if (hw->mac.ops.setup_link)
4708 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4713 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4715 struct ixgbe_hw *hw = &adapter->hw;
4718 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4719 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4721 gpie |= IXGBE_GPIE_EIAME;
4723 * use EIAM to auto-mask when MSI-X interrupt is asserted
4724 * this saves a register write for every interrupt
4726 switch (hw->mac.type) {
4727 case ixgbe_mac_82598EB:
4728 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4730 case ixgbe_mac_82599EB:
4731 case ixgbe_mac_X540:
4733 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4734 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4738 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4739 * specifically only auto mask tx and rx interrupts */
4740 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4743 /* XXX: to interrupt immediately for EICS writes, enable this */
4744 /* gpie |= IXGBE_GPIE_EIMEN; */
4746 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4747 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4749 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4750 case IXGBE_82599_VMDQ_8Q_MASK:
4751 gpie |= IXGBE_GPIE_VTMODE_16;
4753 case IXGBE_82599_VMDQ_4Q_MASK:
4754 gpie |= IXGBE_GPIE_VTMODE_32;
4757 gpie |= IXGBE_GPIE_VTMODE_64;
4762 /* Enable Thermal over heat sensor interrupt */
4763 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4764 switch (adapter->hw.mac.type) {
4765 case ixgbe_mac_82599EB:
4766 gpie |= IXGBE_SDP0_GPIEN;
4768 case ixgbe_mac_X540:
4769 gpie |= IXGBE_EIMS_TS;
4776 /* Enable fan failure interrupt */
4777 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4778 gpie |= IXGBE_SDP1_GPIEN;
4780 if (hw->mac.type == ixgbe_mac_82599EB) {
4781 gpie |= IXGBE_SDP1_GPIEN;
4782 gpie |= IXGBE_SDP2_GPIEN;
4785 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4788 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4790 struct ixgbe_hw *hw = &adapter->hw;
4794 ixgbe_get_hw_control(adapter);
4795 ixgbe_setup_gpie(adapter);
4797 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4798 ixgbe_configure_msix(adapter);
4800 ixgbe_configure_msi_and_legacy(adapter);
4802 /* enable the optics for 82599 SFP+ fiber */
4803 if (hw->mac.ops.enable_tx_laser)
4804 hw->mac.ops.enable_tx_laser(hw);
4806 smp_mb__before_atomic();
4807 clear_bit(__IXGBE_DOWN, &adapter->state);
4808 ixgbe_napi_enable_all(adapter);
4810 if (ixgbe_is_sfp(hw)) {
4811 ixgbe_sfp_link_config(adapter);
4813 err = ixgbe_non_sfp_link_config(hw);
4815 e_err(probe, "link_config FAILED %d\n", err);
4818 /* clear any pending interrupts, may auto mask */
4819 IXGBE_READ_REG(hw, IXGBE_EICR);
4820 ixgbe_irq_enable(adapter, true, true);
4823 * If this adapter has a fan, check to see if we had a failure
4824 * before we enabled the interrupt.
4826 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4827 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4828 if (esdp & IXGBE_ESDP_SDP1)
4829 e_crit(drv, "Fan has stopped, replace the adapter\n");
4832 /* bring the link up in the watchdog, this could race with our first
4833 * link up interrupt but shouldn't be a problem */
4834 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4835 adapter->link_check_timeout = jiffies;
4836 mod_timer(&adapter->service_timer, jiffies);
4838 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4839 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4840 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4841 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4844 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4846 WARN_ON(in_interrupt());
4847 /* put off any impending NetWatchDogTimeout */
4848 adapter->netdev->trans_start = jiffies;
4850 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4851 usleep_range(1000, 2000);
4852 ixgbe_down(adapter);
4854 * If SR-IOV enabled then wait a bit before bringing the adapter
4855 * back up to give the VFs time to respond to the reset. The
4856 * two second wait is based upon the watchdog timer cycle in
4859 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4862 clear_bit(__IXGBE_RESETTING, &adapter->state);
4865 void ixgbe_up(struct ixgbe_adapter *adapter)
4867 /* hardware has been reset, we need to reload some things */
4868 ixgbe_configure(adapter);
4870 ixgbe_up_complete(adapter);
4873 void ixgbe_reset(struct ixgbe_adapter *adapter)
4875 struct ixgbe_hw *hw = &adapter->hw;
4876 struct net_device *netdev = adapter->netdev;
4878 u8 old_addr[ETH_ALEN];
4880 if (ixgbe_removed(hw->hw_addr))
4882 /* lock SFP init bit to prevent race conditions with the watchdog */
4883 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4884 usleep_range(1000, 2000);
4886 /* clear all SFP and link config related flags while holding SFP_INIT */
4887 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4888 IXGBE_FLAG2_SFP_NEEDS_RESET);
4889 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4891 err = hw->mac.ops.init_hw(hw);
4894 case IXGBE_ERR_SFP_NOT_PRESENT:
4895 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4897 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4898 e_dev_err("master disable timed out\n");
4900 case IXGBE_ERR_EEPROM_VERSION:
4901 /* We are running on a pre-production device, log a warning */
4902 e_dev_warn("This device is a pre-production adapter/LOM. "
4903 "Please be aware there may be issues associated with "
4904 "your hardware. If you are experiencing problems "
4905 "please contact your Intel or hardware "
4906 "representative who provided you with this "
4910 e_dev_err("Hardware Error: %d\n", err);
4913 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4914 /* do not flush user set addresses */
4915 memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
4916 ixgbe_flush_sw_mac_table(adapter);
4917 ixgbe_mac_set_default_filter(adapter, old_addr);
4919 /* update SAN MAC vmdq pool selection */
4920 if (hw->mac.san_mac_rar_index)
4921 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
4923 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
4924 ixgbe_ptp_reset(adapter);
4928 * ixgbe_clean_tx_ring - Free Tx Buffers
4929 * @tx_ring: ring to be cleaned
4931 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4933 struct ixgbe_tx_buffer *tx_buffer_info;
4937 /* ring already cleared, nothing to do */
4938 if (!tx_ring->tx_buffer_info)
4941 /* Free all the Tx ring sk_buffs */
4942 for (i = 0; i < tx_ring->count; i++) {
4943 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4944 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4947 netdev_tx_reset_queue(txring_txq(tx_ring));
4949 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4950 memset(tx_ring->tx_buffer_info, 0, size);
4952 /* Zero out the descriptor ring */
4953 memset(tx_ring->desc, 0, tx_ring->size);
4955 tx_ring->next_to_use = 0;
4956 tx_ring->next_to_clean = 0;
4960 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4961 * @adapter: board private structure
4963 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4967 for (i = 0; i < adapter->num_rx_queues; i++)
4968 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4972 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4973 * @adapter: board private structure
4975 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4979 for (i = 0; i < adapter->num_tx_queues; i++)
4980 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4983 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4985 struct hlist_node *node2;
4986 struct ixgbe_fdir_filter *filter;
4988 spin_lock(&adapter->fdir_perfect_lock);
4990 hlist_for_each_entry_safe(filter, node2,
4991 &adapter->fdir_filter_list, fdir_node) {
4992 hlist_del(&filter->fdir_node);
4995 adapter->fdir_filter_count = 0;
4997 spin_unlock(&adapter->fdir_perfect_lock);
5000 void ixgbe_down(struct ixgbe_adapter *adapter)
5002 struct net_device *netdev = adapter->netdev;
5003 struct ixgbe_hw *hw = &adapter->hw;
5004 struct net_device *upper;
5005 struct list_head *iter;
5009 /* signal that we are down to the interrupt handler */
5010 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5011 return; /* do nothing if already down */
5013 /* disable receives */
5014 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
5015 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
5017 /* disable all enabled rx queues */
5018 for (i = 0; i < adapter->num_rx_queues; i++)
5019 /* this call also flushes the previous write */
5020 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5022 usleep_range(10000, 20000);
5024 netif_tx_stop_all_queues(netdev);
5026 /* call carrier off first to avoid false dev_watchdog timeouts */
5027 netif_carrier_off(netdev);
5028 netif_tx_disable(netdev);
5030 /* disable any upper devices */
5031 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5032 if (netif_is_macvlan(upper)) {
5033 struct macvlan_dev *vlan = netdev_priv(upper);
5035 if (vlan->fwd_priv) {
5036 netif_tx_stop_all_queues(upper);
5037 netif_carrier_off(upper);
5038 netif_tx_disable(upper);
5043 ixgbe_irq_disable(adapter);
5045 ixgbe_napi_disable_all(adapter);
5047 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5048 IXGBE_FLAG2_RESET_REQUESTED);
5049 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5051 del_timer_sync(&adapter->service_timer);
5053 if (adapter->num_vfs) {
5054 /* Clear EITR Select mapping */
5055 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5057 /* Mark all the VFs as inactive */
5058 for (i = 0 ; i < adapter->num_vfs; i++)
5059 adapter->vfinfo[i].clear_to_send = false;
5061 /* ping all the active vfs to let them know we are going down */
5062 ixgbe_ping_all_vfs(adapter);
5064 /* Disable all VFTE/VFRE TX/RX */
5065 ixgbe_disable_tx_rx(adapter);
5068 /* disable transmits in the hardware now that interrupts are off */
5069 for (i = 0; i < adapter->num_tx_queues; i++) {
5070 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5071 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5074 /* Disable the Tx DMA engine on 82599 and X540 */
5075 switch (hw->mac.type) {
5076 case ixgbe_mac_82599EB:
5077 case ixgbe_mac_X540:
5078 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5079 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5080 ~IXGBE_DMATXCTL_TE));
5086 if (!pci_channel_offline(adapter->pdev))
5087 ixgbe_reset(adapter);
5089 /* power down the optics for 82599 SFP+ fiber */
5090 if (hw->mac.ops.disable_tx_laser)
5091 hw->mac.ops.disable_tx_laser(hw);
5093 ixgbe_clean_all_tx_rings(adapter);
5094 ixgbe_clean_all_rx_rings(adapter);
5096 #ifdef CONFIG_IXGBE_DCA
5097 /* since we reset the hardware DCA settings were cleared */
5098 ixgbe_setup_dca(adapter);
5103 * ixgbe_tx_timeout - Respond to a Tx Hang
5104 * @netdev: network interface device structure
5106 static void ixgbe_tx_timeout(struct net_device *netdev)
5108 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5110 /* Do the reset outside of interrupt context */
5111 ixgbe_tx_timeout_reset(adapter);
5115 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5116 * @adapter: board private structure to initialize
5118 * ixgbe_sw_init initializes the Adapter private data structure.
5119 * Fields are initialized based on PCI device information and
5120 * OS network device settings (MTU size).
5122 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5124 struct ixgbe_hw *hw = &adapter->hw;
5125 struct pci_dev *pdev = adapter->pdev;
5126 unsigned int rss, fdir;
5128 #ifdef CONFIG_IXGBE_DCB
5130 struct tc_configuration *tc;
5133 /* PCI config space info */
5135 hw->vendor_id = pdev->vendor;
5136 hw->device_id = pdev->device;
5137 hw->revision_id = pdev->revision;
5138 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5139 hw->subsystem_device_id = pdev->subsystem_device;
5141 /* Set common capability flags and settings */
5142 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
5143 adapter->ring_feature[RING_F_RSS].limit = rss;
5144 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5145 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5146 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5147 adapter->atr_sample_rate = 20;
5148 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5149 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5150 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5151 #ifdef CONFIG_IXGBE_DCA
5152 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5155 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5156 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5157 #ifdef CONFIG_IXGBE_DCB
5158 /* Default traffic class to use for FCoE */
5159 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5160 #endif /* CONFIG_IXGBE_DCB */
5161 #endif /* IXGBE_FCOE */
5163 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5164 hw->mac.num_rar_entries,
5167 /* Set MAC specific capability flags and exceptions */
5168 switch (hw->mac.type) {
5169 case ixgbe_mac_82598EB:
5170 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5171 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5173 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5174 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5176 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5177 adapter->ring_feature[RING_F_FDIR].limit = 0;
5178 adapter->atr_sample_rate = 0;
5179 adapter->fdir_pballoc = 0;
5181 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5182 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5183 #ifdef CONFIG_IXGBE_DCB
5184 adapter->fcoe.up = 0;
5185 #endif /* IXGBE_DCB */
5186 #endif /* IXGBE_FCOE */
5188 case ixgbe_mac_82599EB:
5189 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5190 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5192 case ixgbe_mac_X540:
5193 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
5194 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5195 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5202 /* FCoE support exists, always init the FCoE lock */
5203 spin_lock_init(&adapter->fcoe.lock);
5206 /* n-tuple support exists, always init our spinlock */
5207 spin_lock_init(&adapter->fdir_perfect_lock);
5209 #ifdef CONFIG_IXGBE_DCB
5210 switch (hw->mac.type) {
5211 case ixgbe_mac_X540:
5212 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5213 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5216 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5217 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5221 /* Configure DCB traffic classes */
5222 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5223 tc = &adapter->dcb_cfg.tc_config[j];
5224 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5225 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5226 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5227 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5228 tc->dcb_pfc = pfc_disabled;
5231 /* Initialize default user to priority mapping, UPx->TC0 */
5232 tc = &adapter->dcb_cfg.tc_config[0];
5233 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5234 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5236 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5237 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5238 adapter->dcb_cfg.pfc_mode_enable = false;
5239 adapter->dcb_set_bitmap = 0x00;
5240 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5241 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5242 sizeof(adapter->temp_dcb_cfg));
5246 /* default flow control settings */
5247 hw->fc.requested_mode = ixgbe_fc_full;
5248 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5249 ixgbe_pbthresh_setup(adapter);
5250 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5251 hw->fc.send_xon = true;
5252 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5254 #ifdef CONFIG_PCI_IOV
5256 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5258 /* assign number of SR-IOV VFs */
5259 if (hw->mac.type != ixgbe_mac_82598EB) {
5260 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5261 adapter->num_vfs = 0;
5262 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5264 adapter->num_vfs = max_vfs;
5267 #endif /* CONFIG_PCI_IOV */
5269 /* enable itr by default in dynamic mode */
5270 adapter->rx_itr_setting = 1;
5271 adapter->tx_itr_setting = 1;
5273 /* set default ring sizes */
5274 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5275 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5277 /* set default work limits */
5278 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5280 /* initialize eeprom parameters */
5281 if (ixgbe_init_eeprom_params_generic(hw)) {
5282 e_dev_err("EEPROM initialization failed\n");
5286 /* PF holds first pool slot */
5287 set_bit(0, &adapter->fwd_bitmask);
5288 set_bit(__IXGBE_DOWN, &adapter->state);
5294 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5295 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5297 * Return 0 on success, negative on failure
5299 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5301 struct device *dev = tx_ring->dev;
5302 int orig_node = dev_to_node(dev);
5306 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5308 if (tx_ring->q_vector)
5309 numa_node = tx_ring->q_vector->numa_node;
5311 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
5312 if (!tx_ring->tx_buffer_info)
5313 tx_ring->tx_buffer_info = vzalloc(size);
5314 if (!tx_ring->tx_buffer_info)
5317 u64_stats_init(&tx_ring->syncp);
5319 /* round up to nearest 4K */
5320 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5321 tx_ring->size = ALIGN(tx_ring->size, 4096);
5323 set_dev_node(dev, numa_node);
5324 tx_ring->desc = dma_alloc_coherent(dev,
5328 set_dev_node(dev, orig_node);
5330 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5331 &tx_ring->dma, GFP_KERNEL);
5335 tx_ring->next_to_use = 0;
5336 tx_ring->next_to_clean = 0;
5340 vfree(tx_ring->tx_buffer_info);
5341 tx_ring->tx_buffer_info = NULL;
5342 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5347 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5348 * @adapter: board private structure
5350 * If this function returns with an error, then it's possible one or
5351 * more of the rings is populated (while the rest are not). It is the
5352 * callers duty to clean those orphaned rings.
5354 * Return 0 on success, negative on failure
5356 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5360 for (i = 0; i < adapter->num_tx_queues; i++) {
5361 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5365 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5371 /* rewind the index freeing the rings as we go */
5373 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5378 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5379 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5381 * Returns 0 on success, negative on failure
5383 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5385 struct device *dev = rx_ring->dev;
5386 int orig_node = dev_to_node(dev);
5390 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5392 if (rx_ring->q_vector)
5393 numa_node = rx_ring->q_vector->numa_node;
5395 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
5396 if (!rx_ring->rx_buffer_info)
5397 rx_ring->rx_buffer_info = vzalloc(size);
5398 if (!rx_ring->rx_buffer_info)
5401 u64_stats_init(&rx_ring->syncp);
5403 /* Round up to nearest 4K */
5404 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5405 rx_ring->size = ALIGN(rx_ring->size, 4096);
5407 set_dev_node(dev, numa_node);
5408 rx_ring->desc = dma_alloc_coherent(dev,
5412 set_dev_node(dev, orig_node);
5414 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5415 &rx_ring->dma, GFP_KERNEL);
5419 rx_ring->next_to_clean = 0;
5420 rx_ring->next_to_use = 0;
5424 vfree(rx_ring->rx_buffer_info);
5425 rx_ring->rx_buffer_info = NULL;
5426 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5431 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5432 * @adapter: board private structure
5434 * If this function returns with an error, then it's possible one or
5435 * more of the rings is populated (while the rest are not). It is the
5436 * callers duty to clean those orphaned rings.
5438 * Return 0 on success, negative on failure
5440 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5444 for (i = 0; i < adapter->num_rx_queues; i++) {
5445 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5449 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5454 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5459 /* rewind the index freeing the rings as we go */
5461 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5466 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5467 * @tx_ring: Tx descriptor ring for a specific queue
5469 * Free all transmit software resources
5471 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5473 ixgbe_clean_tx_ring(tx_ring);
5475 vfree(tx_ring->tx_buffer_info);
5476 tx_ring->tx_buffer_info = NULL;
5478 /* if not set, then don't free */
5482 dma_free_coherent(tx_ring->dev, tx_ring->size,
5483 tx_ring->desc, tx_ring->dma);
5485 tx_ring->desc = NULL;
5489 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5490 * @adapter: board private structure
5492 * Free all transmit software resources
5494 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5498 for (i = 0; i < adapter->num_tx_queues; i++)
5499 if (adapter->tx_ring[i]->desc)
5500 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5504 * ixgbe_free_rx_resources - Free Rx Resources
5505 * @rx_ring: ring to clean the resources from
5507 * Free all receive software resources
5509 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5511 ixgbe_clean_rx_ring(rx_ring);
5513 vfree(rx_ring->rx_buffer_info);
5514 rx_ring->rx_buffer_info = NULL;
5516 /* if not set, then don't free */
5520 dma_free_coherent(rx_ring->dev, rx_ring->size,
5521 rx_ring->desc, rx_ring->dma);
5523 rx_ring->desc = NULL;
5527 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5528 * @adapter: board private structure
5530 * Free all receive software resources
5532 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5537 ixgbe_free_fcoe_ddp_resources(adapter);
5540 for (i = 0; i < adapter->num_rx_queues; i++)
5541 if (adapter->rx_ring[i]->desc)
5542 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5546 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5547 * @netdev: network interface device structure
5548 * @new_mtu: new value for maximum frame size
5550 * Returns 0 on success, negative on failure
5552 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5554 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5555 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5557 /* MTU < 68 is an error and causes problems on some kernels */
5558 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5562 * For 82599EB we cannot allow legacy VFs to enable their receive
5563 * paths when MTU greater than 1500 is configured. So display a
5564 * warning that legacy VFs will be disabled.
5566 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5567 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5568 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5569 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5571 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5573 /* must set new MTU before calling down or up */
5574 netdev->mtu = new_mtu;
5576 if (netif_running(netdev))
5577 ixgbe_reinit_locked(adapter);
5583 * ixgbe_open - Called when a network interface is made active
5584 * @netdev: network interface device structure
5586 * Returns 0 on success, negative value on failure
5588 * The open entry point is called when a network interface is made
5589 * active by the system (IFF_UP). At this point all resources needed
5590 * for transmit and receive operations are allocated, the interrupt
5591 * handler is registered with the OS, the watchdog timer is started,
5592 * and the stack is notified that the interface is ready.
5594 static int ixgbe_open(struct net_device *netdev)
5596 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5599 /* disallow open during test */
5600 if (test_bit(__IXGBE_TESTING, &adapter->state))
5603 netif_carrier_off(netdev);
5605 /* allocate transmit descriptors */
5606 err = ixgbe_setup_all_tx_resources(adapter);
5610 /* allocate receive descriptors */
5611 err = ixgbe_setup_all_rx_resources(adapter);
5615 ixgbe_configure(adapter);
5617 err = ixgbe_request_irq(adapter);
5621 /* Notify the stack of the actual queue counts. */
5622 if (adapter->num_rx_pools > 1)
5623 queues = adapter->num_rx_queues_per_pool;
5625 queues = adapter->num_tx_queues;
5627 err = netif_set_real_num_tx_queues(netdev, queues);
5629 goto err_set_queues;
5631 if (adapter->num_rx_pools > 1 &&
5632 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5633 queues = IXGBE_MAX_L2A_QUEUES;
5635 queues = adapter->num_rx_queues;
5636 err = netif_set_real_num_rx_queues(netdev, queues);
5638 goto err_set_queues;
5640 ixgbe_ptp_init(adapter);
5642 ixgbe_up_complete(adapter);
5647 ixgbe_free_irq(adapter);
5649 ixgbe_free_all_rx_resources(adapter);
5651 ixgbe_free_all_tx_resources(adapter);
5653 ixgbe_reset(adapter);
5658 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5660 ixgbe_ptp_suspend(adapter);
5662 ixgbe_down(adapter);
5663 ixgbe_free_irq(adapter);
5665 ixgbe_free_all_tx_resources(adapter);
5666 ixgbe_free_all_rx_resources(adapter);
5670 * ixgbe_close - Disables a network interface
5671 * @netdev: network interface device structure
5673 * Returns 0, this is not allowed to fail
5675 * The close entry point is called when an interface is de-activated
5676 * by the OS. The hardware is still under the drivers control, but
5677 * needs to be disabled. A global MAC reset is issued to stop the
5678 * hardware, and all transmit and receive resources are freed.
5680 static int ixgbe_close(struct net_device *netdev)
5682 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5684 ixgbe_ptp_stop(adapter);
5686 ixgbe_close_suspend(adapter);
5688 ixgbe_fdir_filter_exit(adapter);
5690 ixgbe_release_hw_control(adapter);
5696 static int ixgbe_resume(struct pci_dev *pdev)
5698 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5699 struct net_device *netdev = adapter->netdev;
5702 adapter->hw.hw_addr = adapter->io_addr;
5703 pci_set_power_state(pdev, PCI_D0);
5704 pci_restore_state(pdev);
5706 * pci_restore_state clears dev->state_saved so call
5707 * pci_save_state to restore it.
5709 pci_save_state(pdev);
5711 err = pci_enable_device_mem(pdev);
5713 e_dev_err("Cannot enable PCI device from suspend\n");
5716 smp_mb__before_atomic();
5717 clear_bit(__IXGBE_DISABLED, &adapter->state);
5718 pci_set_master(pdev);
5720 pci_wake_from_d3(pdev, false);
5722 ixgbe_reset(adapter);
5724 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5727 err = ixgbe_init_interrupt_scheme(adapter);
5728 if (!err && netif_running(netdev))
5729 err = ixgbe_open(netdev);
5736 netif_device_attach(netdev);
5740 #endif /* CONFIG_PM */
5742 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5744 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5745 struct net_device *netdev = adapter->netdev;
5746 struct ixgbe_hw *hw = &adapter->hw;
5748 u32 wufc = adapter->wol;
5753 netif_device_detach(netdev);
5756 if (netif_running(netdev))
5757 ixgbe_close_suspend(adapter);
5760 ixgbe_clear_interrupt_scheme(adapter);
5763 retval = pci_save_state(pdev);
5768 if (hw->mac.ops.stop_link_on_d3)
5769 hw->mac.ops.stop_link_on_d3(hw);
5772 ixgbe_set_rx_mode(netdev);
5774 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5775 if (hw->mac.ops.enable_tx_laser)
5776 hw->mac.ops.enable_tx_laser(hw);
5778 /* turn on all-multi mode if wake on multicast is enabled */
5779 if (wufc & IXGBE_WUFC_MC) {
5780 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5781 fctrl |= IXGBE_FCTRL_MPE;
5782 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5785 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5786 ctrl |= IXGBE_CTRL_GIO_DIS;
5787 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5789 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5791 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5792 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5795 switch (hw->mac.type) {
5796 case ixgbe_mac_82598EB:
5797 pci_wake_from_d3(pdev, false);
5799 case ixgbe_mac_82599EB:
5800 case ixgbe_mac_X540:
5801 pci_wake_from_d3(pdev, !!wufc);
5807 *enable_wake = !!wufc;
5809 ixgbe_release_hw_control(adapter);
5811 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
5812 pci_disable_device(pdev);
5818 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5823 retval = __ixgbe_shutdown(pdev, &wake);
5828 pci_prepare_to_sleep(pdev);
5830 pci_wake_from_d3(pdev, false);
5831 pci_set_power_state(pdev, PCI_D3hot);
5836 #endif /* CONFIG_PM */
5838 static void ixgbe_shutdown(struct pci_dev *pdev)
5842 __ixgbe_shutdown(pdev, &wake);
5844 if (system_state == SYSTEM_POWER_OFF) {
5845 pci_wake_from_d3(pdev, wake);
5846 pci_set_power_state(pdev, PCI_D3hot);
5851 * ixgbe_update_stats - Update the board statistics counters.
5852 * @adapter: board private structure
5854 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5856 struct net_device *netdev = adapter->netdev;
5857 struct ixgbe_hw *hw = &adapter->hw;
5858 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5860 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5861 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5862 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5863 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5865 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5866 test_bit(__IXGBE_RESETTING, &adapter->state))
5869 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5872 for (i = 0; i < adapter->num_rx_queues; i++) {
5873 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5874 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5876 adapter->rsc_total_count = rsc_count;
5877 adapter->rsc_total_flush = rsc_flush;
5880 for (i = 0; i < adapter->num_rx_queues; i++) {
5881 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5882 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5883 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5884 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5885 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5886 bytes += rx_ring->stats.bytes;
5887 packets += rx_ring->stats.packets;
5889 adapter->non_eop_descs = non_eop_descs;
5890 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5891 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5892 adapter->hw_csum_rx_error = hw_csum_rx_error;
5893 netdev->stats.rx_bytes = bytes;
5894 netdev->stats.rx_packets = packets;
5898 /* gather some stats to the adapter struct that are per queue */
5899 for (i = 0; i < adapter->num_tx_queues; i++) {
5900 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5901 restart_queue += tx_ring->tx_stats.restart_queue;
5902 tx_busy += tx_ring->tx_stats.tx_busy;
5903 bytes += tx_ring->stats.bytes;
5904 packets += tx_ring->stats.packets;
5906 adapter->restart_queue = restart_queue;
5907 adapter->tx_busy = tx_busy;
5908 netdev->stats.tx_bytes = bytes;
5909 netdev->stats.tx_packets = packets;
5911 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5913 /* 8 register reads */
5914 for (i = 0; i < 8; i++) {
5915 /* for packet buffers not used, the register should read 0 */
5916 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5918 hwstats->mpc[i] += mpc;
5919 total_mpc += hwstats->mpc[i];
5920 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5921 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5922 switch (hw->mac.type) {
5923 case ixgbe_mac_82598EB:
5924 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5925 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5926 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5927 hwstats->pxonrxc[i] +=
5928 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5930 case ixgbe_mac_82599EB:
5931 case ixgbe_mac_X540:
5932 hwstats->pxonrxc[i] +=
5933 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5940 /*16 register reads */
5941 for (i = 0; i < 16; i++) {
5942 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5943 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5944 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5945 (hw->mac.type == ixgbe_mac_X540)) {
5946 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5947 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5948 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5949 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5953 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5954 /* work around hardware counting issue */
5955 hwstats->gprc -= missed_rx;
5957 ixgbe_update_xoff_received(adapter);
5959 /* 82598 hardware only has a 32 bit counter in the high register */
5960 switch (hw->mac.type) {
5961 case ixgbe_mac_82598EB:
5962 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5963 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5964 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5965 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5967 case ixgbe_mac_X540:
5968 /* OS2BMC stats are X540 only*/
5969 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5970 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5971 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5972 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5973 case ixgbe_mac_82599EB:
5974 for (i = 0; i < 16; i++)
5975 adapter->hw_rx_no_dma_resources +=
5976 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5977 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5978 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5979 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5980 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5981 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5982 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5983 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5984 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5985 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5987 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5988 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5989 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5990 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5991 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5992 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5993 /* Add up per cpu counters for total ddp aloc fail */
5994 if (adapter->fcoe.ddp_pool) {
5995 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5996 struct ixgbe_fcoe_ddp_pool *ddp_pool;
5998 u64 noddp = 0, noddp_ext_buff = 0;
5999 for_each_possible_cpu(cpu) {
6000 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6001 noddp += ddp_pool->noddp;
6002 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6004 hwstats->fcoe_noddp = noddp;
6005 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6007 #endif /* IXGBE_FCOE */
6012 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6013 hwstats->bprc += bprc;
6014 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6015 if (hw->mac.type == ixgbe_mac_82598EB)
6016 hwstats->mprc -= bprc;
6017 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6018 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6019 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6020 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6021 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6022 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6023 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6024 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6025 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6026 hwstats->lxontxc += lxon;
6027 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6028 hwstats->lxofftxc += lxoff;
6029 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6030 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6032 * 82598 errata - tx of flow control packets is included in tx counters
6034 xon_off_tot = lxon + lxoff;
6035 hwstats->gptc -= xon_off_tot;
6036 hwstats->mptc -= xon_off_tot;
6037 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6038 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6039 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6040 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6041 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6042 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6043 hwstats->ptc64 -= xon_off_tot;
6044 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6045 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6046 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6047 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6048 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6049 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6051 /* Fill out the OS statistics structure */
6052 netdev->stats.multicast = hwstats->mprc;
6055 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6056 netdev->stats.rx_dropped = 0;
6057 netdev->stats.rx_length_errors = hwstats->rlec;
6058 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6059 netdev->stats.rx_missed_errors = total_mpc;
6063 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6064 * @adapter: pointer to the device adapter structure
6066 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6068 struct ixgbe_hw *hw = &adapter->hw;
6071 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6074 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6076 /* if interface is down do nothing */
6077 if (test_bit(__IXGBE_DOWN, &adapter->state))
6080 /* do nothing if we are not using signature filters */
6081 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6084 adapter->fdir_overflow++;
6086 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6087 for (i = 0; i < adapter->num_tx_queues; i++)
6088 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6089 &(adapter->tx_ring[i]->state));
6090 /* re-enable flow director interrupts */
6091 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6093 e_err(probe, "failed to finish FDIR re-initialization, "
6094 "ignored adding FDIR ATR filters\n");
6099 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6100 * @adapter: pointer to the device adapter structure
6102 * This function serves two purposes. First it strobes the interrupt lines
6103 * in order to make certain interrupts are occurring. Secondly it sets the
6104 * bits needed to check for TX hangs. As a result we should immediately
6105 * determine if a hang has occurred.
6107 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6109 struct ixgbe_hw *hw = &adapter->hw;
6113 /* If we're down, removing or resetting, just bail */
6114 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6115 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6116 test_bit(__IXGBE_RESETTING, &adapter->state))
6119 /* Force detection of hung controller */
6120 if (netif_carrier_ok(adapter->netdev)) {
6121 for (i = 0; i < adapter->num_tx_queues; i++)
6122 set_check_for_tx_hang(adapter->tx_ring[i]);
6125 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6127 * for legacy and MSI interrupts don't set any bits
6128 * that are enabled for EIAM, because this operation
6129 * would set *both* EIMS and EICS for any bit in EIAM
6131 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6132 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6134 /* get one bit for every active tx/rx interrupt vector */
6135 for (i = 0; i < adapter->num_q_vectors; i++) {
6136 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6137 if (qv->rx.ring || qv->tx.ring)
6138 eics |= ((u64)1 << i);
6142 /* Cause software interrupt to ensure rings are cleaned */
6143 ixgbe_irq_rearm_queues(adapter, eics);
6148 * ixgbe_watchdog_update_link - update the link status
6149 * @adapter: pointer to the device adapter structure
6150 * @link_speed: pointer to a u32 to store the link_speed
6152 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6154 struct ixgbe_hw *hw = &adapter->hw;
6155 u32 link_speed = adapter->link_speed;
6156 bool link_up = adapter->link_up;
6157 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6159 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6162 if (hw->mac.ops.check_link) {
6163 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6165 /* always assume link is up, if no check link function */
6166 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6170 if (adapter->ixgbe_ieee_pfc)
6171 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6173 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6174 hw->mac.ops.fc_enable(hw);
6175 ixgbe_set_rx_drop_en(adapter);
6179 time_after(jiffies, (adapter->link_check_timeout +
6180 IXGBE_TRY_LINK_TIMEOUT))) {
6181 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6182 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6183 IXGBE_WRITE_FLUSH(hw);
6186 adapter->link_up = link_up;
6187 adapter->link_speed = link_speed;
6190 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6192 #ifdef CONFIG_IXGBE_DCB
6193 struct net_device *netdev = adapter->netdev;
6194 struct dcb_app app = {
6195 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6200 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6201 up = dcb_ieee_getapp_mask(netdev, &app);
6203 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6208 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6209 * print link up message
6210 * @adapter: pointer to the device adapter structure
6212 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6214 struct net_device *netdev = adapter->netdev;
6215 struct ixgbe_hw *hw = &adapter->hw;
6216 struct net_device *upper;
6217 struct list_head *iter;
6218 u32 link_speed = adapter->link_speed;
6219 bool flow_rx, flow_tx;
6221 /* only continue if link was previously down */
6222 if (netif_carrier_ok(netdev))
6225 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6227 switch (hw->mac.type) {
6228 case ixgbe_mac_82598EB: {
6229 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6230 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6231 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6232 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6235 case ixgbe_mac_X540:
6236 case ixgbe_mac_82599EB: {
6237 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6238 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6239 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6240 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6249 adapter->last_rx_ptp_check = jiffies;
6251 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6252 ixgbe_ptp_start_cyclecounter(adapter);
6254 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
6255 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
6257 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
6259 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
6262 ((flow_rx && flow_tx) ? "RX/TX" :
6264 (flow_tx ? "TX" : "None"))));
6266 netif_carrier_on(netdev);
6267 ixgbe_check_vf_rate_limit(adapter);
6269 /* enable transmits */
6270 netif_tx_wake_all_queues(adapter->netdev);
6272 /* enable any upper devices */
6274 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6275 if (netif_is_macvlan(upper)) {
6276 struct macvlan_dev *vlan = netdev_priv(upper);
6279 netif_tx_wake_all_queues(upper);
6284 /* update the default user priority for VFs */
6285 ixgbe_update_default_up(adapter);
6287 /* ping all the active vfs to let them know link has changed */
6288 ixgbe_ping_all_vfs(adapter);
6292 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6293 * print link down message
6294 * @adapter: pointer to the adapter structure
6296 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6298 struct net_device *netdev = adapter->netdev;
6299 struct ixgbe_hw *hw = &adapter->hw;
6301 adapter->link_up = false;
6302 adapter->link_speed = 0;
6304 /* only continue if link was up previously */
6305 if (!netif_carrier_ok(netdev))
6308 /* poll for SFP+ cable when link is down */
6309 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6310 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6312 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6313 ixgbe_ptp_start_cyclecounter(adapter);
6315 e_info(drv, "NIC Link is Down\n");
6316 netif_carrier_off(netdev);
6318 /* ping all the active vfs to let them know link has changed */
6319 ixgbe_ping_all_vfs(adapter);
6323 * ixgbe_watchdog_flush_tx - flush queues on link down
6324 * @adapter: pointer to the device adapter structure
6326 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6329 int some_tx_pending = 0;
6331 if (!netif_carrier_ok(adapter->netdev)) {
6332 for (i = 0; i < adapter->num_tx_queues; i++) {
6333 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6334 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
6335 some_tx_pending = 1;
6340 if (some_tx_pending) {
6341 /* We've lost link, so the controller stops DMA,
6342 * but we've got queued Tx work that's never going
6343 * to get done, so reset controller to flush Tx.
6344 * (Do the reset outside of interrupt context).
6346 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6347 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6352 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6356 /* Do not perform spoof check for 82598 or if not in IOV mode */
6357 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6358 adapter->num_vfs == 0)
6361 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6364 * ssvpc register is cleared on read, if zero then no
6365 * spoofed packets in the last interval.
6370 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6374 * ixgbe_watchdog_subtask - check and bring link up
6375 * @adapter: pointer to the device adapter structure
6377 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6379 /* if interface is down, removing or resetting, do nothing */
6380 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6381 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6382 test_bit(__IXGBE_RESETTING, &adapter->state))
6385 ixgbe_watchdog_update_link(adapter);
6387 if (adapter->link_up)
6388 ixgbe_watchdog_link_is_up(adapter);
6390 ixgbe_watchdog_link_is_down(adapter);
6392 ixgbe_spoof_check(adapter);
6393 ixgbe_update_stats(adapter);
6395 ixgbe_watchdog_flush_tx(adapter);
6399 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6400 * @adapter: the ixgbe adapter structure
6402 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6404 struct ixgbe_hw *hw = &adapter->hw;
6407 /* not searching for SFP so there is nothing to do here */
6408 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6409 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6412 /* someone else is in init, wait until next service event */
6413 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6416 err = hw->phy.ops.identify_sfp(hw);
6417 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6420 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6421 /* If no cable is present, then we need to reset
6422 * the next time we find a good cable. */
6423 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6430 /* exit if reset not needed */
6431 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6434 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6437 * A module may be identified correctly, but the EEPROM may not have
6438 * support for that module. setup_sfp() will fail in that case, so
6439 * we should not allow that module to load.
6441 if (hw->mac.type == ixgbe_mac_82598EB)
6442 err = hw->phy.ops.reset(hw);
6444 err = hw->mac.ops.setup_sfp(hw);
6446 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6449 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6450 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6453 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6455 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6456 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6457 e_dev_err("failed to initialize because an unsupported "
6458 "SFP+ module type was detected.\n");
6459 e_dev_err("Reload the driver after installing a "
6460 "supported module.\n");
6461 unregister_netdev(adapter->netdev);
6466 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6467 * @adapter: the ixgbe adapter structure
6469 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6471 struct ixgbe_hw *hw = &adapter->hw;
6473 bool autoneg = false;
6475 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6478 /* someone else is in init, wait until next service event */
6479 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6482 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6484 speed = hw->phy.autoneg_advertised;
6485 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6486 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6488 /* setup the highest link when no autoneg */
6490 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6491 speed = IXGBE_LINK_SPEED_10GB_FULL;
6495 if (hw->mac.ops.setup_link)
6496 hw->mac.ops.setup_link(hw, speed, true);
6498 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6499 adapter->link_check_timeout = jiffies;
6500 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6503 #ifdef CONFIG_PCI_IOV
6504 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6507 struct ixgbe_hw *hw = &adapter->hw;
6508 struct net_device *netdev = adapter->netdev;
6512 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6513 if (gpc) /* If incrementing then no need for the check below */
6516 * Check to see if a bad DMA write target from an errant or
6517 * malicious VF has caused a PCIe error. If so then we can
6518 * issue a VFLR to the offending VF(s) and then resume without
6519 * requesting a full slot reset.
6522 for (vf = 0; vf < adapter->num_vfs; vf++) {
6523 ciaa = (vf << 16) | 0x80000000;
6524 /* 32 bit read so align, we really want status at offset 6 */
6525 ciaa |= PCI_COMMAND;
6526 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6527 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
6529 /* disable debug mode asap after reading data */
6530 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6531 /* Get the upper 16 bits which will be the PCI status reg */
6533 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
6534 netdev_err(netdev, "VF %d Hung DMA\n", vf);
6536 ciaa = (vf << 16) | 0x80000000;
6538 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6539 ciad = 0x00008000; /* VFLR */
6540 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
6542 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6549 * ixgbe_service_timer - Timer Call-back
6550 * @data: pointer to adapter cast into an unsigned long
6552 static void ixgbe_service_timer(unsigned long data)
6554 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6555 unsigned long next_event_offset;
6558 /* poll faster when waiting for link */
6559 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6560 next_event_offset = HZ / 10;
6562 next_event_offset = HZ * 2;
6564 #ifdef CONFIG_PCI_IOV
6566 * don't bother with SR-IOV VF DMA hang check if there are
6567 * no VFs or the link is down
6569 if (!adapter->num_vfs ||
6570 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6571 goto normal_timer_service;
6573 /* If we have VFs allocated then we must check for DMA hangs */
6574 ixgbe_check_for_bad_vf(adapter);
6575 next_event_offset = HZ / 50;
6576 adapter->timer_event_accumulator++;
6578 if (adapter->timer_event_accumulator >= 100)
6579 adapter->timer_event_accumulator = 0;
6583 normal_timer_service:
6585 /* Reset the timer */
6586 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6589 ixgbe_service_event_schedule(adapter);
6592 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6594 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6597 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6599 /* If we're already down, removing or resetting, just bail */
6600 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6601 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6602 test_bit(__IXGBE_RESETTING, &adapter->state))
6605 ixgbe_dump(adapter);
6606 netdev_err(adapter->netdev, "Reset adapter\n");
6607 adapter->tx_timeout_count++;
6610 ixgbe_reinit_locked(adapter);
6615 * ixgbe_service_task - manages and runs subtasks
6616 * @work: pointer to work_struct containing our data
6618 static void ixgbe_service_task(struct work_struct *work)
6620 struct ixgbe_adapter *adapter = container_of(work,
6621 struct ixgbe_adapter,
6623 if (ixgbe_removed(adapter->hw.hw_addr)) {
6624 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6626 ixgbe_down(adapter);
6629 ixgbe_service_event_complete(adapter);
6632 ixgbe_reset_subtask(adapter);
6633 ixgbe_sfp_detection_subtask(adapter);
6634 ixgbe_sfp_link_config_subtask(adapter);
6635 ixgbe_check_overtemp_subtask(adapter);
6636 ixgbe_watchdog_subtask(adapter);
6637 ixgbe_fdir_reinit_subtask(adapter);
6638 ixgbe_check_hang_subtask(adapter);
6640 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6641 ixgbe_ptp_overflow_check(adapter);
6642 ixgbe_ptp_rx_hang(adapter);
6645 ixgbe_service_event_complete(adapter);
6648 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6649 struct ixgbe_tx_buffer *first,
6652 struct sk_buff *skb = first->skb;
6653 u32 vlan_macip_lens, type_tucmd;
6654 u32 mss_l4len_idx, l4len;
6657 if (skb->ip_summed != CHECKSUM_PARTIAL)
6660 if (!skb_is_gso(skb))
6663 err = skb_cow_head(skb, 0);
6667 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6668 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6670 if (first->protocol == htons(ETH_P_IP)) {
6671 struct iphdr *iph = ip_hdr(skb);
6674 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6678 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6679 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6680 IXGBE_TX_FLAGS_CSUM |
6681 IXGBE_TX_FLAGS_IPV4;
6682 } else if (skb_is_gso_v6(skb)) {
6683 ipv6_hdr(skb)->payload_len = 0;
6684 tcp_hdr(skb)->check =
6685 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6686 &ipv6_hdr(skb)->daddr,
6688 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6689 IXGBE_TX_FLAGS_CSUM;
6692 /* compute header lengths */
6693 l4len = tcp_hdrlen(skb);
6694 *hdr_len = skb_transport_offset(skb) + l4len;
6696 /* update gso size and bytecount with header size */
6697 first->gso_segs = skb_shinfo(skb)->gso_segs;
6698 first->bytecount += (first->gso_segs - 1) * *hdr_len;
6700 /* mss_l4len_id: use 0 as index for TSO */
6701 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6702 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6704 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6705 vlan_macip_lens = skb_network_header_len(skb);
6706 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6707 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6709 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6715 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6716 struct ixgbe_tx_buffer *first)
6718 struct sk_buff *skb = first->skb;
6719 u32 vlan_macip_lens = 0;
6720 u32 mss_l4len_idx = 0;
6723 if (skb->ip_summed != CHECKSUM_PARTIAL) {
6724 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6725 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6729 switch (first->protocol) {
6730 case htons(ETH_P_IP):
6731 vlan_macip_lens |= skb_network_header_len(skb);
6732 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6733 l4_hdr = ip_hdr(skb)->protocol;
6735 case htons(ETH_P_IPV6):
6736 vlan_macip_lens |= skb_network_header_len(skb);
6737 l4_hdr = ipv6_hdr(skb)->nexthdr;
6740 if (unlikely(net_ratelimit())) {
6741 dev_warn(tx_ring->dev,
6742 "partial checksum but proto=%x!\n",
6750 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
6751 mss_l4len_idx = tcp_hdrlen(skb) <<
6752 IXGBE_ADVTXD_L4LEN_SHIFT;
6755 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
6756 mss_l4len_idx = sizeof(struct sctphdr) <<
6757 IXGBE_ADVTXD_L4LEN_SHIFT;
6760 mss_l4len_idx = sizeof(struct udphdr) <<
6761 IXGBE_ADVTXD_L4LEN_SHIFT;
6764 if (unlikely(net_ratelimit())) {
6765 dev_warn(tx_ring->dev,
6766 "partial checksum but l4 proto=%x!\n",
6772 /* update TX checksum flag */
6773 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
6776 /* vlan_macip_lens: MACLEN, VLAN tag */
6777 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6778 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6780 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
6781 type_tucmd, mss_l4len_idx);
6784 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6785 ((_flag <= _result) ? \
6786 ((u32)(_input & _flag) * (_result / _flag)) : \
6787 ((u32)(_input & _flag) / (_flag / _result)))
6789 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6791 /* set type for advanced descriptor with frame checksum insertion */
6792 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
6793 IXGBE_ADVTXD_DCMD_DEXT |
6794 IXGBE_ADVTXD_DCMD_IFCS;
6796 /* set HW vlan bit if vlan is present */
6797 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
6798 IXGBE_ADVTXD_DCMD_VLE);
6800 /* set segmentation enable bits for TSO/FSO */
6801 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
6802 IXGBE_ADVTXD_DCMD_TSE);
6804 /* set timestamp bit if present */
6805 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
6806 IXGBE_ADVTXD_MAC_TSTAMP);
6808 /* insert frame checksum */
6809 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
6814 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
6815 u32 tx_flags, unsigned int paylen)
6817 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
6819 /* enable L4 checksum for TSO and TX checksum offload */
6820 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6821 IXGBE_TX_FLAGS_CSUM,
6822 IXGBE_ADVTXD_POPTS_TXSM);
6824 /* enble IPv4 checksum for TSO */
6825 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6826 IXGBE_TX_FLAGS_IPV4,
6827 IXGBE_ADVTXD_POPTS_IXSM);
6830 * Check Context must be set if Tx switch is enabled, which it
6831 * always is for case where virtual functions are running
6833 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6837 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6840 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6843 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
6844 struct ixgbe_tx_buffer *first,
6847 struct sk_buff *skb = first->skb;
6848 struct ixgbe_tx_buffer *tx_buffer;
6849 union ixgbe_adv_tx_desc *tx_desc;
6850 struct skb_frag_struct *frag;
6852 unsigned int data_len, size;
6853 u32 tx_flags = first->tx_flags;
6854 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
6855 u16 i = tx_ring->next_to_use;
6857 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6859 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
6861 size = skb_headlen(skb);
6862 data_len = skb->data_len;
6865 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6866 if (data_len < sizeof(struct fcoe_crc_eof)) {
6867 size -= sizeof(struct fcoe_crc_eof) - data_len;
6870 data_len -= sizeof(struct fcoe_crc_eof);
6875 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6879 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6880 if (dma_mapping_error(tx_ring->dev, dma))
6883 /* record length, and DMA address */
6884 dma_unmap_len_set(tx_buffer, len, size);
6885 dma_unmap_addr_set(tx_buffer, dma, dma);
6887 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6889 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6890 tx_desc->read.cmd_type_len =
6891 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
6895 if (i == tx_ring->count) {
6896 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6899 tx_desc->read.olinfo_status = 0;
6901 dma += IXGBE_MAX_DATA_PER_TXD;
6902 size -= IXGBE_MAX_DATA_PER_TXD;
6904 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6907 if (likely(!data_len))
6910 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6914 if (i == tx_ring->count) {
6915 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6918 tx_desc->read.olinfo_status = 0;
6921 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6923 size = skb_frag_size(frag);
6927 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6930 tx_buffer = &tx_ring->tx_buffer_info[i];
6933 /* write last descriptor with RS and EOP bits */
6934 cmd_type |= size | IXGBE_TXD_CMD;
6935 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6937 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6939 /* set the timestamp */
6940 first->time_stamp = jiffies;
6943 * Force memory writes to complete before letting h/w know there
6944 * are new descriptors to fetch. (Only applicable for weak-ordered
6945 * memory model archs, such as IA-64).
6947 * We also need this memory barrier to make certain all of the
6948 * status bits have been updated before next_to_watch is written.
6952 /* set next_to_watch value indicating a packet is present */
6953 first->next_to_watch = tx_desc;
6956 if (i == tx_ring->count)
6959 tx_ring->next_to_use = i;
6961 /* notify HW of packet */
6962 ixgbe_write_tail(tx_ring, i);
6966 dev_err(tx_ring->dev, "TX DMA map failed\n");
6968 /* clear dma mappings for failed tx_buffer_info map */
6970 tx_buffer = &tx_ring->tx_buffer_info[i];
6971 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6972 if (tx_buffer == first)
6979 tx_ring->next_to_use = i;
6982 static void ixgbe_atr(struct ixgbe_ring *ring,
6983 struct ixgbe_tx_buffer *first)
6985 struct ixgbe_q_vector *q_vector = ring->q_vector;
6986 union ixgbe_atr_hash_dword input = { .dword = 0 };
6987 union ixgbe_atr_hash_dword common = { .dword = 0 };
6989 unsigned char *network;
6991 struct ipv6hdr *ipv6;
6996 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7000 /* do nothing if sampling is disabled */
7001 if (!ring->atr_sample_rate)
7006 /* snag network header to get L4 type and address */
7007 hdr.network = skb_network_header(first->skb);
7009 /* Currently only IPv4/IPv6 with TCP is supported */
7010 if ((first->protocol != htons(ETH_P_IPV6) ||
7011 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7012 (first->protocol != htons(ETH_P_IP) ||
7013 hdr.ipv4->protocol != IPPROTO_TCP))
7016 th = tcp_hdr(first->skb);
7018 /* skip this packet since it is invalid or the socket is closing */
7022 /* sample on all syn packets or once every atr sample count */
7023 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7026 /* reset sample count */
7027 ring->atr_count = 0;
7029 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7032 * src and dst are inverted, think how the receiver sees them
7034 * The input is broken into two sections, a non-compressed section
7035 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7036 * is XORed together and stored in the compressed dword.
7038 input.formatted.vlan_id = vlan_id;
7041 * since src port and flex bytes occupy the same word XOR them together
7042 * and write the value to source port portion of compressed dword
7044 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7045 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7047 common.port.src ^= th->dest ^ first->protocol;
7048 common.port.dst ^= th->source;
7050 if (first->protocol == htons(ETH_P_IP)) {
7051 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7052 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7054 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7055 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7056 hdr.ipv6->saddr.s6_addr32[1] ^
7057 hdr.ipv6->saddr.s6_addr32[2] ^
7058 hdr.ipv6->saddr.s6_addr32[3] ^
7059 hdr.ipv6->daddr.s6_addr32[0] ^
7060 hdr.ipv6->daddr.s6_addr32[1] ^
7061 hdr.ipv6->daddr.s6_addr32[2] ^
7062 hdr.ipv6->daddr.s6_addr32[3];
7065 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7066 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7067 input, common, ring->queue_index);
7070 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7072 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7073 /* Herbert's original patch had:
7074 * smp_mb__after_netif_stop_queue();
7075 * but since that doesn't exist yet, just open code it. */
7078 /* We need to check again in a case another CPU has just
7079 * made room available. */
7080 if (likely(ixgbe_desc_unused(tx_ring) < size))
7083 /* A reprieve! - use start_queue because it doesn't call schedule */
7084 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7085 ++tx_ring->tx_stats.restart_queue;
7089 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7091 if (likely(ixgbe_desc_unused(tx_ring) >= size))
7093 return __ixgbe_maybe_stop_tx(tx_ring, size);
7096 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7097 void *accel_priv, select_queue_fallback_t fallback)
7099 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7101 struct ixgbe_adapter *adapter;
7102 struct ixgbe_ring_feature *f;
7107 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7112 * only execute the code below if protocol is FCoE
7113 * or FIP and we have FCoE enabled on the adapter
7115 switch (vlan_get_protocol(skb)) {
7116 case htons(ETH_P_FCOE):
7117 case htons(ETH_P_FIP):
7118 adapter = netdev_priv(dev);
7120 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7123 return fallback(dev, skb);
7126 f = &adapter->ring_feature[RING_F_FCOE];
7128 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7131 while (txq >= f->indices)
7134 return txq + f->offset;
7136 return fallback(dev, skb);
7140 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7141 struct ixgbe_adapter *adapter,
7142 struct ixgbe_ring *tx_ring)
7144 struct ixgbe_tx_buffer *first;
7148 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7149 __be16 protocol = skb->protocol;
7153 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7154 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7155 * + 2 desc gap to keep tail from touching head,
7156 * + 1 desc for context descriptor,
7157 * otherwise try next time
7159 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7160 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7162 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7163 tx_ring->tx_stats.tx_busy++;
7164 return NETDEV_TX_BUSY;
7167 /* record the location of the first descriptor for this packet */
7168 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7170 first->bytecount = skb->len;
7171 first->gso_segs = 1;
7173 /* if we have a HW VLAN tag being added default to the HW one */
7174 if (vlan_tx_tag_present(skb)) {
7175 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7176 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7177 /* else if it is a SW VLAN check the next protocol and store the tag */
7178 } else if (protocol == htons(ETH_P_8021Q)) {
7179 struct vlan_hdr *vhdr, _vhdr;
7180 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7184 protocol = vhdr->h_vlan_encapsulated_proto;
7185 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7186 IXGBE_TX_FLAGS_VLAN_SHIFT;
7187 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7190 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
7191 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7192 &adapter->state))) {
7193 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7194 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7196 /* schedule check for Tx timestamp */
7197 adapter->ptp_tx_skb = skb_get(skb);
7198 adapter->ptp_tx_start = jiffies;
7199 schedule_work(&adapter->ptp_tx_work);
7202 skb_tx_timestamp(skb);
7204 #ifdef CONFIG_PCI_IOV
7206 * Use the l2switch_enable flag - would be false if the DMA
7207 * Tx switch had been disabled.
7209 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7210 tx_flags |= IXGBE_TX_FLAGS_CC;
7213 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7214 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7215 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7216 (skb->priority != TC_PRIO_CONTROL))) {
7217 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7218 tx_flags |= (skb->priority & 0x7) <<
7219 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7220 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7221 struct vlan_ethhdr *vhdr;
7223 if (skb_cow_head(skb, 0))
7225 vhdr = (struct vlan_ethhdr *)skb->data;
7226 vhdr->h_vlan_TCI = htons(tx_flags >>
7227 IXGBE_TX_FLAGS_VLAN_SHIFT);
7229 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7233 /* record initial flags and protocol */
7234 first->tx_flags = tx_flags;
7235 first->protocol = protocol;
7238 /* setup tx offload for FCoE */
7239 if ((protocol == htons(ETH_P_FCOE)) &&
7240 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7241 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7248 #endif /* IXGBE_FCOE */
7249 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7253 ixgbe_tx_csum(tx_ring, first);
7255 /* add the ATR filter if ATR is on */
7256 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7257 ixgbe_atr(tx_ring, first);
7261 #endif /* IXGBE_FCOE */
7262 ixgbe_tx_map(tx_ring, first, hdr_len);
7264 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7266 return NETDEV_TX_OK;
7269 dev_kfree_skb_any(first->skb);
7272 return NETDEV_TX_OK;
7275 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7276 struct net_device *netdev,
7277 struct ixgbe_ring *ring)
7279 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7280 struct ixgbe_ring *tx_ring;
7283 * The minimum packet size for olinfo paylen is 17 so pad the skb
7284 * in order to meet this minimum size requirement.
7286 if (unlikely(skb->len < 17)) {
7287 if (skb_pad(skb, 17 - skb->len))
7288 return NETDEV_TX_OK;
7290 skb_set_tail_pointer(skb, 17);
7293 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7295 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7298 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7299 struct net_device *netdev)
7301 return __ixgbe_xmit_frame(skb, netdev, NULL);
7305 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7306 * @netdev: network interface device structure
7307 * @p: pointer to an address structure
7309 * Returns 0 on success, negative on failure
7311 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7313 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7314 struct ixgbe_hw *hw = &adapter->hw;
7315 struct sockaddr *addr = p;
7318 if (!is_valid_ether_addr(addr->sa_data))
7319 return -EADDRNOTAVAIL;
7321 ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7322 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7323 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7325 ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7326 return ret > 0 ? 0 : ret;
7330 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7332 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7333 struct ixgbe_hw *hw = &adapter->hw;
7337 if (prtad != hw->phy.mdio.prtad)
7339 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7345 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7346 u16 addr, u16 value)
7348 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7349 struct ixgbe_hw *hw = &adapter->hw;
7351 if (prtad != hw->phy.mdio.prtad)
7353 return hw->phy.ops.write_reg(hw, addr, devad, value);
7356 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7358 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7362 return ixgbe_ptp_set_ts_config(adapter, req);
7364 return ixgbe_ptp_get_ts_config(adapter, req);
7366 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7371 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7373 * @netdev: network interface device structure
7375 * Returns non-zero on failure
7377 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7380 struct ixgbe_adapter *adapter = netdev_priv(dev);
7381 struct ixgbe_hw *hw = &adapter->hw;
7383 if (is_valid_ether_addr(hw->mac.san_addr)) {
7385 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7388 /* update SAN MAC vmdq pool selection */
7389 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7395 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7397 * @netdev: network interface device structure
7399 * Returns non-zero on failure
7401 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7404 struct ixgbe_adapter *adapter = netdev_priv(dev);
7405 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7407 if (is_valid_ether_addr(mac->san_addr)) {
7409 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7415 #ifdef CONFIG_NET_POLL_CONTROLLER
7417 * Polling 'interrupt' - used by things like netconsole to send skbs
7418 * without having to re-enable interrupts. It's not called while
7419 * the interrupt routine is executing.
7421 static void ixgbe_netpoll(struct net_device *netdev)
7423 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7426 /* if interface is down do nothing */
7427 if (test_bit(__IXGBE_DOWN, &adapter->state))
7430 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
7431 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
7432 for (i = 0; i < adapter->num_q_vectors; i++)
7433 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7435 ixgbe_intr(adapter->pdev->irq, netdev);
7437 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
7441 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7442 struct rtnl_link_stats64 *stats)
7444 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7448 for (i = 0; i < adapter->num_rx_queues; i++) {
7449 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7455 start = u64_stats_fetch_begin_irq(&ring->syncp);
7456 packets = ring->stats.packets;
7457 bytes = ring->stats.bytes;
7458 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7459 stats->rx_packets += packets;
7460 stats->rx_bytes += bytes;
7464 for (i = 0; i < adapter->num_tx_queues; i++) {
7465 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7471 start = u64_stats_fetch_begin_irq(&ring->syncp);
7472 packets = ring->stats.packets;
7473 bytes = ring->stats.bytes;
7474 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7475 stats->tx_packets += packets;
7476 stats->tx_bytes += bytes;
7480 /* following stats updated by ixgbe_watchdog_task() */
7481 stats->multicast = netdev->stats.multicast;
7482 stats->rx_errors = netdev->stats.rx_errors;
7483 stats->rx_length_errors = netdev->stats.rx_length_errors;
7484 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
7485 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7489 #ifdef CONFIG_IXGBE_DCB
7491 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7492 * @adapter: pointer to ixgbe_adapter
7493 * @tc: number of traffic classes currently enabled
7495 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7496 * 802.1Q priority maps to a packet buffer that exists.
7498 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7500 struct ixgbe_hw *hw = &adapter->hw;
7504 /* 82598 have a static priority to TC mapping that can not
7505 * be changed so no validation is needed.
7507 if (hw->mac.type == ixgbe_mac_82598EB)
7510 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7513 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7514 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7516 /* If up2tc is out of bounds default to zero */
7518 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7522 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7528 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7529 * @adapter: Pointer to adapter struct
7531 * Populate the netdev user priority to tc map
7533 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7535 struct net_device *dev = adapter->netdev;
7536 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7537 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7540 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7543 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7544 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7546 tc = ets->prio_tc[prio];
7548 netdev_set_prio_tc_map(dev, prio, tc);
7552 #endif /* CONFIG_IXGBE_DCB */
7554 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7556 * @netdev: net device to configure
7557 * @tc: number of traffic classes to enable
7559 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7561 struct ixgbe_adapter *adapter = netdev_priv(dev);
7562 struct ixgbe_hw *hw = &adapter->hw;
7565 /* Hardware supports up to 8 traffic classes */
7566 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
7567 (hw->mac.type == ixgbe_mac_82598EB &&
7568 tc < MAX_TRAFFIC_CLASS))
7571 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7572 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7575 /* Hardware has to reinitialize queues and interrupts to
7576 * match packet buffer alignment. Unfortunately, the
7577 * hardware is not flexible enough to do this dynamically.
7579 if (netif_running(dev))
7581 ixgbe_clear_interrupt_scheme(adapter);
7583 #ifdef CONFIG_IXGBE_DCB
7585 netdev_set_num_tc(dev, tc);
7586 ixgbe_set_prio_tc_map(adapter);
7588 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7590 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7591 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7592 adapter->hw.fc.requested_mode = ixgbe_fc_none;
7595 netdev_reset_tc(dev);
7597 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7598 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7600 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7602 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7603 adapter->dcb_cfg.pfc_mode_enable = false;
7606 ixgbe_validate_rtr(adapter, tc);
7608 #endif /* CONFIG_IXGBE_DCB */
7609 ixgbe_init_interrupt_scheme(adapter);
7611 if (netif_running(dev))
7612 return ixgbe_open(dev);
7617 #ifdef CONFIG_PCI_IOV
7618 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7620 struct net_device *netdev = adapter->netdev;
7623 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7628 void ixgbe_do_reset(struct net_device *netdev)
7630 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7632 if (netif_running(netdev))
7633 ixgbe_reinit_locked(adapter);
7635 ixgbe_reset(adapter);
7638 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7639 netdev_features_t features)
7641 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7643 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7644 if (!(features & NETIF_F_RXCSUM))
7645 features &= ~NETIF_F_LRO;
7647 /* Turn off LRO if not RSC capable */
7648 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7649 features &= ~NETIF_F_LRO;
7654 static int ixgbe_set_features(struct net_device *netdev,
7655 netdev_features_t features)
7657 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7658 netdev_features_t changed = netdev->features ^ features;
7659 bool need_reset = false;
7661 /* Make sure RSC matches LRO, reset if change */
7662 if (!(features & NETIF_F_LRO)) {
7663 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7665 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7666 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7667 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7668 if (adapter->rx_itr_setting == 1 ||
7669 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7670 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7672 } else if ((changed ^ features) & NETIF_F_LRO) {
7673 e_info(probe, "rx-usecs set too low, "
7679 * Check if Flow Director n-tuple support was enabled or disabled. If
7680 * the state changed, we need to reset.
7682 switch (features & NETIF_F_NTUPLE) {
7683 case NETIF_F_NTUPLE:
7684 /* turn off ATR, enable perfect filters and reset */
7685 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
7688 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
7689 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7692 /* turn off perfect filters, enable ATR and reset */
7693 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7696 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7698 /* We cannot enable ATR if SR-IOV is enabled */
7699 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7702 /* We cannot enable ATR if we have 2 or more traffic classes */
7703 if (netdev_get_num_tc(netdev) > 1)
7706 /* We cannot enable ATR if RSS is disabled */
7707 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
7710 /* A sample rate of 0 indicates ATR disabled */
7711 if (!adapter->atr_sample_rate)
7714 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
7718 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7719 ixgbe_vlan_strip_enable(adapter);
7721 ixgbe_vlan_strip_disable(adapter);
7723 if (changed & NETIF_F_RXALL)
7726 netdev->features = features;
7728 ixgbe_do_reset(netdev);
7733 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7734 struct net_device *dev,
7735 const unsigned char *addr,
7738 struct ixgbe_adapter *adapter = netdev_priv(dev);
7741 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7742 return ndo_dflt_fdb_add(ndm, tb, dev, addr, flags);
7744 /* Hardware does not support aging addresses so if a
7745 * ndm_state is given only allow permanent addresses
7747 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7748 pr_info("%s: FDB only supports static addresses\n",
7753 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
7754 u32 rar_uc_entries = IXGBE_MAX_PF_MACVLANS;
7756 if (netdev_uc_count(dev) < rar_uc_entries)
7757 err = dev_uc_add_excl(dev, addr);
7760 } else if (is_multicast_ether_addr(addr)) {
7761 err = dev_mc_add_excl(dev, addr);
7766 /* Only return duplicate errors if NLM_F_EXCL is set */
7767 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7773 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
7774 struct nlmsghdr *nlh)
7776 struct ixgbe_adapter *adapter = netdev_priv(dev);
7777 struct nlattr *attr, *br_spec;
7780 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7783 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7785 nla_for_each_nested(attr, br_spec, rem) {
7789 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7792 mode = nla_get_u16(attr);
7793 if (mode == BRIDGE_MODE_VEPA) {
7795 adapter->flags2 &= ~IXGBE_FLAG2_BRIDGE_MODE_VEB;
7796 } else if (mode == BRIDGE_MODE_VEB) {
7797 reg = IXGBE_PFDTXGSWC_VT_LBEN;
7798 adapter->flags2 |= IXGBE_FLAG2_BRIDGE_MODE_VEB;
7802 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, reg);
7804 e_info(drv, "enabling bridge mode: %s\n",
7805 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
7811 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7812 struct net_device *dev,
7815 struct ixgbe_adapter *adapter = netdev_priv(dev);
7818 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7821 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
7822 mode = BRIDGE_MODE_VEB;
7824 mode = BRIDGE_MODE_VEPA;
7826 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
7829 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
7831 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
7832 struct ixgbe_adapter *adapter = netdev_priv(pdev);
7837 if (vdev->num_rx_queues != vdev->num_tx_queues) {
7838 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
7840 return ERR_PTR(-EINVAL);
7843 /* Check for hardware restriction on number of rx/tx queues */
7844 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
7845 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
7847 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
7849 return ERR_PTR(-EINVAL);
7852 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7853 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
7854 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
7855 return ERR_PTR(-EBUSY);
7857 fwd_adapter = kcalloc(1, sizeof(struct ixgbe_fwd_adapter), GFP_KERNEL);
7859 return ERR_PTR(-ENOMEM);
7861 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
7862 adapter->num_rx_pools++;
7863 set_bit(pool, &adapter->fwd_bitmask);
7864 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7866 /* Enable VMDq flag so device will be set in VM mode */
7867 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
7868 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7869 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
7871 /* Force reinit of ring allocation with VMDQ enabled */
7872 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7875 fwd_adapter->pool = pool;
7876 fwd_adapter->real_adapter = adapter;
7877 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
7880 netif_tx_start_all_queues(vdev);
7883 /* unwind counter and free adapter struct */
7885 "%s: dfwd hardware acceleration failed\n", vdev->name);
7886 clear_bit(pool, &adapter->fwd_bitmask);
7887 adapter->num_rx_pools--;
7889 return ERR_PTR(err);
7892 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
7894 struct ixgbe_fwd_adapter *fwd_adapter = priv;
7895 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
7898 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
7899 adapter->num_rx_pools--;
7901 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7902 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7903 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
7904 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7905 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
7906 fwd_adapter->pool, adapter->num_rx_pools,
7907 fwd_adapter->rx_base_queue,
7908 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
7909 adapter->fwd_bitmask);
7913 static const struct net_device_ops ixgbe_netdev_ops = {
7914 .ndo_open = ixgbe_open,
7915 .ndo_stop = ixgbe_close,
7916 .ndo_start_xmit = ixgbe_xmit_frame,
7917 .ndo_select_queue = ixgbe_select_queue,
7918 .ndo_set_rx_mode = ixgbe_set_rx_mode,
7919 .ndo_validate_addr = eth_validate_addr,
7920 .ndo_set_mac_address = ixgbe_set_mac,
7921 .ndo_change_mtu = ixgbe_change_mtu,
7922 .ndo_tx_timeout = ixgbe_tx_timeout,
7923 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
7924 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
7925 .ndo_do_ioctl = ixgbe_ioctl,
7926 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
7927 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
7928 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
7929 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
7930 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
7931 .ndo_get_stats64 = ixgbe_get_stats64,
7932 #ifdef CONFIG_IXGBE_DCB
7933 .ndo_setup_tc = ixgbe_setup_tc,
7935 #ifdef CONFIG_NET_POLL_CONTROLLER
7936 .ndo_poll_controller = ixgbe_netpoll,
7938 #ifdef CONFIG_NET_RX_BUSY_POLL
7939 .ndo_busy_poll = ixgbe_low_latency_recv,
7942 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
7943 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
7944 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
7945 .ndo_fcoe_enable = ixgbe_fcoe_enable,
7946 .ndo_fcoe_disable = ixgbe_fcoe_disable,
7947 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
7948 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
7949 #endif /* IXGBE_FCOE */
7950 .ndo_set_features = ixgbe_set_features,
7951 .ndo_fix_features = ixgbe_fix_features,
7952 .ndo_fdb_add = ixgbe_ndo_fdb_add,
7953 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
7954 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
7955 .ndo_dfwd_add_station = ixgbe_fwd_add,
7956 .ndo_dfwd_del_station = ixgbe_fwd_del,
7960 * ixgbe_enumerate_functions - Get the number of ports this device has
7961 * @adapter: adapter structure
7963 * This function enumerates the phsyical functions co-located on a single slot,
7964 * in order to determine how many ports a device has. This is most useful in
7965 * determining the required GT/s of PCIe bandwidth necessary for optimal
7968 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
7970 struct pci_dev *entry, *pdev = adapter->pdev;
7973 /* Some cards can not use the generic count PCIe functions method,
7974 * because they are behind a parent switch, so we hardcode these with
7975 * the correct number of functions.
7977 if (ixgbe_pcie_from_parent(&adapter->hw))
7980 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
7981 /* don't count virtual functions */
7982 if (entry->is_virtfn)
7985 /* When the devices on the bus don't all match our device ID,
7986 * we can't reliably determine the correct number of
7987 * functions. This can occur if a function has been direct
7988 * attached to a virtual machine using VT-d, for example. In
7989 * this case, simply return -1 to indicate this.
7991 if ((entry->vendor != pdev->vendor) ||
7992 (entry->device != pdev->device))
8002 * ixgbe_wol_supported - Check whether device supports WoL
8003 * @hw: hw specific details
8004 * @device_id: the device ID
8005 * @subdev_id: the subsystem device ID
8007 * This function is used by probe and ethtool to determine
8008 * which devices have WoL support
8011 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8014 struct ixgbe_hw *hw = &adapter->hw;
8015 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8016 int is_wol_supported = 0;
8018 switch (device_id) {
8019 case IXGBE_DEV_ID_82599_SFP:
8020 /* Only these subdevices could supports WOL */
8021 switch (subdevice_id) {
8022 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8023 case IXGBE_SUBDEV_ID_82599_560FLR:
8024 /* only support first port */
8025 if (hw->bus.func != 0)
8027 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8028 case IXGBE_SUBDEV_ID_82599_SFP:
8029 case IXGBE_SUBDEV_ID_82599_RNDC:
8030 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8031 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8032 is_wol_supported = 1;
8036 case IXGBE_DEV_ID_82599EN_SFP:
8037 /* Only this subdevice supports WOL */
8038 switch (subdevice_id) {
8039 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8040 is_wol_supported = 1;
8044 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8045 /* All except this subdevice support WOL */
8046 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8047 is_wol_supported = 1;
8049 case IXGBE_DEV_ID_82599_KX4:
8050 is_wol_supported = 1;
8052 case IXGBE_DEV_ID_X540T:
8053 case IXGBE_DEV_ID_X540T1:
8054 /* check eeprom to see if enabled wol */
8055 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8056 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8057 (hw->bus.func == 0))) {
8058 is_wol_supported = 1;
8063 return is_wol_supported;
8067 * ixgbe_probe - Device Initialization Routine
8068 * @pdev: PCI device information struct
8069 * @ent: entry in ixgbe_pci_tbl
8071 * Returns 0 on success, negative on failure
8073 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8074 * The OS initialization, configuring of the adapter private structure,
8075 * and a hardware reset occur.
8077 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8079 struct net_device *netdev;
8080 struct ixgbe_adapter *adapter = NULL;
8081 struct ixgbe_hw *hw;
8082 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8083 static int cards_found;
8084 int i, err, pci_using_dac, expected_gts;
8085 unsigned int indices = MAX_TX_QUEUES;
8086 u8 part_str[IXGBE_PBANUM_LENGTH];
8092 /* Catch broken hardware that put the wrong VF device ID in
8093 * the PCIe SR-IOV capability.
8095 if (pdev->is_virtfn) {
8096 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8097 pci_name(pdev), pdev->vendor, pdev->device);
8101 err = pci_enable_device_mem(pdev);
8105 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8108 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8111 "No usable DMA configuration, aborting\n");
8117 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8118 IORESOURCE_MEM), ixgbe_driver_name);
8121 "pci_request_selected_regions failed 0x%x\n", err);
8125 pci_enable_pcie_error_reporting(pdev);
8127 pci_set_master(pdev);
8128 pci_save_state(pdev);
8130 if (ii->mac == ixgbe_mac_82598EB) {
8131 #ifdef CONFIG_IXGBE_DCB
8132 /* 8 TC w/ 4 queues per TC */
8133 indices = 4 * MAX_TRAFFIC_CLASS;
8135 indices = IXGBE_MAX_RSS_INDICES;
8139 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8142 goto err_alloc_etherdev;
8145 SET_NETDEV_DEV(netdev, &pdev->dev);
8147 adapter = netdev_priv(netdev);
8148 pci_set_drvdata(pdev, adapter);
8150 adapter->netdev = netdev;
8151 adapter->pdev = pdev;
8154 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8156 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8157 pci_resource_len(pdev, 0));
8158 adapter->io_addr = hw->hw_addr;
8164 netdev->netdev_ops = &ixgbe_netdev_ops;
8165 ixgbe_set_ethtool_ops(netdev);
8166 netdev->watchdog_timeo = 5 * HZ;
8167 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8169 adapter->bd_number = cards_found;
8172 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8173 hw->mac.type = ii->mac;
8176 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8177 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
8178 if (ixgbe_removed(hw->hw_addr)) {
8182 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8183 if (!(eec & (1 << 8)))
8184 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8187 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8188 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8189 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8190 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8191 hw->phy.mdio.mmds = 0;
8192 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8193 hw->phy.mdio.dev = netdev;
8194 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8195 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8197 ii->get_invariants(hw);
8199 /* setup the private structure */
8200 err = ixgbe_sw_init(adapter);
8204 /* Make it possible the adapter to be woken up via WOL */
8205 switch (adapter->hw.mac.type) {
8206 case ixgbe_mac_82599EB:
8207 case ixgbe_mac_X540:
8208 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8215 * If there is a fan on this device and it has failed log the
8218 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8219 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8220 if (esdp & IXGBE_ESDP_SDP1)
8221 e_crit(probe, "Fan has stopped, replace the adapter\n");
8224 if (allow_unsupported_sfp)
8225 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8227 /* reset_hw fills in the perm_addr as well */
8228 hw->phy.reset_if_overtemp = true;
8229 err = hw->mac.ops.reset_hw(hw);
8230 hw->phy.reset_if_overtemp = false;
8231 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
8232 hw->mac.type == ixgbe_mac_82598EB) {
8234 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8235 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8236 e_dev_err("Reload the driver after installing a supported module.\n");
8239 e_dev_err("HW Init failed: %d\n", err);
8243 #ifdef CONFIG_PCI_IOV
8244 /* SR-IOV not supported on the 82598 */
8245 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8248 ixgbe_init_mbx_params_pf(hw);
8249 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8250 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8251 ixgbe_enable_sriov(adapter);
8255 netdev->features = NETIF_F_SG |
8258 NETIF_F_HW_VLAN_CTAG_TX |
8259 NETIF_F_HW_VLAN_CTAG_RX |
8260 NETIF_F_HW_VLAN_CTAG_FILTER |
8266 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8268 switch (adapter->hw.mac.type) {
8269 case ixgbe_mac_82599EB:
8270 case ixgbe_mac_X540:
8271 netdev->features |= NETIF_F_SCTP_CSUM;
8272 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8279 netdev->hw_features |= NETIF_F_RXALL;
8281 netdev->vlan_features |= NETIF_F_TSO;
8282 netdev->vlan_features |= NETIF_F_TSO6;
8283 netdev->vlan_features |= NETIF_F_IP_CSUM;
8284 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8285 netdev->vlan_features |= NETIF_F_SG;
8287 netdev->priv_flags |= IFF_UNICAST_FLT;
8288 netdev->priv_flags |= IFF_SUPP_NOFCS;
8290 #ifdef CONFIG_IXGBE_DCB
8291 netdev->dcbnl_ops = &dcbnl_ops;
8295 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8296 unsigned int fcoe_l;
8298 if (hw->mac.ops.get_device_caps) {
8299 hw->mac.ops.get_device_caps(hw, &device_caps);
8300 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8301 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8305 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8306 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8308 netdev->features |= NETIF_F_FSO |
8311 netdev->vlan_features |= NETIF_F_FSO |
8315 #endif /* IXGBE_FCOE */
8316 if (pci_using_dac) {
8317 netdev->features |= NETIF_F_HIGHDMA;
8318 netdev->vlan_features |= NETIF_F_HIGHDMA;
8321 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8322 netdev->hw_features |= NETIF_F_LRO;
8323 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8324 netdev->features |= NETIF_F_LRO;
8326 /* make sure the EEPROM is good */
8327 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8328 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8333 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8335 if (!is_valid_ether_addr(netdev->dev_addr)) {
8336 e_dev_err("invalid MAC address\n");
8341 ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8343 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8344 (unsigned long) adapter);
8346 if (ixgbe_removed(hw->hw_addr)) {
8350 INIT_WORK(&adapter->service_task, ixgbe_service_task);
8351 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8352 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8354 err = ixgbe_init_interrupt_scheme(adapter);
8358 /* WOL not supported for all devices */
8360 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8361 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8362 pdev->subsystem_device);
8363 if (hw->wol_enabled)
8364 adapter->wol = IXGBE_WUFC_MAG;
8366 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8368 /* save off EEPROM version number */
8369 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8370 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8372 /* pick up the PCI bus settings for reporting later */
8373 hw->mac.ops.get_bus_info(hw);
8374 if (ixgbe_pcie_from_parent(hw))
8375 ixgbe_get_parent_bus_info(adapter);
8377 /* calculate the expected PCIe bandwidth required for optimal
8378 * performance. Note that some older parts will never have enough
8379 * bandwidth due to being older generation PCIe parts. We clamp these
8380 * parts to ensure no warning is displayed if it can't be fixed.
8382 switch (hw->mac.type) {
8383 case ixgbe_mac_82598EB:
8384 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8387 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8391 /* don't check link if we failed to enumerate functions */
8392 if (expected_gts > 0)
8393 ixgbe_check_minimum_link(adapter, expected_gts);
8395 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8397 strlcpy(part_str, "Unknown", sizeof(part_str));
8398 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8399 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8400 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8403 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8404 hw->mac.type, hw->phy.type, part_str);
8406 e_dev_info("%pM\n", netdev->dev_addr);
8408 /* reset the hardware with the new settings */
8409 err = hw->mac.ops.start_hw(hw);
8410 if (err == IXGBE_ERR_EEPROM_VERSION) {
8411 /* We are running on a pre-production device, log a warning */
8412 e_dev_warn("This device is a pre-production adapter/LOM. "
8413 "Please be aware there may be issues associated "
8414 "with your hardware. If you are experiencing "
8415 "problems please contact your Intel or hardware "
8416 "representative who provided you with this "
8419 strcpy(netdev->name, "eth%d");
8420 err = register_netdev(netdev);
8424 /* power down the optics for 82599 SFP+ fiber */
8425 if (hw->mac.ops.disable_tx_laser)
8426 hw->mac.ops.disable_tx_laser(hw);
8428 /* carrier off reporting is important to ethtool even BEFORE open */
8429 netif_carrier_off(netdev);
8431 #ifdef CONFIG_IXGBE_DCA
8432 if (dca_add_requester(&pdev->dev) == 0) {
8433 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8434 ixgbe_setup_dca(adapter);
8437 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8438 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8439 for (i = 0; i < adapter->num_vfs; i++)
8440 ixgbe_vf_configuration(pdev, (i | 0x10000000));
8443 /* firmware requires driver version to be 0xFFFFFFFF
8444 * since os does not support feature
8446 if (hw->mac.ops.set_fw_drv_ver)
8447 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8450 /* add san mac addr to netdev */
8451 ixgbe_add_sanmac_netdev(netdev);
8453 e_dev_info("%s\n", ixgbe_default_device_descr);
8456 #ifdef CONFIG_IXGBE_HWMON
8457 if (ixgbe_sysfs_init(adapter))
8458 e_err(probe, "failed to allocate sysfs resources\n");
8459 #endif /* CONFIG_IXGBE_HWMON */
8461 ixgbe_dbg_adapter_init(adapter);
8463 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8464 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
8465 hw->mac.ops.setup_link(hw,
8466 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8472 ixgbe_release_hw_control(adapter);
8473 ixgbe_clear_interrupt_scheme(adapter);
8475 ixgbe_disable_sriov(adapter);
8476 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8477 iounmap(adapter->io_addr);
8478 kfree(adapter->mac_table);
8480 free_netdev(netdev);
8482 pci_release_selected_regions(pdev,
8483 pci_select_bars(pdev, IORESOURCE_MEM));
8486 if (!adapter || !test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8487 pci_disable_device(pdev);
8492 * ixgbe_remove - Device Removal Routine
8493 * @pdev: PCI device information struct
8495 * ixgbe_remove is called by the PCI subsystem to alert the driver
8496 * that it should release a PCI device. The could be caused by a
8497 * Hot-Plug event, or because the driver is going to be removed from
8500 static void ixgbe_remove(struct pci_dev *pdev)
8502 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8503 struct net_device *netdev = adapter->netdev;
8505 ixgbe_dbg_adapter_exit(adapter);
8507 set_bit(__IXGBE_REMOVING, &adapter->state);
8508 cancel_work_sync(&adapter->service_task);
8511 #ifdef CONFIG_IXGBE_DCA
8512 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
8513 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
8514 dca_remove_requester(&pdev->dev);
8515 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
8519 #ifdef CONFIG_IXGBE_HWMON
8520 ixgbe_sysfs_exit(adapter);
8521 #endif /* CONFIG_IXGBE_HWMON */
8523 /* remove the added san mac */
8524 ixgbe_del_sanmac_netdev(netdev);
8526 if (netdev->reg_state == NETREG_REGISTERED)
8527 unregister_netdev(netdev);
8529 #ifdef CONFIG_PCI_IOV
8531 * Only disable SR-IOV on unload if the user specified the now
8532 * deprecated max_vfs module parameter.
8535 ixgbe_disable_sriov(adapter);
8537 ixgbe_clear_interrupt_scheme(adapter);
8539 ixgbe_release_hw_control(adapter);
8542 kfree(adapter->ixgbe_ieee_pfc);
8543 kfree(adapter->ixgbe_ieee_ets);
8546 iounmap(adapter->io_addr);
8547 pci_release_selected_regions(pdev, pci_select_bars(pdev,
8550 e_dev_info("complete\n");
8552 kfree(adapter->mac_table);
8553 free_netdev(netdev);
8555 pci_disable_pcie_error_reporting(pdev);
8557 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8558 pci_disable_device(pdev);
8562 * ixgbe_io_error_detected - called when PCI error is detected
8563 * @pdev: Pointer to PCI device
8564 * @state: The current pci connection state
8566 * This function is called after a PCI bus error affecting
8567 * this device has been detected.
8569 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
8570 pci_channel_state_t state)
8572 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8573 struct net_device *netdev = adapter->netdev;
8575 #ifdef CONFIG_PCI_IOV
8576 struct ixgbe_hw *hw = &adapter->hw;
8577 struct pci_dev *bdev, *vfdev;
8578 u32 dw0, dw1, dw2, dw3;
8580 u16 req_id, pf_func;
8582 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
8583 adapter->num_vfs == 0)
8584 goto skip_bad_vf_detection;
8586 bdev = pdev->bus->self;
8587 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
8588 bdev = bdev->bus->self;
8591 goto skip_bad_vf_detection;
8593 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
8595 goto skip_bad_vf_detection;
8597 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
8598 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
8599 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
8600 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
8601 if (ixgbe_removed(hw->hw_addr))
8602 goto skip_bad_vf_detection;
8605 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8606 if (!(req_id & 0x0080))
8607 goto skip_bad_vf_detection;
8609 pf_func = req_id & 0x01;
8610 if ((pf_func & 1) == (pdev->devfn & 1)) {
8611 unsigned int device_id;
8613 vf = (req_id & 0x7F) >> 1;
8614 e_dev_err("VF %d has caused a PCIe error\n", vf);
8615 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8616 "%8.8x\tdw3: %8.8x\n",
8617 dw0, dw1, dw2, dw3);
8618 switch (adapter->hw.mac.type) {
8619 case ixgbe_mac_82599EB:
8620 device_id = IXGBE_82599_VF_DEVICE_ID;
8622 case ixgbe_mac_X540:
8623 device_id = IXGBE_X540_VF_DEVICE_ID;
8630 /* Find the pci device of the offending VF */
8631 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
8633 if (vfdev->devfn == (req_id & 0xFF))
8635 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
8639 * There's a slim chance the VF could have been hot plugged,
8640 * so if it is no longer present we don't need to issue the
8641 * VFLR. Just clean up the AER in that case.
8644 e_dev_err("Issuing VFLR to VF %d\n", vf);
8645 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
8646 /* Free device reference count */
8650 pci_cleanup_aer_uncorrect_error_status(pdev);
8654 * Even though the error may have occurred on the other port
8655 * we still need to increment the vf error reference count for
8656 * both ports because the I/O resume function will be called
8659 adapter->vferr_refcount++;
8661 return PCI_ERS_RESULT_RECOVERED;
8663 skip_bad_vf_detection:
8664 #endif /* CONFIG_PCI_IOV */
8665 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
8666 return PCI_ERS_RESULT_DISCONNECT;
8669 netif_device_detach(netdev);
8671 if (state == pci_channel_io_perm_failure) {
8673 return PCI_ERS_RESULT_DISCONNECT;
8676 if (netif_running(netdev))
8677 ixgbe_down(adapter);
8679 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8680 pci_disable_device(pdev);
8683 /* Request a slot reset. */
8684 return PCI_ERS_RESULT_NEED_RESET;
8688 * ixgbe_io_slot_reset - called after the pci bus has been reset.
8689 * @pdev: Pointer to PCI device
8691 * Restart the card from scratch, as if from a cold-boot.
8693 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
8695 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8696 pci_ers_result_t result;
8699 if (pci_enable_device_mem(pdev)) {
8700 e_err(probe, "Cannot re-enable PCI device after reset.\n");
8701 result = PCI_ERS_RESULT_DISCONNECT;
8703 smp_mb__before_atomic();
8704 clear_bit(__IXGBE_DISABLED, &adapter->state);
8705 adapter->hw.hw_addr = adapter->io_addr;
8706 pci_set_master(pdev);
8707 pci_restore_state(pdev);
8708 pci_save_state(pdev);
8710 pci_wake_from_d3(pdev, false);
8712 ixgbe_reset(adapter);
8713 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8714 result = PCI_ERS_RESULT_RECOVERED;
8717 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8719 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
8720 "failed 0x%0x\n", err);
8721 /* non-fatal, continue */
8728 * ixgbe_io_resume - called when traffic can start flowing again.
8729 * @pdev: Pointer to PCI device
8731 * This callback is called when the error recovery driver tells us that
8732 * its OK to resume normal operation.
8734 static void ixgbe_io_resume(struct pci_dev *pdev)
8736 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8737 struct net_device *netdev = adapter->netdev;
8739 #ifdef CONFIG_PCI_IOV
8740 if (adapter->vferr_refcount) {
8741 e_info(drv, "Resuming after VF err\n");
8742 adapter->vferr_refcount--;
8747 if (netif_running(netdev))
8750 netif_device_attach(netdev);
8753 static const struct pci_error_handlers ixgbe_err_handler = {
8754 .error_detected = ixgbe_io_error_detected,
8755 .slot_reset = ixgbe_io_slot_reset,
8756 .resume = ixgbe_io_resume,
8759 static struct pci_driver ixgbe_driver = {
8760 .name = ixgbe_driver_name,
8761 .id_table = ixgbe_pci_tbl,
8762 .probe = ixgbe_probe,
8763 .remove = ixgbe_remove,
8765 .suspend = ixgbe_suspend,
8766 .resume = ixgbe_resume,
8768 .shutdown = ixgbe_shutdown,
8769 .sriov_configure = ixgbe_pci_sriov_configure,
8770 .err_handler = &ixgbe_err_handler
8774 * ixgbe_init_module - Driver Registration Routine
8776 * ixgbe_init_module is the first routine called when the driver is
8777 * loaded. All it does is register with the PCI subsystem.
8779 static int __init ixgbe_init_module(void)
8782 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
8783 pr_info("%s\n", ixgbe_copyright);
8787 ret = pci_register_driver(&ixgbe_driver);
8793 #ifdef CONFIG_IXGBE_DCA
8794 dca_register_notify(&dca_notifier);
8800 module_init(ixgbe_init_module);
8803 * ixgbe_exit_module - Driver Exit Cleanup Routine
8805 * ixgbe_exit_module is called just before the driver is removed
8808 static void __exit ixgbe_exit_module(void)
8810 #ifdef CONFIG_IXGBE_DCA
8811 dca_unregister_notify(&dca_notifier);
8813 pci_unregister_driver(&ixgbe_driver);
8817 rcu_barrier(); /* Wait for completion of call_rcu()'s */
8820 #ifdef CONFIG_IXGBE_DCA
8821 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
8826 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
8827 __ixgbe_notify_dca);
8829 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
8832 #endif /* CONFIG_IXGBE_DCA */
8834 module_exit(ixgbe_exit_module);