1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
148 mem->va = kzalloc(size, GFP_KERNEL);
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
163 /* it's ok to kfree a NULL pointer */
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
178 * Returns the base item index of the lump, or negative for error
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
217 pile->search_hint = i + j;
220 /* not enough, so skip over it and continue looking */
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
234 * Returns the count of items in the lump
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
238 int valid_id = (id | I40E_PILE_VALID_BIT);
242 if (!pile || index >= pile->num_entries)
246 i < pile->num_entries && pile->list[i] == valid_id;
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
278 * If not already scheduled, this puts the task into the work queue
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
297 void i40e_tx_timeout(struct net_device *netdev)
299 static void i40e_tx_timeout(struct net_device *netdev)
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
309 pf->tx_timeout_count++;
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
320 (trans_start + netdev->watchdog_timeo))) {
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
367 switch (pf->tx_timeout_recovery_level) {
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
393 rx_ring->next_to_use = val;
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
401 writel(val, rx_ring->tail);
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
413 return &vsi->net_stats;
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
439 if (test_bit(__I40E_DOWN, &vsi->state))
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
493 struct rtnl_link_stats64 *ns;
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0 ,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0 ,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
516 vsi->stat_offsets_loaded = false;
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
531 for (i = 0; i < I40E_MAX_VEB; i++) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
566 new_data = rd64(hw, loreg);
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
590 new_data = rd32(hw, reg);
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
678 idx = veb->stats_idx;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
740 veb->stat_offsets_loaded = true;
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
756 if (vsi->type != I40E_VSI_FCOE)
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
788 vsi->fcoe_stat_offsets_loaded = true;
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
836 dcb_cfg = &hw->local_dcbx_config;
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
846 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
847 pf->stat_offsets_loaded,
848 &osd->priority_xoff_rx[i],
849 &nsd->priority_xoff_rx[i]);
851 /* No new PFC xoff rx */
852 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
854 /* Get the TC for given priority */
855 tc = dcb_cfg->etscfg.prioritytable[i];
861 * i40e_update_vsi_stats - Update the vsi statistics counters.
862 * @vsi: the VSI to be updated
864 * There are a few instances where we store the same stat in a
865 * couple of different structs. This is partly because we have
866 * the netdev stats that need to be filled out, which is slightly
867 * different from the "eth_stats" defined by the chip and used in
868 * VF communications. We sort it out here.
870 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
872 struct i40e_pf *pf = vsi->back;
873 struct rtnl_link_stats64 *ons;
874 struct rtnl_link_stats64 *ns; /* netdev stats */
875 struct i40e_eth_stats *oes;
876 struct i40e_eth_stats *es; /* device's eth stats */
877 u32 tx_restart, tx_busy;
887 if (test_bit(__I40E_DOWN, &vsi->state) ||
888 test_bit(__I40E_CONFIG_BUSY, &pf->state))
891 ns = i40e_get_vsi_stats_struct(vsi);
892 ons = &vsi->net_stats_offsets;
893 es = &vsi->eth_stats;
894 oes = &vsi->eth_stats_offsets;
896 /* Gather up the netdev and vsi stats that the driver collects
897 * on the fly during packet processing
901 tx_restart = tx_busy = tx_linearize = 0;
905 for (q = 0; q < vsi->num_queue_pairs; q++) {
907 p = ACCESS_ONCE(vsi->tx_rings[q]);
910 start = u64_stats_fetch_begin_irq(&p->syncp);
911 packets = p->stats.packets;
912 bytes = p->stats.bytes;
913 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
916 tx_restart += p->tx_stats.restart_queue;
917 tx_busy += p->tx_stats.tx_busy;
918 tx_linearize += p->tx_stats.tx_linearize;
920 /* Rx queue is part of the same block as Tx queue */
923 start = u64_stats_fetch_begin_irq(&p->syncp);
924 packets = p->stats.packets;
925 bytes = p->stats.bytes;
926 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
929 rx_buf += p->rx_stats.alloc_buff_failed;
930 rx_page += p->rx_stats.alloc_page_failed;
933 vsi->tx_restart = tx_restart;
934 vsi->tx_busy = tx_busy;
935 vsi->tx_linearize = tx_linearize;
936 vsi->rx_page_failed = rx_page;
937 vsi->rx_buf_failed = rx_buf;
939 ns->rx_packets = rx_p;
941 ns->tx_packets = tx_p;
944 /* update netdev stats from eth stats */
945 i40e_update_eth_stats(vsi);
946 ons->tx_errors = oes->tx_errors;
947 ns->tx_errors = es->tx_errors;
948 ons->multicast = oes->rx_multicast;
949 ns->multicast = es->rx_multicast;
950 ons->rx_dropped = oes->rx_discards;
951 ns->rx_dropped = es->rx_discards;
952 ons->tx_dropped = oes->tx_discards;
953 ns->tx_dropped = es->tx_discards;
955 /* pull in a couple PF stats if this is the main vsi */
956 if (vsi == pf->vsi[pf->lan_vsi]) {
957 ns->rx_crc_errors = pf->stats.crc_errors;
958 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
959 ns->rx_length_errors = pf->stats.rx_length_errors;
964 * i40e_update_pf_stats - Update the PF statistics counters.
965 * @pf: the PF to be updated
967 static void i40e_update_pf_stats(struct i40e_pf *pf)
969 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
970 struct i40e_hw_port_stats *nsd = &pf->stats;
971 struct i40e_hw *hw = &pf->hw;
975 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
976 I40E_GLPRT_GORCL(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
979 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
980 I40E_GLPRT_GOTCL(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
983 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->eth.rx_discards,
986 &nsd->eth.rx_discards);
987 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
988 I40E_GLPRT_UPRCL(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->eth.rx_unicast,
991 &nsd->eth.rx_unicast);
992 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
993 I40E_GLPRT_MPRCL(hw->port),
994 pf->stat_offsets_loaded,
995 &osd->eth.rx_multicast,
996 &nsd->eth.rx_multicast);
997 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
998 I40E_GLPRT_BPRCL(hw->port),
999 pf->stat_offsets_loaded,
1000 &osd->eth.rx_broadcast,
1001 &nsd->eth.rx_broadcast);
1002 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1003 I40E_GLPRT_UPTCL(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->eth.tx_unicast,
1006 &nsd->eth.tx_unicast);
1007 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1008 I40E_GLPRT_MPTCL(hw->port),
1009 pf->stat_offsets_loaded,
1010 &osd->eth.tx_multicast,
1011 &nsd->eth.tx_multicast);
1012 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1013 I40E_GLPRT_BPTCL(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->eth.tx_broadcast,
1016 &nsd->eth.tx_broadcast);
1018 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1019 pf->stat_offsets_loaded,
1020 &osd->tx_dropped_link_down,
1021 &nsd->tx_dropped_link_down);
1023 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->crc_errors, &nsd->crc_errors);
1027 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->illegal_bytes, &nsd->illegal_bytes);
1031 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->mac_local_faults,
1034 &nsd->mac_local_faults);
1035 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->mac_remote_faults,
1038 &nsd->mac_remote_faults);
1040 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->rx_length_errors,
1043 &nsd->rx_length_errors);
1045 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->link_xon_rx, &nsd->link_xon_rx);
1048 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->link_xon_tx, &nsd->link_xon_tx);
1051 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1052 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1056 for (i = 0; i < 8; i++) {
1057 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1058 pf->stat_offsets_loaded,
1059 &osd->priority_xon_rx[i],
1060 &nsd->priority_xon_rx[i]);
1061 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1062 pf->stat_offsets_loaded,
1063 &osd->priority_xon_tx[i],
1064 &nsd->priority_xon_tx[i]);
1065 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1066 pf->stat_offsets_loaded,
1067 &osd->priority_xoff_tx[i],
1068 &nsd->priority_xoff_tx[i]);
1069 i40e_stat_update32(hw,
1070 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1071 pf->stat_offsets_loaded,
1072 &osd->priority_xon_2_xoff[i],
1073 &nsd->priority_xon_2_xoff[i]);
1076 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1077 I40E_GLPRT_PRC64L(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_size_64, &nsd->rx_size_64);
1080 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1081 I40E_GLPRT_PRC127L(hw->port),
1082 pf->stat_offsets_loaded,
1083 &osd->rx_size_127, &nsd->rx_size_127);
1084 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1085 I40E_GLPRT_PRC255L(hw->port),
1086 pf->stat_offsets_loaded,
1087 &osd->rx_size_255, &nsd->rx_size_255);
1088 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1089 I40E_GLPRT_PRC511L(hw->port),
1090 pf->stat_offsets_loaded,
1091 &osd->rx_size_511, &nsd->rx_size_511);
1092 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1093 I40E_GLPRT_PRC1023L(hw->port),
1094 pf->stat_offsets_loaded,
1095 &osd->rx_size_1023, &nsd->rx_size_1023);
1096 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1097 I40E_GLPRT_PRC1522L(hw->port),
1098 pf->stat_offsets_loaded,
1099 &osd->rx_size_1522, &nsd->rx_size_1522);
1100 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1101 I40E_GLPRT_PRC9522L(hw->port),
1102 pf->stat_offsets_loaded,
1103 &osd->rx_size_big, &nsd->rx_size_big);
1105 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1106 I40E_GLPRT_PTC64L(hw->port),
1107 pf->stat_offsets_loaded,
1108 &osd->tx_size_64, &nsd->tx_size_64);
1109 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1110 I40E_GLPRT_PTC127L(hw->port),
1111 pf->stat_offsets_loaded,
1112 &osd->tx_size_127, &nsd->tx_size_127);
1113 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1114 I40E_GLPRT_PTC255L(hw->port),
1115 pf->stat_offsets_loaded,
1116 &osd->tx_size_255, &nsd->tx_size_255);
1117 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1118 I40E_GLPRT_PTC511L(hw->port),
1119 pf->stat_offsets_loaded,
1120 &osd->tx_size_511, &nsd->tx_size_511);
1121 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1122 I40E_GLPRT_PTC1023L(hw->port),
1123 pf->stat_offsets_loaded,
1124 &osd->tx_size_1023, &nsd->tx_size_1023);
1125 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1126 I40E_GLPRT_PTC1522L(hw->port),
1127 pf->stat_offsets_loaded,
1128 &osd->tx_size_1522, &nsd->tx_size_1522);
1129 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1130 I40E_GLPRT_PTC9522L(hw->port),
1131 pf->stat_offsets_loaded,
1132 &osd->tx_size_big, &nsd->tx_size_big);
1134 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1135 pf->stat_offsets_loaded,
1136 &osd->rx_undersize, &nsd->rx_undersize);
1137 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->rx_fragments, &nsd->rx_fragments);
1140 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1141 pf->stat_offsets_loaded,
1142 &osd->rx_oversize, &nsd->rx_oversize);
1143 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1144 pf->stat_offsets_loaded,
1145 &osd->rx_jabber, &nsd->rx_jabber);
1148 i40e_stat_update32(hw,
1149 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1150 pf->stat_offsets_loaded,
1151 &osd->fd_atr_match, &nsd->fd_atr_match);
1152 i40e_stat_update32(hw,
1153 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1154 pf->stat_offsets_loaded,
1155 &osd->fd_sb_match, &nsd->fd_sb_match);
1156 i40e_stat_update32(hw,
1157 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1158 pf->stat_offsets_loaded,
1159 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1161 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1162 nsd->tx_lpi_status =
1163 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1164 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1165 nsd->rx_lpi_status =
1166 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1167 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1168 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1169 pf->stat_offsets_loaded,
1170 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1171 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1172 pf->stat_offsets_loaded,
1173 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1175 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1176 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1177 nsd->fd_sb_status = true;
1179 nsd->fd_sb_status = false;
1181 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1182 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1183 nsd->fd_atr_status = true;
1185 nsd->fd_atr_status = false;
1187 pf->stat_offsets_loaded = true;
1191 * i40e_update_stats - Update the various statistics counters.
1192 * @vsi: the VSI to be updated
1194 * Update the various stats for this VSI and its related entities.
1196 void i40e_update_stats(struct i40e_vsi *vsi)
1198 struct i40e_pf *pf = vsi->back;
1200 if (vsi == pf->vsi[pf->lan_vsi])
1201 i40e_update_pf_stats(pf);
1203 i40e_update_vsi_stats(vsi);
1205 i40e_update_fcoe_stats(vsi);
1210 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1211 * @vsi: the VSI to be searched
1212 * @macaddr: the MAC address
1214 * @is_vf: make sure its a VF filter, else doesn't matter
1215 * @is_netdev: make sure its a netdev filter, else doesn't matter
1217 * Returns ptr to the filter object or NULL
1219 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1220 u8 *macaddr, s16 vlan,
1221 bool is_vf, bool is_netdev)
1223 struct i40e_mac_filter *f;
1225 if (!vsi || !macaddr)
1228 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1229 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1230 (vlan == f->vlan) &&
1231 (!is_vf || f->is_vf) &&
1232 (!is_netdev || f->is_netdev))
1239 * i40e_find_mac - Find a mac addr in the macvlan filters list
1240 * @vsi: the VSI to be searched
1241 * @macaddr: the MAC address we are searching for
1242 * @is_vf: make sure its a VF filter, else doesn't matter
1243 * @is_netdev: make sure its a netdev filter, else doesn't matter
1245 * Returns the first filter with the provided MAC address or NULL if
1246 * MAC address was not found
1248 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1249 bool is_vf, bool is_netdev)
1251 struct i40e_mac_filter *f;
1253 if (!vsi || !macaddr)
1256 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1257 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1258 (!is_vf || f->is_vf) &&
1259 (!is_netdev || f->is_netdev))
1266 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1267 * @vsi: the VSI to be searched
1269 * Returns true if VSI is in vlan mode or false otherwise
1271 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1273 struct i40e_mac_filter *f;
1275 /* Only -1 for all the filters denotes not in vlan mode
1276 * so we have to go through all the list in order to make sure
1278 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1279 if (f->vlan >= 0 || vsi->info.pvid)
1287 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1288 * @vsi: the VSI to be searched
1289 * @macaddr: the mac address to be filtered
1290 * @is_vf: true if it is a VF
1291 * @is_netdev: true if it is a netdev
1293 * Goes through all the macvlan filters and adds a
1294 * macvlan filter for each unique vlan that already exists
1296 * Returns first filter found on success, else NULL
1298 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1299 bool is_vf, bool is_netdev)
1301 struct i40e_mac_filter *f;
1303 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1305 f->vlan = le16_to_cpu(vsi->info.pvid);
1306 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1307 is_vf, is_netdev)) {
1308 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1314 return list_first_entry_or_null(&vsi->mac_filter_list,
1315 struct i40e_mac_filter, list);
1319 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1320 * @vsi: the PF Main VSI - inappropriate for any other VSI
1321 * @macaddr: the MAC address
1323 * Some older firmware configurations set up a default promiscuous VLAN
1324 * filter that needs to be removed.
1326 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1328 struct i40e_aqc_remove_macvlan_element_data element;
1329 struct i40e_pf *pf = vsi->back;
1332 /* Only appropriate for the PF main VSI */
1333 if (vsi->type != I40E_VSI_MAIN)
1336 memset(&element, 0, sizeof(element));
1337 ether_addr_copy(element.mac_addr, macaddr);
1338 element.vlan_tag = 0;
1339 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1340 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1341 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1349 * i40e_add_filter - Add a mac/vlan filter to the VSI
1350 * @vsi: the VSI to be searched
1351 * @macaddr: the MAC address
1353 * @is_vf: make sure its a VF filter, else doesn't matter
1354 * @is_netdev: make sure its a netdev filter, else doesn't matter
1356 * Returns ptr to the filter object or NULL when no memory available.
1358 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1359 u8 *macaddr, s16 vlan,
1360 bool is_vf, bool is_netdev)
1362 struct i40e_mac_filter *f;
1364 if (!vsi || !macaddr)
1367 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1369 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1371 goto add_filter_out;
1373 ether_addr_copy(f->macaddr, macaddr);
1377 INIT_LIST_HEAD(&f->list);
1378 list_add(&f->list, &vsi->mac_filter_list);
1381 /* increment counter and add a new flag if needed */
1387 } else if (is_netdev) {
1388 if (!f->is_netdev) {
1389 f->is_netdev = true;
1396 /* changed tells sync_filters_subtask to
1397 * push the filter down to the firmware
1400 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1401 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1409 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1410 * @vsi: the VSI to be searched
1411 * @macaddr: the MAC address
1413 * @is_vf: make sure it's a VF filter, else doesn't matter
1414 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1416 void i40e_del_filter(struct i40e_vsi *vsi,
1417 u8 *macaddr, s16 vlan,
1418 bool is_vf, bool is_netdev)
1420 struct i40e_mac_filter *f;
1422 if (!vsi || !macaddr)
1425 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1426 if (!f || f->counter == 0)
1434 } else if (is_netdev) {
1436 f->is_netdev = false;
1440 /* make sure we don't remove a filter in use by VF or netdev */
1442 min_f += (f->is_vf ? 1 : 0);
1443 min_f += (f->is_netdev ? 1 : 0);
1445 if (f->counter > min_f)
1449 /* counter == 0 tells sync_filters_subtask to
1450 * remove the filter from the firmware's list
1452 if (f->counter == 0) {
1454 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1455 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1460 * i40e_set_mac - NDO callback to set mac address
1461 * @netdev: network interface device structure
1462 * @p: pointer to an address structure
1464 * Returns 0 on success, negative on failure
1467 int i40e_set_mac(struct net_device *netdev, void *p)
1469 static int i40e_set_mac(struct net_device *netdev, void *p)
1472 struct i40e_netdev_priv *np = netdev_priv(netdev);
1473 struct i40e_vsi *vsi = np->vsi;
1474 struct i40e_pf *pf = vsi->back;
1475 struct i40e_hw *hw = &pf->hw;
1476 struct sockaddr *addr = p;
1477 struct i40e_mac_filter *f;
1479 if (!is_valid_ether_addr(addr->sa_data))
1480 return -EADDRNOTAVAIL;
1482 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1483 netdev_info(netdev, "already using mac address %pM\n",
1488 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1489 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1490 return -EADDRNOTAVAIL;
1492 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1493 netdev_info(netdev, "returning to hw mac address %pM\n",
1496 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1498 if (vsi->type == I40E_VSI_MAIN) {
1500 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1501 I40E_AQC_WRITE_TYPE_LAA_WOL,
1502 addr->sa_data, NULL);
1505 "Addr change for Main VSI failed: %d\n",
1507 return -EADDRNOTAVAIL;
1511 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1512 struct i40e_aqc_remove_macvlan_element_data element;
1514 memset(&element, 0, sizeof(element));
1515 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1516 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1517 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1519 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1523 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1524 struct i40e_aqc_add_macvlan_element_data element;
1526 memset(&element, 0, sizeof(element));
1527 ether_addr_copy(element.mac_addr, hw->mac.addr);
1528 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1529 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1531 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1537 i40e_sync_vsi_filters(vsi, false);
1538 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1544 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1545 * @vsi: the VSI being setup
1546 * @ctxt: VSI context structure
1547 * @enabled_tc: Enabled TCs bitmap
1548 * @is_add: True if called before Add VSI
1550 * Setup VSI queue mapping for enabled traffic classes.
1553 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1554 struct i40e_vsi_context *ctxt,
1558 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1559 struct i40e_vsi_context *ctxt,
1564 struct i40e_pf *pf = vsi->back;
1574 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1577 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1578 /* Find numtc from enabled TC bitmap */
1579 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1580 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1584 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1588 /* At least TC0 is enabled in case of non-DCB case */
1592 vsi->tc_config.numtc = numtc;
1593 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1594 /* Number of queues per enabled TC */
1595 /* In MFP case we can have a much lower count of MSIx
1596 * vectors available and so we need to lower the used
1599 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1600 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1602 qcount = vsi->alloc_queue_pairs;
1603 num_tc_qps = qcount / numtc;
1604 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1606 /* Setup queue offset/count for all TCs for given VSI */
1607 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1608 /* See if the given TC is enabled for the given VSI */
1609 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1613 switch (vsi->type) {
1615 qcount = min_t(int, pf->rss_size, num_tc_qps);
1619 qcount = num_tc_qps;
1623 case I40E_VSI_SRIOV:
1624 case I40E_VSI_VMDQ2:
1626 qcount = num_tc_qps;
1630 vsi->tc_config.tc_info[i].qoffset = offset;
1631 vsi->tc_config.tc_info[i].qcount = qcount;
1633 /* find the next higher power-of-2 of num queue pairs */
1636 while (num_qps && (BIT_ULL(pow) < qcount)) {
1641 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1643 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1644 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1648 /* TC is not enabled so set the offset to
1649 * default queue and allocate one queue
1652 vsi->tc_config.tc_info[i].qoffset = 0;
1653 vsi->tc_config.tc_info[i].qcount = 1;
1654 vsi->tc_config.tc_info[i].netdev_tc = 0;
1658 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1661 /* Set actual Tx/Rx queue pairs */
1662 vsi->num_queue_pairs = offset;
1663 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1664 if (vsi->req_queue_pairs > 0)
1665 vsi->num_queue_pairs = vsi->req_queue_pairs;
1666 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1667 vsi->num_queue_pairs = pf->num_lan_msix;
1670 /* Scheduler section valid can only be set for ADD VSI */
1672 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1674 ctxt->info.up_enable_bits = enabled_tc;
1676 if (vsi->type == I40E_VSI_SRIOV) {
1677 ctxt->info.mapping_flags |=
1678 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1679 for (i = 0; i < vsi->num_queue_pairs; i++)
1680 ctxt->info.queue_mapping[i] =
1681 cpu_to_le16(vsi->base_queue + i);
1683 ctxt->info.mapping_flags |=
1684 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1685 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1687 ctxt->info.valid_sections |= cpu_to_le16(sections);
1691 * i40e_set_rx_mode - NDO callback to set the netdev filters
1692 * @netdev: network interface device structure
1695 void i40e_set_rx_mode(struct net_device *netdev)
1697 static void i40e_set_rx_mode(struct net_device *netdev)
1700 struct i40e_netdev_priv *np = netdev_priv(netdev);
1701 struct i40e_mac_filter *f, *ftmp;
1702 struct i40e_vsi *vsi = np->vsi;
1703 struct netdev_hw_addr *uca;
1704 struct netdev_hw_addr *mca;
1705 struct netdev_hw_addr *ha;
1707 /* add addr if not already in the filter list */
1708 netdev_for_each_uc_addr(uca, netdev) {
1709 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1710 if (i40e_is_vsi_in_vlan(vsi))
1711 i40e_put_mac_in_vlan(vsi, uca->addr,
1714 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1719 netdev_for_each_mc_addr(mca, netdev) {
1720 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1721 if (i40e_is_vsi_in_vlan(vsi))
1722 i40e_put_mac_in_vlan(vsi, mca->addr,
1725 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1730 /* remove filter if not in netdev list */
1731 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1736 netdev_for_each_mc_addr(mca, netdev)
1737 if (ether_addr_equal(mca->addr, f->macaddr))
1738 goto bottom_of_search_loop;
1740 netdev_for_each_uc_addr(uca, netdev)
1741 if (ether_addr_equal(uca->addr, f->macaddr))
1742 goto bottom_of_search_loop;
1744 for_each_dev_addr(netdev, ha)
1745 if (ether_addr_equal(ha->addr, f->macaddr))
1746 goto bottom_of_search_loop;
1748 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1749 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1751 bottom_of_search_loop:
1755 /* check for other flag changes */
1756 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1757 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1758 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1763 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1764 * @vsi: ptr to the VSI
1765 * @grab_rtnl: whether RTNL needs to be grabbed
1767 * Push any outstanding VSI filter changes through the AdminQ.
1769 * Returns 0 or error value
1771 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1773 struct i40e_mac_filter *f, *ftmp;
1774 bool promisc_forced_on = false;
1775 bool add_happened = false;
1776 int filter_list_len = 0;
1777 u32 changed_flags = 0;
1778 i40e_status ret = 0;
1785 /* empty array typed pointers, kcalloc later */
1786 struct i40e_aqc_add_macvlan_element_data *add_list;
1787 struct i40e_aqc_remove_macvlan_element_data *del_list;
1789 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1790 usleep_range(1000, 2000);
1794 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1795 vsi->current_netdev_flags = vsi->netdev->flags;
1798 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1799 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1801 filter_list_len = pf->hw.aq.asq_buf_size /
1802 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1803 del_list = kcalloc(filter_list_len,
1804 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1809 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1813 if (f->counter != 0)
1818 /* add to delete list */
1819 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1820 del_list[num_del].vlan_tag =
1821 cpu_to_le16((u16)(f->vlan ==
1822 I40E_VLAN_ANY ? 0 : f->vlan));
1824 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1825 del_list[num_del].flags = cmd_flags;
1828 /* unlink from filter list */
1832 /* flush a full buffer */
1833 if (num_del == filter_list_len) {
1834 ret = i40e_aq_remove_macvlan(&pf->hw,
1835 vsi->seid, del_list, num_del,
1837 aq_err = pf->hw.aq.asq_last_status;
1839 memset(del_list, 0, sizeof(*del_list));
1841 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1842 dev_info(&pf->pdev->dev,
1843 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1844 i40e_stat_str(&pf->hw, ret),
1845 i40e_aq_str(&pf->hw, aq_err));
1849 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1850 del_list, num_del, NULL);
1851 aq_err = pf->hw.aq.asq_last_status;
1854 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1855 dev_info(&pf->pdev->dev,
1856 "ignoring delete macvlan error, err %s aq_err %s\n",
1857 i40e_stat_str(&pf->hw, ret),
1858 i40e_aq_str(&pf->hw, aq_err));
1864 /* do all the adds now */
1865 filter_list_len = pf->hw.aq.asq_buf_size /
1866 sizeof(struct i40e_aqc_add_macvlan_element_data),
1867 add_list = kcalloc(filter_list_len,
1868 sizeof(struct i40e_aqc_add_macvlan_element_data),
1873 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1877 if (f->counter == 0)
1880 add_happened = true;
1883 /* add to add array */
1884 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1885 add_list[num_add].vlan_tag =
1887 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1888 add_list[num_add].queue_number = 0;
1890 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1891 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1894 /* flush a full buffer */
1895 if (num_add == filter_list_len) {
1896 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1899 aq_err = pf->hw.aq.asq_last_status;
1904 memset(add_list, 0, sizeof(*add_list));
1908 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1909 add_list, num_add, NULL);
1910 aq_err = pf->hw.aq.asq_last_status;
1916 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1917 dev_info(&pf->pdev->dev,
1918 "add filter failed, err %s aq_err %s\n",
1919 i40e_stat_str(&pf->hw, ret),
1920 i40e_aq_str(&pf->hw, aq_err));
1921 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1922 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1924 promisc_forced_on = true;
1925 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1927 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1932 /* check for changes in promiscuous modes */
1933 if (changed_flags & IFF_ALLMULTI) {
1934 bool cur_multipromisc;
1935 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1936 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1941 dev_info(&pf->pdev->dev,
1942 "set multi promisc failed, err %s aq_err %s\n",
1943 i40e_stat_str(&pf->hw, ret),
1944 i40e_aq_str(&pf->hw,
1945 pf->hw.aq.asq_last_status));
1947 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1949 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1950 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1952 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1953 /* set defport ON for Main VSI instead of true promisc
1954 * this way we will get all unicast/multicast and VLAN
1955 * promisc behavior but will not get VF or VMDq traffic
1956 * replicated on the Main VSI.
1958 if (pf->cur_promisc != cur_promisc) {
1959 pf->cur_promisc = cur_promisc;
1961 i40e_do_reset_safe(pf,
1962 BIT(__I40E_PF_RESET_REQUESTED));
1965 BIT(__I40E_PF_RESET_REQUESTED));
1968 ret = i40e_aq_set_vsi_unicast_promiscuous(
1973 dev_info(&pf->pdev->dev,
1974 "set unicast promisc failed, err %d, aq_err %d\n",
1975 ret, pf->hw.aq.asq_last_status);
1976 ret = i40e_aq_set_vsi_multicast_promiscuous(
1981 dev_info(&pf->pdev->dev,
1982 "set multicast promisc failed, err %d, aq_err %d\n",
1983 ret, pf->hw.aq.asq_last_status);
1985 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1989 dev_info(&pf->pdev->dev,
1990 "set brdcast promisc failed, err %s, aq_err %s\n",
1991 i40e_stat_str(&pf->hw, ret),
1992 i40e_aq_str(&pf->hw,
1993 pf->hw.aq.asq_last_status));
1996 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2001 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2002 * @pf: board private structure
2004 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2008 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2010 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2012 for (v = 0; v < pf->num_alloc_vsi; v++) {
2014 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2015 i40e_sync_vsi_filters(pf->vsi[v], true);
2020 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2021 * @netdev: network interface device structure
2022 * @new_mtu: new value for maximum frame size
2024 * Returns 0 on success, negative on failure
2026 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2028 struct i40e_netdev_priv *np = netdev_priv(netdev);
2029 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2030 struct i40e_vsi *vsi = np->vsi;
2032 /* MTU < 68 is an error and causes problems on some kernels */
2033 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2036 netdev_info(netdev, "changing MTU from %d to %d\n",
2037 netdev->mtu, new_mtu);
2038 netdev->mtu = new_mtu;
2039 if (netif_running(netdev))
2040 i40e_vsi_reinit_locked(vsi);
2046 * i40e_ioctl - Access the hwtstamp interface
2047 * @netdev: network interface device structure
2048 * @ifr: interface request data
2049 * @cmd: ioctl command
2051 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2053 struct i40e_netdev_priv *np = netdev_priv(netdev);
2054 struct i40e_pf *pf = np->vsi->back;
2058 return i40e_ptp_get_ts_config(pf, ifr);
2060 return i40e_ptp_set_ts_config(pf, ifr);
2067 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2068 * @vsi: the vsi being adjusted
2070 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2072 struct i40e_vsi_context ctxt;
2075 if ((vsi->info.valid_sections &
2076 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2077 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2078 return; /* already enabled */
2080 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2081 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2082 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2084 ctxt.seid = vsi->seid;
2085 ctxt.info = vsi->info;
2086 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2088 dev_info(&vsi->back->pdev->dev,
2089 "update vlan stripping failed, err %s aq_err %s\n",
2090 i40e_stat_str(&vsi->back->hw, ret),
2091 i40e_aq_str(&vsi->back->hw,
2092 vsi->back->hw.aq.asq_last_status));
2097 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2098 * @vsi: the vsi being adjusted
2100 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2102 struct i40e_vsi_context ctxt;
2105 if ((vsi->info.valid_sections &
2106 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2107 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2108 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2109 return; /* already disabled */
2111 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2112 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2113 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2115 ctxt.seid = vsi->seid;
2116 ctxt.info = vsi->info;
2117 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2119 dev_info(&vsi->back->pdev->dev,
2120 "update vlan stripping failed, err %s aq_err %s\n",
2121 i40e_stat_str(&vsi->back->hw, ret),
2122 i40e_aq_str(&vsi->back->hw,
2123 vsi->back->hw.aq.asq_last_status));
2128 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2129 * @netdev: network interface to be adjusted
2130 * @features: netdev features to test if VLAN offload is enabled or not
2132 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2134 struct i40e_netdev_priv *np = netdev_priv(netdev);
2135 struct i40e_vsi *vsi = np->vsi;
2137 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2138 i40e_vlan_stripping_enable(vsi);
2140 i40e_vlan_stripping_disable(vsi);
2144 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2145 * @vsi: the vsi being configured
2146 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2148 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2150 struct i40e_mac_filter *f, *add_f;
2151 bool is_netdev, is_vf;
2153 is_vf = (vsi->type == I40E_VSI_SRIOV);
2154 is_netdev = !!(vsi->netdev);
2157 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2160 dev_info(&vsi->back->pdev->dev,
2161 "Could not add vlan filter %d for %pM\n",
2162 vid, vsi->netdev->dev_addr);
2167 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2168 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2170 dev_info(&vsi->back->pdev->dev,
2171 "Could not add vlan filter %d for %pM\n",
2177 /* Now if we add a vlan tag, make sure to check if it is the first
2178 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2179 * with 0, so we now accept untagged and specified tagged traffic
2180 * (and not any taged and untagged)
2183 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2185 is_vf, is_netdev)) {
2186 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2187 I40E_VLAN_ANY, is_vf, is_netdev);
2188 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2191 dev_info(&vsi->back->pdev->dev,
2192 "Could not add filter 0 for %pM\n",
2193 vsi->netdev->dev_addr);
2199 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2200 if (vid > 0 && !vsi->info.pvid) {
2201 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2202 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2203 is_vf, is_netdev)) {
2204 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2206 add_f = i40e_add_filter(vsi, f->macaddr,
2207 0, is_vf, is_netdev);
2209 dev_info(&vsi->back->pdev->dev,
2210 "Could not add filter 0 for %pM\n",
2218 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2219 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2222 return i40e_sync_vsi_filters(vsi, false);
2226 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2227 * @vsi: the vsi being configured
2228 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2230 * Return: 0 on success or negative otherwise
2232 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2234 struct net_device *netdev = vsi->netdev;
2235 struct i40e_mac_filter *f, *add_f;
2236 bool is_vf, is_netdev;
2237 int filter_count = 0;
2239 is_vf = (vsi->type == I40E_VSI_SRIOV);
2240 is_netdev = !!(netdev);
2243 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2245 list_for_each_entry(f, &vsi->mac_filter_list, list)
2246 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2248 /* go through all the filters for this VSI and if there is only
2249 * vid == 0 it means there are no other filters, so vid 0 must
2250 * be replaced with -1. This signifies that we should from now
2251 * on accept any traffic (with any tag present, or untagged)
2253 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2256 ether_addr_equal(netdev->dev_addr, f->macaddr))
2264 if (!filter_count && is_netdev) {
2265 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2266 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2269 dev_info(&vsi->back->pdev->dev,
2270 "Could not add filter %d for %pM\n",
2271 I40E_VLAN_ANY, netdev->dev_addr);
2276 if (!filter_count) {
2277 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2278 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2279 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2282 dev_info(&vsi->back->pdev->dev,
2283 "Could not add filter %d for %pM\n",
2284 I40E_VLAN_ANY, f->macaddr);
2290 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2291 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2294 return i40e_sync_vsi_filters(vsi, false);
2298 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2299 * @netdev: network interface to be adjusted
2300 * @vid: vlan id to be added
2302 * net_device_ops implementation for adding vlan ids
2305 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2306 __always_unused __be16 proto, u16 vid)
2308 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2309 __always_unused __be16 proto, u16 vid)
2312 struct i40e_netdev_priv *np = netdev_priv(netdev);
2313 struct i40e_vsi *vsi = np->vsi;
2319 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2321 /* If the network stack called us with vid = 0 then
2322 * it is asking to receive priority tagged packets with
2323 * vlan id 0. Our HW receives them by default when configured
2324 * to receive untagged packets so there is no need to add an
2325 * extra filter for vlan 0 tagged packets.
2328 ret = i40e_vsi_add_vlan(vsi, vid);
2330 if (!ret && (vid < VLAN_N_VID))
2331 set_bit(vid, vsi->active_vlans);
2337 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2338 * @netdev: network interface to be adjusted
2339 * @vid: vlan id to be removed
2341 * net_device_ops implementation for removing vlan ids
2344 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2345 __always_unused __be16 proto, u16 vid)
2347 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2348 __always_unused __be16 proto, u16 vid)
2351 struct i40e_netdev_priv *np = netdev_priv(netdev);
2352 struct i40e_vsi *vsi = np->vsi;
2354 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2356 /* return code is ignored as there is nothing a user
2357 * can do about failure to remove and a log message was
2358 * already printed from the other function
2360 i40e_vsi_kill_vlan(vsi, vid);
2362 clear_bit(vid, vsi->active_vlans);
2368 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2369 * @vsi: the vsi being brought back up
2371 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2378 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2380 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2381 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2386 * i40e_vsi_add_pvid - Add pvid for the VSI
2387 * @vsi: the vsi being adjusted
2388 * @vid: the vlan id to set as a PVID
2390 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2392 struct i40e_vsi_context ctxt;
2395 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2396 vsi->info.pvid = cpu_to_le16(vid);
2397 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2398 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2399 I40E_AQ_VSI_PVLAN_EMOD_STR;
2401 ctxt.seid = vsi->seid;
2402 ctxt.info = vsi->info;
2403 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2405 dev_info(&vsi->back->pdev->dev,
2406 "add pvid failed, err %s aq_err %s\n",
2407 i40e_stat_str(&vsi->back->hw, ret),
2408 i40e_aq_str(&vsi->back->hw,
2409 vsi->back->hw.aq.asq_last_status));
2417 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2418 * @vsi: the vsi being adjusted
2420 * Just use the vlan_rx_register() service to put it back to normal
2422 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2424 i40e_vlan_stripping_disable(vsi);
2430 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2431 * @vsi: ptr to the VSI
2433 * If this function returns with an error, then it's possible one or
2434 * more of the rings is populated (while the rest are not). It is the
2435 * callers duty to clean those orphaned rings.
2437 * Return 0 on success, negative on failure
2439 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2443 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2444 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2450 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2451 * @vsi: ptr to the VSI
2453 * Free VSI's transmit software resources
2455 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2462 for (i = 0; i < vsi->num_queue_pairs; i++)
2463 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2464 i40e_free_tx_resources(vsi->tx_rings[i]);
2468 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2469 * @vsi: ptr to the VSI
2471 * If this function returns with an error, then it's possible one or
2472 * more of the rings is populated (while the rest are not). It is the
2473 * callers duty to clean those orphaned rings.
2475 * Return 0 on success, negative on failure
2477 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2481 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2482 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2484 i40e_fcoe_setup_ddp_resources(vsi);
2490 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2491 * @vsi: ptr to the VSI
2493 * Free all receive software resources
2495 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2502 for (i = 0; i < vsi->num_queue_pairs; i++)
2503 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2504 i40e_free_rx_resources(vsi->rx_rings[i]);
2506 i40e_fcoe_free_ddp_resources(vsi);
2511 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2512 * @ring: The Tx ring to configure
2514 * This enables/disables XPS for a given Tx descriptor ring
2515 * based on the TCs enabled for the VSI that ring belongs to.
2517 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2519 struct i40e_vsi *vsi = ring->vsi;
2522 if (!ring->q_vector || !ring->netdev)
2525 /* Single TC mode enable XPS */
2526 if (vsi->tc_config.numtc <= 1) {
2527 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2528 netif_set_xps_queue(ring->netdev,
2529 &ring->q_vector->affinity_mask,
2531 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2532 /* Disable XPS to allow selection based on TC */
2533 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2534 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2535 free_cpumask_var(mask);
2540 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2541 * @ring: The Tx ring to configure
2543 * Configure the Tx descriptor ring in the HMC context.
2545 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2547 struct i40e_vsi *vsi = ring->vsi;
2548 u16 pf_q = vsi->base_queue + ring->queue_index;
2549 struct i40e_hw *hw = &vsi->back->hw;
2550 struct i40e_hmc_obj_txq tx_ctx;
2551 i40e_status err = 0;
2554 /* some ATR related tx ring init */
2555 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2556 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2557 ring->atr_count = 0;
2559 ring->atr_sample_rate = 0;
2563 i40e_config_xps_tx_ring(ring);
2565 /* clear the context structure first */
2566 memset(&tx_ctx, 0, sizeof(tx_ctx));
2568 tx_ctx.new_context = 1;
2569 tx_ctx.base = (ring->dma / 128);
2570 tx_ctx.qlen = ring->count;
2571 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2572 I40E_FLAG_FD_ATR_ENABLED));
2574 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2576 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2577 /* FDIR VSI tx ring can still use RS bit and writebacks */
2578 if (vsi->type != I40E_VSI_FDIR)
2579 tx_ctx.head_wb_ena = 1;
2580 tx_ctx.head_wb_addr = ring->dma +
2581 (ring->count * sizeof(struct i40e_tx_desc));
2583 /* As part of VSI creation/update, FW allocates certain
2584 * Tx arbitration queue sets for each TC enabled for
2585 * the VSI. The FW returns the handles to these queue
2586 * sets as part of the response buffer to Add VSI,
2587 * Update VSI, etc. AQ commands. It is expected that
2588 * these queue set handles be associated with the Tx
2589 * queues by the driver as part of the TX queue context
2590 * initialization. This has to be done regardless of
2591 * DCB as by default everything is mapped to TC0.
2593 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2594 tx_ctx.rdylist_act = 0;
2596 /* clear the context in the HMC */
2597 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2599 dev_info(&vsi->back->pdev->dev,
2600 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2601 ring->queue_index, pf_q, err);
2605 /* set the context in the HMC */
2606 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2608 dev_info(&vsi->back->pdev->dev,
2609 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2610 ring->queue_index, pf_q, err);
2614 /* Now associate this queue with this PCI function */
2615 if (vsi->type == I40E_VSI_VMDQ2) {
2616 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2617 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2618 I40E_QTX_CTL_VFVM_INDX_MASK;
2620 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2623 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2624 I40E_QTX_CTL_PF_INDX_MASK);
2625 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2628 /* cache tail off for easier writes later */
2629 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2635 * i40e_configure_rx_ring - Configure a receive ring context
2636 * @ring: The Rx ring to configure
2638 * Configure the Rx descriptor ring in the HMC context.
2640 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2642 struct i40e_vsi *vsi = ring->vsi;
2643 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2644 u16 pf_q = vsi->base_queue + ring->queue_index;
2645 struct i40e_hw *hw = &vsi->back->hw;
2646 struct i40e_hmc_obj_rxq rx_ctx;
2647 i40e_status err = 0;
2651 /* clear the context structure first */
2652 memset(&rx_ctx, 0, sizeof(rx_ctx));
2654 ring->rx_buf_len = vsi->rx_buf_len;
2655 ring->rx_hdr_len = vsi->rx_hdr_len;
2657 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2658 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2660 rx_ctx.base = (ring->dma / 128);
2661 rx_ctx.qlen = ring->count;
2663 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2664 set_ring_16byte_desc_enabled(ring);
2670 rx_ctx.dtype = vsi->dtype;
2672 set_ring_ps_enabled(ring);
2673 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2675 I40E_RX_SPLIT_TCP_UDP |
2678 rx_ctx.hsplit_0 = 0;
2681 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2682 (chain_len * ring->rx_buf_len));
2683 if (hw->revision_id == 0)
2684 rx_ctx.lrxqthresh = 0;
2686 rx_ctx.lrxqthresh = 2;
2687 rx_ctx.crcstrip = 1;
2689 /* this controls whether VLAN is stripped from inner headers */
2692 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2694 /* set the prefena field to 1 because the manual says to */
2697 /* clear the context in the HMC */
2698 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2700 dev_info(&vsi->back->pdev->dev,
2701 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2702 ring->queue_index, pf_q, err);
2706 /* set the context in the HMC */
2707 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2709 dev_info(&vsi->back->pdev->dev,
2710 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2711 ring->queue_index, pf_q, err);
2715 /* cache tail for quicker writes, and clear the reg before use */
2716 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2717 writel(0, ring->tail);
2719 if (ring_is_ps_enabled(ring)) {
2720 i40e_alloc_rx_headers(ring);
2721 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2723 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2730 * i40e_vsi_configure_tx - Configure the VSI for Tx
2731 * @vsi: VSI structure describing this set of rings and resources
2733 * Configure the Tx VSI for operation.
2735 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2740 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2741 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2747 * i40e_vsi_configure_rx - Configure the VSI for Rx
2748 * @vsi: the VSI being configured
2750 * Configure the Rx VSI for operation.
2752 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2757 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2758 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2759 + ETH_FCS_LEN + VLAN_HLEN;
2761 vsi->max_frame = I40E_RXBUFFER_2048;
2763 /* figure out correct receive buffer length */
2764 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2765 I40E_FLAG_RX_PS_ENABLED)) {
2766 case I40E_FLAG_RX_1BUF_ENABLED:
2767 vsi->rx_hdr_len = 0;
2768 vsi->rx_buf_len = vsi->max_frame;
2769 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2771 case I40E_FLAG_RX_PS_ENABLED:
2772 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2773 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2774 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2777 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2778 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2779 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2784 /* setup rx buffer for FCoE */
2785 if ((vsi->type == I40E_VSI_FCOE) &&
2786 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2787 vsi->rx_hdr_len = 0;
2788 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2789 vsi->max_frame = I40E_RXBUFFER_3072;
2790 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2793 #endif /* I40E_FCOE */
2794 /* round up for the chip's needs */
2795 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2796 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2797 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2798 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2800 /* set up individual rings */
2801 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2802 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2808 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2809 * @vsi: ptr to the VSI
2811 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2813 struct i40e_ring *tx_ring, *rx_ring;
2814 u16 qoffset, qcount;
2817 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2818 /* Reset the TC information */
2819 for (i = 0; i < vsi->num_queue_pairs; i++) {
2820 rx_ring = vsi->rx_rings[i];
2821 tx_ring = vsi->tx_rings[i];
2822 rx_ring->dcb_tc = 0;
2823 tx_ring->dcb_tc = 0;
2827 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2828 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2831 qoffset = vsi->tc_config.tc_info[n].qoffset;
2832 qcount = vsi->tc_config.tc_info[n].qcount;
2833 for (i = qoffset; i < (qoffset + qcount); i++) {
2834 rx_ring = vsi->rx_rings[i];
2835 tx_ring = vsi->tx_rings[i];
2836 rx_ring->dcb_tc = n;
2837 tx_ring->dcb_tc = n;
2843 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2844 * @vsi: ptr to the VSI
2846 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2849 i40e_set_rx_mode(vsi->netdev);
2853 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2854 * @vsi: Pointer to the targeted VSI
2856 * This function replays the hlist on the hw where all the SB Flow Director
2857 * filters were saved.
2859 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2861 struct i40e_fdir_filter *filter;
2862 struct i40e_pf *pf = vsi->back;
2863 struct hlist_node *node;
2865 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2868 hlist_for_each_entry_safe(filter, node,
2869 &pf->fdir_filter_list, fdir_node) {
2870 i40e_add_del_fdir(vsi, filter, true);
2875 * i40e_vsi_configure - Set up the VSI for action
2876 * @vsi: the VSI being configured
2878 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2882 i40e_set_vsi_rx_mode(vsi);
2883 i40e_restore_vlan(vsi);
2884 i40e_vsi_config_dcb_rings(vsi);
2885 err = i40e_vsi_configure_tx(vsi);
2887 err = i40e_vsi_configure_rx(vsi);
2893 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2894 * @vsi: the VSI being configured
2896 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2898 struct i40e_pf *pf = vsi->back;
2899 struct i40e_q_vector *q_vector;
2900 struct i40e_hw *hw = &pf->hw;
2906 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2907 * and PFINT_LNKLSTn registers, e.g.:
2908 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2910 qp = vsi->base_queue;
2911 vector = vsi->base_vector;
2912 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2913 q_vector = vsi->q_vectors[i];
2914 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2915 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2916 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2918 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2919 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2920 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2923 /* Linked list for the queuepairs assigned to this vector */
2924 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2925 for (q = 0; q < q_vector->num_ringpairs; q++) {
2926 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2927 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2928 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2929 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2931 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2933 wr32(hw, I40E_QINT_RQCTL(qp), val);
2935 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2936 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2937 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2938 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2940 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2942 /* Terminate the linked list */
2943 if (q == (q_vector->num_ringpairs - 1))
2944 val |= (I40E_QUEUE_END_OF_LIST
2945 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2947 wr32(hw, I40E_QINT_TQCTL(qp), val);
2956 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2957 * @hw: ptr to the hardware info
2959 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2961 struct i40e_hw *hw = &pf->hw;
2964 /* clear things first */
2965 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2966 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2968 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2969 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2970 I40E_PFINT_ICR0_ENA_GRST_MASK |
2971 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2972 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2973 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2974 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2975 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2977 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2978 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2980 if (pf->flags & I40E_FLAG_PTP)
2981 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2983 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2985 /* SW_ITR_IDX = 0, but don't change INTENA */
2986 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2987 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2989 /* OTHER_ITR_IDX = 0 */
2990 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2994 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2995 * @vsi: the VSI being configured
2997 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2999 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3000 struct i40e_pf *pf = vsi->back;
3001 struct i40e_hw *hw = &pf->hw;
3004 /* set the ITR configuration */
3005 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3006 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3007 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3008 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3009 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3010 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3012 i40e_enable_misc_int_causes(pf);
3014 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3015 wr32(hw, I40E_PFINT_LNKLST0, 0);
3017 /* Associate the queue pair to the vector and enable the queue int */
3018 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3019 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3020 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3022 wr32(hw, I40E_QINT_RQCTL(0), val);
3024 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3025 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3026 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3028 wr32(hw, I40E_QINT_TQCTL(0), val);
3033 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3034 * @pf: board private structure
3036 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3038 struct i40e_hw *hw = &pf->hw;
3040 wr32(hw, I40E_PFINT_DYN_CTL0,
3041 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3046 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3047 * @pf: board private structure
3049 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3051 struct i40e_hw *hw = &pf->hw;
3054 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3055 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3056 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3058 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3063 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3064 * @vsi: pointer to a vsi
3065 * @vector: disable a particular Hw Interrupt vector
3067 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3069 struct i40e_pf *pf = vsi->back;
3070 struct i40e_hw *hw = &pf->hw;
3073 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3074 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3079 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3080 * @irq: interrupt number
3081 * @data: pointer to a q_vector
3083 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3085 struct i40e_q_vector *q_vector = data;
3087 if (!q_vector->tx.ring && !q_vector->rx.ring)
3090 napi_schedule(&q_vector->napi);
3096 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3097 * @vsi: the VSI being configured
3098 * @basename: name for the vector
3100 * Allocates MSI-X vectors and requests interrupts from the kernel.
3102 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3104 int q_vectors = vsi->num_q_vectors;
3105 struct i40e_pf *pf = vsi->back;
3106 int base = vsi->base_vector;
3111 for (vector = 0; vector < q_vectors; vector++) {
3112 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3114 if (q_vector->tx.ring && q_vector->rx.ring) {
3115 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3116 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3118 } else if (q_vector->rx.ring) {
3119 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3120 "%s-%s-%d", basename, "rx", rx_int_idx++);
3121 } else if (q_vector->tx.ring) {
3122 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3123 "%s-%s-%d", basename, "tx", tx_int_idx++);
3125 /* skip this unused q_vector */
3128 err = request_irq(pf->msix_entries[base + vector].vector,
3134 dev_info(&pf->pdev->dev,
3135 "MSIX request_irq failed, error: %d\n", err);
3136 goto free_queue_irqs;
3138 /* assign the mask for this irq */
3139 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3140 &q_vector->affinity_mask);
3143 vsi->irqs_ready = true;
3149 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3151 free_irq(pf->msix_entries[base + vector].vector,
3152 &(vsi->q_vectors[vector]));
3158 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3159 * @vsi: the VSI being un-configured
3161 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3163 struct i40e_pf *pf = vsi->back;
3164 struct i40e_hw *hw = &pf->hw;
3165 int base = vsi->base_vector;
3168 for (i = 0; i < vsi->num_queue_pairs; i++) {
3169 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3170 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3173 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3174 for (i = vsi->base_vector;
3175 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3176 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3179 for (i = 0; i < vsi->num_q_vectors; i++)
3180 synchronize_irq(pf->msix_entries[i + base].vector);
3182 /* Legacy and MSI mode - this stops all interrupt handling */
3183 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3184 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3186 synchronize_irq(pf->pdev->irq);
3191 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3192 * @vsi: the VSI being configured
3194 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3196 struct i40e_pf *pf = vsi->back;
3199 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3200 for (i = 0; i < vsi->num_q_vectors; i++)
3201 i40e_irq_dynamic_enable(vsi, i);
3203 i40e_irq_dynamic_enable_icr0(pf);
3206 i40e_flush(&pf->hw);
3211 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3212 * @pf: board private structure
3214 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3217 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3218 i40e_flush(&pf->hw);
3222 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3223 * @irq: interrupt number
3224 * @data: pointer to a q_vector
3226 * This is the handler used for all MSI/Legacy interrupts, and deals
3227 * with both queue and non-queue interrupts. This is also used in
3228 * MSIX mode to handle the non-queue interrupts.
3230 static irqreturn_t i40e_intr(int irq, void *data)
3232 struct i40e_pf *pf = (struct i40e_pf *)data;
3233 struct i40e_hw *hw = &pf->hw;
3234 irqreturn_t ret = IRQ_NONE;
3235 u32 icr0, icr0_remaining;
3238 icr0 = rd32(hw, I40E_PFINT_ICR0);
3239 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3241 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3242 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3245 /* if interrupt but no bits showing, must be SWINT */
3246 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3247 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3250 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3251 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3252 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3253 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3254 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3257 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3258 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3260 /* temporarily disable queue cause for NAPI processing */
3261 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3262 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3263 wr32(hw, I40E_QINT_RQCTL(0), qval);
3265 qval = rd32(hw, I40E_QINT_TQCTL(0));
3266 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3267 wr32(hw, I40E_QINT_TQCTL(0), qval);
3269 if (!test_bit(__I40E_DOWN, &pf->state))
3270 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3273 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3274 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3275 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3278 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3279 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3280 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3283 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3284 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3285 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3288 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3289 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3290 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3291 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3292 val = rd32(hw, I40E_GLGEN_RSTAT);
3293 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3294 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3295 if (val == I40E_RESET_CORER) {
3297 } else if (val == I40E_RESET_GLOBR) {
3299 } else if (val == I40E_RESET_EMPR) {
3301 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3305 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3306 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3307 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3308 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3309 rd32(hw, I40E_PFHMC_ERRORINFO),
3310 rd32(hw, I40E_PFHMC_ERRORDATA));
3313 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3314 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3316 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3317 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3318 i40e_ptp_tx_hwtstamp(pf);
3322 /* If a critical error is pending we have no choice but to reset the
3324 * Report and mask out any remaining unexpected interrupts.
3326 icr0_remaining = icr0 & ena_mask;
3327 if (icr0_remaining) {
3328 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3330 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3331 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3332 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3333 dev_info(&pf->pdev->dev, "device will be reset\n");
3334 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3335 i40e_service_event_schedule(pf);
3337 ena_mask &= ~icr0_remaining;
3342 /* re-enable interrupt causes */
3343 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3344 if (!test_bit(__I40E_DOWN, &pf->state)) {
3345 i40e_service_event_schedule(pf);
3346 i40e_irq_dynamic_enable_icr0(pf);
3353 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3354 * @tx_ring: tx ring to clean
3355 * @budget: how many cleans we're allowed
3357 * Returns true if there's any budget left (e.g. the clean is finished)
3359 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3361 struct i40e_vsi *vsi = tx_ring->vsi;
3362 u16 i = tx_ring->next_to_clean;
3363 struct i40e_tx_buffer *tx_buf;
3364 struct i40e_tx_desc *tx_desc;
3366 tx_buf = &tx_ring->tx_bi[i];
3367 tx_desc = I40E_TX_DESC(tx_ring, i);
3368 i -= tx_ring->count;
3371 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3373 /* if next_to_watch is not set then there is no work pending */
3377 /* prevent any other reads prior to eop_desc */
3378 read_barrier_depends();
3380 /* if the descriptor isn't done, no work yet to do */
3381 if (!(eop_desc->cmd_type_offset_bsz &
3382 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3385 /* clear next_to_watch to prevent false hangs */
3386 tx_buf->next_to_watch = NULL;
3388 tx_desc->buffer_addr = 0;
3389 tx_desc->cmd_type_offset_bsz = 0;
3390 /* move past filter desc */
3395 i -= tx_ring->count;
3396 tx_buf = tx_ring->tx_bi;
3397 tx_desc = I40E_TX_DESC(tx_ring, 0);
3399 /* unmap skb header data */
3400 dma_unmap_single(tx_ring->dev,
3401 dma_unmap_addr(tx_buf, dma),
3402 dma_unmap_len(tx_buf, len),
3404 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3405 kfree(tx_buf->raw_buf);
3407 tx_buf->raw_buf = NULL;
3408 tx_buf->tx_flags = 0;
3409 tx_buf->next_to_watch = NULL;
3410 dma_unmap_len_set(tx_buf, len, 0);
3411 tx_desc->buffer_addr = 0;
3412 tx_desc->cmd_type_offset_bsz = 0;
3414 /* move us past the eop_desc for start of next FD desc */
3419 i -= tx_ring->count;
3420 tx_buf = tx_ring->tx_bi;
3421 tx_desc = I40E_TX_DESC(tx_ring, 0);
3424 /* update budget accounting */
3426 } while (likely(budget));
3428 i += tx_ring->count;
3429 tx_ring->next_to_clean = i;
3431 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3432 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3438 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3439 * @irq: interrupt number
3440 * @data: pointer to a q_vector
3442 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3444 struct i40e_q_vector *q_vector = data;
3445 struct i40e_vsi *vsi;
3447 if (!q_vector->tx.ring)
3450 vsi = q_vector->tx.ring->vsi;
3451 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3457 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3458 * @vsi: the VSI being configured
3459 * @v_idx: vector index
3460 * @qp_idx: queue pair index
3462 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3464 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3465 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3466 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3468 tx_ring->q_vector = q_vector;
3469 tx_ring->next = q_vector->tx.ring;
3470 q_vector->tx.ring = tx_ring;
3471 q_vector->tx.count++;
3473 rx_ring->q_vector = q_vector;
3474 rx_ring->next = q_vector->rx.ring;
3475 q_vector->rx.ring = rx_ring;
3476 q_vector->rx.count++;
3480 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3481 * @vsi: the VSI being configured
3483 * This function maps descriptor rings to the queue-specific vectors
3484 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3485 * one vector per queue pair, but on a constrained vector budget, we
3486 * group the queue pairs as "efficiently" as possible.
3488 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3490 int qp_remaining = vsi->num_queue_pairs;
3491 int q_vectors = vsi->num_q_vectors;
3496 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3497 * group them so there are multiple queues per vector.
3498 * It is also important to go through all the vectors available to be
3499 * sure that if we don't use all the vectors, that the remaining vectors
3500 * are cleared. This is especially important when decreasing the
3501 * number of queues in use.
3503 for (; v_start < q_vectors; v_start++) {
3504 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3506 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3508 q_vector->num_ringpairs = num_ringpairs;
3510 q_vector->rx.count = 0;
3511 q_vector->tx.count = 0;
3512 q_vector->rx.ring = NULL;
3513 q_vector->tx.ring = NULL;
3515 while (num_ringpairs--) {
3516 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3524 * i40e_vsi_request_irq - Request IRQ from the OS
3525 * @vsi: the VSI being configured
3526 * @basename: name for the vector
3528 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3530 struct i40e_pf *pf = vsi->back;
3533 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3534 err = i40e_vsi_request_irq_msix(vsi, basename);
3535 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3536 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3539 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3543 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3548 #ifdef CONFIG_NET_POLL_CONTROLLER
3550 * i40e_netpoll - A Polling 'interrupt'handler
3551 * @netdev: network interface device structure
3553 * This is used by netconsole to send skbs without having to re-enable
3554 * interrupts. It's not called while the normal interrupt routine is executing.
3557 void i40e_netpoll(struct net_device *netdev)
3559 static void i40e_netpoll(struct net_device *netdev)
3562 struct i40e_netdev_priv *np = netdev_priv(netdev);
3563 struct i40e_vsi *vsi = np->vsi;
3564 struct i40e_pf *pf = vsi->back;
3567 /* if interface is down do nothing */
3568 if (test_bit(__I40E_DOWN, &vsi->state))
3571 pf->flags |= I40E_FLAG_IN_NETPOLL;
3572 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3573 for (i = 0; i < vsi->num_q_vectors; i++)
3574 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3576 i40e_intr(pf->pdev->irq, netdev);
3578 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3583 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3584 * @pf: the PF being configured
3585 * @pf_q: the PF queue
3586 * @enable: enable or disable state of the queue
3588 * This routine will wait for the given Tx queue of the PF to reach the
3589 * enabled or disabled state.
3590 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3591 * multiple retries; else will return 0 in case of success.
3593 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3598 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3599 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3600 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3603 usleep_range(10, 20);
3605 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3612 * i40e_vsi_control_tx - Start or stop a VSI's rings
3613 * @vsi: the VSI being configured
3614 * @enable: start or stop the rings
3616 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3618 struct i40e_pf *pf = vsi->back;
3619 struct i40e_hw *hw = &pf->hw;
3620 int i, j, pf_q, ret = 0;
3623 pf_q = vsi->base_queue;
3624 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3626 /* warn the TX unit of coming changes */
3627 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3629 usleep_range(10, 20);
3631 for (j = 0; j < 50; j++) {
3632 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3633 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3634 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3636 usleep_range(1000, 2000);
3638 /* Skip if the queue is already in the requested state */
3639 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3642 /* turn on/off the queue */
3644 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3645 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3647 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3650 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3651 /* No waiting for the Tx queue to disable */
3652 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3655 /* wait for the change to finish */
3656 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3658 dev_info(&pf->pdev->dev,
3659 "VSI seid %d Tx ring %d %sable timeout\n",
3660 vsi->seid, pf_q, (enable ? "en" : "dis"));
3665 if (hw->revision_id == 0)
3671 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3672 * @pf: the PF being configured
3673 * @pf_q: the PF queue
3674 * @enable: enable or disable state of the queue
3676 * This routine will wait for the given Rx queue of the PF to reach the
3677 * enabled or disabled state.
3678 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3679 * multiple retries; else will return 0 in case of success.
3681 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3686 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3687 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3688 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3691 usleep_range(10, 20);
3693 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3700 * i40e_vsi_control_rx - Start or stop a VSI's rings
3701 * @vsi: the VSI being configured
3702 * @enable: start or stop the rings
3704 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3706 struct i40e_pf *pf = vsi->back;
3707 struct i40e_hw *hw = &pf->hw;
3708 int i, j, pf_q, ret = 0;
3711 pf_q = vsi->base_queue;
3712 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3713 for (j = 0; j < 50; j++) {
3714 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3715 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3716 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3718 usleep_range(1000, 2000);
3721 /* Skip if the queue is already in the requested state */
3722 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3725 /* turn on/off the queue */
3727 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3729 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3730 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3732 /* wait for the change to finish */
3733 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3735 dev_info(&pf->pdev->dev,
3736 "VSI seid %d Rx ring %d %sable timeout\n",
3737 vsi->seid, pf_q, (enable ? "en" : "dis"));
3746 * i40e_vsi_control_rings - Start or stop a VSI's rings
3747 * @vsi: the VSI being configured
3748 * @enable: start or stop the rings
3750 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3754 /* do rx first for enable and last for disable */
3756 ret = i40e_vsi_control_rx(vsi, request);
3759 ret = i40e_vsi_control_tx(vsi, request);
3761 /* Ignore return value, we need to shutdown whatever we can */
3762 i40e_vsi_control_tx(vsi, request);
3763 i40e_vsi_control_rx(vsi, request);
3770 * i40e_vsi_free_irq - Free the irq association with the OS
3771 * @vsi: the VSI being configured
3773 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3775 struct i40e_pf *pf = vsi->back;
3776 struct i40e_hw *hw = &pf->hw;
3777 int base = vsi->base_vector;
3781 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3782 if (!vsi->q_vectors)
3785 if (!vsi->irqs_ready)
3788 vsi->irqs_ready = false;
3789 for (i = 0; i < vsi->num_q_vectors; i++) {
3790 u16 vector = i + base;
3792 /* free only the irqs that were actually requested */
3793 if (!vsi->q_vectors[i] ||
3794 !vsi->q_vectors[i]->num_ringpairs)
3797 /* clear the affinity_mask in the IRQ descriptor */
3798 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3800 free_irq(pf->msix_entries[vector].vector,
3803 /* Tear down the interrupt queue link list
3805 * We know that they come in pairs and always
3806 * the Rx first, then the Tx. To clear the
3807 * link list, stick the EOL value into the
3808 * next_q field of the registers.
3810 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3811 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3812 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3813 val |= I40E_QUEUE_END_OF_LIST
3814 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3815 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3817 while (qp != I40E_QUEUE_END_OF_LIST) {
3820 val = rd32(hw, I40E_QINT_RQCTL(qp));
3822 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3823 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3824 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3825 I40E_QINT_RQCTL_INTEVENT_MASK);
3827 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3828 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3830 wr32(hw, I40E_QINT_RQCTL(qp), val);
3832 val = rd32(hw, I40E_QINT_TQCTL(qp));
3834 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3835 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3837 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3838 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3839 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3840 I40E_QINT_TQCTL_INTEVENT_MASK);
3842 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3843 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3845 wr32(hw, I40E_QINT_TQCTL(qp), val);
3850 free_irq(pf->pdev->irq, pf);
3852 val = rd32(hw, I40E_PFINT_LNKLST0);
3853 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3854 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3855 val |= I40E_QUEUE_END_OF_LIST
3856 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3857 wr32(hw, I40E_PFINT_LNKLST0, val);
3859 val = rd32(hw, I40E_QINT_RQCTL(qp));
3860 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3861 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3862 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3863 I40E_QINT_RQCTL_INTEVENT_MASK);
3865 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3866 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3868 wr32(hw, I40E_QINT_RQCTL(qp), val);
3870 val = rd32(hw, I40E_QINT_TQCTL(qp));
3872 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3873 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3874 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3875 I40E_QINT_TQCTL_INTEVENT_MASK);
3877 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3878 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3880 wr32(hw, I40E_QINT_TQCTL(qp), val);
3885 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3886 * @vsi: the VSI being configured
3887 * @v_idx: Index of vector to be freed
3889 * This function frees the memory allocated to the q_vector. In addition if
3890 * NAPI is enabled it will delete any references to the NAPI struct prior
3891 * to freeing the q_vector.
3893 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3895 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3896 struct i40e_ring *ring;
3901 /* disassociate q_vector from rings */
3902 i40e_for_each_ring(ring, q_vector->tx)
3903 ring->q_vector = NULL;
3905 i40e_for_each_ring(ring, q_vector->rx)
3906 ring->q_vector = NULL;
3908 /* only VSI w/ an associated netdev is set up w/ NAPI */
3910 netif_napi_del(&q_vector->napi);
3912 vsi->q_vectors[v_idx] = NULL;
3914 kfree_rcu(q_vector, rcu);
3918 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3919 * @vsi: the VSI being un-configured
3921 * This frees the memory allocated to the q_vectors and
3922 * deletes references to the NAPI struct.
3924 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3928 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3929 i40e_free_q_vector(vsi, v_idx);
3933 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3934 * @pf: board private structure
3936 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3938 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3939 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3940 pci_disable_msix(pf->pdev);
3941 kfree(pf->msix_entries);
3942 pf->msix_entries = NULL;
3943 kfree(pf->irq_pile);
3944 pf->irq_pile = NULL;
3945 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3946 pci_disable_msi(pf->pdev);
3948 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3952 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3953 * @pf: board private structure
3955 * We go through and clear interrupt specific resources and reset the structure
3956 * to pre-load conditions
3958 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3962 i40e_stop_misc_vector(pf);
3963 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3964 synchronize_irq(pf->msix_entries[0].vector);
3965 free_irq(pf->msix_entries[0].vector, pf);
3968 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3969 for (i = 0; i < pf->num_alloc_vsi; i++)
3971 i40e_vsi_free_q_vectors(pf->vsi[i]);
3972 i40e_reset_interrupt_capability(pf);
3976 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3977 * @vsi: the VSI being configured
3979 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3986 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3987 napi_enable(&vsi->q_vectors[q_idx]->napi);
3991 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3992 * @vsi: the VSI being configured
3994 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4001 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4002 napi_disable(&vsi->q_vectors[q_idx]->napi);
4006 * i40e_vsi_close - Shut down a VSI
4007 * @vsi: the vsi to be quelled
4009 static void i40e_vsi_close(struct i40e_vsi *vsi)
4011 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4013 i40e_vsi_free_irq(vsi);
4014 i40e_vsi_free_tx_resources(vsi);
4015 i40e_vsi_free_rx_resources(vsi);
4016 vsi->current_netdev_flags = 0;
4020 * i40e_quiesce_vsi - Pause a given VSI
4021 * @vsi: the VSI being paused
4023 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4025 if (test_bit(__I40E_DOWN, &vsi->state))
4028 /* No need to disable FCoE VSI when Tx suspended */
4029 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4030 vsi->type == I40E_VSI_FCOE) {
4031 dev_dbg(&vsi->back->pdev->dev,
4032 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4036 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4037 if (vsi->netdev && netif_running(vsi->netdev)) {
4038 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4040 i40e_vsi_close(vsi);
4045 * i40e_unquiesce_vsi - Resume a given VSI
4046 * @vsi: the VSI being resumed
4048 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4050 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4053 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4054 if (vsi->netdev && netif_running(vsi->netdev))
4055 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4057 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4061 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4064 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4068 for (v = 0; v < pf->num_alloc_vsi; v++) {
4070 i40e_quiesce_vsi(pf->vsi[v]);
4075 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4078 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4082 for (v = 0; v < pf->num_alloc_vsi; v++) {
4084 i40e_unquiesce_vsi(pf->vsi[v]);
4088 #ifdef CONFIG_I40E_DCB
4090 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4091 * @vsi: the VSI being configured
4093 * This function waits for the given VSI's Tx queues to be disabled.
4095 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4097 struct i40e_pf *pf = vsi->back;
4100 pf_q = vsi->base_queue;
4101 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4102 /* Check and wait for the disable status of the queue */
4103 ret = i40e_pf_txq_wait(pf, pf_q, false);
4105 dev_info(&pf->pdev->dev,
4106 "VSI seid %d Tx ring %d disable timeout\n",
4116 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4119 * This function waits for the Tx queues to be in disabled state for all the
4120 * VSIs that are managed by this PF.
4122 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4126 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4127 /* No need to wait for FCoE VSI queues */
4128 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4129 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4141 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4142 * @q_idx: TX queue number
4143 * @vsi: Pointer to VSI struct
4145 * This function checks specified queue for given VSI. Detects hung condition.
4146 * Sets hung bit since it is two step process. Before next run of service task
4147 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4148 * hung condition remain unchanged and during subsequent run, this function
4149 * issues SW interrupt to recover from hung condition.
4151 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4153 struct i40e_ring *tx_ring = NULL;
4155 u32 head, val, tx_pending;
4160 /* now that we have an index, find the tx_ring struct */
4161 for (i = 0; i < vsi->num_queue_pairs; i++) {
4162 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4163 if (q_idx == vsi->tx_rings[i]->queue_index) {
4164 tx_ring = vsi->tx_rings[i];
4173 /* Read interrupt register */
4174 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4176 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4177 tx_ring->vsi->base_vector - 1));
4179 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4181 head = i40e_get_head(tx_ring);
4183 tx_pending = i40e_get_tx_pending(tx_ring);
4185 /* Interrupts are disabled and TX pending is non-zero,
4186 * trigger the SW interrupt (don't wait). Worst case
4187 * there will be one extra interrupt which may result
4188 * into not cleaning any queues because queues are cleaned.
4190 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4191 i40e_force_wb(vsi, tx_ring->q_vector);
4195 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4196 * @pf: pointer to PF struct
4198 * LAN VSI has netdev and netdev has TX queues. This function is to check
4199 * each of those TX queues if they are hung, trigger recovery by issuing
4202 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4204 struct net_device *netdev;
4205 struct i40e_vsi *vsi;
4208 /* Only for LAN VSI */
4209 vsi = pf->vsi[pf->lan_vsi];
4214 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4215 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4216 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4219 /* Make sure type is MAIN VSI */
4220 if (vsi->type != I40E_VSI_MAIN)
4223 netdev = vsi->netdev;
4227 /* Bail out if netif_carrier is not OK */
4228 if (!netif_carrier_ok(netdev))
4231 /* Go thru' TX queues for netdev */
4232 for (i = 0; i < netdev->num_tx_queues; i++) {
4233 struct netdev_queue *q;
4235 q = netdev_get_tx_queue(netdev, i);
4237 i40e_detect_recover_hung_queue(i, vsi);
4242 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4243 * @pf: pointer to PF
4245 * Get TC map for ISCSI PF type that will include iSCSI TC
4248 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4250 struct i40e_dcb_app_priority_table app;
4251 struct i40e_hw *hw = &pf->hw;
4252 u8 enabled_tc = 1; /* TC0 is always enabled */
4254 /* Get the iSCSI APP TLV */
4255 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4257 for (i = 0; i < dcbcfg->numapps; i++) {
4258 app = dcbcfg->app[i];
4259 if (app.selector == I40E_APP_SEL_TCPIP &&
4260 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4261 tc = dcbcfg->etscfg.prioritytable[app.priority];
4262 enabled_tc |= BIT_ULL(tc);
4271 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4272 * @dcbcfg: the corresponding DCBx configuration structure
4274 * Return the number of TCs from given DCBx configuration
4276 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4281 /* Scan the ETS Config Priority Table to find
4282 * traffic class enabled for a given priority
4283 * and use the traffic class index to get the
4284 * number of traffic classes enabled
4286 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4287 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4288 num_tc = dcbcfg->etscfg.prioritytable[i];
4291 /* Traffic class index starts from zero so
4292 * increment to return the actual count
4298 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4299 * @dcbcfg: the corresponding DCBx configuration structure
4301 * Query the current DCB configuration and return the number of
4302 * traffic classes enabled from the given DCBX config
4304 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4306 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4310 for (i = 0; i < num_tc; i++)
4311 enabled_tc |= BIT(i);
4317 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4318 * @pf: PF being queried
4320 * Return number of traffic classes enabled for the given PF
4322 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4324 struct i40e_hw *hw = &pf->hw;
4327 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4329 /* If DCB is not enabled then always in single TC */
4330 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4333 /* SFP mode will be enabled for all TCs on port */
4334 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4335 return i40e_dcb_get_num_tc(dcbcfg);
4337 /* MFP mode return count of enabled TCs for this PF */
4338 if (pf->hw.func_caps.iscsi)
4339 enabled_tc = i40e_get_iscsi_tc_map(pf);
4341 return 1; /* Only TC0 */
4343 /* At least have TC0 */
4344 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4345 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4346 if (enabled_tc & BIT_ULL(i))
4353 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4354 * @pf: PF being queried
4356 * Return a bitmap for first enabled traffic class for this PF.
4358 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4360 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4364 return 0x1; /* TC0 */
4366 /* Find the first enabled TC */
4367 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4368 if (enabled_tc & BIT_ULL(i))
4376 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4377 * @pf: PF being queried
4379 * Return a bitmap for enabled traffic classes for this PF.
4381 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4383 /* If DCB is not enabled for this PF then just return default TC */
4384 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4385 return i40e_pf_get_default_tc(pf);
4387 /* SFP mode we want PF to be enabled for all TCs */
4388 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4389 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4391 /* MFP enabled and iSCSI PF type */
4392 if (pf->hw.func_caps.iscsi)
4393 return i40e_get_iscsi_tc_map(pf);
4395 return i40e_pf_get_default_tc(pf);
4399 * i40e_vsi_get_bw_info - Query VSI BW Information
4400 * @vsi: the VSI being queried
4402 * Returns 0 on success, negative value on failure
4404 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4406 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4407 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4408 struct i40e_pf *pf = vsi->back;
4409 struct i40e_hw *hw = &pf->hw;
4414 /* Get the VSI level BW configuration */
4415 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4417 dev_info(&pf->pdev->dev,
4418 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4419 i40e_stat_str(&pf->hw, ret),
4420 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4424 /* Get the VSI level BW configuration per TC */
4425 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4428 dev_info(&pf->pdev->dev,
4429 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4430 i40e_stat_str(&pf->hw, ret),
4431 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4435 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4436 dev_info(&pf->pdev->dev,
4437 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4438 bw_config.tc_valid_bits,
4439 bw_ets_config.tc_valid_bits);
4440 /* Still continuing */
4443 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4444 vsi->bw_max_quanta = bw_config.max_bw;
4445 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4446 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4447 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4448 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4449 vsi->bw_ets_limit_credits[i] =
4450 le16_to_cpu(bw_ets_config.credits[i]);
4451 /* 3 bits out of 4 for each TC */
4452 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4459 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4460 * @vsi: the VSI being configured
4461 * @enabled_tc: TC bitmap
4462 * @bw_credits: BW shared credits per TC
4464 * Returns 0 on success, negative value on failure
4466 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4469 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4473 bw_data.tc_valid_bits = enabled_tc;
4474 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4475 bw_data.tc_bw_credits[i] = bw_share[i];
4477 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4480 dev_info(&vsi->back->pdev->dev,
4481 "AQ command Config VSI BW allocation per TC failed = %d\n",
4482 vsi->back->hw.aq.asq_last_status);
4486 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4487 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4493 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4494 * @vsi: the VSI being configured
4495 * @enabled_tc: TC map to be enabled
4498 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4500 struct net_device *netdev = vsi->netdev;
4501 struct i40e_pf *pf = vsi->back;
4502 struct i40e_hw *hw = &pf->hw;
4505 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4511 netdev_reset_tc(netdev);
4515 /* Set up actual enabled TCs on the VSI */
4516 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4519 /* set per TC queues for the VSI */
4520 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4521 /* Only set TC queues for enabled tcs
4523 * e.g. For a VSI that has TC0 and TC3 enabled the
4524 * enabled_tc bitmap would be 0x00001001; the driver
4525 * will set the numtc for netdev as 2 that will be
4526 * referenced by the netdev layer as TC 0 and 1.
4528 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4529 netdev_set_tc_queue(netdev,
4530 vsi->tc_config.tc_info[i].netdev_tc,
4531 vsi->tc_config.tc_info[i].qcount,
4532 vsi->tc_config.tc_info[i].qoffset);
4535 /* Assign UP2TC map for the VSI */
4536 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4537 /* Get the actual TC# for the UP */
4538 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4539 /* Get the mapped netdev TC# for the UP */
4540 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4541 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4546 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4547 * @vsi: the VSI being configured
4548 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4550 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4551 struct i40e_vsi_context *ctxt)
4553 /* copy just the sections touched not the entire info
4554 * since not all sections are valid as returned by
4557 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4558 memcpy(&vsi->info.queue_mapping,
4559 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4560 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4561 sizeof(vsi->info.tc_mapping));
4565 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4566 * @vsi: VSI to be configured
4567 * @enabled_tc: TC bitmap
4569 * This configures a particular VSI for TCs that are mapped to the
4570 * given TC bitmap. It uses default bandwidth share for TCs across
4571 * VSIs to configure TC for a particular VSI.
4574 * It is expected that the VSI queues have been quisced before calling
4577 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4579 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4580 struct i40e_vsi_context ctxt;
4584 /* Check if enabled_tc is same as existing or new TCs */
4585 if (vsi->tc_config.enabled_tc == enabled_tc)
4588 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4589 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4590 if (enabled_tc & BIT_ULL(i))
4594 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4596 dev_info(&vsi->back->pdev->dev,
4597 "Failed configuring TC map %d for VSI %d\n",
4598 enabled_tc, vsi->seid);
4602 /* Update Queue Pairs Mapping for currently enabled UPs */
4603 ctxt.seid = vsi->seid;
4604 ctxt.pf_num = vsi->back->hw.pf_id;
4606 ctxt.uplink_seid = vsi->uplink_seid;
4607 ctxt.info = vsi->info;
4608 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4610 /* Update the VSI after updating the VSI queue-mapping information */
4611 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4613 dev_info(&vsi->back->pdev->dev,
4614 "Update vsi tc config failed, err %s aq_err %s\n",
4615 i40e_stat_str(&vsi->back->hw, ret),
4616 i40e_aq_str(&vsi->back->hw,
4617 vsi->back->hw.aq.asq_last_status));
4620 /* update the local VSI info with updated queue map */
4621 i40e_vsi_update_queue_map(vsi, &ctxt);
4622 vsi->info.valid_sections = 0;
4624 /* Update current VSI BW information */
4625 ret = i40e_vsi_get_bw_info(vsi);
4627 dev_info(&vsi->back->pdev->dev,
4628 "Failed updating vsi bw info, err %s aq_err %s\n",
4629 i40e_stat_str(&vsi->back->hw, ret),
4630 i40e_aq_str(&vsi->back->hw,
4631 vsi->back->hw.aq.asq_last_status));
4635 /* Update the netdev TC setup */
4636 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4642 * i40e_veb_config_tc - Configure TCs for given VEB
4644 * @enabled_tc: TC bitmap
4646 * Configures given TC bitmap for VEB (switching) element
4648 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4650 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4651 struct i40e_pf *pf = veb->pf;
4655 /* No TCs or already enabled TCs just return */
4656 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4659 bw_data.tc_valid_bits = enabled_tc;
4660 /* bw_data.absolute_credits is not set (relative) */
4662 /* Enable ETS TCs with equal BW Share for now */
4663 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4664 if (enabled_tc & BIT_ULL(i))
4665 bw_data.tc_bw_share_credits[i] = 1;
4668 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4671 dev_info(&pf->pdev->dev,
4672 "VEB bw config failed, err %s aq_err %s\n",
4673 i40e_stat_str(&pf->hw, ret),
4674 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4678 /* Update the BW information */
4679 ret = i40e_veb_get_bw_info(veb);
4681 dev_info(&pf->pdev->dev,
4682 "Failed getting veb bw config, err %s aq_err %s\n",
4683 i40e_stat_str(&pf->hw, ret),
4684 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4691 #ifdef CONFIG_I40E_DCB
4693 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4696 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4697 * the caller would've quiesce all the VSIs before calling
4700 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4706 /* Enable the TCs available on PF to all VEBs */
4707 tc_map = i40e_pf_get_tc_map(pf);
4708 for (v = 0; v < I40E_MAX_VEB; v++) {
4711 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4713 dev_info(&pf->pdev->dev,
4714 "Failed configuring TC for VEB seid=%d\n",
4716 /* Will try to configure as many components */
4720 /* Update each VSI */
4721 for (v = 0; v < pf->num_alloc_vsi; v++) {
4725 /* - Enable all TCs for the LAN VSI
4727 * - For FCoE VSI only enable the TC configured
4728 * as per the APP TLV
4730 * - For all others keep them at TC0 for now
4732 if (v == pf->lan_vsi)
4733 tc_map = i40e_pf_get_tc_map(pf);
4735 tc_map = i40e_pf_get_default_tc(pf);
4737 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4738 tc_map = i40e_get_fcoe_tc_map(pf);
4739 #endif /* #ifdef I40E_FCOE */
4741 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4743 dev_info(&pf->pdev->dev,
4744 "Failed configuring TC for VSI seid=%d\n",
4746 /* Will try to configure as many components */
4748 /* Re-configure VSI vectors based on updated TC map */
4749 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4750 if (pf->vsi[v]->netdev)
4751 i40e_dcbnl_set_all(pf->vsi[v]);
4757 * i40e_resume_port_tx - Resume port Tx
4760 * Resume a port's Tx and issue a PF reset in case of failure to
4763 static int i40e_resume_port_tx(struct i40e_pf *pf)
4765 struct i40e_hw *hw = &pf->hw;
4768 ret = i40e_aq_resume_port_tx(hw, NULL);
4770 dev_info(&pf->pdev->dev,
4771 "Resume Port Tx failed, err %s aq_err %s\n",
4772 i40e_stat_str(&pf->hw, ret),
4773 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4774 /* Schedule PF reset to recover */
4775 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4776 i40e_service_event_schedule(pf);
4783 * i40e_init_pf_dcb - Initialize DCB configuration
4784 * @pf: PF being configured
4786 * Query the current DCB configuration and cache it
4787 * in the hardware structure
4789 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4791 struct i40e_hw *hw = &pf->hw;
4794 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4795 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4796 (pf->hw.aq.fw_maj_ver < 4))
4799 /* Get the initial DCB configuration */
4800 err = i40e_init_dcb(hw);
4802 /* Device/Function is not DCBX capable */
4803 if ((!hw->func_caps.dcb) ||
4804 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4805 dev_info(&pf->pdev->dev,
4806 "DCBX offload is not supported or is disabled for this PF.\n");
4808 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4812 /* When status is not DISABLED then DCBX in FW */
4813 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4814 DCB_CAP_DCBX_VER_IEEE;
4816 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4817 /* Enable DCB tagging only when more than one TC */
4818 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4819 pf->flags |= I40E_FLAG_DCB_ENABLED;
4820 dev_dbg(&pf->pdev->dev,
4821 "DCBX offload is supported for this PF.\n");
4824 dev_info(&pf->pdev->dev,
4825 "Query for DCB configuration failed, err %s aq_err %s\n",
4826 i40e_stat_str(&pf->hw, err),
4827 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4833 #endif /* CONFIG_I40E_DCB */
4834 #define SPEED_SIZE 14
4837 * i40e_print_link_message - print link up or down
4838 * @vsi: the VSI for which link needs a message
4840 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4842 char speed[SPEED_SIZE] = "Unknown";
4843 char fc[FC_SIZE] = "RX/TX";
4845 if (vsi->current_isup == isup)
4847 vsi->current_isup = isup;
4849 netdev_info(vsi->netdev, "NIC Link is Down\n");
4853 /* Warn user if link speed on NPAR enabled partition is not at
4856 if (vsi->back->hw.func_caps.npar_enable &&
4857 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4858 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4859 netdev_warn(vsi->netdev,
4860 "The partition detected link speed that is less than 10Gbps\n");
4862 switch (vsi->back->hw.phy.link_info.link_speed) {
4863 case I40E_LINK_SPEED_40GB:
4864 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4866 case I40E_LINK_SPEED_20GB:
4867 strncpy(speed, "20 Gbps", SPEED_SIZE);
4869 case I40E_LINK_SPEED_10GB:
4870 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4872 case I40E_LINK_SPEED_1GB:
4873 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4875 case I40E_LINK_SPEED_100MB:
4876 strncpy(speed, "100 Mbps", SPEED_SIZE);
4882 switch (vsi->back->hw.fc.current_mode) {
4884 strlcpy(fc, "RX/TX", FC_SIZE);
4886 case I40E_FC_TX_PAUSE:
4887 strlcpy(fc, "TX", FC_SIZE);
4889 case I40E_FC_RX_PAUSE:
4890 strlcpy(fc, "RX", FC_SIZE);
4893 strlcpy(fc, "None", FC_SIZE);
4897 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4902 * i40e_up_complete - Finish the last steps of bringing up a connection
4903 * @vsi: the VSI being configured
4905 static int i40e_up_complete(struct i40e_vsi *vsi)
4907 struct i40e_pf *pf = vsi->back;
4910 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4911 i40e_vsi_configure_msix(vsi);
4913 i40e_configure_msi_and_legacy(vsi);
4916 err = i40e_vsi_control_rings(vsi, true);
4920 clear_bit(__I40E_DOWN, &vsi->state);
4921 i40e_napi_enable_all(vsi);
4922 i40e_vsi_enable_irq(vsi);
4924 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4926 i40e_print_link_message(vsi, true);
4927 netif_tx_start_all_queues(vsi->netdev);
4928 netif_carrier_on(vsi->netdev);
4929 } else if (vsi->netdev) {
4930 i40e_print_link_message(vsi, false);
4931 /* need to check for qualified module here*/
4932 if ((pf->hw.phy.link_info.link_info &
4933 I40E_AQ_MEDIA_AVAILABLE) &&
4934 (!(pf->hw.phy.link_info.an_info &
4935 I40E_AQ_QUALIFIED_MODULE)))
4936 netdev_err(vsi->netdev,
4937 "the driver failed to link because an unqualified module was detected.");
4940 /* replay FDIR SB filters */
4941 if (vsi->type == I40E_VSI_FDIR) {
4942 /* reset fd counters */
4943 pf->fd_add_err = pf->fd_atr_cnt = 0;
4944 if (pf->fd_tcp_rule > 0) {
4945 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4946 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4947 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4948 pf->fd_tcp_rule = 0;
4950 i40e_fdir_filter_restore(vsi);
4952 i40e_service_event_schedule(pf);
4958 * i40e_vsi_reinit_locked - Reset the VSI
4959 * @vsi: the VSI being configured
4961 * Rebuild the ring structs after some configuration
4962 * has changed, e.g. MTU size.
4964 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4966 struct i40e_pf *pf = vsi->back;
4968 WARN_ON(in_interrupt());
4969 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4970 usleep_range(1000, 2000);
4973 /* Give a VF some time to respond to the reset. The
4974 * two second wait is based upon the watchdog cycle in
4977 if (vsi->type == I40E_VSI_SRIOV)
4980 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4984 * i40e_up - Bring the connection back up after being down
4985 * @vsi: the VSI being configured
4987 int i40e_up(struct i40e_vsi *vsi)
4991 err = i40e_vsi_configure(vsi);
4993 err = i40e_up_complete(vsi);
4999 * i40e_down - Shutdown the connection processing
5000 * @vsi: the VSI being stopped
5002 void i40e_down(struct i40e_vsi *vsi)
5006 /* It is assumed that the caller of this function
5007 * sets the vsi->state __I40E_DOWN bit.
5010 netif_carrier_off(vsi->netdev);
5011 netif_tx_disable(vsi->netdev);
5013 i40e_vsi_disable_irq(vsi);
5014 i40e_vsi_control_rings(vsi, false);
5015 i40e_napi_disable_all(vsi);
5017 for (i = 0; i < vsi->num_queue_pairs; i++) {
5018 i40e_clean_tx_ring(vsi->tx_rings[i]);
5019 i40e_clean_rx_ring(vsi->rx_rings[i]);
5024 * i40e_setup_tc - configure multiple traffic classes
5025 * @netdev: net device to configure
5026 * @tc: number of traffic classes to enable
5029 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5031 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5034 struct i40e_netdev_priv *np = netdev_priv(netdev);
5035 struct i40e_vsi *vsi = np->vsi;
5036 struct i40e_pf *pf = vsi->back;
5041 /* Check if DCB enabled to continue */
5042 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5043 netdev_info(netdev, "DCB is not enabled for adapter\n");
5047 /* Check if MFP enabled */
5048 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5049 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5053 /* Check whether tc count is within enabled limit */
5054 if (tc > i40e_pf_get_num_tc(pf)) {
5055 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5059 /* Generate TC map for number of tc requested */
5060 for (i = 0; i < tc; i++)
5061 enabled_tc |= BIT_ULL(i);
5063 /* Requesting same TC configuration as already enabled */
5064 if (enabled_tc == vsi->tc_config.enabled_tc)
5067 /* Quiesce VSI queues */
5068 i40e_quiesce_vsi(vsi);
5070 /* Configure VSI for enabled TCs */
5071 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5073 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5079 i40e_unquiesce_vsi(vsi);
5086 * i40e_open - Called when a network interface is made active
5087 * @netdev: network interface device structure
5089 * The open entry point is called when a network interface is made
5090 * active by the system (IFF_UP). At this point all resources needed
5091 * for transmit and receive operations are allocated, the interrupt
5092 * handler is registered with the OS, the netdev watchdog subtask is
5093 * enabled, and the stack is notified that the interface is ready.
5095 * Returns 0 on success, negative value on failure
5097 int i40e_open(struct net_device *netdev)
5099 struct i40e_netdev_priv *np = netdev_priv(netdev);
5100 struct i40e_vsi *vsi = np->vsi;
5101 struct i40e_pf *pf = vsi->back;
5104 /* disallow open during test or if eeprom is broken */
5105 if (test_bit(__I40E_TESTING, &pf->state) ||
5106 test_bit(__I40E_BAD_EEPROM, &pf->state))
5109 netif_carrier_off(netdev);
5111 err = i40e_vsi_open(vsi);
5115 /* configure global TSO hardware offload settings */
5116 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5117 TCP_FLAG_FIN) >> 16);
5118 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5120 TCP_FLAG_CWR) >> 16);
5121 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5123 #ifdef CONFIG_I40E_VXLAN
5124 vxlan_get_rx_port(netdev);
5132 * @vsi: the VSI to open
5134 * Finish initialization of the VSI.
5136 * Returns 0 on success, negative value on failure
5138 int i40e_vsi_open(struct i40e_vsi *vsi)
5140 struct i40e_pf *pf = vsi->back;
5141 char int_name[I40E_INT_NAME_STR_LEN];
5144 /* allocate descriptors */
5145 err = i40e_vsi_setup_tx_resources(vsi);
5148 err = i40e_vsi_setup_rx_resources(vsi);
5152 err = i40e_vsi_configure(vsi);
5157 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5158 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5159 err = i40e_vsi_request_irq(vsi, int_name);
5163 /* Notify the stack of the actual queue counts. */
5164 err = netif_set_real_num_tx_queues(vsi->netdev,
5165 vsi->num_queue_pairs);
5167 goto err_set_queues;
5169 err = netif_set_real_num_rx_queues(vsi->netdev,
5170 vsi->num_queue_pairs);
5172 goto err_set_queues;
5174 } else if (vsi->type == I40E_VSI_FDIR) {
5175 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5176 dev_driver_string(&pf->pdev->dev),
5177 dev_name(&pf->pdev->dev));
5178 err = i40e_vsi_request_irq(vsi, int_name);
5185 err = i40e_up_complete(vsi);
5187 goto err_up_complete;
5194 i40e_vsi_free_irq(vsi);
5196 i40e_vsi_free_rx_resources(vsi);
5198 i40e_vsi_free_tx_resources(vsi);
5199 if (vsi == pf->vsi[pf->lan_vsi])
5200 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5206 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5207 * @pf: Pointer to PF
5209 * This function destroys the hlist where all the Flow Director
5210 * filters were saved.
5212 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5214 struct i40e_fdir_filter *filter;
5215 struct hlist_node *node2;
5217 hlist_for_each_entry_safe(filter, node2,
5218 &pf->fdir_filter_list, fdir_node) {
5219 hlist_del(&filter->fdir_node);
5222 pf->fdir_pf_active_filters = 0;
5226 * i40e_close - Disables a network interface
5227 * @netdev: network interface device structure
5229 * The close entry point is called when an interface is de-activated
5230 * by the OS. The hardware is still under the driver's control, but
5231 * this netdev interface is disabled.
5233 * Returns 0, this is not allowed to fail
5236 int i40e_close(struct net_device *netdev)
5238 static int i40e_close(struct net_device *netdev)
5241 struct i40e_netdev_priv *np = netdev_priv(netdev);
5242 struct i40e_vsi *vsi = np->vsi;
5244 i40e_vsi_close(vsi);
5250 * i40e_do_reset - Start a PF or Core Reset sequence
5251 * @pf: board private structure
5252 * @reset_flags: which reset is requested
5254 * The essential difference in resets is that the PF Reset
5255 * doesn't clear the packet buffers, doesn't reset the PE
5256 * firmware, and doesn't bother the other PFs on the chip.
5258 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5262 WARN_ON(in_interrupt());
5264 if (i40e_check_asq_alive(&pf->hw))
5265 i40e_vc_notify_reset(pf);
5267 /* do the biggest reset indicated */
5268 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5270 /* Request a Global Reset
5272 * This will start the chip's countdown to the actual full
5273 * chip reset event, and a warning interrupt to be sent
5274 * to all PFs, including the requestor. Our handler
5275 * for the warning interrupt will deal with the shutdown
5276 * and recovery of the switch setup.
5278 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5279 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5280 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5281 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5283 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5285 /* Request a Core Reset
5287 * Same as Global Reset, except does *not* include the MAC/PHY
5289 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5290 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5291 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5292 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5293 i40e_flush(&pf->hw);
5295 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5297 /* Request a PF Reset
5299 * Resets only the PF-specific registers
5301 * This goes directly to the tear-down and rebuild of
5302 * the switch, since we need to do all the recovery as
5303 * for the Core Reset.
5305 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5306 i40e_handle_reset_warning(pf);
5308 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5311 /* Find the VSI(s) that requested a re-init */
5312 dev_info(&pf->pdev->dev,
5313 "VSI reinit requested\n");
5314 for (v = 0; v < pf->num_alloc_vsi; v++) {
5315 struct i40e_vsi *vsi = pf->vsi[v];
5317 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5318 i40e_vsi_reinit_locked(pf->vsi[v]);
5319 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5323 /* no further action needed, so return now */
5325 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5328 /* Find the VSI(s) that needs to be brought down */
5329 dev_info(&pf->pdev->dev, "VSI down requested\n");
5330 for (v = 0; v < pf->num_alloc_vsi; v++) {
5331 struct i40e_vsi *vsi = pf->vsi[v];
5333 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5334 set_bit(__I40E_DOWN, &vsi->state);
5336 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5340 /* no further action needed, so return now */
5343 dev_info(&pf->pdev->dev,
5344 "bad reset request 0x%08x\n", reset_flags);
5349 #ifdef CONFIG_I40E_DCB
5351 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5352 * @pf: board private structure
5353 * @old_cfg: current DCB config
5354 * @new_cfg: new DCB config
5356 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5357 struct i40e_dcbx_config *old_cfg,
5358 struct i40e_dcbx_config *new_cfg)
5360 bool need_reconfig = false;
5362 /* Check if ETS configuration has changed */
5363 if (memcmp(&new_cfg->etscfg,
5365 sizeof(new_cfg->etscfg))) {
5366 /* If Priority Table has changed reconfig is needed */
5367 if (memcmp(&new_cfg->etscfg.prioritytable,
5368 &old_cfg->etscfg.prioritytable,
5369 sizeof(new_cfg->etscfg.prioritytable))) {
5370 need_reconfig = true;
5371 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5374 if (memcmp(&new_cfg->etscfg.tcbwtable,
5375 &old_cfg->etscfg.tcbwtable,
5376 sizeof(new_cfg->etscfg.tcbwtable)))
5377 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5379 if (memcmp(&new_cfg->etscfg.tsatable,
5380 &old_cfg->etscfg.tsatable,
5381 sizeof(new_cfg->etscfg.tsatable)))
5382 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5385 /* Check if PFC configuration has changed */
5386 if (memcmp(&new_cfg->pfc,
5388 sizeof(new_cfg->pfc))) {
5389 need_reconfig = true;
5390 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5393 /* Check if APP Table has changed */
5394 if (memcmp(&new_cfg->app,
5396 sizeof(new_cfg->app))) {
5397 need_reconfig = true;
5398 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5401 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5402 return need_reconfig;
5406 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5407 * @pf: board private structure
5408 * @e: event info posted on ARQ
5410 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5411 struct i40e_arq_event_info *e)
5413 struct i40e_aqc_lldp_get_mib *mib =
5414 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5415 struct i40e_hw *hw = &pf->hw;
5416 struct i40e_dcbx_config tmp_dcbx_cfg;
5417 bool need_reconfig = false;
5421 /* Not DCB capable or capability disabled */
5422 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5425 /* Ignore if event is not for Nearest Bridge */
5426 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5427 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5428 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5429 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5432 /* Check MIB Type and return if event for Remote MIB update */
5433 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5434 dev_dbg(&pf->pdev->dev,
5435 "LLDP event mib type %s\n", type ? "remote" : "local");
5436 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5437 /* Update the remote cached instance and return */
5438 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5439 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5440 &hw->remote_dcbx_config);
5444 /* Store the old configuration */
5445 tmp_dcbx_cfg = hw->local_dcbx_config;
5447 /* Reset the old DCBx configuration data */
5448 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5449 /* Get updated DCBX data from firmware */
5450 ret = i40e_get_dcb_config(&pf->hw);
5452 dev_info(&pf->pdev->dev,
5453 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5454 i40e_stat_str(&pf->hw, ret),
5455 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5459 /* No change detected in DCBX configs */
5460 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5461 sizeof(tmp_dcbx_cfg))) {
5462 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5466 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5467 &hw->local_dcbx_config);
5469 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5474 /* Enable DCB tagging only when more than one TC */
5475 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5476 pf->flags |= I40E_FLAG_DCB_ENABLED;
5478 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5480 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5481 /* Reconfiguration needed quiesce all VSIs */
5482 i40e_pf_quiesce_all_vsi(pf);
5484 /* Changes in configuration update VEB/VSI */
5485 i40e_dcb_reconfigure(pf);
5487 ret = i40e_resume_port_tx(pf);
5489 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5490 /* In case of error no point in resuming VSIs */
5494 /* Wait for the PF's Tx queues to be disabled */
5495 ret = i40e_pf_wait_txq_disabled(pf);
5497 /* Schedule PF reset to recover */
5498 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5499 i40e_service_event_schedule(pf);
5501 i40e_pf_unquiesce_all_vsi(pf);
5507 #endif /* CONFIG_I40E_DCB */
5510 * i40e_do_reset_safe - Protected reset path for userland calls.
5511 * @pf: board private structure
5512 * @reset_flags: which reset is requested
5515 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5518 i40e_do_reset(pf, reset_flags);
5523 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5524 * @pf: board private structure
5525 * @e: event info posted on ARQ
5527 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5530 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5531 struct i40e_arq_event_info *e)
5533 struct i40e_aqc_lan_overflow *data =
5534 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5535 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5536 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5537 struct i40e_hw *hw = &pf->hw;
5541 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5544 /* Queue belongs to VF, find the VF and issue VF reset */
5545 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5546 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5547 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5548 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5549 vf_id -= hw->func_caps.vf_base_id;
5550 vf = &pf->vf[vf_id];
5551 i40e_vc_notify_vf_reset(vf);
5552 /* Allow VF to process pending reset notification */
5554 i40e_reset_vf(vf, false);
5559 * i40e_service_event_complete - Finish up the service event
5560 * @pf: board private structure
5562 static void i40e_service_event_complete(struct i40e_pf *pf)
5564 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5566 /* flush memory to make sure state is correct before next watchog */
5567 smp_mb__before_atomic();
5568 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5572 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5573 * @pf: board private structure
5575 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5579 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5580 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5585 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5586 * @pf: board private structure
5588 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5592 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5593 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5594 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5595 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5600 * i40e_get_global_fd_count - Get total FD filters programmed on device
5601 * @pf: board private structure
5603 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5607 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5608 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5609 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5610 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5615 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5616 * @pf: board private structure
5618 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5620 struct i40e_fdir_filter *filter;
5621 u32 fcnt_prog, fcnt_avail;
5622 struct hlist_node *node;
5624 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5627 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5630 fcnt_prog = i40e_get_global_fd_count(pf);
5631 fcnt_avail = pf->fdir_pf_filter_count;
5632 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5633 (pf->fd_add_err == 0) ||
5634 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5635 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5636 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5637 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5638 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5639 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5642 /* Wait for some more space to be available to turn on ATR */
5643 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5644 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5645 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5646 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5647 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5648 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5652 /* if hw had a problem adding a filter, delete it */
5653 if (pf->fd_inv > 0) {
5654 hlist_for_each_entry_safe(filter, node,
5655 &pf->fdir_filter_list, fdir_node) {
5656 if (filter->fd_id == pf->fd_inv) {
5657 hlist_del(&filter->fdir_node);
5659 pf->fdir_pf_active_filters--;
5665 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5666 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5668 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5669 * @pf: board private structure
5671 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5673 unsigned long min_flush_time;
5674 int flush_wait_retry = 50;
5675 bool disable_atr = false;
5679 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5682 if (time_after(jiffies, pf->fd_flush_timestamp +
5683 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5684 /* If the flush is happening too quick and we have mostly
5685 * SB rules we should not re-enable ATR for some time.
5687 min_flush_time = pf->fd_flush_timestamp
5688 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5689 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5691 if (!(time_after(jiffies, min_flush_time)) &&
5692 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5693 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5694 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5698 pf->fd_flush_timestamp = jiffies;
5699 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5700 /* flush all filters */
5701 wr32(&pf->hw, I40E_PFQF_CTL_1,
5702 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5703 i40e_flush(&pf->hw);
5707 /* Check FD flush status every 5-6msec */
5708 usleep_range(5000, 6000);
5709 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5710 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5712 } while (flush_wait_retry--);
5713 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5714 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5716 /* replay sideband filters */
5717 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5719 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5720 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5721 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5722 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5728 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5729 * @pf: board private structure
5731 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5733 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5736 /* We can see up to 256 filter programming desc in transit if the filters are
5737 * being applied really fast; before we see the first
5738 * filter miss error on Rx queue 0. Accumulating enough error messages before
5739 * reacting will make sure we don't cause flush too often.
5741 #define I40E_MAX_FD_PROGRAM_ERROR 256
5744 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5745 * @pf: board private structure
5747 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5750 /* if interface is down do nothing */
5751 if (test_bit(__I40E_DOWN, &pf->state))
5754 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5757 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5758 i40e_fdir_flush_and_replay(pf);
5760 i40e_fdir_check_and_reenable(pf);
5765 * i40e_vsi_link_event - notify VSI of a link event
5766 * @vsi: vsi to be notified
5767 * @link_up: link up or down
5769 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5771 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5774 switch (vsi->type) {
5779 if (!vsi->netdev || !vsi->netdev_registered)
5783 netif_carrier_on(vsi->netdev);
5784 netif_tx_wake_all_queues(vsi->netdev);
5786 netif_carrier_off(vsi->netdev);
5787 netif_tx_stop_all_queues(vsi->netdev);
5791 case I40E_VSI_SRIOV:
5792 case I40E_VSI_VMDQ2:
5794 case I40E_VSI_MIRROR:
5796 /* there is no notification for other VSIs */
5802 * i40e_veb_link_event - notify elements on the veb of a link event
5803 * @veb: veb to be notified
5804 * @link_up: link up or down
5806 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5811 if (!veb || !veb->pf)
5815 /* depth first... */
5816 for (i = 0; i < I40E_MAX_VEB; i++)
5817 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5818 i40e_veb_link_event(pf->veb[i], link_up);
5820 /* ... now the local VSIs */
5821 for (i = 0; i < pf->num_alloc_vsi; i++)
5822 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5823 i40e_vsi_link_event(pf->vsi[i], link_up);
5827 * i40e_link_event - Update netif_carrier status
5828 * @pf: board private structure
5830 static void i40e_link_event(struct i40e_pf *pf)
5832 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5833 u8 new_link_speed, old_link_speed;
5835 bool new_link, old_link;
5837 /* set this to force the get_link_status call to refresh state */
5838 pf->hw.phy.get_link_info = true;
5840 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5842 status = i40e_get_link_status(&pf->hw, &new_link);
5844 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
5849 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5850 new_link_speed = pf->hw.phy.link_info.link_speed;
5852 if (new_link == old_link &&
5853 new_link_speed == old_link_speed &&
5854 (test_bit(__I40E_DOWN, &vsi->state) ||
5855 new_link == netif_carrier_ok(vsi->netdev)))
5858 if (!test_bit(__I40E_DOWN, &vsi->state))
5859 i40e_print_link_message(vsi, new_link);
5861 /* Notify the base of the switch tree connected to
5862 * the link. Floating VEBs are not notified.
5864 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5865 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5867 i40e_vsi_link_event(vsi, new_link);
5870 i40e_vc_notify_link_state(pf);
5872 if (pf->flags & I40E_FLAG_PTP)
5873 i40e_ptp_set_increment(pf);
5877 * i40e_watchdog_subtask - periodic checks not using event driven response
5878 * @pf: board private structure
5880 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5884 /* if interface is down do nothing */
5885 if (test_bit(__I40E_DOWN, &pf->state) ||
5886 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5889 /* make sure we don't do these things too often */
5890 if (time_before(jiffies, (pf->service_timer_previous +
5891 pf->service_timer_period)))
5893 pf->service_timer_previous = jiffies;
5895 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
5896 i40e_link_event(pf);
5898 /* Update the stats for active netdevs so the network stack
5899 * can look at updated numbers whenever it cares to
5901 for (i = 0; i < pf->num_alloc_vsi; i++)
5902 if (pf->vsi[i] && pf->vsi[i]->netdev)
5903 i40e_update_stats(pf->vsi[i]);
5905 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
5906 /* Update the stats for the active switching components */
5907 for (i = 0; i < I40E_MAX_VEB; i++)
5909 i40e_update_veb_stats(pf->veb[i]);
5912 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5916 * i40e_reset_subtask - Set up for resetting the device and driver
5917 * @pf: board private structure
5919 static void i40e_reset_subtask(struct i40e_pf *pf)
5921 u32 reset_flags = 0;
5924 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5925 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5926 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5928 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5929 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5930 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5932 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5933 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5934 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5936 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5937 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5938 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5940 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5941 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5942 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5945 /* If there's a recovery already waiting, it takes
5946 * precedence before starting a new reset sequence.
5948 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5949 i40e_handle_reset_warning(pf);
5953 /* If we're already down or resetting, just bail */
5955 !test_bit(__I40E_DOWN, &pf->state) &&
5956 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5957 i40e_do_reset(pf, reset_flags);
5964 * i40e_handle_link_event - Handle link event
5965 * @pf: board private structure
5966 * @e: event info posted on ARQ
5968 static void i40e_handle_link_event(struct i40e_pf *pf,
5969 struct i40e_arq_event_info *e)
5971 struct i40e_hw *hw = &pf->hw;
5972 struct i40e_aqc_get_link_status *status =
5973 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5975 /* save off old link status information */
5976 hw->phy.link_info_old = hw->phy.link_info;
5978 /* Do a new status request to re-enable LSE reporting
5979 * and load new status information into the hw struct
5980 * This completely ignores any state information
5981 * in the ARQ event info, instead choosing to always
5982 * issue the AQ update link status command.
5984 i40e_link_event(pf);
5986 /* check for unqualified module, if link is down */
5987 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5988 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5989 (!(status->link_info & I40E_AQ_LINK_UP)))
5990 dev_err(&pf->pdev->dev,
5991 "The driver failed to link because an unqualified module was detected.\n");
5995 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5996 * @pf: board private structure
5998 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6000 struct i40e_arq_event_info event;
6001 struct i40e_hw *hw = &pf->hw;
6008 /* Do not run clean AQ when PF reset fails */
6009 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6012 /* check for error indications */
6013 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6015 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6016 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6017 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6019 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6020 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6021 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6023 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6024 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6025 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6028 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6030 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6032 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6033 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6034 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6036 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6037 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6038 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6040 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6041 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6042 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6045 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6047 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6048 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6053 ret = i40e_clean_arq_element(hw, &event, &pending);
6054 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6057 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6061 opcode = le16_to_cpu(event.desc.opcode);
6064 case i40e_aqc_opc_get_link_status:
6065 i40e_handle_link_event(pf, &event);
6067 case i40e_aqc_opc_send_msg_to_pf:
6068 ret = i40e_vc_process_vf_msg(pf,
6069 le16_to_cpu(event.desc.retval),
6070 le32_to_cpu(event.desc.cookie_high),
6071 le32_to_cpu(event.desc.cookie_low),
6075 case i40e_aqc_opc_lldp_update_mib:
6076 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6077 #ifdef CONFIG_I40E_DCB
6079 ret = i40e_handle_lldp_event(pf, &event);
6081 #endif /* CONFIG_I40E_DCB */
6083 case i40e_aqc_opc_event_lan_overflow:
6084 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6085 i40e_handle_lan_overflow_event(pf, &event);
6087 case i40e_aqc_opc_send_msg_to_peer:
6088 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6090 case i40e_aqc_opc_nvm_erase:
6091 case i40e_aqc_opc_nvm_update:
6092 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6095 dev_info(&pf->pdev->dev,
6096 "ARQ Error: Unknown event 0x%04x received\n",
6100 } while (pending && (i++ < pf->adminq_work_limit));
6102 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6103 /* re-enable Admin queue interrupt cause */
6104 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6105 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6106 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6109 kfree(event.msg_buf);
6113 * i40e_verify_eeprom - make sure eeprom is good to use
6114 * @pf: board private structure
6116 static void i40e_verify_eeprom(struct i40e_pf *pf)
6120 err = i40e_diag_eeprom_test(&pf->hw);
6122 /* retry in case of garbage read */
6123 err = i40e_diag_eeprom_test(&pf->hw);
6125 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6127 set_bit(__I40E_BAD_EEPROM, &pf->state);
6131 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6132 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6133 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6138 * i40e_enable_pf_switch_lb
6139 * @pf: pointer to the PF structure
6141 * enable switch loop back or die - no point in a return value
6143 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6145 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6146 struct i40e_vsi_context ctxt;
6149 ctxt.seid = pf->main_vsi_seid;
6150 ctxt.pf_num = pf->hw.pf_id;
6152 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6154 dev_info(&pf->pdev->dev,
6155 "couldn't get PF vsi config, err %s aq_err %s\n",
6156 i40e_stat_str(&pf->hw, ret),
6157 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6160 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6161 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6162 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6164 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6166 dev_info(&pf->pdev->dev,
6167 "update vsi switch failed, err %s aq_err %s\n",
6168 i40e_stat_str(&pf->hw, ret),
6169 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6174 * i40e_disable_pf_switch_lb
6175 * @pf: pointer to the PF structure
6177 * disable switch loop back or die - no point in a return value
6179 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6181 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6182 struct i40e_vsi_context ctxt;
6185 ctxt.seid = pf->main_vsi_seid;
6186 ctxt.pf_num = pf->hw.pf_id;
6188 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6190 dev_info(&pf->pdev->dev,
6191 "couldn't get PF vsi config, err %s aq_err %s\n",
6192 i40e_stat_str(&pf->hw, ret),
6193 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6196 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6197 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6198 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6200 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6202 dev_info(&pf->pdev->dev,
6203 "update vsi switch failed, err %s aq_err %s\n",
6204 i40e_stat_str(&pf->hw, ret),
6205 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6210 * i40e_config_bridge_mode - Configure the HW bridge mode
6211 * @veb: pointer to the bridge instance
6213 * Configure the loop back mode for the LAN VSI that is downlink to the
6214 * specified HW bridge instance. It is expected this function is called
6215 * when a new HW bridge is instantiated.
6217 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6219 struct i40e_pf *pf = veb->pf;
6221 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6222 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6223 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6224 i40e_disable_pf_switch_lb(pf);
6226 i40e_enable_pf_switch_lb(pf);
6230 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6231 * @veb: pointer to the VEB instance
6233 * This is a recursive function that first builds the attached VSIs then
6234 * recurses in to build the next layer of VEB. We track the connections
6235 * through our own index numbers because the seid's from the HW could
6236 * change across the reset.
6238 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6240 struct i40e_vsi *ctl_vsi = NULL;
6241 struct i40e_pf *pf = veb->pf;
6245 /* build VSI that owns this VEB, temporarily attached to base VEB */
6246 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6248 pf->vsi[v]->veb_idx == veb->idx &&
6249 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6250 ctl_vsi = pf->vsi[v];
6255 dev_info(&pf->pdev->dev,
6256 "missing owner VSI for veb_idx %d\n", veb->idx);
6258 goto end_reconstitute;
6260 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6261 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6262 ret = i40e_add_vsi(ctl_vsi);
6264 dev_info(&pf->pdev->dev,
6265 "rebuild of veb_idx %d owner VSI failed: %d\n",
6267 goto end_reconstitute;
6269 i40e_vsi_reset_stats(ctl_vsi);
6271 /* create the VEB in the switch and move the VSI onto the VEB */
6272 ret = i40e_add_veb(veb, ctl_vsi);
6274 goto end_reconstitute;
6276 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6277 veb->bridge_mode = BRIDGE_MODE_VEB;
6279 veb->bridge_mode = BRIDGE_MODE_VEPA;
6280 i40e_config_bridge_mode(veb);
6282 /* create the remaining VSIs attached to this VEB */
6283 for (v = 0; v < pf->num_alloc_vsi; v++) {
6284 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6287 if (pf->vsi[v]->veb_idx == veb->idx) {
6288 struct i40e_vsi *vsi = pf->vsi[v];
6289 vsi->uplink_seid = veb->seid;
6290 ret = i40e_add_vsi(vsi);
6292 dev_info(&pf->pdev->dev,
6293 "rebuild of vsi_idx %d failed: %d\n",
6295 goto end_reconstitute;
6297 i40e_vsi_reset_stats(vsi);
6301 /* create any VEBs attached to this VEB - RECURSION */
6302 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6303 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6304 pf->veb[veb_idx]->uplink_seid = veb->seid;
6305 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6316 * i40e_get_capabilities - get info about the HW
6317 * @pf: the PF struct
6319 static int i40e_get_capabilities(struct i40e_pf *pf)
6321 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6326 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6328 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6332 /* this loads the data into the hw struct for us */
6333 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6335 i40e_aqc_opc_list_func_capabilities,
6337 /* data loaded, buffer no longer needed */
6340 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6341 /* retry with a larger buffer */
6342 buf_len = data_size;
6343 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6344 dev_info(&pf->pdev->dev,
6345 "capability discovery failed, err %s aq_err %s\n",
6346 i40e_stat_str(&pf->hw, err),
6347 i40e_aq_str(&pf->hw,
6348 pf->hw.aq.asq_last_status));
6353 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6354 (pf->hw.aq.fw_maj_ver < 2)) {
6355 pf->hw.func_caps.num_msix_vectors++;
6356 pf->hw.func_caps.num_msix_vectors_vf++;
6359 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6360 dev_info(&pf->pdev->dev,
6361 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6362 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6363 pf->hw.func_caps.num_msix_vectors,
6364 pf->hw.func_caps.num_msix_vectors_vf,
6365 pf->hw.func_caps.fd_filters_guaranteed,
6366 pf->hw.func_caps.fd_filters_best_effort,
6367 pf->hw.func_caps.num_tx_qp,
6368 pf->hw.func_caps.num_vsis);
6370 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6371 + pf->hw.func_caps.num_vfs)
6372 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6373 dev_info(&pf->pdev->dev,
6374 "got num_vsis %d, setting num_vsis to %d\n",
6375 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6376 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6382 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6385 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6386 * @pf: board private structure
6388 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6390 struct i40e_vsi *vsi;
6393 /* quick workaround for an NVM issue that leaves a critical register
6396 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6397 static const u32 hkey[] = {
6398 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6399 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6400 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6403 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6404 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6407 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6410 /* find existing VSI and see if it needs configuring */
6412 for (i = 0; i < pf->num_alloc_vsi; i++) {
6413 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6419 /* create a new VSI if none exists */
6421 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6422 pf->vsi[pf->lan_vsi]->seid, 0);
6424 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6425 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6430 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6434 * i40e_fdir_teardown - release the Flow Director resources
6435 * @pf: board private structure
6437 static void i40e_fdir_teardown(struct i40e_pf *pf)
6441 i40e_fdir_filter_exit(pf);
6442 for (i = 0; i < pf->num_alloc_vsi; i++) {
6443 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6444 i40e_vsi_release(pf->vsi[i]);
6451 * i40e_prep_for_reset - prep for the core to reset
6452 * @pf: board private structure
6454 * Close up the VFs and other things in prep for PF Reset.
6456 static void i40e_prep_for_reset(struct i40e_pf *pf)
6458 struct i40e_hw *hw = &pf->hw;
6459 i40e_status ret = 0;
6462 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6463 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6466 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6468 /* quiesce the VSIs and their queues that are not already DOWN */
6469 i40e_pf_quiesce_all_vsi(pf);
6471 for (v = 0; v < pf->num_alloc_vsi; v++) {
6473 pf->vsi[v]->seid = 0;
6476 i40e_shutdown_adminq(&pf->hw);
6478 /* call shutdown HMC */
6479 if (hw->hmc.hmc_obj) {
6480 ret = i40e_shutdown_lan_hmc(hw);
6482 dev_warn(&pf->pdev->dev,
6483 "shutdown_lan_hmc failed: %d\n", ret);
6488 * i40e_send_version - update firmware with driver version
6491 static void i40e_send_version(struct i40e_pf *pf)
6493 struct i40e_driver_version dv;
6495 dv.major_version = DRV_VERSION_MAJOR;
6496 dv.minor_version = DRV_VERSION_MINOR;
6497 dv.build_version = DRV_VERSION_BUILD;
6498 dv.subbuild_version = 0;
6499 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6500 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6504 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6505 * @pf: board private structure
6506 * @reinit: if the Main VSI needs to re-initialized.
6508 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6510 struct i40e_hw *hw = &pf->hw;
6511 u8 set_fc_aq_fail = 0;
6515 /* Now we wait for GRST to settle out.
6516 * We don't have to delete the VEBs or VSIs from the hw switch
6517 * because the reset will make them disappear.
6519 ret = i40e_pf_reset(hw);
6521 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6522 set_bit(__I40E_RESET_FAILED, &pf->state);
6523 goto clear_recovery;
6527 if (test_bit(__I40E_DOWN, &pf->state))
6528 goto clear_recovery;
6529 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6531 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6532 ret = i40e_init_adminq(&pf->hw);
6534 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6535 i40e_stat_str(&pf->hw, ret),
6536 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6537 goto clear_recovery;
6540 /* re-verify the eeprom if we just had an EMP reset */
6541 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6542 i40e_verify_eeprom(pf);
6544 i40e_clear_pxe_mode(hw);
6545 ret = i40e_get_capabilities(pf);
6547 goto end_core_reset;
6549 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6550 hw->func_caps.num_rx_qp,
6551 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6553 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6554 goto end_core_reset;
6556 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6558 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6559 goto end_core_reset;
6562 #ifdef CONFIG_I40E_DCB
6563 ret = i40e_init_pf_dcb(pf);
6565 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6566 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6567 /* Continue without DCB enabled */
6569 #endif /* CONFIG_I40E_DCB */
6571 i40e_init_pf_fcoe(pf);
6574 /* do basic switch setup */
6575 ret = i40e_setup_pf_switch(pf, reinit);
6577 goto end_core_reset;
6579 /* driver is only interested in link up/down and module qualification
6580 * reports from firmware
6582 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6583 I40E_AQ_EVENT_LINK_UPDOWN |
6584 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6586 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6587 i40e_stat_str(&pf->hw, ret),
6588 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6590 /* make sure our flow control settings are restored */
6591 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6593 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6594 i40e_stat_str(&pf->hw, ret),
6595 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6597 /* Rebuild the VSIs and VEBs that existed before reset.
6598 * They are still in our local switch element arrays, so only
6599 * need to rebuild the switch model in the HW.
6601 * If there were VEBs but the reconstitution failed, we'll try
6602 * try to recover minimal use by getting the basic PF VSI working.
6604 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6605 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6606 /* find the one VEB connected to the MAC, and find orphans */
6607 for (v = 0; v < I40E_MAX_VEB; v++) {
6611 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6612 pf->veb[v]->uplink_seid == 0) {
6613 ret = i40e_reconstitute_veb(pf->veb[v]);
6618 /* If Main VEB failed, we're in deep doodoo,
6619 * so give up rebuilding the switch and set up
6620 * for minimal rebuild of PF VSI.
6621 * If orphan failed, we'll report the error
6622 * but try to keep going.
6624 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6625 dev_info(&pf->pdev->dev,
6626 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6628 pf->vsi[pf->lan_vsi]->uplink_seid
6631 } else if (pf->veb[v]->uplink_seid == 0) {
6632 dev_info(&pf->pdev->dev,
6633 "rebuild of orphan VEB failed: %d\n",
6640 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6641 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6642 /* no VEB, so rebuild only the Main VSI */
6643 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6645 dev_info(&pf->pdev->dev,
6646 "rebuild of Main VSI failed: %d\n", ret);
6647 goto end_core_reset;
6651 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6652 (pf->hw.aq.fw_maj_ver < 4)) {
6654 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6656 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6657 i40e_stat_str(&pf->hw, ret),
6658 i40e_aq_str(&pf->hw,
6659 pf->hw.aq.asq_last_status));
6661 /* reinit the misc interrupt */
6662 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6663 ret = i40e_setup_misc_vector(pf);
6665 /* restart the VSIs that were rebuilt and running before the reset */
6666 i40e_pf_unquiesce_all_vsi(pf);
6668 if (pf->num_alloc_vfs) {
6669 for (v = 0; v < pf->num_alloc_vfs; v++)
6670 i40e_reset_vf(&pf->vf[v], true);
6673 /* tell the firmware that we're starting */
6674 i40e_send_version(pf);
6677 clear_bit(__I40E_RESET_FAILED, &pf->state);
6679 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6683 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6684 * @pf: board private structure
6686 * Close up the VFs and other things in prep for a Core Reset,
6687 * then get ready to rebuild the world.
6689 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6691 i40e_prep_for_reset(pf);
6692 i40e_reset_and_rebuild(pf, false);
6696 * i40e_handle_mdd_event
6697 * @pf: pointer to the PF structure
6699 * Called from the MDD irq handler to identify possibly malicious vfs
6701 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6703 struct i40e_hw *hw = &pf->hw;
6704 bool mdd_detected = false;
6705 bool pf_mdd_detected = false;
6710 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6713 /* find what triggered the MDD event */
6714 reg = rd32(hw, I40E_GL_MDET_TX);
6715 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6716 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6717 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6718 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6719 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6720 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6721 I40E_GL_MDET_TX_EVENT_SHIFT;
6722 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6723 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6724 pf->hw.func_caps.base_queue;
6725 if (netif_msg_tx_err(pf))
6726 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6727 event, queue, pf_num, vf_num);
6728 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6729 mdd_detected = true;
6731 reg = rd32(hw, I40E_GL_MDET_RX);
6732 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6733 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6734 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6735 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6736 I40E_GL_MDET_RX_EVENT_SHIFT;
6737 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6738 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6739 pf->hw.func_caps.base_queue;
6740 if (netif_msg_rx_err(pf))
6741 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6742 event, queue, func);
6743 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6744 mdd_detected = true;
6748 reg = rd32(hw, I40E_PF_MDET_TX);
6749 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6750 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6751 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6752 pf_mdd_detected = true;
6754 reg = rd32(hw, I40E_PF_MDET_RX);
6755 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6756 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6757 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6758 pf_mdd_detected = true;
6760 /* Queue belongs to the PF, initiate a reset */
6761 if (pf_mdd_detected) {
6762 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6763 i40e_service_event_schedule(pf);
6767 /* see if one of the VFs needs its hand slapped */
6768 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6770 reg = rd32(hw, I40E_VP_MDET_TX(i));
6771 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6772 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6773 vf->num_mdd_events++;
6774 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6778 reg = rd32(hw, I40E_VP_MDET_RX(i));
6779 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6780 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6781 vf->num_mdd_events++;
6782 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6786 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6787 dev_info(&pf->pdev->dev,
6788 "Too many MDD events on VF %d, disabled\n", i);
6789 dev_info(&pf->pdev->dev,
6790 "Use PF Control I/F to re-enable the VF\n");
6791 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6795 /* re-enable mdd interrupt cause */
6796 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6797 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6798 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6799 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6803 #ifdef CONFIG_I40E_VXLAN
6805 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6806 * @pf: board private structure
6808 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6810 struct i40e_hw *hw = &pf->hw;
6815 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6818 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6820 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6821 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6822 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6823 port = pf->vxlan_ports[i];
6825 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6826 I40E_AQC_TUNNEL_TYPE_VXLAN,
6829 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6832 dev_info(&pf->pdev->dev,
6833 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6834 port ? "add" : "delete",
6836 i40e_stat_str(&pf->hw, ret),
6837 i40e_aq_str(&pf->hw,
6838 pf->hw.aq.asq_last_status));
6839 pf->vxlan_ports[i] = 0;
6847 * i40e_service_task - Run the driver's async subtasks
6848 * @work: pointer to work_struct containing our data
6850 static void i40e_service_task(struct work_struct *work)
6852 struct i40e_pf *pf = container_of(work,
6855 unsigned long start_time = jiffies;
6857 /* don't bother with service tasks if a reset is in progress */
6858 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6859 i40e_service_event_complete(pf);
6863 i40e_detect_recover_hung(pf);
6864 i40e_reset_subtask(pf);
6865 i40e_handle_mdd_event(pf);
6866 i40e_vc_process_vflr_event(pf);
6867 i40e_watchdog_subtask(pf);
6868 i40e_fdir_reinit_subtask(pf);
6869 i40e_sync_filters_subtask(pf);
6870 #ifdef CONFIG_I40E_VXLAN
6871 i40e_sync_vxlan_filters_subtask(pf);
6873 i40e_clean_adminq_subtask(pf);
6875 i40e_service_event_complete(pf);
6877 /* If the tasks have taken longer than one timer cycle or there
6878 * is more work to be done, reschedule the service task now
6879 * rather than wait for the timer to tick again.
6881 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6882 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6883 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6884 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6885 i40e_service_event_schedule(pf);
6889 * i40e_service_timer - timer callback
6890 * @data: pointer to PF struct
6892 static void i40e_service_timer(unsigned long data)
6894 struct i40e_pf *pf = (struct i40e_pf *)data;
6896 mod_timer(&pf->service_timer,
6897 round_jiffies(jiffies + pf->service_timer_period));
6898 i40e_service_event_schedule(pf);
6902 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6903 * @vsi: the VSI being configured
6905 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6907 struct i40e_pf *pf = vsi->back;
6909 switch (vsi->type) {
6911 vsi->alloc_queue_pairs = pf->num_lan_qps;
6912 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6913 I40E_REQ_DESCRIPTOR_MULTIPLE);
6914 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6915 vsi->num_q_vectors = pf->num_lan_msix;
6917 vsi->num_q_vectors = 1;
6922 vsi->alloc_queue_pairs = 1;
6923 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6924 I40E_REQ_DESCRIPTOR_MULTIPLE);
6925 vsi->num_q_vectors = 1;
6928 case I40E_VSI_VMDQ2:
6929 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6930 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6931 I40E_REQ_DESCRIPTOR_MULTIPLE);
6932 vsi->num_q_vectors = pf->num_vmdq_msix;
6935 case I40E_VSI_SRIOV:
6936 vsi->alloc_queue_pairs = pf->num_vf_qps;
6937 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6938 I40E_REQ_DESCRIPTOR_MULTIPLE);
6943 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6944 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6945 I40E_REQ_DESCRIPTOR_MULTIPLE);
6946 vsi->num_q_vectors = pf->num_fcoe_msix;
6949 #endif /* I40E_FCOE */
6959 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6960 * @type: VSI pointer
6961 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6963 * On error: returns error code (negative)
6964 * On success: returns 0
6966 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6971 /* allocate memory for both Tx and Rx ring pointers */
6972 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6973 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6976 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6978 if (alloc_qvectors) {
6979 /* allocate memory for q_vector pointers */
6980 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6981 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6982 if (!vsi->q_vectors) {
6990 kfree(vsi->tx_rings);
6995 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6996 * @pf: board private structure
6997 * @type: type of VSI
6999 * On error: returns error code (negative)
7000 * On success: returns vsi index in PF (positive)
7002 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7005 struct i40e_vsi *vsi;
7009 /* Need to protect the allocation of the VSIs at the PF level */
7010 mutex_lock(&pf->switch_mutex);
7012 /* VSI list may be fragmented if VSI creation/destruction has
7013 * been happening. We can afford to do a quick scan to look
7014 * for any free VSIs in the list.
7016 * find next empty vsi slot, looping back around if necessary
7019 while (i < pf->num_alloc_vsi && pf->vsi[i])
7021 if (i >= pf->num_alloc_vsi) {
7023 while (i < pf->next_vsi && pf->vsi[i])
7027 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7028 vsi_idx = i; /* Found one! */
7031 goto unlock_pf; /* out of VSI slots! */
7035 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7042 set_bit(__I40E_DOWN, &vsi->state);
7045 vsi->rx_itr_setting = pf->rx_itr_default;
7046 vsi->tx_itr_setting = pf->tx_itr_default;
7047 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7048 pf->rss_table_size : 64;
7049 vsi->netdev_registered = false;
7050 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7051 INIT_LIST_HEAD(&vsi->mac_filter_list);
7052 vsi->irqs_ready = false;
7054 ret = i40e_set_num_rings_in_vsi(vsi);
7058 ret = i40e_vsi_alloc_arrays(vsi, true);
7062 /* Setup default MSIX irq handler for VSI */
7063 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7065 pf->vsi[vsi_idx] = vsi;
7070 pf->next_vsi = i - 1;
7073 mutex_unlock(&pf->switch_mutex);
7078 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7079 * @type: VSI pointer
7080 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7082 * On error: returns error code (negative)
7083 * On success: returns 0
7085 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7087 /* free the ring and vector containers */
7088 if (free_qvectors) {
7089 kfree(vsi->q_vectors);
7090 vsi->q_vectors = NULL;
7092 kfree(vsi->tx_rings);
7093 vsi->tx_rings = NULL;
7094 vsi->rx_rings = NULL;
7098 * i40e_vsi_clear - Deallocate the VSI provided
7099 * @vsi: the VSI being un-configured
7101 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7112 mutex_lock(&pf->switch_mutex);
7113 if (!pf->vsi[vsi->idx]) {
7114 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7115 vsi->idx, vsi->idx, vsi, vsi->type);
7119 if (pf->vsi[vsi->idx] != vsi) {
7120 dev_err(&pf->pdev->dev,
7121 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7122 pf->vsi[vsi->idx]->idx,
7124 pf->vsi[vsi->idx]->type,
7125 vsi->idx, vsi, vsi->type);
7129 /* updates the PF for this cleared vsi */
7130 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7131 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7133 i40e_vsi_free_arrays(vsi, true);
7135 pf->vsi[vsi->idx] = NULL;
7136 if (vsi->idx < pf->next_vsi)
7137 pf->next_vsi = vsi->idx;
7140 mutex_unlock(&pf->switch_mutex);
7148 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7149 * @vsi: the VSI being cleaned
7151 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7155 if (vsi->tx_rings && vsi->tx_rings[0]) {
7156 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7157 kfree_rcu(vsi->tx_rings[i], rcu);
7158 vsi->tx_rings[i] = NULL;
7159 vsi->rx_rings[i] = NULL;
7165 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7166 * @vsi: the VSI being configured
7168 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7170 struct i40e_ring *tx_ring, *rx_ring;
7171 struct i40e_pf *pf = vsi->back;
7174 /* Set basic values in the rings to be used later during open() */
7175 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7176 /* allocate space for both Tx and Rx in one shot */
7177 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7181 tx_ring->queue_index = i;
7182 tx_ring->reg_idx = vsi->base_queue + i;
7183 tx_ring->ring_active = false;
7185 tx_ring->netdev = vsi->netdev;
7186 tx_ring->dev = &pf->pdev->dev;
7187 tx_ring->count = vsi->num_desc;
7189 tx_ring->dcb_tc = 0;
7190 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7191 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7192 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7193 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7194 vsi->tx_rings[i] = tx_ring;
7196 rx_ring = &tx_ring[1];
7197 rx_ring->queue_index = i;
7198 rx_ring->reg_idx = vsi->base_queue + i;
7199 rx_ring->ring_active = false;
7201 rx_ring->netdev = vsi->netdev;
7202 rx_ring->dev = &pf->pdev->dev;
7203 rx_ring->count = vsi->num_desc;
7205 rx_ring->dcb_tc = 0;
7206 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7207 set_ring_16byte_desc_enabled(rx_ring);
7209 clear_ring_16byte_desc_enabled(rx_ring);
7210 vsi->rx_rings[i] = rx_ring;
7216 i40e_vsi_clear_rings(vsi);
7221 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7222 * @pf: board private structure
7223 * @vectors: the number of MSI-X vectors to request
7225 * Returns the number of vectors reserved, or error
7227 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7229 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7230 I40E_MIN_MSIX, vectors);
7232 dev_info(&pf->pdev->dev,
7233 "MSI-X vector reservation failed: %d\n", vectors);
7241 * i40e_init_msix - Setup the MSIX capability
7242 * @pf: board private structure
7244 * Work with the OS to set up the MSIX vectors needed.
7246 * Returns the number of vectors reserved or negative on failure
7248 static int i40e_init_msix(struct i40e_pf *pf)
7250 struct i40e_hw *hw = &pf->hw;
7255 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7258 /* The number of vectors we'll request will be comprised of:
7259 * - Add 1 for "other" cause for Admin Queue events, etc.
7260 * - The number of LAN queue pairs
7261 * - Queues being used for RSS.
7262 * We don't need as many as max_rss_size vectors.
7263 * use rss_size instead in the calculation since that
7264 * is governed by number of cpus in the system.
7265 * - assumes symmetric Tx/Rx pairing
7266 * - The number of VMDq pairs
7268 * - The number of FCOE qps.
7270 * Once we count this up, try the request.
7272 * If we can't get what we want, we'll simplify to nearly nothing
7273 * and try again. If that still fails, we punt.
7275 vectors_left = hw->func_caps.num_msix_vectors;
7278 /* reserve one vector for miscellaneous handler */
7284 /* reserve vectors for the main PF traffic queues */
7285 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7286 vectors_left -= pf->num_lan_msix;
7287 v_budget += pf->num_lan_msix;
7289 /* reserve one vector for sideband flow director */
7290 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7295 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7300 /* can we reserve enough for FCoE? */
7301 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7303 pf->num_fcoe_msix = 0;
7304 else if (vectors_left >= pf->num_fcoe_qps)
7305 pf->num_fcoe_msix = pf->num_fcoe_qps;
7307 pf->num_fcoe_msix = 1;
7308 v_budget += pf->num_fcoe_msix;
7309 vectors_left -= pf->num_fcoe_msix;
7313 /* any vectors left over go for VMDq support */
7314 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7315 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7316 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7318 /* if we're short on vectors for what's desired, we limit
7319 * the queues per vmdq. If this is still more than are
7320 * available, the user will need to change the number of
7321 * queues/vectors used by the PF later with the ethtool
7324 if (vmdq_vecs < vmdq_vecs_wanted)
7325 pf->num_vmdq_qps = 1;
7326 pf->num_vmdq_msix = pf->num_vmdq_qps;
7328 v_budget += vmdq_vecs;
7329 vectors_left -= vmdq_vecs;
7332 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7334 if (!pf->msix_entries)
7337 for (i = 0; i < v_budget; i++)
7338 pf->msix_entries[i].entry = i;
7339 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7341 if (v_actual != v_budget) {
7342 /* If we have limited resources, we will start with no vectors
7343 * for the special features and then allocate vectors to some
7344 * of these features based on the policy and at the end disable
7345 * the features that did not get any vectors.
7348 pf->num_fcoe_qps = 0;
7349 pf->num_fcoe_msix = 0;
7351 pf->num_vmdq_msix = 0;
7354 if (v_actual < I40E_MIN_MSIX) {
7355 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7356 kfree(pf->msix_entries);
7357 pf->msix_entries = NULL;
7360 } else if (v_actual == I40E_MIN_MSIX) {
7361 /* Adjust for minimal MSIX use */
7362 pf->num_vmdq_vsis = 0;
7363 pf->num_vmdq_qps = 0;
7364 pf->num_lan_qps = 1;
7365 pf->num_lan_msix = 1;
7367 } else if (v_actual != v_budget) {
7370 /* reserve the misc vector */
7373 /* Scale vector usage down */
7374 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7375 pf->num_vmdq_vsis = 1;
7376 pf->num_vmdq_qps = 1;
7377 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7379 /* partition out the remaining vectors */
7382 pf->num_lan_msix = 1;
7386 /* give one vector to FCoE */
7387 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7388 pf->num_lan_msix = 1;
7389 pf->num_fcoe_msix = 1;
7392 pf->num_lan_msix = 2;
7397 /* give one vector to FCoE */
7398 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7399 pf->num_fcoe_msix = 1;
7403 /* give the rest to the PF */
7404 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7409 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7410 (pf->num_vmdq_msix == 0)) {
7411 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7412 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7416 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7417 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7418 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7425 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7426 * @vsi: the VSI being configured
7427 * @v_idx: index of the vector in the vsi struct
7429 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7431 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7433 struct i40e_q_vector *q_vector;
7435 /* allocate q_vector */
7436 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7440 q_vector->vsi = vsi;
7441 q_vector->v_idx = v_idx;
7442 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7444 netif_napi_add(vsi->netdev, &q_vector->napi,
7445 i40e_napi_poll, NAPI_POLL_WEIGHT);
7447 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7448 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7450 /* tie q_vector and vsi together */
7451 vsi->q_vectors[v_idx] = q_vector;
7457 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7458 * @vsi: the VSI being configured
7460 * We allocate one q_vector per queue interrupt. If allocation fails we
7463 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7465 struct i40e_pf *pf = vsi->back;
7466 int v_idx, num_q_vectors;
7469 /* if not MSIX, give the one vector only to the LAN VSI */
7470 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7471 num_q_vectors = vsi->num_q_vectors;
7472 else if (vsi == pf->vsi[pf->lan_vsi])
7477 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7478 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7487 i40e_free_q_vector(vsi, v_idx);
7493 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7494 * @pf: board private structure to initialize
7496 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7501 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7502 vectors = i40e_init_msix(pf);
7504 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7506 I40E_FLAG_FCOE_ENABLED |
7508 I40E_FLAG_RSS_ENABLED |
7509 I40E_FLAG_DCB_CAPABLE |
7510 I40E_FLAG_SRIOV_ENABLED |
7511 I40E_FLAG_FD_SB_ENABLED |
7512 I40E_FLAG_FD_ATR_ENABLED |
7513 I40E_FLAG_VMDQ_ENABLED);
7515 /* rework the queue expectations without MSIX */
7516 i40e_determine_queue_usage(pf);
7520 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7521 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7522 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7523 vectors = pci_enable_msi(pf->pdev);
7525 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7527 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7529 vectors = 1; /* one MSI or Legacy vector */
7532 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7533 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7535 /* set up vector assignment tracking */
7536 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7537 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7538 if (!pf->irq_pile) {
7539 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7542 pf->irq_pile->num_entries = vectors;
7543 pf->irq_pile->search_hint = 0;
7545 /* track first vector for misc interrupts, ignore return */
7546 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7552 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7553 * @pf: board private structure
7555 * This sets up the handler for MSIX 0, which is used to manage the
7556 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7557 * when in MSI or Legacy interrupt mode.
7559 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7561 struct i40e_hw *hw = &pf->hw;
7564 /* Only request the irq if this is the first time through, and
7565 * not when we're rebuilding after a Reset
7567 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7568 err = request_irq(pf->msix_entries[0].vector,
7569 i40e_intr, 0, pf->int_name, pf);
7571 dev_info(&pf->pdev->dev,
7572 "request_irq for %s failed: %d\n",
7578 i40e_enable_misc_int_causes(pf);
7580 /* associate no queues to the misc vector */
7581 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7582 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7586 i40e_irq_dynamic_enable_icr0(pf);
7592 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7593 * @vsi: vsi structure
7594 * @seed: RSS hash seed
7596 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7598 struct i40e_aqc_get_set_rss_key_data rss_key;
7599 struct i40e_pf *pf = vsi->back;
7600 struct i40e_hw *hw = &pf->hw;
7601 bool pf_lut = false;
7605 memset(&rss_key, 0, sizeof(rss_key));
7606 memcpy(&rss_key, seed, sizeof(rss_key));
7608 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7612 /* Populate the LUT with max no. of queues in round robin fashion */
7613 for (i = 0; i < vsi->rss_table_size; i++)
7614 rss_lut[i] = i % vsi->rss_size;
7616 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7618 dev_info(&pf->pdev->dev,
7619 "Cannot set RSS key, err %s aq_err %s\n",
7620 i40e_stat_str(&pf->hw, ret),
7621 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7622 goto config_rss_aq_out;
7625 if (vsi->type == I40E_VSI_MAIN)
7628 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7629 vsi->rss_table_size);
7631 dev_info(&pf->pdev->dev,
7632 "Cannot set RSS lut, err %s aq_err %s\n",
7633 i40e_stat_str(&pf->hw, ret),
7634 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7642 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7643 * @vsi: VSI structure
7645 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7647 u8 seed[I40E_HKEY_ARRAY_SIZE];
7648 struct i40e_pf *pf = vsi->back;
7650 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7651 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7653 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7654 return i40e_config_rss_aq(vsi, seed);
7660 * i40e_config_rss_reg - Prepare for RSS if used
7661 * @pf: board private structure
7662 * @seed: RSS hash seed
7664 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7666 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7667 struct i40e_hw *hw = &pf->hw;
7668 u32 *seed_dw = (u32 *)seed;
7669 u32 current_queue = 0;
7673 /* Fill out hash function seed */
7674 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7675 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7677 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7679 for (j = 0; j < 4; j++) {
7680 if (current_queue == vsi->rss_size)
7682 lut |= ((current_queue) << (8 * j));
7685 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7693 * i40e_config_rss - Prepare for RSS if used
7694 * @pf: board private structure
7696 static int i40e_config_rss(struct i40e_pf *pf)
7698 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7699 u8 seed[I40E_HKEY_ARRAY_SIZE];
7700 struct i40e_hw *hw = &pf->hw;
7704 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7706 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7707 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7708 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7709 hena |= i40e_pf_get_default_rss_hena(pf);
7711 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7712 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7714 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7716 /* Determine the RSS table size based on the hardware capabilities */
7717 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7718 reg_val = (pf->rss_table_size == 512) ?
7719 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7720 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7721 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7723 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7724 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7726 return i40e_config_rss_reg(pf, seed);
7730 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7731 * @pf: board private structure
7732 * @queue_count: the requested queue count for rss.
7734 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7735 * count which may be different from the requested queue count.
7737 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7739 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7742 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7745 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7747 if (queue_count != vsi->num_queue_pairs) {
7748 vsi->req_queue_pairs = queue_count;
7749 i40e_prep_for_reset(pf);
7751 pf->rss_size = new_rss_size;
7753 i40e_reset_and_rebuild(pf, true);
7754 i40e_config_rss(pf);
7756 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7757 return pf->rss_size;
7761 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7762 * @pf: board private structure
7764 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7767 bool min_valid, max_valid;
7770 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7771 &min_valid, &max_valid);
7775 pf->npar_min_bw = min_bw;
7777 pf->npar_max_bw = max_bw;
7784 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7785 * @pf: board private structure
7787 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7789 struct i40e_aqc_configure_partition_bw_data bw_data;
7792 /* Set the valid bit for this PF */
7793 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7794 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7795 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7797 /* Set the new bandwidths */
7798 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7804 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7805 * @pf: board private structure
7807 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7809 /* Commit temporary BW setting to permanent NVM image */
7810 enum i40e_admin_queue_err last_aq_status;
7814 if (pf->hw.partition_id != 1) {
7815 dev_info(&pf->pdev->dev,
7816 "Commit BW only works on partition 1! This is partition %d",
7817 pf->hw.partition_id);
7818 ret = I40E_NOT_SUPPORTED;
7822 /* Acquire NVM for read access */
7823 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7824 last_aq_status = pf->hw.aq.asq_last_status;
7826 dev_info(&pf->pdev->dev,
7827 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7828 i40e_stat_str(&pf->hw, ret),
7829 i40e_aq_str(&pf->hw, last_aq_status));
7833 /* Read word 0x10 of NVM - SW compatibility word 1 */
7834 ret = i40e_aq_read_nvm(&pf->hw,
7835 I40E_SR_NVM_CONTROL_WORD,
7836 0x10, sizeof(nvm_word), &nvm_word,
7838 /* Save off last admin queue command status before releasing
7841 last_aq_status = pf->hw.aq.asq_last_status;
7842 i40e_release_nvm(&pf->hw);
7844 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7845 i40e_stat_str(&pf->hw, ret),
7846 i40e_aq_str(&pf->hw, last_aq_status));
7850 /* Wait a bit for NVM release to complete */
7853 /* Acquire NVM for write access */
7854 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7855 last_aq_status = pf->hw.aq.asq_last_status;
7857 dev_info(&pf->pdev->dev,
7858 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7859 i40e_stat_str(&pf->hw, ret),
7860 i40e_aq_str(&pf->hw, last_aq_status));
7863 /* Write it back out unchanged to initiate update NVM,
7864 * which will force a write of the shadow (alt) RAM to
7865 * the NVM - thus storing the bandwidth values permanently.
7867 ret = i40e_aq_update_nvm(&pf->hw,
7868 I40E_SR_NVM_CONTROL_WORD,
7869 0x10, sizeof(nvm_word),
7870 &nvm_word, true, NULL);
7871 /* Save off last admin queue command status before releasing
7874 last_aq_status = pf->hw.aq.asq_last_status;
7875 i40e_release_nvm(&pf->hw);
7877 dev_info(&pf->pdev->dev,
7878 "BW settings NOT SAVED, err %s aq_err %s\n",
7879 i40e_stat_str(&pf->hw, ret),
7880 i40e_aq_str(&pf->hw, last_aq_status));
7887 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7888 * @pf: board private structure to initialize
7890 * i40e_sw_init initializes the Adapter private data structure.
7891 * Fields are initialized based on PCI device information and
7892 * OS network device settings (MTU size).
7894 static int i40e_sw_init(struct i40e_pf *pf)
7899 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7900 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7901 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7902 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7903 if (I40E_DEBUG_USER & debug)
7904 pf->hw.debug_mask = debug;
7905 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7906 I40E_DEFAULT_MSG_ENABLE);
7909 /* Set default capability flags */
7910 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7911 I40E_FLAG_MSI_ENABLED |
7912 I40E_FLAG_LINK_POLLING_ENABLED |
7913 I40E_FLAG_MSIX_ENABLED;
7915 if (iommu_present(&pci_bus_type))
7916 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7918 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7920 /* Set default ITR */
7921 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7922 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7924 /* Depending on PF configurations, it is possible that the RSS
7925 * maximum might end up larger than the available queues
7927 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7929 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7930 pf->rss_size_max = min_t(int, pf->rss_size_max,
7931 pf->hw.func_caps.num_tx_qp);
7932 if (pf->hw.func_caps.rss) {
7933 pf->flags |= I40E_FLAG_RSS_ENABLED;
7934 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7937 /* MFP mode enabled */
7938 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7939 pf->flags |= I40E_FLAG_MFP_ENABLED;
7940 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7941 if (i40e_get_npar_bw_setting(pf))
7942 dev_warn(&pf->pdev->dev,
7943 "Could not get NPAR bw settings\n");
7945 dev_info(&pf->pdev->dev,
7946 "Min BW = %8.8x, Max BW = %8.8x\n",
7947 pf->npar_min_bw, pf->npar_max_bw);
7950 /* FW/NVM is not yet fixed in this regard */
7951 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7952 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7953 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7954 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7955 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7956 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7958 dev_info(&pf->pdev->dev,
7959 "Flow Director Sideband mode Disabled in MFP mode\n");
7961 pf->fdir_pf_filter_count =
7962 pf->hw.func_caps.fd_filters_guaranteed;
7963 pf->hw.fdir_shared_filter_count =
7964 pf->hw.func_caps.fd_filters_best_effort;
7967 if (pf->hw.func_caps.vmdq) {
7968 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7969 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7973 i40e_init_pf_fcoe(pf);
7975 #endif /* I40E_FCOE */
7976 #ifdef CONFIG_PCI_IOV
7977 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7978 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7979 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7980 pf->num_req_vfs = min_t(int,
7981 pf->hw.func_caps.num_vfs,
7984 #endif /* CONFIG_PCI_IOV */
7985 if (pf->hw.mac.type == I40E_MAC_X722) {
7986 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7987 I40E_FLAG_128_QP_RSS_CAPABLE |
7988 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7989 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7990 I40E_FLAG_WB_ON_ITR_CAPABLE |
7991 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7993 pf->eeprom_version = 0xDEAD;
7994 pf->lan_veb = I40E_NO_VEB;
7995 pf->lan_vsi = I40E_NO_VSI;
7997 /* By default FW has this off for performance reasons */
7998 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8000 /* set up queue assignment tracking */
8001 size = sizeof(struct i40e_lump_tracking)
8002 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8003 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8008 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8009 pf->qp_pile->search_hint = 0;
8011 pf->tx_timeout_recovery_level = 1;
8013 mutex_init(&pf->switch_mutex);
8015 /* If NPAR is enabled nudge the Tx scheduler */
8016 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8017 i40e_set_npar_bw_setting(pf);
8024 * i40e_set_ntuple - set the ntuple feature flag and take action
8025 * @pf: board private structure to initialize
8026 * @features: the feature set that the stack is suggesting
8028 * returns a bool to indicate if reset needs to happen
8030 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8032 bool need_reset = false;
8034 /* Check if Flow Director n-tuple support was enabled or disabled. If
8035 * the state changed, we need to reset.
8037 if (features & NETIF_F_NTUPLE) {
8038 /* Enable filters and mark for reset */
8039 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8041 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8043 /* turn off filters, mark for reset and clear SW filter list */
8044 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8046 i40e_fdir_filter_exit(pf);
8048 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8049 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8050 /* reset fd counters */
8051 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8052 pf->fdir_pf_active_filters = 0;
8053 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8054 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8055 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8056 /* if ATR was auto disabled it can be re-enabled. */
8057 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8058 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8059 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8065 * i40e_set_features - set the netdev feature flags
8066 * @netdev: ptr to the netdev being adjusted
8067 * @features: the feature set that the stack is suggesting
8069 static int i40e_set_features(struct net_device *netdev,
8070 netdev_features_t features)
8072 struct i40e_netdev_priv *np = netdev_priv(netdev);
8073 struct i40e_vsi *vsi = np->vsi;
8074 struct i40e_pf *pf = vsi->back;
8077 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8078 i40e_vlan_stripping_enable(vsi);
8080 i40e_vlan_stripping_disable(vsi);
8082 need_reset = i40e_set_ntuple(pf, features);
8085 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8090 #ifdef CONFIG_I40E_VXLAN
8092 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8093 * @pf: board private structure
8094 * @port: The UDP port to look up
8096 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8098 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8102 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8103 if (pf->vxlan_ports[i] == port)
8111 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8112 * @netdev: This physical port's netdev
8113 * @sa_family: Socket Family that VXLAN is notifying us about
8114 * @port: New UDP port number that VXLAN started listening to
8116 static void i40e_add_vxlan_port(struct net_device *netdev,
8117 sa_family_t sa_family, __be16 port)
8119 struct i40e_netdev_priv *np = netdev_priv(netdev);
8120 struct i40e_vsi *vsi = np->vsi;
8121 struct i40e_pf *pf = vsi->back;
8125 if (sa_family == AF_INET6)
8128 idx = i40e_get_vxlan_port_idx(pf, port);
8130 /* Check if port already exists */
8131 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8132 netdev_info(netdev, "vxlan port %d already offloaded\n",
8137 /* Now check if there is space to add the new port */
8138 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8140 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8141 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8146 /* New port: add it and mark its index in the bitmap */
8147 pf->vxlan_ports[next_idx] = port;
8148 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8149 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8153 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8154 * @netdev: This physical port's netdev
8155 * @sa_family: Socket Family that VXLAN is notifying us about
8156 * @port: UDP port number that VXLAN stopped listening to
8158 static void i40e_del_vxlan_port(struct net_device *netdev,
8159 sa_family_t sa_family, __be16 port)
8161 struct i40e_netdev_priv *np = netdev_priv(netdev);
8162 struct i40e_vsi *vsi = np->vsi;
8163 struct i40e_pf *pf = vsi->back;
8166 if (sa_family == AF_INET6)
8169 idx = i40e_get_vxlan_port_idx(pf, port);
8171 /* Check if port already exists */
8172 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8173 /* if port exists, set it to 0 (mark for deletion)
8174 * and make it pending
8176 pf->vxlan_ports[idx] = 0;
8177 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8178 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8180 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8186 static int i40e_get_phys_port_id(struct net_device *netdev,
8187 struct netdev_phys_item_id *ppid)
8189 struct i40e_netdev_priv *np = netdev_priv(netdev);
8190 struct i40e_pf *pf = np->vsi->back;
8191 struct i40e_hw *hw = &pf->hw;
8193 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8196 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8197 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8203 * i40e_ndo_fdb_add - add an entry to the hardware database
8204 * @ndm: the input from the stack
8205 * @tb: pointer to array of nladdr (unused)
8206 * @dev: the net device pointer
8207 * @addr: the MAC address entry being added
8208 * @flags: instructions from stack about fdb operation
8210 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8211 struct net_device *dev,
8212 const unsigned char *addr, u16 vid,
8215 struct i40e_netdev_priv *np = netdev_priv(dev);
8216 struct i40e_pf *pf = np->vsi->back;
8219 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8223 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8227 /* Hardware does not support aging addresses so if a
8228 * ndm_state is given only allow permanent addresses
8230 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8231 netdev_info(dev, "FDB only supports static addresses\n");
8235 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8236 err = dev_uc_add_excl(dev, addr);
8237 else if (is_multicast_ether_addr(addr))
8238 err = dev_mc_add_excl(dev, addr);
8242 /* Only return duplicate errors if NLM_F_EXCL is set */
8243 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8250 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8251 * @dev: the netdev being configured
8252 * @nlh: RTNL message
8254 * Inserts a new hardware bridge if not already created and
8255 * enables the bridging mode requested (VEB or VEPA). If the
8256 * hardware bridge has already been inserted and the request
8257 * is to change the mode then that requires a PF reset to
8258 * allow rebuild of the components with required hardware
8259 * bridge mode enabled.
8261 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8262 struct nlmsghdr *nlh,
8265 struct i40e_netdev_priv *np = netdev_priv(dev);
8266 struct i40e_vsi *vsi = np->vsi;
8267 struct i40e_pf *pf = vsi->back;
8268 struct i40e_veb *veb = NULL;
8269 struct nlattr *attr, *br_spec;
8272 /* Only for PF VSI for now */
8273 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8276 /* Find the HW bridge for PF VSI */
8277 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8278 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8282 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8284 nla_for_each_nested(attr, br_spec, rem) {
8287 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8290 mode = nla_get_u16(attr);
8291 if ((mode != BRIDGE_MODE_VEPA) &&
8292 (mode != BRIDGE_MODE_VEB))
8295 /* Insert a new HW bridge */
8297 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8298 vsi->tc_config.enabled_tc);
8300 veb->bridge_mode = mode;
8301 i40e_config_bridge_mode(veb);
8303 /* No Bridge HW offload available */
8307 } else if (mode != veb->bridge_mode) {
8308 /* Existing HW bridge but different mode needs reset */
8309 veb->bridge_mode = mode;
8310 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8311 if (mode == BRIDGE_MODE_VEB)
8312 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8314 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8315 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8324 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8327 * @seq: RTNL message seq #
8328 * @dev: the netdev being configured
8329 * @filter_mask: unused
8331 * Return the mode in which the hardware bridge is operating in
8334 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8335 struct net_device *dev,
8336 u32 filter_mask, int nlflags)
8338 struct i40e_netdev_priv *np = netdev_priv(dev);
8339 struct i40e_vsi *vsi = np->vsi;
8340 struct i40e_pf *pf = vsi->back;
8341 struct i40e_veb *veb = NULL;
8344 /* Only for PF VSI for now */
8345 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8348 /* Find the HW bridge for the PF VSI */
8349 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8350 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8357 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8358 nlflags, 0, 0, filter_mask, NULL);
8361 #define I40E_MAX_TUNNEL_HDR_LEN 80
8363 * i40e_features_check - Validate encapsulated packet conforms to limits
8365 * @netdev: This physical port's netdev
8366 * @features: Offload features that the stack believes apply
8368 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8369 struct net_device *dev,
8370 netdev_features_t features)
8372 if (skb->encapsulation &&
8373 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8374 I40E_MAX_TUNNEL_HDR_LEN))
8375 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8380 static const struct net_device_ops i40e_netdev_ops = {
8381 .ndo_open = i40e_open,
8382 .ndo_stop = i40e_close,
8383 .ndo_start_xmit = i40e_lan_xmit_frame,
8384 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8385 .ndo_set_rx_mode = i40e_set_rx_mode,
8386 .ndo_validate_addr = eth_validate_addr,
8387 .ndo_set_mac_address = i40e_set_mac,
8388 .ndo_change_mtu = i40e_change_mtu,
8389 .ndo_do_ioctl = i40e_ioctl,
8390 .ndo_tx_timeout = i40e_tx_timeout,
8391 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8392 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8393 #ifdef CONFIG_NET_POLL_CONTROLLER
8394 .ndo_poll_controller = i40e_netpoll,
8396 .ndo_setup_tc = i40e_setup_tc,
8398 .ndo_fcoe_enable = i40e_fcoe_enable,
8399 .ndo_fcoe_disable = i40e_fcoe_disable,
8401 .ndo_set_features = i40e_set_features,
8402 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8403 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8404 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8405 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8406 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8407 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8408 #ifdef CONFIG_I40E_VXLAN
8409 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8410 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8412 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8413 .ndo_fdb_add = i40e_ndo_fdb_add,
8414 .ndo_features_check = i40e_features_check,
8415 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8416 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8420 * i40e_config_netdev - Setup the netdev flags
8421 * @vsi: the VSI being configured
8423 * Returns 0 on success, negative value on failure
8425 static int i40e_config_netdev(struct i40e_vsi *vsi)
8427 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8428 struct i40e_pf *pf = vsi->back;
8429 struct i40e_hw *hw = &pf->hw;
8430 struct i40e_netdev_priv *np;
8431 struct net_device *netdev;
8432 u8 mac_addr[ETH_ALEN];
8435 etherdev_size = sizeof(struct i40e_netdev_priv);
8436 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8440 vsi->netdev = netdev;
8441 np = netdev_priv(netdev);
8444 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8445 NETIF_F_GSO_UDP_TUNNEL |
8448 netdev->features = NETIF_F_SG |
8452 NETIF_F_GSO_UDP_TUNNEL |
8453 NETIF_F_HW_VLAN_CTAG_TX |
8454 NETIF_F_HW_VLAN_CTAG_RX |
8455 NETIF_F_HW_VLAN_CTAG_FILTER |
8464 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8465 netdev->features |= NETIF_F_NTUPLE;
8467 /* copy netdev features into list of user selectable features */
8468 netdev->hw_features |= netdev->features;
8470 if (vsi->type == I40E_VSI_MAIN) {
8471 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8472 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8473 /* The following steps are necessary to prevent reception
8474 * of tagged packets - some older NVM configurations load a
8475 * default a MAC-VLAN filter that accepts any tagged packet
8476 * which must be replaced by a normal filter.
8478 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8479 i40e_add_filter(vsi, mac_addr,
8480 I40E_VLAN_ANY, false, true);
8482 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8483 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8484 pf->vsi[pf->lan_vsi]->netdev->name);
8485 random_ether_addr(mac_addr);
8486 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8488 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8490 ether_addr_copy(netdev->dev_addr, mac_addr);
8491 ether_addr_copy(netdev->perm_addr, mac_addr);
8492 /* vlan gets same features (except vlan offload)
8493 * after any tweaks for specific VSI types
8495 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8496 NETIF_F_HW_VLAN_CTAG_RX |
8497 NETIF_F_HW_VLAN_CTAG_FILTER);
8498 netdev->priv_flags |= IFF_UNICAST_FLT;
8499 netdev->priv_flags |= IFF_SUPP_NOFCS;
8500 /* Setup netdev TC information */
8501 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8503 netdev->netdev_ops = &i40e_netdev_ops;
8504 netdev->watchdog_timeo = 5 * HZ;
8505 i40e_set_ethtool_ops(netdev);
8507 i40e_fcoe_config_netdev(netdev, vsi);
8514 * i40e_vsi_delete - Delete a VSI from the switch
8515 * @vsi: the VSI being removed
8517 * Returns 0 on success, negative value on failure
8519 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8521 /* remove default VSI is not allowed */
8522 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8525 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8529 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8530 * @vsi: the VSI being queried
8532 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8534 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8536 struct i40e_veb *veb;
8537 struct i40e_pf *pf = vsi->back;
8539 /* Uplink is not a bridge so default to VEB */
8540 if (vsi->veb_idx == I40E_NO_VEB)
8543 veb = pf->veb[vsi->veb_idx];
8544 /* Uplink is a bridge in VEPA mode */
8545 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8548 /* Uplink is a bridge in VEB mode */
8553 * i40e_add_vsi - Add a VSI to the switch
8554 * @vsi: the VSI being configured
8556 * This initializes a VSI context depending on the VSI type to be added and
8557 * passes it down to the add_vsi aq command.
8559 static int i40e_add_vsi(struct i40e_vsi *vsi)
8562 struct i40e_mac_filter *f, *ftmp;
8563 struct i40e_pf *pf = vsi->back;
8564 struct i40e_hw *hw = &pf->hw;
8565 struct i40e_vsi_context ctxt;
8566 u8 enabled_tc = 0x1; /* TC0 enabled */
8569 memset(&ctxt, 0, sizeof(ctxt));
8570 switch (vsi->type) {
8572 /* The PF's main VSI is already setup as part of the
8573 * device initialization, so we'll not bother with
8574 * the add_vsi call, but we will retrieve the current
8577 ctxt.seid = pf->main_vsi_seid;
8578 ctxt.pf_num = pf->hw.pf_id;
8580 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8581 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8583 dev_info(&pf->pdev->dev,
8584 "couldn't get PF vsi config, err %s aq_err %s\n",
8585 i40e_stat_str(&pf->hw, ret),
8586 i40e_aq_str(&pf->hw,
8587 pf->hw.aq.asq_last_status));
8590 vsi->info = ctxt.info;
8591 vsi->info.valid_sections = 0;
8593 vsi->seid = ctxt.seid;
8594 vsi->id = ctxt.vsi_number;
8596 enabled_tc = i40e_pf_get_tc_map(pf);
8598 /* MFP mode setup queue map and update VSI */
8599 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8600 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8601 memset(&ctxt, 0, sizeof(ctxt));
8602 ctxt.seid = pf->main_vsi_seid;
8603 ctxt.pf_num = pf->hw.pf_id;
8605 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8606 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8608 dev_info(&pf->pdev->dev,
8609 "update vsi failed, err %s aq_err %s\n",
8610 i40e_stat_str(&pf->hw, ret),
8611 i40e_aq_str(&pf->hw,
8612 pf->hw.aq.asq_last_status));
8616 /* update the local VSI info queue map */
8617 i40e_vsi_update_queue_map(vsi, &ctxt);
8618 vsi->info.valid_sections = 0;
8620 /* Default/Main VSI is only enabled for TC0
8621 * reconfigure it to enable all TCs that are
8622 * available on the port in SFP mode.
8623 * For MFP case the iSCSI PF would use this
8624 * flow to enable LAN+iSCSI TC.
8626 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8628 dev_info(&pf->pdev->dev,
8629 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8631 i40e_stat_str(&pf->hw, ret),
8632 i40e_aq_str(&pf->hw,
8633 pf->hw.aq.asq_last_status));
8640 ctxt.pf_num = hw->pf_id;
8642 ctxt.uplink_seid = vsi->uplink_seid;
8643 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8644 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8645 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8646 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8647 ctxt.info.valid_sections |=
8648 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8649 ctxt.info.switch_id =
8650 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8652 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8655 case I40E_VSI_VMDQ2:
8656 ctxt.pf_num = hw->pf_id;
8658 ctxt.uplink_seid = vsi->uplink_seid;
8659 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8660 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8662 /* This VSI is connected to VEB so the switch_id
8663 * should be set to zero by default.
8665 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8666 ctxt.info.valid_sections |=
8667 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8668 ctxt.info.switch_id =
8669 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8672 /* Setup the VSI tx/rx queue map for TC0 only for now */
8673 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8676 case I40E_VSI_SRIOV:
8677 ctxt.pf_num = hw->pf_id;
8678 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8679 ctxt.uplink_seid = vsi->uplink_seid;
8680 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8681 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8683 /* This VSI is connected to VEB so the switch_id
8684 * should be set to zero by default.
8686 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8687 ctxt.info.valid_sections |=
8688 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8689 ctxt.info.switch_id =
8690 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8693 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8694 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8695 if (pf->vf[vsi->vf_id].spoofchk) {
8696 ctxt.info.valid_sections |=
8697 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8698 ctxt.info.sec_flags |=
8699 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8700 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8702 /* Setup the VSI tx/rx queue map for TC0 only for now */
8703 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8708 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8710 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8715 #endif /* I40E_FCOE */
8720 if (vsi->type != I40E_VSI_MAIN) {
8721 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8723 dev_info(&vsi->back->pdev->dev,
8724 "add vsi failed, err %s aq_err %s\n",
8725 i40e_stat_str(&pf->hw, ret),
8726 i40e_aq_str(&pf->hw,
8727 pf->hw.aq.asq_last_status));
8731 vsi->info = ctxt.info;
8732 vsi->info.valid_sections = 0;
8733 vsi->seid = ctxt.seid;
8734 vsi->id = ctxt.vsi_number;
8737 /* If macvlan filters already exist, force them to get loaded */
8738 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8742 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8743 struct i40e_aqc_remove_macvlan_element_data element;
8745 memset(&element, 0, sizeof(element));
8746 ether_addr_copy(element.mac_addr, f->macaddr);
8747 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8748 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8751 /* some older FW has a different default */
8753 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8754 i40e_aq_remove_macvlan(hw, vsi->seid,
8758 i40e_aq_mac_address_write(hw,
8759 I40E_AQC_WRITE_TYPE_LAA_WOL,
8764 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8765 pf->flags |= I40E_FLAG_FILTER_SYNC;
8768 /* Update VSI BW information */
8769 ret = i40e_vsi_get_bw_info(vsi);
8771 dev_info(&pf->pdev->dev,
8772 "couldn't get vsi bw info, err %s aq_err %s\n",
8773 i40e_stat_str(&pf->hw, ret),
8774 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8775 /* VSI is already added so not tearing that up */
8784 * i40e_vsi_release - Delete a VSI and free its resources
8785 * @vsi: the VSI being removed
8787 * Returns 0 on success or < 0 on error
8789 int i40e_vsi_release(struct i40e_vsi *vsi)
8791 struct i40e_mac_filter *f, *ftmp;
8792 struct i40e_veb *veb = NULL;
8799 /* release of a VEB-owner or last VSI is not allowed */
8800 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8801 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8802 vsi->seid, vsi->uplink_seid);
8805 if (vsi == pf->vsi[pf->lan_vsi] &&
8806 !test_bit(__I40E_DOWN, &pf->state)) {
8807 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8811 uplink_seid = vsi->uplink_seid;
8812 if (vsi->type != I40E_VSI_SRIOV) {
8813 if (vsi->netdev_registered) {
8814 vsi->netdev_registered = false;
8816 /* results in a call to i40e_close() */
8817 unregister_netdev(vsi->netdev);
8820 i40e_vsi_close(vsi);
8822 i40e_vsi_disable_irq(vsi);
8825 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8826 i40e_del_filter(vsi, f->macaddr, f->vlan,
8827 f->is_vf, f->is_netdev);
8828 i40e_sync_vsi_filters(vsi, false);
8830 i40e_vsi_delete(vsi);
8831 i40e_vsi_free_q_vectors(vsi);
8833 free_netdev(vsi->netdev);
8836 i40e_vsi_clear_rings(vsi);
8837 i40e_vsi_clear(vsi);
8839 /* If this was the last thing on the VEB, except for the
8840 * controlling VSI, remove the VEB, which puts the controlling
8841 * VSI onto the next level down in the switch.
8843 * Well, okay, there's one more exception here: don't remove
8844 * the orphan VEBs yet. We'll wait for an explicit remove request
8845 * from up the network stack.
8847 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8849 pf->vsi[i]->uplink_seid == uplink_seid &&
8850 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8851 n++; /* count the VSIs */
8854 for (i = 0; i < I40E_MAX_VEB; i++) {
8857 if (pf->veb[i]->uplink_seid == uplink_seid)
8858 n++; /* count the VEBs */
8859 if (pf->veb[i]->seid == uplink_seid)
8862 if (n == 0 && veb && veb->uplink_seid != 0)
8863 i40e_veb_release(veb);
8869 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8870 * @vsi: ptr to the VSI
8872 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8873 * corresponding SW VSI structure and initializes num_queue_pairs for the
8874 * newly allocated VSI.
8876 * Returns 0 on success or negative on failure
8878 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8881 struct i40e_pf *pf = vsi->back;
8883 if (vsi->q_vectors[0]) {
8884 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8889 if (vsi->base_vector) {
8890 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8891 vsi->seid, vsi->base_vector);
8895 ret = i40e_vsi_alloc_q_vectors(vsi);
8897 dev_info(&pf->pdev->dev,
8898 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8899 vsi->num_q_vectors, vsi->seid, ret);
8900 vsi->num_q_vectors = 0;
8901 goto vector_setup_out;
8904 /* In Legacy mode, we do not have to get any other vector since we
8905 * piggyback on the misc/ICR0 for queue interrupts.
8907 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8909 if (vsi->num_q_vectors)
8910 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8911 vsi->num_q_vectors, vsi->idx);
8912 if (vsi->base_vector < 0) {
8913 dev_info(&pf->pdev->dev,
8914 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8915 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8916 i40e_vsi_free_q_vectors(vsi);
8918 goto vector_setup_out;
8926 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8927 * @vsi: pointer to the vsi.
8929 * This re-allocates a vsi's queue resources.
8931 * Returns pointer to the successfully allocated and configured VSI sw struct
8932 * on success, otherwise returns NULL on failure.
8934 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8936 struct i40e_pf *pf = vsi->back;
8940 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8941 i40e_vsi_clear_rings(vsi);
8943 i40e_vsi_free_arrays(vsi, false);
8944 i40e_set_num_rings_in_vsi(vsi);
8945 ret = i40e_vsi_alloc_arrays(vsi, false);
8949 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8951 dev_info(&pf->pdev->dev,
8952 "failed to get tracking for %d queues for VSI %d err %d\n",
8953 vsi->alloc_queue_pairs, vsi->seid, ret);
8956 vsi->base_queue = ret;
8958 /* Update the FW view of the VSI. Force a reset of TC and queue
8959 * layout configurations.
8961 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8962 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8963 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8964 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8966 /* assign it some queues */
8967 ret = i40e_alloc_rings(vsi);
8971 /* map all of the rings to the q_vectors */
8972 i40e_vsi_map_rings_to_vectors(vsi);
8976 i40e_vsi_free_q_vectors(vsi);
8977 if (vsi->netdev_registered) {
8978 vsi->netdev_registered = false;
8979 unregister_netdev(vsi->netdev);
8980 free_netdev(vsi->netdev);
8983 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8985 i40e_vsi_clear(vsi);
8990 * i40e_vsi_setup - Set up a VSI by a given type
8991 * @pf: board private structure
8993 * @uplink_seid: the switch element to link to
8994 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8996 * This allocates the sw VSI structure and its queue resources, then add a VSI
8997 * to the identified VEB.
8999 * Returns pointer to the successfully allocated and configure VSI sw struct on
9000 * success, otherwise returns NULL on failure.
9002 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9003 u16 uplink_seid, u32 param1)
9005 struct i40e_vsi *vsi = NULL;
9006 struct i40e_veb *veb = NULL;
9010 /* The requested uplink_seid must be either
9011 * - the PF's port seid
9012 * no VEB is needed because this is the PF
9013 * or this is a Flow Director special case VSI
9014 * - seid of an existing VEB
9015 * - seid of a VSI that owns an existing VEB
9016 * - seid of a VSI that doesn't own a VEB
9017 * a new VEB is created and the VSI becomes the owner
9018 * - seid of the PF VSI, which is what creates the first VEB
9019 * this is a special case of the previous
9021 * Find which uplink_seid we were given and create a new VEB if needed
9023 for (i = 0; i < I40E_MAX_VEB; i++) {
9024 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9030 if (!veb && uplink_seid != pf->mac_seid) {
9032 for (i = 0; i < pf->num_alloc_vsi; i++) {
9033 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9039 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9044 if (vsi->uplink_seid == pf->mac_seid)
9045 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9046 vsi->tc_config.enabled_tc);
9047 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9048 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9049 vsi->tc_config.enabled_tc);
9051 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9052 dev_info(&vsi->back->pdev->dev,
9053 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9056 /* We come up by default in VEPA mode if SRIOV is not
9057 * already enabled, in which case we can't force VEPA
9060 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9061 veb->bridge_mode = BRIDGE_MODE_VEPA;
9062 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9064 i40e_config_bridge_mode(veb);
9066 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9067 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9071 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9075 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9076 uplink_seid = veb->seid;
9079 /* get vsi sw struct */
9080 v_idx = i40e_vsi_mem_alloc(pf, type);
9083 vsi = pf->vsi[v_idx];
9087 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9089 if (type == I40E_VSI_MAIN)
9090 pf->lan_vsi = v_idx;
9091 else if (type == I40E_VSI_SRIOV)
9092 vsi->vf_id = param1;
9093 /* assign it some queues */
9094 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9097 dev_info(&pf->pdev->dev,
9098 "failed to get tracking for %d queues for VSI %d err=%d\n",
9099 vsi->alloc_queue_pairs, vsi->seid, ret);
9102 vsi->base_queue = ret;
9104 /* get a VSI from the hardware */
9105 vsi->uplink_seid = uplink_seid;
9106 ret = i40e_add_vsi(vsi);
9110 switch (vsi->type) {
9111 /* setup the netdev if needed */
9113 case I40E_VSI_VMDQ2:
9115 ret = i40e_config_netdev(vsi);
9118 ret = register_netdev(vsi->netdev);
9121 vsi->netdev_registered = true;
9122 netif_carrier_off(vsi->netdev);
9123 #ifdef CONFIG_I40E_DCB
9124 /* Setup DCB netlink interface */
9125 i40e_dcbnl_setup(vsi);
9126 #endif /* CONFIG_I40E_DCB */
9130 /* set up vectors and rings if needed */
9131 ret = i40e_vsi_setup_vectors(vsi);
9135 ret = i40e_alloc_rings(vsi);
9139 /* map all of the rings to the q_vectors */
9140 i40e_vsi_map_rings_to_vectors(vsi);
9142 i40e_vsi_reset_stats(vsi);
9146 /* no netdev or rings for the other VSI types */
9150 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9151 (vsi->type == I40E_VSI_VMDQ2)) {
9152 ret = i40e_vsi_config_rss(vsi);
9157 i40e_vsi_free_q_vectors(vsi);
9159 if (vsi->netdev_registered) {
9160 vsi->netdev_registered = false;
9161 unregister_netdev(vsi->netdev);
9162 free_netdev(vsi->netdev);
9166 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9168 i40e_vsi_clear(vsi);
9174 * i40e_veb_get_bw_info - Query VEB BW information
9175 * @veb: the veb to query
9177 * Query the Tx scheduler BW configuration data for given VEB
9179 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9181 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9182 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9183 struct i40e_pf *pf = veb->pf;
9184 struct i40e_hw *hw = &pf->hw;
9189 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9192 dev_info(&pf->pdev->dev,
9193 "query veb bw config failed, err %s aq_err %s\n",
9194 i40e_stat_str(&pf->hw, ret),
9195 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9199 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9202 dev_info(&pf->pdev->dev,
9203 "query veb bw ets config failed, err %s aq_err %s\n",
9204 i40e_stat_str(&pf->hw, ret),
9205 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9209 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9210 veb->bw_max_quanta = ets_data.tc_bw_max;
9211 veb->is_abs_credits = bw_data.absolute_credits_enable;
9212 veb->enabled_tc = ets_data.tc_valid_bits;
9213 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9214 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9215 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9216 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9217 veb->bw_tc_limit_credits[i] =
9218 le16_to_cpu(bw_data.tc_bw_limits[i]);
9219 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9227 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9228 * @pf: board private structure
9230 * On error: returns error code (negative)
9231 * On success: returns vsi index in PF (positive)
9233 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9236 struct i40e_veb *veb;
9239 /* Need to protect the allocation of switch elements at the PF level */
9240 mutex_lock(&pf->switch_mutex);
9242 /* VEB list may be fragmented if VEB creation/destruction has
9243 * been happening. We can afford to do a quick scan to look
9244 * for any free slots in the list.
9246 * find next empty veb slot, looping back around if necessary
9249 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9251 if (i >= I40E_MAX_VEB) {
9253 goto err_alloc_veb; /* out of VEB slots! */
9256 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9263 veb->enabled_tc = 1;
9268 mutex_unlock(&pf->switch_mutex);
9273 * i40e_switch_branch_release - Delete a branch of the switch tree
9274 * @branch: where to start deleting
9276 * This uses recursion to find the tips of the branch to be
9277 * removed, deleting until we get back to and can delete this VEB.
9279 static void i40e_switch_branch_release(struct i40e_veb *branch)
9281 struct i40e_pf *pf = branch->pf;
9282 u16 branch_seid = branch->seid;
9283 u16 veb_idx = branch->idx;
9286 /* release any VEBs on this VEB - RECURSION */
9287 for (i = 0; i < I40E_MAX_VEB; i++) {
9290 if (pf->veb[i]->uplink_seid == branch->seid)
9291 i40e_switch_branch_release(pf->veb[i]);
9294 /* Release the VSIs on this VEB, but not the owner VSI.
9296 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9297 * the VEB itself, so don't use (*branch) after this loop.
9299 for (i = 0; i < pf->num_alloc_vsi; i++) {
9302 if (pf->vsi[i]->uplink_seid == branch_seid &&
9303 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9304 i40e_vsi_release(pf->vsi[i]);
9308 /* There's one corner case where the VEB might not have been
9309 * removed, so double check it here and remove it if needed.
9310 * This case happens if the veb was created from the debugfs
9311 * commands and no VSIs were added to it.
9313 if (pf->veb[veb_idx])
9314 i40e_veb_release(pf->veb[veb_idx]);
9318 * i40e_veb_clear - remove veb struct
9319 * @veb: the veb to remove
9321 static void i40e_veb_clear(struct i40e_veb *veb)
9327 struct i40e_pf *pf = veb->pf;
9329 mutex_lock(&pf->switch_mutex);
9330 if (pf->veb[veb->idx] == veb)
9331 pf->veb[veb->idx] = NULL;
9332 mutex_unlock(&pf->switch_mutex);
9339 * i40e_veb_release - Delete a VEB and free its resources
9340 * @veb: the VEB being removed
9342 void i40e_veb_release(struct i40e_veb *veb)
9344 struct i40e_vsi *vsi = NULL;
9350 /* find the remaining VSI and check for extras */
9351 for (i = 0; i < pf->num_alloc_vsi; i++) {
9352 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9358 dev_info(&pf->pdev->dev,
9359 "can't remove VEB %d with %d VSIs left\n",
9364 /* move the remaining VSI to uplink veb */
9365 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9366 if (veb->uplink_seid) {
9367 vsi->uplink_seid = veb->uplink_seid;
9368 if (veb->uplink_seid == pf->mac_seid)
9369 vsi->veb_idx = I40E_NO_VEB;
9371 vsi->veb_idx = veb->veb_idx;
9374 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9375 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9378 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9379 i40e_veb_clear(veb);
9383 * i40e_add_veb - create the VEB in the switch
9384 * @veb: the VEB to be instantiated
9385 * @vsi: the controlling VSI
9387 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9389 struct i40e_pf *pf = veb->pf;
9390 bool is_default = veb->pf->cur_promisc;
9391 bool is_cloud = false;
9394 /* get a VEB from the hardware */
9395 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9396 veb->enabled_tc, is_default,
9397 is_cloud, &veb->seid, NULL);
9399 dev_info(&pf->pdev->dev,
9400 "couldn't add VEB, err %s aq_err %s\n",
9401 i40e_stat_str(&pf->hw, ret),
9402 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9406 /* get statistics counter */
9407 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9408 &veb->stats_idx, NULL, NULL, NULL);
9410 dev_info(&pf->pdev->dev,
9411 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9412 i40e_stat_str(&pf->hw, ret),
9413 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9416 ret = i40e_veb_get_bw_info(veb);
9418 dev_info(&pf->pdev->dev,
9419 "couldn't get VEB bw info, err %s aq_err %s\n",
9420 i40e_stat_str(&pf->hw, ret),
9421 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9422 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9426 vsi->uplink_seid = veb->seid;
9427 vsi->veb_idx = veb->idx;
9428 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9434 * i40e_veb_setup - Set up a VEB
9435 * @pf: board private structure
9436 * @flags: VEB setup flags
9437 * @uplink_seid: the switch element to link to
9438 * @vsi_seid: the initial VSI seid
9439 * @enabled_tc: Enabled TC bit-map
9441 * This allocates the sw VEB structure and links it into the switch
9442 * It is possible and legal for this to be a duplicate of an already
9443 * existing VEB. It is also possible for both uplink and vsi seids
9444 * to be zero, in order to create a floating VEB.
9446 * Returns pointer to the successfully allocated VEB sw struct on
9447 * success, otherwise returns NULL on failure.
9449 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9450 u16 uplink_seid, u16 vsi_seid,
9453 struct i40e_veb *veb, *uplink_veb = NULL;
9454 int vsi_idx, veb_idx;
9457 /* if one seid is 0, the other must be 0 to create a floating relay */
9458 if ((uplink_seid == 0 || vsi_seid == 0) &&
9459 (uplink_seid + vsi_seid != 0)) {
9460 dev_info(&pf->pdev->dev,
9461 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9462 uplink_seid, vsi_seid);
9466 /* make sure there is such a vsi and uplink */
9467 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9468 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9470 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9471 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9476 if (uplink_seid && uplink_seid != pf->mac_seid) {
9477 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9478 if (pf->veb[veb_idx] &&
9479 pf->veb[veb_idx]->seid == uplink_seid) {
9480 uplink_veb = pf->veb[veb_idx];
9485 dev_info(&pf->pdev->dev,
9486 "uplink seid %d not found\n", uplink_seid);
9491 /* get veb sw struct */
9492 veb_idx = i40e_veb_mem_alloc(pf);
9495 veb = pf->veb[veb_idx];
9497 veb->uplink_seid = uplink_seid;
9498 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9499 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9501 /* create the VEB in the switch */
9502 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9505 if (vsi_idx == pf->lan_vsi)
9506 pf->lan_veb = veb->idx;
9511 i40e_veb_clear(veb);
9517 * i40e_setup_pf_switch_element - set PF vars based on switch type
9518 * @pf: board private structure
9519 * @ele: element we are building info from
9520 * @num_reported: total number of elements
9521 * @printconfig: should we print the contents
9523 * helper function to assist in extracting a few useful SEID values.
9525 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9526 struct i40e_aqc_switch_config_element_resp *ele,
9527 u16 num_reported, bool printconfig)
9529 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9530 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9531 u8 element_type = ele->element_type;
9532 u16 seid = le16_to_cpu(ele->seid);
9535 dev_info(&pf->pdev->dev,
9536 "type=%d seid=%d uplink=%d downlink=%d\n",
9537 element_type, seid, uplink_seid, downlink_seid);
9539 switch (element_type) {
9540 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9541 pf->mac_seid = seid;
9543 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9545 if (uplink_seid != pf->mac_seid)
9547 if (pf->lan_veb == I40E_NO_VEB) {
9550 /* find existing or else empty VEB */
9551 for (v = 0; v < I40E_MAX_VEB; v++) {
9552 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9557 if (pf->lan_veb == I40E_NO_VEB) {
9558 v = i40e_veb_mem_alloc(pf);
9565 pf->veb[pf->lan_veb]->seid = seid;
9566 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9567 pf->veb[pf->lan_veb]->pf = pf;
9568 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9570 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9571 if (num_reported != 1)
9573 /* This is immediately after a reset so we can assume this is
9576 pf->mac_seid = uplink_seid;
9577 pf->pf_seid = downlink_seid;
9578 pf->main_vsi_seid = seid;
9580 dev_info(&pf->pdev->dev,
9581 "pf_seid=%d main_vsi_seid=%d\n",
9582 pf->pf_seid, pf->main_vsi_seid);
9584 case I40E_SWITCH_ELEMENT_TYPE_PF:
9585 case I40E_SWITCH_ELEMENT_TYPE_VF:
9586 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9587 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9588 case I40E_SWITCH_ELEMENT_TYPE_PE:
9589 case I40E_SWITCH_ELEMENT_TYPE_PA:
9590 /* ignore these for now */
9593 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9594 element_type, seid);
9600 * i40e_fetch_switch_configuration - Get switch config from firmware
9601 * @pf: board private structure
9602 * @printconfig: should we print the contents
9604 * Get the current switch configuration from the device and
9605 * extract a few useful SEID values.
9607 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9609 struct i40e_aqc_get_switch_config_resp *sw_config;
9615 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9619 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9621 u16 num_reported, num_total;
9623 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9627 dev_info(&pf->pdev->dev,
9628 "get switch config failed err %s aq_err %s\n",
9629 i40e_stat_str(&pf->hw, ret),
9630 i40e_aq_str(&pf->hw,
9631 pf->hw.aq.asq_last_status));
9636 num_reported = le16_to_cpu(sw_config->header.num_reported);
9637 num_total = le16_to_cpu(sw_config->header.num_total);
9640 dev_info(&pf->pdev->dev,
9641 "header: %d reported %d total\n",
9642 num_reported, num_total);
9644 for (i = 0; i < num_reported; i++) {
9645 struct i40e_aqc_switch_config_element_resp *ele =
9646 &sw_config->element[i];
9648 i40e_setup_pf_switch_element(pf, ele, num_reported,
9651 } while (next_seid != 0);
9658 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9659 * @pf: board private structure
9660 * @reinit: if the Main VSI needs to re-initialized.
9662 * Returns 0 on success, negative value on failure
9664 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9668 /* find out what's out there already */
9669 ret = i40e_fetch_switch_configuration(pf, false);
9671 dev_info(&pf->pdev->dev,
9672 "couldn't fetch switch config, err %s aq_err %s\n",
9673 i40e_stat_str(&pf->hw, ret),
9674 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9677 i40e_pf_reset_stats(pf);
9679 /* first time setup */
9680 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9681 struct i40e_vsi *vsi = NULL;
9684 /* Set up the PF VSI associated with the PF's main VSI
9685 * that is already in the HW switch
9687 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9688 uplink_seid = pf->veb[pf->lan_veb]->seid;
9690 uplink_seid = pf->mac_seid;
9691 if (pf->lan_vsi == I40E_NO_VSI)
9692 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9694 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9696 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9697 i40e_fdir_teardown(pf);
9701 /* force a reset of TC and queue layout configurations */
9702 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9703 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9704 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9705 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9707 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9709 i40e_fdir_sb_setup(pf);
9711 /* Setup static PF queue filter control settings */
9712 ret = i40e_setup_pf_filter_control(pf);
9714 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9716 /* Failure here should not stop continuing other steps */
9719 /* enable RSS in the HW, even for only one queue, as the stack can use
9722 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9723 i40e_config_rss(pf);
9725 /* fill in link information and enable LSE reporting */
9726 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9727 i40e_link_event(pf);
9729 /* Initialize user-specific link properties */
9730 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9731 I40E_AQ_AN_COMPLETED) ? true : false);
9739 * i40e_determine_queue_usage - Work out queue distribution
9740 * @pf: board private structure
9742 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9746 pf->num_lan_qps = 0;
9748 pf->num_fcoe_qps = 0;
9751 /* Find the max queues to be put into basic use. We'll always be
9752 * using TC0, whether or not DCB is running, and TC0 will get the
9755 queues_left = pf->hw.func_caps.num_tx_qp;
9757 if ((queues_left == 1) ||
9758 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9759 /* one qp for PF, no queues for anything else */
9761 pf->rss_size = pf->num_lan_qps = 1;
9763 /* make sure all the fancies are disabled */
9764 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9766 I40E_FLAG_FCOE_ENABLED |
9768 I40E_FLAG_FD_SB_ENABLED |
9769 I40E_FLAG_FD_ATR_ENABLED |
9770 I40E_FLAG_DCB_CAPABLE |
9771 I40E_FLAG_SRIOV_ENABLED |
9772 I40E_FLAG_VMDQ_ENABLED);
9773 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9774 I40E_FLAG_FD_SB_ENABLED |
9775 I40E_FLAG_FD_ATR_ENABLED |
9776 I40E_FLAG_DCB_CAPABLE))) {
9778 pf->rss_size = pf->num_lan_qps = 1;
9779 queues_left -= pf->num_lan_qps;
9781 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9783 I40E_FLAG_FCOE_ENABLED |
9785 I40E_FLAG_FD_SB_ENABLED |
9786 I40E_FLAG_FD_ATR_ENABLED |
9787 I40E_FLAG_DCB_ENABLED |
9788 I40E_FLAG_VMDQ_ENABLED);
9790 /* Not enough queues for all TCs */
9791 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9792 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9793 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9794 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9796 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9798 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9799 pf->hw.func_caps.num_tx_qp);
9801 queues_left -= pf->num_lan_qps;
9805 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9806 if (I40E_DEFAULT_FCOE <= queues_left) {
9807 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9808 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9809 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9811 pf->num_fcoe_qps = 0;
9812 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9813 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9816 queues_left -= pf->num_fcoe_qps;
9820 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9821 if (queues_left > 1) {
9822 queues_left -= 1; /* save 1 queue for FD */
9824 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9825 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9829 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9830 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9831 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9832 (queues_left / pf->num_vf_qps));
9833 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9836 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9837 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9838 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9839 (queues_left / pf->num_vmdq_qps));
9840 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9843 pf->queues_left = queues_left;
9845 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9850 * i40e_setup_pf_filter_control - Setup PF static filter control
9851 * @pf: PF to be setup
9853 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9854 * settings. If PE/FCoE are enabled then it will also set the per PF
9855 * based filter sizes required for them. It also enables Flow director,
9856 * ethertype and macvlan type filter settings for the pf.
9858 * Returns 0 on success, negative on failure
9860 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9862 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9864 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9866 /* Flow Director is enabled */
9867 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9868 settings->enable_fdir = true;
9870 /* Ethtype and MACVLAN filters enabled for PF */
9871 settings->enable_ethtype = true;
9872 settings->enable_macvlan = true;
9874 if (i40e_set_filter_control(&pf->hw, settings))
9880 #define INFO_STRING_LEN 255
9881 static void i40e_print_features(struct i40e_pf *pf)
9883 struct i40e_hw *hw = &pf->hw;
9886 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9888 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9894 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9895 #ifdef CONFIG_PCI_IOV
9896 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9898 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9899 pf->hw.func_caps.num_vsis,
9900 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9901 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9903 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9904 buf += sprintf(buf, "RSS ");
9905 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9906 buf += sprintf(buf, "FD_ATR ");
9907 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9908 buf += sprintf(buf, "FD_SB ");
9909 buf += sprintf(buf, "NTUPLE ");
9911 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9912 buf += sprintf(buf, "DCB ");
9913 if (pf->flags & I40E_FLAG_PTP)
9914 buf += sprintf(buf, "PTP ");
9916 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9917 buf += sprintf(buf, "FCOE ");
9920 BUG_ON(buf > (string + INFO_STRING_LEN));
9921 dev_info(&pf->pdev->dev, "%s\n", string);
9926 * i40e_probe - Device initialization routine
9927 * @pdev: PCI device information struct
9928 * @ent: entry in i40e_pci_tbl
9930 * i40e_probe initializes a PF identified by a pci_dev structure.
9931 * The OS initialization, configuring of the PF private structure,
9932 * and a hardware reset occur.
9934 * Returns 0 on success, negative on failure
9936 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9938 struct i40e_aq_get_phy_abilities_resp abilities;
9941 static u16 pfs_found;
9948 err = pci_enable_device_mem(pdev);
9952 /* set up for high or low dma */
9953 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9955 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9958 "DMA configuration failed: 0x%x\n", err);
9963 /* set up pci connections */
9964 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9965 IORESOURCE_MEM), i40e_driver_name);
9967 dev_info(&pdev->dev,
9968 "pci_request_selected_regions failed %d\n", err);
9972 pci_enable_pcie_error_reporting(pdev);
9973 pci_set_master(pdev);
9975 /* Now that we have a PCI connection, we need to do the
9976 * low level device setup. This is primarily setting up
9977 * the Admin Queue structures and then querying for the
9978 * device's current profile information.
9980 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9987 set_bit(__I40E_DOWN, &pf->state);
9992 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
9993 I40E_MAX_CSR_SPACE);
9995 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
9998 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9999 (unsigned int)pci_resource_start(pdev, 0),
10000 pf->ioremap_len, err);
10003 hw->vendor_id = pdev->vendor;
10004 hw->device_id = pdev->device;
10005 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10006 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10007 hw->subsystem_device_id = pdev->subsystem_device;
10008 hw->bus.device = PCI_SLOT(pdev->devfn);
10009 hw->bus.func = PCI_FUNC(pdev->devfn);
10010 pf->instance = pfs_found;
10013 pf->msg_enable = pf->hw.debug_mask;
10014 pf->msg_enable = debug;
10017 /* do a special CORER for clearing PXE mode once at init */
10018 if (hw->revision_id == 0 &&
10019 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10020 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10025 i40e_clear_pxe_mode(hw);
10028 /* Reset here to make sure all is clean and to define PF 'n' */
10030 err = i40e_pf_reset(hw);
10032 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10037 hw->aq.num_arq_entries = I40E_AQ_LEN;
10038 hw->aq.num_asq_entries = I40E_AQ_LEN;
10039 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10040 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10041 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10043 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10045 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10047 err = i40e_init_shared_code(hw);
10049 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10054 /* set up a default setting for link flow control */
10055 pf->hw.fc.requested_mode = I40E_FC_NONE;
10057 err = i40e_init_adminq(hw);
10058 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10060 dev_info(&pdev->dev,
10061 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10065 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10066 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10067 dev_info(&pdev->dev,
10068 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10069 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10070 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10071 dev_info(&pdev->dev,
10072 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10074 i40e_verify_eeprom(pf);
10076 /* Rev 0 hardware was never productized */
10077 if (hw->revision_id < 1)
10078 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10080 i40e_clear_pxe_mode(hw);
10081 err = i40e_get_capabilities(pf);
10083 goto err_adminq_setup;
10085 err = i40e_sw_init(pf);
10087 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10091 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10092 hw->func_caps.num_rx_qp,
10093 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10095 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10096 goto err_init_lan_hmc;
10099 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10101 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10103 goto err_configure_lan_hmc;
10106 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10107 * Ignore error return codes because if it was already disabled via
10108 * hardware settings this will fail
10110 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10111 (pf->hw.aq.fw_maj_ver < 4)) {
10112 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10113 i40e_aq_stop_lldp(hw, true, NULL);
10116 i40e_get_mac_addr(hw, hw->mac.addr);
10117 if (!is_valid_ether_addr(hw->mac.addr)) {
10118 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10122 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10123 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10124 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10125 if (is_valid_ether_addr(hw->mac.port_addr))
10126 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10128 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10130 dev_info(&pdev->dev,
10131 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10132 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10133 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10135 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10137 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10138 #endif /* I40E_FCOE */
10140 pci_set_drvdata(pdev, pf);
10141 pci_save_state(pdev);
10142 #ifdef CONFIG_I40E_DCB
10143 err = i40e_init_pf_dcb(pf);
10145 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10146 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10147 /* Continue without DCB enabled */
10149 #endif /* CONFIG_I40E_DCB */
10151 /* set up periodic task facility */
10152 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10153 pf->service_timer_period = HZ;
10155 INIT_WORK(&pf->service_task, i40e_service_task);
10156 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10157 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10159 /* NVM bit on means WoL disabled for the port */
10160 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10161 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10162 pf->wol_en = false;
10165 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10167 /* set up the main switch operations */
10168 i40e_determine_queue_usage(pf);
10169 err = i40e_init_interrupt_scheme(pf);
10171 goto err_switch_setup;
10173 /* The number of VSIs reported by the FW is the minimum guaranteed
10174 * to us; HW supports far more and we share the remaining pool with
10175 * the other PFs. We allocate space for more than the guarantee with
10176 * the understanding that we might not get them all later.
10178 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10179 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10181 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10183 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10184 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10185 pf->vsi = kzalloc(len, GFP_KERNEL);
10188 goto err_switch_setup;
10191 #ifdef CONFIG_PCI_IOV
10192 /* prep for VF support */
10193 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10194 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10195 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10196 if (pci_num_vf(pdev))
10197 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10200 err = i40e_setup_pf_switch(pf, false);
10202 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10205 /* if FDIR VSI was set up, start it now */
10206 for (i = 0; i < pf->num_alloc_vsi; i++) {
10207 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10208 i40e_vsi_open(pf->vsi[i]);
10213 /* driver is only interested in link up/down and module qualification
10214 * reports from firmware
10216 err = i40e_aq_set_phy_int_mask(&pf->hw,
10217 I40E_AQ_EVENT_LINK_UPDOWN |
10218 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10220 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10221 i40e_stat_str(&pf->hw, err),
10222 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10224 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10225 (pf->hw.aq.fw_maj_ver < 4)) {
10227 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10229 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10230 i40e_stat_str(&pf->hw, err),
10231 i40e_aq_str(&pf->hw,
10232 pf->hw.aq.asq_last_status));
10234 /* The main driver is (mostly) up and happy. We need to set this state
10235 * before setting up the misc vector or we get a race and the vector
10236 * ends up disabled forever.
10238 clear_bit(__I40E_DOWN, &pf->state);
10240 /* In case of MSIX we are going to setup the misc vector right here
10241 * to handle admin queue events etc. In case of legacy and MSI
10242 * the misc functionality and queue processing is combined in
10243 * the same vector and that gets setup at open.
10245 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10246 err = i40e_setup_misc_vector(pf);
10248 dev_info(&pdev->dev,
10249 "setup of misc vector failed: %d\n", err);
10254 #ifdef CONFIG_PCI_IOV
10255 /* prep for VF support */
10256 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10257 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10258 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10261 /* disable link interrupts for VFs */
10262 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10263 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10264 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10267 if (pci_num_vf(pdev)) {
10268 dev_info(&pdev->dev,
10269 "Active VFs found, allocating resources.\n");
10270 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10272 dev_info(&pdev->dev,
10273 "Error %d allocating resources for existing VFs\n",
10277 #endif /* CONFIG_PCI_IOV */
10281 i40e_dbg_pf_init(pf);
10283 /* tell the firmware that we're starting */
10284 i40e_send_version(pf);
10286 /* since everything's happy, start the service_task timer */
10287 mod_timer(&pf->service_timer,
10288 round_jiffies(jiffies + pf->service_timer_period));
10291 /* create FCoE interface */
10292 i40e_fcoe_vsi_setup(pf);
10295 /* Get the negotiated link width and speed from PCI config space */
10296 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10298 i40e_set_pci_config_data(hw, link_status);
10300 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10301 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10302 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10303 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10305 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10306 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10307 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10308 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10311 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10312 hw->bus.speed < i40e_bus_speed_8000) {
10313 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10314 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10317 /* get the requested speeds from the fw */
10318 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10320 dev_info(&pf->pdev->dev,
10321 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10322 i40e_stat_str(&pf->hw, err),
10323 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10324 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10326 /* print a string summarizing features */
10327 i40e_print_features(pf);
10331 /* Unwind what we've done if something failed in the setup */
10333 set_bit(__I40E_DOWN, &pf->state);
10334 i40e_clear_interrupt_scheme(pf);
10337 i40e_reset_interrupt_capability(pf);
10338 del_timer_sync(&pf->service_timer);
10340 err_configure_lan_hmc:
10341 (void)i40e_shutdown_lan_hmc(hw);
10343 kfree(pf->qp_pile);
10346 (void)i40e_shutdown_adminq(hw);
10348 iounmap(hw->hw_addr);
10352 pci_disable_pcie_error_reporting(pdev);
10353 pci_release_selected_regions(pdev,
10354 pci_select_bars(pdev, IORESOURCE_MEM));
10357 pci_disable_device(pdev);
10362 * i40e_remove - Device removal routine
10363 * @pdev: PCI device information struct
10365 * i40e_remove is called by the PCI subsystem to alert the driver
10366 * that is should release a PCI device. This could be caused by a
10367 * Hot-Plug event, or because the driver is going to be removed from
10370 static void i40e_remove(struct pci_dev *pdev)
10372 struct i40e_pf *pf = pci_get_drvdata(pdev);
10373 i40e_status ret_code;
10376 i40e_dbg_pf_exit(pf);
10380 /* no more scheduling of any task */
10381 set_bit(__I40E_DOWN, &pf->state);
10382 del_timer_sync(&pf->service_timer);
10383 cancel_work_sync(&pf->service_task);
10384 i40e_fdir_teardown(pf);
10386 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10388 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10391 i40e_fdir_teardown(pf);
10393 /* If there is a switch structure or any orphans, remove them.
10394 * This will leave only the PF's VSI remaining.
10396 for (i = 0; i < I40E_MAX_VEB; i++) {
10400 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10401 pf->veb[i]->uplink_seid == 0)
10402 i40e_switch_branch_release(pf->veb[i]);
10405 /* Now we can shutdown the PF's VSI, just before we kill
10408 if (pf->vsi[pf->lan_vsi])
10409 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10411 /* shutdown and destroy the HMC */
10412 if (pf->hw.hmc.hmc_obj) {
10413 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10415 dev_warn(&pdev->dev,
10416 "Failed to destroy the HMC resources: %d\n",
10420 /* shutdown the adminq */
10421 ret_code = i40e_shutdown_adminq(&pf->hw);
10423 dev_warn(&pdev->dev,
10424 "Failed to destroy the Admin Queue resources: %d\n",
10427 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10428 i40e_clear_interrupt_scheme(pf);
10429 for (i = 0; i < pf->num_alloc_vsi; i++) {
10431 i40e_vsi_clear_rings(pf->vsi[i]);
10432 i40e_vsi_clear(pf->vsi[i]);
10437 for (i = 0; i < I40E_MAX_VEB; i++) {
10442 kfree(pf->qp_pile);
10445 iounmap(pf->hw.hw_addr);
10447 pci_release_selected_regions(pdev,
10448 pci_select_bars(pdev, IORESOURCE_MEM));
10450 pci_disable_pcie_error_reporting(pdev);
10451 pci_disable_device(pdev);
10455 * i40e_pci_error_detected - warning that something funky happened in PCI land
10456 * @pdev: PCI device information struct
10458 * Called to warn that something happened and the error handling steps
10459 * are in progress. Allows the driver to quiesce things, be ready for
10462 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10463 enum pci_channel_state error)
10465 struct i40e_pf *pf = pci_get_drvdata(pdev);
10467 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10469 /* shutdown all operations */
10470 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10472 i40e_prep_for_reset(pf);
10476 /* Request a slot reset */
10477 return PCI_ERS_RESULT_NEED_RESET;
10481 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10482 * @pdev: PCI device information struct
10484 * Called to find if the driver can work with the device now that
10485 * the pci slot has been reset. If a basic connection seems good
10486 * (registers are readable and have sane content) then return a
10487 * happy little PCI_ERS_RESULT_xxx.
10489 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10491 struct i40e_pf *pf = pci_get_drvdata(pdev);
10492 pci_ers_result_t result;
10496 dev_dbg(&pdev->dev, "%s\n", __func__);
10497 if (pci_enable_device_mem(pdev)) {
10498 dev_info(&pdev->dev,
10499 "Cannot re-enable PCI device after reset.\n");
10500 result = PCI_ERS_RESULT_DISCONNECT;
10502 pci_set_master(pdev);
10503 pci_restore_state(pdev);
10504 pci_save_state(pdev);
10505 pci_wake_from_d3(pdev, false);
10507 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10509 result = PCI_ERS_RESULT_RECOVERED;
10511 result = PCI_ERS_RESULT_DISCONNECT;
10514 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10516 dev_info(&pdev->dev,
10517 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10519 /* non-fatal, continue */
10526 * i40e_pci_error_resume - restart operations after PCI error recovery
10527 * @pdev: PCI device information struct
10529 * Called to allow the driver to bring things back up after PCI error
10530 * and/or reset recovery has finished.
10532 static void i40e_pci_error_resume(struct pci_dev *pdev)
10534 struct i40e_pf *pf = pci_get_drvdata(pdev);
10536 dev_dbg(&pdev->dev, "%s\n", __func__);
10537 if (test_bit(__I40E_SUSPENDED, &pf->state))
10541 i40e_handle_reset_warning(pf);
10546 * i40e_shutdown - PCI callback for shutting down
10547 * @pdev: PCI device information struct
10549 static void i40e_shutdown(struct pci_dev *pdev)
10551 struct i40e_pf *pf = pci_get_drvdata(pdev);
10552 struct i40e_hw *hw = &pf->hw;
10554 set_bit(__I40E_SUSPENDED, &pf->state);
10555 set_bit(__I40E_DOWN, &pf->state);
10557 i40e_prep_for_reset(pf);
10560 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10561 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10563 del_timer_sync(&pf->service_timer);
10564 cancel_work_sync(&pf->service_task);
10565 i40e_fdir_teardown(pf);
10568 i40e_prep_for_reset(pf);
10571 wr32(hw, I40E_PFPM_APM,
10572 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10573 wr32(hw, I40E_PFPM_WUFC,
10574 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10576 i40e_clear_interrupt_scheme(pf);
10578 if (system_state == SYSTEM_POWER_OFF) {
10579 pci_wake_from_d3(pdev, pf->wol_en);
10580 pci_set_power_state(pdev, PCI_D3hot);
10586 * i40e_suspend - PCI callback for moving to D3
10587 * @pdev: PCI device information struct
10589 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10591 struct i40e_pf *pf = pci_get_drvdata(pdev);
10592 struct i40e_hw *hw = &pf->hw;
10594 set_bit(__I40E_SUSPENDED, &pf->state);
10595 set_bit(__I40E_DOWN, &pf->state);
10598 i40e_prep_for_reset(pf);
10601 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10602 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10604 pci_wake_from_d3(pdev, pf->wol_en);
10605 pci_set_power_state(pdev, PCI_D3hot);
10611 * i40e_resume - PCI callback for waking up from D3
10612 * @pdev: PCI device information struct
10614 static int i40e_resume(struct pci_dev *pdev)
10616 struct i40e_pf *pf = pci_get_drvdata(pdev);
10619 pci_set_power_state(pdev, PCI_D0);
10620 pci_restore_state(pdev);
10621 /* pci_restore_state() clears dev->state_saves, so
10622 * call pci_save_state() again to restore it.
10624 pci_save_state(pdev);
10626 err = pci_enable_device_mem(pdev);
10628 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
10631 pci_set_master(pdev);
10633 /* no wakeup events while running */
10634 pci_wake_from_d3(pdev, false);
10636 /* handling the reset will rebuild the device state */
10637 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10638 clear_bit(__I40E_DOWN, &pf->state);
10640 i40e_reset_and_rebuild(pf, false);
10648 static const struct pci_error_handlers i40e_err_handler = {
10649 .error_detected = i40e_pci_error_detected,
10650 .slot_reset = i40e_pci_error_slot_reset,
10651 .resume = i40e_pci_error_resume,
10654 static struct pci_driver i40e_driver = {
10655 .name = i40e_driver_name,
10656 .id_table = i40e_pci_tbl,
10657 .probe = i40e_probe,
10658 .remove = i40e_remove,
10660 .suspend = i40e_suspend,
10661 .resume = i40e_resume,
10663 .shutdown = i40e_shutdown,
10664 .err_handler = &i40e_err_handler,
10665 .sriov_configure = i40e_pci_sriov_configure,
10669 * i40e_init_module - Driver registration routine
10671 * i40e_init_module is the first routine called when the driver is
10672 * loaded. All it does is register with the PCI subsystem.
10674 static int __init i40e_init_module(void)
10676 pr_info("%s: %s - version %s\n", i40e_driver_name,
10677 i40e_driver_string, i40e_driver_version_str);
10678 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10681 return pci_register_driver(&i40e_driver);
10683 module_init(i40e_init_module);
10686 * i40e_exit_module - Driver exit cleanup routine
10688 * i40e_exit_module is called just before the driver is removed
10691 static void __exit i40e_exit_module(void)
10693 pci_unregister_driver(&i40e_driver);
10696 module_exit(i40e_exit_module);