1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 28
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
148 mem->va = kzalloc(size, GFP_KERNEL);
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
163 /* it's ok to kfree a NULL pointer */
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
178 * Returns the base item index of the lump, or negative for error
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
217 pile->search_hint = i + j;
221 /* not enough, so skip over it and continue looking */
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
234 * Returns the count of items in the lump
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
238 int valid_id = (id | I40E_PILE_VALID_BIT);
242 if (!pile || index >= pile->num_entries)
246 i < pile->num_entries && pile->list[i] == valid_id;
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
278 * If not already scheduled, this puts the task into the work queue
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
297 void i40e_tx_timeout(struct net_device *netdev)
299 static void i40e_tx_timeout(struct net_device *netdev)
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
309 pf->tx_timeout_count++;
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
320 (trans_start + netdev->watchdog_timeo))) {
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
367 switch (pf->tx_timeout_recovery_level) {
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
393 rx_ring->next_to_use = val;
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
401 writel(val, rx_ring->tail);
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
413 return &vsi->net_stats;
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
439 if (test_bit(__I40E_DOWN, &vsi->state))
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
493 struct rtnl_link_stats64 *ns;
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
516 vsi->stat_offsets_loaded = false;
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
531 for (i = 0; i < I40E_MAX_VEB; i++) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
566 new_data = rd64(hw, loreg);
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
590 new_data = rd32(hw, reg);
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
678 idx = veb->stats_idx;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
740 veb->stat_offsets_loaded = true;
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
756 if (vsi->type != I40E_VSI_FCOE)
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
788 vsi->fcoe_stat_offsets_loaded = true;
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
836 dcb_cfg = &hw->local_dcbx_config;
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
847 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
848 pf->stat_offsets_loaded,
849 &osd->priority_xoff_rx[i],
850 &nsd->priority_xoff_rx[i]);
852 /* No new PFC xoff rx */
853 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
855 /* Get the TC for given priority */
856 tc = dcb_cfg->etscfg.prioritytable[i];
862 * i40e_update_vsi_stats - Update the vsi statistics counters.
863 * @vsi: the VSI to be updated
865 * There are a few instances where we store the same stat in a
866 * couple of different structs. This is partly because we have
867 * the netdev stats that need to be filled out, which is slightly
868 * different from the "eth_stats" defined by the chip and used in
869 * VF communications. We sort it out here.
871 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
873 struct i40e_pf *pf = vsi->back;
874 struct rtnl_link_stats64 *ons;
875 struct rtnl_link_stats64 *ns; /* netdev stats */
876 struct i40e_eth_stats *oes;
877 struct i40e_eth_stats *es; /* device's eth stats */
878 u32 tx_restart, tx_busy;
888 if (test_bit(__I40E_DOWN, &vsi->state) ||
889 test_bit(__I40E_CONFIG_BUSY, &pf->state))
892 ns = i40e_get_vsi_stats_struct(vsi);
893 ons = &vsi->net_stats_offsets;
894 es = &vsi->eth_stats;
895 oes = &vsi->eth_stats_offsets;
897 /* Gather up the netdev and vsi stats that the driver collects
898 * on the fly during packet processing
902 tx_restart = tx_busy = tx_linearize = 0;
906 for (q = 0; q < vsi->num_queue_pairs; q++) {
908 p = ACCESS_ONCE(vsi->tx_rings[q]);
911 start = u64_stats_fetch_begin_irq(&p->syncp);
912 packets = p->stats.packets;
913 bytes = p->stats.bytes;
914 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
917 tx_restart += p->tx_stats.restart_queue;
918 tx_busy += p->tx_stats.tx_busy;
919 tx_linearize += p->tx_stats.tx_linearize;
921 /* Rx queue is part of the same block as Tx queue */
924 start = u64_stats_fetch_begin_irq(&p->syncp);
925 packets = p->stats.packets;
926 bytes = p->stats.bytes;
927 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
930 rx_buf += p->rx_stats.alloc_buff_failed;
931 rx_page += p->rx_stats.alloc_page_failed;
934 vsi->tx_restart = tx_restart;
935 vsi->tx_busy = tx_busy;
936 vsi->tx_linearize = tx_linearize;
937 vsi->rx_page_failed = rx_page;
938 vsi->rx_buf_failed = rx_buf;
940 ns->rx_packets = rx_p;
942 ns->tx_packets = tx_p;
945 /* update netdev stats from eth stats */
946 i40e_update_eth_stats(vsi);
947 ons->tx_errors = oes->tx_errors;
948 ns->tx_errors = es->tx_errors;
949 ons->multicast = oes->rx_multicast;
950 ns->multicast = es->rx_multicast;
951 ons->rx_dropped = oes->rx_discards;
952 ns->rx_dropped = es->rx_discards;
953 ons->tx_dropped = oes->tx_discards;
954 ns->tx_dropped = es->tx_discards;
956 /* pull in a couple PF stats if this is the main vsi */
957 if (vsi == pf->vsi[pf->lan_vsi]) {
958 ns->rx_crc_errors = pf->stats.crc_errors;
959 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
960 ns->rx_length_errors = pf->stats.rx_length_errors;
965 * i40e_update_pf_stats - Update the PF statistics counters.
966 * @pf: the PF to be updated
968 static void i40e_update_pf_stats(struct i40e_pf *pf)
970 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
971 struct i40e_hw_port_stats *nsd = &pf->stats;
972 struct i40e_hw *hw = &pf->hw;
976 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
977 I40E_GLPRT_GORCL(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
980 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
981 I40E_GLPRT_GOTCL(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
984 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
985 pf->stat_offsets_loaded,
986 &osd->eth.rx_discards,
987 &nsd->eth.rx_discards);
988 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
989 I40E_GLPRT_UPRCL(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->eth.rx_unicast,
992 &nsd->eth.rx_unicast);
993 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
994 I40E_GLPRT_MPRCL(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->eth.rx_multicast,
997 &nsd->eth.rx_multicast);
998 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
999 I40E_GLPRT_BPRCL(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->eth.rx_broadcast,
1002 &nsd->eth.rx_broadcast);
1003 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1004 I40E_GLPRT_UPTCL(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->eth.tx_unicast,
1007 &nsd->eth.tx_unicast);
1008 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1009 I40E_GLPRT_MPTCL(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->eth.tx_multicast,
1012 &nsd->eth.tx_multicast);
1013 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1014 I40E_GLPRT_BPTCL(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->eth.tx_broadcast,
1017 &nsd->eth.tx_broadcast);
1019 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->tx_dropped_link_down,
1022 &nsd->tx_dropped_link_down);
1024 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->crc_errors, &nsd->crc_errors);
1028 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->illegal_bytes, &nsd->illegal_bytes);
1032 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->mac_local_faults,
1035 &nsd->mac_local_faults);
1036 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->mac_remote_faults,
1039 &nsd->mac_remote_faults);
1041 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->rx_length_errors,
1044 &nsd->rx_length_errors);
1046 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->link_xon_rx, &nsd->link_xon_rx);
1049 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->link_xon_tx, &nsd->link_xon_tx);
1052 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1053 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1054 pf->stat_offsets_loaded,
1055 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1057 for (i = 0; i < 8; i++) {
1058 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1059 pf->stat_offsets_loaded,
1060 &osd->priority_xon_rx[i],
1061 &nsd->priority_xon_rx[i]);
1062 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1063 pf->stat_offsets_loaded,
1064 &osd->priority_xon_tx[i],
1065 &nsd->priority_xon_tx[i]);
1066 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1067 pf->stat_offsets_loaded,
1068 &osd->priority_xoff_tx[i],
1069 &nsd->priority_xoff_tx[i]);
1070 i40e_stat_update32(hw,
1071 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1072 pf->stat_offsets_loaded,
1073 &osd->priority_xon_2_xoff[i],
1074 &nsd->priority_xon_2_xoff[i]);
1077 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1078 I40E_GLPRT_PRC64L(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_size_64, &nsd->rx_size_64);
1081 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1082 I40E_GLPRT_PRC127L(hw->port),
1083 pf->stat_offsets_loaded,
1084 &osd->rx_size_127, &nsd->rx_size_127);
1085 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1086 I40E_GLPRT_PRC255L(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_size_255, &nsd->rx_size_255);
1089 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1090 I40E_GLPRT_PRC511L(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->rx_size_511, &nsd->rx_size_511);
1093 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1094 I40E_GLPRT_PRC1023L(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_size_1023, &nsd->rx_size_1023);
1097 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1098 I40E_GLPRT_PRC1522L(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->rx_size_1522, &nsd->rx_size_1522);
1101 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1102 I40E_GLPRT_PRC9522L(hw->port),
1103 pf->stat_offsets_loaded,
1104 &osd->rx_size_big, &nsd->rx_size_big);
1106 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1107 I40E_GLPRT_PTC64L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->tx_size_64, &nsd->tx_size_64);
1110 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1111 I40E_GLPRT_PTC127L(hw->port),
1112 pf->stat_offsets_loaded,
1113 &osd->tx_size_127, &nsd->tx_size_127);
1114 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1115 I40E_GLPRT_PTC255L(hw->port),
1116 pf->stat_offsets_loaded,
1117 &osd->tx_size_255, &nsd->tx_size_255);
1118 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1119 I40E_GLPRT_PTC511L(hw->port),
1120 pf->stat_offsets_loaded,
1121 &osd->tx_size_511, &nsd->tx_size_511);
1122 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1123 I40E_GLPRT_PTC1023L(hw->port),
1124 pf->stat_offsets_loaded,
1125 &osd->tx_size_1023, &nsd->tx_size_1023);
1126 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1127 I40E_GLPRT_PTC1522L(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->tx_size_1522, &nsd->tx_size_1522);
1130 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1131 I40E_GLPRT_PTC9522L(hw->port),
1132 pf->stat_offsets_loaded,
1133 &osd->tx_size_big, &nsd->tx_size_big);
1135 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1136 pf->stat_offsets_loaded,
1137 &osd->rx_undersize, &nsd->rx_undersize);
1138 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1139 pf->stat_offsets_loaded,
1140 &osd->rx_fragments, &nsd->rx_fragments);
1141 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1142 pf->stat_offsets_loaded,
1143 &osd->rx_oversize, &nsd->rx_oversize);
1144 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1145 pf->stat_offsets_loaded,
1146 &osd->rx_jabber, &nsd->rx_jabber);
1149 i40e_stat_update32(hw,
1150 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1151 pf->stat_offsets_loaded,
1152 &osd->fd_atr_match, &nsd->fd_atr_match);
1153 i40e_stat_update32(hw,
1154 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1155 pf->stat_offsets_loaded,
1156 &osd->fd_sb_match, &nsd->fd_sb_match);
1157 i40e_stat_update32(hw,
1158 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1159 pf->stat_offsets_loaded,
1160 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1162 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1163 nsd->tx_lpi_status =
1164 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1165 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1166 nsd->rx_lpi_status =
1167 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1168 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1169 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1170 pf->stat_offsets_loaded,
1171 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1172 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1173 pf->stat_offsets_loaded,
1174 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1176 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1177 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1178 nsd->fd_sb_status = true;
1180 nsd->fd_sb_status = false;
1182 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1183 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1184 nsd->fd_atr_status = true;
1186 nsd->fd_atr_status = false;
1188 pf->stat_offsets_loaded = true;
1192 * i40e_update_stats - Update the various statistics counters.
1193 * @vsi: the VSI to be updated
1195 * Update the various stats for this VSI and its related entities.
1197 void i40e_update_stats(struct i40e_vsi *vsi)
1199 struct i40e_pf *pf = vsi->back;
1201 if (vsi == pf->vsi[pf->lan_vsi])
1202 i40e_update_pf_stats(pf);
1204 i40e_update_vsi_stats(vsi);
1206 i40e_update_fcoe_stats(vsi);
1211 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1212 * @vsi: the VSI to be searched
1213 * @macaddr: the MAC address
1215 * @is_vf: make sure its a VF filter, else doesn't matter
1216 * @is_netdev: make sure its a netdev filter, else doesn't matter
1218 * Returns ptr to the filter object or NULL
1220 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1221 u8 *macaddr, s16 vlan,
1222 bool is_vf, bool is_netdev)
1224 struct i40e_mac_filter *f;
1226 if (!vsi || !macaddr)
1229 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1230 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1231 (vlan == f->vlan) &&
1232 (!is_vf || f->is_vf) &&
1233 (!is_netdev || f->is_netdev))
1240 * i40e_find_mac - Find a mac addr in the macvlan filters list
1241 * @vsi: the VSI to be searched
1242 * @macaddr: the MAC address we are searching for
1243 * @is_vf: make sure its a VF filter, else doesn't matter
1244 * @is_netdev: make sure its a netdev filter, else doesn't matter
1246 * Returns the first filter with the provided MAC address or NULL if
1247 * MAC address was not found
1249 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1250 bool is_vf, bool is_netdev)
1252 struct i40e_mac_filter *f;
1254 if (!vsi || !macaddr)
1257 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1258 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1259 (!is_vf || f->is_vf) &&
1260 (!is_netdev || f->is_netdev))
1267 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1268 * @vsi: the VSI to be searched
1270 * Returns true if VSI is in vlan mode or false otherwise
1272 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1274 struct i40e_mac_filter *f;
1276 /* Only -1 for all the filters denotes not in vlan mode
1277 * so we have to go through all the list in order to make sure
1279 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1280 if (f->vlan >= 0 || vsi->info.pvid)
1288 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1289 * @vsi: the VSI to be searched
1290 * @macaddr: the mac address to be filtered
1291 * @is_vf: true if it is a VF
1292 * @is_netdev: true if it is a netdev
1294 * Goes through all the macvlan filters and adds a
1295 * macvlan filter for each unique vlan that already exists
1297 * Returns first filter found on success, else NULL
1299 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1300 bool is_vf, bool is_netdev)
1302 struct i40e_mac_filter *f;
1304 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1306 f->vlan = le16_to_cpu(vsi->info.pvid);
1307 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1308 is_vf, is_netdev)) {
1309 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1315 return list_first_entry_or_null(&vsi->mac_filter_list,
1316 struct i40e_mac_filter, list);
1320 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1321 * @vsi: the PF Main VSI - inappropriate for any other VSI
1322 * @macaddr: the MAC address
1324 * Some older firmware configurations set up a default promiscuous VLAN
1325 * filter that needs to be removed.
1327 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1329 struct i40e_aqc_remove_macvlan_element_data element;
1330 struct i40e_pf *pf = vsi->back;
1333 /* Only appropriate for the PF main VSI */
1334 if (vsi->type != I40E_VSI_MAIN)
1337 memset(&element, 0, sizeof(element));
1338 ether_addr_copy(element.mac_addr, macaddr);
1339 element.vlan_tag = 0;
1340 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1341 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1342 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1350 * i40e_add_filter - Add a mac/vlan filter to the VSI
1351 * @vsi: the VSI to be searched
1352 * @macaddr: the MAC address
1354 * @is_vf: make sure its a VF filter, else doesn't matter
1355 * @is_netdev: make sure its a netdev filter, else doesn't matter
1357 * Returns ptr to the filter object or NULL when no memory available.
1359 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1360 u8 *macaddr, s16 vlan,
1361 bool is_vf, bool is_netdev)
1363 struct i40e_mac_filter *f;
1365 if (!vsi || !macaddr)
1368 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1370 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1372 goto add_filter_out;
1374 ether_addr_copy(f->macaddr, macaddr);
1378 INIT_LIST_HEAD(&f->list);
1379 list_add(&f->list, &vsi->mac_filter_list);
1382 /* increment counter and add a new flag if needed */
1388 } else if (is_netdev) {
1389 if (!f->is_netdev) {
1390 f->is_netdev = true;
1397 /* changed tells sync_filters_subtask to
1398 * push the filter down to the firmware
1401 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1402 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1410 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1411 * @vsi: the VSI to be searched
1412 * @macaddr: the MAC address
1414 * @is_vf: make sure it's a VF filter, else doesn't matter
1415 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1417 void i40e_del_filter(struct i40e_vsi *vsi,
1418 u8 *macaddr, s16 vlan,
1419 bool is_vf, bool is_netdev)
1421 struct i40e_mac_filter *f;
1423 if (!vsi || !macaddr)
1426 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1427 if (!f || f->counter == 0)
1435 } else if (is_netdev) {
1437 f->is_netdev = false;
1441 /* make sure we don't remove a filter in use by VF or netdev */
1444 min_f += (f->is_vf ? 1 : 0);
1445 min_f += (f->is_netdev ? 1 : 0);
1447 if (f->counter > min_f)
1451 /* counter == 0 tells sync_filters_subtask to
1452 * remove the filter from the firmware's list
1454 if (f->counter == 0) {
1456 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1457 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1462 * i40e_set_mac - NDO callback to set mac address
1463 * @netdev: network interface device structure
1464 * @p: pointer to an address structure
1466 * Returns 0 on success, negative on failure
1469 int i40e_set_mac(struct net_device *netdev, void *p)
1471 static int i40e_set_mac(struct net_device *netdev, void *p)
1474 struct i40e_netdev_priv *np = netdev_priv(netdev);
1475 struct i40e_vsi *vsi = np->vsi;
1476 struct i40e_pf *pf = vsi->back;
1477 struct i40e_hw *hw = &pf->hw;
1478 struct sockaddr *addr = p;
1479 struct i40e_mac_filter *f;
1481 if (!is_valid_ether_addr(addr->sa_data))
1482 return -EADDRNOTAVAIL;
1484 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1485 netdev_info(netdev, "already using mac address %pM\n",
1490 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1491 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1492 return -EADDRNOTAVAIL;
1494 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1495 netdev_info(netdev, "returning to hw mac address %pM\n",
1498 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1500 if (vsi->type == I40E_VSI_MAIN) {
1503 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1504 I40E_AQC_WRITE_TYPE_LAA_WOL,
1505 addr->sa_data, NULL);
1508 "Addr change for Main VSI failed: %d\n",
1510 return -EADDRNOTAVAIL;
1514 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1515 struct i40e_aqc_remove_macvlan_element_data element;
1517 memset(&element, 0, sizeof(element));
1518 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1519 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1520 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1522 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1526 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1527 struct i40e_aqc_add_macvlan_element_data element;
1529 memset(&element, 0, sizeof(element));
1530 ether_addr_copy(element.mac_addr, hw->mac.addr);
1531 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1532 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1534 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1540 i40e_sync_vsi_filters(vsi, false);
1541 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1547 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1548 * @vsi: the VSI being setup
1549 * @ctxt: VSI context structure
1550 * @enabled_tc: Enabled TCs bitmap
1551 * @is_add: True if called before Add VSI
1553 * Setup VSI queue mapping for enabled traffic classes.
1556 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1557 struct i40e_vsi_context *ctxt,
1561 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1562 struct i40e_vsi_context *ctxt,
1567 struct i40e_pf *pf = vsi->back;
1577 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1580 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1581 /* Find numtc from enabled TC bitmap */
1582 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1583 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1587 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1591 /* At least TC0 is enabled in case of non-DCB case */
1595 vsi->tc_config.numtc = numtc;
1596 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1597 /* Number of queues per enabled TC */
1598 /* In MFP case we can have a much lower count of MSIx
1599 * vectors available and so we need to lower the used
1602 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1603 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1605 qcount = vsi->alloc_queue_pairs;
1606 num_tc_qps = qcount / numtc;
1607 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1609 /* Setup queue offset/count for all TCs for given VSI */
1610 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1611 /* See if the given TC is enabled for the given VSI */
1612 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1616 switch (vsi->type) {
1618 qcount = min_t(int, pf->rss_size, num_tc_qps);
1622 qcount = num_tc_qps;
1626 case I40E_VSI_SRIOV:
1627 case I40E_VSI_VMDQ2:
1629 qcount = num_tc_qps;
1633 vsi->tc_config.tc_info[i].qoffset = offset;
1634 vsi->tc_config.tc_info[i].qcount = qcount;
1636 /* find the next higher power-of-2 of num queue pairs */
1639 while (num_qps && (BIT_ULL(pow) < qcount)) {
1644 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1646 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1647 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1651 /* TC is not enabled so set the offset to
1652 * default queue and allocate one queue
1655 vsi->tc_config.tc_info[i].qoffset = 0;
1656 vsi->tc_config.tc_info[i].qcount = 1;
1657 vsi->tc_config.tc_info[i].netdev_tc = 0;
1661 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1664 /* Set actual Tx/Rx queue pairs */
1665 vsi->num_queue_pairs = offset;
1666 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1667 if (vsi->req_queue_pairs > 0)
1668 vsi->num_queue_pairs = vsi->req_queue_pairs;
1669 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1670 vsi->num_queue_pairs = pf->num_lan_msix;
1673 /* Scheduler section valid can only be set for ADD VSI */
1675 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1677 ctxt->info.up_enable_bits = enabled_tc;
1679 if (vsi->type == I40E_VSI_SRIOV) {
1680 ctxt->info.mapping_flags |=
1681 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1682 for (i = 0; i < vsi->num_queue_pairs; i++)
1683 ctxt->info.queue_mapping[i] =
1684 cpu_to_le16(vsi->base_queue + i);
1686 ctxt->info.mapping_flags |=
1687 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1688 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1690 ctxt->info.valid_sections |= cpu_to_le16(sections);
1694 * i40e_set_rx_mode - NDO callback to set the netdev filters
1695 * @netdev: network interface device structure
1698 void i40e_set_rx_mode(struct net_device *netdev)
1700 static void i40e_set_rx_mode(struct net_device *netdev)
1703 struct i40e_netdev_priv *np = netdev_priv(netdev);
1704 struct i40e_mac_filter *f, *ftmp;
1705 struct i40e_vsi *vsi = np->vsi;
1706 struct netdev_hw_addr *uca;
1707 struct netdev_hw_addr *mca;
1708 struct netdev_hw_addr *ha;
1710 /* add addr if not already in the filter list */
1711 netdev_for_each_uc_addr(uca, netdev) {
1712 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1713 if (i40e_is_vsi_in_vlan(vsi))
1714 i40e_put_mac_in_vlan(vsi, uca->addr,
1717 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1722 netdev_for_each_mc_addr(mca, netdev) {
1723 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1724 if (i40e_is_vsi_in_vlan(vsi))
1725 i40e_put_mac_in_vlan(vsi, mca->addr,
1728 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1733 /* remove filter if not in netdev list */
1734 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1739 netdev_for_each_mc_addr(mca, netdev)
1740 if (ether_addr_equal(mca->addr, f->macaddr))
1741 goto bottom_of_search_loop;
1743 netdev_for_each_uc_addr(uca, netdev)
1744 if (ether_addr_equal(uca->addr, f->macaddr))
1745 goto bottom_of_search_loop;
1747 for_each_dev_addr(netdev, ha)
1748 if (ether_addr_equal(ha->addr, f->macaddr))
1749 goto bottom_of_search_loop;
1751 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1752 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1754 bottom_of_search_loop:
1758 /* check for other flag changes */
1759 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1760 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1761 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1766 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1767 * @vsi: ptr to the VSI
1768 * @grab_rtnl: whether RTNL needs to be grabbed
1770 * Push any outstanding VSI filter changes through the AdminQ.
1772 * Returns 0 or error value
1774 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1776 struct i40e_mac_filter *f, *ftmp;
1777 bool promisc_forced_on = false;
1778 bool add_happened = false;
1779 int filter_list_len = 0;
1780 u32 changed_flags = 0;
1781 i40e_status ret = 0;
1788 /* empty array typed pointers, kcalloc later */
1789 struct i40e_aqc_add_macvlan_element_data *add_list;
1790 struct i40e_aqc_remove_macvlan_element_data *del_list;
1792 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1793 usleep_range(1000, 2000);
1797 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1798 vsi->current_netdev_flags = vsi->netdev->flags;
1801 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1802 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1804 filter_list_len = pf->hw.aq.asq_buf_size /
1805 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1806 del_list = kcalloc(filter_list_len,
1807 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1812 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1816 if (f->counter != 0)
1821 /* add to delete list */
1822 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1823 del_list[num_del].vlan_tag =
1824 cpu_to_le16((u16)(f->vlan ==
1825 I40E_VLAN_ANY ? 0 : f->vlan));
1827 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1828 del_list[num_del].flags = cmd_flags;
1831 /* unlink from filter list */
1835 /* flush a full buffer */
1836 if (num_del == filter_list_len) {
1837 ret = i40e_aq_remove_macvlan(&pf->hw,
1838 vsi->seid, del_list, num_del,
1840 aq_err = pf->hw.aq.asq_last_status;
1842 memset(del_list, 0, sizeof(*del_list));
1844 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1845 dev_info(&pf->pdev->dev,
1846 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1847 i40e_stat_str(&pf->hw, ret),
1848 i40e_aq_str(&pf->hw, aq_err));
1852 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1853 del_list, num_del, NULL);
1854 aq_err = pf->hw.aq.asq_last_status;
1857 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1858 dev_info(&pf->pdev->dev,
1859 "ignoring delete macvlan error, err %s aq_err %s\n",
1860 i40e_stat_str(&pf->hw, ret),
1861 i40e_aq_str(&pf->hw, aq_err));
1867 /* do all the adds now */
1868 filter_list_len = pf->hw.aq.asq_buf_size /
1869 sizeof(struct i40e_aqc_add_macvlan_element_data),
1870 add_list = kcalloc(filter_list_len,
1871 sizeof(struct i40e_aqc_add_macvlan_element_data),
1876 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1880 if (f->counter == 0)
1883 add_happened = true;
1886 /* add to add array */
1887 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1888 add_list[num_add].vlan_tag =
1890 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1891 add_list[num_add].queue_number = 0;
1893 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1894 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1897 /* flush a full buffer */
1898 if (num_add == filter_list_len) {
1899 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1902 aq_err = pf->hw.aq.asq_last_status;
1907 memset(add_list, 0, sizeof(*add_list));
1911 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1912 add_list, num_add, NULL);
1913 aq_err = pf->hw.aq.asq_last_status;
1919 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1920 dev_info(&pf->pdev->dev,
1921 "add filter failed, err %s aq_err %s\n",
1922 i40e_stat_str(&pf->hw, ret),
1923 i40e_aq_str(&pf->hw, aq_err));
1924 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1925 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1927 promisc_forced_on = true;
1928 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1930 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1935 /* check for changes in promiscuous modes */
1936 if (changed_flags & IFF_ALLMULTI) {
1937 bool cur_multipromisc;
1939 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1940 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1945 dev_info(&pf->pdev->dev,
1946 "set multi promisc failed, err %s aq_err %s\n",
1947 i40e_stat_str(&pf->hw, ret),
1948 i40e_aq_str(&pf->hw,
1949 pf->hw.aq.asq_last_status));
1951 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1954 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1955 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1957 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1958 /* set defport ON for Main VSI instead of true promisc
1959 * this way we will get all unicast/multicast and VLAN
1960 * promisc behavior but will not get VF or VMDq traffic
1961 * replicated on the Main VSI.
1963 if (pf->cur_promisc != cur_promisc) {
1964 pf->cur_promisc = cur_promisc;
1966 i40e_do_reset_safe(pf,
1967 BIT(__I40E_PF_RESET_REQUESTED));
1970 BIT(__I40E_PF_RESET_REQUESTED));
1973 ret = i40e_aq_set_vsi_unicast_promiscuous(
1978 dev_info(&pf->pdev->dev,
1979 "set unicast promisc failed, err %d, aq_err %d\n",
1980 ret, pf->hw.aq.asq_last_status);
1981 ret = i40e_aq_set_vsi_multicast_promiscuous(
1986 dev_info(&pf->pdev->dev,
1987 "set multicast promisc failed, err %d, aq_err %d\n",
1988 ret, pf->hw.aq.asq_last_status);
1990 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1994 dev_info(&pf->pdev->dev,
1995 "set brdcast promisc failed, err %s, aq_err %s\n",
1996 i40e_stat_str(&pf->hw, ret),
1997 i40e_aq_str(&pf->hw,
1998 pf->hw.aq.asq_last_status));
2001 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2006 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2007 * @pf: board private structure
2009 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2013 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2015 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2017 for (v = 0; v < pf->num_alloc_vsi; v++) {
2019 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2020 i40e_sync_vsi_filters(pf->vsi[v], true);
2025 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2026 * @netdev: network interface device structure
2027 * @new_mtu: new value for maximum frame size
2029 * Returns 0 on success, negative on failure
2031 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2033 struct i40e_netdev_priv *np = netdev_priv(netdev);
2034 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2035 struct i40e_vsi *vsi = np->vsi;
2037 /* MTU < 68 is an error and causes problems on some kernels */
2038 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2041 netdev_info(netdev, "changing MTU from %d to %d\n",
2042 netdev->mtu, new_mtu);
2043 netdev->mtu = new_mtu;
2044 if (netif_running(netdev))
2045 i40e_vsi_reinit_locked(vsi);
2051 * i40e_ioctl - Access the hwtstamp interface
2052 * @netdev: network interface device structure
2053 * @ifr: interface request data
2054 * @cmd: ioctl command
2056 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2058 struct i40e_netdev_priv *np = netdev_priv(netdev);
2059 struct i40e_pf *pf = np->vsi->back;
2063 return i40e_ptp_get_ts_config(pf, ifr);
2065 return i40e_ptp_set_ts_config(pf, ifr);
2072 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2073 * @vsi: the vsi being adjusted
2075 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2077 struct i40e_vsi_context ctxt;
2080 if ((vsi->info.valid_sections &
2081 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2082 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2083 return; /* already enabled */
2085 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2086 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2087 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2089 ctxt.seid = vsi->seid;
2090 ctxt.info = vsi->info;
2091 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2093 dev_info(&vsi->back->pdev->dev,
2094 "update vlan stripping failed, err %s aq_err %s\n",
2095 i40e_stat_str(&vsi->back->hw, ret),
2096 i40e_aq_str(&vsi->back->hw,
2097 vsi->back->hw.aq.asq_last_status));
2102 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2103 * @vsi: the vsi being adjusted
2105 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2107 struct i40e_vsi_context ctxt;
2110 if ((vsi->info.valid_sections &
2111 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2112 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2113 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2114 return; /* already disabled */
2116 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2117 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2118 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2120 ctxt.seid = vsi->seid;
2121 ctxt.info = vsi->info;
2122 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2124 dev_info(&vsi->back->pdev->dev,
2125 "update vlan stripping failed, err %s aq_err %s\n",
2126 i40e_stat_str(&vsi->back->hw, ret),
2127 i40e_aq_str(&vsi->back->hw,
2128 vsi->back->hw.aq.asq_last_status));
2133 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2134 * @netdev: network interface to be adjusted
2135 * @features: netdev features to test if VLAN offload is enabled or not
2137 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2139 struct i40e_netdev_priv *np = netdev_priv(netdev);
2140 struct i40e_vsi *vsi = np->vsi;
2142 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2143 i40e_vlan_stripping_enable(vsi);
2145 i40e_vlan_stripping_disable(vsi);
2149 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2150 * @vsi: the vsi being configured
2151 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2153 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2155 struct i40e_mac_filter *f, *add_f;
2156 bool is_netdev, is_vf;
2158 is_vf = (vsi->type == I40E_VSI_SRIOV);
2159 is_netdev = !!(vsi->netdev);
2162 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2165 dev_info(&vsi->back->pdev->dev,
2166 "Could not add vlan filter %d for %pM\n",
2167 vid, vsi->netdev->dev_addr);
2172 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2173 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2175 dev_info(&vsi->back->pdev->dev,
2176 "Could not add vlan filter %d for %pM\n",
2182 /* Now if we add a vlan tag, make sure to check if it is the first
2183 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2184 * with 0, so we now accept untagged and specified tagged traffic
2185 * (and not any taged and untagged)
2188 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2190 is_vf, is_netdev)) {
2191 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2192 I40E_VLAN_ANY, is_vf, is_netdev);
2193 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2196 dev_info(&vsi->back->pdev->dev,
2197 "Could not add filter 0 for %pM\n",
2198 vsi->netdev->dev_addr);
2204 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2205 if (vid > 0 && !vsi->info.pvid) {
2206 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2207 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2208 is_vf, is_netdev)) {
2209 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2211 add_f = i40e_add_filter(vsi, f->macaddr,
2212 0, is_vf, is_netdev);
2214 dev_info(&vsi->back->pdev->dev,
2215 "Could not add filter 0 for %pM\n",
2223 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2224 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2227 return i40e_sync_vsi_filters(vsi, false);
2231 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2232 * @vsi: the vsi being configured
2233 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2235 * Return: 0 on success or negative otherwise
2237 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2239 struct net_device *netdev = vsi->netdev;
2240 struct i40e_mac_filter *f, *add_f;
2241 bool is_vf, is_netdev;
2242 int filter_count = 0;
2244 is_vf = (vsi->type == I40E_VSI_SRIOV);
2245 is_netdev = !!(netdev);
2248 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2250 list_for_each_entry(f, &vsi->mac_filter_list, list)
2251 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2253 /* go through all the filters for this VSI and if there is only
2254 * vid == 0 it means there are no other filters, so vid 0 must
2255 * be replaced with -1. This signifies that we should from now
2256 * on accept any traffic (with any tag present, or untagged)
2258 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2261 ether_addr_equal(netdev->dev_addr, f->macaddr))
2269 if (!filter_count && is_netdev) {
2270 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2271 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2274 dev_info(&vsi->back->pdev->dev,
2275 "Could not add filter %d for %pM\n",
2276 I40E_VLAN_ANY, netdev->dev_addr);
2281 if (!filter_count) {
2282 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2283 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2284 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2287 dev_info(&vsi->back->pdev->dev,
2288 "Could not add filter %d for %pM\n",
2289 I40E_VLAN_ANY, f->macaddr);
2295 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2296 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2299 return i40e_sync_vsi_filters(vsi, false);
2303 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2304 * @netdev: network interface to be adjusted
2305 * @vid: vlan id to be added
2307 * net_device_ops implementation for adding vlan ids
2310 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2311 __always_unused __be16 proto, u16 vid)
2313 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2314 __always_unused __be16 proto, u16 vid)
2317 struct i40e_netdev_priv *np = netdev_priv(netdev);
2318 struct i40e_vsi *vsi = np->vsi;
2324 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2326 /* If the network stack called us with vid = 0 then
2327 * it is asking to receive priority tagged packets with
2328 * vlan id 0. Our HW receives them by default when configured
2329 * to receive untagged packets so there is no need to add an
2330 * extra filter for vlan 0 tagged packets.
2333 ret = i40e_vsi_add_vlan(vsi, vid);
2335 if (!ret && (vid < VLAN_N_VID))
2336 set_bit(vid, vsi->active_vlans);
2342 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2343 * @netdev: network interface to be adjusted
2344 * @vid: vlan id to be removed
2346 * net_device_ops implementation for removing vlan ids
2349 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2350 __always_unused __be16 proto, u16 vid)
2352 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2353 __always_unused __be16 proto, u16 vid)
2356 struct i40e_netdev_priv *np = netdev_priv(netdev);
2357 struct i40e_vsi *vsi = np->vsi;
2359 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2361 /* return code is ignored as there is nothing a user
2362 * can do about failure to remove and a log message was
2363 * already printed from the other function
2365 i40e_vsi_kill_vlan(vsi, vid);
2367 clear_bit(vid, vsi->active_vlans);
2373 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2374 * @vsi: the vsi being brought back up
2376 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2383 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2385 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2386 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2391 * i40e_vsi_add_pvid - Add pvid for the VSI
2392 * @vsi: the vsi being adjusted
2393 * @vid: the vlan id to set as a PVID
2395 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2397 struct i40e_vsi_context ctxt;
2400 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2401 vsi->info.pvid = cpu_to_le16(vid);
2402 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2403 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2404 I40E_AQ_VSI_PVLAN_EMOD_STR;
2406 ctxt.seid = vsi->seid;
2407 ctxt.info = vsi->info;
2408 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2410 dev_info(&vsi->back->pdev->dev,
2411 "add pvid failed, err %s aq_err %s\n",
2412 i40e_stat_str(&vsi->back->hw, ret),
2413 i40e_aq_str(&vsi->back->hw,
2414 vsi->back->hw.aq.asq_last_status));
2422 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2423 * @vsi: the vsi being adjusted
2425 * Just use the vlan_rx_register() service to put it back to normal
2427 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2429 i40e_vlan_stripping_disable(vsi);
2435 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2436 * @vsi: ptr to the VSI
2438 * If this function returns with an error, then it's possible one or
2439 * more of the rings is populated (while the rest are not). It is the
2440 * callers duty to clean those orphaned rings.
2442 * Return 0 on success, negative on failure
2444 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2448 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2449 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2455 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2456 * @vsi: ptr to the VSI
2458 * Free VSI's transmit software resources
2460 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2467 for (i = 0; i < vsi->num_queue_pairs; i++)
2468 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2469 i40e_free_tx_resources(vsi->tx_rings[i]);
2473 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2474 * @vsi: ptr to the VSI
2476 * If this function returns with an error, then it's possible one or
2477 * more of the rings is populated (while the rest are not). It is the
2478 * callers duty to clean those orphaned rings.
2480 * Return 0 on success, negative on failure
2482 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2486 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2487 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2489 i40e_fcoe_setup_ddp_resources(vsi);
2495 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2496 * @vsi: ptr to the VSI
2498 * Free all receive software resources
2500 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2507 for (i = 0; i < vsi->num_queue_pairs; i++)
2508 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2509 i40e_free_rx_resources(vsi->rx_rings[i]);
2511 i40e_fcoe_free_ddp_resources(vsi);
2516 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2517 * @ring: The Tx ring to configure
2519 * This enables/disables XPS for a given Tx descriptor ring
2520 * based on the TCs enabled for the VSI that ring belongs to.
2522 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2524 struct i40e_vsi *vsi = ring->vsi;
2527 if (!ring->q_vector || !ring->netdev)
2530 /* Single TC mode enable XPS */
2531 if (vsi->tc_config.numtc <= 1) {
2532 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2533 netif_set_xps_queue(ring->netdev,
2534 &ring->q_vector->affinity_mask,
2536 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2537 /* Disable XPS to allow selection based on TC */
2538 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2539 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2540 free_cpumask_var(mask);
2545 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2546 * @ring: The Tx ring to configure
2548 * Configure the Tx descriptor ring in the HMC context.
2550 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2552 struct i40e_vsi *vsi = ring->vsi;
2553 u16 pf_q = vsi->base_queue + ring->queue_index;
2554 struct i40e_hw *hw = &vsi->back->hw;
2555 struct i40e_hmc_obj_txq tx_ctx;
2556 i40e_status err = 0;
2559 /* some ATR related tx ring init */
2560 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2561 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2562 ring->atr_count = 0;
2564 ring->atr_sample_rate = 0;
2568 i40e_config_xps_tx_ring(ring);
2570 /* clear the context structure first */
2571 memset(&tx_ctx, 0, sizeof(tx_ctx));
2573 tx_ctx.new_context = 1;
2574 tx_ctx.base = (ring->dma / 128);
2575 tx_ctx.qlen = ring->count;
2576 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2577 I40E_FLAG_FD_ATR_ENABLED));
2579 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2581 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2582 /* FDIR VSI tx ring can still use RS bit and writebacks */
2583 if (vsi->type != I40E_VSI_FDIR)
2584 tx_ctx.head_wb_ena = 1;
2585 tx_ctx.head_wb_addr = ring->dma +
2586 (ring->count * sizeof(struct i40e_tx_desc));
2588 /* As part of VSI creation/update, FW allocates certain
2589 * Tx arbitration queue sets for each TC enabled for
2590 * the VSI. The FW returns the handles to these queue
2591 * sets as part of the response buffer to Add VSI,
2592 * Update VSI, etc. AQ commands. It is expected that
2593 * these queue set handles be associated with the Tx
2594 * queues by the driver as part of the TX queue context
2595 * initialization. This has to be done regardless of
2596 * DCB as by default everything is mapped to TC0.
2598 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2599 tx_ctx.rdylist_act = 0;
2601 /* clear the context in the HMC */
2602 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2604 dev_info(&vsi->back->pdev->dev,
2605 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2606 ring->queue_index, pf_q, err);
2610 /* set the context in the HMC */
2611 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2613 dev_info(&vsi->back->pdev->dev,
2614 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2615 ring->queue_index, pf_q, err);
2619 /* Now associate this queue with this PCI function */
2620 if (vsi->type == I40E_VSI_VMDQ2) {
2621 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2622 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2623 I40E_QTX_CTL_VFVM_INDX_MASK;
2625 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2628 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2629 I40E_QTX_CTL_PF_INDX_MASK);
2630 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2633 /* cache tail off for easier writes later */
2634 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2640 * i40e_configure_rx_ring - Configure a receive ring context
2641 * @ring: The Rx ring to configure
2643 * Configure the Rx descriptor ring in the HMC context.
2645 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2647 struct i40e_vsi *vsi = ring->vsi;
2648 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2649 u16 pf_q = vsi->base_queue + ring->queue_index;
2650 struct i40e_hw *hw = &vsi->back->hw;
2651 struct i40e_hmc_obj_rxq rx_ctx;
2652 i40e_status err = 0;
2656 /* clear the context structure first */
2657 memset(&rx_ctx, 0, sizeof(rx_ctx));
2659 ring->rx_buf_len = vsi->rx_buf_len;
2660 ring->rx_hdr_len = vsi->rx_hdr_len;
2662 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2663 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2665 rx_ctx.base = (ring->dma / 128);
2666 rx_ctx.qlen = ring->count;
2668 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2669 set_ring_16byte_desc_enabled(ring);
2675 rx_ctx.dtype = vsi->dtype;
2677 set_ring_ps_enabled(ring);
2678 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2680 I40E_RX_SPLIT_TCP_UDP |
2683 rx_ctx.hsplit_0 = 0;
2686 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2687 (chain_len * ring->rx_buf_len));
2688 if (hw->revision_id == 0)
2689 rx_ctx.lrxqthresh = 0;
2691 rx_ctx.lrxqthresh = 2;
2692 rx_ctx.crcstrip = 1;
2694 /* this controls whether VLAN is stripped from inner headers */
2697 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2699 /* set the prefena field to 1 because the manual says to */
2702 /* clear the context in the HMC */
2703 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2705 dev_info(&vsi->back->pdev->dev,
2706 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2707 ring->queue_index, pf_q, err);
2711 /* set the context in the HMC */
2712 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2714 dev_info(&vsi->back->pdev->dev,
2715 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2716 ring->queue_index, pf_q, err);
2720 /* cache tail for quicker writes, and clear the reg before use */
2721 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2722 writel(0, ring->tail);
2724 if (ring_is_ps_enabled(ring)) {
2725 i40e_alloc_rx_headers(ring);
2726 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2728 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2735 * i40e_vsi_configure_tx - Configure the VSI for Tx
2736 * @vsi: VSI structure describing this set of rings and resources
2738 * Configure the Tx VSI for operation.
2740 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2745 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2746 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2752 * i40e_vsi_configure_rx - Configure the VSI for Rx
2753 * @vsi: the VSI being configured
2755 * Configure the Rx VSI for operation.
2757 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2762 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2763 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2764 + ETH_FCS_LEN + VLAN_HLEN;
2766 vsi->max_frame = I40E_RXBUFFER_2048;
2768 /* figure out correct receive buffer length */
2769 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2770 I40E_FLAG_RX_PS_ENABLED)) {
2771 case I40E_FLAG_RX_1BUF_ENABLED:
2772 vsi->rx_hdr_len = 0;
2773 vsi->rx_buf_len = vsi->max_frame;
2774 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2776 case I40E_FLAG_RX_PS_ENABLED:
2777 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2778 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2779 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2782 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2783 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2784 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2789 /* setup rx buffer for FCoE */
2790 if ((vsi->type == I40E_VSI_FCOE) &&
2791 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2792 vsi->rx_hdr_len = 0;
2793 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2794 vsi->max_frame = I40E_RXBUFFER_3072;
2795 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2798 #endif /* I40E_FCOE */
2799 /* round up for the chip's needs */
2800 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2801 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2802 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2803 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2805 /* set up individual rings */
2806 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2807 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2813 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2814 * @vsi: ptr to the VSI
2816 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2818 struct i40e_ring *tx_ring, *rx_ring;
2819 u16 qoffset, qcount;
2822 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2823 /* Reset the TC information */
2824 for (i = 0; i < vsi->num_queue_pairs; i++) {
2825 rx_ring = vsi->rx_rings[i];
2826 tx_ring = vsi->tx_rings[i];
2827 rx_ring->dcb_tc = 0;
2828 tx_ring->dcb_tc = 0;
2832 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2833 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2836 qoffset = vsi->tc_config.tc_info[n].qoffset;
2837 qcount = vsi->tc_config.tc_info[n].qcount;
2838 for (i = qoffset; i < (qoffset + qcount); i++) {
2839 rx_ring = vsi->rx_rings[i];
2840 tx_ring = vsi->tx_rings[i];
2841 rx_ring->dcb_tc = n;
2842 tx_ring->dcb_tc = n;
2848 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2849 * @vsi: ptr to the VSI
2851 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2854 i40e_set_rx_mode(vsi->netdev);
2858 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2859 * @vsi: Pointer to the targeted VSI
2861 * This function replays the hlist on the hw where all the SB Flow Director
2862 * filters were saved.
2864 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2866 struct i40e_fdir_filter *filter;
2867 struct i40e_pf *pf = vsi->back;
2868 struct hlist_node *node;
2870 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2873 hlist_for_each_entry_safe(filter, node,
2874 &pf->fdir_filter_list, fdir_node) {
2875 i40e_add_del_fdir(vsi, filter, true);
2880 * i40e_vsi_configure - Set up the VSI for action
2881 * @vsi: the VSI being configured
2883 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2887 i40e_set_vsi_rx_mode(vsi);
2888 i40e_restore_vlan(vsi);
2889 i40e_vsi_config_dcb_rings(vsi);
2890 err = i40e_vsi_configure_tx(vsi);
2892 err = i40e_vsi_configure_rx(vsi);
2898 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2899 * @vsi: the VSI being configured
2901 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2903 struct i40e_pf *pf = vsi->back;
2904 struct i40e_q_vector *q_vector;
2905 struct i40e_hw *hw = &pf->hw;
2911 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2912 * and PFINT_LNKLSTn registers, e.g.:
2913 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2915 qp = vsi->base_queue;
2916 vector = vsi->base_vector;
2917 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2918 q_vector = vsi->q_vectors[i];
2919 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2920 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2921 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2923 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2924 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2925 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2928 /* Linked list for the queuepairs assigned to this vector */
2929 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2930 for (q = 0; q < q_vector->num_ringpairs; q++) {
2931 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2932 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2933 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2934 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2936 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2938 wr32(hw, I40E_QINT_RQCTL(qp), val);
2940 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2941 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2942 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2943 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2945 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2947 /* Terminate the linked list */
2948 if (q == (q_vector->num_ringpairs - 1))
2949 val |= (I40E_QUEUE_END_OF_LIST
2950 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2952 wr32(hw, I40E_QINT_TQCTL(qp), val);
2961 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2962 * @hw: ptr to the hardware info
2964 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2966 struct i40e_hw *hw = &pf->hw;
2969 /* clear things first */
2970 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2971 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2973 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2974 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2975 I40E_PFINT_ICR0_ENA_GRST_MASK |
2976 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2977 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2978 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2979 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2980 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2982 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2983 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2985 if (pf->flags & I40E_FLAG_PTP)
2986 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2988 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2990 /* SW_ITR_IDX = 0, but don't change INTENA */
2991 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2992 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2994 /* OTHER_ITR_IDX = 0 */
2995 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2999 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3000 * @vsi: the VSI being configured
3002 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3004 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3005 struct i40e_pf *pf = vsi->back;
3006 struct i40e_hw *hw = &pf->hw;
3009 /* set the ITR configuration */
3010 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3011 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3012 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3013 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3014 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3015 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3017 i40e_enable_misc_int_causes(pf);
3019 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3020 wr32(hw, I40E_PFINT_LNKLST0, 0);
3022 /* Associate the queue pair to the vector and enable the queue int */
3023 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3024 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3025 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3027 wr32(hw, I40E_QINT_RQCTL(0), val);
3029 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3030 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3031 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3033 wr32(hw, I40E_QINT_TQCTL(0), val);
3038 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3039 * @pf: board private structure
3041 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3043 struct i40e_hw *hw = &pf->hw;
3045 wr32(hw, I40E_PFINT_DYN_CTL0,
3046 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3051 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3052 * @pf: board private structure
3054 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3056 struct i40e_hw *hw = &pf->hw;
3059 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3060 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3061 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3063 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3068 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3069 * @vsi: pointer to a vsi
3070 * @vector: disable a particular Hw Interrupt vector
3072 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3074 struct i40e_pf *pf = vsi->back;
3075 struct i40e_hw *hw = &pf->hw;
3078 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3079 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3084 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3085 * @irq: interrupt number
3086 * @data: pointer to a q_vector
3088 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3090 struct i40e_q_vector *q_vector = data;
3092 if (!q_vector->tx.ring && !q_vector->rx.ring)
3095 napi_schedule(&q_vector->napi);
3101 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3102 * @vsi: the VSI being configured
3103 * @basename: name for the vector
3105 * Allocates MSI-X vectors and requests interrupts from the kernel.
3107 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3109 int q_vectors = vsi->num_q_vectors;
3110 struct i40e_pf *pf = vsi->back;
3111 int base = vsi->base_vector;
3116 for (vector = 0; vector < q_vectors; vector++) {
3117 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3119 if (q_vector->tx.ring && q_vector->rx.ring) {
3120 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3121 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3123 } else if (q_vector->rx.ring) {
3124 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3125 "%s-%s-%d", basename, "rx", rx_int_idx++);
3126 } else if (q_vector->tx.ring) {
3127 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3128 "%s-%s-%d", basename, "tx", tx_int_idx++);
3130 /* skip this unused q_vector */
3133 err = request_irq(pf->msix_entries[base + vector].vector,
3139 dev_info(&pf->pdev->dev,
3140 "MSIX request_irq failed, error: %d\n", err);
3141 goto free_queue_irqs;
3143 /* assign the mask for this irq */
3144 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3145 &q_vector->affinity_mask);
3148 vsi->irqs_ready = true;
3154 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3156 free_irq(pf->msix_entries[base + vector].vector,
3157 &(vsi->q_vectors[vector]));
3163 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3164 * @vsi: the VSI being un-configured
3166 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3168 struct i40e_pf *pf = vsi->back;
3169 struct i40e_hw *hw = &pf->hw;
3170 int base = vsi->base_vector;
3173 for (i = 0; i < vsi->num_queue_pairs; i++) {
3174 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3175 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3178 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3179 for (i = vsi->base_vector;
3180 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3181 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3184 for (i = 0; i < vsi->num_q_vectors; i++)
3185 synchronize_irq(pf->msix_entries[i + base].vector);
3187 /* Legacy and MSI mode - this stops all interrupt handling */
3188 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3189 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3191 synchronize_irq(pf->pdev->irq);
3196 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3197 * @vsi: the VSI being configured
3199 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3201 struct i40e_pf *pf = vsi->back;
3204 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3205 for (i = 0; i < vsi->num_q_vectors; i++)
3206 i40e_irq_dynamic_enable(vsi, i);
3208 i40e_irq_dynamic_enable_icr0(pf);
3211 i40e_flush(&pf->hw);
3216 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3217 * @pf: board private structure
3219 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3222 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3223 i40e_flush(&pf->hw);
3227 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3228 * @irq: interrupt number
3229 * @data: pointer to a q_vector
3231 * This is the handler used for all MSI/Legacy interrupts, and deals
3232 * with both queue and non-queue interrupts. This is also used in
3233 * MSIX mode to handle the non-queue interrupts.
3235 static irqreturn_t i40e_intr(int irq, void *data)
3237 struct i40e_pf *pf = (struct i40e_pf *)data;
3238 struct i40e_hw *hw = &pf->hw;
3239 irqreturn_t ret = IRQ_NONE;
3240 u32 icr0, icr0_remaining;
3243 icr0 = rd32(hw, I40E_PFINT_ICR0);
3244 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3246 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3247 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3250 /* if interrupt but no bits showing, must be SWINT */
3251 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3252 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3255 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3256 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3257 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3258 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3259 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3262 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3263 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3265 /* temporarily disable queue cause for NAPI processing */
3266 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3268 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3269 wr32(hw, I40E_QINT_RQCTL(0), qval);
3271 qval = rd32(hw, I40E_QINT_TQCTL(0));
3272 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3273 wr32(hw, I40E_QINT_TQCTL(0), qval);
3275 if (!test_bit(__I40E_DOWN, &pf->state))
3276 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3279 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3280 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3281 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3284 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3285 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3286 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3289 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3290 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3291 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3294 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3295 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3296 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3297 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3298 val = rd32(hw, I40E_GLGEN_RSTAT);
3299 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3300 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3301 if (val == I40E_RESET_CORER) {
3303 } else if (val == I40E_RESET_GLOBR) {
3305 } else if (val == I40E_RESET_EMPR) {
3307 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3311 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3312 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3313 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3314 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3315 rd32(hw, I40E_PFHMC_ERRORINFO),
3316 rd32(hw, I40E_PFHMC_ERRORDATA));
3319 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3320 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3322 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3323 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3324 i40e_ptp_tx_hwtstamp(pf);
3328 /* If a critical error is pending we have no choice but to reset the
3330 * Report and mask out any remaining unexpected interrupts.
3332 icr0_remaining = icr0 & ena_mask;
3333 if (icr0_remaining) {
3334 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3336 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3337 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3338 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3339 dev_info(&pf->pdev->dev, "device will be reset\n");
3340 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3341 i40e_service_event_schedule(pf);
3343 ena_mask &= ~icr0_remaining;
3348 /* re-enable interrupt causes */
3349 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3350 if (!test_bit(__I40E_DOWN, &pf->state)) {
3351 i40e_service_event_schedule(pf);
3352 i40e_irq_dynamic_enable_icr0(pf);
3359 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3360 * @tx_ring: tx ring to clean
3361 * @budget: how many cleans we're allowed
3363 * Returns true if there's any budget left (e.g. the clean is finished)
3365 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3367 struct i40e_vsi *vsi = tx_ring->vsi;
3368 u16 i = tx_ring->next_to_clean;
3369 struct i40e_tx_buffer *tx_buf;
3370 struct i40e_tx_desc *tx_desc;
3372 tx_buf = &tx_ring->tx_bi[i];
3373 tx_desc = I40E_TX_DESC(tx_ring, i);
3374 i -= tx_ring->count;
3377 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3379 /* if next_to_watch is not set then there is no work pending */
3383 /* prevent any other reads prior to eop_desc */
3384 read_barrier_depends();
3386 /* if the descriptor isn't done, no work yet to do */
3387 if (!(eop_desc->cmd_type_offset_bsz &
3388 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3391 /* clear next_to_watch to prevent false hangs */
3392 tx_buf->next_to_watch = NULL;
3394 tx_desc->buffer_addr = 0;
3395 tx_desc->cmd_type_offset_bsz = 0;
3396 /* move past filter desc */
3401 i -= tx_ring->count;
3402 tx_buf = tx_ring->tx_bi;
3403 tx_desc = I40E_TX_DESC(tx_ring, 0);
3405 /* unmap skb header data */
3406 dma_unmap_single(tx_ring->dev,
3407 dma_unmap_addr(tx_buf, dma),
3408 dma_unmap_len(tx_buf, len),
3410 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3411 kfree(tx_buf->raw_buf);
3413 tx_buf->raw_buf = NULL;
3414 tx_buf->tx_flags = 0;
3415 tx_buf->next_to_watch = NULL;
3416 dma_unmap_len_set(tx_buf, len, 0);
3417 tx_desc->buffer_addr = 0;
3418 tx_desc->cmd_type_offset_bsz = 0;
3420 /* move us past the eop_desc for start of next FD desc */
3425 i -= tx_ring->count;
3426 tx_buf = tx_ring->tx_bi;
3427 tx_desc = I40E_TX_DESC(tx_ring, 0);
3430 /* update budget accounting */
3432 } while (likely(budget));
3434 i += tx_ring->count;
3435 tx_ring->next_to_clean = i;
3437 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3438 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3444 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3445 * @irq: interrupt number
3446 * @data: pointer to a q_vector
3448 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3450 struct i40e_q_vector *q_vector = data;
3451 struct i40e_vsi *vsi;
3453 if (!q_vector->tx.ring)
3456 vsi = q_vector->tx.ring->vsi;
3457 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3463 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3464 * @vsi: the VSI being configured
3465 * @v_idx: vector index
3466 * @qp_idx: queue pair index
3468 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3470 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3471 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3472 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3474 tx_ring->q_vector = q_vector;
3475 tx_ring->next = q_vector->tx.ring;
3476 q_vector->tx.ring = tx_ring;
3477 q_vector->tx.count++;
3479 rx_ring->q_vector = q_vector;
3480 rx_ring->next = q_vector->rx.ring;
3481 q_vector->rx.ring = rx_ring;
3482 q_vector->rx.count++;
3486 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3487 * @vsi: the VSI being configured
3489 * This function maps descriptor rings to the queue-specific vectors
3490 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3491 * one vector per queue pair, but on a constrained vector budget, we
3492 * group the queue pairs as "efficiently" as possible.
3494 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3496 int qp_remaining = vsi->num_queue_pairs;
3497 int q_vectors = vsi->num_q_vectors;
3502 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3503 * group them so there are multiple queues per vector.
3504 * It is also important to go through all the vectors available to be
3505 * sure that if we don't use all the vectors, that the remaining vectors
3506 * are cleared. This is especially important when decreasing the
3507 * number of queues in use.
3509 for (; v_start < q_vectors; v_start++) {
3510 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3512 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3514 q_vector->num_ringpairs = num_ringpairs;
3516 q_vector->rx.count = 0;
3517 q_vector->tx.count = 0;
3518 q_vector->rx.ring = NULL;
3519 q_vector->tx.ring = NULL;
3521 while (num_ringpairs--) {
3522 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3530 * i40e_vsi_request_irq - Request IRQ from the OS
3531 * @vsi: the VSI being configured
3532 * @basename: name for the vector
3534 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3536 struct i40e_pf *pf = vsi->back;
3539 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3540 err = i40e_vsi_request_irq_msix(vsi, basename);
3541 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3542 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3545 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3549 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3554 #ifdef CONFIG_NET_POLL_CONTROLLER
3556 * i40e_netpoll - A Polling 'interrupt'handler
3557 * @netdev: network interface device structure
3559 * This is used by netconsole to send skbs without having to re-enable
3560 * interrupts. It's not called while the normal interrupt routine is executing.
3563 void i40e_netpoll(struct net_device *netdev)
3565 static void i40e_netpoll(struct net_device *netdev)
3568 struct i40e_netdev_priv *np = netdev_priv(netdev);
3569 struct i40e_vsi *vsi = np->vsi;
3570 struct i40e_pf *pf = vsi->back;
3573 /* if interface is down do nothing */
3574 if (test_bit(__I40E_DOWN, &vsi->state))
3577 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3578 for (i = 0; i < vsi->num_q_vectors; i++)
3579 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3581 i40e_intr(pf->pdev->irq, netdev);
3587 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3588 * @pf: the PF being configured
3589 * @pf_q: the PF queue
3590 * @enable: enable or disable state of the queue
3592 * This routine will wait for the given Tx queue of the PF to reach the
3593 * enabled or disabled state.
3594 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3595 * multiple retries; else will return 0 in case of success.
3597 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3602 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3603 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3604 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3607 usleep_range(10, 20);
3609 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3616 * i40e_vsi_control_tx - Start or stop a VSI's rings
3617 * @vsi: the VSI being configured
3618 * @enable: start or stop the rings
3620 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3622 struct i40e_pf *pf = vsi->back;
3623 struct i40e_hw *hw = &pf->hw;
3624 int i, j, pf_q, ret = 0;
3627 pf_q = vsi->base_queue;
3628 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3630 /* warn the TX unit of coming changes */
3631 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3633 usleep_range(10, 20);
3635 for (j = 0; j < 50; j++) {
3636 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3637 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3638 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3640 usleep_range(1000, 2000);
3642 /* Skip if the queue is already in the requested state */
3643 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3646 /* turn on/off the queue */
3648 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3649 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3651 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3654 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3655 /* No waiting for the Tx queue to disable */
3656 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3659 /* wait for the change to finish */
3660 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3662 dev_info(&pf->pdev->dev,
3663 "VSI seid %d Tx ring %d %sable timeout\n",
3664 vsi->seid, pf_q, (enable ? "en" : "dis"));
3669 if (hw->revision_id == 0)
3675 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3676 * @pf: the PF being configured
3677 * @pf_q: the PF queue
3678 * @enable: enable or disable state of the queue
3680 * This routine will wait for the given Rx queue of the PF to reach the
3681 * enabled or disabled state.
3682 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3683 * multiple retries; else will return 0 in case of success.
3685 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3690 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3691 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3692 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3695 usleep_range(10, 20);
3697 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3704 * i40e_vsi_control_rx - Start or stop a VSI's rings
3705 * @vsi: the VSI being configured
3706 * @enable: start or stop the rings
3708 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3710 struct i40e_pf *pf = vsi->back;
3711 struct i40e_hw *hw = &pf->hw;
3712 int i, j, pf_q, ret = 0;
3715 pf_q = vsi->base_queue;
3716 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3717 for (j = 0; j < 50; j++) {
3718 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3719 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3720 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3722 usleep_range(1000, 2000);
3725 /* Skip if the queue is already in the requested state */
3726 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3729 /* turn on/off the queue */
3731 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3733 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3734 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3736 /* wait for the change to finish */
3737 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3739 dev_info(&pf->pdev->dev,
3740 "VSI seid %d Rx ring %d %sable timeout\n",
3741 vsi->seid, pf_q, (enable ? "en" : "dis"));
3750 * i40e_vsi_control_rings - Start or stop a VSI's rings
3751 * @vsi: the VSI being configured
3752 * @enable: start or stop the rings
3754 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3758 /* do rx first for enable and last for disable */
3760 ret = i40e_vsi_control_rx(vsi, request);
3763 ret = i40e_vsi_control_tx(vsi, request);
3765 /* Ignore return value, we need to shutdown whatever we can */
3766 i40e_vsi_control_tx(vsi, request);
3767 i40e_vsi_control_rx(vsi, request);
3774 * i40e_vsi_free_irq - Free the irq association with the OS
3775 * @vsi: the VSI being configured
3777 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3779 struct i40e_pf *pf = vsi->back;
3780 struct i40e_hw *hw = &pf->hw;
3781 int base = vsi->base_vector;
3785 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3786 if (!vsi->q_vectors)
3789 if (!vsi->irqs_ready)
3792 vsi->irqs_ready = false;
3793 for (i = 0; i < vsi->num_q_vectors; i++) {
3794 u16 vector = i + base;
3796 /* free only the irqs that were actually requested */
3797 if (!vsi->q_vectors[i] ||
3798 !vsi->q_vectors[i]->num_ringpairs)
3801 /* clear the affinity_mask in the IRQ descriptor */
3802 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3804 free_irq(pf->msix_entries[vector].vector,
3807 /* Tear down the interrupt queue link list
3809 * We know that they come in pairs and always
3810 * the Rx first, then the Tx. To clear the
3811 * link list, stick the EOL value into the
3812 * next_q field of the registers.
3814 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3815 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3816 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3817 val |= I40E_QUEUE_END_OF_LIST
3818 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3819 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3821 while (qp != I40E_QUEUE_END_OF_LIST) {
3824 val = rd32(hw, I40E_QINT_RQCTL(qp));
3826 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3827 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3828 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3829 I40E_QINT_RQCTL_INTEVENT_MASK);
3831 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3832 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3834 wr32(hw, I40E_QINT_RQCTL(qp), val);
3836 val = rd32(hw, I40E_QINT_TQCTL(qp));
3838 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3839 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3841 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3842 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3843 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3844 I40E_QINT_TQCTL_INTEVENT_MASK);
3846 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3847 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3849 wr32(hw, I40E_QINT_TQCTL(qp), val);
3854 free_irq(pf->pdev->irq, pf);
3856 val = rd32(hw, I40E_PFINT_LNKLST0);
3857 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3858 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3859 val |= I40E_QUEUE_END_OF_LIST
3860 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3861 wr32(hw, I40E_PFINT_LNKLST0, val);
3863 val = rd32(hw, I40E_QINT_RQCTL(qp));
3864 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3865 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3866 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3867 I40E_QINT_RQCTL_INTEVENT_MASK);
3869 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3870 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3872 wr32(hw, I40E_QINT_RQCTL(qp), val);
3874 val = rd32(hw, I40E_QINT_TQCTL(qp));
3876 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3877 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3878 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3879 I40E_QINT_TQCTL_INTEVENT_MASK);
3881 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3882 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3884 wr32(hw, I40E_QINT_TQCTL(qp), val);
3889 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3890 * @vsi: the VSI being configured
3891 * @v_idx: Index of vector to be freed
3893 * This function frees the memory allocated to the q_vector. In addition if
3894 * NAPI is enabled it will delete any references to the NAPI struct prior
3895 * to freeing the q_vector.
3897 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3899 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3900 struct i40e_ring *ring;
3905 /* disassociate q_vector from rings */
3906 i40e_for_each_ring(ring, q_vector->tx)
3907 ring->q_vector = NULL;
3909 i40e_for_each_ring(ring, q_vector->rx)
3910 ring->q_vector = NULL;
3912 /* only VSI w/ an associated netdev is set up w/ NAPI */
3914 netif_napi_del(&q_vector->napi);
3916 vsi->q_vectors[v_idx] = NULL;
3918 kfree_rcu(q_vector, rcu);
3922 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3923 * @vsi: the VSI being un-configured
3925 * This frees the memory allocated to the q_vectors and
3926 * deletes references to the NAPI struct.
3928 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3932 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3933 i40e_free_q_vector(vsi, v_idx);
3937 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3938 * @pf: board private structure
3940 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3942 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3943 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3944 pci_disable_msix(pf->pdev);
3945 kfree(pf->msix_entries);
3946 pf->msix_entries = NULL;
3947 kfree(pf->irq_pile);
3948 pf->irq_pile = NULL;
3949 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3950 pci_disable_msi(pf->pdev);
3952 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3956 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3957 * @pf: board private structure
3959 * We go through and clear interrupt specific resources and reset the structure
3960 * to pre-load conditions
3962 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3966 i40e_stop_misc_vector(pf);
3967 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3968 synchronize_irq(pf->msix_entries[0].vector);
3969 free_irq(pf->msix_entries[0].vector, pf);
3972 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3973 for (i = 0; i < pf->num_alloc_vsi; i++)
3975 i40e_vsi_free_q_vectors(pf->vsi[i]);
3976 i40e_reset_interrupt_capability(pf);
3980 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3981 * @vsi: the VSI being configured
3983 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3990 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3991 napi_enable(&vsi->q_vectors[q_idx]->napi);
3995 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3996 * @vsi: the VSI being configured
3998 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4005 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4006 napi_disable(&vsi->q_vectors[q_idx]->napi);
4010 * i40e_vsi_close - Shut down a VSI
4011 * @vsi: the vsi to be quelled
4013 static void i40e_vsi_close(struct i40e_vsi *vsi)
4015 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4017 i40e_vsi_free_irq(vsi);
4018 i40e_vsi_free_tx_resources(vsi);
4019 i40e_vsi_free_rx_resources(vsi);
4020 vsi->current_netdev_flags = 0;
4024 * i40e_quiesce_vsi - Pause a given VSI
4025 * @vsi: the VSI being paused
4027 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4029 if (test_bit(__I40E_DOWN, &vsi->state))
4032 /* No need to disable FCoE VSI when Tx suspended */
4033 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4034 vsi->type == I40E_VSI_FCOE) {
4035 dev_dbg(&vsi->back->pdev->dev,
4036 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4040 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4041 if (vsi->netdev && netif_running(vsi->netdev))
4042 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4044 i40e_vsi_close(vsi);
4048 * i40e_unquiesce_vsi - Resume a given VSI
4049 * @vsi: the VSI being resumed
4051 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4053 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4056 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4057 if (vsi->netdev && netif_running(vsi->netdev))
4058 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4060 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4064 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4067 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4071 for (v = 0; v < pf->num_alloc_vsi; v++) {
4073 i40e_quiesce_vsi(pf->vsi[v]);
4078 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4081 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4085 for (v = 0; v < pf->num_alloc_vsi; v++) {
4087 i40e_unquiesce_vsi(pf->vsi[v]);
4091 #ifdef CONFIG_I40E_DCB
4093 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4094 * @vsi: the VSI being configured
4096 * This function waits for the given VSI's Tx queues to be disabled.
4098 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4100 struct i40e_pf *pf = vsi->back;
4103 pf_q = vsi->base_queue;
4104 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4105 /* Check and wait for the disable status of the queue */
4106 ret = i40e_pf_txq_wait(pf, pf_q, false);
4108 dev_info(&pf->pdev->dev,
4109 "VSI seid %d Tx ring %d disable timeout\n",
4119 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4122 * This function waits for the Tx queues to be in disabled state for all the
4123 * VSIs that are managed by this PF.
4125 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4129 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4130 /* No need to wait for FCoE VSI queues */
4131 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4132 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4144 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4145 * @q_idx: TX queue number
4146 * @vsi: Pointer to VSI struct
4148 * This function checks specified queue for given VSI. Detects hung condition.
4149 * Sets hung bit since it is two step process. Before next run of service task
4150 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4151 * hung condition remain unchanged and during subsequent run, this function
4152 * issues SW interrupt to recover from hung condition.
4154 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4156 struct i40e_ring *tx_ring = NULL;
4158 u32 head, val, tx_pending;
4163 /* now that we have an index, find the tx_ring struct */
4164 for (i = 0; i < vsi->num_queue_pairs; i++) {
4165 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4166 if (q_idx == vsi->tx_rings[i]->queue_index) {
4167 tx_ring = vsi->tx_rings[i];
4176 /* Read interrupt register */
4177 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4179 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4180 tx_ring->vsi->base_vector - 1));
4182 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4184 head = i40e_get_head(tx_ring);
4186 tx_pending = i40e_get_tx_pending(tx_ring);
4188 /* Interrupts are disabled and TX pending is non-zero,
4189 * trigger the SW interrupt (don't wait). Worst case
4190 * there will be one extra interrupt which may result
4191 * into not cleaning any queues because queues are cleaned.
4193 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4194 i40e_force_wb(vsi, tx_ring->q_vector);
4198 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4199 * @pf: pointer to PF struct
4201 * LAN VSI has netdev and netdev has TX queues. This function is to check
4202 * each of those TX queues if they are hung, trigger recovery by issuing
4205 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4207 struct net_device *netdev;
4208 struct i40e_vsi *vsi;
4211 /* Only for LAN VSI */
4212 vsi = pf->vsi[pf->lan_vsi];
4217 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4218 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4219 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4222 /* Make sure type is MAIN VSI */
4223 if (vsi->type != I40E_VSI_MAIN)
4226 netdev = vsi->netdev;
4230 /* Bail out if netif_carrier is not OK */
4231 if (!netif_carrier_ok(netdev))
4234 /* Go thru' TX queues for netdev */
4235 for (i = 0; i < netdev->num_tx_queues; i++) {
4236 struct netdev_queue *q;
4238 q = netdev_get_tx_queue(netdev, i);
4240 i40e_detect_recover_hung_queue(i, vsi);
4245 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4246 * @pf: pointer to PF
4248 * Get TC map for ISCSI PF type that will include iSCSI TC
4251 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4253 struct i40e_dcb_app_priority_table app;
4254 struct i40e_hw *hw = &pf->hw;
4255 u8 enabled_tc = 1; /* TC0 is always enabled */
4257 /* Get the iSCSI APP TLV */
4258 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4260 for (i = 0; i < dcbcfg->numapps; i++) {
4261 app = dcbcfg->app[i];
4262 if (app.selector == I40E_APP_SEL_TCPIP &&
4263 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4264 tc = dcbcfg->etscfg.prioritytable[app.priority];
4265 enabled_tc |= BIT_ULL(tc);
4274 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4275 * @dcbcfg: the corresponding DCBx configuration structure
4277 * Return the number of TCs from given DCBx configuration
4279 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4284 /* Scan the ETS Config Priority Table to find
4285 * traffic class enabled for a given priority
4286 * and use the traffic class index to get the
4287 * number of traffic classes enabled
4289 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4290 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4291 num_tc = dcbcfg->etscfg.prioritytable[i];
4294 /* Traffic class index starts from zero so
4295 * increment to return the actual count
4301 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4302 * @dcbcfg: the corresponding DCBx configuration structure
4304 * Query the current DCB configuration and return the number of
4305 * traffic classes enabled from the given DCBX config
4307 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4309 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4313 for (i = 0; i < num_tc; i++)
4314 enabled_tc |= BIT(i);
4320 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4321 * @pf: PF being queried
4323 * Return number of traffic classes enabled for the given PF
4325 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4327 struct i40e_hw *hw = &pf->hw;
4330 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4332 /* If DCB is not enabled then always in single TC */
4333 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4336 /* SFP mode will be enabled for all TCs on port */
4337 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4338 return i40e_dcb_get_num_tc(dcbcfg);
4340 /* MFP mode return count of enabled TCs for this PF */
4341 if (pf->hw.func_caps.iscsi)
4342 enabled_tc = i40e_get_iscsi_tc_map(pf);
4344 return 1; /* Only TC0 */
4346 /* At least have TC0 */
4347 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4348 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4349 if (enabled_tc & BIT_ULL(i))
4356 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4357 * @pf: PF being queried
4359 * Return a bitmap for first enabled traffic class for this PF.
4361 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4363 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4367 return 0x1; /* TC0 */
4369 /* Find the first enabled TC */
4370 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4371 if (enabled_tc & BIT_ULL(i))
4379 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4380 * @pf: PF being queried
4382 * Return a bitmap for enabled traffic classes for this PF.
4384 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4386 /* If DCB is not enabled for this PF then just return default TC */
4387 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4388 return i40e_pf_get_default_tc(pf);
4390 /* SFP mode we want PF to be enabled for all TCs */
4391 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4392 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4394 /* MFP enabled and iSCSI PF type */
4395 if (pf->hw.func_caps.iscsi)
4396 return i40e_get_iscsi_tc_map(pf);
4398 return i40e_pf_get_default_tc(pf);
4402 * i40e_vsi_get_bw_info - Query VSI BW Information
4403 * @vsi: the VSI being queried
4405 * Returns 0 on success, negative value on failure
4407 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4409 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4410 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4411 struct i40e_pf *pf = vsi->back;
4412 struct i40e_hw *hw = &pf->hw;
4417 /* Get the VSI level BW configuration */
4418 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4420 dev_info(&pf->pdev->dev,
4421 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4422 i40e_stat_str(&pf->hw, ret),
4423 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4427 /* Get the VSI level BW configuration per TC */
4428 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4431 dev_info(&pf->pdev->dev,
4432 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4433 i40e_stat_str(&pf->hw, ret),
4434 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4438 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4439 dev_info(&pf->pdev->dev,
4440 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4441 bw_config.tc_valid_bits,
4442 bw_ets_config.tc_valid_bits);
4443 /* Still continuing */
4446 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4447 vsi->bw_max_quanta = bw_config.max_bw;
4448 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4449 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4450 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4451 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4452 vsi->bw_ets_limit_credits[i] =
4453 le16_to_cpu(bw_ets_config.credits[i]);
4454 /* 3 bits out of 4 for each TC */
4455 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4462 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4463 * @vsi: the VSI being configured
4464 * @enabled_tc: TC bitmap
4465 * @bw_credits: BW shared credits per TC
4467 * Returns 0 on success, negative value on failure
4469 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4472 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4476 bw_data.tc_valid_bits = enabled_tc;
4477 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4478 bw_data.tc_bw_credits[i] = bw_share[i];
4480 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4483 dev_info(&vsi->back->pdev->dev,
4484 "AQ command Config VSI BW allocation per TC failed = %d\n",
4485 vsi->back->hw.aq.asq_last_status);
4489 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4490 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4496 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4497 * @vsi: the VSI being configured
4498 * @enabled_tc: TC map to be enabled
4501 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4503 struct net_device *netdev = vsi->netdev;
4504 struct i40e_pf *pf = vsi->back;
4505 struct i40e_hw *hw = &pf->hw;
4508 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4514 netdev_reset_tc(netdev);
4518 /* Set up actual enabled TCs on the VSI */
4519 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4522 /* set per TC queues for the VSI */
4523 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4524 /* Only set TC queues for enabled tcs
4526 * e.g. For a VSI that has TC0 and TC3 enabled the
4527 * enabled_tc bitmap would be 0x00001001; the driver
4528 * will set the numtc for netdev as 2 that will be
4529 * referenced by the netdev layer as TC 0 and 1.
4531 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4532 netdev_set_tc_queue(netdev,
4533 vsi->tc_config.tc_info[i].netdev_tc,
4534 vsi->tc_config.tc_info[i].qcount,
4535 vsi->tc_config.tc_info[i].qoffset);
4538 /* Assign UP2TC map for the VSI */
4539 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4540 /* Get the actual TC# for the UP */
4541 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4542 /* Get the mapped netdev TC# for the UP */
4543 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4544 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4549 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4550 * @vsi: the VSI being configured
4551 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4553 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4554 struct i40e_vsi_context *ctxt)
4556 /* copy just the sections touched not the entire info
4557 * since not all sections are valid as returned by
4560 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4561 memcpy(&vsi->info.queue_mapping,
4562 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4563 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4564 sizeof(vsi->info.tc_mapping));
4568 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4569 * @vsi: VSI to be configured
4570 * @enabled_tc: TC bitmap
4572 * This configures a particular VSI for TCs that are mapped to the
4573 * given TC bitmap. It uses default bandwidth share for TCs across
4574 * VSIs to configure TC for a particular VSI.
4577 * It is expected that the VSI queues have been quisced before calling
4580 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4582 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4583 struct i40e_vsi_context ctxt;
4587 /* Check if enabled_tc is same as existing or new TCs */
4588 if (vsi->tc_config.enabled_tc == enabled_tc)
4591 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4592 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4593 if (enabled_tc & BIT_ULL(i))
4597 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4599 dev_info(&vsi->back->pdev->dev,
4600 "Failed configuring TC map %d for VSI %d\n",
4601 enabled_tc, vsi->seid);
4605 /* Update Queue Pairs Mapping for currently enabled UPs */
4606 ctxt.seid = vsi->seid;
4607 ctxt.pf_num = vsi->back->hw.pf_id;
4609 ctxt.uplink_seid = vsi->uplink_seid;
4610 ctxt.info = vsi->info;
4611 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4613 /* Update the VSI after updating the VSI queue-mapping information */
4614 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4616 dev_info(&vsi->back->pdev->dev,
4617 "Update vsi tc config failed, err %s aq_err %s\n",
4618 i40e_stat_str(&vsi->back->hw, ret),
4619 i40e_aq_str(&vsi->back->hw,
4620 vsi->back->hw.aq.asq_last_status));
4623 /* update the local VSI info with updated queue map */
4624 i40e_vsi_update_queue_map(vsi, &ctxt);
4625 vsi->info.valid_sections = 0;
4627 /* Update current VSI BW information */
4628 ret = i40e_vsi_get_bw_info(vsi);
4630 dev_info(&vsi->back->pdev->dev,
4631 "Failed updating vsi bw info, err %s aq_err %s\n",
4632 i40e_stat_str(&vsi->back->hw, ret),
4633 i40e_aq_str(&vsi->back->hw,
4634 vsi->back->hw.aq.asq_last_status));
4638 /* Update the netdev TC setup */
4639 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4645 * i40e_veb_config_tc - Configure TCs for given VEB
4647 * @enabled_tc: TC bitmap
4649 * Configures given TC bitmap for VEB (switching) element
4651 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4653 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4654 struct i40e_pf *pf = veb->pf;
4658 /* No TCs or already enabled TCs just return */
4659 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4662 bw_data.tc_valid_bits = enabled_tc;
4663 /* bw_data.absolute_credits is not set (relative) */
4665 /* Enable ETS TCs with equal BW Share for now */
4666 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4667 if (enabled_tc & BIT_ULL(i))
4668 bw_data.tc_bw_share_credits[i] = 1;
4671 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4674 dev_info(&pf->pdev->dev,
4675 "VEB bw config failed, err %s aq_err %s\n",
4676 i40e_stat_str(&pf->hw, ret),
4677 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4681 /* Update the BW information */
4682 ret = i40e_veb_get_bw_info(veb);
4684 dev_info(&pf->pdev->dev,
4685 "Failed getting veb bw config, err %s aq_err %s\n",
4686 i40e_stat_str(&pf->hw, ret),
4687 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4694 #ifdef CONFIG_I40E_DCB
4696 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4699 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4700 * the caller would've quiesce all the VSIs before calling
4703 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4709 /* Enable the TCs available on PF to all VEBs */
4710 tc_map = i40e_pf_get_tc_map(pf);
4711 for (v = 0; v < I40E_MAX_VEB; v++) {
4714 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4716 dev_info(&pf->pdev->dev,
4717 "Failed configuring TC for VEB seid=%d\n",
4719 /* Will try to configure as many components */
4723 /* Update each VSI */
4724 for (v = 0; v < pf->num_alloc_vsi; v++) {
4728 /* - Enable all TCs for the LAN VSI
4730 * - For FCoE VSI only enable the TC configured
4731 * as per the APP TLV
4733 * - For all others keep them at TC0 for now
4735 if (v == pf->lan_vsi)
4736 tc_map = i40e_pf_get_tc_map(pf);
4738 tc_map = i40e_pf_get_default_tc(pf);
4740 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4741 tc_map = i40e_get_fcoe_tc_map(pf);
4742 #endif /* #ifdef I40E_FCOE */
4744 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4746 dev_info(&pf->pdev->dev,
4747 "Failed configuring TC for VSI seid=%d\n",
4749 /* Will try to configure as many components */
4751 /* Re-configure VSI vectors based on updated TC map */
4752 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4753 if (pf->vsi[v]->netdev)
4754 i40e_dcbnl_set_all(pf->vsi[v]);
4760 * i40e_resume_port_tx - Resume port Tx
4763 * Resume a port's Tx and issue a PF reset in case of failure to
4766 static int i40e_resume_port_tx(struct i40e_pf *pf)
4768 struct i40e_hw *hw = &pf->hw;
4771 ret = i40e_aq_resume_port_tx(hw, NULL);
4773 dev_info(&pf->pdev->dev,
4774 "Resume Port Tx failed, err %s aq_err %s\n",
4775 i40e_stat_str(&pf->hw, ret),
4776 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4777 /* Schedule PF reset to recover */
4778 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4779 i40e_service_event_schedule(pf);
4786 * i40e_init_pf_dcb - Initialize DCB configuration
4787 * @pf: PF being configured
4789 * Query the current DCB configuration and cache it
4790 * in the hardware structure
4792 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4794 struct i40e_hw *hw = &pf->hw;
4797 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4798 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4799 (pf->hw.aq.fw_maj_ver < 4))
4802 /* Get the initial DCB configuration */
4803 err = i40e_init_dcb(hw);
4805 /* Device/Function is not DCBX capable */
4806 if ((!hw->func_caps.dcb) ||
4807 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4808 dev_info(&pf->pdev->dev,
4809 "DCBX offload is not supported or is disabled for this PF.\n");
4811 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4815 /* When status is not DISABLED then DCBX in FW */
4816 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4817 DCB_CAP_DCBX_VER_IEEE;
4819 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4820 /* Enable DCB tagging only when more than one TC */
4821 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4822 pf->flags |= I40E_FLAG_DCB_ENABLED;
4823 dev_dbg(&pf->pdev->dev,
4824 "DCBX offload is supported for this PF.\n");
4827 dev_info(&pf->pdev->dev,
4828 "Query for DCB configuration failed, err %s aq_err %s\n",
4829 i40e_stat_str(&pf->hw, err),
4830 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4836 #endif /* CONFIG_I40E_DCB */
4837 #define SPEED_SIZE 14
4840 * i40e_print_link_message - print link up or down
4841 * @vsi: the VSI for which link needs a message
4843 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4845 char *speed = "Unknown";
4846 char *fc = "Unknown";
4848 if (vsi->current_isup == isup)
4850 vsi->current_isup = isup;
4852 netdev_info(vsi->netdev, "NIC Link is Down\n");
4856 /* Warn user if link speed on NPAR enabled partition is not at
4859 if (vsi->back->hw.func_caps.npar_enable &&
4860 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4861 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4862 netdev_warn(vsi->netdev,
4863 "The partition detected link speed that is less than 10Gbps\n");
4865 switch (vsi->back->hw.phy.link_info.link_speed) {
4866 case I40E_LINK_SPEED_40GB:
4869 case I40E_LINK_SPEED_20GB:
4872 case I40E_LINK_SPEED_10GB:
4875 case I40E_LINK_SPEED_1GB:
4878 case I40E_LINK_SPEED_100MB:
4885 switch (vsi->back->hw.fc.current_mode) {
4889 case I40E_FC_TX_PAUSE:
4892 case I40E_FC_RX_PAUSE:
4900 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
4905 * i40e_up_complete - Finish the last steps of bringing up a connection
4906 * @vsi: the VSI being configured
4908 static int i40e_up_complete(struct i40e_vsi *vsi)
4910 struct i40e_pf *pf = vsi->back;
4913 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4914 i40e_vsi_configure_msix(vsi);
4916 i40e_configure_msi_and_legacy(vsi);
4919 err = i40e_vsi_control_rings(vsi, true);
4923 clear_bit(__I40E_DOWN, &vsi->state);
4924 i40e_napi_enable_all(vsi);
4925 i40e_vsi_enable_irq(vsi);
4927 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4929 i40e_print_link_message(vsi, true);
4930 netif_tx_start_all_queues(vsi->netdev);
4931 netif_carrier_on(vsi->netdev);
4932 } else if (vsi->netdev) {
4933 i40e_print_link_message(vsi, false);
4934 /* need to check for qualified module here*/
4935 if ((pf->hw.phy.link_info.link_info &
4936 I40E_AQ_MEDIA_AVAILABLE) &&
4937 (!(pf->hw.phy.link_info.an_info &
4938 I40E_AQ_QUALIFIED_MODULE)))
4939 netdev_err(vsi->netdev,
4940 "the driver failed to link because an unqualified module was detected.");
4943 /* replay FDIR SB filters */
4944 if (vsi->type == I40E_VSI_FDIR) {
4945 /* reset fd counters */
4946 pf->fd_add_err = pf->fd_atr_cnt = 0;
4947 if (pf->fd_tcp_rule > 0) {
4948 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4949 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4950 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4951 pf->fd_tcp_rule = 0;
4953 i40e_fdir_filter_restore(vsi);
4955 i40e_service_event_schedule(pf);
4961 * i40e_vsi_reinit_locked - Reset the VSI
4962 * @vsi: the VSI being configured
4964 * Rebuild the ring structs after some configuration
4965 * has changed, e.g. MTU size.
4967 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4969 struct i40e_pf *pf = vsi->back;
4971 WARN_ON(in_interrupt());
4972 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4973 usleep_range(1000, 2000);
4976 /* Give a VF some time to respond to the reset. The
4977 * two second wait is based upon the watchdog cycle in
4980 if (vsi->type == I40E_VSI_SRIOV)
4983 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4987 * i40e_up - Bring the connection back up after being down
4988 * @vsi: the VSI being configured
4990 int i40e_up(struct i40e_vsi *vsi)
4994 err = i40e_vsi_configure(vsi);
4996 err = i40e_up_complete(vsi);
5002 * i40e_down - Shutdown the connection processing
5003 * @vsi: the VSI being stopped
5005 void i40e_down(struct i40e_vsi *vsi)
5009 /* It is assumed that the caller of this function
5010 * sets the vsi->state __I40E_DOWN bit.
5013 netif_carrier_off(vsi->netdev);
5014 netif_tx_disable(vsi->netdev);
5016 i40e_vsi_disable_irq(vsi);
5017 i40e_vsi_control_rings(vsi, false);
5018 i40e_napi_disable_all(vsi);
5020 for (i = 0; i < vsi->num_queue_pairs; i++) {
5021 i40e_clean_tx_ring(vsi->tx_rings[i]);
5022 i40e_clean_rx_ring(vsi->rx_rings[i]);
5027 * i40e_setup_tc - configure multiple traffic classes
5028 * @netdev: net device to configure
5029 * @tc: number of traffic classes to enable
5032 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5034 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5037 struct i40e_netdev_priv *np = netdev_priv(netdev);
5038 struct i40e_vsi *vsi = np->vsi;
5039 struct i40e_pf *pf = vsi->back;
5044 /* Check if DCB enabled to continue */
5045 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5046 netdev_info(netdev, "DCB is not enabled for adapter\n");
5050 /* Check if MFP enabled */
5051 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5052 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5056 /* Check whether tc count is within enabled limit */
5057 if (tc > i40e_pf_get_num_tc(pf)) {
5058 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5062 /* Generate TC map for number of tc requested */
5063 for (i = 0; i < tc; i++)
5064 enabled_tc |= BIT_ULL(i);
5066 /* Requesting same TC configuration as already enabled */
5067 if (enabled_tc == vsi->tc_config.enabled_tc)
5070 /* Quiesce VSI queues */
5071 i40e_quiesce_vsi(vsi);
5073 /* Configure VSI for enabled TCs */
5074 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5076 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5082 i40e_unquiesce_vsi(vsi);
5089 * i40e_open - Called when a network interface is made active
5090 * @netdev: network interface device structure
5092 * The open entry point is called when a network interface is made
5093 * active by the system (IFF_UP). At this point all resources needed
5094 * for transmit and receive operations are allocated, the interrupt
5095 * handler is registered with the OS, the netdev watchdog subtask is
5096 * enabled, and the stack is notified that the interface is ready.
5098 * Returns 0 on success, negative value on failure
5100 int i40e_open(struct net_device *netdev)
5102 struct i40e_netdev_priv *np = netdev_priv(netdev);
5103 struct i40e_vsi *vsi = np->vsi;
5104 struct i40e_pf *pf = vsi->back;
5107 /* disallow open during test or if eeprom is broken */
5108 if (test_bit(__I40E_TESTING, &pf->state) ||
5109 test_bit(__I40E_BAD_EEPROM, &pf->state))
5112 netif_carrier_off(netdev);
5114 err = i40e_vsi_open(vsi);
5118 /* configure global TSO hardware offload settings */
5119 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5120 TCP_FLAG_FIN) >> 16);
5121 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5123 TCP_FLAG_CWR) >> 16);
5124 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5126 #ifdef CONFIG_I40E_VXLAN
5127 vxlan_get_rx_port(netdev);
5135 * @vsi: the VSI to open
5137 * Finish initialization of the VSI.
5139 * Returns 0 on success, negative value on failure
5141 int i40e_vsi_open(struct i40e_vsi *vsi)
5143 struct i40e_pf *pf = vsi->back;
5144 char int_name[I40E_INT_NAME_STR_LEN];
5147 /* allocate descriptors */
5148 err = i40e_vsi_setup_tx_resources(vsi);
5151 err = i40e_vsi_setup_rx_resources(vsi);
5155 err = i40e_vsi_configure(vsi);
5160 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5161 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5162 err = i40e_vsi_request_irq(vsi, int_name);
5166 /* Notify the stack of the actual queue counts. */
5167 err = netif_set_real_num_tx_queues(vsi->netdev,
5168 vsi->num_queue_pairs);
5170 goto err_set_queues;
5172 err = netif_set_real_num_rx_queues(vsi->netdev,
5173 vsi->num_queue_pairs);
5175 goto err_set_queues;
5177 } else if (vsi->type == I40E_VSI_FDIR) {
5178 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5179 dev_driver_string(&pf->pdev->dev),
5180 dev_name(&pf->pdev->dev));
5181 err = i40e_vsi_request_irq(vsi, int_name);
5188 err = i40e_up_complete(vsi);
5190 goto err_up_complete;
5197 i40e_vsi_free_irq(vsi);
5199 i40e_vsi_free_rx_resources(vsi);
5201 i40e_vsi_free_tx_resources(vsi);
5202 if (vsi == pf->vsi[pf->lan_vsi])
5203 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5209 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5210 * @pf: Pointer to PF
5212 * This function destroys the hlist where all the Flow Director
5213 * filters were saved.
5215 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5217 struct i40e_fdir_filter *filter;
5218 struct hlist_node *node2;
5220 hlist_for_each_entry_safe(filter, node2,
5221 &pf->fdir_filter_list, fdir_node) {
5222 hlist_del(&filter->fdir_node);
5225 pf->fdir_pf_active_filters = 0;
5229 * i40e_close - Disables a network interface
5230 * @netdev: network interface device structure
5232 * The close entry point is called when an interface is de-activated
5233 * by the OS. The hardware is still under the driver's control, but
5234 * this netdev interface is disabled.
5236 * Returns 0, this is not allowed to fail
5239 int i40e_close(struct net_device *netdev)
5241 static int i40e_close(struct net_device *netdev)
5244 struct i40e_netdev_priv *np = netdev_priv(netdev);
5245 struct i40e_vsi *vsi = np->vsi;
5247 i40e_vsi_close(vsi);
5253 * i40e_do_reset - Start a PF or Core Reset sequence
5254 * @pf: board private structure
5255 * @reset_flags: which reset is requested
5257 * The essential difference in resets is that the PF Reset
5258 * doesn't clear the packet buffers, doesn't reset the PE
5259 * firmware, and doesn't bother the other PFs on the chip.
5261 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5265 WARN_ON(in_interrupt());
5267 if (i40e_check_asq_alive(&pf->hw))
5268 i40e_vc_notify_reset(pf);
5270 /* do the biggest reset indicated */
5271 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5273 /* Request a Global Reset
5275 * This will start the chip's countdown to the actual full
5276 * chip reset event, and a warning interrupt to be sent
5277 * to all PFs, including the requestor. Our handler
5278 * for the warning interrupt will deal with the shutdown
5279 * and recovery of the switch setup.
5281 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5282 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5283 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5284 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5286 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5288 /* Request a Core Reset
5290 * Same as Global Reset, except does *not* include the MAC/PHY
5292 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5293 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5294 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5295 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5296 i40e_flush(&pf->hw);
5298 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5300 /* Request a PF Reset
5302 * Resets only the PF-specific registers
5304 * This goes directly to the tear-down and rebuild of
5305 * the switch, since we need to do all the recovery as
5306 * for the Core Reset.
5308 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5309 i40e_handle_reset_warning(pf);
5311 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5314 /* Find the VSI(s) that requested a re-init */
5315 dev_info(&pf->pdev->dev,
5316 "VSI reinit requested\n");
5317 for (v = 0; v < pf->num_alloc_vsi; v++) {
5318 struct i40e_vsi *vsi = pf->vsi[v];
5321 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5322 i40e_vsi_reinit_locked(pf->vsi[v]);
5323 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5326 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5329 /* Find the VSI(s) that needs to be brought down */
5330 dev_info(&pf->pdev->dev, "VSI down requested\n");
5331 for (v = 0; v < pf->num_alloc_vsi; v++) {
5332 struct i40e_vsi *vsi = pf->vsi[v];
5335 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5336 set_bit(__I40E_DOWN, &vsi->state);
5338 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5342 dev_info(&pf->pdev->dev,
5343 "bad reset request 0x%08x\n", reset_flags);
5347 #ifdef CONFIG_I40E_DCB
5349 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5350 * @pf: board private structure
5351 * @old_cfg: current DCB config
5352 * @new_cfg: new DCB config
5354 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5355 struct i40e_dcbx_config *old_cfg,
5356 struct i40e_dcbx_config *new_cfg)
5358 bool need_reconfig = false;
5360 /* Check if ETS configuration has changed */
5361 if (memcmp(&new_cfg->etscfg,
5363 sizeof(new_cfg->etscfg))) {
5364 /* If Priority Table has changed reconfig is needed */
5365 if (memcmp(&new_cfg->etscfg.prioritytable,
5366 &old_cfg->etscfg.prioritytable,
5367 sizeof(new_cfg->etscfg.prioritytable))) {
5368 need_reconfig = true;
5369 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5372 if (memcmp(&new_cfg->etscfg.tcbwtable,
5373 &old_cfg->etscfg.tcbwtable,
5374 sizeof(new_cfg->etscfg.tcbwtable)))
5375 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5377 if (memcmp(&new_cfg->etscfg.tsatable,
5378 &old_cfg->etscfg.tsatable,
5379 sizeof(new_cfg->etscfg.tsatable)))
5380 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5383 /* Check if PFC configuration has changed */
5384 if (memcmp(&new_cfg->pfc,
5386 sizeof(new_cfg->pfc))) {
5387 need_reconfig = true;
5388 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5391 /* Check if APP Table has changed */
5392 if (memcmp(&new_cfg->app,
5394 sizeof(new_cfg->app))) {
5395 need_reconfig = true;
5396 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5399 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5400 return need_reconfig;
5404 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5405 * @pf: board private structure
5406 * @e: event info posted on ARQ
5408 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5409 struct i40e_arq_event_info *e)
5411 struct i40e_aqc_lldp_get_mib *mib =
5412 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5413 struct i40e_hw *hw = &pf->hw;
5414 struct i40e_dcbx_config tmp_dcbx_cfg;
5415 bool need_reconfig = false;
5419 /* Not DCB capable or capability disabled */
5420 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5423 /* Ignore if event is not for Nearest Bridge */
5424 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5425 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5426 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5427 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5430 /* Check MIB Type and return if event for Remote MIB update */
5431 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5432 dev_dbg(&pf->pdev->dev,
5433 "LLDP event mib type %s\n", type ? "remote" : "local");
5434 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5435 /* Update the remote cached instance and return */
5436 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5437 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5438 &hw->remote_dcbx_config);
5442 /* Store the old configuration */
5443 tmp_dcbx_cfg = hw->local_dcbx_config;
5445 /* Reset the old DCBx configuration data */
5446 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5447 /* Get updated DCBX data from firmware */
5448 ret = i40e_get_dcb_config(&pf->hw);
5450 dev_info(&pf->pdev->dev,
5451 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5452 i40e_stat_str(&pf->hw, ret),
5453 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5457 /* No change detected in DCBX configs */
5458 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5459 sizeof(tmp_dcbx_cfg))) {
5460 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5464 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5465 &hw->local_dcbx_config);
5467 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5472 /* Enable DCB tagging only when more than one TC */
5473 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5474 pf->flags |= I40E_FLAG_DCB_ENABLED;
5476 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5478 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5479 /* Reconfiguration needed quiesce all VSIs */
5480 i40e_pf_quiesce_all_vsi(pf);
5482 /* Changes in configuration update VEB/VSI */
5483 i40e_dcb_reconfigure(pf);
5485 ret = i40e_resume_port_tx(pf);
5487 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5488 /* In case of error no point in resuming VSIs */
5492 /* Wait for the PF's Tx queues to be disabled */
5493 ret = i40e_pf_wait_txq_disabled(pf);
5495 /* Schedule PF reset to recover */
5496 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5497 i40e_service_event_schedule(pf);
5499 i40e_pf_unquiesce_all_vsi(pf);
5505 #endif /* CONFIG_I40E_DCB */
5508 * i40e_do_reset_safe - Protected reset path for userland calls.
5509 * @pf: board private structure
5510 * @reset_flags: which reset is requested
5513 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5516 i40e_do_reset(pf, reset_flags);
5521 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5522 * @pf: board private structure
5523 * @e: event info posted on ARQ
5525 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5528 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5529 struct i40e_arq_event_info *e)
5531 struct i40e_aqc_lan_overflow *data =
5532 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5533 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5534 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5535 struct i40e_hw *hw = &pf->hw;
5539 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5542 /* Queue belongs to VF, find the VF and issue VF reset */
5543 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5544 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5545 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5546 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5547 vf_id -= hw->func_caps.vf_base_id;
5548 vf = &pf->vf[vf_id];
5549 i40e_vc_notify_vf_reset(vf);
5550 /* Allow VF to process pending reset notification */
5552 i40e_reset_vf(vf, false);
5557 * i40e_service_event_complete - Finish up the service event
5558 * @pf: board private structure
5560 static void i40e_service_event_complete(struct i40e_pf *pf)
5562 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5564 /* flush memory to make sure state is correct before next watchog */
5565 smp_mb__before_atomic();
5566 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5570 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5571 * @pf: board private structure
5573 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5577 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5578 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5583 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5584 * @pf: board private structure
5586 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5590 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5591 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5592 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5593 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5598 * i40e_get_global_fd_count - Get total FD filters programmed on device
5599 * @pf: board private structure
5601 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5605 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5606 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5607 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5608 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5613 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5614 * @pf: board private structure
5616 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5618 struct i40e_fdir_filter *filter;
5619 u32 fcnt_prog, fcnt_avail;
5620 struct hlist_node *node;
5622 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5625 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5628 fcnt_prog = i40e_get_global_fd_count(pf);
5629 fcnt_avail = pf->fdir_pf_filter_count;
5630 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5631 (pf->fd_add_err == 0) ||
5632 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5633 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5634 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5635 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5636 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5637 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5640 /* Wait for some more space to be available to turn on ATR */
5641 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5642 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5643 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5644 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5645 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5646 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5650 /* if hw had a problem adding a filter, delete it */
5651 if (pf->fd_inv > 0) {
5652 hlist_for_each_entry_safe(filter, node,
5653 &pf->fdir_filter_list, fdir_node) {
5654 if (filter->fd_id == pf->fd_inv) {
5655 hlist_del(&filter->fdir_node);
5657 pf->fdir_pf_active_filters--;
5663 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5664 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5666 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5667 * @pf: board private structure
5669 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5671 unsigned long min_flush_time;
5672 int flush_wait_retry = 50;
5673 bool disable_atr = false;
5677 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5680 if (!time_after(jiffies, pf->fd_flush_timestamp +
5681 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5684 /* If the flush is happening too quick and we have mostly SB rules we
5685 * should not re-enable ATR for some time.
5687 min_flush_time = pf->fd_flush_timestamp +
5688 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5689 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5691 if (!(time_after(jiffies, min_flush_time)) &&
5692 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5693 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5694 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5698 pf->fd_flush_timestamp = jiffies;
5699 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5700 /* flush all filters */
5701 wr32(&pf->hw, I40E_PFQF_CTL_1,
5702 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5703 i40e_flush(&pf->hw);
5707 /* Check FD flush status every 5-6msec */
5708 usleep_range(5000, 6000);
5709 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5710 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5712 } while (flush_wait_retry--);
5713 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5714 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5716 /* replay sideband filters */
5717 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5719 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5720 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5721 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5722 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5728 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5729 * @pf: board private structure
5731 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5733 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5736 /* We can see up to 256 filter programming desc in transit if the filters are
5737 * being applied really fast; before we see the first
5738 * filter miss error on Rx queue 0. Accumulating enough error messages before
5739 * reacting will make sure we don't cause flush too often.
5741 #define I40E_MAX_FD_PROGRAM_ERROR 256
5744 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5745 * @pf: board private structure
5747 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5750 /* if interface is down do nothing */
5751 if (test_bit(__I40E_DOWN, &pf->state))
5754 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5757 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5758 i40e_fdir_flush_and_replay(pf);
5760 i40e_fdir_check_and_reenable(pf);
5765 * i40e_vsi_link_event - notify VSI of a link event
5766 * @vsi: vsi to be notified
5767 * @link_up: link up or down
5769 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5771 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5774 switch (vsi->type) {
5779 if (!vsi->netdev || !vsi->netdev_registered)
5783 netif_carrier_on(vsi->netdev);
5784 netif_tx_wake_all_queues(vsi->netdev);
5786 netif_carrier_off(vsi->netdev);
5787 netif_tx_stop_all_queues(vsi->netdev);
5791 case I40E_VSI_SRIOV:
5792 case I40E_VSI_VMDQ2:
5794 case I40E_VSI_MIRROR:
5796 /* there is no notification for other VSIs */
5802 * i40e_veb_link_event - notify elements on the veb of a link event
5803 * @veb: veb to be notified
5804 * @link_up: link up or down
5806 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5811 if (!veb || !veb->pf)
5815 /* depth first... */
5816 for (i = 0; i < I40E_MAX_VEB; i++)
5817 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5818 i40e_veb_link_event(pf->veb[i], link_up);
5820 /* ... now the local VSIs */
5821 for (i = 0; i < pf->num_alloc_vsi; i++)
5822 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5823 i40e_vsi_link_event(pf->vsi[i], link_up);
5827 * i40e_link_event - Update netif_carrier status
5828 * @pf: board private structure
5830 static void i40e_link_event(struct i40e_pf *pf)
5832 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5833 u8 new_link_speed, old_link_speed;
5835 bool new_link, old_link;
5837 /* set this to force the get_link_status call to refresh state */
5838 pf->hw.phy.get_link_info = true;
5840 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5842 status = i40e_get_link_status(&pf->hw, &new_link);
5844 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
5849 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5850 new_link_speed = pf->hw.phy.link_info.link_speed;
5852 if (new_link == old_link &&
5853 new_link_speed == old_link_speed &&
5854 (test_bit(__I40E_DOWN, &vsi->state) ||
5855 new_link == netif_carrier_ok(vsi->netdev)))
5858 if (!test_bit(__I40E_DOWN, &vsi->state))
5859 i40e_print_link_message(vsi, new_link);
5861 /* Notify the base of the switch tree connected to
5862 * the link. Floating VEBs are not notified.
5864 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5865 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5867 i40e_vsi_link_event(vsi, new_link);
5870 i40e_vc_notify_link_state(pf);
5872 if (pf->flags & I40E_FLAG_PTP)
5873 i40e_ptp_set_increment(pf);
5877 * i40e_watchdog_subtask - periodic checks not using event driven response
5878 * @pf: board private structure
5880 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5884 /* if interface is down do nothing */
5885 if (test_bit(__I40E_DOWN, &pf->state) ||
5886 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5889 /* make sure we don't do these things too often */
5890 if (time_before(jiffies, (pf->service_timer_previous +
5891 pf->service_timer_period)))
5893 pf->service_timer_previous = jiffies;
5895 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
5896 i40e_link_event(pf);
5898 /* Update the stats for active netdevs so the network stack
5899 * can look at updated numbers whenever it cares to
5901 for (i = 0; i < pf->num_alloc_vsi; i++)
5902 if (pf->vsi[i] && pf->vsi[i]->netdev)
5903 i40e_update_stats(pf->vsi[i]);
5905 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
5906 /* Update the stats for the active switching components */
5907 for (i = 0; i < I40E_MAX_VEB; i++)
5909 i40e_update_veb_stats(pf->veb[i]);
5912 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5916 * i40e_reset_subtask - Set up for resetting the device and driver
5917 * @pf: board private structure
5919 static void i40e_reset_subtask(struct i40e_pf *pf)
5921 u32 reset_flags = 0;
5924 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5925 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5926 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5928 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5929 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5930 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5932 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5933 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5934 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5936 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5937 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5938 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5940 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5941 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5942 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5945 /* If there's a recovery already waiting, it takes
5946 * precedence before starting a new reset sequence.
5948 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5949 i40e_handle_reset_warning(pf);
5953 /* If we're already down or resetting, just bail */
5955 !test_bit(__I40E_DOWN, &pf->state) &&
5956 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5957 i40e_do_reset(pf, reset_flags);
5964 * i40e_handle_link_event - Handle link event
5965 * @pf: board private structure
5966 * @e: event info posted on ARQ
5968 static void i40e_handle_link_event(struct i40e_pf *pf,
5969 struct i40e_arq_event_info *e)
5971 struct i40e_hw *hw = &pf->hw;
5972 struct i40e_aqc_get_link_status *status =
5973 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5975 /* save off old link status information */
5976 hw->phy.link_info_old = hw->phy.link_info;
5978 /* Do a new status request to re-enable LSE reporting
5979 * and load new status information into the hw struct
5980 * This completely ignores any state information
5981 * in the ARQ event info, instead choosing to always
5982 * issue the AQ update link status command.
5984 i40e_link_event(pf);
5986 /* check for unqualified module, if link is down */
5987 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5988 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5989 (!(status->link_info & I40E_AQ_LINK_UP)))
5990 dev_err(&pf->pdev->dev,
5991 "The driver failed to link because an unqualified module was detected.\n");
5995 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5996 * @pf: board private structure
5998 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6000 struct i40e_arq_event_info event;
6001 struct i40e_hw *hw = &pf->hw;
6008 /* Do not run clean AQ when PF reset fails */
6009 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6012 /* check for error indications */
6013 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6015 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6016 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6017 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6019 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6020 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6021 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6023 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6024 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6025 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6028 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6030 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6032 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6033 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6034 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6036 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6037 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6038 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6040 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6041 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6042 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6045 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6047 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6048 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6053 ret = i40e_clean_arq_element(hw, &event, &pending);
6054 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6057 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6061 opcode = le16_to_cpu(event.desc.opcode);
6064 case i40e_aqc_opc_get_link_status:
6065 i40e_handle_link_event(pf, &event);
6067 case i40e_aqc_opc_send_msg_to_pf:
6068 ret = i40e_vc_process_vf_msg(pf,
6069 le16_to_cpu(event.desc.retval),
6070 le32_to_cpu(event.desc.cookie_high),
6071 le32_to_cpu(event.desc.cookie_low),
6075 case i40e_aqc_opc_lldp_update_mib:
6076 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6077 #ifdef CONFIG_I40E_DCB
6079 ret = i40e_handle_lldp_event(pf, &event);
6081 #endif /* CONFIG_I40E_DCB */
6083 case i40e_aqc_opc_event_lan_overflow:
6084 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6085 i40e_handle_lan_overflow_event(pf, &event);
6087 case i40e_aqc_opc_send_msg_to_peer:
6088 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6090 case i40e_aqc_opc_nvm_erase:
6091 case i40e_aqc_opc_nvm_update:
6092 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6095 dev_info(&pf->pdev->dev,
6096 "ARQ Error: Unknown event 0x%04x received\n",
6100 } while (pending && (i++ < pf->adminq_work_limit));
6102 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6103 /* re-enable Admin queue interrupt cause */
6104 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6105 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6106 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6109 kfree(event.msg_buf);
6113 * i40e_verify_eeprom - make sure eeprom is good to use
6114 * @pf: board private structure
6116 static void i40e_verify_eeprom(struct i40e_pf *pf)
6120 err = i40e_diag_eeprom_test(&pf->hw);
6122 /* retry in case of garbage read */
6123 err = i40e_diag_eeprom_test(&pf->hw);
6125 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6127 set_bit(__I40E_BAD_EEPROM, &pf->state);
6131 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6132 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6133 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6138 * i40e_enable_pf_switch_lb
6139 * @pf: pointer to the PF structure
6141 * enable switch loop back or die - no point in a return value
6143 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6145 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6146 struct i40e_vsi_context ctxt;
6149 ctxt.seid = pf->main_vsi_seid;
6150 ctxt.pf_num = pf->hw.pf_id;
6152 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6154 dev_info(&pf->pdev->dev,
6155 "couldn't get PF vsi config, err %s aq_err %s\n",
6156 i40e_stat_str(&pf->hw, ret),
6157 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6160 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6161 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6162 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6164 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6166 dev_info(&pf->pdev->dev,
6167 "update vsi switch failed, err %s aq_err %s\n",
6168 i40e_stat_str(&pf->hw, ret),
6169 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6174 * i40e_disable_pf_switch_lb
6175 * @pf: pointer to the PF structure
6177 * disable switch loop back or die - no point in a return value
6179 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6181 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6182 struct i40e_vsi_context ctxt;
6185 ctxt.seid = pf->main_vsi_seid;
6186 ctxt.pf_num = pf->hw.pf_id;
6188 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6190 dev_info(&pf->pdev->dev,
6191 "couldn't get PF vsi config, err %s aq_err %s\n",
6192 i40e_stat_str(&pf->hw, ret),
6193 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6196 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6197 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6198 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6200 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6202 dev_info(&pf->pdev->dev,
6203 "update vsi switch failed, err %s aq_err %s\n",
6204 i40e_stat_str(&pf->hw, ret),
6205 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6210 * i40e_config_bridge_mode - Configure the HW bridge mode
6211 * @veb: pointer to the bridge instance
6213 * Configure the loop back mode for the LAN VSI that is downlink to the
6214 * specified HW bridge instance. It is expected this function is called
6215 * when a new HW bridge is instantiated.
6217 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6219 struct i40e_pf *pf = veb->pf;
6221 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6222 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6223 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6224 i40e_disable_pf_switch_lb(pf);
6226 i40e_enable_pf_switch_lb(pf);
6230 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6231 * @veb: pointer to the VEB instance
6233 * This is a recursive function that first builds the attached VSIs then
6234 * recurses in to build the next layer of VEB. We track the connections
6235 * through our own index numbers because the seid's from the HW could
6236 * change across the reset.
6238 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6240 struct i40e_vsi *ctl_vsi = NULL;
6241 struct i40e_pf *pf = veb->pf;
6245 /* build VSI that owns this VEB, temporarily attached to base VEB */
6246 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6248 pf->vsi[v]->veb_idx == veb->idx &&
6249 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6250 ctl_vsi = pf->vsi[v];
6255 dev_info(&pf->pdev->dev,
6256 "missing owner VSI for veb_idx %d\n", veb->idx);
6258 goto end_reconstitute;
6260 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6261 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6262 ret = i40e_add_vsi(ctl_vsi);
6264 dev_info(&pf->pdev->dev,
6265 "rebuild of veb_idx %d owner VSI failed: %d\n",
6267 goto end_reconstitute;
6269 i40e_vsi_reset_stats(ctl_vsi);
6271 /* create the VEB in the switch and move the VSI onto the VEB */
6272 ret = i40e_add_veb(veb, ctl_vsi);
6274 goto end_reconstitute;
6276 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6277 veb->bridge_mode = BRIDGE_MODE_VEB;
6279 veb->bridge_mode = BRIDGE_MODE_VEPA;
6280 i40e_config_bridge_mode(veb);
6282 /* create the remaining VSIs attached to this VEB */
6283 for (v = 0; v < pf->num_alloc_vsi; v++) {
6284 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6287 if (pf->vsi[v]->veb_idx == veb->idx) {
6288 struct i40e_vsi *vsi = pf->vsi[v];
6290 vsi->uplink_seid = veb->seid;
6291 ret = i40e_add_vsi(vsi);
6293 dev_info(&pf->pdev->dev,
6294 "rebuild of vsi_idx %d failed: %d\n",
6296 goto end_reconstitute;
6298 i40e_vsi_reset_stats(vsi);
6302 /* create any VEBs attached to this VEB - RECURSION */
6303 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6304 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6305 pf->veb[veb_idx]->uplink_seid = veb->seid;
6306 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6317 * i40e_get_capabilities - get info about the HW
6318 * @pf: the PF struct
6320 static int i40e_get_capabilities(struct i40e_pf *pf)
6322 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6327 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6329 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6333 /* this loads the data into the hw struct for us */
6334 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6336 i40e_aqc_opc_list_func_capabilities,
6338 /* data loaded, buffer no longer needed */
6341 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6342 /* retry with a larger buffer */
6343 buf_len = data_size;
6344 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6345 dev_info(&pf->pdev->dev,
6346 "capability discovery failed, err %s aq_err %s\n",
6347 i40e_stat_str(&pf->hw, err),
6348 i40e_aq_str(&pf->hw,
6349 pf->hw.aq.asq_last_status));
6354 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6355 dev_info(&pf->pdev->dev,
6356 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6357 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6358 pf->hw.func_caps.num_msix_vectors,
6359 pf->hw.func_caps.num_msix_vectors_vf,
6360 pf->hw.func_caps.fd_filters_guaranteed,
6361 pf->hw.func_caps.fd_filters_best_effort,
6362 pf->hw.func_caps.num_tx_qp,
6363 pf->hw.func_caps.num_vsis);
6365 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6366 + pf->hw.func_caps.num_vfs)
6367 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6368 dev_info(&pf->pdev->dev,
6369 "got num_vsis %d, setting num_vsis to %d\n",
6370 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6371 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6377 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6380 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6381 * @pf: board private structure
6383 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6385 struct i40e_vsi *vsi;
6388 /* quick workaround for an NVM issue that leaves a critical register
6391 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6392 static const u32 hkey[] = {
6393 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6394 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6395 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6398 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6399 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6402 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6405 /* find existing VSI and see if it needs configuring */
6407 for (i = 0; i < pf->num_alloc_vsi; i++) {
6408 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6414 /* create a new VSI if none exists */
6416 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6417 pf->vsi[pf->lan_vsi]->seid, 0);
6419 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6420 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6425 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6429 * i40e_fdir_teardown - release the Flow Director resources
6430 * @pf: board private structure
6432 static void i40e_fdir_teardown(struct i40e_pf *pf)
6436 i40e_fdir_filter_exit(pf);
6437 for (i = 0; i < pf->num_alloc_vsi; i++) {
6438 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6439 i40e_vsi_release(pf->vsi[i]);
6446 * i40e_prep_for_reset - prep for the core to reset
6447 * @pf: board private structure
6449 * Close up the VFs and other things in prep for PF Reset.
6451 static void i40e_prep_for_reset(struct i40e_pf *pf)
6453 struct i40e_hw *hw = &pf->hw;
6454 i40e_status ret = 0;
6457 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6458 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6461 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6463 /* quiesce the VSIs and their queues that are not already DOWN */
6464 i40e_pf_quiesce_all_vsi(pf);
6466 for (v = 0; v < pf->num_alloc_vsi; v++) {
6468 pf->vsi[v]->seid = 0;
6471 i40e_shutdown_adminq(&pf->hw);
6473 /* call shutdown HMC */
6474 if (hw->hmc.hmc_obj) {
6475 ret = i40e_shutdown_lan_hmc(hw);
6477 dev_warn(&pf->pdev->dev,
6478 "shutdown_lan_hmc failed: %d\n", ret);
6483 * i40e_send_version - update firmware with driver version
6486 static void i40e_send_version(struct i40e_pf *pf)
6488 struct i40e_driver_version dv;
6490 dv.major_version = DRV_VERSION_MAJOR;
6491 dv.minor_version = DRV_VERSION_MINOR;
6492 dv.build_version = DRV_VERSION_BUILD;
6493 dv.subbuild_version = 0;
6494 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6495 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6499 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6500 * @pf: board private structure
6501 * @reinit: if the Main VSI needs to re-initialized.
6503 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6505 struct i40e_hw *hw = &pf->hw;
6506 u8 set_fc_aq_fail = 0;
6510 /* Now we wait for GRST to settle out.
6511 * We don't have to delete the VEBs or VSIs from the hw switch
6512 * because the reset will make them disappear.
6514 ret = i40e_pf_reset(hw);
6516 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6517 set_bit(__I40E_RESET_FAILED, &pf->state);
6518 goto clear_recovery;
6522 if (test_bit(__I40E_DOWN, &pf->state))
6523 goto clear_recovery;
6524 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6526 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6527 ret = i40e_init_adminq(&pf->hw);
6529 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6530 i40e_stat_str(&pf->hw, ret),
6531 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6532 goto clear_recovery;
6535 /* re-verify the eeprom if we just had an EMP reset */
6536 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6537 i40e_verify_eeprom(pf);
6539 i40e_clear_pxe_mode(hw);
6540 ret = i40e_get_capabilities(pf);
6542 goto end_core_reset;
6544 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6545 hw->func_caps.num_rx_qp,
6546 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6548 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6549 goto end_core_reset;
6551 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6553 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6554 goto end_core_reset;
6557 #ifdef CONFIG_I40E_DCB
6558 ret = i40e_init_pf_dcb(pf);
6560 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6561 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6562 /* Continue without DCB enabled */
6564 #endif /* CONFIG_I40E_DCB */
6566 i40e_init_pf_fcoe(pf);
6569 /* do basic switch setup */
6570 ret = i40e_setup_pf_switch(pf, reinit);
6572 goto end_core_reset;
6574 /* driver is only interested in link up/down and module qualification
6575 * reports from firmware
6577 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6578 I40E_AQ_EVENT_LINK_UPDOWN |
6579 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6581 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6582 i40e_stat_str(&pf->hw, ret),
6583 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6585 /* make sure our flow control settings are restored */
6586 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6588 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6589 i40e_stat_str(&pf->hw, ret),
6590 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6592 /* Rebuild the VSIs and VEBs that existed before reset.
6593 * They are still in our local switch element arrays, so only
6594 * need to rebuild the switch model in the HW.
6596 * If there were VEBs but the reconstitution failed, we'll try
6597 * try to recover minimal use by getting the basic PF VSI working.
6599 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6600 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6601 /* find the one VEB connected to the MAC, and find orphans */
6602 for (v = 0; v < I40E_MAX_VEB; v++) {
6606 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6607 pf->veb[v]->uplink_seid == 0) {
6608 ret = i40e_reconstitute_veb(pf->veb[v]);
6613 /* If Main VEB failed, we're in deep doodoo,
6614 * so give up rebuilding the switch and set up
6615 * for minimal rebuild of PF VSI.
6616 * If orphan failed, we'll report the error
6617 * but try to keep going.
6619 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6620 dev_info(&pf->pdev->dev,
6621 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6623 pf->vsi[pf->lan_vsi]->uplink_seid
6626 } else if (pf->veb[v]->uplink_seid == 0) {
6627 dev_info(&pf->pdev->dev,
6628 "rebuild of orphan VEB failed: %d\n",
6635 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6636 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6637 /* no VEB, so rebuild only the Main VSI */
6638 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6640 dev_info(&pf->pdev->dev,
6641 "rebuild of Main VSI failed: %d\n", ret);
6642 goto end_core_reset;
6646 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6647 (pf->hw.aq.fw_maj_ver < 4)) {
6649 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6651 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6652 i40e_stat_str(&pf->hw, ret),
6653 i40e_aq_str(&pf->hw,
6654 pf->hw.aq.asq_last_status));
6656 /* reinit the misc interrupt */
6657 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6658 ret = i40e_setup_misc_vector(pf);
6660 /* restart the VSIs that were rebuilt and running before the reset */
6661 i40e_pf_unquiesce_all_vsi(pf);
6663 if (pf->num_alloc_vfs) {
6664 for (v = 0; v < pf->num_alloc_vfs; v++)
6665 i40e_reset_vf(&pf->vf[v], true);
6668 /* tell the firmware that we're starting */
6669 i40e_send_version(pf);
6672 clear_bit(__I40E_RESET_FAILED, &pf->state);
6674 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6678 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6679 * @pf: board private structure
6681 * Close up the VFs and other things in prep for a Core Reset,
6682 * then get ready to rebuild the world.
6684 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6686 i40e_prep_for_reset(pf);
6687 i40e_reset_and_rebuild(pf, false);
6691 * i40e_handle_mdd_event
6692 * @pf: pointer to the PF structure
6694 * Called from the MDD irq handler to identify possibly malicious vfs
6696 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6698 struct i40e_hw *hw = &pf->hw;
6699 bool mdd_detected = false;
6700 bool pf_mdd_detected = false;
6705 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6708 /* find what triggered the MDD event */
6709 reg = rd32(hw, I40E_GL_MDET_TX);
6710 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6711 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6712 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6713 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6714 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6715 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6716 I40E_GL_MDET_TX_EVENT_SHIFT;
6717 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6718 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6719 pf->hw.func_caps.base_queue;
6720 if (netif_msg_tx_err(pf))
6721 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6722 event, queue, pf_num, vf_num);
6723 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6724 mdd_detected = true;
6726 reg = rd32(hw, I40E_GL_MDET_RX);
6727 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6728 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6729 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6730 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6731 I40E_GL_MDET_RX_EVENT_SHIFT;
6732 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6733 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6734 pf->hw.func_caps.base_queue;
6735 if (netif_msg_rx_err(pf))
6736 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6737 event, queue, func);
6738 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6739 mdd_detected = true;
6743 reg = rd32(hw, I40E_PF_MDET_TX);
6744 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6745 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6746 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6747 pf_mdd_detected = true;
6749 reg = rd32(hw, I40E_PF_MDET_RX);
6750 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6751 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6752 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6753 pf_mdd_detected = true;
6755 /* Queue belongs to the PF, initiate a reset */
6756 if (pf_mdd_detected) {
6757 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6758 i40e_service_event_schedule(pf);
6762 /* see if one of the VFs needs its hand slapped */
6763 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6765 reg = rd32(hw, I40E_VP_MDET_TX(i));
6766 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6767 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6768 vf->num_mdd_events++;
6769 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6773 reg = rd32(hw, I40E_VP_MDET_RX(i));
6774 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6775 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6776 vf->num_mdd_events++;
6777 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6781 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6782 dev_info(&pf->pdev->dev,
6783 "Too many MDD events on VF %d, disabled\n", i);
6784 dev_info(&pf->pdev->dev,
6785 "Use PF Control I/F to re-enable the VF\n");
6786 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6790 /* re-enable mdd interrupt cause */
6791 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6792 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6793 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6794 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6798 #ifdef CONFIG_I40E_VXLAN
6800 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6801 * @pf: board private structure
6803 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6805 struct i40e_hw *hw = &pf->hw;
6810 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6813 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6815 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6816 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6817 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6818 port = pf->vxlan_ports[i];
6820 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6821 I40E_AQC_TUNNEL_TYPE_VXLAN,
6824 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6827 dev_info(&pf->pdev->dev,
6828 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6829 port ? "add" : "delete",
6831 i40e_stat_str(&pf->hw, ret),
6832 i40e_aq_str(&pf->hw,
6833 pf->hw.aq.asq_last_status));
6834 pf->vxlan_ports[i] = 0;
6842 * i40e_service_task - Run the driver's async subtasks
6843 * @work: pointer to work_struct containing our data
6845 static void i40e_service_task(struct work_struct *work)
6847 struct i40e_pf *pf = container_of(work,
6850 unsigned long start_time = jiffies;
6852 /* don't bother with service tasks if a reset is in progress */
6853 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6854 i40e_service_event_complete(pf);
6858 i40e_detect_recover_hung(pf);
6859 i40e_reset_subtask(pf);
6860 i40e_handle_mdd_event(pf);
6861 i40e_vc_process_vflr_event(pf);
6862 i40e_watchdog_subtask(pf);
6863 i40e_fdir_reinit_subtask(pf);
6864 i40e_sync_filters_subtask(pf);
6865 #ifdef CONFIG_I40E_VXLAN
6866 i40e_sync_vxlan_filters_subtask(pf);
6868 i40e_clean_adminq_subtask(pf);
6870 i40e_service_event_complete(pf);
6872 /* If the tasks have taken longer than one timer cycle or there
6873 * is more work to be done, reschedule the service task now
6874 * rather than wait for the timer to tick again.
6876 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6877 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6878 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6879 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6880 i40e_service_event_schedule(pf);
6884 * i40e_service_timer - timer callback
6885 * @data: pointer to PF struct
6887 static void i40e_service_timer(unsigned long data)
6889 struct i40e_pf *pf = (struct i40e_pf *)data;
6891 mod_timer(&pf->service_timer,
6892 round_jiffies(jiffies + pf->service_timer_period));
6893 i40e_service_event_schedule(pf);
6897 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6898 * @vsi: the VSI being configured
6900 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6902 struct i40e_pf *pf = vsi->back;
6904 switch (vsi->type) {
6906 vsi->alloc_queue_pairs = pf->num_lan_qps;
6907 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6908 I40E_REQ_DESCRIPTOR_MULTIPLE);
6909 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6910 vsi->num_q_vectors = pf->num_lan_msix;
6912 vsi->num_q_vectors = 1;
6917 vsi->alloc_queue_pairs = 1;
6918 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6919 I40E_REQ_DESCRIPTOR_MULTIPLE);
6920 vsi->num_q_vectors = 1;
6923 case I40E_VSI_VMDQ2:
6924 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6925 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6926 I40E_REQ_DESCRIPTOR_MULTIPLE);
6927 vsi->num_q_vectors = pf->num_vmdq_msix;
6930 case I40E_VSI_SRIOV:
6931 vsi->alloc_queue_pairs = pf->num_vf_qps;
6932 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6933 I40E_REQ_DESCRIPTOR_MULTIPLE);
6938 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6939 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6940 I40E_REQ_DESCRIPTOR_MULTIPLE);
6941 vsi->num_q_vectors = pf->num_fcoe_msix;
6944 #endif /* I40E_FCOE */
6954 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6955 * @type: VSI pointer
6956 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6958 * On error: returns error code (negative)
6959 * On success: returns 0
6961 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6966 /* allocate memory for both Tx and Rx ring pointers */
6967 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6968 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6971 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6973 if (alloc_qvectors) {
6974 /* allocate memory for q_vector pointers */
6975 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6976 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6977 if (!vsi->q_vectors) {
6985 kfree(vsi->tx_rings);
6990 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6991 * @pf: board private structure
6992 * @type: type of VSI
6994 * On error: returns error code (negative)
6995 * On success: returns vsi index in PF (positive)
6997 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7000 struct i40e_vsi *vsi;
7004 /* Need to protect the allocation of the VSIs at the PF level */
7005 mutex_lock(&pf->switch_mutex);
7007 /* VSI list may be fragmented if VSI creation/destruction has
7008 * been happening. We can afford to do a quick scan to look
7009 * for any free VSIs in the list.
7011 * find next empty vsi slot, looping back around if necessary
7014 while (i < pf->num_alloc_vsi && pf->vsi[i])
7016 if (i >= pf->num_alloc_vsi) {
7018 while (i < pf->next_vsi && pf->vsi[i])
7022 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7023 vsi_idx = i; /* Found one! */
7026 goto unlock_pf; /* out of VSI slots! */
7030 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7037 set_bit(__I40E_DOWN, &vsi->state);
7040 vsi->rx_itr_setting = pf->rx_itr_default;
7041 vsi->tx_itr_setting = pf->tx_itr_default;
7042 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7043 pf->rss_table_size : 64;
7044 vsi->netdev_registered = false;
7045 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7046 INIT_LIST_HEAD(&vsi->mac_filter_list);
7047 vsi->irqs_ready = false;
7049 ret = i40e_set_num_rings_in_vsi(vsi);
7053 ret = i40e_vsi_alloc_arrays(vsi, true);
7057 /* Setup default MSIX irq handler for VSI */
7058 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7060 pf->vsi[vsi_idx] = vsi;
7065 pf->next_vsi = i - 1;
7068 mutex_unlock(&pf->switch_mutex);
7073 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7074 * @type: VSI pointer
7075 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7077 * On error: returns error code (negative)
7078 * On success: returns 0
7080 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7082 /* free the ring and vector containers */
7083 if (free_qvectors) {
7084 kfree(vsi->q_vectors);
7085 vsi->q_vectors = NULL;
7087 kfree(vsi->tx_rings);
7088 vsi->tx_rings = NULL;
7089 vsi->rx_rings = NULL;
7093 * i40e_vsi_clear - Deallocate the VSI provided
7094 * @vsi: the VSI being un-configured
7096 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7107 mutex_lock(&pf->switch_mutex);
7108 if (!pf->vsi[vsi->idx]) {
7109 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7110 vsi->idx, vsi->idx, vsi, vsi->type);
7114 if (pf->vsi[vsi->idx] != vsi) {
7115 dev_err(&pf->pdev->dev,
7116 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7117 pf->vsi[vsi->idx]->idx,
7119 pf->vsi[vsi->idx]->type,
7120 vsi->idx, vsi, vsi->type);
7124 /* updates the PF for this cleared vsi */
7125 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7126 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7128 i40e_vsi_free_arrays(vsi, true);
7130 pf->vsi[vsi->idx] = NULL;
7131 if (vsi->idx < pf->next_vsi)
7132 pf->next_vsi = vsi->idx;
7135 mutex_unlock(&pf->switch_mutex);
7143 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7144 * @vsi: the VSI being cleaned
7146 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7150 if (vsi->tx_rings && vsi->tx_rings[0]) {
7151 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7152 kfree_rcu(vsi->tx_rings[i], rcu);
7153 vsi->tx_rings[i] = NULL;
7154 vsi->rx_rings[i] = NULL;
7160 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7161 * @vsi: the VSI being configured
7163 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7165 struct i40e_ring *tx_ring, *rx_ring;
7166 struct i40e_pf *pf = vsi->back;
7169 /* Set basic values in the rings to be used later during open() */
7170 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7171 /* allocate space for both Tx and Rx in one shot */
7172 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7176 tx_ring->queue_index = i;
7177 tx_ring->reg_idx = vsi->base_queue + i;
7178 tx_ring->ring_active = false;
7180 tx_ring->netdev = vsi->netdev;
7181 tx_ring->dev = &pf->pdev->dev;
7182 tx_ring->count = vsi->num_desc;
7184 tx_ring->dcb_tc = 0;
7185 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7186 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7187 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7188 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7189 vsi->tx_rings[i] = tx_ring;
7191 rx_ring = &tx_ring[1];
7192 rx_ring->queue_index = i;
7193 rx_ring->reg_idx = vsi->base_queue + i;
7194 rx_ring->ring_active = false;
7196 rx_ring->netdev = vsi->netdev;
7197 rx_ring->dev = &pf->pdev->dev;
7198 rx_ring->count = vsi->num_desc;
7200 rx_ring->dcb_tc = 0;
7201 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7202 set_ring_16byte_desc_enabled(rx_ring);
7204 clear_ring_16byte_desc_enabled(rx_ring);
7205 vsi->rx_rings[i] = rx_ring;
7211 i40e_vsi_clear_rings(vsi);
7216 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7217 * @pf: board private structure
7218 * @vectors: the number of MSI-X vectors to request
7220 * Returns the number of vectors reserved, or error
7222 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7224 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7225 I40E_MIN_MSIX, vectors);
7227 dev_info(&pf->pdev->dev,
7228 "MSI-X vector reservation failed: %d\n", vectors);
7236 * i40e_init_msix - Setup the MSIX capability
7237 * @pf: board private structure
7239 * Work with the OS to set up the MSIX vectors needed.
7241 * Returns the number of vectors reserved or negative on failure
7243 static int i40e_init_msix(struct i40e_pf *pf)
7245 struct i40e_hw *hw = &pf->hw;
7250 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7253 /* The number of vectors we'll request will be comprised of:
7254 * - Add 1 for "other" cause for Admin Queue events, etc.
7255 * - The number of LAN queue pairs
7256 * - Queues being used for RSS.
7257 * We don't need as many as max_rss_size vectors.
7258 * use rss_size instead in the calculation since that
7259 * is governed by number of cpus in the system.
7260 * - assumes symmetric Tx/Rx pairing
7261 * - The number of VMDq pairs
7263 * - The number of FCOE qps.
7265 * Once we count this up, try the request.
7267 * If we can't get what we want, we'll simplify to nearly nothing
7268 * and try again. If that still fails, we punt.
7270 vectors_left = hw->func_caps.num_msix_vectors;
7273 /* reserve one vector for miscellaneous handler */
7279 /* reserve vectors for the main PF traffic queues */
7280 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7281 vectors_left -= pf->num_lan_msix;
7282 v_budget += pf->num_lan_msix;
7284 /* reserve one vector for sideband flow director */
7285 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7290 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7295 /* can we reserve enough for FCoE? */
7296 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7298 pf->num_fcoe_msix = 0;
7299 else if (vectors_left >= pf->num_fcoe_qps)
7300 pf->num_fcoe_msix = pf->num_fcoe_qps;
7302 pf->num_fcoe_msix = 1;
7303 v_budget += pf->num_fcoe_msix;
7304 vectors_left -= pf->num_fcoe_msix;
7308 /* any vectors left over go for VMDq support */
7309 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7310 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7311 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7313 /* if we're short on vectors for what's desired, we limit
7314 * the queues per vmdq. If this is still more than are
7315 * available, the user will need to change the number of
7316 * queues/vectors used by the PF later with the ethtool
7319 if (vmdq_vecs < vmdq_vecs_wanted)
7320 pf->num_vmdq_qps = 1;
7321 pf->num_vmdq_msix = pf->num_vmdq_qps;
7323 v_budget += vmdq_vecs;
7324 vectors_left -= vmdq_vecs;
7327 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7329 if (!pf->msix_entries)
7332 for (i = 0; i < v_budget; i++)
7333 pf->msix_entries[i].entry = i;
7334 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7336 if (v_actual != v_budget) {
7337 /* If we have limited resources, we will start with no vectors
7338 * for the special features and then allocate vectors to some
7339 * of these features based on the policy and at the end disable
7340 * the features that did not get any vectors.
7343 pf->num_fcoe_qps = 0;
7344 pf->num_fcoe_msix = 0;
7346 pf->num_vmdq_msix = 0;
7349 if (v_actual < I40E_MIN_MSIX) {
7350 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7351 kfree(pf->msix_entries);
7352 pf->msix_entries = NULL;
7355 } else if (v_actual == I40E_MIN_MSIX) {
7356 /* Adjust for minimal MSIX use */
7357 pf->num_vmdq_vsis = 0;
7358 pf->num_vmdq_qps = 0;
7359 pf->num_lan_qps = 1;
7360 pf->num_lan_msix = 1;
7362 } else if (v_actual != v_budget) {
7365 /* reserve the misc vector */
7368 /* Scale vector usage down */
7369 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7370 pf->num_vmdq_vsis = 1;
7371 pf->num_vmdq_qps = 1;
7372 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7374 /* partition out the remaining vectors */
7377 pf->num_lan_msix = 1;
7381 /* give one vector to FCoE */
7382 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7383 pf->num_lan_msix = 1;
7384 pf->num_fcoe_msix = 1;
7387 pf->num_lan_msix = 2;
7392 /* give one vector to FCoE */
7393 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7394 pf->num_fcoe_msix = 1;
7398 /* give the rest to the PF */
7399 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7404 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7405 (pf->num_vmdq_msix == 0)) {
7406 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7407 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7411 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7412 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7413 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7420 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7421 * @vsi: the VSI being configured
7422 * @v_idx: index of the vector in the vsi struct
7424 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7426 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7428 struct i40e_q_vector *q_vector;
7430 /* allocate q_vector */
7431 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7435 q_vector->vsi = vsi;
7436 q_vector->v_idx = v_idx;
7437 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7439 netif_napi_add(vsi->netdev, &q_vector->napi,
7440 i40e_napi_poll, NAPI_POLL_WEIGHT);
7442 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7443 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7445 /* tie q_vector and vsi together */
7446 vsi->q_vectors[v_idx] = q_vector;
7452 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7453 * @vsi: the VSI being configured
7455 * We allocate one q_vector per queue interrupt. If allocation fails we
7458 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7460 struct i40e_pf *pf = vsi->back;
7461 int v_idx, num_q_vectors;
7464 /* if not MSIX, give the one vector only to the LAN VSI */
7465 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7466 num_q_vectors = vsi->num_q_vectors;
7467 else if (vsi == pf->vsi[pf->lan_vsi])
7472 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7473 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7482 i40e_free_q_vector(vsi, v_idx);
7488 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7489 * @pf: board private structure to initialize
7491 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7496 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7497 vectors = i40e_init_msix(pf);
7499 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7501 I40E_FLAG_FCOE_ENABLED |
7503 I40E_FLAG_RSS_ENABLED |
7504 I40E_FLAG_DCB_CAPABLE |
7505 I40E_FLAG_SRIOV_ENABLED |
7506 I40E_FLAG_FD_SB_ENABLED |
7507 I40E_FLAG_FD_ATR_ENABLED |
7508 I40E_FLAG_VMDQ_ENABLED);
7510 /* rework the queue expectations without MSIX */
7511 i40e_determine_queue_usage(pf);
7515 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7516 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7517 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7518 vectors = pci_enable_msi(pf->pdev);
7520 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7522 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7524 vectors = 1; /* one MSI or Legacy vector */
7527 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7528 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7530 /* set up vector assignment tracking */
7531 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7532 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7533 if (!pf->irq_pile) {
7534 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7537 pf->irq_pile->num_entries = vectors;
7538 pf->irq_pile->search_hint = 0;
7540 /* track first vector for misc interrupts, ignore return */
7541 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7547 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7548 * @pf: board private structure
7550 * This sets up the handler for MSIX 0, which is used to manage the
7551 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7552 * when in MSI or Legacy interrupt mode.
7554 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7556 struct i40e_hw *hw = &pf->hw;
7559 /* Only request the irq if this is the first time through, and
7560 * not when we're rebuilding after a Reset
7562 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7563 err = request_irq(pf->msix_entries[0].vector,
7564 i40e_intr, 0, pf->int_name, pf);
7566 dev_info(&pf->pdev->dev,
7567 "request_irq for %s failed: %d\n",
7573 i40e_enable_misc_int_causes(pf);
7575 /* associate no queues to the misc vector */
7576 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7577 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7581 i40e_irq_dynamic_enable_icr0(pf);
7587 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7588 * @vsi: vsi structure
7589 * @seed: RSS hash seed
7591 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7593 struct i40e_aqc_get_set_rss_key_data rss_key;
7594 struct i40e_pf *pf = vsi->back;
7595 struct i40e_hw *hw = &pf->hw;
7596 bool pf_lut = false;
7600 memset(&rss_key, 0, sizeof(rss_key));
7601 memcpy(&rss_key, seed, sizeof(rss_key));
7603 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7607 /* Populate the LUT with max no. of queues in round robin fashion */
7608 for (i = 0; i < vsi->rss_table_size; i++)
7609 rss_lut[i] = i % vsi->rss_size;
7611 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7613 dev_info(&pf->pdev->dev,
7614 "Cannot set RSS key, err %s aq_err %s\n",
7615 i40e_stat_str(&pf->hw, ret),
7616 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7617 goto config_rss_aq_out;
7620 if (vsi->type == I40E_VSI_MAIN)
7623 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7624 vsi->rss_table_size);
7626 dev_info(&pf->pdev->dev,
7627 "Cannot set RSS lut, err %s aq_err %s\n",
7628 i40e_stat_str(&pf->hw, ret),
7629 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7637 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7638 * @vsi: VSI structure
7640 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7642 u8 seed[I40E_HKEY_ARRAY_SIZE];
7643 struct i40e_pf *pf = vsi->back;
7645 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7646 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7648 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7649 return i40e_config_rss_aq(vsi, seed);
7655 * i40e_config_rss_reg - Prepare for RSS if used
7656 * @pf: board private structure
7657 * @seed: RSS hash seed
7659 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7661 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7662 struct i40e_hw *hw = &pf->hw;
7663 u32 *seed_dw = (u32 *)seed;
7664 u32 current_queue = 0;
7668 /* Fill out hash function seed */
7669 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7670 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7672 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7674 for (j = 0; j < 4; j++) {
7675 if (current_queue == vsi->rss_size)
7677 lut |= ((current_queue) << (8 * j));
7680 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7688 * i40e_config_rss - Prepare for RSS if used
7689 * @pf: board private structure
7691 static int i40e_config_rss(struct i40e_pf *pf)
7693 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7694 u8 seed[I40E_HKEY_ARRAY_SIZE];
7695 struct i40e_hw *hw = &pf->hw;
7699 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7701 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7702 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7703 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7704 hena |= i40e_pf_get_default_rss_hena(pf);
7706 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7707 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7709 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7711 /* Determine the RSS table size based on the hardware capabilities */
7712 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7713 reg_val = (pf->rss_table_size == 512) ?
7714 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7715 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7716 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7718 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7719 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7721 return i40e_config_rss_reg(pf, seed);
7725 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7726 * @pf: board private structure
7727 * @queue_count: the requested queue count for rss.
7729 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7730 * count which may be different from the requested queue count.
7732 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7734 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7737 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7740 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7742 if (queue_count != vsi->num_queue_pairs) {
7743 vsi->req_queue_pairs = queue_count;
7744 i40e_prep_for_reset(pf);
7746 pf->rss_size = new_rss_size;
7748 i40e_reset_and_rebuild(pf, true);
7749 i40e_config_rss(pf);
7751 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7752 return pf->rss_size;
7756 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7757 * @pf: board private structure
7759 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7762 bool min_valid, max_valid;
7765 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7766 &min_valid, &max_valid);
7770 pf->npar_min_bw = min_bw;
7772 pf->npar_max_bw = max_bw;
7779 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7780 * @pf: board private structure
7782 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7784 struct i40e_aqc_configure_partition_bw_data bw_data;
7787 /* Set the valid bit for this PF */
7788 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7789 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7790 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7792 /* Set the new bandwidths */
7793 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7799 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7800 * @pf: board private structure
7802 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7804 /* Commit temporary BW setting to permanent NVM image */
7805 enum i40e_admin_queue_err last_aq_status;
7809 if (pf->hw.partition_id != 1) {
7810 dev_info(&pf->pdev->dev,
7811 "Commit BW only works on partition 1! This is partition %d",
7812 pf->hw.partition_id);
7813 ret = I40E_NOT_SUPPORTED;
7817 /* Acquire NVM for read access */
7818 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7819 last_aq_status = pf->hw.aq.asq_last_status;
7821 dev_info(&pf->pdev->dev,
7822 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7823 i40e_stat_str(&pf->hw, ret),
7824 i40e_aq_str(&pf->hw, last_aq_status));
7828 /* Read word 0x10 of NVM - SW compatibility word 1 */
7829 ret = i40e_aq_read_nvm(&pf->hw,
7830 I40E_SR_NVM_CONTROL_WORD,
7831 0x10, sizeof(nvm_word), &nvm_word,
7833 /* Save off last admin queue command status before releasing
7836 last_aq_status = pf->hw.aq.asq_last_status;
7837 i40e_release_nvm(&pf->hw);
7839 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7840 i40e_stat_str(&pf->hw, ret),
7841 i40e_aq_str(&pf->hw, last_aq_status));
7845 /* Wait a bit for NVM release to complete */
7848 /* Acquire NVM for write access */
7849 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7850 last_aq_status = pf->hw.aq.asq_last_status;
7852 dev_info(&pf->pdev->dev,
7853 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7854 i40e_stat_str(&pf->hw, ret),
7855 i40e_aq_str(&pf->hw, last_aq_status));
7858 /* Write it back out unchanged to initiate update NVM,
7859 * which will force a write of the shadow (alt) RAM to
7860 * the NVM - thus storing the bandwidth values permanently.
7862 ret = i40e_aq_update_nvm(&pf->hw,
7863 I40E_SR_NVM_CONTROL_WORD,
7864 0x10, sizeof(nvm_word),
7865 &nvm_word, true, NULL);
7866 /* Save off last admin queue command status before releasing
7869 last_aq_status = pf->hw.aq.asq_last_status;
7870 i40e_release_nvm(&pf->hw);
7872 dev_info(&pf->pdev->dev,
7873 "BW settings NOT SAVED, err %s aq_err %s\n",
7874 i40e_stat_str(&pf->hw, ret),
7875 i40e_aq_str(&pf->hw, last_aq_status));
7882 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7883 * @pf: board private structure to initialize
7885 * i40e_sw_init initializes the Adapter private data structure.
7886 * Fields are initialized based on PCI device information and
7887 * OS network device settings (MTU size).
7889 static int i40e_sw_init(struct i40e_pf *pf)
7894 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7895 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7896 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7897 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7898 if (I40E_DEBUG_USER & debug)
7899 pf->hw.debug_mask = debug;
7900 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7901 I40E_DEFAULT_MSG_ENABLE);
7904 /* Set default capability flags */
7905 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7906 I40E_FLAG_MSI_ENABLED |
7907 I40E_FLAG_LINK_POLLING_ENABLED |
7908 I40E_FLAG_MSIX_ENABLED;
7910 if (iommu_present(&pci_bus_type))
7911 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7913 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7915 /* Set default ITR */
7916 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7917 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7919 /* Depending on PF configurations, it is possible that the RSS
7920 * maximum might end up larger than the available queues
7922 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7924 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7925 pf->rss_size_max = min_t(int, pf->rss_size_max,
7926 pf->hw.func_caps.num_tx_qp);
7927 if (pf->hw.func_caps.rss) {
7928 pf->flags |= I40E_FLAG_RSS_ENABLED;
7929 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7932 /* MFP mode enabled */
7933 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7934 pf->flags |= I40E_FLAG_MFP_ENABLED;
7935 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7936 if (i40e_get_npar_bw_setting(pf))
7937 dev_warn(&pf->pdev->dev,
7938 "Could not get NPAR bw settings\n");
7940 dev_info(&pf->pdev->dev,
7941 "Min BW = %8.8x, Max BW = %8.8x\n",
7942 pf->npar_min_bw, pf->npar_max_bw);
7945 /* FW/NVM is not yet fixed in this regard */
7946 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7947 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7948 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7949 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7950 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
7951 pf->hw.num_partitions > 1)
7952 dev_info(&pf->pdev->dev,
7953 "Flow Director Sideband mode Disabled in MFP mode\n");
7955 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7956 pf->fdir_pf_filter_count =
7957 pf->hw.func_caps.fd_filters_guaranteed;
7958 pf->hw.fdir_shared_filter_count =
7959 pf->hw.func_caps.fd_filters_best_effort;
7962 if (pf->hw.func_caps.vmdq) {
7963 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7964 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7968 i40e_init_pf_fcoe(pf);
7970 #endif /* I40E_FCOE */
7971 #ifdef CONFIG_PCI_IOV
7972 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7973 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7974 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7975 pf->num_req_vfs = min_t(int,
7976 pf->hw.func_caps.num_vfs,
7979 #endif /* CONFIG_PCI_IOV */
7980 if (pf->hw.mac.type == I40E_MAC_X722) {
7981 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7982 I40E_FLAG_128_QP_RSS_CAPABLE |
7983 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7984 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7985 I40E_FLAG_WB_ON_ITR_CAPABLE |
7986 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7988 pf->eeprom_version = 0xDEAD;
7989 pf->lan_veb = I40E_NO_VEB;
7990 pf->lan_vsi = I40E_NO_VSI;
7992 /* By default FW has this off for performance reasons */
7993 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
7995 /* set up queue assignment tracking */
7996 size = sizeof(struct i40e_lump_tracking)
7997 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7998 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8003 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8004 pf->qp_pile->search_hint = 0;
8006 pf->tx_timeout_recovery_level = 1;
8008 mutex_init(&pf->switch_mutex);
8010 /* If NPAR is enabled nudge the Tx scheduler */
8011 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8012 i40e_set_npar_bw_setting(pf);
8019 * i40e_set_ntuple - set the ntuple feature flag and take action
8020 * @pf: board private structure to initialize
8021 * @features: the feature set that the stack is suggesting
8023 * returns a bool to indicate if reset needs to happen
8025 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8027 bool need_reset = false;
8029 /* Check if Flow Director n-tuple support was enabled or disabled. If
8030 * the state changed, we need to reset.
8032 if (features & NETIF_F_NTUPLE) {
8033 /* Enable filters and mark for reset */
8034 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8036 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8038 /* turn off filters, mark for reset and clear SW filter list */
8039 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8041 i40e_fdir_filter_exit(pf);
8043 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8044 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8045 /* reset fd counters */
8046 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8047 pf->fdir_pf_active_filters = 0;
8048 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8049 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8050 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8051 /* if ATR was auto disabled it can be re-enabled. */
8052 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8053 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8054 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8060 * i40e_set_features - set the netdev feature flags
8061 * @netdev: ptr to the netdev being adjusted
8062 * @features: the feature set that the stack is suggesting
8064 static int i40e_set_features(struct net_device *netdev,
8065 netdev_features_t features)
8067 struct i40e_netdev_priv *np = netdev_priv(netdev);
8068 struct i40e_vsi *vsi = np->vsi;
8069 struct i40e_pf *pf = vsi->back;
8072 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8073 i40e_vlan_stripping_enable(vsi);
8075 i40e_vlan_stripping_disable(vsi);
8077 need_reset = i40e_set_ntuple(pf, features);
8080 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8085 #ifdef CONFIG_I40E_VXLAN
8087 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8088 * @pf: board private structure
8089 * @port: The UDP port to look up
8091 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8093 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8097 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8098 if (pf->vxlan_ports[i] == port)
8106 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8107 * @netdev: This physical port's netdev
8108 * @sa_family: Socket Family that VXLAN is notifying us about
8109 * @port: New UDP port number that VXLAN started listening to
8111 static void i40e_add_vxlan_port(struct net_device *netdev,
8112 sa_family_t sa_family, __be16 port)
8114 struct i40e_netdev_priv *np = netdev_priv(netdev);
8115 struct i40e_vsi *vsi = np->vsi;
8116 struct i40e_pf *pf = vsi->back;
8120 if (sa_family == AF_INET6)
8123 idx = i40e_get_vxlan_port_idx(pf, port);
8125 /* Check if port already exists */
8126 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8127 netdev_info(netdev, "vxlan port %d already offloaded\n",
8132 /* Now check if there is space to add the new port */
8133 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8135 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8136 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8141 /* New port: add it and mark its index in the bitmap */
8142 pf->vxlan_ports[next_idx] = port;
8143 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8144 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8148 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8149 * @netdev: This physical port's netdev
8150 * @sa_family: Socket Family that VXLAN is notifying us about
8151 * @port: UDP port number that VXLAN stopped listening to
8153 static void i40e_del_vxlan_port(struct net_device *netdev,
8154 sa_family_t sa_family, __be16 port)
8156 struct i40e_netdev_priv *np = netdev_priv(netdev);
8157 struct i40e_vsi *vsi = np->vsi;
8158 struct i40e_pf *pf = vsi->back;
8161 if (sa_family == AF_INET6)
8164 idx = i40e_get_vxlan_port_idx(pf, port);
8166 /* Check if port already exists */
8167 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8168 /* if port exists, set it to 0 (mark for deletion)
8169 * and make it pending
8171 pf->vxlan_ports[idx] = 0;
8172 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8173 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8175 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8181 static int i40e_get_phys_port_id(struct net_device *netdev,
8182 struct netdev_phys_item_id *ppid)
8184 struct i40e_netdev_priv *np = netdev_priv(netdev);
8185 struct i40e_pf *pf = np->vsi->back;
8186 struct i40e_hw *hw = &pf->hw;
8188 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8191 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8192 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8198 * i40e_ndo_fdb_add - add an entry to the hardware database
8199 * @ndm: the input from the stack
8200 * @tb: pointer to array of nladdr (unused)
8201 * @dev: the net device pointer
8202 * @addr: the MAC address entry being added
8203 * @flags: instructions from stack about fdb operation
8205 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8206 struct net_device *dev,
8207 const unsigned char *addr, u16 vid,
8210 struct i40e_netdev_priv *np = netdev_priv(dev);
8211 struct i40e_pf *pf = np->vsi->back;
8214 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8218 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8222 /* Hardware does not support aging addresses so if a
8223 * ndm_state is given only allow permanent addresses
8225 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8226 netdev_info(dev, "FDB only supports static addresses\n");
8230 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8231 err = dev_uc_add_excl(dev, addr);
8232 else if (is_multicast_ether_addr(addr))
8233 err = dev_mc_add_excl(dev, addr);
8237 /* Only return duplicate errors if NLM_F_EXCL is set */
8238 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8245 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8246 * @dev: the netdev being configured
8247 * @nlh: RTNL message
8249 * Inserts a new hardware bridge if not already created and
8250 * enables the bridging mode requested (VEB or VEPA). If the
8251 * hardware bridge has already been inserted and the request
8252 * is to change the mode then that requires a PF reset to
8253 * allow rebuild of the components with required hardware
8254 * bridge mode enabled.
8256 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8257 struct nlmsghdr *nlh,
8260 struct i40e_netdev_priv *np = netdev_priv(dev);
8261 struct i40e_vsi *vsi = np->vsi;
8262 struct i40e_pf *pf = vsi->back;
8263 struct i40e_veb *veb = NULL;
8264 struct nlattr *attr, *br_spec;
8267 /* Only for PF VSI for now */
8268 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8271 /* Find the HW bridge for PF VSI */
8272 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8273 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8277 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8279 nla_for_each_nested(attr, br_spec, rem) {
8282 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8285 mode = nla_get_u16(attr);
8286 if ((mode != BRIDGE_MODE_VEPA) &&
8287 (mode != BRIDGE_MODE_VEB))
8290 /* Insert a new HW bridge */
8292 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8293 vsi->tc_config.enabled_tc);
8295 veb->bridge_mode = mode;
8296 i40e_config_bridge_mode(veb);
8298 /* No Bridge HW offload available */
8302 } else if (mode != veb->bridge_mode) {
8303 /* Existing HW bridge but different mode needs reset */
8304 veb->bridge_mode = mode;
8305 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8306 if (mode == BRIDGE_MODE_VEB)
8307 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8309 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8310 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8319 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8322 * @seq: RTNL message seq #
8323 * @dev: the netdev being configured
8324 * @filter_mask: unused
8325 * @nlflags: netlink flags passed in
8327 * Return the mode in which the hardware bridge is operating in
8330 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8331 struct net_device *dev,
8332 u32 __always_unused filter_mask,
8335 struct i40e_netdev_priv *np = netdev_priv(dev);
8336 struct i40e_vsi *vsi = np->vsi;
8337 struct i40e_pf *pf = vsi->back;
8338 struct i40e_veb *veb = NULL;
8341 /* Only for PF VSI for now */
8342 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8345 /* Find the HW bridge for the PF VSI */
8346 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8347 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8354 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8355 nlflags, 0, 0, filter_mask, NULL);
8358 #define I40E_MAX_TUNNEL_HDR_LEN 80
8360 * i40e_features_check - Validate encapsulated packet conforms to limits
8362 * @netdev: This physical port's netdev
8363 * @features: Offload features that the stack believes apply
8365 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8366 struct net_device *dev,
8367 netdev_features_t features)
8369 if (skb->encapsulation &&
8370 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8371 I40E_MAX_TUNNEL_HDR_LEN))
8372 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8377 static const struct net_device_ops i40e_netdev_ops = {
8378 .ndo_open = i40e_open,
8379 .ndo_stop = i40e_close,
8380 .ndo_start_xmit = i40e_lan_xmit_frame,
8381 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8382 .ndo_set_rx_mode = i40e_set_rx_mode,
8383 .ndo_validate_addr = eth_validate_addr,
8384 .ndo_set_mac_address = i40e_set_mac,
8385 .ndo_change_mtu = i40e_change_mtu,
8386 .ndo_do_ioctl = i40e_ioctl,
8387 .ndo_tx_timeout = i40e_tx_timeout,
8388 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8389 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8390 #ifdef CONFIG_NET_POLL_CONTROLLER
8391 .ndo_poll_controller = i40e_netpoll,
8393 .ndo_setup_tc = i40e_setup_tc,
8395 .ndo_fcoe_enable = i40e_fcoe_enable,
8396 .ndo_fcoe_disable = i40e_fcoe_disable,
8398 .ndo_set_features = i40e_set_features,
8399 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8400 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8401 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8402 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8403 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8404 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8405 #ifdef CONFIG_I40E_VXLAN
8406 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8407 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8409 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8410 .ndo_fdb_add = i40e_ndo_fdb_add,
8411 .ndo_features_check = i40e_features_check,
8412 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8413 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8417 * i40e_config_netdev - Setup the netdev flags
8418 * @vsi: the VSI being configured
8420 * Returns 0 on success, negative value on failure
8422 static int i40e_config_netdev(struct i40e_vsi *vsi)
8424 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8425 struct i40e_pf *pf = vsi->back;
8426 struct i40e_hw *hw = &pf->hw;
8427 struct i40e_netdev_priv *np;
8428 struct net_device *netdev;
8429 u8 mac_addr[ETH_ALEN];
8432 etherdev_size = sizeof(struct i40e_netdev_priv);
8433 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8437 vsi->netdev = netdev;
8438 np = netdev_priv(netdev);
8441 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8442 NETIF_F_GSO_UDP_TUNNEL |
8445 netdev->features = NETIF_F_SG |
8449 NETIF_F_GSO_UDP_TUNNEL |
8450 NETIF_F_HW_VLAN_CTAG_TX |
8451 NETIF_F_HW_VLAN_CTAG_RX |
8452 NETIF_F_HW_VLAN_CTAG_FILTER |
8461 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8462 netdev->features |= NETIF_F_NTUPLE;
8464 /* copy netdev features into list of user selectable features */
8465 netdev->hw_features |= netdev->features;
8467 if (vsi->type == I40E_VSI_MAIN) {
8468 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8469 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8470 /* The following steps are necessary to prevent reception
8471 * of tagged packets - some older NVM configurations load a
8472 * default a MAC-VLAN filter that accepts any tagged packet
8473 * which must be replaced by a normal filter.
8475 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8476 i40e_add_filter(vsi, mac_addr,
8477 I40E_VLAN_ANY, false, true);
8479 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8480 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8481 pf->vsi[pf->lan_vsi]->netdev->name);
8482 random_ether_addr(mac_addr);
8483 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8485 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8487 ether_addr_copy(netdev->dev_addr, mac_addr);
8488 ether_addr_copy(netdev->perm_addr, mac_addr);
8489 /* vlan gets same features (except vlan offload)
8490 * after any tweaks for specific VSI types
8492 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8493 NETIF_F_HW_VLAN_CTAG_RX |
8494 NETIF_F_HW_VLAN_CTAG_FILTER);
8495 netdev->priv_flags |= IFF_UNICAST_FLT;
8496 netdev->priv_flags |= IFF_SUPP_NOFCS;
8497 /* Setup netdev TC information */
8498 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8500 netdev->netdev_ops = &i40e_netdev_ops;
8501 netdev->watchdog_timeo = 5 * HZ;
8502 i40e_set_ethtool_ops(netdev);
8504 i40e_fcoe_config_netdev(netdev, vsi);
8511 * i40e_vsi_delete - Delete a VSI from the switch
8512 * @vsi: the VSI being removed
8514 * Returns 0 on success, negative value on failure
8516 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8518 /* remove default VSI is not allowed */
8519 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8522 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8526 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8527 * @vsi: the VSI being queried
8529 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8531 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8533 struct i40e_veb *veb;
8534 struct i40e_pf *pf = vsi->back;
8536 /* Uplink is not a bridge so default to VEB */
8537 if (vsi->veb_idx == I40E_NO_VEB)
8540 veb = pf->veb[vsi->veb_idx];
8541 /* Uplink is a bridge in VEPA mode */
8542 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8545 /* Uplink is a bridge in VEB mode */
8550 * i40e_add_vsi - Add a VSI to the switch
8551 * @vsi: the VSI being configured
8553 * This initializes a VSI context depending on the VSI type to be added and
8554 * passes it down to the add_vsi aq command.
8556 static int i40e_add_vsi(struct i40e_vsi *vsi)
8559 struct i40e_mac_filter *f, *ftmp;
8560 struct i40e_pf *pf = vsi->back;
8561 struct i40e_hw *hw = &pf->hw;
8562 struct i40e_vsi_context ctxt;
8563 u8 enabled_tc = 0x1; /* TC0 enabled */
8566 memset(&ctxt, 0, sizeof(ctxt));
8567 switch (vsi->type) {
8569 /* The PF's main VSI is already setup as part of the
8570 * device initialization, so we'll not bother with
8571 * the add_vsi call, but we will retrieve the current
8574 ctxt.seid = pf->main_vsi_seid;
8575 ctxt.pf_num = pf->hw.pf_id;
8577 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8578 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8580 dev_info(&pf->pdev->dev,
8581 "couldn't get PF vsi config, err %s aq_err %s\n",
8582 i40e_stat_str(&pf->hw, ret),
8583 i40e_aq_str(&pf->hw,
8584 pf->hw.aq.asq_last_status));
8587 vsi->info = ctxt.info;
8588 vsi->info.valid_sections = 0;
8590 vsi->seid = ctxt.seid;
8591 vsi->id = ctxt.vsi_number;
8593 enabled_tc = i40e_pf_get_tc_map(pf);
8595 /* MFP mode setup queue map and update VSI */
8596 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8597 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8598 memset(&ctxt, 0, sizeof(ctxt));
8599 ctxt.seid = pf->main_vsi_seid;
8600 ctxt.pf_num = pf->hw.pf_id;
8602 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8603 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8605 dev_info(&pf->pdev->dev,
8606 "update vsi failed, err %s aq_err %s\n",
8607 i40e_stat_str(&pf->hw, ret),
8608 i40e_aq_str(&pf->hw,
8609 pf->hw.aq.asq_last_status));
8613 /* update the local VSI info queue map */
8614 i40e_vsi_update_queue_map(vsi, &ctxt);
8615 vsi->info.valid_sections = 0;
8617 /* Default/Main VSI is only enabled for TC0
8618 * reconfigure it to enable all TCs that are
8619 * available on the port in SFP mode.
8620 * For MFP case the iSCSI PF would use this
8621 * flow to enable LAN+iSCSI TC.
8623 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8625 dev_info(&pf->pdev->dev,
8626 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8628 i40e_stat_str(&pf->hw, ret),
8629 i40e_aq_str(&pf->hw,
8630 pf->hw.aq.asq_last_status));
8637 ctxt.pf_num = hw->pf_id;
8639 ctxt.uplink_seid = vsi->uplink_seid;
8640 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8641 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8642 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8643 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8644 ctxt.info.valid_sections |=
8645 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8646 ctxt.info.switch_id =
8647 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8649 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8652 case I40E_VSI_VMDQ2:
8653 ctxt.pf_num = hw->pf_id;
8655 ctxt.uplink_seid = vsi->uplink_seid;
8656 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8657 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8659 /* This VSI is connected to VEB so the switch_id
8660 * should be set to zero by default.
8662 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8663 ctxt.info.valid_sections |=
8664 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8665 ctxt.info.switch_id =
8666 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8669 /* Setup the VSI tx/rx queue map for TC0 only for now */
8670 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8673 case I40E_VSI_SRIOV:
8674 ctxt.pf_num = hw->pf_id;
8675 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8676 ctxt.uplink_seid = vsi->uplink_seid;
8677 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8678 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8680 /* This VSI is connected to VEB so the switch_id
8681 * should be set to zero by default.
8683 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8684 ctxt.info.valid_sections |=
8685 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8686 ctxt.info.switch_id =
8687 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8690 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8691 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8692 if (pf->vf[vsi->vf_id].spoofchk) {
8693 ctxt.info.valid_sections |=
8694 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8695 ctxt.info.sec_flags |=
8696 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8697 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8699 /* Setup the VSI tx/rx queue map for TC0 only for now */
8700 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8705 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8707 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8712 #endif /* I40E_FCOE */
8717 if (vsi->type != I40E_VSI_MAIN) {
8718 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8720 dev_info(&vsi->back->pdev->dev,
8721 "add vsi failed, err %s aq_err %s\n",
8722 i40e_stat_str(&pf->hw, ret),
8723 i40e_aq_str(&pf->hw,
8724 pf->hw.aq.asq_last_status));
8728 vsi->info = ctxt.info;
8729 vsi->info.valid_sections = 0;
8730 vsi->seid = ctxt.seid;
8731 vsi->id = ctxt.vsi_number;
8734 /* If macvlan filters already exist, force them to get loaded */
8735 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8739 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8740 struct i40e_aqc_remove_macvlan_element_data element;
8742 memset(&element, 0, sizeof(element));
8743 ether_addr_copy(element.mac_addr, f->macaddr);
8744 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8745 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8748 /* some older FW has a different default */
8750 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8751 i40e_aq_remove_macvlan(hw, vsi->seid,
8755 i40e_aq_mac_address_write(hw,
8756 I40E_AQC_WRITE_TYPE_LAA_WOL,
8761 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8762 pf->flags |= I40E_FLAG_FILTER_SYNC;
8765 /* Update VSI BW information */
8766 ret = i40e_vsi_get_bw_info(vsi);
8768 dev_info(&pf->pdev->dev,
8769 "couldn't get vsi bw info, err %s aq_err %s\n",
8770 i40e_stat_str(&pf->hw, ret),
8771 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8772 /* VSI is already added so not tearing that up */
8781 * i40e_vsi_release - Delete a VSI and free its resources
8782 * @vsi: the VSI being removed
8784 * Returns 0 on success or < 0 on error
8786 int i40e_vsi_release(struct i40e_vsi *vsi)
8788 struct i40e_mac_filter *f, *ftmp;
8789 struct i40e_veb *veb = NULL;
8796 /* release of a VEB-owner or last VSI is not allowed */
8797 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8798 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8799 vsi->seid, vsi->uplink_seid);
8802 if (vsi == pf->vsi[pf->lan_vsi] &&
8803 !test_bit(__I40E_DOWN, &pf->state)) {
8804 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8808 uplink_seid = vsi->uplink_seid;
8809 if (vsi->type != I40E_VSI_SRIOV) {
8810 if (vsi->netdev_registered) {
8811 vsi->netdev_registered = false;
8813 /* results in a call to i40e_close() */
8814 unregister_netdev(vsi->netdev);
8817 i40e_vsi_close(vsi);
8819 i40e_vsi_disable_irq(vsi);
8822 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8823 i40e_del_filter(vsi, f->macaddr, f->vlan,
8824 f->is_vf, f->is_netdev);
8825 i40e_sync_vsi_filters(vsi, false);
8827 i40e_vsi_delete(vsi);
8828 i40e_vsi_free_q_vectors(vsi);
8830 free_netdev(vsi->netdev);
8833 i40e_vsi_clear_rings(vsi);
8834 i40e_vsi_clear(vsi);
8836 /* If this was the last thing on the VEB, except for the
8837 * controlling VSI, remove the VEB, which puts the controlling
8838 * VSI onto the next level down in the switch.
8840 * Well, okay, there's one more exception here: don't remove
8841 * the orphan VEBs yet. We'll wait for an explicit remove request
8842 * from up the network stack.
8844 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8846 pf->vsi[i]->uplink_seid == uplink_seid &&
8847 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8848 n++; /* count the VSIs */
8851 for (i = 0; i < I40E_MAX_VEB; i++) {
8854 if (pf->veb[i]->uplink_seid == uplink_seid)
8855 n++; /* count the VEBs */
8856 if (pf->veb[i]->seid == uplink_seid)
8859 if (n == 0 && veb && veb->uplink_seid != 0)
8860 i40e_veb_release(veb);
8866 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8867 * @vsi: ptr to the VSI
8869 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8870 * corresponding SW VSI structure and initializes num_queue_pairs for the
8871 * newly allocated VSI.
8873 * Returns 0 on success or negative on failure
8875 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8878 struct i40e_pf *pf = vsi->back;
8880 if (vsi->q_vectors[0]) {
8881 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8886 if (vsi->base_vector) {
8887 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8888 vsi->seid, vsi->base_vector);
8892 ret = i40e_vsi_alloc_q_vectors(vsi);
8894 dev_info(&pf->pdev->dev,
8895 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8896 vsi->num_q_vectors, vsi->seid, ret);
8897 vsi->num_q_vectors = 0;
8898 goto vector_setup_out;
8901 /* In Legacy mode, we do not have to get any other vector since we
8902 * piggyback on the misc/ICR0 for queue interrupts.
8904 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8906 if (vsi->num_q_vectors)
8907 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8908 vsi->num_q_vectors, vsi->idx);
8909 if (vsi->base_vector < 0) {
8910 dev_info(&pf->pdev->dev,
8911 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8912 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8913 i40e_vsi_free_q_vectors(vsi);
8915 goto vector_setup_out;
8923 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8924 * @vsi: pointer to the vsi.
8926 * This re-allocates a vsi's queue resources.
8928 * Returns pointer to the successfully allocated and configured VSI sw struct
8929 * on success, otherwise returns NULL on failure.
8931 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8933 struct i40e_pf *pf = vsi->back;
8937 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8938 i40e_vsi_clear_rings(vsi);
8940 i40e_vsi_free_arrays(vsi, false);
8941 i40e_set_num_rings_in_vsi(vsi);
8942 ret = i40e_vsi_alloc_arrays(vsi, false);
8946 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8948 dev_info(&pf->pdev->dev,
8949 "failed to get tracking for %d queues for VSI %d err %d\n",
8950 vsi->alloc_queue_pairs, vsi->seid, ret);
8953 vsi->base_queue = ret;
8955 /* Update the FW view of the VSI. Force a reset of TC and queue
8956 * layout configurations.
8958 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8959 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8960 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8961 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8963 /* assign it some queues */
8964 ret = i40e_alloc_rings(vsi);
8968 /* map all of the rings to the q_vectors */
8969 i40e_vsi_map_rings_to_vectors(vsi);
8973 i40e_vsi_free_q_vectors(vsi);
8974 if (vsi->netdev_registered) {
8975 vsi->netdev_registered = false;
8976 unregister_netdev(vsi->netdev);
8977 free_netdev(vsi->netdev);
8980 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8982 i40e_vsi_clear(vsi);
8987 * i40e_vsi_setup - Set up a VSI by a given type
8988 * @pf: board private structure
8990 * @uplink_seid: the switch element to link to
8991 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8993 * This allocates the sw VSI structure and its queue resources, then add a VSI
8994 * to the identified VEB.
8996 * Returns pointer to the successfully allocated and configure VSI sw struct on
8997 * success, otherwise returns NULL on failure.
8999 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9000 u16 uplink_seid, u32 param1)
9002 struct i40e_vsi *vsi = NULL;
9003 struct i40e_veb *veb = NULL;
9007 /* The requested uplink_seid must be either
9008 * - the PF's port seid
9009 * no VEB is needed because this is the PF
9010 * or this is a Flow Director special case VSI
9011 * - seid of an existing VEB
9012 * - seid of a VSI that owns an existing VEB
9013 * - seid of a VSI that doesn't own a VEB
9014 * a new VEB is created and the VSI becomes the owner
9015 * - seid of the PF VSI, which is what creates the first VEB
9016 * this is a special case of the previous
9018 * Find which uplink_seid we were given and create a new VEB if needed
9020 for (i = 0; i < I40E_MAX_VEB; i++) {
9021 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9027 if (!veb && uplink_seid != pf->mac_seid) {
9029 for (i = 0; i < pf->num_alloc_vsi; i++) {
9030 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9036 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9041 if (vsi->uplink_seid == pf->mac_seid)
9042 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9043 vsi->tc_config.enabled_tc);
9044 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9045 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9046 vsi->tc_config.enabled_tc);
9048 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9049 dev_info(&vsi->back->pdev->dev,
9050 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9053 /* We come up by default in VEPA mode if SRIOV is not
9054 * already enabled, in which case we can't force VEPA
9057 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9058 veb->bridge_mode = BRIDGE_MODE_VEPA;
9059 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9061 i40e_config_bridge_mode(veb);
9063 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9064 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9068 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9072 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9073 uplink_seid = veb->seid;
9076 /* get vsi sw struct */
9077 v_idx = i40e_vsi_mem_alloc(pf, type);
9080 vsi = pf->vsi[v_idx];
9084 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9086 if (type == I40E_VSI_MAIN)
9087 pf->lan_vsi = v_idx;
9088 else if (type == I40E_VSI_SRIOV)
9089 vsi->vf_id = param1;
9090 /* assign it some queues */
9091 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9094 dev_info(&pf->pdev->dev,
9095 "failed to get tracking for %d queues for VSI %d err=%d\n",
9096 vsi->alloc_queue_pairs, vsi->seid, ret);
9099 vsi->base_queue = ret;
9101 /* get a VSI from the hardware */
9102 vsi->uplink_seid = uplink_seid;
9103 ret = i40e_add_vsi(vsi);
9107 switch (vsi->type) {
9108 /* setup the netdev if needed */
9110 case I40E_VSI_VMDQ2:
9112 ret = i40e_config_netdev(vsi);
9115 ret = register_netdev(vsi->netdev);
9118 vsi->netdev_registered = true;
9119 netif_carrier_off(vsi->netdev);
9120 #ifdef CONFIG_I40E_DCB
9121 /* Setup DCB netlink interface */
9122 i40e_dcbnl_setup(vsi);
9123 #endif /* CONFIG_I40E_DCB */
9127 /* set up vectors and rings if needed */
9128 ret = i40e_vsi_setup_vectors(vsi);
9132 ret = i40e_alloc_rings(vsi);
9136 /* map all of the rings to the q_vectors */
9137 i40e_vsi_map_rings_to_vectors(vsi);
9139 i40e_vsi_reset_stats(vsi);
9143 /* no netdev or rings for the other VSI types */
9147 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9148 (vsi->type == I40E_VSI_VMDQ2)) {
9149 ret = i40e_vsi_config_rss(vsi);
9154 i40e_vsi_free_q_vectors(vsi);
9156 if (vsi->netdev_registered) {
9157 vsi->netdev_registered = false;
9158 unregister_netdev(vsi->netdev);
9159 free_netdev(vsi->netdev);
9163 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9165 i40e_vsi_clear(vsi);
9171 * i40e_veb_get_bw_info - Query VEB BW information
9172 * @veb: the veb to query
9174 * Query the Tx scheduler BW configuration data for given VEB
9176 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9178 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9179 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9180 struct i40e_pf *pf = veb->pf;
9181 struct i40e_hw *hw = &pf->hw;
9186 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9189 dev_info(&pf->pdev->dev,
9190 "query veb bw config failed, err %s aq_err %s\n",
9191 i40e_stat_str(&pf->hw, ret),
9192 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9196 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9199 dev_info(&pf->pdev->dev,
9200 "query veb bw ets config failed, err %s aq_err %s\n",
9201 i40e_stat_str(&pf->hw, ret),
9202 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9206 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9207 veb->bw_max_quanta = ets_data.tc_bw_max;
9208 veb->is_abs_credits = bw_data.absolute_credits_enable;
9209 veb->enabled_tc = ets_data.tc_valid_bits;
9210 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9211 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9212 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9213 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9214 veb->bw_tc_limit_credits[i] =
9215 le16_to_cpu(bw_data.tc_bw_limits[i]);
9216 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9224 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9225 * @pf: board private structure
9227 * On error: returns error code (negative)
9228 * On success: returns vsi index in PF (positive)
9230 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9233 struct i40e_veb *veb;
9236 /* Need to protect the allocation of switch elements at the PF level */
9237 mutex_lock(&pf->switch_mutex);
9239 /* VEB list may be fragmented if VEB creation/destruction has
9240 * been happening. We can afford to do a quick scan to look
9241 * for any free slots in the list.
9243 * find next empty veb slot, looping back around if necessary
9246 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9248 if (i >= I40E_MAX_VEB) {
9250 goto err_alloc_veb; /* out of VEB slots! */
9253 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9260 veb->enabled_tc = 1;
9265 mutex_unlock(&pf->switch_mutex);
9270 * i40e_switch_branch_release - Delete a branch of the switch tree
9271 * @branch: where to start deleting
9273 * This uses recursion to find the tips of the branch to be
9274 * removed, deleting until we get back to and can delete this VEB.
9276 static void i40e_switch_branch_release(struct i40e_veb *branch)
9278 struct i40e_pf *pf = branch->pf;
9279 u16 branch_seid = branch->seid;
9280 u16 veb_idx = branch->idx;
9283 /* release any VEBs on this VEB - RECURSION */
9284 for (i = 0; i < I40E_MAX_VEB; i++) {
9287 if (pf->veb[i]->uplink_seid == branch->seid)
9288 i40e_switch_branch_release(pf->veb[i]);
9291 /* Release the VSIs on this VEB, but not the owner VSI.
9293 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9294 * the VEB itself, so don't use (*branch) after this loop.
9296 for (i = 0; i < pf->num_alloc_vsi; i++) {
9299 if (pf->vsi[i]->uplink_seid == branch_seid &&
9300 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9301 i40e_vsi_release(pf->vsi[i]);
9305 /* There's one corner case where the VEB might not have been
9306 * removed, so double check it here and remove it if needed.
9307 * This case happens if the veb was created from the debugfs
9308 * commands and no VSIs were added to it.
9310 if (pf->veb[veb_idx])
9311 i40e_veb_release(pf->veb[veb_idx]);
9315 * i40e_veb_clear - remove veb struct
9316 * @veb: the veb to remove
9318 static void i40e_veb_clear(struct i40e_veb *veb)
9324 struct i40e_pf *pf = veb->pf;
9326 mutex_lock(&pf->switch_mutex);
9327 if (pf->veb[veb->idx] == veb)
9328 pf->veb[veb->idx] = NULL;
9329 mutex_unlock(&pf->switch_mutex);
9336 * i40e_veb_release - Delete a VEB and free its resources
9337 * @veb: the VEB being removed
9339 void i40e_veb_release(struct i40e_veb *veb)
9341 struct i40e_vsi *vsi = NULL;
9347 /* find the remaining VSI and check for extras */
9348 for (i = 0; i < pf->num_alloc_vsi; i++) {
9349 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9355 dev_info(&pf->pdev->dev,
9356 "can't remove VEB %d with %d VSIs left\n",
9361 /* move the remaining VSI to uplink veb */
9362 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9363 if (veb->uplink_seid) {
9364 vsi->uplink_seid = veb->uplink_seid;
9365 if (veb->uplink_seid == pf->mac_seid)
9366 vsi->veb_idx = I40E_NO_VEB;
9368 vsi->veb_idx = veb->veb_idx;
9371 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9372 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9375 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9376 i40e_veb_clear(veb);
9380 * i40e_add_veb - create the VEB in the switch
9381 * @veb: the VEB to be instantiated
9382 * @vsi: the controlling VSI
9384 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9386 struct i40e_pf *pf = veb->pf;
9387 bool is_default = veb->pf->cur_promisc;
9388 bool is_cloud = false;
9391 /* get a VEB from the hardware */
9392 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9393 veb->enabled_tc, is_default,
9394 is_cloud, &veb->seid, NULL);
9396 dev_info(&pf->pdev->dev,
9397 "couldn't add VEB, err %s aq_err %s\n",
9398 i40e_stat_str(&pf->hw, ret),
9399 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9403 /* get statistics counter */
9404 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9405 &veb->stats_idx, NULL, NULL, NULL);
9407 dev_info(&pf->pdev->dev,
9408 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9409 i40e_stat_str(&pf->hw, ret),
9410 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9413 ret = i40e_veb_get_bw_info(veb);
9415 dev_info(&pf->pdev->dev,
9416 "couldn't get VEB bw info, err %s aq_err %s\n",
9417 i40e_stat_str(&pf->hw, ret),
9418 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9419 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9423 vsi->uplink_seid = veb->seid;
9424 vsi->veb_idx = veb->idx;
9425 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9431 * i40e_veb_setup - Set up a VEB
9432 * @pf: board private structure
9433 * @flags: VEB setup flags
9434 * @uplink_seid: the switch element to link to
9435 * @vsi_seid: the initial VSI seid
9436 * @enabled_tc: Enabled TC bit-map
9438 * This allocates the sw VEB structure and links it into the switch
9439 * It is possible and legal for this to be a duplicate of an already
9440 * existing VEB. It is also possible for both uplink and vsi seids
9441 * to be zero, in order to create a floating VEB.
9443 * Returns pointer to the successfully allocated VEB sw struct on
9444 * success, otherwise returns NULL on failure.
9446 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9447 u16 uplink_seid, u16 vsi_seid,
9450 struct i40e_veb *veb, *uplink_veb = NULL;
9451 int vsi_idx, veb_idx;
9454 /* if one seid is 0, the other must be 0 to create a floating relay */
9455 if ((uplink_seid == 0 || vsi_seid == 0) &&
9456 (uplink_seid + vsi_seid != 0)) {
9457 dev_info(&pf->pdev->dev,
9458 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9459 uplink_seid, vsi_seid);
9463 /* make sure there is such a vsi and uplink */
9464 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9465 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9467 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9468 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9473 if (uplink_seid && uplink_seid != pf->mac_seid) {
9474 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9475 if (pf->veb[veb_idx] &&
9476 pf->veb[veb_idx]->seid == uplink_seid) {
9477 uplink_veb = pf->veb[veb_idx];
9482 dev_info(&pf->pdev->dev,
9483 "uplink seid %d not found\n", uplink_seid);
9488 /* get veb sw struct */
9489 veb_idx = i40e_veb_mem_alloc(pf);
9492 veb = pf->veb[veb_idx];
9494 veb->uplink_seid = uplink_seid;
9495 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9496 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9498 /* create the VEB in the switch */
9499 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9502 if (vsi_idx == pf->lan_vsi)
9503 pf->lan_veb = veb->idx;
9508 i40e_veb_clear(veb);
9514 * i40e_setup_pf_switch_element - set PF vars based on switch type
9515 * @pf: board private structure
9516 * @ele: element we are building info from
9517 * @num_reported: total number of elements
9518 * @printconfig: should we print the contents
9520 * helper function to assist in extracting a few useful SEID values.
9522 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9523 struct i40e_aqc_switch_config_element_resp *ele,
9524 u16 num_reported, bool printconfig)
9526 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9527 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9528 u8 element_type = ele->element_type;
9529 u16 seid = le16_to_cpu(ele->seid);
9532 dev_info(&pf->pdev->dev,
9533 "type=%d seid=%d uplink=%d downlink=%d\n",
9534 element_type, seid, uplink_seid, downlink_seid);
9536 switch (element_type) {
9537 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9538 pf->mac_seid = seid;
9540 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9542 if (uplink_seid != pf->mac_seid)
9544 if (pf->lan_veb == I40E_NO_VEB) {
9547 /* find existing or else empty VEB */
9548 for (v = 0; v < I40E_MAX_VEB; v++) {
9549 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9554 if (pf->lan_veb == I40E_NO_VEB) {
9555 v = i40e_veb_mem_alloc(pf);
9562 pf->veb[pf->lan_veb]->seid = seid;
9563 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9564 pf->veb[pf->lan_veb]->pf = pf;
9565 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9567 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9568 if (num_reported != 1)
9570 /* This is immediately after a reset so we can assume this is
9573 pf->mac_seid = uplink_seid;
9574 pf->pf_seid = downlink_seid;
9575 pf->main_vsi_seid = seid;
9577 dev_info(&pf->pdev->dev,
9578 "pf_seid=%d main_vsi_seid=%d\n",
9579 pf->pf_seid, pf->main_vsi_seid);
9581 case I40E_SWITCH_ELEMENT_TYPE_PF:
9582 case I40E_SWITCH_ELEMENT_TYPE_VF:
9583 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9584 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9585 case I40E_SWITCH_ELEMENT_TYPE_PE:
9586 case I40E_SWITCH_ELEMENT_TYPE_PA:
9587 /* ignore these for now */
9590 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9591 element_type, seid);
9597 * i40e_fetch_switch_configuration - Get switch config from firmware
9598 * @pf: board private structure
9599 * @printconfig: should we print the contents
9601 * Get the current switch configuration from the device and
9602 * extract a few useful SEID values.
9604 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9606 struct i40e_aqc_get_switch_config_resp *sw_config;
9612 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9616 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9618 u16 num_reported, num_total;
9620 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9624 dev_info(&pf->pdev->dev,
9625 "get switch config failed err %s aq_err %s\n",
9626 i40e_stat_str(&pf->hw, ret),
9627 i40e_aq_str(&pf->hw,
9628 pf->hw.aq.asq_last_status));
9633 num_reported = le16_to_cpu(sw_config->header.num_reported);
9634 num_total = le16_to_cpu(sw_config->header.num_total);
9637 dev_info(&pf->pdev->dev,
9638 "header: %d reported %d total\n",
9639 num_reported, num_total);
9641 for (i = 0; i < num_reported; i++) {
9642 struct i40e_aqc_switch_config_element_resp *ele =
9643 &sw_config->element[i];
9645 i40e_setup_pf_switch_element(pf, ele, num_reported,
9648 } while (next_seid != 0);
9655 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9656 * @pf: board private structure
9657 * @reinit: if the Main VSI needs to re-initialized.
9659 * Returns 0 on success, negative value on failure
9661 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9665 /* find out what's out there already */
9666 ret = i40e_fetch_switch_configuration(pf, false);
9668 dev_info(&pf->pdev->dev,
9669 "couldn't fetch switch config, err %s aq_err %s\n",
9670 i40e_stat_str(&pf->hw, ret),
9671 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9674 i40e_pf_reset_stats(pf);
9676 /* first time setup */
9677 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9678 struct i40e_vsi *vsi = NULL;
9681 /* Set up the PF VSI associated with the PF's main VSI
9682 * that is already in the HW switch
9684 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9685 uplink_seid = pf->veb[pf->lan_veb]->seid;
9687 uplink_seid = pf->mac_seid;
9688 if (pf->lan_vsi == I40E_NO_VSI)
9689 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9691 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9693 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9694 i40e_fdir_teardown(pf);
9698 /* force a reset of TC and queue layout configurations */
9699 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9701 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9702 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9703 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9705 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9707 i40e_fdir_sb_setup(pf);
9709 /* Setup static PF queue filter control settings */
9710 ret = i40e_setup_pf_filter_control(pf);
9712 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9714 /* Failure here should not stop continuing other steps */
9717 /* enable RSS in the HW, even for only one queue, as the stack can use
9720 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9721 i40e_config_rss(pf);
9723 /* fill in link information and enable LSE reporting */
9724 i40e_update_link_info(&pf->hw);
9725 i40e_link_event(pf);
9727 /* Initialize user-specific link properties */
9728 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9729 I40E_AQ_AN_COMPLETED) ? true : false);
9737 * i40e_determine_queue_usage - Work out queue distribution
9738 * @pf: board private structure
9740 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9744 pf->num_lan_qps = 0;
9746 pf->num_fcoe_qps = 0;
9749 /* Find the max queues to be put into basic use. We'll always be
9750 * using TC0, whether or not DCB is running, and TC0 will get the
9753 queues_left = pf->hw.func_caps.num_tx_qp;
9755 if ((queues_left == 1) ||
9756 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9757 /* one qp for PF, no queues for anything else */
9759 pf->rss_size = pf->num_lan_qps = 1;
9761 /* make sure all the fancies are disabled */
9762 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9764 I40E_FLAG_FCOE_ENABLED |
9766 I40E_FLAG_FD_SB_ENABLED |
9767 I40E_FLAG_FD_ATR_ENABLED |
9768 I40E_FLAG_DCB_CAPABLE |
9769 I40E_FLAG_SRIOV_ENABLED |
9770 I40E_FLAG_VMDQ_ENABLED);
9771 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9772 I40E_FLAG_FD_SB_ENABLED |
9773 I40E_FLAG_FD_ATR_ENABLED |
9774 I40E_FLAG_DCB_CAPABLE))) {
9776 pf->rss_size = pf->num_lan_qps = 1;
9777 queues_left -= pf->num_lan_qps;
9779 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9781 I40E_FLAG_FCOE_ENABLED |
9783 I40E_FLAG_FD_SB_ENABLED |
9784 I40E_FLAG_FD_ATR_ENABLED |
9785 I40E_FLAG_DCB_ENABLED |
9786 I40E_FLAG_VMDQ_ENABLED);
9788 /* Not enough queues for all TCs */
9789 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9790 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9791 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9792 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9794 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9796 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9797 pf->hw.func_caps.num_tx_qp);
9799 queues_left -= pf->num_lan_qps;
9803 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9804 if (I40E_DEFAULT_FCOE <= queues_left) {
9805 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9806 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9807 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9809 pf->num_fcoe_qps = 0;
9810 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9811 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9814 queues_left -= pf->num_fcoe_qps;
9818 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9819 if (queues_left > 1) {
9820 queues_left -= 1; /* save 1 queue for FD */
9822 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9823 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9827 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9828 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9829 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9830 (queues_left / pf->num_vf_qps));
9831 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9834 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9835 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9836 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9837 (queues_left / pf->num_vmdq_qps));
9838 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9841 pf->queues_left = queues_left;
9842 dev_dbg(&pf->pdev->dev,
9843 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
9844 pf->hw.func_caps.num_tx_qp,
9845 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
9846 pf->num_lan_qps, pf->rss_size, pf->num_req_vfs, pf->num_vf_qps,
9847 pf->num_vmdq_vsis, pf->num_vmdq_qps, queues_left);
9849 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9854 * i40e_setup_pf_filter_control - Setup PF static filter control
9855 * @pf: PF to be setup
9857 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9858 * settings. If PE/FCoE are enabled then it will also set the per PF
9859 * based filter sizes required for them. It also enables Flow director,
9860 * ethertype and macvlan type filter settings for the pf.
9862 * Returns 0 on success, negative on failure
9864 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9866 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9868 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9870 /* Flow Director is enabled */
9871 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9872 settings->enable_fdir = true;
9874 /* Ethtype and MACVLAN filters enabled for PF */
9875 settings->enable_ethtype = true;
9876 settings->enable_macvlan = true;
9878 if (i40e_set_filter_control(&pf->hw, settings))
9884 #define INFO_STRING_LEN 255
9885 static void i40e_print_features(struct i40e_pf *pf)
9887 struct i40e_hw *hw = &pf->hw;
9890 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9892 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9898 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9899 #ifdef CONFIG_PCI_IOV
9900 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9902 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9903 pf->hw.func_caps.num_vsis,
9904 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9905 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9907 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9908 buf += sprintf(buf, "RSS ");
9909 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9910 buf += sprintf(buf, "FD_ATR ");
9911 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9912 buf += sprintf(buf, "FD_SB ");
9913 buf += sprintf(buf, "NTUPLE ");
9915 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9916 buf += sprintf(buf, "DCB ");
9917 #if IS_ENABLED(CONFIG_VXLAN)
9918 buf += sprintf(buf, "VxLAN ");
9920 if (pf->flags & I40E_FLAG_PTP)
9921 buf += sprintf(buf, "PTP ");
9923 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9924 buf += sprintf(buf, "FCOE ");
9927 BUG_ON(buf > (string + INFO_STRING_LEN));
9928 dev_info(&pf->pdev->dev, "%s\n", string);
9933 * i40e_probe - Device initialization routine
9934 * @pdev: PCI device information struct
9935 * @ent: entry in i40e_pci_tbl
9937 * i40e_probe initializes a PF identified by a pci_dev structure.
9938 * The OS initialization, configuring of the PF private structure,
9939 * and a hardware reset occur.
9941 * Returns 0 on success, negative on failure
9943 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9945 struct i40e_aq_get_phy_abilities_resp abilities;
9948 static u16 pfs_found;
9955 err = pci_enable_device_mem(pdev);
9959 /* set up for high or low dma */
9960 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9962 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9965 "DMA configuration failed: 0x%x\n", err);
9970 /* set up pci connections */
9971 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9972 IORESOURCE_MEM), i40e_driver_name);
9974 dev_info(&pdev->dev,
9975 "pci_request_selected_regions failed %d\n", err);
9979 pci_enable_pcie_error_reporting(pdev);
9980 pci_set_master(pdev);
9982 /* Now that we have a PCI connection, we need to do the
9983 * low level device setup. This is primarily setting up
9984 * the Admin Queue structures and then querying for the
9985 * device's current profile information.
9987 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9994 set_bit(__I40E_DOWN, &pf->state);
9999 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10000 I40E_MAX_CSR_SPACE);
10002 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10003 if (!hw->hw_addr) {
10005 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10006 (unsigned int)pci_resource_start(pdev, 0),
10007 pf->ioremap_len, err);
10010 hw->vendor_id = pdev->vendor;
10011 hw->device_id = pdev->device;
10012 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10013 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10014 hw->subsystem_device_id = pdev->subsystem_device;
10015 hw->bus.device = PCI_SLOT(pdev->devfn);
10016 hw->bus.func = PCI_FUNC(pdev->devfn);
10017 pf->instance = pfs_found;
10020 pf->msg_enable = pf->hw.debug_mask;
10021 pf->msg_enable = debug;
10024 /* do a special CORER for clearing PXE mode once at init */
10025 if (hw->revision_id == 0 &&
10026 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10027 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10032 i40e_clear_pxe_mode(hw);
10035 /* Reset here to make sure all is clean and to define PF 'n' */
10037 err = i40e_pf_reset(hw);
10039 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10044 hw->aq.num_arq_entries = I40E_AQ_LEN;
10045 hw->aq.num_asq_entries = I40E_AQ_LEN;
10046 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10047 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10048 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10050 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10052 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10054 err = i40e_init_shared_code(hw);
10056 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10061 /* set up a default setting for link flow control */
10062 pf->hw.fc.requested_mode = I40E_FC_NONE;
10064 err = i40e_init_adminq(hw);
10065 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10067 /* provide additional fw info, like api and ver */
10068 dev_info(&pdev->dev, "fw_version:%d.%d.%05d\n",
10069 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build);
10070 dev_info(&pdev->dev, "fw api version:%d.%d\n",
10071 hw->aq.api_maj_ver, hw->aq.api_min_ver);
10074 dev_info(&pdev->dev,
10075 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10079 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10080 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10081 dev_info(&pdev->dev,
10082 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10083 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10084 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10085 dev_info(&pdev->dev,
10086 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10088 i40e_verify_eeprom(pf);
10090 /* Rev 0 hardware was never productized */
10091 if (hw->revision_id < 1)
10092 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10094 i40e_clear_pxe_mode(hw);
10095 err = i40e_get_capabilities(pf);
10097 goto err_adminq_setup;
10099 err = i40e_sw_init(pf);
10101 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10105 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10106 hw->func_caps.num_rx_qp,
10107 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10109 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10110 goto err_init_lan_hmc;
10113 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10115 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10117 goto err_configure_lan_hmc;
10120 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10121 * Ignore error return codes because if it was already disabled via
10122 * hardware settings this will fail
10124 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10125 (pf->hw.aq.fw_maj_ver < 4)) {
10126 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10127 i40e_aq_stop_lldp(hw, true, NULL);
10130 i40e_get_mac_addr(hw, hw->mac.addr);
10131 if (!is_valid_ether_addr(hw->mac.addr)) {
10132 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10136 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10137 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10138 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10139 if (is_valid_ether_addr(hw->mac.port_addr))
10140 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10142 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10144 dev_info(&pdev->dev,
10145 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10146 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10147 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10149 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10151 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10152 #endif /* I40E_FCOE */
10154 pci_set_drvdata(pdev, pf);
10155 pci_save_state(pdev);
10156 #ifdef CONFIG_I40E_DCB
10157 err = i40e_init_pf_dcb(pf);
10159 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10160 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10161 /* Continue without DCB enabled */
10163 #endif /* CONFIG_I40E_DCB */
10165 /* set up periodic task facility */
10166 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10167 pf->service_timer_period = HZ;
10169 INIT_WORK(&pf->service_task, i40e_service_task);
10170 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10171 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10173 /* NVM bit on means WoL disabled for the port */
10174 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10175 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10176 pf->wol_en = false;
10179 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10181 /* set up the main switch operations */
10182 i40e_determine_queue_usage(pf);
10183 err = i40e_init_interrupt_scheme(pf);
10185 goto err_switch_setup;
10187 /* The number of VSIs reported by the FW is the minimum guaranteed
10188 * to us; HW supports far more and we share the remaining pool with
10189 * the other PFs. We allocate space for more than the guarantee with
10190 * the understanding that we might not get them all later.
10192 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10193 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10195 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10197 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10198 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10199 pf->vsi = kzalloc(len, GFP_KERNEL);
10202 goto err_switch_setup;
10205 #ifdef CONFIG_PCI_IOV
10206 /* prep for VF support */
10207 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10208 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10209 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10210 if (pci_num_vf(pdev))
10211 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10214 err = i40e_setup_pf_switch(pf, false);
10216 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10219 /* if FDIR VSI was set up, start it now */
10220 for (i = 0; i < pf->num_alloc_vsi; i++) {
10221 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10222 i40e_vsi_open(pf->vsi[i]);
10227 /* driver is only interested in link up/down and module qualification
10228 * reports from firmware
10230 err = i40e_aq_set_phy_int_mask(&pf->hw,
10231 I40E_AQ_EVENT_LINK_UPDOWN |
10232 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10234 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10235 i40e_stat_str(&pf->hw, err),
10236 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10238 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10239 (pf->hw.aq.fw_maj_ver < 4)) {
10241 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10243 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10244 i40e_stat_str(&pf->hw, err),
10245 i40e_aq_str(&pf->hw,
10246 pf->hw.aq.asq_last_status));
10248 /* The main driver is (mostly) up and happy. We need to set this state
10249 * before setting up the misc vector or we get a race and the vector
10250 * ends up disabled forever.
10252 clear_bit(__I40E_DOWN, &pf->state);
10254 /* In case of MSIX we are going to setup the misc vector right here
10255 * to handle admin queue events etc. In case of legacy and MSI
10256 * the misc functionality and queue processing is combined in
10257 * the same vector and that gets setup at open.
10259 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10260 err = i40e_setup_misc_vector(pf);
10262 dev_info(&pdev->dev,
10263 "setup of misc vector failed: %d\n", err);
10268 #ifdef CONFIG_PCI_IOV
10269 /* prep for VF support */
10270 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10271 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10272 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10275 /* disable link interrupts for VFs */
10276 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10277 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10278 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10281 if (pci_num_vf(pdev)) {
10282 dev_info(&pdev->dev,
10283 "Active VFs found, allocating resources.\n");
10284 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10286 dev_info(&pdev->dev,
10287 "Error %d allocating resources for existing VFs\n",
10291 #endif /* CONFIG_PCI_IOV */
10295 i40e_dbg_pf_init(pf);
10297 /* tell the firmware that we're starting */
10298 i40e_send_version(pf);
10300 /* since everything's happy, start the service_task timer */
10301 mod_timer(&pf->service_timer,
10302 round_jiffies(jiffies + pf->service_timer_period));
10305 /* create FCoE interface */
10306 i40e_fcoe_vsi_setup(pf);
10309 #define PCI_SPEED_SIZE 8
10310 #define PCI_WIDTH_SIZE 8
10311 /* Devices on the IOSF bus do not have this information
10312 * and will report PCI Gen 1 x 1 by default so don't bother
10315 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10316 char speed[PCI_SPEED_SIZE] = "Unknown";
10317 char width[PCI_WIDTH_SIZE] = "Unknown";
10319 /* Get the negotiated link width and speed from PCI config
10322 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10325 i40e_set_pci_config_data(hw, link_status);
10327 switch (hw->bus.speed) {
10328 case i40e_bus_speed_8000:
10329 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
10330 case i40e_bus_speed_5000:
10331 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
10332 case i40e_bus_speed_2500:
10333 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
10337 switch (hw->bus.width) {
10338 case i40e_bus_width_pcie_x8:
10339 strncpy(width, "8", PCI_WIDTH_SIZE); break;
10340 case i40e_bus_width_pcie_x4:
10341 strncpy(width, "4", PCI_WIDTH_SIZE); break;
10342 case i40e_bus_width_pcie_x2:
10343 strncpy(width, "2", PCI_WIDTH_SIZE); break;
10344 case i40e_bus_width_pcie_x1:
10345 strncpy(width, "1", PCI_WIDTH_SIZE); break;
10350 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
10353 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10354 hw->bus.speed < i40e_bus_speed_8000) {
10355 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10356 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10360 /* get the requested speeds from the fw */
10361 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10363 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
10364 i40e_stat_str(&pf->hw, err),
10365 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10366 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10368 /* get the supported phy types from the fw */
10369 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
10371 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
10372 i40e_stat_str(&pf->hw, err),
10373 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10374 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
10376 /* print a string summarizing features */
10377 i40e_print_features(pf);
10381 /* Unwind what we've done if something failed in the setup */
10383 set_bit(__I40E_DOWN, &pf->state);
10384 i40e_clear_interrupt_scheme(pf);
10387 i40e_reset_interrupt_capability(pf);
10388 del_timer_sync(&pf->service_timer);
10390 err_configure_lan_hmc:
10391 (void)i40e_shutdown_lan_hmc(hw);
10393 kfree(pf->qp_pile);
10396 (void)i40e_shutdown_adminq(hw);
10398 iounmap(hw->hw_addr);
10402 pci_disable_pcie_error_reporting(pdev);
10403 pci_release_selected_regions(pdev,
10404 pci_select_bars(pdev, IORESOURCE_MEM));
10407 pci_disable_device(pdev);
10412 * i40e_remove - Device removal routine
10413 * @pdev: PCI device information struct
10415 * i40e_remove is called by the PCI subsystem to alert the driver
10416 * that is should release a PCI device. This could be caused by a
10417 * Hot-Plug event, or because the driver is going to be removed from
10420 static void i40e_remove(struct pci_dev *pdev)
10422 struct i40e_pf *pf = pci_get_drvdata(pdev);
10423 i40e_status ret_code;
10426 i40e_dbg_pf_exit(pf);
10430 /* no more scheduling of any task */
10431 set_bit(__I40E_DOWN, &pf->state);
10432 del_timer_sync(&pf->service_timer);
10433 cancel_work_sync(&pf->service_task);
10434 i40e_fdir_teardown(pf);
10436 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10438 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10441 i40e_fdir_teardown(pf);
10443 /* If there is a switch structure or any orphans, remove them.
10444 * This will leave only the PF's VSI remaining.
10446 for (i = 0; i < I40E_MAX_VEB; i++) {
10450 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10451 pf->veb[i]->uplink_seid == 0)
10452 i40e_switch_branch_release(pf->veb[i]);
10455 /* Now we can shutdown the PF's VSI, just before we kill
10458 if (pf->vsi[pf->lan_vsi])
10459 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10461 /* shutdown and destroy the HMC */
10462 if (pf->hw.hmc.hmc_obj) {
10463 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10465 dev_warn(&pdev->dev,
10466 "Failed to destroy the HMC resources: %d\n",
10470 /* shutdown the adminq */
10471 ret_code = i40e_shutdown_adminq(&pf->hw);
10473 dev_warn(&pdev->dev,
10474 "Failed to destroy the Admin Queue resources: %d\n",
10477 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10478 i40e_clear_interrupt_scheme(pf);
10479 for (i = 0; i < pf->num_alloc_vsi; i++) {
10481 i40e_vsi_clear_rings(pf->vsi[i]);
10482 i40e_vsi_clear(pf->vsi[i]);
10487 for (i = 0; i < I40E_MAX_VEB; i++) {
10492 kfree(pf->qp_pile);
10495 iounmap(pf->hw.hw_addr);
10497 pci_release_selected_regions(pdev,
10498 pci_select_bars(pdev, IORESOURCE_MEM));
10500 pci_disable_pcie_error_reporting(pdev);
10501 pci_disable_device(pdev);
10505 * i40e_pci_error_detected - warning that something funky happened in PCI land
10506 * @pdev: PCI device information struct
10508 * Called to warn that something happened and the error handling steps
10509 * are in progress. Allows the driver to quiesce things, be ready for
10512 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10513 enum pci_channel_state error)
10515 struct i40e_pf *pf = pci_get_drvdata(pdev);
10517 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10519 /* shutdown all operations */
10520 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10522 i40e_prep_for_reset(pf);
10526 /* Request a slot reset */
10527 return PCI_ERS_RESULT_NEED_RESET;
10531 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10532 * @pdev: PCI device information struct
10534 * Called to find if the driver can work with the device now that
10535 * the pci slot has been reset. If a basic connection seems good
10536 * (registers are readable and have sane content) then return a
10537 * happy little PCI_ERS_RESULT_xxx.
10539 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10541 struct i40e_pf *pf = pci_get_drvdata(pdev);
10542 pci_ers_result_t result;
10546 dev_dbg(&pdev->dev, "%s\n", __func__);
10547 if (pci_enable_device_mem(pdev)) {
10548 dev_info(&pdev->dev,
10549 "Cannot re-enable PCI device after reset.\n");
10550 result = PCI_ERS_RESULT_DISCONNECT;
10552 pci_set_master(pdev);
10553 pci_restore_state(pdev);
10554 pci_save_state(pdev);
10555 pci_wake_from_d3(pdev, false);
10557 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10559 result = PCI_ERS_RESULT_RECOVERED;
10561 result = PCI_ERS_RESULT_DISCONNECT;
10564 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10566 dev_info(&pdev->dev,
10567 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10569 /* non-fatal, continue */
10576 * i40e_pci_error_resume - restart operations after PCI error recovery
10577 * @pdev: PCI device information struct
10579 * Called to allow the driver to bring things back up after PCI error
10580 * and/or reset recovery has finished.
10582 static void i40e_pci_error_resume(struct pci_dev *pdev)
10584 struct i40e_pf *pf = pci_get_drvdata(pdev);
10586 dev_dbg(&pdev->dev, "%s\n", __func__);
10587 if (test_bit(__I40E_SUSPENDED, &pf->state))
10591 i40e_handle_reset_warning(pf);
10596 * i40e_shutdown - PCI callback for shutting down
10597 * @pdev: PCI device information struct
10599 static void i40e_shutdown(struct pci_dev *pdev)
10601 struct i40e_pf *pf = pci_get_drvdata(pdev);
10602 struct i40e_hw *hw = &pf->hw;
10604 set_bit(__I40E_SUSPENDED, &pf->state);
10605 set_bit(__I40E_DOWN, &pf->state);
10607 i40e_prep_for_reset(pf);
10610 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10611 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10613 del_timer_sync(&pf->service_timer);
10614 cancel_work_sync(&pf->service_task);
10615 i40e_fdir_teardown(pf);
10618 i40e_prep_for_reset(pf);
10621 wr32(hw, I40E_PFPM_APM,
10622 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10623 wr32(hw, I40E_PFPM_WUFC,
10624 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10626 i40e_clear_interrupt_scheme(pf);
10628 if (system_state == SYSTEM_POWER_OFF) {
10629 pci_wake_from_d3(pdev, pf->wol_en);
10630 pci_set_power_state(pdev, PCI_D3hot);
10636 * i40e_suspend - PCI callback for moving to D3
10637 * @pdev: PCI device information struct
10639 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10641 struct i40e_pf *pf = pci_get_drvdata(pdev);
10642 struct i40e_hw *hw = &pf->hw;
10644 set_bit(__I40E_SUSPENDED, &pf->state);
10645 set_bit(__I40E_DOWN, &pf->state);
10648 i40e_prep_for_reset(pf);
10651 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10652 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10654 pci_wake_from_d3(pdev, pf->wol_en);
10655 pci_set_power_state(pdev, PCI_D3hot);
10661 * i40e_resume - PCI callback for waking up from D3
10662 * @pdev: PCI device information struct
10664 static int i40e_resume(struct pci_dev *pdev)
10666 struct i40e_pf *pf = pci_get_drvdata(pdev);
10669 pci_set_power_state(pdev, PCI_D0);
10670 pci_restore_state(pdev);
10671 /* pci_restore_state() clears dev->state_saves, so
10672 * call pci_save_state() again to restore it.
10674 pci_save_state(pdev);
10676 err = pci_enable_device_mem(pdev);
10678 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
10681 pci_set_master(pdev);
10683 /* no wakeup events while running */
10684 pci_wake_from_d3(pdev, false);
10686 /* handling the reset will rebuild the device state */
10687 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10688 clear_bit(__I40E_DOWN, &pf->state);
10690 i40e_reset_and_rebuild(pf, false);
10698 static const struct pci_error_handlers i40e_err_handler = {
10699 .error_detected = i40e_pci_error_detected,
10700 .slot_reset = i40e_pci_error_slot_reset,
10701 .resume = i40e_pci_error_resume,
10704 static struct pci_driver i40e_driver = {
10705 .name = i40e_driver_name,
10706 .id_table = i40e_pci_tbl,
10707 .probe = i40e_probe,
10708 .remove = i40e_remove,
10710 .suspend = i40e_suspend,
10711 .resume = i40e_resume,
10713 .shutdown = i40e_shutdown,
10714 .err_handler = &i40e_err_handler,
10715 .sriov_configure = i40e_pci_sriov_configure,
10719 * i40e_init_module - Driver registration routine
10721 * i40e_init_module is the first routine called when the driver is
10722 * loaded. All it does is register with the PCI subsystem.
10724 static int __init i40e_init_module(void)
10726 pr_info("%s: %s - version %s\n", i40e_driver_name,
10727 i40e_driver_string, i40e_driver_version_str);
10728 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10731 return pci_register_driver(&i40e_driver);
10733 module_init(i40e_init_module);
10736 * i40e_exit_module - Driver exit cleanup routine
10738 * i40e_exit_module is called just before the driver is removed
10741 static void __exit i40e_exit_module(void)
10743 pci_unregister_driver(&i40e_driver);
10746 module_exit(i40e_exit_module);