1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
82 /* required last entry */
85 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
87 #define I40E_MAX_VF_COUNT 128
88 static int debug = -1;
89 module_param(debug, int, 0);
90 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
93 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
94 MODULE_LICENSE("GPL");
95 MODULE_VERSION(DRV_VERSION);
98 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
99 * @hw: pointer to the HW structure
100 * @mem: ptr to mem struct to fill out
101 * @size: size of memory requested
102 * @alignment: what to align the allocation to
104 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
105 u64 size, u32 alignment)
107 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
109 mem->size = ALIGN(size, alignment);
110 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
111 &mem->pa, GFP_KERNEL);
119 * i40e_free_dma_mem_d - OS specific memory free for shared code
120 * @hw: pointer to the HW structure
121 * @mem: ptr to mem struct to free
123 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
125 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
127 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
136 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
137 * @hw: pointer to the HW structure
138 * @mem: ptr to mem struct to fill out
139 * @size: size of memory requested
141 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
145 mem->va = kzalloc(size, GFP_KERNEL);
154 * i40e_free_virt_mem_d - OS specific memory free for shared code
155 * @hw: pointer to the HW structure
156 * @mem: ptr to mem struct to free
158 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
160 /* it's ok to kfree a NULL pointer */
169 * i40e_get_lump - find a lump of free generic resource
170 * @pf: board private structure
171 * @pile: the pile of resource to search
172 * @needed: the number of items needed
173 * @id: an owner id to stick on the items assigned
175 * Returns the base item index of the lump, or negative for error
177 * The search_hint trick and lack of advanced fit-finding only work
178 * because we're highly likely to have all the same size lump requests.
179 * Linear search time and any fragmentation should be minimal.
181 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
187 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
188 dev_info(&pf->pdev->dev,
189 "param err: pile=%p needed=%d id=0x%04x\n",
194 /* start the linear search with an imperfect hint */
195 i = pile->search_hint;
196 while (i < pile->num_entries) {
197 /* skip already allocated entries */
198 if (pile->list[i] & I40E_PILE_VALID_BIT) {
203 /* do we have enough in this lump? */
204 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
205 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
210 /* there was enough, so assign it to the requestor */
211 for (j = 0; j < needed; j++)
212 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
214 pile->search_hint = i + j;
217 /* not enough, so skip over it and continue looking */
226 * i40e_put_lump - return a lump of generic resource
227 * @pile: the pile of resource to search
228 * @index: the base item index
229 * @id: the owner id of the items assigned
231 * Returns the count of items in the lump
233 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
235 int valid_id = (id | I40E_PILE_VALID_BIT);
239 if (!pile || index >= pile->num_entries)
243 i < pile->num_entries && pile->list[i] == valid_id;
249 if (count && index < pile->search_hint)
250 pile->search_hint = index;
256 * i40e_find_vsi_from_id - searches for the vsi with the given id
257 * @pf - the pf structure to search for the vsi
258 * @id - id of the vsi it is searching for
260 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
264 for (i = 0; i < pf->num_alloc_vsi; i++)
265 if (pf->vsi[i] && (pf->vsi[i]->id == id))
272 * i40e_service_event_schedule - Schedule the service task to wake up
273 * @pf: board private structure
275 * If not already scheduled, this puts the task into the work queue
277 static void i40e_service_event_schedule(struct i40e_pf *pf)
279 if (!test_bit(__I40E_DOWN, &pf->state) &&
280 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
281 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
282 schedule_work(&pf->service_task);
286 * i40e_tx_timeout - Respond to a Tx Hang
287 * @netdev: network interface device structure
289 * If any port has noticed a Tx timeout, it is likely that the whole
290 * device is munged, not just the one netdev port, so go for the full
294 void i40e_tx_timeout(struct net_device *netdev)
296 static void i40e_tx_timeout(struct net_device *netdev)
299 struct i40e_netdev_priv *np = netdev_priv(netdev);
300 struct i40e_vsi *vsi = np->vsi;
301 struct i40e_pf *pf = vsi->back;
302 struct i40e_ring *tx_ring = NULL;
303 unsigned int i, hung_queue = 0;
306 pf->tx_timeout_count++;
308 /* find the stopped queue the same way the stack does */
309 for (i = 0; i < netdev->num_tx_queues; i++) {
310 struct netdev_queue *q;
311 unsigned long trans_start;
313 q = netdev_get_tx_queue(netdev, i);
314 trans_start = q->trans_start ? : netdev->trans_start;
315 if (netif_xmit_stopped(q) &&
317 (trans_start + netdev->watchdog_timeo))) {
323 if (i == netdev->num_tx_queues) {
324 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
326 /* now that we have an index, find the tx_ring struct */
327 for (i = 0; i < vsi->num_queue_pairs; i++) {
328 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
330 vsi->tx_rings[i]->queue_index) {
331 tx_ring = vsi->tx_rings[i];
338 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
339 pf->tx_timeout_recovery_level = 1; /* reset after some time */
340 else if (time_before(jiffies,
341 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
342 return; /* don't do any new action before the next timeout */
345 head = i40e_get_head(tx_ring);
346 /* Read interrupt register */
347 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
349 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
350 tx_ring->vsi->base_vector - 1));
352 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
354 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
355 vsi->seid, hung_queue, tx_ring->next_to_clean,
356 head, tx_ring->next_to_use,
357 readl(tx_ring->tail), val);
360 pf->tx_timeout_last_recovery = jiffies;
361 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
362 pf->tx_timeout_recovery_level, hung_queue);
364 switch (pf->tx_timeout_recovery_level) {
366 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
369 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
372 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
375 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
379 i40e_service_event_schedule(pf);
380 pf->tx_timeout_recovery_level++;
384 * i40e_release_rx_desc - Store the new tail and head values
385 * @rx_ring: ring to bump
386 * @val: new head index
388 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
390 rx_ring->next_to_use = val;
392 /* Force memory writes to complete before letting h/w
393 * know there are new descriptors to fetch. (Only
394 * applicable for weak-ordered memory model archs,
398 writel(val, rx_ring->tail);
402 * i40e_get_vsi_stats_struct - Get System Network Statistics
403 * @vsi: the VSI we care about
405 * Returns the address of the device statistics structure.
406 * The statistics are actually updated from the service task.
408 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
410 return &vsi->net_stats;
414 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
415 * @netdev: network interface device structure
417 * Returns the address of the device statistics structure.
418 * The statistics are actually updated from the service task.
421 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
422 struct net_device *netdev,
423 struct rtnl_link_stats64 *stats)
425 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
426 struct net_device *netdev,
427 struct rtnl_link_stats64 *stats)
430 struct i40e_netdev_priv *np = netdev_priv(netdev);
431 struct i40e_ring *tx_ring, *rx_ring;
432 struct i40e_vsi *vsi = np->vsi;
433 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
436 if (test_bit(__I40E_DOWN, &vsi->state))
443 for (i = 0; i < vsi->num_queue_pairs; i++) {
447 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
452 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
453 packets = tx_ring->stats.packets;
454 bytes = tx_ring->stats.bytes;
455 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
457 stats->tx_packets += packets;
458 stats->tx_bytes += bytes;
459 rx_ring = &tx_ring[1];
462 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
463 packets = rx_ring->stats.packets;
464 bytes = rx_ring->stats.bytes;
465 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
467 stats->rx_packets += packets;
468 stats->rx_bytes += bytes;
472 /* following stats updated by i40e_watchdog_subtask() */
473 stats->multicast = vsi_stats->multicast;
474 stats->tx_errors = vsi_stats->tx_errors;
475 stats->tx_dropped = vsi_stats->tx_dropped;
476 stats->rx_errors = vsi_stats->rx_errors;
477 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
478 stats->rx_length_errors = vsi_stats->rx_length_errors;
484 * i40e_vsi_reset_stats - Resets all stats of the given vsi
485 * @vsi: the VSI to have its stats reset
487 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
489 struct rtnl_link_stats64 *ns;
495 ns = i40e_get_vsi_stats_struct(vsi);
496 memset(ns, 0, sizeof(*ns));
497 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
498 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
499 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
500 if (vsi->rx_rings && vsi->rx_rings[0]) {
501 for (i = 0; i < vsi->num_queue_pairs; i++) {
502 memset(&vsi->rx_rings[i]->stats, 0 ,
503 sizeof(vsi->rx_rings[i]->stats));
504 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
505 sizeof(vsi->rx_rings[i]->rx_stats));
506 memset(&vsi->tx_rings[i]->stats, 0 ,
507 sizeof(vsi->tx_rings[i]->stats));
508 memset(&vsi->tx_rings[i]->tx_stats, 0,
509 sizeof(vsi->tx_rings[i]->tx_stats));
512 vsi->stat_offsets_loaded = false;
516 * i40e_pf_reset_stats - Reset all of the stats for the given PF
517 * @pf: the PF to be reset
519 void i40e_pf_reset_stats(struct i40e_pf *pf)
523 memset(&pf->stats, 0, sizeof(pf->stats));
524 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
525 pf->stat_offsets_loaded = false;
527 for (i = 0; i < I40E_MAX_VEB; i++) {
529 memset(&pf->veb[i]->stats, 0,
530 sizeof(pf->veb[i]->stats));
531 memset(&pf->veb[i]->stats_offsets, 0,
532 sizeof(pf->veb[i]->stats_offsets));
533 pf->veb[i]->stat_offsets_loaded = false;
539 * i40e_stat_update48 - read and update a 48 bit stat from the chip
540 * @hw: ptr to the hardware info
541 * @hireg: the high 32 bit reg to read
542 * @loreg: the low 32 bit reg to read
543 * @offset_loaded: has the initial offset been loaded yet
544 * @offset: ptr to current offset value
545 * @stat: ptr to the stat
547 * Since the device stats are not reset at PFReset, they likely will not
548 * be zeroed when the driver starts. We'll save the first values read
549 * and use them as offsets to be subtracted from the raw values in order
550 * to report stats that count from zero. In the process, we also manage
551 * the potential roll-over.
553 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
554 bool offset_loaded, u64 *offset, u64 *stat)
558 if (hw->device_id == I40E_DEV_ID_QEMU) {
559 new_data = rd32(hw, loreg);
560 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
562 new_data = rd64(hw, loreg);
566 if (likely(new_data >= *offset))
567 *stat = new_data - *offset;
569 *stat = (new_data + BIT_ULL(48)) - *offset;
570 *stat &= 0xFFFFFFFFFFFFULL;
574 * i40e_stat_update32 - read and update a 32 bit stat from the chip
575 * @hw: ptr to the hardware info
576 * @reg: the hw reg to read
577 * @offset_loaded: has the initial offset been loaded yet
578 * @offset: ptr to current offset value
579 * @stat: ptr to the stat
581 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
582 bool offset_loaded, u64 *offset, u64 *stat)
586 new_data = rd32(hw, reg);
589 if (likely(new_data >= *offset))
590 *stat = (u32)(new_data - *offset);
592 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
596 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
597 * @vsi: the VSI to be updated
599 void i40e_update_eth_stats(struct i40e_vsi *vsi)
601 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
602 struct i40e_pf *pf = vsi->back;
603 struct i40e_hw *hw = &pf->hw;
604 struct i40e_eth_stats *oes;
605 struct i40e_eth_stats *es; /* device's eth stats */
607 es = &vsi->eth_stats;
608 oes = &vsi->eth_stats_offsets;
610 /* Gather up the stats that the hw collects */
611 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
612 vsi->stat_offsets_loaded,
613 &oes->tx_errors, &es->tx_errors);
614 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
615 vsi->stat_offsets_loaded,
616 &oes->rx_discards, &es->rx_discards);
617 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
618 vsi->stat_offsets_loaded,
619 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
620 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->tx_errors, &es->tx_errors);
624 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
625 I40E_GLV_GORCL(stat_idx),
626 vsi->stat_offsets_loaded,
627 &oes->rx_bytes, &es->rx_bytes);
628 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
629 I40E_GLV_UPRCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_unicast, &es->rx_unicast);
632 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
633 I40E_GLV_MPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_multicast, &es->rx_multicast);
636 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
637 I40E_GLV_BPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_broadcast, &es->rx_broadcast);
641 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
642 I40E_GLV_GOTCL(stat_idx),
643 vsi->stat_offsets_loaded,
644 &oes->tx_bytes, &es->tx_bytes);
645 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
646 I40E_GLV_UPTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_unicast, &es->tx_unicast);
649 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
650 I40E_GLV_MPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_multicast, &es->tx_multicast);
653 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
654 I40E_GLV_BPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_broadcast, &es->tx_broadcast);
657 vsi->stat_offsets_loaded = true;
661 * i40e_update_veb_stats - Update Switch component statistics
662 * @veb: the VEB being updated
664 static void i40e_update_veb_stats(struct i40e_veb *veb)
666 struct i40e_pf *pf = veb->pf;
667 struct i40e_hw *hw = &pf->hw;
668 struct i40e_eth_stats *oes;
669 struct i40e_eth_stats *es; /* device's eth stats */
670 struct i40e_veb_tc_stats *veb_oes;
671 struct i40e_veb_tc_stats *veb_es;
674 idx = veb->stats_idx;
676 oes = &veb->stats_offsets;
677 veb_es = &veb->tc_stats;
678 veb_oes = &veb->tc_stats_offsets;
680 /* Gather up the stats that the hw collects */
681 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
682 veb->stat_offsets_loaded,
683 &oes->tx_discards, &es->tx_discards);
684 if (hw->revision_id > 0)
685 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_unknown_protocol,
688 &es->rx_unknown_protocol);
689 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_bytes, &es->rx_bytes);
692 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
693 veb->stat_offsets_loaded,
694 &oes->rx_unicast, &es->rx_unicast);
695 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_multicast, &es->rx_multicast);
698 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_broadcast, &es->rx_broadcast);
702 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->tx_bytes, &es->tx_bytes);
705 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
706 veb->stat_offsets_loaded,
707 &oes->tx_unicast, &es->tx_unicast);
708 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->tx_multicast, &es->tx_multicast);
711 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_broadcast, &es->tx_broadcast);
714 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
715 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
716 I40E_GLVEBTC_RPCL(i, idx),
717 veb->stat_offsets_loaded,
718 &veb_oes->tc_rx_packets[i],
719 &veb_es->tc_rx_packets[i]);
720 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
721 I40E_GLVEBTC_RBCL(i, idx),
722 veb->stat_offsets_loaded,
723 &veb_oes->tc_rx_bytes[i],
724 &veb_es->tc_rx_bytes[i]);
725 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
726 I40E_GLVEBTC_TPCL(i, idx),
727 veb->stat_offsets_loaded,
728 &veb_oes->tc_tx_packets[i],
729 &veb_es->tc_tx_packets[i]);
730 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
731 I40E_GLVEBTC_TBCL(i, idx),
732 veb->stat_offsets_loaded,
733 &veb_oes->tc_tx_bytes[i],
734 &veb_es->tc_tx_bytes[i]);
736 veb->stat_offsets_loaded = true;
741 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
742 * @vsi: the VSI that is capable of doing FCoE
744 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
746 struct i40e_pf *pf = vsi->back;
747 struct i40e_hw *hw = &pf->hw;
748 struct i40e_fcoe_stats *ofs;
749 struct i40e_fcoe_stats *fs; /* device's eth stats */
752 if (vsi->type != I40E_VSI_FCOE)
755 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
756 fs = &vsi->fcoe_stats;
757 ofs = &vsi->fcoe_stats_offsets;
759 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
760 vsi->fcoe_stat_offsets_loaded,
761 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
762 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
763 vsi->fcoe_stat_offsets_loaded,
764 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
765 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
766 vsi->fcoe_stat_offsets_loaded,
767 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
768 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
769 vsi->fcoe_stat_offsets_loaded,
770 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
771 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
772 vsi->fcoe_stat_offsets_loaded,
773 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
774 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
775 vsi->fcoe_stat_offsets_loaded,
776 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
777 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
778 vsi->fcoe_stat_offsets_loaded,
779 &ofs->fcoe_last_error, &fs->fcoe_last_error);
780 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
784 vsi->fcoe_stat_offsets_loaded = true;
789 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
790 * @pf: the corresponding PF
792 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
794 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
796 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
797 struct i40e_hw_port_stats *nsd = &pf->stats;
798 struct i40e_hw *hw = &pf->hw;
801 if ((hw->fc.current_mode != I40E_FC_FULL) &&
802 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
805 xoff = nsd->link_xoff_rx;
806 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
807 pf->stat_offsets_loaded,
808 &osd->link_xoff_rx, &nsd->link_xoff_rx);
810 /* No new LFC xoff rx */
811 if (!(nsd->link_xoff_rx - xoff))
817 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
818 * @pf: the corresponding PF
820 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
822 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
824 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
825 struct i40e_hw_port_stats *nsd = &pf->stats;
826 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
827 struct i40e_dcbx_config *dcb_cfg;
828 struct i40e_hw *hw = &pf->hw;
832 dcb_cfg = &hw->local_dcbx_config;
834 /* Collect Link XOFF stats when PFC is disabled */
835 if (!dcb_cfg->pfc.pfcenable) {
836 i40e_update_link_xoff_rx(pf);
840 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
841 u64 prio_xoff = nsd->priority_xoff_rx[i];
842 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
843 pf->stat_offsets_loaded,
844 &osd->priority_xoff_rx[i],
845 &nsd->priority_xoff_rx[i]);
847 /* No new PFC xoff rx */
848 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
850 /* Get the TC for given priority */
851 tc = dcb_cfg->etscfg.prioritytable[i];
857 * i40e_update_vsi_stats - Update the vsi statistics counters.
858 * @vsi: the VSI to be updated
860 * There are a few instances where we store the same stat in a
861 * couple of different structs. This is partly because we have
862 * the netdev stats that need to be filled out, which is slightly
863 * different from the "eth_stats" defined by the chip and used in
864 * VF communications. We sort it out here.
866 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
868 struct i40e_pf *pf = vsi->back;
869 struct rtnl_link_stats64 *ons;
870 struct rtnl_link_stats64 *ns; /* netdev stats */
871 struct i40e_eth_stats *oes;
872 struct i40e_eth_stats *es; /* device's eth stats */
873 u32 tx_restart, tx_busy;
882 if (test_bit(__I40E_DOWN, &vsi->state) ||
883 test_bit(__I40E_CONFIG_BUSY, &pf->state))
886 ns = i40e_get_vsi_stats_struct(vsi);
887 ons = &vsi->net_stats_offsets;
888 es = &vsi->eth_stats;
889 oes = &vsi->eth_stats_offsets;
891 /* Gather up the netdev and vsi stats that the driver collects
892 * on the fly during packet processing
896 tx_restart = tx_busy = 0;
900 for (q = 0; q < vsi->num_queue_pairs; q++) {
902 p = ACCESS_ONCE(vsi->tx_rings[q]);
905 start = u64_stats_fetch_begin_irq(&p->syncp);
906 packets = p->stats.packets;
907 bytes = p->stats.bytes;
908 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
911 tx_restart += p->tx_stats.restart_queue;
912 tx_busy += p->tx_stats.tx_busy;
914 /* Rx queue is part of the same block as Tx queue */
917 start = u64_stats_fetch_begin_irq(&p->syncp);
918 packets = p->stats.packets;
919 bytes = p->stats.bytes;
920 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
923 rx_buf += p->rx_stats.alloc_buff_failed;
924 rx_page += p->rx_stats.alloc_page_failed;
927 vsi->tx_restart = tx_restart;
928 vsi->tx_busy = tx_busy;
929 vsi->rx_page_failed = rx_page;
930 vsi->rx_buf_failed = rx_buf;
932 ns->rx_packets = rx_p;
934 ns->tx_packets = tx_p;
937 /* update netdev stats from eth stats */
938 i40e_update_eth_stats(vsi);
939 ons->tx_errors = oes->tx_errors;
940 ns->tx_errors = es->tx_errors;
941 ons->multicast = oes->rx_multicast;
942 ns->multicast = es->rx_multicast;
943 ons->rx_dropped = oes->rx_discards;
944 ns->rx_dropped = es->rx_discards;
945 ons->tx_dropped = oes->tx_discards;
946 ns->tx_dropped = es->tx_discards;
948 /* pull in a couple PF stats if this is the main vsi */
949 if (vsi == pf->vsi[pf->lan_vsi]) {
950 ns->rx_crc_errors = pf->stats.crc_errors;
951 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
952 ns->rx_length_errors = pf->stats.rx_length_errors;
957 * i40e_update_pf_stats - Update the PF statistics counters.
958 * @pf: the PF to be updated
960 static void i40e_update_pf_stats(struct i40e_pf *pf)
962 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
963 struct i40e_hw_port_stats *nsd = &pf->stats;
964 struct i40e_hw *hw = &pf->hw;
968 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
969 I40E_GLPRT_GORCL(hw->port),
970 pf->stat_offsets_loaded,
971 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
972 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
973 I40E_GLPRT_GOTCL(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
976 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->eth.rx_discards,
979 &nsd->eth.rx_discards);
980 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
981 I40E_GLPRT_UPRCL(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->eth.rx_unicast,
984 &nsd->eth.rx_unicast);
985 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
986 I40E_GLPRT_MPRCL(hw->port),
987 pf->stat_offsets_loaded,
988 &osd->eth.rx_multicast,
989 &nsd->eth.rx_multicast);
990 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
991 I40E_GLPRT_BPRCL(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->eth.rx_broadcast,
994 &nsd->eth.rx_broadcast);
995 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
996 I40E_GLPRT_UPTCL(hw->port),
997 pf->stat_offsets_loaded,
998 &osd->eth.tx_unicast,
999 &nsd->eth.tx_unicast);
1000 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1001 I40E_GLPRT_MPTCL(hw->port),
1002 pf->stat_offsets_loaded,
1003 &osd->eth.tx_multicast,
1004 &nsd->eth.tx_multicast);
1005 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1006 I40E_GLPRT_BPTCL(hw->port),
1007 pf->stat_offsets_loaded,
1008 &osd->eth.tx_broadcast,
1009 &nsd->eth.tx_broadcast);
1011 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->tx_dropped_link_down,
1014 &nsd->tx_dropped_link_down);
1016 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1017 pf->stat_offsets_loaded,
1018 &osd->crc_errors, &nsd->crc_errors);
1020 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->illegal_bytes, &nsd->illegal_bytes);
1024 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->mac_local_faults,
1027 &nsd->mac_local_faults);
1028 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->mac_remote_faults,
1031 &nsd->mac_remote_faults);
1033 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->rx_length_errors,
1036 &nsd->rx_length_errors);
1038 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1039 pf->stat_offsets_loaded,
1040 &osd->link_xon_rx, &nsd->link_xon_rx);
1041 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->link_xon_tx, &nsd->link_xon_tx);
1044 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1045 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1049 for (i = 0; i < 8; i++) {
1050 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1051 pf->stat_offsets_loaded,
1052 &osd->priority_xon_rx[i],
1053 &nsd->priority_xon_rx[i]);
1054 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1055 pf->stat_offsets_loaded,
1056 &osd->priority_xon_tx[i],
1057 &nsd->priority_xon_tx[i]);
1058 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1059 pf->stat_offsets_loaded,
1060 &osd->priority_xoff_tx[i],
1061 &nsd->priority_xoff_tx[i]);
1062 i40e_stat_update32(hw,
1063 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1064 pf->stat_offsets_loaded,
1065 &osd->priority_xon_2_xoff[i],
1066 &nsd->priority_xon_2_xoff[i]);
1069 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1070 I40E_GLPRT_PRC64L(hw->port),
1071 pf->stat_offsets_loaded,
1072 &osd->rx_size_64, &nsd->rx_size_64);
1073 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1074 I40E_GLPRT_PRC127L(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_size_127, &nsd->rx_size_127);
1077 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1078 I40E_GLPRT_PRC255L(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_size_255, &nsd->rx_size_255);
1081 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1082 I40E_GLPRT_PRC511L(hw->port),
1083 pf->stat_offsets_loaded,
1084 &osd->rx_size_511, &nsd->rx_size_511);
1085 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1086 I40E_GLPRT_PRC1023L(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_size_1023, &nsd->rx_size_1023);
1089 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1090 I40E_GLPRT_PRC1522L(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->rx_size_1522, &nsd->rx_size_1522);
1093 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1094 I40E_GLPRT_PRC9522L(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_size_big, &nsd->rx_size_big);
1098 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1099 I40E_GLPRT_PTC64L(hw->port),
1100 pf->stat_offsets_loaded,
1101 &osd->tx_size_64, &nsd->tx_size_64);
1102 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1103 I40E_GLPRT_PTC127L(hw->port),
1104 pf->stat_offsets_loaded,
1105 &osd->tx_size_127, &nsd->tx_size_127);
1106 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1107 I40E_GLPRT_PTC255L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->tx_size_255, &nsd->tx_size_255);
1110 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1111 I40E_GLPRT_PTC511L(hw->port),
1112 pf->stat_offsets_loaded,
1113 &osd->tx_size_511, &nsd->tx_size_511);
1114 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1115 I40E_GLPRT_PTC1023L(hw->port),
1116 pf->stat_offsets_loaded,
1117 &osd->tx_size_1023, &nsd->tx_size_1023);
1118 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1119 I40E_GLPRT_PTC1522L(hw->port),
1120 pf->stat_offsets_loaded,
1121 &osd->tx_size_1522, &nsd->tx_size_1522);
1122 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1123 I40E_GLPRT_PTC9522L(hw->port),
1124 pf->stat_offsets_loaded,
1125 &osd->tx_size_big, &nsd->tx_size_big);
1127 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->rx_undersize, &nsd->rx_undersize);
1130 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1131 pf->stat_offsets_loaded,
1132 &osd->rx_fragments, &nsd->rx_fragments);
1133 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1134 pf->stat_offsets_loaded,
1135 &osd->rx_oversize, &nsd->rx_oversize);
1136 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1137 pf->stat_offsets_loaded,
1138 &osd->rx_jabber, &nsd->rx_jabber);
1141 i40e_stat_update32(hw,
1142 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1143 pf->stat_offsets_loaded,
1144 &osd->fd_atr_match, &nsd->fd_atr_match);
1145 i40e_stat_update32(hw,
1146 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1147 pf->stat_offsets_loaded,
1148 &osd->fd_sb_match, &nsd->fd_sb_match);
1149 i40e_stat_update32(hw,
1150 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1151 pf->stat_offsets_loaded,
1152 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1154 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1155 nsd->tx_lpi_status =
1156 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1157 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1158 nsd->rx_lpi_status =
1159 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1160 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1161 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1162 pf->stat_offsets_loaded,
1163 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1164 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1165 pf->stat_offsets_loaded,
1166 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1168 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1169 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1170 nsd->fd_sb_status = true;
1172 nsd->fd_sb_status = false;
1174 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1175 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1176 nsd->fd_atr_status = true;
1178 nsd->fd_atr_status = false;
1180 pf->stat_offsets_loaded = true;
1184 * i40e_update_stats - Update the various statistics counters.
1185 * @vsi: the VSI to be updated
1187 * Update the various stats for this VSI and its related entities.
1189 void i40e_update_stats(struct i40e_vsi *vsi)
1191 struct i40e_pf *pf = vsi->back;
1193 if (vsi == pf->vsi[pf->lan_vsi])
1194 i40e_update_pf_stats(pf);
1196 i40e_update_vsi_stats(vsi);
1198 i40e_update_fcoe_stats(vsi);
1203 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1204 * @vsi: the VSI to be searched
1205 * @macaddr: the MAC address
1207 * @is_vf: make sure its a VF filter, else doesn't matter
1208 * @is_netdev: make sure its a netdev filter, else doesn't matter
1210 * Returns ptr to the filter object or NULL
1212 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1213 u8 *macaddr, s16 vlan,
1214 bool is_vf, bool is_netdev)
1216 struct i40e_mac_filter *f;
1218 if (!vsi || !macaddr)
1221 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1222 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1223 (vlan == f->vlan) &&
1224 (!is_vf || f->is_vf) &&
1225 (!is_netdev || f->is_netdev))
1232 * i40e_find_mac - Find a mac addr in the macvlan filters list
1233 * @vsi: the VSI to be searched
1234 * @macaddr: the MAC address we are searching for
1235 * @is_vf: make sure its a VF filter, else doesn't matter
1236 * @is_netdev: make sure its a netdev filter, else doesn't matter
1238 * Returns the first filter with the provided MAC address or NULL if
1239 * MAC address was not found
1241 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1242 bool is_vf, bool is_netdev)
1244 struct i40e_mac_filter *f;
1246 if (!vsi || !macaddr)
1249 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1250 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1251 (!is_vf || f->is_vf) &&
1252 (!is_netdev || f->is_netdev))
1259 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1260 * @vsi: the VSI to be searched
1262 * Returns true if VSI is in vlan mode or false otherwise
1264 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1266 struct i40e_mac_filter *f;
1268 /* Only -1 for all the filters denotes not in vlan mode
1269 * so we have to go through all the list in order to make sure
1271 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1280 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1281 * @vsi: the VSI to be searched
1282 * @macaddr: the mac address to be filtered
1283 * @is_vf: true if it is a VF
1284 * @is_netdev: true if it is a netdev
1286 * Goes through all the macvlan filters and adds a
1287 * macvlan filter for each unique vlan that already exists
1289 * Returns first filter found on success, else NULL
1291 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1292 bool is_vf, bool is_netdev)
1294 struct i40e_mac_filter *f;
1296 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1298 f->vlan = le16_to_cpu(vsi->info.pvid);
1299 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1300 is_vf, is_netdev)) {
1301 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1307 return list_first_entry_or_null(&vsi->mac_filter_list,
1308 struct i40e_mac_filter, list);
1312 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1313 * @vsi: the PF Main VSI - inappropriate for any other VSI
1314 * @macaddr: the MAC address
1316 * Some older firmware configurations set up a default promiscuous VLAN
1317 * filter that needs to be removed.
1319 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1321 struct i40e_aqc_remove_macvlan_element_data element;
1322 struct i40e_pf *pf = vsi->back;
1325 /* Only appropriate for the PF main VSI */
1326 if (vsi->type != I40E_VSI_MAIN)
1329 memset(&element, 0, sizeof(element));
1330 ether_addr_copy(element.mac_addr, macaddr);
1331 element.vlan_tag = 0;
1332 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1333 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1334 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1342 * i40e_add_filter - Add a mac/vlan filter to the VSI
1343 * @vsi: the VSI to be searched
1344 * @macaddr: the MAC address
1346 * @is_vf: make sure its a VF filter, else doesn't matter
1347 * @is_netdev: make sure its a netdev filter, else doesn't matter
1349 * Returns ptr to the filter object or NULL when no memory available.
1351 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1352 u8 *macaddr, s16 vlan,
1353 bool is_vf, bool is_netdev)
1355 struct i40e_mac_filter *f;
1357 if (!vsi || !macaddr)
1360 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1362 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1364 goto add_filter_out;
1366 ether_addr_copy(f->macaddr, macaddr);
1370 INIT_LIST_HEAD(&f->list);
1371 list_add(&f->list, &vsi->mac_filter_list);
1374 /* increment counter and add a new flag if needed */
1380 } else if (is_netdev) {
1381 if (!f->is_netdev) {
1382 f->is_netdev = true;
1389 /* changed tells sync_filters_subtask to
1390 * push the filter down to the firmware
1393 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1394 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1402 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1403 * @vsi: the VSI to be searched
1404 * @macaddr: the MAC address
1406 * @is_vf: make sure it's a VF filter, else doesn't matter
1407 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1409 void i40e_del_filter(struct i40e_vsi *vsi,
1410 u8 *macaddr, s16 vlan,
1411 bool is_vf, bool is_netdev)
1413 struct i40e_mac_filter *f;
1415 if (!vsi || !macaddr)
1418 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1419 if (!f || f->counter == 0)
1427 } else if (is_netdev) {
1429 f->is_netdev = false;
1433 /* make sure we don't remove a filter in use by VF or netdev */
1435 min_f += (f->is_vf ? 1 : 0);
1436 min_f += (f->is_netdev ? 1 : 0);
1438 if (f->counter > min_f)
1442 /* counter == 0 tells sync_filters_subtask to
1443 * remove the filter from the firmware's list
1445 if (f->counter == 0) {
1447 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1448 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1453 * i40e_set_mac - NDO callback to set mac address
1454 * @netdev: network interface device structure
1455 * @p: pointer to an address structure
1457 * Returns 0 on success, negative on failure
1460 int i40e_set_mac(struct net_device *netdev, void *p)
1462 static int i40e_set_mac(struct net_device *netdev, void *p)
1465 struct i40e_netdev_priv *np = netdev_priv(netdev);
1466 struct i40e_vsi *vsi = np->vsi;
1467 struct i40e_pf *pf = vsi->back;
1468 struct i40e_hw *hw = &pf->hw;
1469 struct sockaddr *addr = p;
1470 struct i40e_mac_filter *f;
1472 if (!is_valid_ether_addr(addr->sa_data))
1473 return -EADDRNOTAVAIL;
1475 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1476 netdev_info(netdev, "already using mac address %pM\n",
1481 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1482 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1483 return -EADDRNOTAVAIL;
1485 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1486 netdev_info(netdev, "returning to hw mac address %pM\n",
1489 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1491 if (vsi->type == I40E_VSI_MAIN) {
1493 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1494 I40E_AQC_WRITE_TYPE_LAA_WOL,
1495 addr->sa_data, NULL);
1498 "Addr change for Main VSI failed: %d\n",
1500 return -EADDRNOTAVAIL;
1504 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1505 struct i40e_aqc_remove_macvlan_element_data element;
1507 memset(&element, 0, sizeof(element));
1508 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1509 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1510 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1512 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1516 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1517 struct i40e_aqc_add_macvlan_element_data element;
1519 memset(&element, 0, sizeof(element));
1520 ether_addr_copy(element.mac_addr, hw->mac.addr);
1521 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1522 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1524 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1530 i40e_sync_vsi_filters(vsi, false);
1531 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1537 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1538 * @vsi: the VSI being setup
1539 * @ctxt: VSI context structure
1540 * @enabled_tc: Enabled TCs bitmap
1541 * @is_add: True if called before Add VSI
1543 * Setup VSI queue mapping for enabled traffic classes.
1546 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1547 struct i40e_vsi_context *ctxt,
1551 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1552 struct i40e_vsi_context *ctxt,
1557 struct i40e_pf *pf = vsi->back;
1567 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1570 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1571 /* Find numtc from enabled TC bitmap */
1572 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1573 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1577 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1581 /* At least TC0 is enabled in case of non-DCB case */
1585 vsi->tc_config.numtc = numtc;
1586 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1587 /* Number of queues per enabled TC */
1588 /* In MFP case we can have a much lower count of MSIx
1589 * vectors available and so we need to lower the used
1592 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1593 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1595 qcount = vsi->alloc_queue_pairs;
1596 num_tc_qps = qcount / numtc;
1597 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1599 /* Setup queue offset/count for all TCs for given VSI */
1600 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1601 /* See if the given TC is enabled for the given VSI */
1602 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1606 switch (vsi->type) {
1608 qcount = min_t(int, pf->rss_size, num_tc_qps);
1612 qcount = num_tc_qps;
1616 case I40E_VSI_SRIOV:
1617 case I40E_VSI_VMDQ2:
1619 qcount = num_tc_qps;
1623 vsi->tc_config.tc_info[i].qoffset = offset;
1624 vsi->tc_config.tc_info[i].qcount = qcount;
1626 /* find the next higher power-of-2 of num queue pairs */
1629 while (num_qps && (BIT_ULL(pow) < qcount)) {
1634 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1636 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1637 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1641 /* TC is not enabled so set the offset to
1642 * default queue and allocate one queue
1645 vsi->tc_config.tc_info[i].qoffset = 0;
1646 vsi->tc_config.tc_info[i].qcount = 1;
1647 vsi->tc_config.tc_info[i].netdev_tc = 0;
1651 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1654 /* Set actual Tx/Rx queue pairs */
1655 vsi->num_queue_pairs = offset;
1656 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1657 if (vsi->req_queue_pairs > 0)
1658 vsi->num_queue_pairs = vsi->req_queue_pairs;
1659 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1660 vsi->num_queue_pairs = pf->num_lan_msix;
1663 /* Scheduler section valid can only be set for ADD VSI */
1665 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1667 ctxt->info.up_enable_bits = enabled_tc;
1669 if (vsi->type == I40E_VSI_SRIOV) {
1670 ctxt->info.mapping_flags |=
1671 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1672 for (i = 0; i < vsi->num_queue_pairs; i++)
1673 ctxt->info.queue_mapping[i] =
1674 cpu_to_le16(vsi->base_queue + i);
1676 ctxt->info.mapping_flags |=
1677 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1678 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1680 ctxt->info.valid_sections |= cpu_to_le16(sections);
1684 * i40e_set_rx_mode - NDO callback to set the netdev filters
1685 * @netdev: network interface device structure
1688 void i40e_set_rx_mode(struct net_device *netdev)
1690 static void i40e_set_rx_mode(struct net_device *netdev)
1693 struct i40e_netdev_priv *np = netdev_priv(netdev);
1694 struct i40e_mac_filter *f, *ftmp;
1695 struct i40e_vsi *vsi = np->vsi;
1696 struct netdev_hw_addr *uca;
1697 struct netdev_hw_addr *mca;
1698 struct netdev_hw_addr *ha;
1700 /* add addr if not already in the filter list */
1701 netdev_for_each_uc_addr(uca, netdev) {
1702 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1703 if (i40e_is_vsi_in_vlan(vsi))
1704 i40e_put_mac_in_vlan(vsi, uca->addr,
1707 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1712 netdev_for_each_mc_addr(mca, netdev) {
1713 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1714 if (i40e_is_vsi_in_vlan(vsi))
1715 i40e_put_mac_in_vlan(vsi, mca->addr,
1718 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1723 /* remove filter if not in netdev list */
1724 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1730 if (is_multicast_ether_addr(f->macaddr)) {
1731 netdev_for_each_mc_addr(mca, netdev) {
1732 if (ether_addr_equal(mca->addr, f->macaddr)) {
1738 netdev_for_each_uc_addr(uca, netdev) {
1739 if (ether_addr_equal(uca->addr, f->macaddr)) {
1745 for_each_dev_addr(netdev, ha) {
1746 if (ether_addr_equal(ha->addr, f->macaddr)) {
1754 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1757 /* check for other flag changes */
1758 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1759 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1760 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1765 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1766 * @vsi: ptr to the VSI
1767 * @grab_rtnl: whether RTNL needs to be grabbed
1769 * Push any outstanding VSI filter changes through the AdminQ.
1771 * Returns 0 or error value
1773 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1775 struct i40e_mac_filter *f, *ftmp;
1776 bool promisc_forced_on = false;
1777 bool add_happened = false;
1778 int filter_list_len = 0;
1779 u32 changed_flags = 0;
1780 i40e_status ret = 0;
1787 /* empty array typed pointers, kcalloc later */
1788 struct i40e_aqc_add_macvlan_element_data *add_list;
1789 struct i40e_aqc_remove_macvlan_element_data *del_list;
1791 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1792 usleep_range(1000, 2000);
1796 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1797 vsi->current_netdev_flags = vsi->netdev->flags;
1800 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1801 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1803 filter_list_len = pf->hw.aq.asq_buf_size /
1804 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1805 del_list = kcalloc(filter_list_len,
1806 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1811 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1815 if (f->counter != 0)
1820 /* add to delete list */
1821 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1822 del_list[num_del].vlan_tag =
1823 cpu_to_le16((u16)(f->vlan ==
1824 I40E_VLAN_ANY ? 0 : f->vlan));
1826 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1827 del_list[num_del].flags = cmd_flags;
1830 /* unlink from filter list */
1834 /* flush a full buffer */
1835 if (num_del == filter_list_len) {
1836 ret = i40e_aq_remove_macvlan(&pf->hw,
1837 vsi->seid, del_list, num_del,
1839 aq_err = pf->hw.aq.asq_last_status;
1841 memset(del_list, 0, sizeof(*del_list));
1843 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1844 dev_info(&pf->pdev->dev,
1845 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1846 i40e_stat_str(&pf->hw, ret),
1847 i40e_aq_str(&pf->hw, aq_err));
1851 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1852 del_list, num_del, NULL);
1853 aq_err = pf->hw.aq.asq_last_status;
1856 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1857 dev_info(&pf->pdev->dev,
1858 "ignoring delete macvlan error, err %s aq_err %s\n",
1859 i40e_stat_str(&pf->hw, ret),
1860 i40e_aq_str(&pf->hw, aq_err));
1866 /* do all the adds now */
1867 filter_list_len = pf->hw.aq.asq_buf_size /
1868 sizeof(struct i40e_aqc_add_macvlan_element_data),
1869 add_list = kcalloc(filter_list_len,
1870 sizeof(struct i40e_aqc_add_macvlan_element_data),
1875 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1879 if (f->counter == 0)
1882 add_happened = true;
1885 /* add to add array */
1886 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1887 add_list[num_add].vlan_tag =
1889 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1890 add_list[num_add].queue_number = 0;
1892 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1893 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1896 /* flush a full buffer */
1897 if (num_add == filter_list_len) {
1898 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1901 aq_err = pf->hw.aq.asq_last_status;
1906 memset(add_list, 0, sizeof(*add_list));
1910 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1911 add_list, num_add, NULL);
1912 aq_err = pf->hw.aq.asq_last_status;
1918 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1919 dev_info(&pf->pdev->dev,
1920 "add filter failed, err %s aq_err %s\n",
1921 i40e_stat_str(&pf->hw, ret),
1922 i40e_aq_str(&pf->hw, aq_err));
1923 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1924 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1926 promisc_forced_on = true;
1927 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1929 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1934 /* check for changes in promiscuous modes */
1935 if (changed_flags & IFF_ALLMULTI) {
1936 bool cur_multipromisc;
1937 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1938 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1943 dev_info(&pf->pdev->dev,
1944 "set multi promisc failed, err %s aq_err %s\n",
1945 i40e_stat_str(&pf->hw, ret),
1946 i40e_aq_str(&pf->hw,
1947 pf->hw.aq.asq_last_status));
1949 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1951 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1952 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1954 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1955 /* set defport ON for Main VSI instead of true promisc
1956 * this way we will get all unicast/multicast and VLAN
1957 * promisc behavior but will not get VF or VMDq traffic
1958 * replicated on the Main VSI.
1960 if (pf->cur_promisc != cur_promisc) {
1961 pf->cur_promisc = cur_promisc;
1963 i40e_do_reset_safe(pf,
1964 BIT(__I40E_PF_RESET_REQUESTED));
1967 BIT(__I40E_PF_RESET_REQUESTED));
1970 ret = i40e_aq_set_vsi_unicast_promiscuous(
1975 dev_info(&pf->pdev->dev,
1976 "set unicast promisc failed, err %d, aq_err %d\n",
1977 ret, pf->hw.aq.asq_last_status);
1978 ret = i40e_aq_set_vsi_multicast_promiscuous(
1983 dev_info(&pf->pdev->dev,
1984 "set multicast promisc failed, err %d, aq_err %d\n",
1985 ret, pf->hw.aq.asq_last_status);
1987 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1991 dev_info(&pf->pdev->dev,
1992 "set brdcast promisc failed, err %s, aq_err %s\n",
1993 i40e_stat_str(&pf->hw, ret),
1994 i40e_aq_str(&pf->hw,
1995 pf->hw.aq.asq_last_status));
1998 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2003 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2004 * @pf: board private structure
2006 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2010 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2012 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2014 for (v = 0; v < pf->num_alloc_vsi; v++) {
2016 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2017 i40e_sync_vsi_filters(pf->vsi[v], true);
2022 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2023 * @netdev: network interface device structure
2024 * @new_mtu: new value for maximum frame size
2026 * Returns 0 on success, negative on failure
2028 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2030 struct i40e_netdev_priv *np = netdev_priv(netdev);
2031 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2032 struct i40e_vsi *vsi = np->vsi;
2034 /* MTU < 68 is an error and causes problems on some kernels */
2035 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2038 netdev_info(netdev, "changing MTU from %d to %d\n",
2039 netdev->mtu, new_mtu);
2040 netdev->mtu = new_mtu;
2041 if (netif_running(netdev))
2042 i40e_vsi_reinit_locked(vsi);
2048 * i40e_ioctl - Access the hwtstamp interface
2049 * @netdev: network interface device structure
2050 * @ifr: interface request data
2051 * @cmd: ioctl command
2053 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2055 struct i40e_netdev_priv *np = netdev_priv(netdev);
2056 struct i40e_pf *pf = np->vsi->back;
2060 return i40e_ptp_get_ts_config(pf, ifr);
2062 return i40e_ptp_set_ts_config(pf, ifr);
2069 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2070 * @vsi: the vsi being adjusted
2072 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2074 struct i40e_vsi_context ctxt;
2077 if ((vsi->info.valid_sections &
2078 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2079 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2080 return; /* already enabled */
2082 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2083 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2084 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2086 ctxt.seid = vsi->seid;
2087 ctxt.info = vsi->info;
2088 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2090 dev_info(&vsi->back->pdev->dev,
2091 "update vlan stripping failed, err %s aq_err %s\n",
2092 i40e_stat_str(&vsi->back->hw, ret),
2093 i40e_aq_str(&vsi->back->hw,
2094 vsi->back->hw.aq.asq_last_status));
2099 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2100 * @vsi: the vsi being adjusted
2102 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2104 struct i40e_vsi_context ctxt;
2107 if ((vsi->info.valid_sections &
2108 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2109 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2110 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2111 return; /* already disabled */
2113 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2114 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2115 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2117 ctxt.seid = vsi->seid;
2118 ctxt.info = vsi->info;
2119 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2121 dev_info(&vsi->back->pdev->dev,
2122 "update vlan stripping failed, err %s aq_err %s\n",
2123 i40e_stat_str(&vsi->back->hw, ret),
2124 i40e_aq_str(&vsi->back->hw,
2125 vsi->back->hw.aq.asq_last_status));
2130 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2131 * @netdev: network interface to be adjusted
2132 * @features: netdev features to test if VLAN offload is enabled or not
2134 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2136 struct i40e_netdev_priv *np = netdev_priv(netdev);
2137 struct i40e_vsi *vsi = np->vsi;
2139 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2140 i40e_vlan_stripping_enable(vsi);
2142 i40e_vlan_stripping_disable(vsi);
2146 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2147 * @vsi: the vsi being configured
2148 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2150 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2152 struct i40e_mac_filter *f, *add_f;
2153 bool is_netdev, is_vf;
2155 is_vf = (vsi->type == I40E_VSI_SRIOV);
2156 is_netdev = !!(vsi->netdev);
2159 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2162 dev_info(&vsi->back->pdev->dev,
2163 "Could not add vlan filter %d for %pM\n",
2164 vid, vsi->netdev->dev_addr);
2169 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2170 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2172 dev_info(&vsi->back->pdev->dev,
2173 "Could not add vlan filter %d for %pM\n",
2179 /* Now if we add a vlan tag, make sure to check if it is the first
2180 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2181 * with 0, so we now accept untagged and specified tagged traffic
2182 * (and not any taged and untagged)
2185 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2187 is_vf, is_netdev)) {
2188 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2189 I40E_VLAN_ANY, is_vf, is_netdev);
2190 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2193 dev_info(&vsi->back->pdev->dev,
2194 "Could not add filter 0 for %pM\n",
2195 vsi->netdev->dev_addr);
2201 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2202 if (vid > 0 && !vsi->info.pvid) {
2203 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2204 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2205 is_vf, is_netdev)) {
2206 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2208 add_f = i40e_add_filter(vsi, f->macaddr,
2209 0, is_vf, is_netdev);
2211 dev_info(&vsi->back->pdev->dev,
2212 "Could not add filter 0 for %pM\n",
2220 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2221 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2224 return i40e_sync_vsi_filters(vsi, false);
2228 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2229 * @vsi: the vsi being configured
2230 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2232 * Return: 0 on success or negative otherwise
2234 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2236 struct net_device *netdev = vsi->netdev;
2237 struct i40e_mac_filter *f, *add_f;
2238 bool is_vf, is_netdev;
2239 int filter_count = 0;
2241 is_vf = (vsi->type == I40E_VSI_SRIOV);
2242 is_netdev = !!(netdev);
2245 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2247 list_for_each_entry(f, &vsi->mac_filter_list, list)
2248 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2250 /* go through all the filters for this VSI and if there is only
2251 * vid == 0 it means there are no other filters, so vid 0 must
2252 * be replaced with -1. This signifies that we should from now
2253 * on accept any traffic (with any tag present, or untagged)
2255 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2258 ether_addr_equal(netdev->dev_addr, f->macaddr))
2266 if (!filter_count && is_netdev) {
2267 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2268 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2271 dev_info(&vsi->back->pdev->dev,
2272 "Could not add filter %d for %pM\n",
2273 I40E_VLAN_ANY, netdev->dev_addr);
2278 if (!filter_count) {
2279 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2280 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2281 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2284 dev_info(&vsi->back->pdev->dev,
2285 "Could not add filter %d for %pM\n",
2286 I40E_VLAN_ANY, f->macaddr);
2292 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2293 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2296 return i40e_sync_vsi_filters(vsi, false);
2300 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2301 * @netdev: network interface to be adjusted
2302 * @vid: vlan id to be added
2304 * net_device_ops implementation for adding vlan ids
2307 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2308 __always_unused __be16 proto, u16 vid)
2310 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2311 __always_unused __be16 proto, u16 vid)
2314 struct i40e_netdev_priv *np = netdev_priv(netdev);
2315 struct i40e_vsi *vsi = np->vsi;
2321 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2323 /* If the network stack called us with vid = 0 then
2324 * it is asking to receive priority tagged packets with
2325 * vlan id 0. Our HW receives them by default when configured
2326 * to receive untagged packets so there is no need to add an
2327 * extra filter for vlan 0 tagged packets.
2330 ret = i40e_vsi_add_vlan(vsi, vid);
2332 if (!ret && (vid < VLAN_N_VID))
2333 set_bit(vid, vsi->active_vlans);
2339 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2340 * @netdev: network interface to be adjusted
2341 * @vid: vlan id to be removed
2343 * net_device_ops implementation for removing vlan ids
2346 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2347 __always_unused __be16 proto, u16 vid)
2349 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2350 __always_unused __be16 proto, u16 vid)
2353 struct i40e_netdev_priv *np = netdev_priv(netdev);
2354 struct i40e_vsi *vsi = np->vsi;
2356 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2358 /* return code is ignored as there is nothing a user
2359 * can do about failure to remove and a log message was
2360 * already printed from the other function
2362 i40e_vsi_kill_vlan(vsi, vid);
2364 clear_bit(vid, vsi->active_vlans);
2370 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2371 * @vsi: the vsi being brought back up
2373 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2380 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2382 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2383 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2388 * i40e_vsi_add_pvid - Add pvid for the VSI
2389 * @vsi: the vsi being adjusted
2390 * @vid: the vlan id to set as a PVID
2392 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2394 struct i40e_vsi_context ctxt;
2397 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2398 vsi->info.pvid = cpu_to_le16(vid);
2399 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2400 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2401 I40E_AQ_VSI_PVLAN_EMOD_STR;
2403 ctxt.seid = vsi->seid;
2404 ctxt.info = vsi->info;
2405 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2407 dev_info(&vsi->back->pdev->dev,
2408 "add pvid failed, err %s aq_err %s\n",
2409 i40e_stat_str(&vsi->back->hw, ret),
2410 i40e_aq_str(&vsi->back->hw,
2411 vsi->back->hw.aq.asq_last_status));
2419 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2420 * @vsi: the vsi being adjusted
2422 * Just use the vlan_rx_register() service to put it back to normal
2424 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2426 i40e_vlan_stripping_disable(vsi);
2432 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2433 * @vsi: ptr to the VSI
2435 * If this function returns with an error, then it's possible one or
2436 * more of the rings is populated (while the rest are not). It is the
2437 * callers duty to clean those orphaned rings.
2439 * Return 0 on success, negative on failure
2441 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2445 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2446 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2452 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2453 * @vsi: ptr to the VSI
2455 * Free VSI's transmit software resources
2457 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2464 for (i = 0; i < vsi->num_queue_pairs; i++)
2465 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2466 i40e_free_tx_resources(vsi->tx_rings[i]);
2470 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2471 * @vsi: ptr to the VSI
2473 * If this function returns with an error, then it's possible one or
2474 * more of the rings is populated (while the rest are not). It is the
2475 * callers duty to clean those orphaned rings.
2477 * Return 0 on success, negative on failure
2479 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2483 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2484 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2486 i40e_fcoe_setup_ddp_resources(vsi);
2492 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2493 * @vsi: ptr to the VSI
2495 * Free all receive software resources
2497 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2504 for (i = 0; i < vsi->num_queue_pairs; i++)
2505 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2506 i40e_free_rx_resources(vsi->rx_rings[i]);
2508 i40e_fcoe_free_ddp_resources(vsi);
2513 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2514 * @ring: The Tx ring to configure
2516 * This enables/disables XPS for a given Tx descriptor ring
2517 * based on the TCs enabled for the VSI that ring belongs to.
2519 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2521 struct i40e_vsi *vsi = ring->vsi;
2524 if (!ring->q_vector || !ring->netdev)
2527 /* Single TC mode enable XPS */
2528 if (vsi->tc_config.numtc <= 1) {
2529 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2530 netif_set_xps_queue(ring->netdev,
2531 &ring->q_vector->affinity_mask,
2533 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2534 /* Disable XPS to allow selection based on TC */
2535 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2536 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2537 free_cpumask_var(mask);
2542 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2543 * @ring: The Tx ring to configure
2545 * Configure the Tx descriptor ring in the HMC context.
2547 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2549 struct i40e_vsi *vsi = ring->vsi;
2550 u16 pf_q = vsi->base_queue + ring->queue_index;
2551 struct i40e_hw *hw = &vsi->back->hw;
2552 struct i40e_hmc_obj_txq tx_ctx;
2553 i40e_status err = 0;
2556 /* some ATR related tx ring init */
2557 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2558 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2559 ring->atr_count = 0;
2561 ring->atr_sample_rate = 0;
2565 i40e_config_xps_tx_ring(ring);
2567 /* clear the context structure first */
2568 memset(&tx_ctx, 0, sizeof(tx_ctx));
2570 tx_ctx.new_context = 1;
2571 tx_ctx.base = (ring->dma / 128);
2572 tx_ctx.qlen = ring->count;
2573 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2574 I40E_FLAG_FD_ATR_ENABLED));
2576 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2578 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2579 /* FDIR VSI tx ring can still use RS bit and writebacks */
2580 if (vsi->type != I40E_VSI_FDIR)
2581 tx_ctx.head_wb_ena = 1;
2582 tx_ctx.head_wb_addr = ring->dma +
2583 (ring->count * sizeof(struct i40e_tx_desc));
2585 /* As part of VSI creation/update, FW allocates certain
2586 * Tx arbitration queue sets for each TC enabled for
2587 * the VSI. The FW returns the handles to these queue
2588 * sets as part of the response buffer to Add VSI,
2589 * Update VSI, etc. AQ commands. It is expected that
2590 * these queue set handles be associated with the Tx
2591 * queues by the driver as part of the TX queue context
2592 * initialization. This has to be done regardless of
2593 * DCB as by default everything is mapped to TC0.
2595 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2596 tx_ctx.rdylist_act = 0;
2598 /* clear the context in the HMC */
2599 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2601 dev_info(&vsi->back->pdev->dev,
2602 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2603 ring->queue_index, pf_q, err);
2607 /* set the context in the HMC */
2608 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2610 dev_info(&vsi->back->pdev->dev,
2611 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2612 ring->queue_index, pf_q, err);
2616 /* Now associate this queue with this PCI function */
2617 if (vsi->type == I40E_VSI_VMDQ2) {
2618 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2619 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2620 I40E_QTX_CTL_VFVM_INDX_MASK;
2622 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2625 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2626 I40E_QTX_CTL_PF_INDX_MASK);
2627 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2630 /* cache tail off for easier writes later */
2631 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2637 * i40e_configure_rx_ring - Configure a receive ring context
2638 * @ring: The Rx ring to configure
2640 * Configure the Rx descriptor ring in the HMC context.
2642 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2644 struct i40e_vsi *vsi = ring->vsi;
2645 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2646 u16 pf_q = vsi->base_queue + ring->queue_index;
2647 struct i40e_hw *hw = &vsi->back->hw;
2648 struct i40e_hmc_obj_rxq rx_ctx;
2649 i40e_status err = 0;
2653 /* clear the context structure first */
2654 memset(&rx_ctx, 0, sizeof(rx_ctx));
2656 ring->rx_buf_len = vsi->rx_buf_len;
2657 ring->rx_hdr_len = vsi->rx_hdr_len;
2659 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2660 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2662 rx_ctx.base = (ring->dma / 128);
2663 rx_ctx.qlen = ring->count;
2665 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2666 set_ring_16byte_desc_enabled(ring);
2672 rx_ctx.dtype = vsi->dtype;
2674 set_ring_ps_enabled(ring);
2675 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2677 I40E_RX_SPLIT_TCP_UDP |
2680 rx_ctx.hsplit_0 = 0;
2683 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2684 (chain_len * ring->rx_buf_len));
2685 if (hw->revision_id == 0)
2686 rx_ctx.lrxqthresh = 0;
2688 rx_ctx.lrxqthresh = 2;
2689 rx_ctx.crcstrip = 1;
2693 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2695 /* set the prefena field to 1 because the manual says to */
2698 /* clear the context in the HMC */
2699 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2701 dev_info(&vsi->back->pdev->dev,
2702 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2703 ring->queue_index, pf_q, err);
2707 /* set the context in the HMC */
2708 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2710 dev_info(&vsi->back->pdev->dev,
2711 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2712 ring->queue_index, pf_q, err);
2716 /* cache tail for quicker writes, and clear the reg before use */
2717 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2718 writel(0, ring->tail);
2720 if (ring_is_ps_enabled(ring)) {
2721 i40e_alloc_rx_headers(ring);
2722 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2724 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2731 * i40e_vsi_configure_tx - Configure the VSI for Tx
2732 * @vsi: VSI structure describing this set of rings and resources
2734 * Configure the Tx VSI for operation.
2736 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2741 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2742 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2748 * i40e_vsi_configure_rx - Configure the VSI for Rx
2749 * @vsi: the VSI being configured
2751 * Configure the Rx VSI for operation.
2753 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2758 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2759 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2760 + ETH_FCS_LEN + VLAN_HLEN;
2762 vsi->max_frame = I40E_RXBUFFER_2048;
2764 /* figure out correct receive buffer length */
2765 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2766 I40E_FLAG_RX_PS_ENABLED)) {
2767 case I40E_FLAG_RX_1BUF_ENABLED:
2768 vsi->rx_hdr_len = 0;
2769 vsi->rx_buf_len = vsi->max_frame;
2770 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2772 case I40E_FLAG_RX_PS_ENABLED:
2773 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2774 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2775 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2778 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2779 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2780 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2785 /* setup rx buffer for FCoE */
2786 if ((vsi->type == I40E_VSI_FCOE) &&
2787 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2788 vsi->rx_hdr_len = 0;
2789 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2790 vsi->max_frame = I40E_RXBUFFER_3072;
2791 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2794 #endif /* I40E_FCOE */
2795 /* round up for the chip's needs */
2796 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2797 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2798 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2799 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2801 /* set up individual rings */
2802 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2803 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2809 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2810 * @vsi: ptr to the VSI
2812 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2814 struct i40e_ring *tx_ring, *rx_ring;
2815 u16 qoffset, qcount;
2818 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2819 /* Reset the TC information */
2820 for (i = 0; i < vsi->num_queue_pairs; i++) {
2821 rx_ring = vsi->rx_rings[i];
2822 tx_ring = vsi->tx_rings[i];
2823 rx_ring->dcb_tc = 0;
2824 tx_ring->dcb_tc = 0;
2828 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2829 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2832 qoffset = vsi->tc_config.tc_info[n].qoffset;
2833 qcount = vsi->tc_config.tc_info[n].qcount;
2834 for (i = qoffset; i < (qoffset + qcount); i++) {
2835 rx_ring = vsi->rx_rings[i];
2836 tx_ring = vsi->tx_rings[i];
2837 rx_ring->dcb_tc = n;
2838 tx_ring->dcb_tc = n;
2844 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2845 * @vsi: ptr to the VSI
2847 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2850 i40e_set_rx_mode(vsi->netdev);
2854 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2855 * @vsi: Pointer to the targeted VSI
2857 * This function replays the hlist on the hw where all the SB Flow Director
2858 * filters were saved.
2860 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2862 struct i40e_fdir_filter *filter;
2863 struct i40e_pf *pf = vsi->back;
2864 struct hlist_node *node;
2866 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2869 hlist_for_each_entry_safe(filter, node,
2870 &pf->fdir_filter_list, fdir_node) {
2871 i40e_add_del_fdir(vsi, filter, true);
2876 * i40e_vsi_configure - Set up the VSI for action
2877 * @vsi: the VSI being configured
2879 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2883 i40e_set_vsi_rx_mode(vsi);
2884 i40e_restore_vlan(vsi);
2885 i40e_vsi_config_dcb_rings(vsi);
2886 err = i40e_vsi_configure_tx(vsi);
2888 err = i40e_vsi_configure_rx(vsi);
2894 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2895 * @vsi: the VSI being configured
2897 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2899 struct i40e_pf *pf = vsi->back;
2900 struct i40e_q_vector *q_vector;
2901 struct i40e_hw *hw = &pf->hw;
2907 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2908 * and PFINT_LNKLSTn registers, e.g.:
2909 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2911 qp = vsi->base_queue;
2912 vector = vsi->base_vector;
2913 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2914 q_vector = vsi->q_vectors[i];
2915 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2916 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2917 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2919 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2920 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2921 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2924 /* Linked list for the queuepairs assigned to this vector */
2925 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2926 for (q = 0; q < q_vector->num_ringpairs; q++) {
2927 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2928 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2929 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2930 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2932 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2934 wr32(hw, I40E_QINT_RQCTL(qp), val);
2936 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2937 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2938 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2939 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2941 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2943 /* Terminate the linked list */
2944 if (q == (q_vector->num_ringpairs - 1))
2945 val |= (I40E_QUEUE_END_OF_LIST
2946 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2948 wr32(hw, I40E_QINT_TQCTL(qp), val);
2957 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2958 * @hw: ptr to the hardware info
2960 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2962 struct i40e_hw *hw = &pf->hw;
2965 /* clear things first */
2966 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2967 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2969 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2970 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2971 I40E_PFINT_ICR0_ENA_GRST_MASK |
2972 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2973 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2974 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2975 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2976 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2978 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2979 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2981 if (pf->flags & I40E_FLAG_PTP)
2982 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2984 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2986 /* SW_ITR_IDX = 0, but don't change INTENA */
2987 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2988 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2990 /* OTHER_ITR_IDX = 0 */
2991 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2995 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2996 * @vsi: the VSI being configured
2998 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3000 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3001 struct i40e_pf *pf = vsi->back;
3002 struct i40e_hw *hw = &pf->hw;
3005 /* set the ITR configuration */
3006 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3007 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3008 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3009 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3010 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3011 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3013 i40e_enable_misc_int_causes(pf);
3015 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3016 wr32(hw, I40E_PFINT_LNKLST0, 0);
3018 /* Associate the queue pair to the vector and enable the queue int */
3019 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3020 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3021 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3023 wr32(hw, I40E_QINT_RQCTL(0), val);
3025 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3026 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3027 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3029 wr32(hw, I40E_QINT_TQCTL(0), val);
3034 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3035 * @pf: board private structure
3037 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3039 struct i40e_hw *hw = &pf->hw;
3041 wr32(hw, I40E_PFINT_DYN_CTL0,
3042 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3047 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3048 * @pf: board private structure
3050 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3052 struct i40e_hw *hw = &pf->hw;
3055 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3056 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3057 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3059 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3064 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3065 * @vsi: pointer to a vsi
3066 * @vector: enable a particular Hw Interrupt vector
3068 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3070 struct i40e_pf *pf = vsi->back;
3071 struct i40e_hw *hw = &pf->hw;
3074 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3075 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3076 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3077 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3078 /* skip the flush */
3082 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3083 * @vsi: pointer to a vsi
3084 * @vector: disable a particular Hw Interrupt vector
3086 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3088 struct i40e_pf *pf = vsi->back;
3089 struct i40e_hw *hw = &pf->hw;
3092 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3093 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3098 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3099 * @irq: interrupt number
3100 * @data: pointer to a q_vector
3102 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3104 struct i40e_q_vector *q_vector = data;
3106 if (!q_vector->tx.ring && !q_vector->rx.ring)
3109 napi_schedule(&q_vector->napi);
3115 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3116 * @vsi: the VSI being configured
3117 * @basename: name for the vector
3119 * Allocates MSI-X vectors and requests interrupts from the kernel.
3121 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3123 int q_vectors = vsi->num_q_vectors;
3124 struct i40e_pf *pf = vsi->back;
3125 int base = vsi->base_vector;
3130 for (vector = 0; vector < q_vectors; vector++) {
3131 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3133 if (q_vector->tx.ring && q_vector->rx.ring) {
3134 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3135 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3137 } else if (q_vector->rx.ring) {
3138 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3139 "%s-%s-%d", basename, "rx", rx_int_idx++);
3140 } else if (q_vector->tx.ring) {
3141 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3142 "%s-%s-%d", basename, "tx", tx_int_idx++);
3144 /* skip this unused q_vector */
3147 err = request_irq(pf->msix_entries[base + vector].vector,
3153 dev_info(&pf->pdev->dev,
3154 "%s: request_irq failed, error: %d\n",
3156 goto free_queue_irqs;
3158 /* assign the mask for this irq */
3159 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3160 &q_vector->affinity_mask);
3163 vsi->irqs_ready = true;
3169 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3171 free_irq(pf->msix_entries[base + vector].vector,
3172 &(vsi->q_vectors[vector]));
3178 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3179 * @vsi: the VSI being un-configured
3181 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3183 struct i40e_pf *pf = vsi->back;
3184 struct i40e_hw *hw = &pf->hw;
3185 int base = vsi->base_vector;
3188 for (i = 0; i < vsi->num_queue_pairs; i++) {
3189 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3190 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3193 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3194 for (i = vsi->base_vector;
3195 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3196 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3199 for (i = 0; i < vsi->num_q_vectors; i++)
3200 synchronize_irq(pf->msix_entries[i + base].vector);
3202 /* Legacy and MSI mode - this stops all interrupt handling */
3203 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3204 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3206 synchronize_irq(pf->pdev->irq);
3211 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3212 * @vsi: the VSI being configured
3214 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3216 struct i40e_pf *pf = vsi->back;
3219 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3220 for (i = vsi->base_vector;
3221 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3222 i40e_irq_dynamic_enable(vsi, i);
3224 i40e_irq_dynamic_enable_icr0(pf);
3227 i40e_flush(&pf->hw);
3232 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3233 * @pf: board private structure
3235 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3238 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3239 i40e_flush(&pf->hw);
3243 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3244 * @irq: interrupt number
3245 * @data: pointer to a q_vector
3247 * This is the handler used for all MSI/Legacy interrupts, and deals
3248 * with both queue and non-queue interrupts. This is also used in
3249 * MSIX mode to handle the non-queue interrupts.
3251 static irqreturn_t i40e_intr(int irq, void *data)
3253 struct i40e_pf *pf = (struct i40e_pf *)data;
3254 struct i40e_hw *hw = &pf->hw;
3255 irqreturn_t ret = IRQ_NONE;
3256 u32 icr0, icr0_remaining;
3259 icr0 = rd32(hw, I40E_PFINT_ICR0);
3260 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3262 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3263 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3266 /* if interrupt but no bits showing, must be SWINT */
3267 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3268 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3271 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3272 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3273 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3274 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3275 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3278 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3279 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3281 /* temporarily disable queue cause for NAPI processing */
3282 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3283 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3284 wr32(hw, I40E_QINT_RQCTL(0), qval);
3286 qval = rd32(hw, I40E_QINT_TQCTL(0));
3287 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3288 wr32(hw, I40E_QINT_TQCTL(0), qval);
3290 if (!test_bit(__I40E_DOWN, &pf->state))
3291 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3294 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3295 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3296 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3299 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3300 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3301 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3304 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3305 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3306 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3309 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3310 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3311 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3312 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3313 val = rd32(hw, I40E_GLGEN_RSTAT);
3314 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3315 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3316 if (val == I40E_RESET_CORER) {
3318 } else if (val == I40E_RESET_GLOBR) {
3320 } else if (val == I40E_RESET_EMPR) {
3322 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3326 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3327 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3328 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3329 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3330 rd32(hw, I40E_PFHMC_ERRORINFO),
3331 rd32(hw, I40E_PFHMC_ERRORDATA));
3334 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3335 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3337 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3338 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3339 i40e_ptp_tx_hwtstamp(pf);
3343 /* If a critical error is pending we have no choice but to reset the
3345 * Report and mask out any remaining unexpected interrupts.
3347 icr0_remaining = icr0 & ena_mask;
3348 if (icr0_remaining) {
3349 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3351 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3352 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3353 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3354 dev_info(&pf->pdev->dev, "device will be reset\n");
3355 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3356 i40e_service_event_schedule(pf);
3358 ena_mask &= ~icr0_remaining;
3363 /* re-enable interrupt causes */
3364 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3365 if (!test_bit(__I40E_DOWN, &pf->state)) {
3366 i40e_service_event_schedule(pf);
3367 i40e_irq_dynamic_enable_icr0(pf);
3374 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3375 * @tx_ring: tx ring to clean
3376 * @budget: how many cleans we're allowed
3378 * Returns true if there's any budget left (e.g. the clean is finished)
3380 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3382 struct i40e_vsi *vsi = tx_ring->vsi;
3383 u16 i = tx_ring->next_to_clean;
3384 struct i40e_tx_buffer *tx_buf;
3385 struct i40e_tx_desc *tx_desc;
3387 tx_buf = &tx_ring->tx_bi[i];
3388 tx_desc = I40E_TX_DESC(tx_ring, i);
3389 i -= tx_ring->count;
3392 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3394 /* if next_to_watch is not set then there is no work pending */
3398 /* prevent any other reads prior to eop_desc */
3399 read_barrier_depends();
3401 /* if the descriptor isn't done, no work yet to do */
3402 if (!(eop_desc->cmd_type_offset_bsz &
3403 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3406 /* clear next_to_watch to prevent false hangs */
3407 tx_buf->next_to_watch = NULL;
3409 tx_desc->buffer_addr = 0;
3410 tx_desc->cmd_type_offset_bsz = 0;
3411 /* move past filter desc */
3416 i -= tx_ring->count;
3417 tx_buf = tx_ring->tx_bi;
3418 tx_desc = I40E_TX_DESC(tx_ring, 0);
3420 /* unmap skb header data */
3421 dma_unmap_single(tx_ring->dev,
3422 dma_unmap_addr(tx_buf, dma),
3423 dma_unmap_len(tx_buf, len),
3425 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3426 kfree(tx_buf->raw_buf);
3428 tx_buf->raw_buf = NULL;
3429 tx_buf->tx_flags = 0;
3430 tx_buf->next_to_watch = NULL;
3431 dma_unmap_len_set(tx_buf, len, 0);
3432 tx_desc->buffer_addr = 0;
3433 tx_desc->cmd_type_offset_bsz = 0;
3435 /* move us past the eop_desc for start of next FD desc */
3440 i -= tx_ring->count;
3441 tx_buf = tx_ring->tx_bi;
3442 tx_desc = I40E_TX_DESC(tx_ring, 0);
3445 /* update budget accounting */
3447 } while (likely(budget));
3449 i += tx_ring->count;
3450 tx_ring->next_to_clean = i;
3452 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3453 i40e_irq_dynamic_enable(vsi,
3454 tx_ring->q_vector->v_idx + vsi->base_vector);
3460 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3461 * @irq: interrupt number
3462 * @data: pointer to a q_vector
3464 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3466 struct i40e_q_vector *q_vector = data;
3467 struct i40e_vsi *vsi;
3469 if (!q_vector->tx.ring)
3472 vsi = q_vector->tx.ring->vsi;
3473 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3479 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3480 * @vsi: the VSI being configured
3481 * @v_idx: vector index
3482 * @qp_idx: queue pair index
3484 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3486 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3487 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3488 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3490 tx_ring->q_vector = q_vector;
3491 tx_ring->next = q_vector->tx.ring;
3492 q_vector->tx.ring = tx_ring;
3493 q_vector->tx.count++;
3495 rx_ring->q_vector = q_vector;
3496 rx_ring->next = q_vector->rx.ring;
3497 q_vector->rx.ring = rx_ring;
3498 q_vector->rx.count++;
3502 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3503 * @vsi: the VSI being configured
3505 * This function maps descriptor rings to the queue-specific vectors
3506 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3507 * one vector per queue pair, but on a constrained vector budget, we
3508 * group the queue pairs as "efficiently" as possible.
3510 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3512 int qp_remaining = vsi->num_queue_pairs;
3513 int q_vectors = vsi->num_q_vectors;
3518 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3519 * group them so there are multiple queues per vector.
3520 * It is also important to go through all the vectors available to be
3521 * sure that if we don't use all the vectors, that the remaining vectors
3522 * are cleared. This is especially important when decreasing the
3523 * number of queues in use.
3525 for (; v_start < q_vectors; v_start++) {
3526 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3528 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3530 q_vector->num_ringpairs = num_ringpairs;
3532 q_vector->rx.count = 0;
3533 q_vector->tx.count = 0;
3534 q_vector->rx.ring = NULL;
3535 q_vector->tx.ring = NULL;
3537 while (num_ringpairs--) {
3538 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3546 * i40e_vsi_request_irq - Request IRQ from the OS
3547 * @vsi: the VSI being configured
3548 * @basename: name for the vector
3550 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3552 struct i40e_pf *pf = vsi->back;
3555 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3556 err = i40e_vsi_request_irq_msix(vsi, basename);
3557 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3558 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3561 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3565 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3570 #ifdef CONFIG_NET_POLL_CONTROLLER
3572 * i40e_netpoll - A Polling 'interrupt'handler
3573 * @netdev: network interface device structure
3575 * This is used by netconsole to send skbs without having to re-enable
3576 * interrupts. It's not called while the normal interrupt routine is executing.
3579 void i40e_netpoll(struct net_device *netdev)
3581 static void i40e_netpoll(struct net_device *netdev)
3584 struct i40e_netdev_priv *np = netdev_priv(netdev);
3585 struct i40e_vsi *vsi = np->vsi;
3586 struct i40e_pf *pf = vsi->back;
3589 /* if interface is down do nothing */
3590 if (test_bit(__I40E_DOWN, &vsi->state))
3593 pf->flags |= I40E_FLAG_IN_NETPOLL;
3594 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3595 for (i = 0; i < vsi->num_q_vectors; i++)
3596 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3598 i40e_intr(pf->pdev->irq, netdev);
3600 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3605 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3606 * @pf: the PF being configured
3607 * @pf_q: the PF queue
3608 * @enable: enable or disable state of the queue
3610 * This routine will wait for the given Tx queue of the PF to reach the
3611 * enabled or disabled state.
3612 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3613 * multiple retries; else will return 0 in case of success.
3615 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3620 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3621 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3622 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3625 usleep_range(10, 20);
3627 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3634 * i40e_vsi_control_tx - Start or stop a VSI's rings
3635 * @vsi: the VSI being configured
3636 * @enable: start or stop the rings
3638 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3640 struct i40e_pf *pf = vsi->back;
3641 struct i40e_hw *hw = &pf->hw;
3642 int i, j, pf_q, ret = 0;
3645 pf_q = vsi->base_queue;
3646 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3648 /* warn the TX unit of coming changes */
3649 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3651 usleep_range(10, 20);
3653 for (j = 0; j < 50; j++) {
3654 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3655 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3656 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3658 usleep_range(1000, 2000);
3660 /* Skip if the queue is already in the requested state */
3661 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3664 /* turn on/off the queue */
3666 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3667 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3669 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3672 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3673 /* No waiting for the Tx queue to disable */
3674 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3677 /* wait for the change to finish */
3678 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3680 dev_info(&pf->pdev->dev,
3681 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3682 __func__, vsi->seid, pf_q,
3683 (enable ? "en" : "dis"));
3688 if (hw->revision_id == 0)
3694 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3695 * @pf: the PF being configured
3696 * @pf_q: the PF queue
3697 * @enable: enable or disable state of the queue
3699 * This routine will wait for the given Rx queue of the PF to reach the
3700 * enabled or disabled state.
3701 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3702 * multiple retries; else will return 0 in case of success.
3704 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3709 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3710 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3711 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3714 usleep_range(10, 20);
3716 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3723 * i40e_vsi_control_rx - Start or stop a VSI's rings
3724 * @vsi: the VSI being configured
3725 * @enable: start or stop the rings
3727 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3729 struct i40e_pf *pf = vsi->back;
3730 struct i40e_hw *hw = &pf->hw;
3731 int i, j, pf_q, ret = 0;
3734 pf_q = vsi->base_queue;
3735 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3736 for (j = 0; j < 50; j++) {
3737 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3738 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3739 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3741 usleep_range(1000, 2000);
3744 /* Skip if the queue is already in the requested state */
3745 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3748 /* turn on/off the queue */
3750 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3752 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3753 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3755 /* wait for the change to finish */
3756 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3758 dev_info(&pf->pdev->dev,
3759 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3760 __func__, vsi->seid, pf_q,
3761 (enable ? "en" : "dis"));
3770 * i40e_vsi_control_rings - Start or stop a VSI's rings
3771 * @vsi: the VSI being configured
3772 * @enable: start or stop the rings
3774 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3778 /* do rx first for enable and last for disable */
3780 ret = i40e_vsi_control_rx(vsi, request);
3783 ret = i40e_vsi_control_tx(vsi, request);
3785 /* Ignore return value, we need to shutdown whatever we can */
3786 i40e_vsi_control_tx(vsi, request);
3787 i40e_vsi_control_rx(vsi, request);
3794 * i40e_vsi_free_irq - Free the irq association with the OS
3795 * @vsi: the VSI being configured
3797 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3799 struct i40e_pf *pf = vsi->back;
3800 struct i40e_hw *hw = &pf->hw;
3801 int base = vsi->base_vector;
3805 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3806 if (!vsi->q_vectors)
3809 if (!vsi->irqs_ready)
3812 vsi->irqs_ready = false;
3813 for (i = 0; i < vsi->num_q_vectors; i++) {
3814 u16 vector = i + base;
3816 /* free only the irqs that were actually requested */
3817 if (!vsi->q_vectors[i] ||
3818 !vsi->q_vectors[i]->num_ringpairs)
3821 /* clear the affinity_mask in the IRQ descriptor */
3822 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3824 free_irq(pf->msix_entries[vector].vector,
3827 /* Tear down the interrupt queue link list
3829 * We know that they come in pairs and always
3830 * the Rx first, then the Tx. To clear the
3831 * link list, stick the EOL value into the
3832 * next_q field of the registers.
3834 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3835 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3836 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3837 val |= I40E_QUEUE_END_OF_LIST
3838 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3839 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3841 while (qp != I40E_QUEUE_END_OF_LIST) {
3844 val = rd32(hw, I40E_QINT_RQCTL(qp));
3846 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3847 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3848 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3849 I40E_QINT_RQCTL_INTEVENT_MASK);
3851 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3852 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3854 wr32(hw, I40E_QINT_RQCTL(qp), val);
3856 val = rd32(hw, I40E_QINT_TQCTL(qp));
3858 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3859 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3861 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3862 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3863 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3864 I40E_QINT_TQCTL_INTEVENT_MASK);
3866 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3867 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3869 wr32(hw, I40E_QINT_TQCTL(qp), val);
3874 free_irq(pf->pdev->irq, pf);
3876 val = rd32(hw, I40E_PFINT_LNKLST0);
3877 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3878 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3879 val |= I40E_QUEUE_END_OF_LIST
3880 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3881 wr32(hw, I40E_PFINT_LNKLST0, val);
3883 val = rd32(hw, I40E_QINT_RQCTL(qp));
3884 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3885 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3886 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3887 I40E_QINT_RQCTL_INTEVENT_MASK);
3889 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3890 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3892 wr32(hw, I40E_QINT_RQCTL(qp), val);
3894 val = rd32(hw, I40E_QINT_TQCTL(qp));
3896 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3897 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3898 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3899 I40E_QINT_TQCTL_INTEVENT_MASK);
3901 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3902 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3904 wr32(hw, I40E_QINT_TQCTL(qp), val);
3909 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3910 * @vsi: the VSI being configured
3911 * @v_idx: Index of vector to be freed
3913 * This function frees the memory allocated to the q_vector. In addition if
3914 * NAPI is enabled it will delete any references to the NAPI struct prior
3915 * to freeing the q_vector.
3917 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3919 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3920 struct i40e_ring *ring;
3925 /* disassociate q_vector from rings */
3926 i40e_for_each_ring(ring, q_vector->tx)
3927 ring->q_vector = NULL;
3929 i40e_for_each_ring(ring, q_vector->rx)
3930 ring->q_vector = NULL;
3932 /* only VSI w/ an associated netdev is set up w/ NAPI */
3934 netif_napi_del(&q_vector->napi);
3936 vsi->q_vectors[v_idx] = NULL;
3938 kfree_rcu(q_vector, rcu);
3942 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3943 * @vsi: the VSI being un-configured
3945 * This frees the memory allocated to the q_vectors and
3946 * deletes references to the NAPI struct.
3948 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3952 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3953 i40e_free_q_vector(vsi, v_idx);
3957 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3958 * @pf: board private structure
3960 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3962 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3963 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3964 pci_disable_msix(pf->pdev);
3965 kfree(pf->msix_entries);
3966 pf->msix_entries = NULL;
3967 kfree(pf->irq_pile);
3968 pf->irq_pile = NULL;
3969 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3970 pci_disable_msi(pf->pdev);
3972 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3976 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3977 * @pf: board private structure
3979 * We go through and clear interrupt specific resources and reset the structure
3980 * to pre-load conditions
3982 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3986 i40e_stop_misc_vector(pf);
3987 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3988 synchronize_irq(pf->msix_entries[0].vector);
3989 free_irq(pf->msix_entries[0].vector, pf);
3992 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3993 for (i = 0; i < pf->num_alloc_vsi; i++)
3995 i40e_vsi_free_q_vectors(pf->vsi[i]);
3996 i40e_reset_interrupt_capability(pf);
4000 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4001 * @vsi: the VSI being configured
4003 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4010 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4011 napi_enable(&vsi->q_vectors[q_idx]->napi);
4015 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4016 * @vsi: the VSI being configured
4018 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4025 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4026 napi_disable(&vsi->q_vectors[q_idx]->napi);
4030 * i40e_vsi_close - Shut down a VSI
4031 * @vsi: the vsi to be quelled
4033 static void i40e_vsi_close(struct i40e_vsi *vsi)
4035 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4037 i40e_vsi_free_irq(vsi);
4038 i40e_vsi_free_tx_resources(vsi);
4039 i40e_vsi_free_rx_resources(vsi);
4040 vsi->current_netdev_flags = 0;
4044 * i40e_quiesce_vsi - Pause a given VSI
4045 * @vsi: the VSI being paused
4047 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4049 if (test_bit(__I40E_DOWN, &vsi->state))
4052 /* No need to disable FCoE VSI when Tx suspended */
4053 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4054 vsi->type == I40E_VSI_FCOE) {
4055 dev_dbg(&vsi->back->pdev->dev,
4056 "%s: VSI seid %d skipping FCoE VSI disable\n",
4057 __func__, vsi->seid);
4061 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4062 if (vsi->netdev && netif_running(vsi->netdev)) {
4063 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4065 i40e_vsi_close(vsi);
4070 * i40e_unquiesce_vsi - Resume a given VSI
4071 * @vsi: the VSI being resumed
4073 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4075 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4078 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4079 if (vsi->netdev && netif_running(vsi->netdev))
4080 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4082 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4086 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4089 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4093 for (v = 0; v < pf->num_alloc_vsi; v++) {
4095 i40e_quiesce_vsi(pf->vsi[v]);
4100 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4103 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4107 for (v = 0; v < pf->num_alloc_vsi; v++) {
4109 i40e_unquiesce_vsi(pf->vsi[v]);
4113 #ifdef CONFIG_I40E_DCB
4115 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4116 * @vsi: the VSI being configured
4118 * This function waits for the given VSI's Tx queues to be disabled.
4120 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4122 struct i40e_pf *pf = vsi->back;
4125 pf_q = vsi->base_queue;
4126 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4127 /* Check and wait for the disable status of the queue */
4128 ret = i40e_pf_txq_wait(pf, pf_q, false);
4130 dev_info(&pf->pdev->dev,
4131 "%s: VSI seid %d Tx ring %d disable timeout\n",
4132 __func__, vsi->seid, pf_q);
4141 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4144 * This function waits for the Tx queues to be in disabled state for all the
4145 * VSIs that are managed by this PF.
4147 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4151 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4152 /* No need to wait for FCoE VSI queues */
4153 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4154 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4166 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4167 * @q_idx: TX queue number
4168 * @vsi: Pointer to VSI struct
4170 * This function checks specified queue for given VSI. Detects hung condition.
4171 * Sets hung bit since it is two step process. Before next run of service task
4172 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4173 * hung condition remain unchanged and during subsequent run, this function
4174 * issues SW interrupt to recover from hung condition.
4176 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4178 struct i40e_ring *tx_ring = NULL;
4180 u32 head, val, tx_pending;
4185 /* now that we have an index, find the tx_ring struct */
4186 for (i = 0; i < vsi->num_queue_pairs; i++) {
4187 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4188 if (q_idx == vsi->tx_rings[i]->queue_index) {
4189 tx_ring = vsi->tx_rings[i];
4198 /* Read interrupt register */
4199 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4201 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4202 tx_ring->vsi->base_vector - 1));
4204 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4206 head = i40e_get_head(tx_ring);
4208 tx_pending = i40e_get_tx_pending(tx_ring);
4210 /* Interrupts are disabled and TX pending is non-zero,
4211 * trigger the SW interrupt (don't wait). Worst case
4212 * there will be one extra interrupt which may result
4213 * into not cleaning any queues because queues are cleaned.
4215 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4216 i40e_force_wb(vsi, tx_ring->q_vector);
4220 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4221 * @pf: pointer to PF struct
4223 * LAN VSI has netdev and netdev has TX queues. This function is to check
4224 * each of those TX queues if they are hung, trigger recovery by issuing
4227 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4229 struct net_device *netdev;
4230 struct i40e_vsi *vsi;
4233 /* Only for LAN VSI */
4234 vsi = pf->vsi[pf->lan_vsi];
4239 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4240 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4241 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4244 /* Make sure type is MAIN VSI */
4245 if (vsi->type != I40E_VSI_MAIN)
4248 netdev = vsi->netdev;
4252 /* Bail out if netif_carrier is not OK */
4253 if (!netif_carrier_ok(netdev))
4256 /* Go thru' TX queues for netdev */
4257 for (i = 0; i < netdev->num_tx_queues; i++) {
4258 struct netdev_queue *q;
4260 q = netdev_get_tx_queue(netdev, i);
4262 i40e_detect_recover_hung_queue(i, vsi);
4267 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4268 * @pf: pointer to PF
4270 * Get TC map for ISCSI PF type that will include iSCSI TC
4273 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4275 struct i40e_dcb_app_priority_table app;
4276 struct i40e_hw *hw = &pf->hw;
4277 u8 enabled_tc = 1; /* TC0 is always enabled */
4279 /* Get the iSCSI APP TLV */
4280 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4282 for (i = 0; i < dcbcfg->numapps; i++) {
4283 app = dcbcfg->app[i];
4284 if (app.selector == I40E_APP_SEL_TCPIP &&
4285 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4286 tc = dcbcfg->etscfg.prioritytable[app.priority];
4287 enabled_tc |= BIT_ULL(tc);
4296 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4297 * @dcbcfg: the corresponding DCBx configuration structure
4299 * Return the number of TCs from given DCBx configuration
4301 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4306 /* Scan the ETS Config Priority Table to find
4307 * traffic class enabled for a given priority
4308 * and use the traffic class index to get the
4309 * number of traffic classes enabled
4311 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4312 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4313 num_tc = dcbcfg->etscfg.prioritytable[i];
4316 /* Traffic class index starts from zero so
4317 * increment to return the actual count
4323 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4324 * @dcbcfg: the corresponding DCBx configuration structure
4326 * Query the current DCB configuration and return the number of
4327 * traffic classes enabled from the given DCBX config
4329 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4331 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4335 for (i = 0; i < num_tc; i++)
4336 enabled_tc |= BIT(i);
4342 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4343 * @pf: PF being queried
4345 * Return number of traffic classes enabled for the given PF
4347 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4349 struct i40e_hw *hw = &pf->hw;
4352 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4354 /* If DCB is not enabled then always in single TC */
4355 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4358 /* SFP mode will be enabled for all TCs on port */
4359 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4360 return i40e_dcb_get_num_tc(dcbcfg);
4362 /* MFP mode return count of enabled TCs for this PF */
4363 if (pf->hw.func_caps.iscsi)
4364 enabled_tc = i40e_get_iscsi_tc_map(pf);
4366 return 1; /* Only TC0 */
4368 /* At least have TC0 */
4369 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4370 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4371 if (enabled_tc & BIT_ULL(i))
4378 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4379 * @pf: PF being queried
4381 * Return a bitmap for first enabled traffic class for this PF.
4383 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4385 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4389 return 0x1; /* TC0 */
4391 /* Find the first enabled TC */
4392 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4393 if (enabled_tc & BIT_ULL(i))
4401 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4402 * @pf: PF being queried
4404 * Return a bitmap for enabled traffic classes for this PF.
4406 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4408 /* If DCB is not enabled for this PF then just return default TC */
4409 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4410 return i40e_pf_get_default_tc(pf);
4412 /* SFP mode we want PF to be enabled for all TCs */
4413 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4414 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4416 /* MFP enabled and iSCSI PF type */
4417 if (pf->hw.func_caps.iscsi)
4418 return i40e_get_iscsi_tc_map(pf);
4420 return i40e_pf_get_default_tc(pf);
4424 * i40e_vsi_get_bw_info - Query VSI BW Information
4425 * @vsi: the VSI being queried
4427 * Returns 0 on success, negative value on failure
4429 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4431 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4432 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4433 struct i40e_pf *pf = vsi->back;
4434 struct i40e_hw *hw = &pf->hw;
4439 /* Get the VSI level BW configuration */
4440 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4442 dev_info(&pf->pdev->dev,
4443 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4444 i40e_stat_str(&pf->hw, ret),
4445 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4449 /* Get the VSI level BW configuration per TC */
4450 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4453 dev_info(&pf->pdev->dev,
4454 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4455 i40e_stat_str(&pf->hw, ret),
4456 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4460 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4461 dev_info(&pf->pdev->dev,
4462 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4463 bw_config.tc_valid_bits,
4464 bw_ets_config.tc_valid_bits);
4465 /* Still continuing */
4468 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4469 vsi->bw_max_quanta = bw_config.max_bw;
4470 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4471 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4472 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4473 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4474 vsi->bw_ets_limit_credits[i] =
4475 le16_to_cpu(bw_ets_config.credits[i]);
4476 /* 3 bits out of 4 for each TC */
4477 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4484 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4485 * @vsi: the VSI being configured
4486 * @enabled_tc: TC bitmap
4487 * @bw_credits: BW shared credits per TC
4489 * Returns 0 on success, negative value on failure
4491 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4494 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4498 bw_data.tc_valid_bits = enabled_tc;
4499 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4500 bw_data.tc_bw_credits[i] = bw_share[i];
4502 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4505 dev_info(&vsi->back->pdev->dev,
4506 "AQ command Config VSI BW allocation per TC failed = %d\n",
4507 vsi->back->hw.aq.asq_last_status);
4511 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4512 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4518 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4519 * @vsi: the VSI being configured
4520 * @enabled_tc: TC map to be enabled
4523 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4525 struct net_device *netdev = vsi->netdev;
4526 struct i40e_pf *pf = vsi->back;
4527 struct i40e_hw *hw = &pf->hw;
4530 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4536 netdev_reset_tc(netdev);
4540 /* Set up actual enabled TCs on the VSI */
4541 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4544 /* set per TC queues for the VSI */
4545 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4546 /* Only set TC queues for enabled tcs
4548 * e.g. For a VSI that has TC0 and TC3 enabled the
4549 * enabled_tc bitmap would be 0x00001001; the driver
4550 * will set the numtc for netdev as 2 that will be
4551 * referenced by the netdev layer as TC 0 and 1.
4553 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4554 netdev_set_tc_queue(netdev,
4555 vsi->tc_config.tc_info[i].netdev_tc,
4556 vsi->tc_config.tc_info[i].qcount,
4557 vsi->tc_config.tc_info[i].qoffset);
4560 /* Assign UP2TC map for the VSI */
4561 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4562 /* Get the actual TC# for the UP */
4563 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4564 /* Get the mapped netdev TC# for the UP */
4565 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4566 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4571 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4572 * @vsi: the VSI being configured
4573 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4575 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4576 struct i40e_vsi_context *ctxt)
4578 /* copy just the sections touched not the entire info
4579 * since not all sections are valid as returned by
4582 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4583 memcpy(&vsi->info.queue_mapping,
4584 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4585 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4586 sizeof(vsi->info.tc_mapping));
4590 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4591 * @vsi: VSI to be configured
4592 * @enabled_tc: TC bitmap
4594 * This configures a particular VSI for TCs that are mapped to the
4595 * given TC bitmap. It uses default bandwidth share for TCs across
4596 * VSIs to configure TC for a particular VSI.
4599 * It is expected that the VSI queues have been quisced before calling
4602 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4604 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4605 struct i40e_vsi_context ctxt;
4609 /* Check if enabled_tc is same as existing or new TCs */
4610 if (vsi->tc_config.enabled_tc == enabled_tc)
4613 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4614 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4615 if (enabled_tc & BIT_ULL(i))
4619 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4621 dev_info(&vsi->back->pdev->dev,
4622 "Failed configuring TC map %d for VSI %d\n",
4623 enabled_tc, vsi->seid);
4627 /* Update Queue Pairs Mapping for currently enabled UPs */
4628 ctxt.seid = vsi->seid;
4629 ctxt.pf_num = vsi->back->hw.pf_id;
4631 ctxt.uplink_seid = vsi->uplink_seid;
4632 ctxt.info = vsi->info;
4633 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4635 /* Update the VSI after updating the VSI queue-mapping information */
4636 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4638 dev_info(&vsi->back->pdev->dev,
4639 "Update vsi tc config failed, err %s aq_err %s\n",
4640 i40e_stat_str(&vsi->back->hw, ret),
4641 i40e_aq_str(&vsi->back->hw,
4642 vsi->back->hw.aq.asq_last_status));
4645 /* update the local VSI info with updated queue map */
4646 i40e_vsi_update_queue_map(vsi, &ctxt);
4647 vsi->info.valid_sections = 0;
4649 /* Update current VSI BW information */
4650 ret = i40e_vsi_get_bw_info(vsi);
4652 dev_info(&vsi->back->pdev->dev,
4653 "Failed updating vsi bw info, err %s aq_err %s\n",
4654 i40e_stat_str(&vsi->back->hw, ret),
4655 i40e_aq_str(&vsi->back->hw,
4656 vsi->back->hw.aq.asq_last_status));
4660 /* Update the netdev TC setup */
4661 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4667 * i40e_veb_config_tc - Configure TCs for given VEB
4669 * @enabled_tc: TC bitmap
4671 * Configures given TC bitmap for VEB (switching) element
4673 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4675 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4676 struct i40e_pf *pf = veb->pf;
4680 /* No TCs or already enabled TCs just return */
4681 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4684 bw_data.tc_valid_bits = enabled_tc;
4685 /* bw_data.absolute_credits is not set (relative) */
4687 /* Enable ETS TCs with equal BW Share for now */
4688 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4689 if (enabled_tc & BIT_ULL(i))
4690 bw_data.tc_bw_share_credits[i] = 1;
4693 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4696 dev_info(&pf->pdev->dev,
4697 "VEB bw config failed, err %s aq_err %s\n",
4698 i40e_stat_str(&pf->hw, ret),
4699 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4703 /* Update the BW information */
4704 ret = i40e_veb_get_bw_info(veb);
4706 dev_info(&pf->pdev->dev,
4707 "Failed getting veb bw config, err %s aq_err %s\n",
4708 i40e_stat_str(&pf->hw, ret),
4709 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4716 #ifdef CONFIG_I40E_DCB
4718 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4721 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4722 * the caller would've quiesce all the VSIs before calling
4725 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4731 /* Enable the TCs available on PF to all VEBs */
4732 tc_map = i40e_pf_get_tc_map(pf);
4733 for (v = 0; v < I40E_MAX_VEB; v++) {
4736 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4738 dev_info(&pf->pdev->dev,
4739 "Failed configuring TC for VEB seid=%d\n",
4741 /* Will try to configure as many components */
4745 /* Update each VSI */
4746 for (v = 0; v < pf->num_alloc_vsi; v++) {
4750 /* - Enable all TCs for the LAN VSI
4752 * - For FCoE VSI only enable the TC configured
4753 * as per the APP TLV
4755 * - For all others keep them at TC0 for now
4757 if (v == pf->lan_vsi)
4758 tc_map = i40e_pf_get_tc_map(pf);
4760 tc_map = i40e_pf_get_default_tc(pf);
4762 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4763 tc_map = i40e_get_fcoe_tc_map(pf);
4764 #endif /* #ifdef I40E_FCOE */
4766 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4768 dev_info(&pf->pdev->dev,
4769 "Failed configuring TC for VSI seid=%d\n",
4771 /* Will try to configure as many components */
4773 /* Re-configure VSI vectors based on updated TC map */
4774 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4775 if (pf->vsi[v]->netdev)
4776 i40e_dcbnl_set_all(pf->vsi[v]);
4782 * i40e_resume_port_tx - Resume port Tx
4785 * Resume a port's Tx and issue a PF reset in case of failure to
4788 static int i40e_resume_port_tx(struct i40e_pf *pf)
4790 struct i40e_hw *hw = &pf->hw;
4793 ret = i40e_aq_resume_port_tx(hw, NULL);
4795 dev_info(&pf->pdev->dev,
4796 "Resume Port Tx failed, err %s aq_err %s\n",
4797 i40e_stat_str(&pf->hw, ret),
4798 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4799 /* Schedule PF reset to recover */
4800 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4801 i40e_service_event_schedule(pf);
4808 * i40e_init_pf_dcb - Initialize DCB configuration
4809 * @pf: PF being configured
4811 * Query the current DCB configuration and cache it
4812 * in the hardware structure
4814 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4816 struct i40e_hw *hw = &pf->hw;
4819 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4820 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4821 (pf->hw.aq.fw_maj_ver < 4))
4824 /* Get the initial DCB configuration */
4825 err = i40e_init_dcb(hw);
4827 /* Device/Function is not DCBX capable */
4828 if ((!hw->func_caps.dcb) ||
4829 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4830 dev_info(&pf->pdev->dev,
4831 "DCBX offload is not supported or is disabled for this PF.\n");
4833 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4837 /* When status is not DISABLED then DCBX in FW */
4838 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4839 DCB_CAP_DCBX_VER_IEEE;
4841 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4842 /* Enable DCB tagging only when more than one TC */
4843 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4844 pf->flags |= I40E_FLAG_DCB_ENABLED;
4845 dev_dbg(&pf->pdev->dev,
4846 "DCBX offload is supported for this PF.\n");
4849 dev_info(&pf->pdev->dev,
4850 "Query for DCB configuration failed, err %s aq_err %s\n",
4851 i40e_stat_str(&pf->hw, err),
4852 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4858 #endif /* CONFIG_I40E_DCB */
4859 #define SPEED_SIZE 14
4862 * i40e_print_link_message - print link up or down
4863 * @vsi: the VSI for which link needs a message
4865 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4867 char speed[SPEED_SIZE] = "Unknown";
4868 char fc[FC_SIZE] = "RX/TX";
4871 netdev_info(vsi->netdev, "NIC Link is Down\n");
4875 /* Warn user if link speed on NPAR enabled partition is not at
4878 if (vsi->back->hw.func_caps.npar_enable &&
4879 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4880 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4881 netdev_warn(vsi->netdev,
4882 "The partition detected link speed that is less than 10Gbps\n");
4884 switch (vsi->back->hw.phy.link_info.link_speed) {
4885 case I40E_LINK_SPEED_40GB:
4886 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4888 case I40E_LINK_SPEED_20GB:
4889 strncpy(speed, "20 Gbps", SPEED_SIZE);
4891 case I40E_LINK_SPEED_10GB:
4892 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4894 case I40E_LINK_SPEED_1GB:
4895 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4897 case I40E_LINK_SPEED_100MB:
4898 strncpy(speed, "100 Mbps", SPEED_SIZE);
4904 switch (vsi->back->hw.fc.current_mode) {
4906 strlcpy(fc, "RX/TX", FC_SIZE);
4908 case I40E_FC_TX_PAUSE:
4909 strlcpy(fc, "TX", FC_SIZE);
4911 case I40E_FC_RX_PAUSE:
4912 strlcpy(fc, "RX", FC_SIZE);
4915 strlcpy(fc, "None", FC_SIZE);
4919 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4924 * i40e_up_complete - Finish the last steps of bringing up a connection
4925 * @vsi: the VSI being configured
4927 static int i40e_up_complete(struct i40e_vsi *vsi)
4929 struct i40e_pf *pf = vsi->back;
4932 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4933 i40e_vsi_configure_msix(vsi);
4935 i40e_configure_msi_and_legacy(vsi);
4938 err = i40e_vsi_control_rings(vsi, true);
4942 clear_bit(__I40E_DOWN, &vsi->state);
4943 i40e_napi_enable_all(vsi);
4944 i40e_vsi_enable_irq(vsi);
4946 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4948 i40e_print_link_message(vsi, true);
4949 netif_tx_start_all_queues(vsi->netdev);
4950 netif_carrier_on(vsi->netdev);
4951 } else if (vsi->netdev) {
4952 i40e_print_link_message(vsi, false);
4953 /* need to check for qualified module here*/
4954 if ((pf->hw.phy.link_info.link_info &
4955 I40E_AQ_MEDIA_AVAILABLE) &&
4956 (!(pf->hw.phy.link_info.an_info &
4957 I40E_AQ_QUALIFIED_MODULE)))
4958 netdev_err(vsi->netdev,
4959 "the driver failed to link because an unqualified module was detected.");
4962 /* replay FDIR SB filters */
4963 if (vsi->type == I40E_VSI_FDIR) {
4964 /* reset fd counters */
4965 pf->fd_add_err = pf->fd_atr_cnt = 0;
4966 if (pf->fd_tcp_rule > 0) {
4967 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4968 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4969 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4970 pf->fd_tcp_rule = 0;
4972 i40e_fdir_filter_restore(vsi);
4974 i40e_service_event_schedule(pf);
4980 * i40e_vsi_reinit_locked - Reset the VSI
4981 * @vsi: the VSI being configured
4983 * Rebuild the ring structs after some configuration
4984 * has changed, e.g. MTU size.
4986 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4988 struct i40e_pf *pf = vsi->back;
4990 WARN_ON(in_interrupt());
4991 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4992 usleep_range(1000, 2000);
4995 /* Give a VF some time to respond to the reset. The
4996 * two second wait is based upon the watchdog cycle in
4999 if (vsi->type == I40E_VSI_SRIOV)
5002 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5006 * i40e_up - Bring the connection back up after being down
5007 * @vsi: the VSI being configured
5009 int i40e_up(struct i40e_vsi *vsi)
5013 err = i40e_vsi_configure(vsi);
5015 err = i40e_up_complete(vsi);
5021 * i40e_down - Shutdown the connection processing
5022 * @vsi: the VSI being stopped
5024 void i40e_down(struct i40e_vsi *vsi)
5028 /* It is assumed that the caller of this function
5029 * sets the vsi->state __I40E_DOWN bit.
5032 netif_carrier_off(vsi->netdev);
5033 netif_tx_disable(vsi->netdev);
5035 i40e_vsi_disable_irq(vsi);
5036 i40e_vsi_control_rings(vsi, false);
5037 i40e_napi_disable_all(vsi);
5039 for (i = 0; i < vsi->num_queue_pairs; i++) {
5040 i40e_clean_tx_ring(vsi->tx_rings[i]);
5041 i40e_clean_rx_ring(vsi->rx_rings[i]);
5046 * i40e_setup_tc - configure multiple traffic classes
5047 * @netdev: net device to configure
5048 * @tc: number of traffic classes to enable
5051 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5053 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5056 struct i40e_netdev_priv *np = netdev_priv(netdev);
5057 struct i40e_vsi *vsi = np->vsi;
5058 struct i40e_pf *pf = vsi->back;
5063 /* Check if DCB enabled to continue */
5064 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5065 netdev_info(netdev, "DCB is not enabled for adapter\n");
5069 /* Check if MFP enabled */
5070 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5071 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5075 /* Check whether tc count is within enabled limit */
5076 if (tc > i40e_pf_get_num_tc(pf)) {
5077 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5081 /* Generate TC map for number of tc requested */
5082 for (i = 0; i < tc; i++)
5083 enabled_tc |= BIT_ULL(i);
5085 /* Requesting same TC configuration as already enabled */
5086 if (enabled_tc == vsi->tc_config.enabled_tc)
5089 /* Quiesce VSI queues */
5090 i40e_quiesce_vsi(vsi);
5092 /* Configure VSI for enabled TCs */
5093 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5095 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5101 i40e_unquiesce_vsi(vsi);
5108 * i40e_open - Called when a network interface is made active
5109 * @netdev: network interface device structure
5111 * The open entry point is called when a network interface is made
5112 * active by the system (IFF_UP). At this point all resources needed
5113 * for transmit and receive operations are allocated, the interrupt
5114 * handler is registered with the OS, the netdev watchdog subtask is
5115 * enabled, and the stack is notified that the interface is ready.
5117 * Returns 0 on success, negative value on failure
5119 int i40e_open(struct net_device *netdev)
5121 struct i40e_netdev_priv *np = netdev_priv(netdev);
5122 struct i40e_vsi *vsi = np->vsi;
5123 struct i40e_pf *pf = vsi->back;
5126 /* disallow open during test or if eeprom is broken */
5127 if (test_bit(__I40E_TESTING, &pf->state) ||
5128 test_bit(__I40E_BAD_EEPROM, &pf->state))
5131 netif_carrier_off(netdev);
5133 err = i40e_vsi_open(vsi);
5137 /* configure global TSO hardware offload settings */
5138 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5139 TCP_FLAG_FIN) >> 16);
5140 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5142 TCP_FLAG_CWR) >> 16);
5143 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5145 #ifdef CONFIG_I40E_VXLAN
5146 vxlan_get_rx_port(netdev);
5154 * @vsi: the VSI to open
5156 * Finish initialization of the VSI.
5158 * Returns 0 on success, negative value on failure
5160 int i40e_vsi_open(struct i40e_vsi *vsi)
5162 struct i40e_pf *pf = vsi->back;
5163 char int_name[I40E_INT_NAME_STR_LEN];
5166 /* allocate descriptors */
5167 err = i40e_vsi_setup_tx_resources(vsi);
5170 err = i40e_vsi_setup_rx_resources(vsi);
5174 err = i40e_vsi_configure(vsi);
5179 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5180 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5181 err = i40e_vsi_request_irq(vsi, int_name);
5185 /* Notify the stack of the actual queue counts. */
5186 err = netif_set_real_num_tx_queues(vsi->netdev,
5187 vsi->num_queue_pairs);
5189 goto err_set_queues;
5191 err = netif_set_real_num_rx_queues(vsi->netdev,
5192 vsi->num_queue_pairs);
5194 goto err_set_queues;
5196 } else if (vsi->type == I40E_VSI_FDIR) {
5197 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5198 dev_driver_string(&pf->pdev->dev),
5199 dev_name(&pf->pdev->dev));
5200 err = i40e_vsi_request_irq(vsi, int_name);
5207 err = i40e_up_complete(vsi);
5209 goto err_up_complete;
5216 i40e_vsi_free_irq(vsi);
5218 i40e_vsi_free_rx_resources(vsi);
5220 i40e_vsi_free_tx_resources(vsi);
5221 if (vsi == pf->vsi[pf->lan_vsi])
5222 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5228 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5229 * @pf: Pointer to PF
5231 * This function destroys the hlist where all the Flow Director
5232 * filters were saved.
5234 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5236 struct i40e_fdir_filter *filter;
5237 struct hlist_node *node2;
5239 hlist_for_each_entry_safe(filter, node2,
5240 &pf->fdir_filter_list, fdir_node) {
5241 hlist_del(&filter->fdir_node);
5244 pf->fdir_pf_active_filters = 0;
5248 * i40e_close - Disables a network interface
5249 * @netdev: network interface device structure
5251 * The close entry point is called when an interface is de-activated
5252 * by the OS. The hardware is still under the driver's control, but
5253 * this netdev interface is disabled.
5255 * Returns 0, this is not allowed to fail
5258 int i40e_close(struct net_device *netdev)
5260 static int i40e_close(struct net_device *netdev)
5263 struct i40e_netdev_priv *np = netdev_priv(netdev);
5264 struct i40e_vsi *vsi = np->vsi;
5266 i40e_vsi_close(vsi);
5272 * i40e_do_reset - Start a PF or Core Reset sequence
5273 * @pf: board private structure
5274 * @reset_flags: which reset is requested
5276 * The essential difference in resets is that the PF Reset
5277 * doesn't clear the packet buffers, doesn't reset the PE
5278 * firmware, and doesn't bother the other PFs on the chip.
5280 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5284 WARN_ON(in_interrupt());
5286 if (i40e_check_asq_alive(&pf->hw))
5287 i40e_vc_notify_reset(pf);
5289 /* do the biggest reset indicated */
5290 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5292 /* Request a Global Reset
5294 * This will start the chip's countdown to the actual full
5295 * chip reset event, and a warning interrupt to be sent
5296 * to all PFs, including the requestor. Our handler
5297 * for the warning interrupt will deal with the shutdown
5298 * and recovery of the switch setup.
5300 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5301 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5302 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5303 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5305 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5307 /* Request a Core Reset
5309 * Same as Global Reset, except does *not* include the MAC/PHY
5311 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5312 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5313 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5314 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5315 i40e_flush(&pf->hw);
5317 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5319 /* Request a PF Reset
5321 * Resets only the PF-specific registers
5323 * This goes directly to the tear-down and rebuild of
5324 * the switch, since we need to do all the recovery as
5325 * for the Core Reset.
5327 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5328 i40e_handle_reset_warning(pf);
5330 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5333 /* Find the VSI(s) that requested a re-init */
5334 dev_info(&pf->pdev->dev,
5335 "VSI reinit requested\n");
5336 for (v = 0; v < pf->num_alloc_vsi; v++) {
5337 struct i40e_vsi *vsi = pf->vsi[v];
5339 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5340 i40e_vsi_reinit_locked(pf->vsi[v]);
5341 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5345 /* no further action needed, so return now */
5347 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5350 /* Find the VSI(s) that needs to be brought down */
5351 dev_info(&pf->pdev->dev, "VSI down requested\n");
5352 for (v = 0; v < pf->num_alloc_vsi; v++) {
5353 struct i40e_vsi *vsi = pf->vsi[v];
5355 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5356 set_bit(__I40E_DOWN, &vsi->state);
5358 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5362 /* no further action needed, so return now */
5365 dev_info(&pf->pdev->dev,
5366 "bad reset request 0x%08x\n", reset_flags);
5371 #ifdef CONFIG_I40E_DCB
5373 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5374 * @pf: board private structure
5375 * @old_cfg: current DCB config
5376 * @new_cfg: new DCB config
5378 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5379 struct i40e_dcbx_config *old_cfg,
5380 struct i40e_dcbx_config *new_cfg)
5382 bool need_reconfig = false;
5384 /* Check if ETS configuration has changed */
5385 if (memcmp(&new_cfg->etscfg,
5387 sizeof(new_cfg->etscfg))) {
5388 /* If Priority Table has changed reconfig is needed */
5389 if (memcmp(&new_cfg->etscfg.prioritytable,
5390 &old_cfg->etscfg.prioritytable,
5391 sizeof(new_cfg->etscfg.prioritytable))) {
5392 need_reconfig = true;
5393 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5396 if (memcmp(&new_cfg->etscfg.tcbwtable,
5397 &old_cfg->etscfg.tcbwtable,
5398 sizeof(new_cfg->etscfg.tcbwtable)))
5399 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5401 if (memcmp(&new_cfg->etscfg.tsatable,
5402 &old_cfg->etscfg.tsatable,
5403 sizeof(new_cfg->etscfg.tsatable)))
5404 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5407 /* Check if PFC configuration has changed */
5408 if (memcmp(&new_cfg->pfc,
5410 sizeof(new_cfg->pfc))) {
5411 need_reconfig = true;
5412 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5415 /* Check if APP Table has changed */
5416 if (memcmp(&new_cfg->app,
5418 sizeof(new_cfg->app))) {
5419 need_reconfig = true;
5420 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5423 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5425 return need_reconfig;
5429 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5430 * @pf: board private structure
5431 * @e: event info posted on ARQ
5433 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5434 struct i40e_arq_event_info *e)
5436 struct i40e_aqc_lldp_get_mib *mib =
5437 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5438 struct i40e_hw *hw = &pf->hw;
5439 struct i40e_dcbx_config tmp_dcbx_cfg;
5440 bool need_reconfig = false;
5444 /* Not DCB capable or capability disabled */
5445 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5448 /* Ignore if event is not for Nearest Bridge */
5449 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5450 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5451 dev_dbg(&pf->pdev->dev,
5452 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5453 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5456 /* Check MIB Type and return if event for Remote MIB update */
5457 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5458 dev_dbg(&pf->pdev->dev,
5459 "%s: LLDP event mib type %s\n", __func__,
5460 type ? "remote" : "local");
5461 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5462 /* Update the remote cached instance and return */
5463 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5464 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5465 &hw->remote_dcbx_config);
5469 /* Store the old configuration */
5470 tmp_dcbx_cfg = hw->local_dcbx_config;
5472 /* Reset the old DCBx configuration data */
5473 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5474 /* Get updated DCBX data from firmware */
5475 ret = i40e_get_dcb_config(&pf->hw);
5477 dev_info(&pf->pdev->dev,
5478 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5479 i40e_stat_str(&pf->hw, ret),
5480 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5484 /* No change detected in DCBX configs */
5485 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5486 sizeof(tmp_dcbx_cfg))) {
5487 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5491 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5492 &hw->local_dcbx_config);
5494 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5499 /* Enable DCB tagging only when more than one TC */
5500 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5501 pf->flags |= I40E_FLAG_DCB_ENABLED;
5503 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5505 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5506 /* Reconfiguration needed quiesce all VSIs */
5507 i40e_pf_quiesce_all_vsi(pf);
5509 /* Changes in configuration update VEB/VSI */
5510 i40e_dcb_reconfigure(pf);
5512 ret = i40e_resume_port_tx(pf);
5514 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5515 /* In case of error no point in resuming VSIs */
5519 /* Wait for the PF's Tx queues to be disabled */
5520 ret = i40e_pf_wait_txq_disabled(pf);
5522 /* Schedule PF reset to recover */
5523 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5524 i40e_service_event_schedule(pf);
5526 i40e_pf_unquiesce_all_vsi(pf);
5532 #endif /* CONFIG_I40E_DCB */
5535 * i40e_do_reset_safe - Protected reset path for userland calls.
5536 * @pf: board private structure
5537 * @reset_flags: which reset is requested
5540 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5543 i40e_do_reset(pf, reset_flags);
5548 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5549 * @pf: board private structure
5550 * @e: event info posted on ARQ
5552 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5555 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5556 struct i40e_arq_event_info *e)
5558 struct i40e_aqc_lan_overflow *data =
5559 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5560 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5561 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5562 struct i40e_hw *hw = &pf->hw;
5566 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5569 /* Queue belongs to VF, find the VF and issue VF reset */
5570 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5571 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5572 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5573 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5574 vf_id -= hw->func_caps.vf_base_id;
5575 vf = &pf->vf[vf_id];
5576 i40e_vc_notify_vf_reset(vf);
5577 /* Allow VF to process pending reset notification */
5579 i40e_reset_vf(vf, false);
5584 * i40e_service_event_complete - Finish up the service event
5585 * @pf: board private structure
5587 static void i40e_service_event_complete(struct i40e_pf *pf)
5589 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5591 /* flush memory to make sure state is correct before next watchog */
5592 smp_mb__before_atomic();
5593 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5597 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5598 * @pf: board private structure
5600 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5604 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5605 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5610 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5611 * @pf: board private structure
5613 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5617 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5618 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5619 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5620 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5625 * i40e_get_global_fd_count - Get total FD filters programmed on device
5626 * @pf: board private structure
5628 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5632 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5633 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5634 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5635 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5640 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5641 * @pf: board private structure
5643 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5645 u32 fcnt_prog, fcnt_avail;
5647 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5650 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5653 fcnt_prog = i40e_get_global_fd_count(pf);
5654 fcnt_avail = pf->fdir_pf_filter_count;
5655 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5656 (pf->fd_add_err == 0) ||
5657 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5658 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5659 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5660 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5661 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5662 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5665 /* Wait for some more space to be available to turn on ATR */
5666 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5667 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5668 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5669 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5670 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5671 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5676 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5677 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5679 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5680 * @pf: board private structure
5682 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5684 unsigned long min_flush_time;
5685 int flush_wait_retry = 50;
5686 bool disable_atr = false;
5690 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5693 if (time_after(jiffies, pf->fd_flush_timestamp +
5694 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5695 /* If the flush is happening too quick and we have mostly
5696 * SB rules we should not re-enable ATR for some time.
5698 min_flush_time = pf->fd_flush_timestamp
5699 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5700 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5702 if (!(time_after(jiffies, min_flush_time)) &&
5703 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5704 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5705 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5709 pf->fd_flush_timestamp = jiffies;
5710 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5711 /* flush all filters */
5712 wr32(&pf->hw, I40E_PFQF_CTL_1,
5713 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5714 i40e_flush(&pf->hw);
5718 /* Check FD flush status every 5-6msec */
5719 usleep_range(5000, 6000);
5720 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5721 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5723 } while (flush_wait_retry--);
5724 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5725 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5727 /* replay sideband filters */
5728 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5730 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5731 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5732 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5733 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5739 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5740 * @pf: board private structure
5742 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5744 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5747 /* We can see up to 256 filter programming desc in transit if the filters are
5748 * being applied really fast; before we see the first
5749 * filter miss error on Rx queue 0. Accumulating enough error messages before
5750 * reacting will make sure we don't cause flush too often.
5752 #define I40E_MAX_FD_PROGRAM_ERROR 256
5755 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5756 * @pf: board private structure
5758 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5761 /* if interface is down do nothing */
5762 if (test_bit(__I40E_DOWN, &pf->state))
5765 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5768 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5769 i40e_fdir_flush_and_replay(pf);
5771 i40e_fdir_check_and_reenable(pf);
5776 * i40e_vsi_link_event - notify VSI of a link event
5777 * @vsi: vsi to be notified
5778 * @link_up: link up or down
5780 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5782 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5785 switch (vsi->type) {
5790 if (!vsi->netdev || !vsi->netdev_registered)
5794 netif_carrier_on(vsi->netdev);
5795 netif_tx_wake_all_queues(vsi->netdev);
5797 netif_carrier_off(vsi->netdev);
5798 netif_tx_stop_all_queues(vsi->netdev);
5802 case I40E_VSI_SRIOV:
5803 case I40E_VSI_VMDQ2:
5805 case I40E_VSI_MIRROR:
5807 /* there is no notification for other VSIs */
5813 * i40e_veb_link_event - notify elements on the veb of a link event
5814 * @veb: veb to be notified
5815 * @link_up: link up or down
5817 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5822 if (!veb || !veb->pf)
5826 /* depth first... */
5827 for (i = 0; i < I40E_MAX_VEB; i++)
5828 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5829 i40e_veb_link_event(pf->veb[i], link_up);
5831 /* ... now the local VSIs */
5832 for (i = 0; i < pf->num_alloc_vsi; i++)
5833 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5834 i40e_vsi_link_event(pf->vsi[i], link_up);
5838 * i40e_link_event - Update netif_carrier status
5839 * @pf: board private structure
5841 static void i40e_link_event(struct i40e_pf *pf)
5843 bool new_link, old_link;
5844 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5845 u8 new_link_speed, old_link_speed;
5847 /* set this to force the get_link_status call to refresh state */
5848 pf->hw.phy.get_link_info = true;
5850 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5851 new_link = i40e_get_link_status(&pf->hw);
5852 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5853 new_link_speed = pf->hw.phy.link_info.link_speed;
5855 if (new_link == old_link &&
5856 new_link_speed == old_link_speed &&
5857 (test_bit(__I40E_DOWN, &vsi->state) ||
5858 new_link == netif_carrier_ok(vsi->netdev)))
5861 if (!test_bit(__I40E_DOWN, &vsi->state))
5862 i40e_print_link_message(vsi, new_link);
5864 /* Notify the base of the switch tree connected to
5865 * the link. Floating VEBs are not notified.
5867 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5868 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5870 i40e_vsi_link_event(vsi, new_link);
5873 i40e_vc_notify_link_state(pf);
5875 if (pf->flags & I40E_FLAG_PTP)
5876 i40e_ptp_set_increment(pf);
5880 * i40e_watchdog_subtask - periodic checks not using event driven response
5881 * @pf: board private structure
5883 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5887 /* if interface is down do nothing */
5888 if (test_bit(__I40E_DOWN, &pf->state) ||
5889 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5892 /* make sure we don't do these things too often */
5893 if (time_before(jiffies, (pf->service_timer_previous +
5894 pf->service_timer_period)))
5896 pf->service_timer_previous = jiffies;
5898 i40e_link_event(pf);
5900 /* Update the stats for active netdevs so the network stack
5901 * can look at updated numbers whenever it cares to
5903 for (i = 0; i < pf->num_alloc_vsi; i++)
5904 if (pf->vsi[i] && pf->vsi[i]->netdev)
5905 i40e_update_stats(pf->vsi[i]);
5907 /* Update the stats for the active switching components */
5908 for (i = 0; i < I40E_MAX_VEB; i++)
5910 i40e_update_veb_stats(pf->veb[i]);
5912 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5916 * i40e_reset_subtask - Set up for resetting the device and driver
5917 * @pf: board private structure
5919 static void i40e_reset_subtask(struct i40e_pf *pf)
5921 u32 reset_flags = 0;
5924 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5925 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5926 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5928 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5929 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5930 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5932 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5933 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5934 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5936 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5937 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5938 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5940 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5941 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5942 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5945 /* If there's a recovery already waiting, it takes
5946 * precedence before starting a new reset sequence.
5948 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5949 i40e_handle_reset_warning(pf);
5953 /* If we're already down or resetting, just bail */
5955 !test_bit(__I40E_DOWN, &pf->state) &&
5956 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5957 i40e_do_reset(pf, reset_flags);
5964 * i40e_handle_link_event - Handle link event
5965 * @pf: board private structure
5966 * @e: event info posted on ARQ
5968 static void i40e_handle_link_event(struct i40e_pf *pf,
5969 struct i40e_arq_event_info *e)
5971 struct i40e_hw *hw = &pf->hw;
5972 struct i40e_aqc_get_link_status *status =
5973 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5975 /* save off old link status information */
5976 hw->phy.link_info_old = hw->phy.link_info;
5978 /* Do a new status request to re-enable LSE reporting
5979 * and load new status information into the hw struct
5980 * This completely ignores any state information
5981 * in the ARQ event info, instead choosing to always
5982 * issue the AQ update link status command.
5984 i40e_link_event(pf);
5986 /* check for unqualified module, if link is down */
5987 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5988 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5989 (!(status->link_info & I40E_AQ_LINK_UP)))
5990 dev_err(&pf->pdev->dev,
5991 "The driver failed to link because an unqualified module was detected.\n");
5995 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5996 * @pf: board private structure
5998 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6000 struct i40e_arq_event_info event;
6001 struct i40e_hw *hw = &pf->hw;
6008 /* Do not run clean AQ when PF reset fails */
6009 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6012 /* check for error indications */
6013 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6015 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6016 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6017 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6019 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6020 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6021 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6023 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6024 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6025 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6028 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6030 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6032 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6033 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6034 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6036 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6037 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6038 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6040 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6041 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6042 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6045 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6047 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6048 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6053 ret = i40e_clean_arq_element(hw, &event, &pending);
6054 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6057 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6061 opcode = le16_to_cpu(event.desc.opcode);
6064 case i40e_aqc_opc_get_link_status:
6065 i40e_handle_link_event(pf, &event);
6067 case i40e_aqc_opc_send_msg_to_pf:
6068 ret = i40e_vc_process_vf_msg(pf,
6069 le16_to_cpu(event.desc.retval),
6070 le32_to_cpu(event.desc.cookie_high),
6071 le32_to_cpu(event.desc.cookie_low),
6075 case i40e_aqc_opc_lldp_update_mib:
6076 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6077 #ifdef CONFIG_I40E_DCB
6079 ret = i40e_handle_lldp_event(pf, &event);
6081 #endif /* CONFIG_I40E_DCB */
6083 case i40e_aqc_opc_event_lan_overflow:
6084 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6085 i40e_handle_lan_overflow_event(pf, &event);
6087 case i40e_aqc_opc_send_msg_to_peer:
6088 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6090 case i40e_aqc_opc_nvm_erase:
6091 case i40e_aqc_opc_nvm_update:
6092 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6095 dev_info(&pf->pdev->dev,
6096 "ARQ Error: Unknown event 0x%04x received\n",
6100 } while (pending && (i++ < pf->adminq_work_limit));
6102 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6103 /* re-enable Admin queue interrupt cause */
6104 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6105 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6106 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6109 kfree(event.msg_buf);
6113 * i40e_verify_eeprom - make sure eeprom is good to use
6114 * @pf: board private structure
6116 static void i40e_verify_eeprom(struct i40e_pf *pf)
6120 err = i40e_diag_eeprom_test(&pf->hw);
6122 /* retry in case of garbage read */
6123 err = i40e_diag_eeprom_test(&pf->hw);
6125 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6127 set_bit(__I40E_BAD_EEPROM, &pf->state);
6131 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6132 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6133 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6138 * i40e_enable_pf_switch_lb
6139 * @pf: pointer to the PF structure
6141 * enable switch loop back or die - no point in a return value
6143 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6145 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6146 struct i40e_vsi_context ctxt;
6149 ctxt.seid = pf->main_vsi_seid;
6150 ctxt.pf_num = pf->hw.pf_id;
6152 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6154 dev_info(&pf->pdev->dev,
6155 "couldn't get PF vsi config, err %s aq_err %s\n",
6156 i40e_stat_str(&pf->hw, ret),
6157 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6160 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6161 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6162 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6164 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6166 dev_info(&pf->pdev->dev,
6167 "update vsi switch failed, err %s aq_err %s\n",
6168 i40e_stat_str(&pf->hw, ret),
6169 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6174 * i40e_disable_pf_switch_lb
6175 * @pf: pointer to the PF structure
6177 * disable switch loop back or die - no point in a return value
6179 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6181 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6182 struct i40e_vsi_context ctxt;
6185 ctxt.seid = pf->main_vsi_seid;
6186 ctxt.pf_num = pf->hw.pf_id;
6188 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6190 dev_info(&pf->pdev->dev,
6191 "couldn't get PF vsi config, err %s aq_err %s\n",
6192 i40e_stat_str(&pf->hw, ret),
6193 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6196 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6197 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6198 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6200 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6202 dev_info(&pf->pdev->dev,
6203 "update vsi switch failed, err %s aq_err %s\n",
6204 i40e_stat_str(&pf->hw, ret),
6205 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6210 * i40e_config_bridge_mode - Configure the HW bridge mode
6211 * @veb: pointer to the bridge instance
6213 * Configure the loop back mode for the LAN VSI that is downlink to the
6214 * specified HW bridge instance. It is expected this function is called
6215 * when a new HW bridge is instantiated.
6217 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6219 struct i40e_pf *pf = veb->pf;
6221 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6222 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6223 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6224 i40e_disable_pf_switch_lb(pf);
6226 i40e_enable_pf_switch_lb(pf);
6230 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6231 * @veb: pointer to the VEB instance
6233 * This is a recursive function that first builds the attached VSIs then
6234 * recurses in to build the next layer of VEB. We track the connections
6235 * through our own index numbers because the seid's from the HW could
6236 * change across the reset.
6238 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6240 struct i40e_vsi *ctl_vsi = NULL;
6241 struct i40e_pf *pf = veb->pf;
6245 /* build VSI that owns this VEB, temporarily attached to base VEB */
6246 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6248 pf->vsi[v]->veb_idx == veb->idx &&
6249 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6250 ctl_vsi = pf->vsi[v];
6255 dev_info(&pf->pdev->dev,
6256 "missing owner VSI for veb_idx %d\n", veb->idx);
6258 goto end_reconstitute;
6260 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6261 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6262 ret = i40e_add_vsi(ctl_vsi);
6264 dev_info(&pf->pdev->dev,
6265 "rebuild of veb_idx %d owner VSI failed: %d\n",
6267 goto end_reconstitute;
6269 i40e_vsi_reset_stats(ctl_vsi);
6271 /* create the VEB in the switch and move the VSI onto the VEB */
6272 ret = i40e_add_veb(veb, ctl_vsi);
6274 goto end_reconstitute;
6276 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6277 veb->bridge_mode = BRIDGE_MODE_VEB;
6279 veb->bridge_mode = BRIDGE_MODE_VEPA;
6280 i40e_config_bridge_mode(veb);
6282 /* create the remaining VSIs attached to this VEB */
6283 for (v = 0; v < pf->num_alloc_vsi; v++) {
6284 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6287 if (pf->vsi[v]->veb_idx == veb->idx) {
6288 struct i40e_vsi *vsi = pf->vsi[v];
6289 vsi->uplink_seid = veb->seid;
6290 ret = i40e_add_vsi(vsi);
6292 dev_info(&pf->pdev->dev,
6293 "rebuild of vsi_idx %d failed: %d\n",
6295 goto end_reconstitute;
6297 i40e_vsi_reset_stats(vsi);
6301 /* create any VEBs attached to this VEB - RECURSION */
6302 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6303 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6304 pf->veb[veb_idx]->uplink_seid = veb->seid;
6305 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6316 * i40e_get_capabilities - get info about the HW
6317 * @pf: the PF struct
6319 static int i40e_get_capabilities(struct i40e_pf *pf)
6321 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6326 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6328 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6332 /* this loads the data into the hw struct for us */
6333 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6335 i40e_aqc_opc_list_func_capabilities,
6337 /* data loaded, buffer no longer needed */
6340 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6341 /* retry with a larger buffer */
6342 buf_len = data_size;
6343 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6344 dev_info(&pf->pdev->dev,
6345 "capability discovery failed, err %s aq_err %s\n",
6346 i40e_stat_str(&pf->hw, err),
6347 i40e_aq_str(&pf->hw,
6348 pf->hw.aq.asq_last_status));
6353 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6354 (pf->hw.aq.fw_maj_ver < 2)) {
6355 pf->hw.func_caps.num_msix_vectors++;
6356 pf->hw.func_caps.num_msix_vectors_vf++;
6359 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6360 dev_info(&pf->pdev->dev,
6361 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6362 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6363 pf->hw.func_caps.num_msix_vectors,
6364 pf->hw.func_caps.num_msix_vectors_vf,
6365 pf->hw.func_caps.fd_filters_guaranteed,
6366 pf->hw.func_caps.fd_filters_best_effort,
6367 pf->hw.func_caps.num_tx_qp,
6368 pf->hw.func_caps.num_vsis);
6370 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6371 + pf->hw.func_caps.num_vfs)
6372 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6373 dev_info(&pf->pdev->dev,
6374 "got num_vsis %d, setting num_vsis to %d\n",
6375 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6376 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6382 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6385 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6386 * @pf: board private structure
6388 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6390 struct i40e_vsi *vsi;
6393 /* quick workaround for an NVM issue that leaves a critical register
6396 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6397 static const u32 hkey[] = {
6398 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6399 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6400 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6403 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6404 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6407 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6410 /* find existing VSI and see if it needs configuring */
6412 for (i = 0; i < pf->num_alloc_vsi; i++) {
6413 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6419 /* create a new VSI if none exists */
6421 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6422 pf->vsi[pf->lan_vsi]->seid, 0);
6424 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6425 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6430 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6434 * i40e_fdir_teardown - release the Flow Director resources
6435 * @pf: board private structure
6437 static void i40e_fdir_teardown(struct i40e_pf *pf)
6441 i40e_fdir_filter_exit(pf);
6442 for (i = 0; i < pf->num_alloc_vsi; i++) {
6443 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6444 i40e_vsi_release(pf->vsi[i]);
6451 * i40e_prep_for_reset - prep for the core to reset
6452 * @pf: board private structure
6454 * Close up the VFs and other things in prep for PF Reset.
6456 static void i40e_prep_for_reset(struct i40e_pf *pf)
6458 struct i40e_hw *hw = &pf->hw;
6459 i40e_status ret = 0;
6462 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6463 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6466 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6468 /* quiesce the VSIs and their queues that are not already DOWN */
6469 i40e_pf_quiesce_all_vsi(pf);
6471 for (v = 0; v < pf->num_alloc_vsi; v++) {
6473 pf->vsi[v]->seid = 0;
6476 i40e_shutdown_adminq(&pf->hw);
6478 /* call shutdown HMC */
6479 if (hw->hmc.hmc_obj) {
6480 ret = i40e_shutdown_lan_hmc(hw);
6482 dev_warn(&pf->pdev->dev,
6483 "shutdown_lan_hmc failed: %d\n", ret);
6488 * i40e_send_version - update firmware with driver version
6491 static void i40e_send_version(struct i40e_pf *pf)
6493 struct i40e_driver_version dv;
6495 dv.major_version = DRV_VERSION_MAJOR;
6496 dv.minor_version = DRV_VERSION_MINOR;
6497 dv.build_version = DRV_VERSION_BUILD;
6498 dv.subbuild_version = 0;
6499 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6500 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6504 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6505 * @pf: board private structure
6506 * @reinit: if the Main VSI needs to re-initialized.
6508 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6510 struct i40e_hw *hw = &pf->hw;
6511 u8 set_fc_aq_fail = 0;
6515 /* Now we wait for GRST to settle out.
6516 * We don't have to delete the VEBs or VSIs from the hw switch
6517 * because the reset will make them disappear.
6519 ret = i40e_pf_reset(hw);
6521 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6522 set_bit(__I40E_RESET_FAILED, &pf->state);
6523 goto clear_recovery;
6527 if (test_bit(__I40E_DOWN, &pf->state))
6528 goto clear_recovery;
6529 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6531 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6532 ret = i40e_init_adminq(&pf->hw);
6534 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6535 i40e_stat_str(&pf->hw, ret),
6536 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6537 goto clear_recovery;
6540 /* re-verify the eeprom if we just had an EMP reset */
6541 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6542 i40e_verify_eeprom(pf);
6544 i40e_clear_pxe_mode(hw);
6545 ret = i40e_get_capabilities(pf);
6547 goto end_core_reset;
6549 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6550 hw->func_caps.num_rx_qp,
6551 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6553 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6554 goto end_core_reset;
6556 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6558 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6559 goto end_core_reset;
6562 #ifdef CONFIG_I40E_DCB
6563 ret = i40e_init_pf_dcb(pf);
6565 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6566 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6567 /* Continue without DCB enabled */
6569 #endif /* CONFIG_I40E_DCB */
6571 ret = i40e_init_pf_fcoe(pf);
6573 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6576 /* do basic switch setup */
6577 ret = i40e_setup_pf_switch(pf, reinit);
6579 goto end_core_reset;
6581 /* driver is only interested in link up/down and module qualification
6582 * reports from firmware
6584 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6585 I40E_AQ_EVENT_LINK_UPDOWN |
6586 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6588 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6589 i40e_stat_str(&pf->hw, ret),
6590 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6592 /* make sure our flow control settings are restored */
6593 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6595 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6596 i40e_stat_str(&pf->hw, ret),
6597 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6599 /* Rebuild the VSIs and VEBs that existed before reset.
6600 * They are still in our local switch element arrays, so only
6601 * need to rebuild the switch model in the HW.
6603 * If there were VEBs but the reconstitution failed, we'll try
6604 * try to recover minimal use by getting the basic PF VSI working.
6606 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6607 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6608 /* find the one VEB connected to the MAC, and find orphans */
6609 for (v = 0; v < I40E_MAX_VEB; v++) {
6613 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6614 pf->veb[v]->uplink_seid == 0) {
6615 ret = i40e_reconstitute_veb(pf->veb[v]);
6620 /* If Main VEB failed, we're in deep doodoo,
6621 * so give up rebuilding the switch and set up
6622 * for minimal rebuild of PF VSI.
6623 * If orphan failed, we'll report the error
6624 * but try to keep going.
6626 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6627 dev_info(&pf->pdev->dev,
6628 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6630 pf->vsi[pf->lan_vsi]->uplink_seid
6633 } else if (pf->veb[v]->uplink_seid == 0) {
6634 dev_info(&pf->pdev->dev,
6635 "rebuild of orphan VEB failed: %d\n",
6642 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6643 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6644 /* no VEB, so rebuild only the Main VSI */
6645 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6647 dev_info(&pf->pdev->dev,
6648 "rebuild of Main VSI failed: %d\n", ret);
6649 goto end_core_reset;
6653 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6654 (pf->hw.aq.fw_maj_ver < 4)) {
6656 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6658 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6659 i40e_stat_str(&pf->hw, ret),
6660 i40e_aq_str(&pf->hw,
6661 pf->hw.aq.asq_last_status));
6663 /* reinit the misc interrupt */
6664 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6665 ret = i40e_setup_misc_vector(pf);
6667 /* restart the VSIs that were rebuilt and running before the reset */
6668 i40e_pf_unquiesce_all_vsi(pf);
6670 if (pf->num_alloc_vfs) {
6671 for (v = 0; v < pf->num_alloc_vfs; v++)
6672 i40e_reset_vf(&pf->vf[v], true);
6675 /* tell the firmware that we're starting */
6676 i40e_send_version(pf);
6679 clear_bit(__I40E_RESET_FAILED, &pf->state);
6681 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6685 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6686 * @pf: board private structure
6688 * Close up the VFs and other things in prep for a Core Reset,
6689 * then get ready to rebuild the world.
6691 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6693 i40e_prep_for_reset(pf);
6694 i40e_reset_and_rebuild(pf, false);
6698 * i40e_handle_mdd_event
6699 * @pf: pointer to the PF structure
6701 * Called from the MDD irq handler to identify possibly malicious vfs
6703 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6705 struct i40e_hw *hw = &pf->hw;
6706 bool mdd_detected = false;
6707 bool pf_mdd_detected = false;
6712 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6715 /* find what triggered the MDD event */
6716 reg = rd32(hw, I40E_GL_MDET_TX);
6717 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6718 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6719 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6720 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6721 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6722 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6723 I40E_GL_MDET_TX_EVENT_SHIFT;
6724 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6725 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6726 pf->hw.func_caps.base_queue;
6727 if (netif_msg_tx_err(pf))
6728 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6729 event, queue, pf_num, vf_num);
6730 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6731 mdd_detected = true;
6733 reg = rd32(hw, I40E_GL_MDET_RX);
6734 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6735 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6736 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6737 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6738 I40E_GL_MDET_RX_EVENT_SHIFT;
6739 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6740 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6741 pf->hw.func_caps.base_queue;
6742 if (netif_msg_rx_err(pf))
6743 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6744 event, queue, func);
6745 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6746 mdd_detected = true;
6750 reg = rd32(hw, I40E_PF_MDET_TX);
6751 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6752 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6753 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6754 pf_mdd_detected = true;
6756 reg = rd32(hw, I40E_PF_MDET_RX);
6757 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6758 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6759 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6760 pf_mdd_detected = true;
6762 /* Queue belongs to the PF, initiate a reset */
6763 if (pf_mdd_detected) {
6764 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6765 i40e_service_event_schedule(pf);
6769 /* see if one of the VFs needs its hand slapped */
6770 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6772 reg = rd32(hw, I40E_VP_MDET_TX(i));
6773 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6774 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6775 vf->num_mdd_events++;
6776 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6780 reg = rd32(hw, I40E_VP_MDET_RX(i));
6781 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6782 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6783 vf->num_mdd_events++;
6784 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6788 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6789 dev_info(&pf->pdev->dev,
6790 "Too many MDD events on VF %d, disabled\n", i);
6791 dev_info(&pf->pdev->dev,
6792 "Use PF Control I/F to re-enable the VF\n");
6793 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6797 /* re-enable mdd interrupt cause */
6798 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6799 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6800 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6801 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6805 #ifdef CONFIG_I40E_VXLAN
6807 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6808 * @pf: board private structure
6810 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6812 struct i40e_hw *hw = &pf->hw;
6817 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6820 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6822 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6823 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6824 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6825 port = pf->vxlan_ports[i];
6827 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6828 I40E_AQC_TUNNEL_TYPE_VXLAN,
6831 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6834 dev_info(&pf->pdev->dev,
6835 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6836 port ? "add" : "delete",
6838 i40e_stat_str(&pf->hw, ret),
6839 i40e_aq_str(&pf->hw,
6840 pf->hw.aq.asq_last_status));
6841 pf->vxlan_ports[i] = 0;
6849 * i40e_service_task - Run the driver's async subtasks
6850 * @work: pointer to work_struct containing our data
6852 static void i40e_service_task(struct work_struct *work)
6854 struct i40e_pf *pf = container_of(work,
6857 unsigned long start_time = jiffies;
6859 /* don't bother with service tasks if a reset is in progress */
6860 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6861 i40e_service_event_complete(pf);
6865 i40e_detect_recover_hung(pf);
6866 i40e_reset_subtask(pf);
6867 i40e_handle_mdd_event(pf);
6868 i40e_vc_process_vflr_event(pf);
6869 i40e_watchdog_subtask(pf);
6870 i40e_fdir_reinit_subtask(pf);
6871 i40e_sync_filters_subtask(pf);
6872 #ifdef CONFIG_I40E_VXLAN
6873 i40e_sync_vxlan_filters_subtask(pf);
6875 i40e_clean_adminq_subtask(pf);
6877 i40e_service_event_complete(pf);
6879 /* If the tasks have taken longer than one timer cycle or there
6880 * is more work to be done, reschedule the service task now
6881 * rather than wait for the timer to tick again.
6883 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6884 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6885 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6886 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6887 i40e_service_event_schedule(pf);
6891 * i40e_service_timer - timer callback
6892 * @data: pointer to PF struct
6894 static void i40e_service_timer(unsigned long data)
6896 struct i40e_pf *pf = (struct i40e_pf *)data;
6898 mod_timer(&pf->service_timer,
6899 round_jiffies(jiffies + pf->service_timer_period));
6900 i40e_service_event_schedule(pf);
6904 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6905 * @vsi: the VSI being configured
6907 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6909 struct i40e_pf *pf = vsi->back;
6911 switch (vsi->type) {
6913 vsi->alloc_queue_pairs = pf->num_lan_qps;
6914 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6915 I40E_REQ_DESCRIPTOR_MULTIPLE);
6916 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6917 vsi->num_q_vectors = pf->num_lan_msix;
6919 vsi->num_q_vectors = 1;
6924 vsi->alloc_queue_pairs = 1;
6925 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6926 I40E_REQ_DESCRIPTOR_MULTIPLE);
6927 vsi->num_q_vectors = 1;
6930 case I40E_VSI_VMDQ2:
6931 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6932 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6933 I40E_REQ_DESCRIPTOR_MULTIPLE);
6934 vsi->num_q_vectors = pf->num_vmdq_msix;
6937 case I40E_VSI_SRIOV:
6938 vsi->alloc_queue_pairs = pf->num_vf_qps;
6939 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6940 I40E_REQ_DESCRIPTOR_MULTIPLE);
6945 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6946 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6947 I40E_REQ_DESCRIPTOR_MULTIPLE);
6948 vsi->num_q_vectors = pf->num_fcoe_msix;
6951 #endif /* I40E_FCOE */
6961 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6962 * @type: VSI pointer
6963 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6965 * On error: returns error code (negative)
6966 * On success: returns 0
6968 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6973 /* allocate memory for both Tx and Rx ring pointers */
6974 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6975 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6978 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6980 if (alloc_qvectors) {
6981 /* allocate memory for q_vector pointers */
6982 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6983 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6984 if (!vsi->q_vectors) {
6992 kfree(vsi->tx_rings);
6997 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6998 * @pf: board private structure
6999 * @type: type of VSI
7001 * On error: returns error code (negative)
7002 * On success: returns vsi index in PF (positive)
7004 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7007 struct i40e_vsi *vsi;
7011 /* Need to protect the allocation of the VSIs at the PF level */
7012 mutex_lock(&pf->switch_mutex);
7014 /* VSI list may be fragmented if VSI creation/destruction has
7015 * been happening. We can afford to do a quick scan to look
7016 * for any free VSIs in the list.
7018 * find next empty vsi slot, looping back around if necessary
7021 while (i < pf->num_alloc_vsi && pf->vsi[i])
7023 if (i >= pf->num_alloc_vsi) {
7025 while (i < pf->next_vsi && pf->vsi[i])
7029 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7030 vsi_idx = i; /* Found one! */
7033 goto unlock_pf; /* out of VSI slots! */
7037 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7044 set_bit(__I40E_DOWN, &vsi->state);
7047 vsi->rx_itr_setting = pf->rx_itr_default;
7048 vsi->tx_itr_setting = pf->tx_itr_default;
7049 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7050 pf->rss_table_size : 64;
7051 vsi->netdev_registered = false;
7052 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7053 INIT_LIST_HEAD(&vsi->mac_filter_list);
7054 vsi->irqs_ready = false;
7056 ret = i40e_set_num_rings_in_vsi(vsi);
7060 ret = i40e_vsi_alloc_arrays(vsi, true);
7064 /* Setup default MSIX irq handler for VSI */
7065 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7067 pf->vsi[vsi_idx] = vsi;
7072 pf->next_vsi = i - 1;
7075 mutex_unlock(&pf->switch_mutex);
7080 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7081 * @type: VSI pointer
7082 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7084 * On error: returns error code (negative)
7085 * On success: returns 0
7087 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7089 /* free the ring and vector containers */
7090 if (free_qvectors) {
7091 kfree(vsi->q_vectors);
7092 vsi->q_vectors = NULL;
7094 kfree(vsi->tx_rings);
7095 vsi->tx_rings = NULL;
7096 vsi->rx_rings = NULL;
7100 * i40e_vsi_clear - Deallocate the VSI provided
7101 * @vsi: the VSI being un-configured
7103 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7114 mutex_lock(&pf->switch_mutex);
7115 if (!pf->vsi[vsi->idx]) {
7116 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7117 vsi->idx, vsi->idx, vsi, vsi->type);
7121 if (pf->vsi[vsi->idx] != vsi) {
7122 dev_err(&pf->pdev->dev,
7123 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7124 pf->vsi[vsi->idx]->idx,
7126 pf->vsi[vsi->idx]->type,
7127 vsi->idx, vsi, vsi->type);
7131 /* updates the PF for this cleared vsi */
7132 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7133 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7135 i40e_vsi_free_arrays(vsi, true);
7137 pf->vsi[vsi->idx] = NULL;
7138 if (vsi->idx < pf->next_vsi)
7139 pf->next_vsi = vsi->idx;
7142 mutex_unlock(&pf->switch_mutex);
7150 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7151 * @vsi: the VSI being cleaned
7153 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7157 if (vsi->tx_rings && vsi->tx_rings[0]) {
7158 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7159 kfree_rcu(vsi->tx_rings[i], rcu);
7160 vsi->tx_rings[i] = NULL;
7161 vsi->rx_rings[i] = NULL;
7167 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7168 * @vsi: the VSI being configured
7170 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7172 struct i40e_ring *tx_ring, *rx_ring;
7173 struct i40e_pf *pf = vsi->back;
7176 /* Set basic values in the rings to be used later during open() */
7177 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7178 /* allocate space for both Tx and Rx in one shot */
7179 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7183 tx_ring->queue_index = i;
7184 tx_ring->reg_idx = vsi->base_queue + i;
7185 tx_ring->ring_active = false;
7187 tx_ring->netdev = vsi->netdev;
7188 tx_ring->dev = &pf->pdev->dev;
7189 tx_ring->count = vsi->num_desc;
7191 tx_ring->dcb_tc = 0;
7192 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7193 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7194 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7195 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7196 vsi->tx_rings[i] = tx_ring;
7198 rx_ring = &tx_ring[1];
7199 rx_ring->queue_index = i;
7200 rx_ring->reg_idx = vsi->base_queue + i;
7201 rx_ring->ring_active = false;
7203 rx_ring->netdev = vsi->netdev;
7204 rx_ring->dev = &pf->pdev->dev;
7205 rx_ring->count = vsi->num_desc;
7207 rx_ring->dcb_tc = 0;
7208 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7209 set_ring_16byte_desc_enabled(rx_ring);
7211 clear_ring_16byte_desc_enabled(rx_ring);
7212 vsi->rx_rings[i] = rx_ring;
7218 i40e_vsi_clear_rings(vsi);
7223 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7224 * @pf: board private structure
7225 * @vectors: the number of MSI-X vectors to request
7227 * Returns the number of vectors reserved, or error
7229 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7231 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7232 I40E_MIN_MSIX, vectors);
7234 dev_info(&pf->pdev->dev,
7235 "MSI-X vector reservation failed: %d\n", vectors);
7243 * i40e_init_msix - Setup the MSIX capability
7244 * @pf: board private structure
7246 * Work with the OS to set up the MSIX vectors needed.
7248 * Returns the number of vectors reserved or negative on failure
7250 static int i40e_init_msix(struct i40e_pf *pf)
7252 struct i40e_hw *hw = &pf->hw;
7257 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7260 /* The number of vectors we'll request will be comprised of:
7261 * - Add 1 for "other" cause for Admin Queue events, etc.
7262 * - The number of LAN queue pairs
7263 * - Queues being used for RSS.
7264 * We don't need as many as max_rss_size vectors.
7265 * use rss_size instead in the calculation since that
7266 * is governed by number of cpus in the system.
7267 * - assumes symmetric Tx/Rx pairing
7268 * - The number of VMDq pairs
7270 * - The number of FCOE qps.
7272 * Once we count this up, try the request.
7274 * If we can't get what we want, we'll simplify to nearly nothing
7275 * and try again. If that still fails, we punt.
7277 vectors_left = hw->func_caps.num_msix_vectors;
7280 /* reserve one vector for miscellaneous handler */
7286 /* reserve vectors for the main PF traffic queues */
7287 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7288 vectors_left -= pf->num_lan_msix;
7289 v_budget += pf->num_lan_msix;
7291 /* reserve one vector for sideband flow director */
7292 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7297 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7302 /* can we reserve enough for FCoE? */
7303 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7305 pf->num_fcoe_msix = 0;
7306 else if (vectors_left >= pf->num_fcoe_qps)
7307 pf->num_fcoe_msix = pf->num_fcoe_qps;
7309 pf->num_fcoe_msix = 1;
7310 v_budget += pf->num_fcoe_msix;
7311 vectors_left -= pf->num_fcoe_msix;
7315 /* any vectors left over go for VMDq support */
7316 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7317 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7318 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7320 /* if we're short on vectors for what's desired, we limit
7321 * the queues per vmdq. If this is still more than are
7322 * available, the user will need to change the number of
7323 * queues/vectors used by the PF later with the ethtool
7326 if (vmdq_vecs < vmdq_vecs_wanted)
7327 pf->num_vmdq_qps = 1;
7328 pf->num_vmdq_msix = pf->num_vmdq_qps;
7330 v_budget += vmdq_vecs;
7331 vectors_left -= vmdq_vecs;
7334 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7336 if (!pf->msix_entries)
7339 for (i = 0; i < v_budget; i++)
7340 pf->msix_entries[i].entry = i;
7341 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7343 if (v_actual != v_budget) {
7344 /* If we have limited resources, we will start with no vectors
7345 * for the special features and then allocate vectors to some
7346 * of these features based on the policy and at the end disable
7347 * the features that did not get any vectors.
7350 pf->num_fcoe_qps = 0;
7351 pf->num_fcoe_msix = 0;
7353 pf->num_vmdq_msix = 0;
7356 if (v_actual < I40E_MIN_MSIX) {
7357 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7358 kfree(pf->msix_entries);
7359 pf->msix_entries = NULL;
7362 } else if (v_actual == I40E_MIN_MSIX) {
7363 /* Adjust for minimal MSIX use */
7364 pf->num_vmdq_vsis = 0;
7365 pf->num_vmdq_qps = 0;
7366 pf->num_lan_qps = 1;
7367 pf->num_lan_msix = 1;
7369 } else if (v_actual != v_budget) {
7372 /* reserve the misc vector */
7375 /* Scale vector usage down */
7376 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7377 pf->num_vmdq_vsis = 1;
7378 pf->num_vmdq_qps = 1;
7379 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7381 /* partition out the remaining vectors */
7384 pf->num_lan_msix = 1;
7388 /* give one vector to FCoE */
7389 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7390 pf->num_lan_msix = 1;
7391 pf->num_fcoe_msix = 1;
7394 pf->num_lan_msix = 2;
7399 /* give one vector to FCoE */
7400 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7401 pf->num_fcoe_msix = 1;
7405 /* give the rest to the PF */
7406 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7411 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7412 (pf->num_vmdq_msix == 0)) {
7413 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7414 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7418 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7419 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7420 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7427 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7428 * @vsi: the VSI being configured
7429 * @v_idx: index of the vector in the vsi struct
7431 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7433 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7435 struct i40e_q_vector *q_vector;
7437 /* allocate q_vector */
7438 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7442 q_vector->vsi = vsi;
7443 q_vector->v_idx = v_idx;
7444 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7446 netif_napi_add(vsi->netdev, &q_vector->napi,
7447 i40e_napi_poll, NAPI_POLL_WEIGHT);
7449 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7450 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7452 /* tie q_vector and vsi together */
7453 vsi->q_vectors[v_idx] = q_vector;
7459 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7460 * @vsi: the VSI being configured
7462 * We allocate one q_vector per queue interrupt. If allocation fails we
7465 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7467 struct i40e_pf *pf = vsi->back;
7468 int v_idx, num_q_vectors;
7471 /* if not MSIX, give the one vector only to the LAN VSI */
7472 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7473 num_q_vectors = vsi->num_q_vectors;
7474 else if (vsi == pf->vsi[pf->lan_vsi])
7479 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7480 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7489 i40e_free_q_vector(vsi, v_idx);
7495 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7496 * @pf: board private structure to initialize
7498 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7503 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7504 vectors = i40e_init_msix(pf);
7506 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7508 I40E_FLAG_FCOE_ENABLED |
7510 I40E_FLAG_RSS_ENABLED |
7511 I40E_FLAG_DCB_CAPABLE |
7512 I40E_FLAG_SRIOV_ENABLED |
7513 I40E_FLAG_FD_SB_ENABLED |
7514 I40E_FLAG_FD_ATR_ENABLED |
7515 I40E_FLAG_VMDQ_ENABLED);
7517 /* rework the queue expectations without MSIX */
7518 i40e_determine_queue_usage(pf);
7522 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7523 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7524 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7525 vectors = pci_enable_msi(pf->pdev);
7527 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7529 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7531 vectors = 1; /* one MSI or Legacy vector */
7534 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7535 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7537 /* set up vector assignment tracking */
7538 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7539 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7540 if (!pf->irq_pile) {
7541 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7544 pf->irq_pile->num_entries = vectors;
7545 pf->irq_pile->search_hint = 0;
7547 /* track first vector for misc interrupts, ignore return */
7548 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7554 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7555 * @pf: board private structure
7557 * This sets up the handler for MSIX 0, which is used to manage the
7558 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7559 * when in MSI or Legacy interrupt mode.
7561 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7563 struct i40e_hw *hw = &pf->hw;
7566 /* Only request the irq if this is the first time through, and
7567 * not when we're rebuilding after a Reset
7569 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7570 err = request_irq(pf->msix_entries[0].vector,
7571 i40e_intr, 0, pf->int_name, pf);
7573 dev_info(&pf->pdev->dev,
7574 "request_irq for %s failed: %d\n",
7580 i40e_enable_misc_int_causes(pf);
7582 /* associate no queues to the misc vector */
7583 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7584 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7588 i40e_irq_dynamic_enable_icr0(pf);
7594 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7595 * @vsi: vsi structure
7596 * @seed: RSS hash seed
7598 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7600 struct i40e_aqc_get_set_rss_key_data rss_key;
7601 struct i40e_pf *pf = vsi->back;
7602 struct i40e_hw *hw = &pf->hw;
7603 bool pf_lut = false;
7607 memset(&rss_key, 0, sizeof(rss_key));
7608 memcpy(&rss_key, seed, sizeof(rss_key));
7610 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7614 /* Populate the LUT with max no. of queues in round robin fashion */
7615 for (i = 0; i < vsi->rss_table_size; i++)
7616 rss_lut[i] = i % vsi->rss_size;
7618 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7620 dev_info(&pf->pdev->dev,
7621 "Cannot set RSS key, err %s aq_err %s\n",
7622 i40e_stat_str(&pf->hw, ret),
7623 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7627 if (vsi->type == I40E_VSI_MAIN)
7630 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7631 vsi->rss_table_size);
7633 dev_info(&pf->pdev->dev,
7634 "Cannot set RSS lut, err %s aq_err %s\n",
7635 i40e_stat_str(&pf->hw, ret),
7636 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7642 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7643 * @vsi: VSI structure
7645 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7647 u8 seed[I40E_HKEY_ARRAY_SIZE];
7648 struct i40e_pf *pf = vsi->back;
7650 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7651 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7653 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7654 return i40e_config_rss_aq(vsi, seed);
7660 * i40e_config_rss_reg - Prepare for RSS if used
7661 * @pf: board private structure
7662 * @seed: RSS hash seed
7664 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7666 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7667 struct i40e_hw *hw = &pf->hw;
7668 u32 *seed_dw = (u32 *)seed;
7669 u32 current_queue = 0;
7673 /* Fill out hash function seed */
7674 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7675 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7677 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7679 for (j = 0; j < 4; j++) {
7680 if (current_queue == vsi->rss_size)
7682 lut |= ((current_queue) << (8 * j));
7685 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7693 * i40e_config_rss - Prepare for RSS if used
7694 * @pf: board private structure
7696 static int i40e_config_rss(struct i40e_pf *pf)
7698 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7699 u8 seed[I40E_HKEY_ARRAY_SIZE];
7700 struct i40e_hw *hw = &pf->hw;
7704 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7706 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7707 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7708 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7709 hena |= i40e_pf_get_default_rss_hena(pf);
7711 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7712 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7714 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7716 /* Determine the RSS table size based on the hardware capabilities */
7717 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7718 reg_val = (pf->rss_table_size == 512) ?
7719 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7720 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7721 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7723 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7724 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7726 return i40e_config_rss_reg(pf, seed);
7730 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7731 * @pf: board private structure
7732 * @queue_count: the requested queue count for rss.
7734 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7735 * count which may be different from the requested queue count.
7737 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7739 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7742 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7745 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7747 if (queue_count != vsi->num_queue_pairs) {
7748 vsi->req_queue_pairs = queue_count;
7749 i40e_prep_for_reset(pf);
7751 pf->rss_size = new_rss_size;
7753 i40e_reset_and_rebuild(pf, true);
7754 i40e_config_rss(pf);
7756 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7757 return pf->rss_size;
7761 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7762 * @pf: board private structure
7764 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7767 bool min_valid, max_valid;
7770 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7771 &min_valid, &max_valid);
7775 pf->npar_min_bw = min_bw;
7777 pf->npar_max_bw = max_bw;
7784 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7785 * @pf: board private structure
7787 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7789 struct i40e_aqc_configure_partition_bw_data bw_data;
7792 /* Set the valid bit for this PF */
7793 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7794 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7795 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7797 /* Set the new bandwidths */
7798 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7804 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7805 * @pf: board private structure
7807 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7809 /* Commit temporary BW setting to permanent NVM image */
7810 enum i40e_admin_queue_err last_aq_status;
7814 if (pf->hw.partition_id != 1) {
7815 dev_info(&pf->pdev->dev,
7816 "Commit BW only works on partition 1! This is partition %d",
7817 pf->hw.partition_id);
7818 ret = I40E_NOT_SUPPORTED;
7822 /* Acquire NVM for read access */
7823 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7824 last_aq_status = pf->hw.aq.asq_last_status;
7826 dev_info(&pf->pdev->dev,
7827 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7828 i40e_stat_str(&pf->hw, ret),
7829 i40e_aq_str(&pf->hw, last_aq_status));
7833 /* Read word 0x10 of NVM - SW compatibility word 1 */
7834 ret = i40e_aq_read_nvm(&pf->hw,
7835 I40E_SR_NVM_CONTROL_WORD,
7836 0x10, sizeof(nvm_word), &nvm_word,
7838 /* Save off last admin queue command status before releasing
7841 last_aq_status = pf->hw.aq.asq_last_status;
7842 i40e_release_nvm(&pf->hw);
7844 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7845 i40e_stat_str(&pf->hw, ret),
7846 i40e_aq_str(&pf->hw, last_aq_status));
7850 /* Wait a bit for NVM release to complete */
7853 /* Acquire NVM for write access */
7854 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7855 last_aq_status = pf->hw.aq.asq_last_status;
7857 dev_info(&pf->pdev->dev,
7858 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7859 i40e_stat_str(&pf->hw, ret),
7860 i40e_aq_str(&pf->hw, last_aq_status));
7863 /* Write it back out unchanged to initiate update NVM,
7864 * which will force a write of the shadow (alt) RAM to
7865 * the NVM - thus storing the bandwidth values permanently.
7867 ret = i40e_aq_update_nvm(&pf->hw,
7868 I40E_SR_NVM_CONTROL_WORD,
7869 0x10, sizeof(nvm_word),
7870 &nvm_word, true, NULL);
7871 /* Save off last admin queue command status before releasing
7874 last_aq_status = pf->hw.aq.asq_last_status;
7875 i40e_release_nvm(&pf->hw);
7877 dev_info(&pf->pdev->dev,
7878 "BW settings NOT SAVED, err %s aq_err %s\n",
7879 i40e_stat_str(&pf->hw, ret),
7880 i40e_aq_str(&pf->hw, last_aq_status));
7887 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7888 * @pf: board private structure to initialize
7890 * i40e_sw_init initializes the Adapter private data structure.
7891 * Fields are initialized based on PCI device information and
7892 * OS network device settings (MTU size).
7894 static int i40e_sw_init(struct i40e_pf *pf)
7899 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7900 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7901 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7902 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7903 if (I40E_DEBUG_USER & debug)
7904 pf->hw.debug_mask = debug;
7905 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7906 I40E_DEFAULT_MSG_ENABLE);
7909 /* Set default capability flags */
7910 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7911 I40E_FLAG_MSI_ENABLED |
7912 I40E_FLAG_MSIX_ENABLED;
7914 if (iommu_present(&pci_bus_type))
7915 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7917 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7919 /* Set default ITR */
7920 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7921 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7923 /* Depending on PF configurations, it is possible that the RSS
7924 * maximum might end up larger than the available queues
7926 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7928 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7929 pf->rss_size_max = min_t(int, pf->rss_size_max,
7930 pf->hw.func_caps.num_tx_qp);
7931 if (pf->hw.func_caps.rss) {
7932 pf->flags |= I40E_FLAG_RSS_ENABLED;
7933 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7936 /* MFP mode enabled */
7937 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7938 pf->flags |= I40E_FLAG_MFP_ENABLED;
7939 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7940 if (i40e_get_npar_bw_setting(pf))
7941 dev_warn(&pf->pdev->dev,
7942 "Could not get NPAR bw settings\n");
7944 dev_info(&pf->pdev->dev,
7945 "Min BW = %8.8x, Max BW = %8.8x\n",
7946 pf->npar_min_bw, pf->npar_max_bw);
7949 /* FW/NVM is not yet fixed in this regard */
7950 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7951 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7952 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7953 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7954 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7955 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7957 dev_info(&pf->pdev->dev,
7958 "Flow Director Sideband mode Disabled in MFP mode\n");
7960 pf->fdir_pf_filter_count =
7961 pf->hw.func_caps.fd_filters_guaranteed;
7962 pf->hw.fdir_shared_filter_count =
7963 pf->hw.func_caps.fd_filters_best_effort;
7966 if (pf->hw.func_caps.vmdq) {
7967 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7968 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7972 err = i40e_init_pf_fcoe(pf);
7974 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7976 #endif /* I40E_FCOE */
7977 #ifdef CONFIG_PCI_IOV
7978 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7979 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7980 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7981 pf->num_req_vfs = min_t(int,
7982 pf->hw.func_caps.num_vfs,
7985 #endif /* CONFIG_PCI_IOV */
7986 if (pf->hw.mac.type == I40E_MAC_X722) {
7987 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7988 I40E_FLAG_128_QP_RSS_CAPABLE |
7989 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7990 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7991 I40E_FLAG_WB_ON_ITR_CAPABLE |
7992 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7994 pf->eeprom_version = 0xDEAD;
7995 pf->lan_veb = I40E_NO_VEB;
7996 pf->lan_vsi = I40E_NO_VSI;
7998 /* set up queue assignment tracking */
7999 size = sizeof(struct i40e_lump_tracking)
8000 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8001 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8006 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8007 pf->qp_pile->search_hint = 0;
8009 pf->tx_timeout_recovery_level = 1;
8011 mutex_init(&pf->switch_mutex);
8013 /* If NPAR is enabled nudge the Tx scheduler */
8014 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8015 i40e_set_npar_bw_setting(pf);
8022 * i40e_set_ntuple - set the ntuple feature flag and take action
8023 * @pf: board private structure to initialize
8024 * @features: the feature set that the stack is suggesting
8026 * returns a bool to indicate if reset needs to happen
8028 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8030 bool need_reset = false;
8032 /* Check if Flow Director n-tuple support was enabled or disabled. If
8033 * the state changed, we need to reset.
8035 if (features & NETIF_F_NTUPLE) {
8036 /* Enable filters and mark for reset */
8037 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8039 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8041 /* turn off filters, mark for reset and clear SW filter list */
8042 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8044 i40e_fdir_filter_exit(pf);
8046 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8047 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8048 /* reset fd counters */
8049 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8050 pf->fdir_pf_active_filters = 0;
8051 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8052 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8053 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8054 /* if ATR was auto disabled it can be re-enabled. */
8055 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8056 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8057 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8063 * i40e_set_features - set the netdev feature flags
8064 * @netdev: ptr to the netdev being adjusted
8065 * @features: the feature set that the stack is suggesting
8067 static int i40e_set_features(struct net_device *netdev,
8068 netdev_features_t features)
8070 struct i40e_netdev_priv *np = netdev_priv(netdev);
8071 struct i40e_vsi *vsi = np->vsi;
8072 struct i40e_pf *pf = vsi->back;
8075 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8076 i40e_vlan_stripping_enable(vsi);
8078 i40e_vlan_stripping_disable(vsi);
8080 need_reset = i40e_set_ntuple(pf, features);
8083 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8088 #ifdef CONFIG_I40E_VXLAN
8090 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8091 * @pf: board private structure
8092 * @port: The UDP port to look up
8094 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8096 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8100 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8101 if (pf->vxlan_ports[i] == port)
8109 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8110 * @netdev: This physical port's netdev
8111 * @sa_family: Socket Family that VXLAN is notifying us about
8112 * @port: New UDP port number that VXLAN started listening to
8114 static void i40e_add_vxlan_port(struct net_device *netdev,
8115 sa_family_t sa_family, __be16 port)
8117 struct i40e_netdev_priv *np = netdev_priv(netdev);
8118 struct i40e_vsi *vsi = np->vsi;
8119 struct i40e_pf *pf = vsi->back;
8123 if (sa_family == AF_INET6)
8126 idx = i40e_get_vxlan_port_idx(pf, port);
8128 /* Check if port already exists */
8129 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8130 netdev_info(netdev, "vxlan port %d already offloaded\n",
8135 /* Now check if there is space to add the new port */
8136 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8138 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8139 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8144 /* New port: add it and mark its index in the bitmap */
8145 pf->vxlan_ports[next_idx] = port;
8146 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8147 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8151 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8152 * @netdev: This physical port's netdev
8153 * @sa_family: Socket Family that VXLAN is notifying us about
8154 * @port: UDP port number that VXLAN stopped listening to
8156 static void i40e_del_vxlan_port(struct net_device *netdev,
8157 sa_family_t sa_family, __be16 port)
8159 struct i40e_netdev_priv *np = netdev_priv(netdev);
8160 struct i40e_vsi *vsi = np->vsi;
8161 struct i40e_pf *pf = vsi->back;
8164 if (sa_family == AF_INET6)
8167 idx = i40e_get_vxlan_port_idx(pf, port);
8169 /* Check if port already exists */
8170 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8171 /* if port exists, set it to 0 (mark for deletion)
8172 * and make it pending
8174 pf->vxlan_ports[idx] = 0;
8175 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8176 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8178 dev_info(&pf->pdev->dev, "deleting vxlan port %d\n",
8181 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8187 static int i40e_get_phys_port_id(struct net_device *netdev,
8188 struct netdev_phys_item_id *ppid)
8190 struct i40e_netdev_priv *np = netdev_priv(netdev);
8191 struct i40e_pf *pf = np->vsi->back;
8192 struct i40e_hw *hw = &pf->hw;
8194 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8197 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8198 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8204 * i40e_ndo_fdb_add - add an entry to the hardware database
8205 * @ndm: the input from the stack
8206 * @tb: pointer to array of nladdr (unused)
8207 * @dev: the net device pointer
8208 * @addr: the MAC address entry being added
8209 * @flags: instructions from stack about fdb operation
8211 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8212 struct net_device *dev,
8213 const unsigned char *addr, u16 vid,
8216 struct i40e_netdev_priv *np = netdev_priv(dev);
8217 struct i40e_pf *pf = np->vsi->back;
8220 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8224 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8228 /* Hardware does not support aging addresses so if a
8229 * ndm_state is given only allow permanent addresses
8231 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8232 netdev_info(dev, "FDB only supports static addresses\n");
8236 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8237 err = dev_uc_add_excl(dev, addr);
8238 else if (is_multicast_ether_addr(addr))
8239 err = dev_mc_add_excl(dev, addr);
8243 /* Only return duplicate errors if NLM_F_EXCL is set */
8244 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8251 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8252 * @dev: the netdev being configured
8253 * @nlh: RTNL message
8255 * Inserts a new hardware bridge if not already created and
8256 * enables the bridging mode requested (VEB or VEPA). If the
8257 * hardware bridge has already been inserted and the request
8258 * is to change the mode then that requires a PF reset to
8259 * allow rebuild of the components with required hardware
8260 * bridge mode enabled.
8262 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8263 struct nlmsghdr *nlh,
8266 struct i40e_netdev_priv *np = netdev_priv(dev);
8267 struct i40e_vsi *vsi = np->vsi;
8268 struct i40e_pf *pf = vsi->back;
8269 struct i40e_veb *veb = NULL;
8270 struct nlattr *attr, *br_spec;
8273 /* Only for PF VSI for now */
8274 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8277 /* Find the HW bridge for PF VSI */
8278 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8279 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8283 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8285 nla_for_each_nested(attr, br_spec, rem) {
8288 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8291 mode = nla_get_u16(attr);
8292 if ((mode != BRIDGE_MODE_VEPA) &&
8293 (mode != BRIDGE_MODE_VEB))
8296 /* Insert a new HW bridge */
8298 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8299 vsi->tc_config.enabled_tc);
8301 veb->bridge_mode = mode;
8302 i40e_config_bridge_mode(veb);
8304 /* No Bridge HW offload available */
8308 } else if (mode != veb->bridge_mode) {
8309 /* Existing HW bridge but different mode needs reset */
8310 veb->bridge_mode = mode;
8311 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8312 if (mode == BRIDGE_MODE_VEB)
8313 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8315 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8316 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8325 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8328 * @seq: RTNL message seq #
8329 * @dev: the netdev being configured
8330 * @filter_mask: unused
8332 * Return the mode in which the hardware bridge is operating in
8335 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8336 struct net_device *dev,
8337 u32 filter_mask, int nlflags)
8339 struct i40e_netdev_priv *np = netdev_priv(dev);
8340 struct i40e_vsi *vsi = np->vsi;
8341 struct i40e_pf *pf = vsi->back;
8342 struct i40e_veb *veb = NULL;
8345 /* Only for PF VSI for now */
8346 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8349 /* Find the HW bridge for the PF VSI */
8350 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8351 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8358 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8359 nlflags, 0, 0, filter_mask, NULL);
8362 #define I40E_MAX_TUNNEL_HDR_LEN 80
8364 * i40e_features_check - Validate encapsulated packet conforms to limits
8366 * @netdev: This physical port's netdev
8367 * @features: Offload features that the stack believes apply
8369 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8370 struct net_device *dev,
8371 netdev_features_t features)
8373 if (skb->encapsulation &&
8374 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8375 I40E_MAX_TUNNEL_HDR_LEN))
8376 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8381 static const struct net_device_ops i40e_netdev_ops = {
8382 .ndo_open = i40e_open,
8383 .ndo_stop = i40e_close,
8384 .ndo_start_xmit = i40e_lan_xmit_frame,
8385 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8386 .ndo_set_rx_mode = i40e_set_rx_mode,
8387 .ndo_validate_addr = eth_validate_addr,
8388 .ndo_set_mac_address = i40e_set_mac,
8389 .ndo_change_mtu = i40e_change_mtu,
8390 .ndo_do_ioctl = i40e_ioctl,
8391 .ndo_tx_timeout = i40e_tx_timeout,
8392 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8393 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8394 #ifdef CONFIG_NET_POLL_CONTROLLER
8395 .ndo_poll_controller = i40e_netpoll,
8397 .ndo_setup_tc = i40e_setup_tc,
8399 .ndo_fcoe_enable = i40e_fcoe_enable,
8400 .ndo_fcoe_disable = i40e_fcoe_disable,
8402 .ndo_set_features = i40e_set_features,
8403 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8404 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8405 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8406 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8407 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8408 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8409 #ifdef CONFIG_I40E_VXLAN
8410 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8411 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8413 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8414 .ndo_fdb_add = i40e_ndo_fdb_add,
8415 .ndo_features_check = i40e_features_check,
8416 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8417 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8421 * i40e_config_netdev - Setup the netdev flags
8422 * @vsi: the VSI being configured
8424 * Returns 0 on success, negative value on failure
8426 static int i40e_config_netdev(struct i40e_vsi *vsi)
8428 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8429 struct i40e_pf *pf = vsi->back;
8430 struct i40e_hw *hw = &pf->hw;
8431 struct i40e_netdev_priv *np;
8432 struct net_device *netdev;
8433 u8 mac_addr[ETH_ALEN];
8436 etherdev_size = sizeof(struct i40e_netdev_priv);
8437 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8441 vsi->netdev = netdev;
8442 np = netdev_priv(netdev);
8445 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8446 NETIF_F_GSO_UDP_TUNNEL |
8449 netdev->features = NETIF_F_SG |
8453 NETIF_F_GSO_UDP_TUNNEL |
8454 NETIF_F_HW_VLAN_CTAG_TX |
8455 NETIF_F_HW_VLAN_CTAG_RX |
8456 NETIF_F_HW_VLAN_CTAG_FILTER |
8465 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8466 netdev->features |= NETIF_F_NTUPLE;
8468 /* copy netdev features into list of user selectable features */
8469 netdev->hw_features |= netdev->features;
8471 if (vsi->type == I40E_VSI_MAIN) {
8472 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8473 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8474 /* The following steps are necessary to prevent reception
8475 * of tagged packets - some older NVM configurations load a
8476 * default a MAC-VLAN filter that accepts any tagged packet
8477 * which must be replaced by a normal filter.
8479 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8480 i40e_add_filter(vsi, mac_addr,
8481 I40E_VLAN_ANY, false, true);
8483 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8484 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8485 pf->vsi[pf->lan_vsi]->netdev->name);
8486 random_ether_addr(mac_addr);
8487 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8489 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8491 ether_addr_copy(netdev->dev_addr, mac_addr);
8492 ether_addr_copy(netdev->perm_addr, mac_addr);
8493 /* vlan gets same features (except vlan offload)
8494 * after any tweaks for specific VSI types
8496 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8497 NETIF_F_HW_VLAN_CTAG_RX |
8498 NETIF_F_HW_VLAN_CTAG_FILTER);
8499 netdev->priv_flags |= IFF_UNICAST_FLT;
8500 netdev->priv_flags |= IFF_SUPP_NOFCS;
8501 /* Setup netdev TC information */
8502 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8504 netdev->netdev_ops = &i40e_netdev_ops;
8505 netdev->watchdog_timeo = 5 * HZ;
8506 i40e_set_ethtool_ops(netdev);
8508 i40e_fcoe_config_netdev(netdev, vsi);
8515 * i40e_vsi_delete - Delete a VSI from the switch
8516 * @vsi: the VSI being removed
8518 * Returns 0 on success, negative value on failure
8520 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8522 /* remove default VSI is not allowed */
8523 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8526 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8530 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8531 * @vsi: the VSI being queried
8533 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8535 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8537 struct i40e_veb *veb;
8538 struct i40e_pf *pf = vsi->back;
8540 /* Uplink is not a bridge so default to VEB */
8541 if (vsi->veb_idx == I40E_NO_VEB)
8544 veb = pf->veb[vsi->veb_idx];
8545 /* Uplink is a bridge in VEPA mode */
8546 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8549 /* Uplink is a bridge in VEB mode */
8554 * i40e_add_vsi - Add a VSI to the switch
8555 * @vsi: the VSI being configured
8557 * This initializes a VSI context depending on the VSI type to be added and
8558 * passes it down to the add_vsi aq command.
8560 static int i40e_add_vsi(struct i40e_vsi *vsi)
8563 struct i40e_mac_filter *f, *ftmp;
8564 struct i40e_pf *pf = vsi->back;
8565 struct i40e_hw *hw = &pf->hw;
8566 struct i40e_vsi_context ctxt;
8567 u8 enabled_tc = 0x1; /* TC0 enabled */
8570 memset(&ctxt, 0, sizeof(ctxt));
8571 switch (vsi->type) {
8573 /* The PF's main VSI is already setup as part of the
8574 * device initialization, so we'll not bother with
8575 * the add_vsi call, but we will retrieve the current
8578 ctxt.seid = pf->main_vsi_seid;
8579 ctxt.pf_num = pf->hw.pf_id;
8581 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8582 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8584 dev_info(&pf->pdev->dev,
8585 "couldn't get PF vsi config, err %s aq_err %s\n",
8586 i40e_stat_str(&pf->hw, ret),
8587 i40e_aq_str(&pf->hw,
8588 pf->hw.aq.asq_last_status));
8591 vsi->info = ctxt.info;
8592 vsi->info.valid_sections = 0;
8594 vsi->seid = ctxt.seid;
8595 vsi->id = ctxt.vsi_number;
8597 enabled_tc = i40e_pf_get_tc_map(pf);
8599 /* MFP mode setup queue map and update VSI */
8600 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8601 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8602 memset(&ctxt, 0, sizeof(ctxt));
8603 ctxt.seid = pf->main_vsi_seid;
8604 ctxt.pf_num = pf->hw.pf_id;
8606 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8607 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8609 dev_info(&pf->pdev->dev,
8610 "update vsi failed, err %s aq_err %s\n",
8611 i40e_stat_str(&pf->hw, ret),
8612 i40e_aq_str(&pf->hw,
8613 pf->hw.aq.asq_last_status));
8617 /* update the local VSI info queue map */
8618 i40e_vsi_update_queue_map(vsi, &ctxt);
8619 vsi->info.valid_sections = 0;
8621 /* Default/Main VSI is only enabled for TC0
8622 * reconfigure it to enable all TCs that are
8623 * available on the port in SFP mode.
8624 * For MFP case the iSCSI PF would use this
8625 * flow to enable LAN+iSCSI TC.
8627 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8629 dev_info(&pf->pdev->dev,
8630 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8632 i40e_stat_str(&pf->hw, ret),
8633 i40e_aq_str(&pf->hw,
8634 pf->hw.aq.asq_last_status));
8641 ctxt.pf_num = hw->pf_id;
8643 ctxt.uplink_seid = vsi->uplink_seid;
8644 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8645 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8646 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8647 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8648 ctxt.info.valid_sections |=
8649 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8650 ctxt.info.switch_id =
8651 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8653 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8656 case I40E_VSI_VMDQ2:
8657 ctxt.pf_num = hw->pf_id;
8659 ctxt.uplink_seid = vsi->uplink_seid;
8660 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8661 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8663 /* This VSI is connected to VEB so the switch_id
8664 * should be set to zero by default.
8666 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8667 ctxt.info.valid_sections |=
8668 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8669 ctxt.info.switch_id =
8670 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8673 /* Setup the VSI tx/rx queue map for TC0 only for now */
8674 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8677 case I40E_VSI_SRIOV:
8678 ctxt.pf_num = hw->pf_id;
8679 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8680 ctxt.uplink_seid = vsi->uplink_seid;
8681 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8682 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8684 /* This VSI is connected to VEB so the switch_id
8685 * should be set to zero by default.
8687 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8688 ctxt.info.valid_sections |=
8689 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8690 ctxt.info.switch_id =
8691 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8694 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8695 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8696 if (pf->vf[vsi->vf_id].spoofchk) {
8697 ctxt.info.valid_sections |=
8698 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8699 ctxt.info.sec_flags |=
8700 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8701 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8703 /* Setup the VSI tx/rx queue map for TC0 only for now */
8704 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8709 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8711 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8716 #endif /* I40E_FCOE */
8721 if (vsi->type != I40E_VSI_MAIN) {
8722 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8724 dev_info(&vsi->back->pdev->dev,
8725 "add vsi failed, err %s aq_err %s\n",
8726 i40e_stat_str(&pf->hw, ret),
8727 i40e_aq_str(&pf->hw,
8728 pf->hw.aq.asq_last_status));
8732 vsi->info = ctxt.info;
8733 vsi->info.valid_sections = 0;
8734 vsi->seid = ctxt.seid;
8735 vsi->id = ctxt.vsi_number;
8738 /* If macvlan filters already exist, force them to get loaded */
8739 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8743 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8744 struct i40e_aqc_remove_macvlan_element_data element;
8746 memset(&element, 0, sizeof(element));
8747 ether_addr_copy(element.mac_addr, f->macaddr);
8748 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8749 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8752 /* some older FW has a different default */
8754 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8755 i40e_aq_remove_macvlan(hw, vsi->seid,
8759 i40e_aq_mac_address_write(hw,
8760 I40E_AQC_WRITE_TYPE_LAA_WOL,
8765 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8766 pf->flags |= I40E_FLAG_FILTER_SYNC;
8769 /* Update VSI BW information */
8770 ret = i40e_vsi_get_bw_info(vsi);
8772 dev_info(&pf->pdev->dev,
8773 "couldn't get vsi bw info, err %s aq_err %s\n",
8774 i40e_stat_str(&pf->hw, ret),
8775 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8776 /* VSI is already added so not tearing that up */
8785 * i40e_vsi_release - Delete a VSI and free its resources
8786 * @vsi: the VSI being removed
8788 * Returns 0 on success or < 0 on error
8790 int i40e_vsi_release(struct i40e_vsi *vsi)
8792 struct i40e_mac_filter *f, *ftmp;
8793 struct i40e_veb *veb = NULL;
8800 /* release of a VEB-owner or last VSI is not allowed */
8801 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8802 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8803 vsi->seid, vsi->uplink_seid);
8806 if (vsi == pf->vsi[pf->lan_vsi] &&
8807 !test_bit(__I40E_DOWN, &pf->state)) {
8808 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8812 uplink_seid = vsi->uplink_seid;
8813 if (vsi->type != I40E_VSI_SRIOV) {
8814 if (vsi->netdev_registered) {
8815 vsi->netdev_registered = false;
8817 /* results in a call to i40e_close() */
8818 unregister_netdev(vsi->netdev);
8821 i40e_vsi_close(vsi);
8823 i40e_vsi_disable_irq(vsi);
8826 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8827 i40e_del_filter(vsi, f->macaddr, f->vlan,
8828 f->is_vf, f->is_netdev);
8829 i40e_sync_vsi_filters(vsi, false);
8831 i40e_vsi_delete(vsi);
8832 i40e_vsi_free_q_vectors(vsi);
8834 free_netdev(vsi->netdev);
8837 i40e_vsi_clear_rings(vsi);
8838 i40e_vsi_clear(vsi);
8840 /* If this was the last thing on the VEB, except for the
8841 * controlling VSI, remove the VEB, which puts the controlling
8842 * VSI onto the next level down in the switch.
8844 * Well, okay, there's one more exception here: don't remove
8845 * the orphan VEBs yet. We'll wait for an explicit remove request
8846 * from up the network stack.
8848 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8850 pf->vsi[i]->uplink_seid == uplink_seid &&
8851 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8852 n++; /* count the VSIs */
8855 for (i = 0; i < I40E_MAX_VEB; i++) {
8858 if (pf->veb[i]->uplink_seid == uplink_seid)
8859 n++; /* count the VEBs */
8860 if (pf->veb[i]->seid == uplink_seid)
8863 if (n == 0 && veb && veb->uplink_seid != 0)
8864 i40e_veb_release(veb);
8870 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8871 * @vsi: ptr to the VSI
8873 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8874 * corresponding SW VSI structure and initializes num_queue_pairs for the
8875 * newly allocated VSI.
8877 * Returns 0 on success or negative on failure
8879 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8882 struct i40e_pf *pf = vsi->back;
8884 if (vsi->q_vectors[0]) {
8885 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8890 if (vsi->base_vector) {
8891 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8892 vsi->seid, vsi->base_vector);
8896 ret = i40e_vsi_alloc_q_vectors(vsi);
8898 dev_info(&pf->pdev->dev,
8899 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8900 vsi->num_q_vectors, vsi->seid, ret);
8901 vsi->num_q_vectors = 0;
8902 goto vector_setup_out;
8905 /* In Legacy mode, we do not have to get any other vector since we
8906 * piggyback on the misc/ICR0 for queue interrupts.
8908 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8910 if (vsi->num_q_vectors)
8911 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8912 vsi->num_q_vectors, vsi->idx);
8913 if (vsi->base_vector < 0) {
8914 dev_info(&pf->pdev->dev,
8915 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8916 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8917 i40e_vsi_free_q_vectors(vsi);
8919 goto vector_setup_out;
8927 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8928 * @vsi: pointer to the vsi.
8930 * This re-allocates a vsi's queue resources.
8932 * Returns pointer to the successfully allocated and configured VSI sw struct
8933 * on success, otherwise returns NULL on failure.
8935 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8937 struct i40e_pf *pf = vsi->back;
8941 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8942 i40e_vsi_clear_rings(vsi);
8944 i40e_vsi_free_arrays(vsi, false);
8945 i40e_set_num_rings_in_vsi(vsi);
8946 ret = i40e_vsi_alloc_arrays(vsi, false);
8950 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8952 dev_info(&pf->pdev->dev,
8953 "failed to get tracking for %d queues for VSI %d err %d\n",
8954 vsi->alloc_queue_pairs, vsi->seid, ret);
8957 vsi->base_queue = ret;
8959 /* Update the FW view of the VSI. Force a reset of TC and queue
8960 * layout configurations.
8962 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8963 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8964 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8965 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8967 /* assign it some queues */
8968 ret = i40e_alloc_rings(vsi);
8972 /* map all of the rings to the q_vectors */
8973 i40e_vsi_map_rings_to_vectors(vsi);
8977 i40e_vsi_free_q_vectors(vsi);
8978 if (vsi->netdev_registered) {
8979 vsi->netdev_registered = false;
8980 unregister_netdev(vsi->netdev);
8981 free_netdev(vsi->netdev);
8984 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8986 i40e_vsi_clear(vsi);
8991 * i40e_vsi_setup - Set up a VSI by a given type
8992 * @pf: board private structure
8994 * @uplink_seid: the switch element to link to
8995 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8997 * This allocates the sw VSI structure and its queue resources, then add a VSI
8998 * to the identified VEB.
9000 * Returns pointer to the successfully allocated and configure VSI sw struct on
9001 * success, otherwise returns NULL on failure.
9003 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9004 u16 uplink_seid, u32 param1)
9006 struct i40e_vsi *vsi = NULL;
9007 struct i40e_veb *veb = NULL;
9011 /* The requested uplink_seid must be either
9012 * - the PF's port seid
9013 * no VEB is needed because this is the PF
9014 * or this is a Flow Director special case VSI
9015 * - seid of an existing VEB
9016 * - seid of a VSI that owns an existing VEB
9017 * - seid of a VSI that doesn't own a VEB
9018 * a new VEB is created and the VSI becomes the owner
9019 * - seid of the PF VSI, which is what creates the first VEB
9020 * this is a special case of the previous
9022 * Find which uplink_seid we were given and create a new VEB if needed
9024 for (i = 0; i < I40E_MAX_VEB; i++) {
9025 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9031 if (!veb && uplink_seid != pf->mac_seid) {
9033 for (i = 0; i < pf->num_alloc_vsi; i++) {
9034 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9040 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9045 if (vsi->uplink_seid == pf->mac_seid)
9046 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9047 vsi->tc_config.enabled_tc);
9048 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9049 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9050 vsi->tc_config.enabled_tc);
9052 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9053 dev_info(&vsi->back->pdev->dev,
9054 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
9058 /* We come up by default in VEPA mode if SRIOV is not
9059 * already enabled, in which case we can't force VEPA
9062 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9063 veb->bridge_mode = BRIDGE_MODE_VEPA;
9064 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9066 i40e_config_bridge_mode(veb);
9068 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9069 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9073 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9077 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9078 uplink_seid = veb->seid;
9081 /* get vsi sw struct */
9082 v_idx = i40e_vsi_mem_alloc(pf, type);
9085 vsi = pf->vsi[v_idx];
9089 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9091 if (type == I40E_VSI_MAIN)
9092 pf->lan_vsi = v_idx;
9093 else if (type == I40E_VSI_SRIOV)
9094 vsi->vf_id = param1;
9095 /* assign it some queues */
9096 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9099 dev_info(&pf->pdev->dev,
9100 "failed to get tracking for %d queues for VSI %d err=%d\n",
9101 vsi->alloc_queue_pairs, vsi->seid, ret);
9104 vsi->base_queue = ret;
9106 /* get a VSI from the hardware */
9107 vsi->uplink_seid = uplink_seid;
9108 ret = i40e_add_vsi(vsi);
9112 switch (vsi->type) {
9113 /* setup the netdev if needed */
9115 case I40E_VSI_VMDQ2:
9117 ret = i40e_config_netdev(vsi);
9120 ret = register_netdev(vsi->netdev);
9123 vsi->netdev_registered = true;
9124 netif_carrier_off(vsi->netdev);
9125 #ifdef CONFIG_I40E_DCB
9126 /* Setup DCB netlink interface */
9127 i40e_dcbnl_setup(vsi);
9128 #endif /* CONFIG_I40E_DCB */
9132 /* set up vectors and rings if needed */
9133 ret = i40e_vsi_setup_vectors(vsi);
9137 ret = i40e_alloc_rings(vsi);
9141 /* map all of the rings to the q_vectors */
9142 i40e_vsi_map_rings_to_vectors(vsi);
9144 i40e_vsi_reset_stats(vsi);
9148 /* no netdev or rings for the other VSI types */
9152 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9153 (vsi->type == I40E_VSI_VMDQ2)) {
9154 ret = i40e_vsi_config_rss(vsi);
9159 i40e_vsi_free_q_vectors(vsi);
9161 if (vsi->netdev_registered) {
9162 vsi->netdev_registered = false;
9163 unregister_netdev(vsi->netdev);
9164 free_netdev(vsi->netdev);
9168 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9170 i40e_vsi_clear(vsi);
9176 * i40e_veb_get_bw_info - Query VEB BW information
9177 * @veb: the veb to query
9179 * Query the Tx scheduler BW configuration data for given VEB
9181 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9183 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9184 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9185 struct i40e_pf *pf = veb->pf;
9186 struct i40e_hw *hw = &pf->hw;
9191 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9194 dev_info(&pf->pdev->dev,
9195 "query veb bw config failed, err %s aq_err %s\n",
9196 i40e_stat_str(&pf->hw, ret),
9197 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9201 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9204 dev_info(&pf->pdev->dev,
9205 "query veb bw ets config failed, err %s aq_err %s\n",
9206 i40e_stat_str(&pf->hw, ret),
9207 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9211 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9212 veb->bw_max_quanta = ets_data.tc_bw_max;
9213 veb->is_abs_credits = bw_data.absolute_credits_enable;
9214 veb->enabled_tc = ets_data.tc_valid_bits;
9215 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9216 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9217 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9218 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9219 veb->bw_tc_limit_credits[i] =
9220 le16_to_cpu(bw_data.tc_bw_limits[i]);
9221 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9229 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9230 * @pf: board private structure
9232 * On error: returns error code (negative)
9233 * On success: returns vsi index in PF (positive)
9235 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9238 struct i40e_veb *veb;
9241 /* Need to protect the allocation of switch elements at the PF level */
9242 mutex_lock(&pf->switch_mutex);
9244 /* VEB list may be fragmented if VEB creation/destruction has
9245 * been happening. We can afford to do a quick scan to look
9246 * for any free slots in the list.
9248 * find next empty veb slot, looping back around if necessary
9251 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9253 if (i >= I40E_MAX_VEB) {
9255 goto err_alloc_veb; /* out of VEB slots! */
9258 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9265 veb->enabled_tc = 1;
9270 mutex_unlock(&pf->switch_mutex);
9275 * i40e_switch_branch_release - Delete a branch of the switch tree
9276 * @branch: where to start deleting
9278 * This uses recursion to find the tips of the branch to be
9279 * removed, deleting until we get back to and can delete this VEB.
9281 static void i40e_switch_branch_release(struct i40e_veb *branch)
9283 struct i40e_pf *pf = branch->pf;
9284 u16 branch_seid = branch->seid;
9285 u16 veb_idx = branch->idx;
9288 /* release any VEBs on this VEB - RECURSION */
9289 for (i = 0; i < I40E_MAX_VEB; i++) {
9292 if (pf->veb[i]->uplink_seid == branch->seid)
9293 i40e_switch_branch_release(pf->veb[i]);
9296 /* Release the VSIs on this VEB, but not the owner VSI.
9298 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9299 * the VEB itself, so don't use (*branch) after this loop.
9301 for (i = 0; i < pf->num_alloc_vsi; i++) {
9304 if (pf->vsi[i]->uplink_seid == branch_seid &&
9305 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9306 i40e_vsi_release(pf->vsi[i]);
9310 /* There's one corner case where the VEB might not have been
9311 * removed, so double check it here and remove it if needed.
9312 * This case happens if the veb was created from the debugfs
9313 * commands and no VSIs were added to it.
9315 if (pf->veb[veb_idx])
9316 i40e_veb_release(pf->veb[veb_idx]);
9320 * i40e_veb_clear - remove veb struct
9321 * @veb: the veb to remove
9323 static void i40e_veb_clear(struct i40e_veb *veb)
9329 struct i40e_pf *pf = veb->pf;
9331 mutex_lock(&pf->switch_mutex);
9332 if (pf->veb[veb->idx] == veb)
9333 pf->veb[veb->idx] = NULL;
9334 mutex_unlock(&pf->switch_mutex);
9341 * i40e_veb_release - Delete a VEB and free its resources
9342 * @veb: the VEB being removed
9344 void i40e_veb_release(struct i40e_veb *veb)
9346 struct i40e_vsi *vsi = NULL;
9352 /* find the remaining VSI and check for extras */
9353 for (i = 0; i < pf->num_alloc_vsi; i++) {
9354 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9360 dev_info(&pf->pdev->dev,
9361 "can't remove VEB %d with %d VSIs left\n",
9366 /* move the remaining VSI to uplink veb */
9367 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9368 if (veb->uplink_seid) {
9369 vsi->uplink_seid = veb->uplink_seid;
9370 if (veb->uplink_seid == pf->mac_seid)
9371 vsi->veb_idx = I40E_NO_VEB;
9373 vsi->veb_idx = veb->veb_idx;
9376 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9377 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9380 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9381 i40e_veb_clear(veb);
9385 * i40e_add_veb - create the VEB in the switch
9386 * @veb: the VEB to be instantiated
9387 * @vsi: the controlling VSI
9389 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9391 struct i40e_pf *pf = veb->pf;
9392 bool is_default = veb->pf->cur_promisc;
9393 bool is_cloud = false;
9396 /* get a VEB from the hardware */
9397 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9398 veb->enabled_tc, is_default,
9399 is_cloud, &veb->seid, NULL);
9401 dev_info(&pf->pdev->dev,
9402 "couldn't add VEB, err %s aq_err %s\n",
9403 i40e_stat_str(&pf->hw, ret),
9404 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9408 /* get statistics counter */
9409 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9410 &veb->stats_idx, NULL, NULL, NULL);
9412 dev_info(&pf->pdev->dev,
9413 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9414 i40e_stat_str(&pf->hw, ret),
9415 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9418 ret = i40e_veb_get_bw_info(veb);
9420 dev_info(&pf->pdev->dev,
9421 "couldn't get VEB bw info, err %s aq_err %s\n",
9422 i40e_stat_str(&pf->hw, ret),
9423 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9424 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9428 vsi->uplink_seid = veb->seid;
9429 vsi->veb_idx = veb->idx;
9430 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9436 * i40e_veb_setup - Set up a VEB
9437 * @pf: board private structure
9438 * @flags: VEB setup flags
9439 * @uplink_seid: the switch element to link to
9440 * @vsi_seid: the initial VSI seid
9441 * @enabled_tc: Enabled TC bit-map
9443 * This allocates the sw VEB structure and links it into the switch
9444 * It is possible and legal for this to be a duplicate of an already
9445 * existing VEB. It is also possible for both uplink and vsi seids
9446 * to be zero, in order to create a floating VEB.
9448 * Returns pointer to the successfully allocated VEB sw struct on
9449 * success, otherwise returns NULL on failure.
9451 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9452 u16 uplink_seid, u16 vsi_seid,
9455 struct i40e_veb *veb, *uplink_veb = NULL;
9456 int vsi_idx, veb_idx;
9459 /* if one seid is 0, the other must be 0 to create a floating relay */
9460 if ((uplink_seid == 0 || vsi_seid == 0) &&
9461 (uplink_seid + vsi_seid != 0)) {
9462 dev_info(&pf->pdev->dev,
9463 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9464 uplink_seid, vsi_seid);
9468 /* make sure there is such a vsi and uplink */
9469 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9470 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9472 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9473 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9478 if (uplink_seid && uplink_seid != pf->mac_seid) {
9479 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9480 if (pf->veb[veb_idx] &&
9481 pf->veb[veb_idx]->seid == uplink_seid) {
9482 uplink_veb = pf->veb[veb_idx];
9487 dev_info(&pf->pdev->dev,
9488 "uplink seid %d not found\n", uplink_seid);
9493 /* get veb sw struct */
9494 veb_idx = i40e_veb_mem_alloc(pf);
9497 veb = pf->veb[veb_idx];
9499 veb->uplink_seid = uplink_seid;
9500 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9501 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9503 /* create the VEB in the switch */
9504 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9507 if (vsi_idx == pf->lan_vsi)
9508 pf->lan_veb = veb->idx;
9513 i40e_veb_clear(veb);
9519 * i40e_setup_pf_switch_element - set PF vars based on switch type
9520 * @pf: board private structure
9521 * @ele: element we are building info from
9522 * @num_reported: total number of elements
9523 * @printconfig: should we print the contents
9525 * helper function to assist in extracting a few useful SEID values.
9527 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9528 struct i40e_aqc_switch_config_element_resp *ele,
9529 u16 num_reported, bool printconfig)
9531 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9532 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9533 u8 element_type = ele->element_type;
9534 u16 seid = le16_to_cpu(ele->seid);
9537 dev_info(&pf->pdev->dev,
9538 "type=%d seid=%d uplink=%d downlink=%d\n",
9539 element_type, seid, uplink_seid, downlink_seid);
9541 switch (element_type) {
9542 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9543 pf->mac_seid = seid;
9545 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9547 if (uplink_seid != pf->mac_seid)
9549 if (pf->lan_veb == I40E_NO_VEB) {
9552 /* find existing or else empty VEB */
9553 for (v = 0; v < I40E_MAX_VEB; v++) {
9554 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9559 if (pf->lan_veb == I40E_NO_VEB) {
9560 v = i40e_veb_mem_alloc(pf);
9567 pf->veb[pf->lan_veb]->seid = seid;
9568 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9569 pf->veb[pf->lan_veb]->pf = pf;
9570 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9572 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9573 if (num_reported != 1)
9575 /* This is immediately after a reset so we can assume this is
9578 pf->mac_seid = uplink_seid;
9579 pf->pf_seid = downlink_seid;
9580 pf->main_vsi_seid = seid;
9582 dev_info(&pf->pdev->dev,
9583 "pf_seid=%d main_vsi_seid=%d\n",
9584 pf->pf_seid, pf->main_vsi_seid);
9586 case I40E_SWITCH_ELEMENT_TYPE_PF:
9587 case I40E_SWITCH_ELEMENT_TYPE_VF:
9588 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9589 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9590 case I40E_SWITCH_ELEMENT_TYPE_PE:
9591 case I40E_SWITCH_ELEMENT_TYPE_PA:
9592 /* ignore these for now */
9595 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9596 element_type, seid);
9602 * i40e_fetch_switch_configuration - Get switch config from firmware
9603 * @pf: board private structure
9604 * @printconfig: should we print the contents
9606 * Get the current switch configuration from the device and
9607 * extract a few useful SEID values.
9609 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9611 struct i40e_aqc_get_switch_config_resp *sw_config;
9617 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9621 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9623 u16 num_reported, num_total;
9625 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9629 dev_info(&pf->pdev->dev,
9630 "get switch config failed err %s aq_err %s\n",
9631 i40e_stat_str(&pf->hw, ret),
9632 i40e_aq_str(&pf->hw,
9633 pf->hw.aq.asq_last_status));
9638 num_reported = le16_to_cpu(sw_config->header.num_reported);
9639 num_total = le16_to_cpu(sw_config->header.num_total);
9642 dev_info(&pf->pdev->dev,
9643 "header: %d reported %d total\n",
9644 num_reported, num_total);
9646 for (i = 0; i < num_reported; i++) {
9647 struct i40e_aqc_switch_config_element_resp *ele =
9648 &sw_config->element[i];
9650 i40e_setup_pf_switch_element(pf, ele, num_reported,
9653 } while (next_seid != 0);
9660 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9661 * @pf: board private structure
9662 * @reinit: if the Main VSI needs to re-initialized.
9664 * Returns 0 on success, negative value on failure
9666 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9670 /* find out what's out there already */
9671 ret = i40e_fetch_switch_configuration(pf, false);
9673 dev_info(&pf->pdev->dev,
9674 "couldn't fetch switch config, err %s aq_err %s\n",
9675 i40e_stat_str(&pf->hw, ret),
9676 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9679 i40e_pf_reset_stats(pf);
9681 /* first time setup */
9682 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9683 struct i40e_vsi *vsi = NULL;
9686 /* Set up the PF VSI associated with the PF's main VSI
9687 * that is already in the HW switch
9689 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9690 uplink_seid = pf->veb[pf->lan_veb]->seid;
9692 uplink_seid = pf->mac_seid;
9693 if (pf->lan_vsi == I40E_NO_VSI)
9694 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9696 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9698 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9699 i40e_fdir_teardown(pf);
9703 /* force a reset of TC and queue layout configurations */
9704 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9705 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9706 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9707 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9709 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9711 i40e_fdir_sb_setup(pf);
9713 /* Setup static PF queue filter control settings */
9714 ret = i40e_setup_pf_filter_control(pf);
9716 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9718 /* Failure here should not stop continuing other steps */
9721 /* enable RSS in the HW, even for only one queue, as the stack can use
9724 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9725 i40e_config_rss(pf);
9727 /* fill in link information and enable LSE reporting */
9728 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9729 i40e_link_event(pf);
9731 /* Initialize user-specific link properties */
9732 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9733 I40E_AQ_AN_COMPLETED) ? true : false);
9741 * i40e_determine_queue_usage - Work out queue distribution
9742 * @pf: board private structure
9744 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9748 pf->num_lan_qps = 0;
9750 pf->num_fcoe_qps = 0;
9753 /* Find the max queues to be put into basic use. We'll always be
9754 * using TC0, whether or not DCB is running, and TC0 will get the
9757 queues_left = pf->hw.func_caps.num_tx_qp;
9759 if ((queues_left == 1) ||
9760 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9761 /* one qp for PF, no queues for anything else */
9763 pf->rss_size = pf->num_lan_qps = 1;
9765 /* make sure all the fancies are disabled */
9766 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9768 I40E_FLAG_FCOE_ENABLED |
9770 I40E_FLAG_FD_SB_ENABLED |
9771 I40E_FLAG_FD_ATR_ENABLED |
9772 I40E_FLAG_DCB_CAPABLE |
9773 I40E_FLAG_SRIOV_ENABLED |
9774 I40E_FLAG_VMDQ_ENABLED);
9775 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9776 I40E_FLAG_FD_SB_ENABLED |
9777 I40E_FLAG_FD_ATR_ENABLED |
9778 I40E_FLAG_DCB_CAPABLE))) {
9780 pf->rss_size = pf->num_lan_qps = 1;
9781 queues_left -= pf->num_lan_qps;
9783 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9785 I40E_FLAG_FCOE_ENABLED |
9787 I40E_FLAG_FD_SB_ENABLED |
9788 I40E_FLAG_FD_ATR_ENABLED |
9789 I40E_FLAG_DCB_ENABLED |
9790 I40E_FLAG_VMDQ_ENABLED);
9792 /* Not enough queues for all TCs */
9793 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9794 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9795 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9796 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9798 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9800 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9801 pf->hw.func_caps.num_tx_qp);
9803 queues_left -= pf->num_lan_qps;
9807 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9808 if (I40E_DEFAULT_FCOE <= queues_left) {
9809 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9810 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9811 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9813 pf->num_fcoe_qps = 0;
9814 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9815 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9818 queues_left -= pf->num_fcoe_qps;
9822 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9823 if (queues_left > 1) {
9824 queues_left -= 1; /* save 1 queue for FD */
9826 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9827 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9831 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9832 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9833 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9834 (queues_left / pf->num_vf_qps));
9835 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9838 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9839 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9840 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9841 (queues_left / pf->num_vmdq_qps));
9842 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9845 pf->queues_left = queues_left;
9847 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9852 * i40e_setup_pf_filter_control - Setup PF static filter control
9853 * @pf: PF to be setup
9855 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9856 * settings. If PE/FCoE are enabled then it will also set the per PF
9857 * based filter sizes required for them. It also enables Flow director,
9858 * ethertype and macvlan type filter settings for the pf.
9860 * Returns 0 on success, negative on failure
9862 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9864 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9866 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9868 /* Flow Director is enabled */
9869 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9870 settings->enable_fdir = true;
9872 /* Ethtype and MACVLAN filters enabled for PF */
9873 settings->enable_ethtype = true;
9874 settings->enable_macvlan = true;
9876 if (i40e_set_filter_control(&pf->hw, settings))
9882 #define INFO_STRING_LEN 255
9883 static void i40e_print_features(struct i40e_pf *pf)
9885 struct i40e_hw *hw = &pf->hw;
9888 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9890 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9896 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9897 #ifdef CONFIG_PCI_IOV
9898 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9900 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9901 pf->hw.func_caps.num_vsis,
9902 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9903 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9905 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9906 buf += sprintf(buf, "RSS ");
9907 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9908 buf += sprintf(buf, "FD_ATR ");
9909 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9910 buf += sprintf(buf, "FD_SB ");
9911 buf += sprintf(buf, "NTUPLE ");
9913 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9914 buf += sprintf(buf, "DCB ");
9915 if (pf->flags & I40E_FLAG_PTP)
9916 buf += sprintf(buf, "PTP ");
9918 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9919 buf += sprintf(buf, "FCOE ");
9922 BUG_ON(buf > (string + INFO_STRING_LEN));
9923 dev_info(&pf->pdev->dev, "%s\n", string);
9928 * i40e_probe - Device initialization routine
9929 * @pdev: PCI device information struct
9930 * @ent: entry in i40e_pci_tbl
9932 * i40e_probe initializes a PF identified by a pci_dev structure.
9933 * The OS initialization, configuring of the PF private structure,
9934 * and a hardware reset occur.
9936 * Returns 0 on success, negative on failure
9938 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9940 struct i40e_aq_get_phy_abilities_resp abilities;
9941 unsigned long ioremap_len;
9944 static u16 pfs_found;
9950 err = pci_enable_device_mem(pdev);
9954 /* set up for high or low dma */
9955 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9957 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9960 "DMA configuration failed: 0x%x\n", err);
9965 /* set up pci connections */
9966 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9967 IORESOURCE_MEM), i40e_driver_name);
9969 dev_info(&pdev->dev,
9970 "pci_request_selected_regions failed %d\n", err);
9974 pci_enable_pcie_error_reporting(pdev);
9975 pci_set_master(pdev);
9977 /* Now that we have a PCI connection, we need to do the
9978 * low level device setup. This is primarily setting up
9979 * the Admin Queue structures and then querying for the
9980 * device's current profile information.
9982 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9989 set_bit(__I40E_DOWN, &pf->state);
9994 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0),
9995 I40E_MAX_CSR_SPACE);
9997 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len);
10000 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10001 (unsigned int)pci_resource_start(pdev, 0),
10002 (unsigned int)pci_resource_len(pdev, 0), err);
10005 hw->vendor_id = pdev->vendor;
10006 hw->device_id = pdev->device;
10007 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10008 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10009 hw->subsystem_device_id = pdev->subsystem_device;
10010 hw->bus.device = PCI_SLOT(pdev->devfn);
10011 hw->bus.func = PCI_FUNC(pdev->devfn);
10012 pf->instance = pfs_found;
10015 pf->msg_enable = pf->hw.debug_mask;
10016 pf->msg_enable = debug;
10019 /* do a special CORER for clearing PXE mode once at init */
10020 if (hw->revision_id == 0 &&
10021 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10022 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10027 i40e_clear_pxe_mode(hw);
10030 /* Reset here to make sure all is clean and to define PF 'n' */
10032 err = i40e_pf_reset(hw);
10034 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10039 hw->aq.num_arq_entries = I40E_AQ_LEN;
10040 hw->aq.num_asq_entries = I40E_AQ_LEN;
10041 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10042 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10043 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10045 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10047 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10049 err = i40e_init_shared_code(hw);
10051 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10056 /* set up a default setting for link flow control */
10057 pf->hw.fc.requested_mode = I40E_FC_NONE;
10059 err = i40e_init_adminq(hw);
10060 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10062 dev_info(&pdev->dev,
10063 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10067 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10068 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10069 dev_info(&pdev->dev,
10070 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10071 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10072 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10073 dev_info(&pdev->dev,
10074 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10076 i40e_verify_eeprom(pf);
10078 /* Rev 0 hardware was never productized */
10079 if (hw->revision_id < 1)
10080 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10082 i40e_clear_pxe_mode(hw);
10083 err = i40e_get_capabilities(pf);
10085 goto err_adminq_setup;
10087 err = i40e_sw_init(pf);
10089 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10093 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10094 hw->func_caps.num_rx_qp,
10095 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10097 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10098 goto err_init_lan_hmc;
10101 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10103 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10105 goto err_configure_lan_hmc;
10108 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10109 * Ignore error return codes because if it was already disabled via
10110 * hardware settings this will fail
10112 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10113 (pf->hw.aq.fw_maj_ver < 4)) {
10114 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10115 i40e_aq_stop_lldp(hw, true, NULL);
10118 i40e_get_mac_addr(hw, hw->mac.addr);
10119 if (!is_valid_ether_addr(hw->mac.addr)) {
10120 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10124 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10125 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10126 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10127 if (is_valid_ether_addr(hw->mac.port_addr))
10128 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10130 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10132 dev_info(&pdev->dev,
10133 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10134 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10135 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10137 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10139 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10140 #endif /* I40E_FCOE */
10142 pci_set_drvdata(pdev, pf);
10143 pci_save_state(pdev);
10144 #ifdef CONFIG_I40E_DCB
10145 err = i40e_init_pf_dcb(pf);
10147 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10148 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10149 /* Continue without DCB enabled */
10151 #endif /* CONFIG_I40E_DCB */
10153 /* set up periodic task facility */
10154 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10155 pf->service_timer_period = HZ;
10157 INIT_WORK(&pf->service_task, i40e_service_task);
10158 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10159 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10161 /* WoL defaults to disabled */
10162 pf->wol_en = false;
10163 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10165 /* set up the main switch operations */
10166 i40e_determine_queue_usage(pf);
10167 err = i40e_init_interrupt_scheme(pf);
10169 goto err_switch_setup;
10171 /* The number of VSIs reported by the FW is the minimum guaranteed
10172 * to us; HW supports far more and we share the remaining pool with
10173 * the other PFs. We allocate space for more than the guarantee with
10174 * the understanding that we might not get them all later.
10176 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10177 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10179 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10181 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10182 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10183 pf->vsi = kzalloc(len, GFP_KERNEL);
10186 goto err_switch_setup;
10189 #ifdef CONFIG_PCI_IOV
10190 /* prep for VF support */
10191 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10192 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10193 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10194 if (pci_num_vf(pdev))
10195 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10198 err = i40e_setup_pf_switch(pf, false);
10200 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10203 /* if FDIR VSI was set up, start it now */
10204 for (i = 0; i < pf->num_alloc_vsi; i++) {
10205 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10206 i40e_vsi_open(pf->vsi[i]);
10211 /* driver is only interested in link up/down and module qualification
10212 * reports from firmware
10214 err = i40e_aq_set_phy_int_mask(&pf->hw,
10215 I40E_AQ_EVENT_LINK_UPDOWN |
10216 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10218 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10219 i40e_stat_str(&pf->hw, err),
10220 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10222 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10223 (pf->hw.aq.fw_maj_ver < 4)) {
10225 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10227 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10228 i40e_stat_str(&pf->hw, err),
10229 i40e_aq_str(&pf->hw,
10230 pf->hw.aq.asq_last_status));
10232 /* The main driver is (mostly) up and happy. We need to set this state
10233 * before setting up the misc vector or we get a race and the vector
10234 * ends up disabled forever.
10236 clear_bit(__I40E_DOWN, &pf->state);
10238 /* In case of MSIX we are going to setup the misc vector right here
10239 * to handle admin queue events etc. In case of legacy and MSI
10240 * the misc functionality and queue processing is combined in
10241 * the same vector and that gets setup at open.
10243 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10244 err = i40e_setup_misc_vector(pf);
10246 dev_info(&pdev->dev,
10247 "setup of misc vector failed: %d\n", err);
10252 #ifdef CONFIG_PCI_IOV
10253 /* prep for VF support */
10254 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10255 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10256 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10259 /* disable link interrupts for VFs */
10260 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10261 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10262 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10265 if (pci_num_vf(pdev)) {
10266 dev_info(&pdev->dev,
10267 "Active VFs found, allocating resources.\n");
10268 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10270 dev_info(&pdev->dev,
10271 "Error %d allocating resources for existing VFs\n",
10275 #endif /* CONFIG_PCI_IOV */
10279 i40e_dbg_pf_init(pf);
10281 /* tell the firmware that we're starting */
10282 i40e_send_version(pf);
10284 /* since everything's happy, start the service_task timer */
10285 mod_timer(&pf->service_timer,
10286 round_jiffies(jiffies + pf->service_timer_period));
10289 /* create FCoE interface */
10290 i40e_fcoe_vsi_setup(pf);
10293 /* Get the negotiated link width and speed from PCI config space */
10294 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10296 i40e_set_pci_config_data(hw, link_status);
10298 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10299 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10300 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10301 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10303 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10304 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10305 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10306 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10309 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10310 hw->bus.speed < i40e_bus_speed_8000) {
10311 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10312 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10315 /* get the requested speeds from the fw */
10316 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10318 dev_info(&pf->pdev->dev,
10319 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10320 i40e_stat_str(&pf->hw, err),
10321 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10322 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10324 /* print a string summarizing features */
10325 i40e_print_features(pf);
10329 /* Unwind what we've done if something failed in the setup */
10331 set_bit(__I40E_DOWN, &pf->state);
10332 i40e_clear_interrupt_scheme(pf);
10335 i40e_reset_interrupt_capability(pf);
10336 del_timer_sync(&pf->service_timer);
10338 err_configure_lan_hmc:
10339 (void)i40e_shutdown_lan_hmc(hw);
10341 kfree(pf->qp_pile);
10344 (void)i40e_shutdown_adminq(hw);
10346 iounmap(hw->hw_addr);
10350 pci_disable_pcie_error_reporting(pdev);
10351 pci_release_selected_regions(pdev,
10352 pci_select_bars(pdev, IORESOURCE_MEM));
10355 pci_disable_device(pdev);
10360 * i40e_remove - Device removal routine
10361 * @pdev: PCI device information struct
10363 * i40e_remove is called by the PCI subsystem to alert the driver
10364 * that is should release a PCI device. This could be caused by a
10365 * Hot-Plug event, or because the driver is going to be removed from
10368 static void i40e_remove(struct pci_dev *pdev)
10370 struct i40e_pf *pf = pci_get_drvdata(pdev);
10371 i40e_status ret_code;
10374 i40e_dbg_pf_exit(pf);
10378 /* no more scheduling of any task */
10379 set_bit(__I40E_DOWN, &pf->state);
10380 del_timer_sync(&pf->service_timer);
10381 cancel_work_sync(&pf->service_task);
10382 i40e_fdir_teardown(pf);
10384 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10386 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10389 i40e_fdir_teardown(pf);
10391 /* If there is a switch structure or any orphans, remove them.
10392 * This will leave only the PF's VSI remaining.
10394 for (i = 0; i < I40E_MAX_VEB; i++) {
10398 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10399 pf->veb[i]->uplink_seid == 0)
10400 i40e_switch_branch_release(pf->veb[i]);
10403 /* Now we can shutdown the PF's VSI, just before we kill
10406 if (pf->vsi[pf->lan_vsi])
10407 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10409 /* shutdown and destroy the HMC */
10410 if (pf->hw.hmc.hmc_obj) {
10411 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10413 dev_warn(&pdev->dev,
10414 "Failed to destroy the HMC resources: %d\n",
10418 /* shutdown the adminq */
10419 ret_code = i40e_shutdown_adminq(&pf->hw);
10421 dev_warn(&pdev->dev,
10422 "Failed to destroy the Admin Queue resources: %d\n",
10425 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10426 i40e_clear_interrupt_scheme(pf);
10427 for (i = 0; i < pf->num_alloc_vsi; i++) {
10429 i40e_vsi_clear_rings(pf->vsi[i]);
10430 i40e_vsi_clear(pf->vsi[i]);
10435 for (i = 0; i < I40E_MAX_VEB; i++) {
10440 kfree(pf->qp_pile);
10443 iounmap(pf->hw.hw_addr);
10445 pci_release_selected_regions(pdev,
10446 pci_select_bars(pdev, IORESOURCE_MEM));
10448 pci_disable_pcie_error_reporting(pdev);
10449 pci_disable_device(pdev);
10453 * i40e_pci_error_detected - warning that something funky happened in PCI land
10454 * @pdev: PCI device information struct
10456 * Called to warn that something happened and the error handling steps
10457 * are in progress. Allows the driver to quiesce things, be ready for
10460 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10461 enum pci_channel_state error)
10463 struct i40e_pf *pf = pci_get_drvdata(pdev);
10465 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10467 /* shutdown all operations */
10468 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10470 i40e_prep_for_reset(pf);
10474 /* Request a slot reset */
10475 return PCI_ERS_RESULT_NEED_RESET;
10479 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10480 * @pdev: PCI device information struct
10482 * Called to find if the driver can work with the device now that
10483 * the pci slot has been reset. If a basic connection seems good
10484 * (registers are readable and have sane content) then return a
10485 * happy little PCI_ERS_RESULT_xxx.
10487 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10489 struct i40e_pf *pf = pci_get_drvdata(pdev);
10490 pci_ers_result_t result;
10494 dev_info(&pdev->dev, "%s\n", __func__);
10495 if (pci_enable_device_mem(pdev)) {
10496 dev_info(&pdev->dev,
10497 "Cannot re-enable PCI device after reset.\n");
10498 result = PCI_ERS_RESULT_DISCONNECT;
10500 pci_set_master(pdev);
10501 pci_restore_state(pdev);
10502 pci_save_state(pdev);
10503 pci_wake_from_d3(pdev, false);
10505 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10507 result = PCI_ERS_RESULT_RECOVERED;
10509 result = PCI_ERS_RESULT_DISCONNECT;
10512 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10514 dev_info(&pdev->dev,
10515 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10517 /* non-fatal, continue */
10524 * i40e_pci_error_resume - restart operations after PCI error recovery
10525 * @pdev: PCI device information struct
10527 * Called to allow the driver to bring things back up after PCI error
10528 * and/or reset recovery has finished.
10530 static void i40e_pci_error_resume(struct pci_dev *pdev)
10532 struct i40e_pf *pf = pci_get_drvdata(pdev);
10534 dev_info(&pdev->dev, "%s\n", __func__);
10535 if (test_bit(__I40E_SUSPENDED, &pf->state))
10539 i40e_handle_reset_warning(pf);
10544 * i40e_shutdown - PCI callback for shutting down
10545 * @pdev: PCI device information struct
10547 static void i40e_shutdown(struct pci_dev *pdev)
10549 struct i40e_pf *pf = pci_get_drvdata(pdev);
10550 struct i40e_hw *hw = &pf->hw;
10552 set_bit(__I40E_SUSPENDED, &pf->state);
10553 set_bit(__I40E_DOWN, &pf->state);
10555 i40e_prep_for_reset(pf);
10558 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10559 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10561 del_timer_sync(&pf->service_timer);
10562 cancel_work_sync(&pf->service_task);
10563 i40e_fdir_teardown(pf);
10566 i40e_prep_for_reset(pf);
10569 wr32(hw, I40E_PFPM_APM,
10570 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10571 wr32(hw, I40E_PFPM_WUFC,
10572 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10574 i40e_clear_interrupt_scheme(pf);
10576 if (system_state == SYSTEM_POWER_OFF) {
10577 pci_wake_from_d3(pdev, pf->wol_en);
10578 pci_set_power_state(pdev, PCI_D3hot);
10584 * i40e_suspend - PCI callback for moving to D3
10585 * @pdev: PCI device information struct
10587 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10589 struct i40e_pf *pf = pci_get_drvdata(pdev);
10590 struct i40e_hw *hw = &pf->hw;
10592 set_bit(__I40E_SUSPENDED, &pf->state);
10593 set_bit(__I40E_DOWN, &pf->state);
10596 i40e_prep_for_reset(pf);
10599 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10600 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10602 pci_wake_from_d3(pdev, pf->wol_en);
10603 pci_set_power_state(pdev, PCI_D3hot);
10609 * i40e_resume - PCI callback for waking up from D3
10610 * @pdev: PCI device information struct
10612 static int i40e_resume(struct pci_dev *pdev)
10614 struct i40e_pf *pf = pci_get_drvdata(pdev);
10617 pci_set_power_state(pdev, PCI_D0);
10618 pci_restore_state(pdev);
10619 /* pci_restore_state() clears dev->state_saves, so
10620 * call pci_save_state() again to restore it.
10622 pci_save_state(pdev);
10624 err = pci_enable_device_mem(pdev);
10626 dev_err(&pdev->dev,
10627 "%s: Cannot enable PCI device from suspend\n",
10631 pci_set_master(pdev);
10633 /* no wakeup events while running */
10634 pci_wake_from_d3(pdev, false);
10636 /* handling the reset will rebuild the device state */
10637 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10638 clear_bit(__I40E_DOWN, &pf->state);
10640 i40e_reset_and_rebuild(pf, false);
10648 static const struct pci_error_handlers i40e_err_handler = {
10649 .error_detected = i40e_pci_error_detected,
10650 .slot_reset = i40e_pci_error_slot_reset,
10651 .resume = i40e_pci_error_resume,
10654 static struct pci_driver i40e_driver = {
10655 .name = i40e_driver_name,
10656 .id_table = i40e_pci_tbl,
10657 .probe = i40e_probe,
10658 .remove = i40e_remove,
10660 .suspend = i40e_suspend,
10661 .resume = i40e_resume,
10663 .shutdown = i40e_shutdown,
10664 .err_handler = &i40e_err_handler,
10665 .sriov_configure = i40e_pci_sriov_configure,
10669 * i40e_init_module - Driver registration routine
10671 * i40e_init_module is the first routine called when the driver is
10672 * loaded. All it does is register with the PCI subsystem.
10674 static int __init i40e_init_module(void)
10676 pr_info("%s: %s - version %s\n", i40e_driver_name,
10677 i40e_driver_string, i40e_driver_version_str);
10678 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10681 return pci_register_driver(&i40e_driver);
10683 module_init(i40e_init_module);
10686 * i40e_exit_module - Driver exit cleanup routine
10688 * i40e_exit_module is called just before the driver is removed
10691 static void __exit i40e_exit_module(void)
10693 pci_unregister_driver(&i40e_driver);
10696 module_exit(i40e_exit_module);