1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
82 /* required last entry */
85 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
87 #define I40E_MAX_VF_COUNT 128
88 static int debug = -1;
89 module_param(debug, int, 0);
90 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
93 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
94 MODULE_LICENSE("GPL");
95 MODULE_VERSION(DRV_VERSION);
98 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
99 * @hw: pointer to the HW structure
100 * @mem: ptr to mem struct to fill out
101 * @size: size of memory requested
102 * @alignment: what to align the allocation to
104 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
105 u64 size, u32 alignment)
107 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
109 mem->size = ALIGN(size, alignment);
110 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
111 &mem->pa, GFP_KERNEL);
119 * i40e_free_dma_mem_d - OS specific memory free for shared code
120 * @hw: pointer to the HW structure
121 * @mem: ptr to mem struct to free
123 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
125 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
127 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
136 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
137 * @hw: pointer to the HW structure
138 * @mem: ptr to mem struct to fill out
139 * @size: size of memory requested
141 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
145 mem->va = kzalloc(size, GFP_KERNEL);
154 * i40e_free_virt_mem_d - OS specific memory free for shared code
155 * @hw: pointer to the HW structure
156 * @mem: ptr to mem struct to free
158 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
160 /* it's ok to kfree a NULL pointer */
169 * i40e_get_lump - find a lump of free generic resource
170 * @pf: board private structure
171 * @pile: the pile of resource to search
172 * @needed: the number of items needed
173 * @id: an owner id to stick on the items assigned
175 * Returns the base item index of the lump, or negative for error
177 * The search_hint trick and lack of advanced fit-finding only work
178 * because we're highly likely to have all the same size lump requests.
179 * Linear search time and any fragmentation should be minimal.
181 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
187 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
188 dev_info(&pf->pdev->dev,
189 "param err: pile=%p needed=%d id=0x%04x\n",
194 /* start the linear search with an imperfect hint */
195 i = pile->search_hint;
196 while (i < pile->num_entries) {
197 /* skip already allocated entries */
198 if (pile->list[i] & I40E_PILE_VALID_BIT) {
203 /* do we have enough in this lump? */
204 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
205 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
210 /* there was enough, so assign it to the requestor */
211 for (j = 0; j < needed; j++)
212 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
214 pile->search_hint = i + j;
217 /* not enough, so skip over it and continue looking */
226 * i40e_put_lump - return a lump of generic resource
227 * @pile: the pile of resource to search
228 * @index: the base item index
229 * @id: the owner id of the items assigned
231 * Returns the count of items in the lump
233 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
235 int valid_id = (id | I40E_PILE_VALID_BIT);
239 if (!pile || index >= pile->num_entries)
243 i < pile->num_entries && pile->list[i] == valid_id;
249 if (count && index < pile->search_hint)
250 pile->search_hint = index;
256 * i40e_find_vsi_from_id - searches for the vsi with the given id
257 * @pf - the pf structure to search for the vsi
258 * @id - id of the vsi it is searching for
260 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
264 for (i = 0; i < pf->num_alloc_vsi; i++)
265 if (pf->vsi[i] && (pf->vsi[i]->id == id))
272 * i40e_service_event_schedule - Schedule the service task to wake up
273 * @pf: board private structure
275 * If not already scheduled, this puts the task into the work queue
277 static void i40e_service_event_schedule(struct i40e_pf *pf)
279 if (!test_bit(__I40E_DOWN, &pf->state) &&
280 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
281 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
282 schedule_work(&pf->service_task);
286 * i40e_tx_timeout - Respond to a Tx Hang
287 * @netdev: network interface device structure
289 * If any port has noticed a Tx timeout, it is likely that the whole
290 * device is munged, not just the one netdev port, so go for the full
294 void i40e_tx_timeout(struct net_device *netdev)
296 static void i40e_tx_timeout(struct net_device *netdev)
299 struct i40e_netdev_priv *np = netdev_priv(netdev);
300 struct i40e_vsi *vsi = np->vsi;
301 struct i40e_pf *pf = vsi->back;
302 struct i40e_ring *tx_ring = NULL;
303 unsigned int i, hung_queue = 0;
306 pf->tx_timeout_count++;
308 /* find the stopped queue the same way the stack does */
309 for (i = 0; i < netdev->num_tx_queues; i++) {
310 struct netdev_queue *q;
311 unsigned long trans_start;
313 q = netdev_get_tx_queue(netdev, i);
314 trans_start = q->trans_start ? : netdev->trans_start;
315 if (netif_xmit_stopped(q) &&
317 (trans_start + netdev->watchdog_timeo))) {
323 if (i == netdev->num_tx_queues) {
324 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
326 /* now that we have an index, find the tx_ring struct */
327 for (i = 0; i < vsi->num_queue_pairs; i++) {
328 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
330 vsi->tx_rings[i]->queue_index) {
331 tx_ring = vsi->tx_rings[i];
338 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
339 pf->tx_timeout_recovery_level = 1; /* reset after some time */
340 else if (time_before(jiffies,
341 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
342 return; /* don't do any new action before the next timeout */
345 head = i40e_get_head(tx_ring);
346 /* Read interrupt register */
347 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
349 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
350 tx_ring->vsi->base_vector - 1));
352 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
354 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
355 vsi->seid, hung_queue, tx_ring->next_to_clean,
356 head, tx_ring->next_to_use,
357 readl(tx_ring->tail), val);
360 pf->tx_timeout_last_recovery = jiffies;
361 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
362 pf->tx_timeout_recovery_level, hung_queue);
364 switch (pf->tx_timeout_recovery_level) {
366 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
369 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
372 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
375 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
379 i40e_service_event_schedule(pf);
380 pf->tx_timeout_recovery_level++;
384 * i40e_release_rx_desc - Store the new tail and head values
385 * @rx_ring: ring to bump
386 * @val: new head index
388 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
390 rx_ring->next_to_use = val;
392 /* Force memory writes to complete before letting h/w
393 * know there are new descriptors to fetch. (Only
394 * applicable for weak-ordered memory model archs,
398 writel(val, rx_ring->tail);
402 * i40e_get_vsi_stats_struct - Get System Network Statistics
403 * @vsi: the VSI we care about
405 * Returns the address of the device statistics structure.
406 * The statistics are actually updated from the service task.
408 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
410 return &vsi->net_stats;
414 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
415 * @netdev: network interface device structure
417 * Returns the address of the device statistics structure.
418 * The statistics are actually updated from the service task.
421 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
422 struct net_device *netdev,
423 struct rtnl_link_stats64 *stats)
425 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
426 struct net_device *netdev,
427 struct rtnl_link_stats64 *stats)
430 struct i40e_netdev_priv *np = netdev_priv(netdev);
431 struct i40e_ring *tx_ring, *rx_ring;
432 struct i40e_vsi *vsi = np->vsi;
433 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
436 if (test_bit(__I40E_DOWN, &vsi->state))
443 for (i = 0; i < vsi->num_queue_pairs; i++) {
447 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
452 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
453 packets = tx_ring->stats.packets;
454 bytes = tx_ring->stats.bytes;
455 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
457 stats->tx_packets += packets;
458 stats->tx_bytes += bytes;
459 rx_ring = &tx_ring[1];
462 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
463 packets = rx_ring->stats.packets;
464 bytes = rx_ring->stats.bytes;
465 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
467 stats->rx_packets += packets;
468 stats->rx_bytes += bytes;
472 /* following stats updated by i40e_watchdog_subtask() */
473 stats->multicast = vsi_stats->multicast;
474 stats->tx_errors = vsi_stats->tx_errors;
475 stats->tx_dropped = vsi_stats->tx_dropped;
476 stats->rx_errors = vsi_stats->rx_errors;
477 stats->rx_dropped = vsi_stats->rx_dropped;
478 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
479 stats->rx_length_errors = vsi_stats->rx_length_errors;
485 * i40e_vsi_reset_stats - Resets all stats of the given vsi
486 * @vsi: the VSI to have its stats reset
488 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
490 struct rtnl_link_stats64 *ns;
496 ns = i40e_get_vsi_stats_struct(vsi);
497 memset(ns, 0, sizeof(*ns));
498 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
499 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
500 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
501 if (vsi->rx_rings && vsi->rx_rings[0]) {
502 for (i = 0; i < vsi->num_queue_pairs; i++) {
503 memset(&vsi->rx_rings[i]->stats, 0 ,
504 sizeof(vsi->rx_rings[i]->stats));
505 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
506 sizeof(vsi->rx_rings[i]->rx_stats));
507 memset(&vsi->tx_rings[i]->stats, 0 ,
508 sizeof(vsi->tx_rings[i]->stats));
509 memset(&vsi->tx_rings[i]->tx_stats, 0,
510 sizeof(vsi->tx_rings[i]->tx_stats));
513 vsi->stat_offsets_loaded = false;
517 * i40e_pf_reset_stats - Reset all of the stats for the given PF
518 * @pf: the PF to be reset
520 void i40e_pf_reset_stats(struct i40e_pf *pf)
524 memset(&pf->stats, 0, sizeof(pf->stats));
525 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
526 pf->stat_offsets_loaded = false;
528 for (i = 0; i < I40E_MAX_VEB; i++) {
530 memset(&pf->veb[i]->stats, 0,
531 sizeof(pf->veb[i]->stats));
532 memset(&pf->veb[i]->stats_offsets, 0,
533 sizeof(pf->veb[i]->stats_offsets));
534 pf->veb[i]->stat_offsets_loaded = false;
540 * i40e_stat_update48 - read and update a 48 bit stat from the chip
541 * @hw: ptr to the hardware info
542 * @hireg: the high 32 bit reg to read
543 * @loreg: the low 32 bit reg to read
544 * @offset_loaded: has the initial offset been loaded yet
545 * @offset: ptr to current offset value
546 * @stat: ptr to the stat
548 * Since the device stats are not reset at PFReset, they likely will not
549 * be zeroed when the driver starts. We'll save the first values read
550 * and use them as offsets to be subtracted from the raw values in order
551 * to report stats that count from zero. In the process, we also manage
552 * the potential roll-over.
554 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
555 bool offset_loaded, u64 *offset, u64 *stat)
559 if (hw->device_id == I40E_DEV_ID_QEMU) {
560 new_data = rd32(hw, loreg);
561 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
563 new_data = rd64(hw, loreg);
567 if (likely(new_data >= *offset))
568 *stat = new_data - *offset;
570 *stat = (new_data + BIT_ULL(48)) - *offset;
571 *stat &= 0xFFFFFFFFFFFFULL;
575 * i40e_stat_update32 - read and update a 32 bit stat from the chip
576 * @hw: ptr to the hardware info
577 * @reg: the hw reg to read
578 * @offset_loaded: has the initial offset been loaded yet
579 * @offset: ptr to current offset value
580 * @stat: ptr to the stat
582 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
583 bool offset_loaded, u64 *offset, u64 *stat)
587 new_data = rd32(hw, reg);
590 if (likely(new_data >= *offset))
591 *stat = (u32)(new_data - *offset);
593 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
597 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
598 * @vsi: the VSI to be updated
600 void i40e_update_eth_stats(struct i40e_vsi *vsi)
602 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
603 struct i40e_pf *pf = vsi->back;
604 struct i40e_hw *hw = &pf->hw;
605 struct i40e_eth_stats *oes;
606 struct i40e_eth_stats *es; /* device's eth stats */
608 es = &vsi->eth_stats;
609 oes = &vsi->eth_stats_offsets;
611 /* Gather up the stats that the hw collects */
612 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
613 vsi->stat_offsets_loaded,
614 &oes->tx_errors, &es->tx_errors);
615 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->rx_discards, &es->rx_discards);
618 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
621 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->tx_errors, &es->tx_errors);
625 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
626 I40E_GLV_GORCL(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->rx_bytes, &es->rx_bytes);
629 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
630 I40E_GLV_UPRCL(stat_idx),
631 vsi->stat_offsets_loaded,
632 &oes->rx_unicast, &es->rx_unicast);
633 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
634 I40E_GLV_MPRCL(stat_idx),
635 vsi->stat_offsets_loaded,
636 &oes->rx_multicast, &es->rx_multicast);
637 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
638 I40E_GLV_BPRCL(stat_idx),
639 vsi->stat_offsets_loaded,
640 &oes->rx_broadcast, &es->rx_broadcast);
642 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
643 I40E_GLV_GOTCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->tx_bytes, &es->tx_bytes);
646 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
647 I40E_GLV_UPTCL(stat_idx),
648 vsi->stat_offsets_loaded,
649 &oes->tx_unicast, &es->tx_unicast);
650 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
651 I40E_GLV_MPTCL(stat_idx),
652 vsi->stat_offsets_loaded,
653 &oes->tx_multicast, &es->tx_multicast);
654 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
655 I40E_GLV_BPTCL(stat_idx),
656 vsi->stat_offsets_loaded,
657 &oes->tx_broadcast, &es->tx_broadcast);
658 vsi->stat_offsets_loaded = true;
662 * i40e_update_veb_stats - Update Switch component statistics
663 * @veb: the VEB being updated
665 static void i40e_update_veb_stats(struct i40e_veb *veb)
667 struct i40e_pf *pf = veb->pf;
668 struct i40e_hw *hw = &pf->hw;
669 struct i40e_eth_stats *oes;
670 struct i40e_eth_stats *es; /* device's eth stats */
671 struct i40e_veb_tc_stats *veb_oes;
672 struct i40e_veb_tc_stats *veb_es;
675 idx = veb->stats_idx;
677 oes = &veb->stats_offsets;
678 veb_es = &veb->tc_stats;
679 veb_oes = &veb->tc_stats_offsets;
681 /* Gather up the stats that the hw collects */
682 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
683 veb->stat_offsets_loaded,
684 &oes->tx_discards, &es->tx_discards);
685 if (hw->revision_id > 0)
686 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
687 veb->stat_offsets_loaded,
688 &oes->rx_unknown_protocol,
689 &es->rx_unknown_protocol);
690 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
691 veb->stat_offsets_loaded,
692 &oes->rx_bytes, &es->rx_bytes);
693 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_unicast, &es->rx_unicast);
696 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_multicast, &es->rx_multicast);
699 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_broadcast, &es->rx_broadcast);
703 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
704 veb->stat_offsets_loaded,
705 &oes->tx_bytes, &es->tx_bytes);
706 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_unicast, &es->tx_unicast);
709 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_multicast, &es->tx_multicast);
712 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_broadcast, &es->tx_broadcast);
715 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
716 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
717 I40E_GLVEBTC_RPCL(i, idx),
718 veb->stat_offsets_loaded,
719 &veb_oes->tc_rx_packets[i],
720 &veb_es->tc_rx_packets[i]);
721 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
722 I40E_GLVEBTC_RBCL(i, idx),
723 veb->stat_offsets_loaded,
724 &veb_oes->tc_rx_bytes[i],
725 &veb_es->tc_rx_bytes[i]);
726 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
727 I40E_GLVEBTC_TPCL(i, idx),
728 veb->stat_offsets_loaded,
729 &veb_oes->tc_tx_packets[i],
730 &veb_es->tc_tx_packets[i]);
731 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
732 I40E_GLVEBTC_TBCL(i, idx),
733 veb->stat_offsets_loaded,
734 &veb_oes->tc_tx_bytes[i],
735 &veb_es->tc_tx_bytes[i]);
737 veb->stat_offsets_loaded = true;
742 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
743 * @vsi: the VSI that is capable of doing FCoE
745 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
747 struct i40e_pf *pf = vsi->back;
748 struct i40e_hw *hw = &pf->hw;
749 struct i40e_fcoe_stats *ofs;
750 struct i40e_fcoe_stats *fs; /* device's eth stats */
753 if (vsi->type != I40E_VSI_FCOE)
756 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
757 fs = &vsi->fcoe_stats;
758 ofs = &vsi->fcoe_stats_offsets;
760 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
761 vsi->fcoe_stat_offsets_loaded,
762 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
763 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
766 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
769 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
772 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
775 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
778 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_last_error, &fs->fcoe_last_error);
781 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
785 vsi->fcoe_stat_offsets_loaded = true;
790 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
791 * @pf: the corresponding PF
793 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
795 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
797 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
798 struct i40e_hw_port_stats *nsd = &pf->stats;
799 struct i40e_hw *hw = &pf->hw;
802 if ((hw->fc.current_mode != I40E_FC_FULL) &&
803 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
806 xoff = nsd->link_xoff_rx;
807 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
808 pf->stat_offsets_loaded,
809 &osd->link_xoff_rx, &nsd->link_xoff_rx);
811 /* No new LFC xoff rx */
812 if (!(nsd->link_xoff_rx - xoff))
818 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
819 * @pf: the corresponding PF
821 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
823 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
825 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
826 struct i40e_hw_port_stats *nsd = &pf->stats;
827 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
828 struct i40e_dcbx_config *dcb_cfg;
829 struct i40e_hw *hw = &pf->hw;
833 dcb_cfg = &hw->local_dcbx_config;
835 /* Collect Link XOFF stats when PFC is disabled */
836 if (!dcb_cfg->pfc.pfcenable) {
837 i40e_update_link_xoff_rx(pf);
841 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
842 u64 prio_xoff = nsd->priority_xoff_rx[i];
843 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
844 pf->stat_offsets_loaded,
845 &osd->priority_xoff_rx[i],
846 &nsd->priority_xoff_rx[i]);
848 /* No new PFC xoff rx */
849 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
851 /* Get the TC for given priority */
852 tc = dcb_cfg->etscfg.prioritytable[i];
858 * i40e_update_vsi_stats - Update the vsi statistics counters.
859 * @vsi: the VSI to be updated
861 * There are a few instances where we store the same stat in a
862 * couple of different structs. This is partly because we have
863 * the netdev stats that need to be filled out, which is slightly
864 * different from the "eth_stats" defined by the chip and used in
865 * VF communications. We sort it out here.
867 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
869 struct i40e_pf *pf = vsi->back;
870 struct rtnl_link_stats64 *ons;
871 struct rtnl_link_stats64 *ns; /* netdev stats */
872 struct i40e_eth_stats *oes;
873 struct i40e_eth_stats *es; /* device's eth stats */
874 u32 tx_restart, tx_busy;
883 if (test_bit(__I40E_DOWN, &vsi->state) ||
884 test_bit(__I40E_CONFIG_BUSY, &pf->state))
887 ns = i40e_get_vsi_stats_struct(vsi);
888 ons = &vsi->net_stats_offsets;
889 es = &vsi->eth_stats;
890 oes = &vsi->eth_stats_offsets;
892 /* Gather up the netdev and vsi stats that the driver collects
893 * on the fly during packet processing
897 tx_restart = tx_busy = 0;
901 for (q = 0; q < vsi->num_queue_pairs; q++) {
903 p = ACCESS_ONCE(vsi->tx_rings[q]);
906 start = u64_stats_fetch_begin_irq(&p->syncp);
907 packets = p->stats.packets;
908 bytes = p->stats.bytes;
909 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
912 tx_restart += p->tx_stats.restart_queue;
913 tx_busy += p->tx_stats.tx_busy;
915 /* Rx queue is part of the same block as Tx queue */
918 start = u64_stats_fetch_begin_irq(&p->syncp);
919 packets = p->stats.packets;
920 bytes = p->stats.bytes;
921 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
924 rx_buf += p->rx_stats.alloc_buff_failed;
925 rx_page += p->rx_stats.alloc_page_failed;
928 vsi->tx_restart = tx_restart;
929 vsi->tx_busy = tx_busy;
930 vsi->rx_page_failed = rx_page;
931 vsi->rx_buf_failed = rx_buf;
933 ns->rx_packets = rx_p;
935 ns->tx_packets = tx_p;
938 /* update netdev stats from eth stats */
939 i40e_update_eth_stats(vsi);
940 ons->tx_errors = oes->tx_errors;
941 ns->tx_errors = es->tx_errors;
942 ons->multicast = oes->rx_multicast;
943 ns->multicast = es->rx_multicast;
944 ons->rx_dropped = oes->rx_discards;
945 ns->rx_dropped = es->rx_discards;
946 ons->tx_dropped = oes->tx_discards;
947 ns->tx_dropped = es->tx_discards;
949 /* pull in a couple PF stats if this is the main vsi */
950 if (vsi == pf->vsi[pf->lan_vsi]) {
951 ns->rx_crc_errors = pf->stats.crc_errors;
952 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
953 ns->rx_length_errors = pf->stats.rx_length_errors;
958 * i40e_update_pf_stats - Update the PF statistics counters.
959 * @pf: the PF to be updated
961 static void i40e_update_pf_stats(struct i40e_pf *pf)
963 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
964 struct i40e_hw_port_stats *nsd = &pf->stats;
965 struct i40e_hw *hw = &pf->hw;
969 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
970 I40E_GLPRT_GORCL(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
973 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
974 I40E_GLPRT_GOTCL(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
977 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->eth.rx_discards,
980 &nsd->eth.rx_discards);
981 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
982 I40E_GLPRT_UPRCL(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->eth.rx_unicast,
985 &nsd->eth.rx_unicast);
986 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
987 I40E_GLPRT_MPRCL(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->eth.rx_multicast,
990 &nsd->eth.rx_multicast);
991 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
992 I40E_GLPRT_BPRCL(hw->port),
993 pf->stat_offsets_loaded,
994 &osd->eth.rx_broadcast,
995 &nsd->eth.rx_broadcast);
996 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
997 I40E_GLPRT_UPTCL(hw->port),
998 pf->stat_offsets_loaded,
999 &osd->eth.tx_unicast,
1000 &nsd->eth.tx_unicast);
1001 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1002 I40E_GLPRT_MPTCL(hw->port),
1003 pf->stat_offsets_loaded,
1004 &osd->eth.tx_multicast,
1005 &nsd->eth.tx_multicast);
1006 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1007 I40E_GLPRT_BPTCL(hw->port),
1008 pf->stat_offsets_loaded,
1009 &osd->eth.tx_broadcast,
1010 &nsd->eth.tx_broadcast);
1012 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1013 pf->stat_offsets_loaded,
1014 &osd->tx_dropped_link_down,
1015 &nsd->tx_dropped_link_down);
1017 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->crc_errors, &nsd->crc_errors);
1021 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->illegal_bytes, &nsd->illegal_bytes);
1025 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->mac_local_faults,
1028 &nsd->mac_local_faults);
1029 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->mac_remote_faults,
1032 &nsd->mac_remote_faults);
1034 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1035 pf->stat_offsets_loaded,
1036 &osd->rx_length_errors,
1037 &nsd->rx_length_errors);
1039 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->link_xon_rx, &nsd->link_xon_rx);
1042 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->link_xon_tx, &nsd->link_xon_tx);
1045 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1046 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1050 for (i = 0; i < 8; i++) {
1051 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1052 pf->stat_offsets_loaded,
1053 &osd->priority_xon_rx[i],
1054 &nsd->priority_xon_rx[i]);
1055 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1056 pf->stat_offsets_loaded,
1057 &osd->priority_xon_tx[i],
1058 &nsd->priority_xon_tx[i]);
1059 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1060 pf->stat_offsets_loaded,
1061 &osd->priority_xoff_tx[i],
1062 &nsd->priority_xoff_tx[i]);
1063 i40e_stat_update32(hw,
1064 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1065 pf->stat_offsets_loaded,
1066 &osd->priority_xon_2_xoff[i],
1067 &nsd->priority_xon_2_xoff[i]);
1070 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1071 I40E_GLPRT_PRC64L(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->rx_size_64, &nsd->rx_size_64);
1074 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1075 I40E_GLPRT_PRC127L(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->rx_size_127, &nsd->rx_size_127);
1078 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1079 I40E_GLPRT_PRC255L(hw->port),
1080 pf->stat_offsets_loaded,
1081 &osd->rx_size_255, &nsd->rx_size_255);
1082 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1083 I40E_GLPRT_PRC511L(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->rx_size_511, &nsd->rx_size_511);
1086 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1087 I40E_GLPRT_PRC1023L(hw->port),
1088 pf->stat_offsets_loaded,
1089 &osd->rx_size_1023, &nsd->rx_size_1023);
1090 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1091 I40E_GLPRT_PRC1522L(hw->port),
1092 pf->stat_offsets_loaded,
1093 &osd->rx_size_1522, &nsd->rx_size_1522);
1094 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1095 I40E_GLPRT_PRC9522L(hw->port),
1096 pf->stat_offsets_loaded,
1097 &osd->rx_size_big, &nsd->rx_size_big);
1099 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1100 I40E_GLPRT_PTC64L(hw->port),
1101 pf->stat_offsets_loaded,
1102 &osd->tx_size_64, &nsd->tx_size_64);
1103 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1104 I40E_GLPRT_PTC127L(hw->port),
1105 pf->stat_offsets_loaded,
1106 &osd->tx_size_127, &nsd->tx_size_127);
1107 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1108 I40E_GLPRT_PTC255L(hw->port),
1109 pf->stat_offsets_loaded,
1110 &osd->tx_size_255, &nsd->tx_size_255);
1111 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1112 I40E_GLPRT_PTC511L(hw->port),
1113 pf->stat_offsets_loaded,
1114 &osd->tx_size_511, &nsd->tx_size_511);
1115 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1116 I40E_GLPRT_PTC1023L(hw->port),
1117 pf->stat_offsets_loaded,
1118 &osd->tx_size_1023, &nsd->tx_size_1023);
1119 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1120 I40E_GLPRT_PTC1522L(hw->port),
1121 pf->stat_offsets_loaded,
1122 &osd->tx_size_1522, &nsd->tx_size_1522);
1123 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1124 I40E_GLPRT_PTC9522L(hw->port),
1125 pf->stat_offsets_loaded,
1126 &osd->tx_size_big, &nsd->tx_size_big);
1128 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1129 pf->stat_offsets_loaded,
1130 &osd->rx_undersize, &nsd->rx_undersize);
1131 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1132 pf->stat_offsets_loaded,
1133 &osd->rx_fragments, &nsd->rx_fragments);
1134 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1135 pf->stat_offsets_loaded,
1136 &osd->rx_oversize, &nsd->rx_oversize);
1137 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->rx_jabber, &nsd->rx_jabber);
1142 i40e_stat_update32(hw,
1143 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1144 pf->stat_offsets_loaded,
1145 &osd->fd_atr_match, &nsd->fd_atr_match);
1146 i40e_stat_update32(hw,
1147 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1148 pf->stat_offsets_loaded,
1149 &osd->fd_sb_match, &nsd->fd_sb_match);
1150 i40e_stat_update32(hw,
1151 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1152 pf->stat_offsets_loaded,
1153 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1155 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1156 nsd->tx_lpi_status =
1157 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1158 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1159 nsd->rx_lpi_status =
1160 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1161 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1162 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1163 pf->stat_offsets_loaded,
1164 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1165 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1166 pf->stat_offsets_loaded,
1167 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1169 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1170 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1171 nsd->fd_sb_status = true;
1173 nsd->fd_sb_status = false;
1175 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1176 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1177 nsd->fd_atr_status = true;
1179 nsd->fd_atr_status = false;
1181 pf->stat_offsets_loaded = true;
1185 * i40e_update_stats - Update the various statistics counters.
1186 * @vsi: the VSI to be updated
1188 * Update the various stats for this VSI and its related entities.
1190 void i40e_update_stats(struct i40e_vsi *vsi)
1192 struct i40e_pf *pf = vsi->back;
1194 if (vsi == pf->vsi[pf->lan_vsi])
1195 i40e_update_pf_stats(pf);
1197 i40e_update_vsi_stats(vsi);
1199 i40e_update_fcoe_stats(vsi);
1204 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1205 * @vsi: the VSI to be searched
1206 * @macaddr: the MAC address
1208 * @is_vf: make sure its a VF filter, else doesn't matter
1209 * @is_netdev: make sure its a netdev filter, else doesn't matter
1211 * Returns ptr to the filter object or NULL
1213 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1214 u8 *macaddr, s16 vlan,
1215 bool is_vf, bool is_netdev)
1217 struct i40e_mac_filter *f;
1219 if (!vsi || !macaddr)
1222 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1223 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1224 (vlan == f->vlan) &&
1225 (!is_vf || f->is_vf) &&
1226 (!is_netdev || f->is_netdev))
1233 * i40e_find_mac - Find a mac addr in the macvlan filters list
1234 * @vsi: the VSI to be searched
1235 * @macaddr: the MAC address we are searching for
1236 * @is_vf: make sure its a VF filter, else doesn't matter
1237 * @is_netdev: make sure its a netdev filter, else doesn't matter
1239 * Returns the first filter with the provided MAC address or NULL if
1240 * MAC address was not found
1242 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1243 bool is_vf, bool is_netdev)
1245 struct i40e_mac_filter *f;
1247 if (!vsi || !macaddr)
1250 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1251 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1252 (!is_vf || f->is_vf) &&
1253 (!is_netdev || f->is_netdev))
1260 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1261 * @vsi: the VSI to be searched
1263 * Returns true if VSI is in vlan mode or false otherwise
1265 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1267 struct i40e_mac_filter *f;
1269 /* Only -1 for all the filters denotes not in vlan mode
1270 * so we have to go through all the list in order to make sure
1272 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1273 if (f->vlan >= 0 || vsi->info.pvid)
1281 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1282 * @vsi: the VSI to be searched
1283 * @macaddr: the mac address to be filtered
1284 * @is_vf: true if it is a VF
1285 * @is_netdev: true if it is a netdev
1287 * Goes through all the macvlan filters and adds a
1288 * macvlan filter for each unique vlan that already exists
1290 * Returns first filter found on success, else NULL
1292 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1293 bool is_vf, bool is_netdev)
1295 struct i40e_mac_filter *f;
1297 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1299 f->vlan = le16_to_cpu(vsi->info.pvid);
1300 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1301 is_vf, is_netdev)) {
1302 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1308 return list_first_entry_or_null(&vsi->mac_filter_list,
1309 struct i40e_mac_filter, list);
1313 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1314 * @vsi: the PF Main VSI - inappropriate for any other VSI
1315 * @macaddr: the MAC address
1317 * Some older firmware configurations set up a default promiscuous VLAN
1318 * filter that needs to be removed.
1320 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1322 struct i40e_aqc_remove_macvlan_element_data element;
1323 struct i40e_pf *pf = vsi->back;
1326 /* Only appropriate for the PF main VSI */
1327 if (vsi->type != I40E_VSI_MAIN)
1330 memset(&element, 0, sizeof(element));
1331 ether_addr_copy(element.mac_addr, macaddr);
1332 element.vlan_tag = 0;
1333 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1334 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1335 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1343 * i40e_add_filter - Add a mac/vlan filter to the VSI
1344 * @vsi: the VSI to be searched
1345 * @macaddr: the MAC address
1347 * @is_vf: make sure its a VF filter, else doesn't matter
1348 * @is_netdev: make sure its a netdev filter, else doesn't matter
1350 * Returns ptr to the filter object or NULL when no memory available.
1352 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1353 u8 *macaddr, s16 vlan,
1354 bool is_vf, bool is_netdev)
1356 struct i40e_mac_filter *f;
1358 if (!vsi || !macaddr)
1361 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1363 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1365 goto add_filter_out;
1367 ether_addr_copy(f->macaddr, macaddr);
1371 INIT_LIST_HEAD(&f->list);
1372 list_add(&f->list, &vsi->mac_filter_list);
1375 /* increment counter and add a new flag if needed */
1381 } else if (is_netdev) {
1382 if (!f->is_netdev) {
1383 f->is_netdev = true;
1390 /* changed tells sync_filters_subtask to
1391 * push the filter down to the firmware
1394 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1395 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1403 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1404 * @vsi: the VSI to be searched
1405 * @macaddr: the MAC address
1407 * @is_vf: make sure it's a VF filter, else doesn't matter
1408 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1410 void i40e_del_filter(struct i40e_vsi *vsi,
1411 u8 *macaddr, s16 vlan,
1412 bool is_vf, bool is_netdev)
1414 struct i40e_mac_filter *f;
1416 if (!vsi || !macaddr)
1419 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1420 if (!f || f->counter == 0)
1428 } else if (is_netdev) {
1430 f->is_netdev = false;
1434 /* make sure we don't remove a filter in use by VF or netdev */
1436 min_f += (f->is_vf ? 1 : 0);
1437 min_f += (f->is_netdev ? 1 : 0);
1439 if (f->counter > min_f)
1443 /* counter == 0 tells sync_filters_subtask to
1444 * remove the filter from the firmware's list
1446 if (f->counter == 0) {
1448 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1449 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1454 * i40e_set_mac - NDO callback to set mac address
1455 * @netdev: network interface device structure
1456 * @p: pointer to an address structure
1458 * Returns 0 on success, negative on failure
1461 int i40e_set_mac(struct net_device *netdev, void *p)
1463 static int i40e_set_mac(struct net_device *netdev, void *p)
1466 struct i40e_netdev_priv *np = netdev_priv(netdev);
1467 struct i40e_vsi *vsi = np->vsi;
1468 struct i40e_pf *pf = vsi->back;
1469 struct i40e_hw *hw = &pf->hw;
1470 struct sockaddr *addr = p;
1471 struct i40e_mac_filter *f;
1473 if (!is_valid_ether_addr(addr->sa_data))
1474 return -EADDRNOTAVAIL;
1476 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1477 netdev_info(netdev, "already using mac address %pM\n",
1482 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1483 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1484 return -EADDRNOTAVAIL;
1486 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1487 netdev_info(netdev, "returning to hw mac address %pM\n",
1490 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1492 if (vsi->type == I40E_VSI_MAIN) {
1494 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1495 I40E_AQC_WRITE_TYPE_LAA_WOL,
1496 addr->sa_data, NULL);
1499 "Addr change for Main VSI failed: %d\n",
1501 return -EADDRNOTAVAIL;
1505 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1506 struct i40e_aqc_remove_macvlan_element_data element;
1508 memset(&element, 0, sizeof(element));
1509 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1510 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1511 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1513 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1517 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1518 struct i40e_aqc_add_macvlan_element_data element;
1520 memset(&element, 0, sizeof(element));
1521 ether_addr_copy(element.mac_addr, hw->mac.addr);
1522 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1523 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1525 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1531 i40e_sync_vsi_filters(vsi, false);
1532 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1538 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1539 * @vsi: the VSI being setup
1540 * @ctxt: VSI context structure
1541 * @enabled_tc: Enabled TCs bitmap
1542 * @is_add: True if called before Add VSI
1544 * Setup VSI queue mapping for enabled traffic classes.
1547 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1548 struct i40e_vsi_context *ctxt,
1552 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1553 struct i40e_vsi_context *ctxt,
1558 struct i40e_pf *pf = vsi->back;
1568 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1571 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1572 /* Find numtc from enabled TC bitmap */
1573 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1574 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1578 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1582 /* At least TC0 is enabled in case of non-DCB case */
1586 vsi->tc_config.numtc = numtc;
1587 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1588 /* Number of queues per enabled TC */
1589 /* In MFP case we can have a much lower count of MSIx
1590 * vectors available and so we need to lower the used
1593 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1594 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1596 qcount = vsi->alloc_queue_pairs;
1597 num_tc_qps = qcount / numtc;
1598 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1600 /* Setup queue offset/count for all TCs for given VSI */
1601 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1602 /* See if the given TC is enabled for the given VSI */
1603 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1607 switch (vsi->type) {
1609 qcount = min_t(int, pf->rss_size, num_tc_qps);
1613 qcount = num_tc_qps;
1617 case I40E_VSI_SRIOV:
1618 case I40E_VSI_VMDQ2:
1620 qcount = num_tc_qps;
1624 vsi->tc_config.tc_info[i].qoffset = offset;
1625 vsi->tc_config.tc_info[i].qcount = qcount;
1627 /* find the next higher power-of-2 of num queue pairs */
1630 while (num_qps && (BIT_ULL(pow) < qcount)) {
1635 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1637 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1638 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1642 /* TC is not enabled so set the offset to
1643 * default queue and allocate one queue
1646 vsi->tc_config.tc_info[i].qoffset = 0;
1647 vsi->tc_config.tc_info[i].qcount = 1;
1648 vsi->tc_config.tc_info[i].netdev_tc = 0;
1652 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1655 /* Set actual Tx/Rx queue pairs */
1656 vsi->num_queue_pairs = offset;
1657 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1658 if (vsi->req_queue_pairs > 0)
1659 vsi->num_queue_pairs = vsi->req_queue_pairs;
1660 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1661 vsi->num_queue_pairs = pf->num_lan_msix;
1664 /* Scheduler section valid can only be set for ADD VSI */
1666 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1668 ctxt->info.up_enable_bits = enabled_tc;
1670 if (vsi->type == I40E_VSI_SRIOV) {
1671 ctxt->info.mapping_flags |=
1672 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1673 for (i = 0; i < vsi->num_queue_pairs; i++)
1674 ctxt->info.queue_mapping[i] =
1675 cpu_to_le16(vsi->base_queue + i);
1677 ctxt->info.mapping_flags |=
1678 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1679 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1681 ctxt->info.valid_sections |= cpu_to_le16(sections);
1685 * i40e_set_rx_mode - NDO callback to set the netdev filters
1686 * @netdev: network interface device structure
1689 void i40e_set_rx_mode(struct net_device *netdev)
1691 static void i40e_set_rx_mode(struct net_device *netdev)
1694 struct i40e_netdev_priv *np = netdev_priv(netdev);
1695 struct i40e_mac_filter *f, *ftmp;
1696 struct i40e_vsi *vsi = np->vsi;
1697 struct netdev_hw_addr *uca;
1698 struct netdev_hw_addr *mca;
1699 struct netdev_hw_addr *ha;
1701 /* add addr if not already in the filter list */
1702 netdev_for_each_uc_addr(uca, netdev) {
1703 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1704 if (i40e_is_vsi_in_vlan(vsi))
1705 i40e_put_mac_in_vlan(vsi, uca->addr,
1708 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1713 netdev_for_each_mc_addr(mca, netdev) {
1714 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1715 if (i40e_is_vsi_in_vlan(vsi))
1716 i40e_put_mac_in_vlan(vsi, mca->addr,
1719 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1724 /* remove filter if not in netdev list */
1725 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1731 if (is_multicast_ether_addr(f->macaddr)) {
1732 netdev_for_each_mc_addr(mca, netdev) {
1733 if (ether_addr_equal(mca->addr, f->macaddr)) {
1739 netdev_for_each_uc_addr(uca, netdev) {
1740 if (ether_addr_equal(uca->addr, f->macaddr)) {
1746 for_each_dev_addr(netdev, ha) {
1747 if (ether_addr_equal(ha->addr, f->macaddr)) {
1755 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1758 /* check for other flag changes */
1759 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1760 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1761 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1766 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1767 * @vsi: ptr to the VSI
1768 * @grab_rtnl: whether RTNL needs to be grabbed
1770 * Push any outstanding VSI filter changes through the AdminQ.
1772 * Returns 0 or error value
1774 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1776 struct i40e_mac_filter *f, *ftmp;
1777 bool promisc_forced_on = false;
1778 bool add_happened = false;
1779 int filter_list_len = 0;
1780 u32 changed_flags = 0;
1781 i40e_status ret = 0;
1788 /* empty array typed pointers, kcalloc later */
1789 struct i40e_aqc_add_macvlan_element_data *add_list;
1790 struct i40e_aqc_remove_macvlan_element_data *del_list;
1792 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1793 usleep_range(1000, 2000);
1797 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1798 vsi->current_netdev_flags = vsi->netdev->flags;
1801 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1802 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1804 filter_list_len = pf->hw.aq.asq_buf_size /
1805 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1806 del_list = kcalloc(filter_list_len,
1807 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1812 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1816 if (f->counter != 0)
1821 /* add to delete list */
1822 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1823 del_list[num_del].vlan_tag =
1824 cpu_to_le16((u16)(f->vlan ==
1825 I40E_VLAN_ANY ? 0 : f->vlan));
1827 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1828 del_list[num_del].flags = cmd_flags;
1831 /* unlink from filter list */
1835 /* flush a full buffer */
1836 if (num_del == filter_list_len) {
1837 ret = i40e_aq_remove_macvlan(&pf->hw,
1838 vsi->seid, del_list, num_del,
1840 aq_err = pf->hw.aq.asq_last_status;
1842 memset(del_list, 0, sizeof(*del_list));
1844 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1845 dev_info(&pf->pdev->dev,
1846 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1847 i40e_stat_str(&pf->hw, ret),
1848 i40e_aq_str(&pf->hw, aq_err));
1852 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1853 del_list, num_del, NULL);
1854 aq_err = pf->hw.aq.asq_last_status;
1857 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1858 dev_info(&pf->pdev->dev,
1859 "ignoring delete macvlan error, err %s aq_err %s\n",
1860 i40e_stat_str(&pf->hw, ret),
1861 i40e_aq_str(&pf->hw, aq_err));
1867 /* do all the adds now */
1868 filter_list_len = pf->hw.aq.asq_buf_size /
1869 sizeof(struct i40e_aqc_add_macvlan_element_data),
1870 add_list = kcalloc(filter_list_len,
1871 sizeof(struct i40e_aqc_add_macvlan_element_data),
1876 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1880 if (f->counter == 0)
1883 add_happened = true;
1886 /* add to add array */
1887 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1888 add_list[num_add].vlan_tag =
1890 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1891 add_list[num_add].queue_number = 0;
1893 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1894 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1897 /* flush a full buffer */
1898 if (num_add == filter_list_len) {
1899 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1902 aq_err = pf->hw.aq.asq_last_status;
1907 memset(add_list, 0, sizeof(*add_list));
1911 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1912 add_list, num_add, NULL);
1913 aq_err = pf->hw.aq.asq_last_status;
1919 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1920 dev_info(&pf->pdev->dev,
1921 "add filter failed, err %s aq_err %s\n",
1922 i40e_stat_str(&pf->hw, ret),
1923 i40e_aq_str(&pf->hw, aq_err));
1924 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1925 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1927 promisc_forced_on = true;
1928 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1930 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1935 /* check for changes in promiscuous modes */
1936 if (changed_flags & IFF_ALLMULTI) {
1937 bool cur_multipromisc;
1938 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1939 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1944 dev_info(&pf->pdev->dev,
1945 "set multi promisc failed, err %s aq_err %s\n",
1946 i40e_stat_str(&pf->hw, ret),
1947 i40e_aq_str(&pf->hw,
1948 pf->hw.aq.asq_last_status));
1950 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1952 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1953 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1955 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1956 /* set defport ON for Main VSI instead of true promisc
1957 * this way we will get all unicast/multicast and VLAN
1958 * promisc behavior but will not get VF or VMDq traffic
1959 * replicated on the Main VSI.
1961 if (pf->cur_promisc != cur_promisc) {
1962 pf->cur_promisc = cur_promisc;
1964 i40e_do_reset_safe(pf,
1965 BIT(__I40E_PF_RESET_REQUESTED));
1968 BIT(__I40E_PF_RESET_REQUESTED));
1971 ret = i40e_aq_set_vsi_unicast_promiscuous(
1976 dev_info(&pf->pdev->dev,
1977 "set unicast promisc failed, err %d, aq_err %d\n",
1978 ret, pf->hw.aq.asq_last_status);
1979 ret = i40e_aq_set_vsi_multicast_promiscuous(
1984 dev_info(&pf->pdev->dev,
1985 "set multicast promisc failed, err %d, aq_err %d\n",
1986 ret, pf->hw.aq.asq_last_status);
1988 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1992 dev_info(&pf->pdev->dev,
1993 "set brdcast promisc failed, err %s, aq_err %s\n",
1994 i40e_stat_str(&pf->hw, ret),
1995 i40e_aq_str(&pf->hw,
1996 pf->hw.aq.asq_last_status));
1999 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2004 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2005 * @pf: board private structure
2007 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2011 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2013 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2015 for (v = 0; v < pf->num_alloc_vsi; v++) {
2017 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2018 i40e_sync_vsi_filters(pf->vsi[v], true);
2023 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2024 * @netdev: network interface device structure
2025 * @new_mtu: new value for maximum frame size
2027 * Returns 0 on success, negative on failure
2029 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2031 struct i40e_netdev_priv *np = netdev_priv(netdev);
2032 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2033 struct i40e_vsi *vsi = np->vsi;
2035 /* MTU < 68 is an error and causes problems on some kernels */
2036 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2039 netdev_info(netdev, "changing MTU from %d to %d\n",
2040 netdev->mtu, new_mtu);
2041 netdev->mtu = new_mtu;
2042 if (netif_running(netdev))
2043 i40e_vsi_reinit_locked(vsi);
2049 * i40e_ioctl - Access the hwtstamp interface
2050 * @netdev: network interface device structure
2051 * @ifr: interface request data
2052 * @cmd: ioctl command
2054 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2056 struct i40e_netdev_priv *np = netdev_priv(netdev);
2057 struct i40e_pf *pf = np->vsi->back;
2061 return i40e_ptp_get_ts_config(pf, ifr);
2063 return i40e_ptp_set_ts_config(pf, ifr);
2070 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2071 * @vsi: the vsi being adjusted
2073 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2075 struct i40e_vsi_context ctxt;
2078 if ((vsi->info.valid_sections &
2079 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2080 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2081 return; /* already enabled */
2083 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2084 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2085 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2087 ctxt.seid = vsi->seid;
2088 ctxt.info = vsi->info;
2089 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2091 dev_info(&vsi->back->pdev->dev,
2092 "update vlan stripping failed, err %s aq_err %s\n",
2093 i40e_stat_str(&vsi->back->hw, ret),
2094 i40e_aq_str(&vsi->back->hw,
2095 vsi->back->hw.aq.asq_last_status));
2100 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2101 * @vsi: the vsi being adjusted
2103 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2105 struct i40e_vsi_context ctxt;
2108 if ((vsi->info.valid_sections &
2109 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2110 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2111 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2112 return; /* already disabled */
2114 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2115 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2116 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2118 ctxt.seid = vsi->seid;
2119 ctxt.info = vsi->info;
2120 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2122 dev_info(&vsi->back->pdev->dev,
2123 "update vlan stripping failed, err %s aq_err %s\n",
2124 i40e_stat_str(&vsi->back->hw, ret),
2125 i40e_aq_str(&vsi->back->hw,
2126 vsi->back->hw.aq.asq_last_status));
2131 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2132 * @netdev: network interface to be adjusted
2133 * @features: netdev features to test if VLAN offload is enabled or not
2135 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2137 struct i40e_netdev_priv *np = netdev_priv(netdev);
2138 struct i40e_vsi *vsi = np->vsi;
2140 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2141 i40e_vlan_stripping_enable(vsi);
2143 i40e_vlan_stripping_disable(vsi);
2147 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2148 * @vsi: the vsi being configured
2149 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2151 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2153 struct i40e_mac_filter *f, *add_f;
2154 bool is_netdev, is_vf;
2156 is_vf = (vsi->type == I40E_VSI_SRIOV);
2157 is_netdev = !!(vsi->netdev);
2160 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2163 dev_info(&vsi->back->pdev->dev,
2164 "Could not add vlan filter %d for %pM\n",
2165 vid, vsi->netdev->dev_addr);
2170 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2171 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2173 dev_info(&vsi->back->pdev->dev,
2174 "Could not add vlan filter %d for %pM\n",
2180 /* Now if we add a vlan tag, make sure to check if it is the first
2181 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2182 * with 0, so we now accept untagged and specified tagged traffic
2183 * (and not any taged and untagged)
2186 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2188 is_vf, is_netdev)) {
2189 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2190 I40E_VLAN_ANY, is_vf, is_netdev);
2191 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2194 dev_info(&vsi->back->pdev->dev,
2195 "Could not add filter 0 for %pM\n",
2196 vsi->netdev->dev_addr);
2202 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2203 if (vid > 0 && !vsi->info.pvid) {
2204 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2205 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2206 is_vf, is_netdev)) {
2207 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2209 add_f = i40e_add_filter(vsi, f->macaddr,
2210 0, is_vf, is_netdev);
2212 dev_info(&vsi->back->pdev->dev,
2213 "Could not add filter 0 for %pM\n",
2221 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2222 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2225 return i40e_sync_vsi_filters(vsi, false);
2229 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2230 * @vsi: the vsi being configured
2231 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2233 * Return: 0 on success or negative otherwise
2235 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2237 struct net_device *netdev = vsi->netdev;
2238 struct i40e_mac_filter *f, *add_f;
2239 bool is_vf, is_netdev;
2240 int filter_count = 0;
2242 is_vf = (vsi->type == I40E_VSI_SRIOV);
2243 is_netdev = !!(netdev);
2246 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2248 list_for_each_entry(f, &vsi->mac_filter_list, list)
2249 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2251 /* go through all the filters for this VSI and if there is only
2252 * vid == 0 it means there are no other filters, so vid 0 must
2253 * be replaced with -1. This signifies that we should from now
2254 * on accept any traffic (with any tag present, or untagged)
2256 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2259 ether_addr_equal(netdev->dev_addr, f->macaddr))
2267 if (!filter_count && is_netdev) {
2268 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2269 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2272 dev_info(&vsi->back->pdev->dev,
2273 "Could not add filter %d for %pM\n",
2274 I40E_VLAN_ANY, netdev->dev_addr);
2279 if (!filter_count) {
2280 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2281 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2282 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2285 dev_info(&vsi->back->pdev->dev,
2286 "Could not add filter %d for %pM\n",
2287 I40E_VLAN_ANY, f->macaddr);
2293 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2294 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2297 return i40e_sync_vsi_filters(vsi, false);
2301 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2302 * @netdev: network interface to be adjusted
2303 * @vid: vlan id to be added
2305 * net_device_ops implementation for adding vlan ids
2308 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2309 __always_unused __be16 proto, u16 vid)
2311 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2312 __always_unused __be16 proto, u16 vid)
2315 struct i40e_netdev_priv *np = netdev_priv(netdev);
2316 struct i40e_vsi *vsi = np->vsi;
2322 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2324 /* If the network stack called us with vid = 0 then
2325 * it is asking to receive priority tagged packets with
2326 * vlan id 0. Our HW receives them by default when configured
2327 * to receive untagged packets so there is no need to add an
2328 * extra filter for vlan 0 tagged packets.
2331 ret = i40e_vsi_add_vlan(vsi, vid);
2333 if (!ret && (vid < VLAN_N_VID))
2334 set_bit(vid, vsi->active_vlans);
2340 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2341 * @netdev: network interface to be adjusted
2342 * @vid: vlan id to be removed
2344 * net_device_ops implementation for removing vlan ids
2347 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2348 __always_unused __be16 proto, u16 vid)
2350 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2351 __always_unused __be16 proto, u16 vid)
2354 struct i40e_netdev_priv *np = netdev_priv(netdev);
2355 struct i40e_vsi *vsi = np->vsi;
2357 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2359 /* return code is ignored as there is nothing a user
2360 * can do about failure to remove and a log message was
2361 * already printed from the other function
2363 i40e_vsi_kill_vlan(vsi, vid);
2365 clear_bit(vid, vsi->active_vlans);
2371 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2372 * @vsi: the vsi being brought back up
2374 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2381 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2383 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2384 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2389 * i40e_vsi_add_pvid - Add pvid for the VSI
2390 * @vsi: the vsi being adjusted
2391 * @vid: the vlan id to set as a PVID
2393 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2395 struct i40e_vsi_context ctxt;
2398 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2399 vsi->info.pvid = cpu_to_le16(vid);
2400 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2401 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2402 I40E_AQ_VSI_PVLAN_EMOD_STR;
2404 ctxt.seid = vsi->seid;
2405 ctxt.info = vsi->info;
2406 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2408 dev_info(&vsi->back->pdev->dev,
2409 "add pvid failed, err %s aq_err %s\n",
2410 i40e_stat_str(&vsi->back->hw, ret),
2411 i40e_aq_str(&vsi->back->hw,
2412 vsi->back->hw.aq.asq_last_status));
2420 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2421 * @vsi: the vsi being adjusted
2423 * Just use the vlan_rx_register() service to put it back to normal
2425 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2427 i40e_vlan_stripping_disable(vsi);
2433 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2434 * @vsi: ptr to the VSI
2436 * If this function returns with an error, then it's possible one or
2437 * more of the rings is populated (while the rest are not). It is the
2438 * callers duty to clean those orphaned rings.
2440 * Return 0 on success, negative on failure
2442 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2446 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2447 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2453 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2454 * @vsi: ptr to the VSI
2456 * Free VSI's transmit software resources
2458 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2465 for (i = 0; i < vsi->num_queue_pairs; i++)
2466 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2467 i40e_free_tx_resources(vsi->tx_rings[i]);
2471 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2472 * @vsi: ptr to the VSI
2474 * If this function returns with an error, then it's possible one or
2475 * more of the rings is populated (while the rest are not). It is the
2476 * callers duty to clean those orphaned rings.
2478 * Return 0 on success, negative on failure
2480 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2484 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2485 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2487 i40e_fcoe_setup_ddp_resources(vsi);
2493 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2494 * @vsi: ptr to the VSI
2496 * Free all receive software resources
2498 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2505 for (i = 0; i < vsi->num_queue_pairs; i++)
2506 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2507 i40e_free_rx_resources(vsi->rx_rings[i]);
2509 i40e_fcoe_free_ddp_resources(vsi);
2514 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2515 * @ring: The Tx ring to configure
2517 * This enables/disables XPS for a given Tx descriptor ring
2518 * based on the TCs enabled for the VSI that ring belongs to.
2520 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2522 struct i40e_vsi *vsi = ring->vsi;
2525 if (!ring->q_vector || !ring->netdev)
2528 /* Single TC mode enable XPS */
2529 if (vsi->tc_config.numtc <= 1) {
2530 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2531 netif_set_xps_queue(ring->netdev,
2532 &ring->q_vector->affinity_mask,
2534 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2535 /* Disable XPS to allow selection based on TC */
2536 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2537 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2538 free_cpumask_var(mask);
2543 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2544 * @ring: The Tx ring to configure
2546 * Configure the Tx descriptor ring in the HMC context.
2548 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2550 struct i40e_vsi *vsi = ring->vsi;
2551 u16 pf_q = vsi->base_queue + ring->queue_index;
2552 struct i40e_hw *hw = &vsi->back->hw;
2553 struct i40e_hmc_obj_txq tx_ctx;
2554 i40e_status err = 0;
2557 /* some ATR related tx ring init */
2558 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2559 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2560 ring->atr_count = 0;
2562 ring->atr_sample_rate = 0;
2566 i40e_config_xps_tx_ring(ring);
2568 /* clear the context structure first */
2569 memset(&tx_ctx, 0, sizeof(tx_ctx));
2571 tx_ctx.new_context = 1;
2572 tx_ctx.base = (ring->dma / 128);
2573 tx_ctx.qlen = ring->count;
2574 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2575 I40E_FLAG_FD_ATR_ENABLED));
2577 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2579 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2580 /* FDIR VSI tx ring can still use RS bit and writebacks */
2581 if (vsi->type != I40E_VSI_FDIR)
2582 tx_ctx.head_wb_ena = 1;
2583 tx_ctx.head_wb_addr = ring->dma +
2584 (ring->count * sizeof(struct i40e_tx_desc));
2586 /* As part of VSI creation/update, FW allocates certain
2587 * Tx arbitration queue sets for each TC enabled for
2588 * the VSI. The FW returns the handles to these queue
2589 * sets as part of the response buffer to Add VSI,
2590 * Update VSI, etc. AQ commands. It is expected that
2591 * these queue set handles be associated with the Tx
2592 * queues by the driver as part of the TX queue context
2593 * initialization. This has to be done regardless of
2594 * DCB as by default everything is mapped to TC0.
2596 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2597 tx_ctx.rdylist_act = 0;
2599 /* clear the context in the HMC */
2600 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2602 dev_info(&vsi->back->pdev->dev,
2603 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2604 ring->queue_index, pf_q, err);
2608 /* set the context in the HMC */
2609 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2611 dev_info(&vsi->back->pdev->dev,
2612 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2613 ring->queue_index, pf_q, err);
2617 /* Now associate this queue with this PCI function */
2618 if (vsi->type == I40E_VSI_VMDQ2) {
2619 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2620 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2621 I40E_QTX_CTL_VFVM_INDX_MASK;
2623 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2626 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2627 I40E_QTX_CTL_PF_INDX_MASK);
2628 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2631 /* cache tail off for easier writes later */
2632 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2638 * i40e_configure_rx_ring - Configure a receive ring context
2639 * @ring: The Rx ring to configure
2641 * Configure the Rx descriptor ring in the HMC context.
2643 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2645 struct i40e_vsi *vsi = ring->vsi;
2646 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2647 u16 pf_q = vsi->base_queue + ring->queue_index;
2648 struct i40e_hw *hw = &vsi->back->hw;
2649 struct i40e_hmc_obj_rxq rx_ctx;
2650 i40e_status err = 0;
2654 /* clear the context structure first */
2655 memset(&rx_ctx, 0, sizeof(rx_ctx));
2657 ring->rx_buf_len = vsi->rx_buf_len;
2658 ring->rx_hdr_len = vsi->rx_hdr_len;
2660 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2661 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2663 rx_ctx.base = (ring->dma / 128);
2664 rx_ctx.qlen = ring->count;
2666 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2667 set_ring_16byte_desc_enabled(ring);
2673 rx_ctx.dtype = vsi->dtype;
2675 set_ring_ps_enabled(ring);
2676 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2678 I40E_RX_SPLIT_TCP_UDP |
2681 rx_ctx.hsplit_0 = 0;
2684 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2685 (chain_len * ring->rx_buf_len));
2686 if (hw->revision_id == 0)
2687 rx_ctx.lrxqthresh = 0;
2689 rx_ctx.lrxqthresh = 2;
2690 rx_ctx.crcstrip = 1;
2694 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2696 /* set the prefena field to 1 because the manual says to */
2699 /* clear the context in the HMC */
2700 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2702 dev_info(&vsi->back->pdev->dev,
2703 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2704 ring->queue_index, pf_q, err);
2708 /* set the context in the HMC */
2709 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2711 dev_info(&vsi->back->pdev->dev,
2712 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2713 ring->queue_index, pf_q, err);
2717 /* cache tail for quicker writes, and clear the reg before use */
2718 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2719 writel(0, ring->tail);
2721 if (ring_is_ps_enabled(ring)) {
2722 i40e_alloc_rx_headers(ring);
2723 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2725 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2732 * i40e_vsi_configure_tx - Configure the VSI for Tx
2733 * @vsi: VSI structure describing this set of rings and resources
2735 * Configure the Tx VSI for operation.
2737 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2742 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2743 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2749 * i40e_vsi_configure_rx - Configure the VSI for Rx
2750 * @vsi: the VSI being configured
2752 * Configure the Rx VSI for operation.
2754 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2759 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2760 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2761 + ETH_FCS_LEN + VLAN_HLEN;
2763 vsi->max_frame = I40E_RXBUFFER_2048;
2765 /* figure out correct receive buffer length */
2766 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2767 I40E_FLAG_RX_PS_ENABLED)) {
2768 case I40E_FLAG_RX_1BUF_ENABLED:
2769 vsi->rx_hdr_len = 0;
2770 vsi->rx_buf_len = vsi->max_frame;
2771 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2773 case I40E_FLAG_RX_PS_ENABLED:
2774 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2775 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2776 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2779 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2780 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2781 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2786 /* setup rx buffer for FCoE */
2787 if ((vsi->type == I40E_VSI_FCOE) &&
2788 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2789 vsi->rx_hdr_len = 0;
2790 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2791 vsi->max_frame = I40E_RXBUFFER_3072;
2792 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2795 #endif /* I40E_FCOE */
2796 /* round up for the chip's needs */
2797 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2798 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2799 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2800 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2802 /* set up individual rings */
2803 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2804 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2810 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2811 * @vsi: ptr to the VSI
2813 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2815 struct i40e_ring *tx_ring, *rx_ring;
2816 u16 qoffset, qcount;
2819 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2820 /* Reset the TC information */
2821 for (i = 0; i < vsi->num_queue_pairs; i++) {
2822 rx_ring = vsi->rx_rings[i];
2823 tx_ring = vsi->tx_rings[i];
2824 rx_ring->dcb_tc = 0;
2825 tx_ring->dcb_tc = 0;
2829 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2830 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2833 qoffset = vsi->tc_config.tc_info[n].qoffset;
2834 qcount = vsi->tc_config.tc_info[n].qcount;
2835 for (i = qoffset; i < (qoffset + qcount); i++) {
2836 rx_ring = vsi->rx_rings[i];
2837 tx_ring = vsi->tx_rings[i];
2838 rx_ring->dcb_tc = n;
2839 tx_ring->dcb_tc = n;
2845 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2846 * @vsi: ptr to the VSI
2848 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2851 i40e_set_rx_mode(vsi->netdev);
2855 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2856 * @vsi: Pointer to the targeted VSI
2858 * This function replays the hlist on the hw where all the SB Flow Director
2859 * filters were saved.
2861 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2863 struct i40e_fdir_filter *filter;
2864 struct i40e_pf *pf = vsi->back;
2865 struct hlist_node *node;
2867 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2870 hlist_for_each_entry_safe(filter, node,
2871 &pf->fdir_filter_list, fdir_node) {
2872 i40e_add_del_fdir(vsi, filter, true);
2877 * i40e_vsi_configure - Set up the VSI for action
2878 * @vsi: the VSI being configured
2880 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2884 i40e_set_vsi_rx_mode(vsi);
2885 i40e_restore_vlan(vsi);
2886 i40e_vsi_config_dcb_rings(vsi);
2887 err = i40e_vsi_configure_tx(vsi);
2889 err = i40e_vsi_configure_rx(vsi);
2895 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2896 * @vsi: the VSI being configured
2898 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2900 struct i40e_pf *pf = vsi->back;
2901 struct i40e_q_vector *q_vector;
2902 struct i40e_hw *hw = &pf->hw;
2908 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2909 * and PFINT_LNKLSTn registers, e.g.:
2910 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2912 qp = vsi->base_queue;
2913 vector = vsi->base_vector;
2914 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2915 q_vector = vsi->q_vectors[i];
2916 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2917 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2918 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2920 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2921 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2922 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2925 /* Linked list for the queuepairs assigned to this vector */
2926 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2927 for (q = 0; q < q_vector->num_ringpairs; q++) {
2928 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2929 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2930 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2931 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2933 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2935 wr32(hw, I40E_QINT_RQCTL(qp), val);
2937 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2938 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2939 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2940 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2942 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2944 /* Terminate the linked list */
2945 if (q == (q_vector->num_ringpairs - 1))
2946 val |= (I40E_QUEUE_END_OF_LIST
2947 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2949 wr32(hw, I40E_QINT_TQCTL(qp), val);
2958 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2959 * @hw: ptr to the hardware info
2961 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2963 struct i40e_hw *hw = &pf->hw;
2966 /* clear things first */
2967 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2968 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2970 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2971 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2972 I40E_PFINT_ICR0_ENA_GRST_MASK |
2973 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2974 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2975 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2976 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2977 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2979 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2980 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2982 if (pf->flags & I40E_FLAG_PTP)
2983 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2985 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2987 /* SW_ITR_IDX = 0, but don't change INTENA */
2988 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2989 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2991 /* OTHER_ITR_IDX = 0 */
2992 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2996 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2997 * @vsi: the VSI being configured
2999 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3001 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3002 struct i40e_pf *pf = vsi->back;
3003 struct i40e_hw *hw = &pf->hw;
3006 /* set the ITR configuration */
3007 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3008 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3009 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3010 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3011 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3012 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3014 i40e_enable_misc_int_causes(pf);
3016 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3017 wr32(hw, I40E_PFINT_LNKLST0, 0);
3019 /* Associate the queue pair to the vector and enable the queue int */
3020 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3021 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3022 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3024 wr32(hw, I40E_QINT_RQCTL(0), val);
3026 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3027 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3028 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3030 wr32(hw, I40E_QINT_TQCTL(0), val);
3035 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3036 * @pf: board private structure
3038 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3040 struct i40e_hw *hw = &pf->hw;
3042 wr32(hw, I40E_PFINT_DYN_CTL0,
3043 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3048 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3049 * @pf: board private structure
3051 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3053 struct i40e_hw *hw = &pf->hw;
3056 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3057 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3058 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3060 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3065 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3066 * @vsi: pointer to a vsi
3067 * @vector: enable a particular Hw Interrupt vector
3069 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3071 struct i40e_pf *pf = vsi->back;
3072 struct i40e_hw *hw = &pf->hw;
3075 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3076 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3077 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3078 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3079 /* skip the flush */
3083 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3084 * @vsi: pointer to a vsi
3085 * @vector: disable a particular Hw Interrupt vector
3087 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3089 struct i40e_pf *pf = vsi->back;
3090 struct i40e_hw *hw = &pf->hw;
3093 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3094 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3099 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3100 * @irq: interrupt number
3101 * @data: pointer to a q_vector
3103 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3105 struct i40e_q_vector *q_vector = data;
3107 if (!q_vector->tx.ring && !q_vector->rx.ring)
3110 napi_schedule(&q_vector->napi);
3116 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3117 * @vsi: the VSI being configured
3118 * @basename: name for the vector
3120 * Allocates MSI-X vectors and requests interrupts from the kernel.
3122 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3124 int q_vectors = vsi->num_q_vectors;
3125 struct i40e_pf *pf = vsi->back;
3126 int base = vsi->base_vector;
3131 for (vector = 0; vector < q_vectors; vector++) {
3132 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3134 if (q_vector->tx.ring && q_vector->rx.ring) {
3135 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3136 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3138 } else if (q_vector->rx.ring) {
3139 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3140 "%s-%s-%d", basename, "rx", rx_int_idx++);
3141 } else if (q_vector->tx.ring) {
3142 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3143 "%s-%s-%d", basename, "tx", tx_int_idx++);
3145 /* skip this unused q_vector */
3148 err = request_irq(pf->msix_entries[base + vector].vector,
3154 dev_info(&pf->pdev->dev,
3155 "%s: request_irq failed, error: %d\n",
3157 goto free_queue_irqs;
3159 /* assign the mask for this irq */
3160 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3161 &q_vector->affinity_mask);
3164 vsi->irqs_ready = true;
3170 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3172 free_irq(pf->msix_entries[base + vector].vector,
3173 &(vsi->q_vectors[vector]));
3179 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3180 * @vsi: the VSI being un-configured
3182 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3184 struct i40e_pf *pf = vsi->back;
3185 struct i40e_hw *hw = &pf->hw;
3186 int base = vsi->base_vector;
3189 for (i = 0; i < vsi->num_queue_pairs; i++) {
3190 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3191 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3194 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3195 for (i = vsi->base_vector;
3196 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3197 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3200 for (i = 0; i < vsi->num_q_vectors; i++)
3201 synchronize_irq(pf->msix_entries[i + base].vector);
3203 /* Legacy and MSI mode - this stops all interrupt handling */
3204 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3205 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3207 synchronize_irq(pf->pdev->irq);
3212 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3213 * @vsi: the VSI being configured
3215 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3217 struct i40e_pf *pf = vsi->back;
3220 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3221 for (i = vsi->base_vector;
3222 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3223 i40e_irq_dynamic_enable(vsi, i);
3225 i40e_irq_dynamic_enable_icr0(pf);
3228 i40e_flush(&pf->hw);
3233 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3234 * @pf: board private structure
3236 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3239 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3240 i40e_flush(&pf->hw);
3244 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3245 * @irq: interrupt number
3246 * @data: pointer to a q_vector
3248 * This is the handler used for all MSI/Legacy interrupts, and deals
3249 * with both queue and non-queue interrupts. This is also used in
3250 * MSIX mode to handle the non-queue interrupts.
3252 static irqreturn_t i40e_intr(int irq, void *data)
3254 struct i40e_pf *pf = (struct i40e_pf *)data;
3255 struct i40e_hw *hw = &pf->hw;
3256 irqreturn_t ret = IRQ_NONE;
3257 u32 icr0, icr0_remaining;
3260 icr0 = rd32(hw, I40E_PFINT_ICR0);
3261 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3263 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3264 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3267 /* if interrupt but no bits showing, must be SWINT */
3268 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3269 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3272 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3273 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3274 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3275 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3276 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3279 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3280 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3282 /* temporarily disable queue cause for NAPI processing */
3283 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3284 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3285 wr32(hw, I40E_QINT_RQCTL(0), qval);
3287 qval = rd32(hw, I40E_QINT_TQCTL(0));
3288 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3289 wr32(hw, I40E_QINT_TQCTL(0), qval);
3291 if (!test_bit(__I40E_DOWN, &pf->state))
3292 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3295 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3296 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3297 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3300 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3301 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3302 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3305 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3306 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3307 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3310 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3311 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3312 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3313 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3314 val = rd32(hw, I40E_GLGEN_RSTAT);
3315 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3316 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3317 if (val == I40E_RESET_CORER) {
3319 } else if (val == I40E_RESET_GLOBR) {
3321 } else if (val == I40E_RESET_EMPR) {
3323 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3327 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3328 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3329 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3330 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3331 rd32(hw, I40E_PFHMC_ERRORINFO),
3332 rd32(hw, I40E_PFHMC_ERRORDATA));
3335 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3336 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3338 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3339 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3340 i40e_ptp_tx_hwtstamp(pf);
3344 /* If a critical error is pending we have no choice but to reset the
3346 * Report and mask out any remaining unexpected interrupts.
3348 icr0_remaining = icr0 & ena_mask;
3349 if (icr0_remaining) {
3350 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3352 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3353 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3354 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3355 dev_info(&pf->pdev->dev, "device will be reset\n");
3356 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3357 i40e_service_event_schedule(pf);
3359 ena_mask &= ~icr0_remaining;
3364 /* re-enable interrupt causes */
3365 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3366 if (!test_bit(__I40E_DOWN, &pf->state)) {
3367 i40e_service_event_schedule(pf);
3368 i40e_irq_dynamic_enable_icr0(pf);
3375 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3376 * @tx_ring: tx ring to clean
3377 * @budget: how many cleans we're allowed
3379 * Returns true if there's any budget left (e.g. the clean is finished)
3381 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3383 struct i40e_vsi *vsi = tx_ring->vsi;
3384 u16 i = tx_ring->next_to_clean;
3385 struct i40e_tx_buffer *tx_buf;
3386 struct i40e_tx_desc *tx_desc;
3388 tx_buf = &tx_ring->tx_bi[i];
3389 tx_desc = I40E_TX_DESC(tx_ring, i);
3390 i -= tx_ring->count;
3393 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3395 /* if next_to_watch is not set then there is no work pending */
3399 /* prevent any other reads prior to eop_desc */
3400 read_barrier_depends();
3402 /* if the descriptor isn't done, no work yet to do */
3403 if (!(eop_desc->cmd_type_offset_bsz &
3404 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3407 /* clear next_to_watch to prevent false hangs */
3408 tx_buf->next_to_watch = NULL;
3410 tx_desc->buffer_addr = 0;
3411 tx_desc->cmd_type_offset_bsz = 0;
3412 /* move past filter desc */
3417 i -= tx_ring->count;
3418 tx_buf = tx_ring->tx_bi;
3419 tx_desc = I40E_TX_DESC(tx_ring, 0);
3421 /* unmap skb header data */
3422 dma_unmap_single(tx_ring->dev,
3423 dma_unmap_addr(tx_buf, dma),
3424 dma_unmap_len(tx_buf, len),
3426 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3427 kfree(tx_buf->raw_buf);
3429 tx_buf->raw_buf = NULL;
3430 tx_buf->tx_flags = 0;
3431 tx_buf->next_to_watch = NULL;
3432 dma_unmap_len_set(tx_buf, len, 0);
3433 tx_desc->buffer_addr = 0;
3434 tx_desc->cmd_type_offset_bsz = 0;
3436 /* move us past the eop_desc for start of next FD desc */
3441 i -= tx_ring->count;
3442 tx_buf = tx_ring->tx_bi;
3443 tx_desc = I40E_TX_DESC(tx_ring, 0);
3446 /* update budget accounting */
3448 } while (likely(budget));
3450 i += tx_ring->count;
3451 tx_ring->next_to_clean = i;
3453 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3454 i40e_irq_dynamic_enable(vsi,
3455 tx_ring->q_vector->v_idx + vsi->base_vector);
3461 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3462 * @irq: interrupt number
3463 * @data: pointer to a q_vector
3465 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3467 struct i40e_q_vector *q_vector = data;
3468 struct i40e_vsi *vsi;
3470 if (!q_vector->tx.ring)
3473 vsi = q_vector->tx.ring->vsi;
3474 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3480 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3481 * @vsi: the VSI being configured
3482 * @v_idx: vector index
3483 * @qp_idx: queue pair index
3485 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3487 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3488 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3489 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3491 tx_ring->q_vector = q_vector;
3492 tx_ring->next = q_vector->tx.ring;
3493 q_vector->tx.ring = tx_ring;
3494 q_vector->tx.count++;
3496 rx_ring->q_vector = q_vector;
3497 rx_ring->next = q_vector->rx.ring;
3498 q_vector->rx.ring = rx_ring;
3499 q_vector->rx.count++;
3503 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3504 * @vsi: the VSI being configured
3506 * This function maps descriptor rings to the queue-specific vectors
3507 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3508 * one vector per queue pair, but on a constrained vector budget, we
3509 * group the queue pairs as "efficiently" as possible.
3511 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3513 int qp_remaining = vsi->num_queue_pairs;
3514 int q_vectors = vsi->num_q_vectors;
3519 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3520 * group them so there are multiple queues per vector.
3521 * It is also important to go through all the vectors available to be
3522 * sure that if we don't use all the vectors, that the remaining vectors
3523 * are cleared. This is especially important when decreasing the
3524 * number of queues in use.
3526 for (; v_start < q_vectors; v_start++) {
3527 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3529 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3531 q_vector->num_ringpairs = num_ringpairs;
3533 q_vector->rx.count = 0;
3534 q_vector->tx.count = 0;
3535 q_vector->rx.ring = NULL;
3536 q_vector->tx.ring = NULL;
3538 while (num_ringpairs--) {
3539 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3547 * i40e_vsi_request_irq - Request IRQ from the OS
3548 * @vsi: the VSI being configured
3549 * @basename: name for the vector
3551 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3553 struct i40e_pf *pf = vsi->back;
3556 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3557 err = i40e_vsi_request_irq_msix(vsi, basename);
3558 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3559 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3562 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3566 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3571 #ifdef CONFIG_NET_POLL_CONTROLLER
3573 * i40e_netpoll - A Polling 'interrupt'handler
3574 * @netdev: network interface device structure
3576 * This is used by netconsole to send skbs without having to re-enable
3577 * interrupts. It's not called while the normal interrupt routine is executing.
3580 void i40e_netpoll(struct net_device *netdev)
3582 static void i40e_netpoll(struct net_device *netdev)
3585 struct i40e_netdev_priv *np = netdev_priv(netdev);
3586 struct i40e_vsi *vsi = np->vsi;
3587 struct i40e_pf *pf = vsi->back;
3590 /* if interface is down do nothing */
3591 if (test_bit(__I40E_DOWN, &vsi->state))
3594 pf->flags |= I40E_FLAG_IN_NETPOLL;
3595 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3596 for (i = 0; i < vsi->num_q_vectors; i++)
3597 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3599 i40e_intr(pf->pdev->irq, netdev);
3601 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3606 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3607 * @pf: the PF being configured
3608 * @pf_q: the PF queue
3609 * @enable: enable or disable state of the queue
3611 * This routine will wait for the given Tx queue of the PF to reach the
3612 * enabled or disabled state.
3613 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3614 * multiple retries; else will return 0 in case of success.
3616 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3621 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3622 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3623 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3626 usleep_range(10, 20);
3628 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3635 * i40e_vsi_control_tx - Start or stop a VSI's rings
3636 * @vsi: the VSI being configured
3637 * @enable: start or stop the rings
3639 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3641 struct i40e_pf *pf = vsi->back;
3642 struct i40e_hw *hw = &pf->hw;
3643 int i, j, pf_q, ret = 0;
3646 pf_q = vsi->base_queue;
3647 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3649 /* warn the TX unit of coming changes */
3650 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3652 usleep_range(10, 20);
3654 for (j = 0; j < 50; j++) {
3655 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3656 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3657 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3659 usleep_range(1000, 2000);
3661 /* Skip if the queue is already in the requested state */
3662 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3665 /* turn on/off the queue */
3667 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3668 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3670 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3673 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3674 /* No waiting for the Tx queue to disable */
3675 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3678 /* wait for the change to finish */
3679 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3681 dev_info(&pf->pdev->dev,
3682 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3683 __func__, vsi->seid, pf_q,
3684 (enable ? "en" : "dis"));
3689 if (hw->revision_id == 0)
3695 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3696 * @pf: the PF being configured
3697 * @pf_q: the PF queue
3698 * @enable: enable or disable state of the queue
3700 * This routine will wait for the given Rx queue of the PF to reach the
3701 * enabled or disabled state.
3702 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3703 * multiple retries; else will return 0 in case of success.
3705 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3710 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3711 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3712 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3715 usleep_range(10, 20);
3717 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3724 * i40e_vsi_control_rx - Start or stop a VSI's rings
3725 * @vsi: the VSI being configured
3726 * @enable: start or stop the rings
3728 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3730 struct i40e_pf *pf = vsi->back;
3731 struct i40e_hw *hw = &pf->hw;
3732 int i, j, pf_q, ret = 0;
3735 pf_q = vsi->base_queue;
3736 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3737 for (j = 0; j < 50; j++) {
3738 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3739 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3740 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3742 usleep_range(1000, 2000);
3745 /* Skip if the queue is already in the requested state */
3746 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3749 /* turn on/off the queue */
3751 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3753 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3754 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3756 /* wait for the change to finish */
3757 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3759 dev_info(&pf->pdev->dev,
3760 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3761 __func__, vsi->seid, pf_q,
3762 (enable ? "en" : "dis"));
3771 * i40e_vsi_control_rings - Start or stop a VSI's rings
3772 * @vsi: the VSI being configured
3773 * @enable: start or stop the rings
3775 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3779 /* do rx first for enable and last for disable */
3781 ret = i40e_vsi_control_rx(vsi, request);
3784 ret = i40e_vsi_control_tx(vsi, request);
3786 /* Ignore return value, we need to shutdown whatever we can */
3787 i40e_vsi_control_tx(vsi, request);
3788 i40e_vsi_control_rx(vsi, request);
3795 * i40e_vsi_free_irq - Free the irq association with the OS
3796 * @vsi: the VSI being configured
3798 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3800 struct i40e_pf *pf = vsi->back;
3801 struct i40e_hw *hw = &pf->hw;
3802 int base = vsi->base_vector;
3806 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3807 if (!vsi->q_vectors)
3810 if (!vsi->irqs_ready)
3813 vsi->irqs_ready = false;
3814 for (i = 0; i < vsi->num_q_vectors; i++) {
3815 u16 vector = i + base;
3817 /* free only the irqs that were actually requested */
3818 if (!vsi->q_vectors[i] ||
3819 !vsi->q_vectors[i]->num_ringpairs)
3822 /* clear the affinity_mask in the IRQ descriptor */
3823 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3825 free_irq(pf->msix_entries[vector].vector,
3828 /* Tear down the interrupt queue link list
3830 * We know that they come in pairs and always
3831 * the Rx first, then the Tx. To clear the
3832 * link list, stick the EOL value into the
3833 * next_q field of the registers.
3835 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3836 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3837 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3838 val |= I40E_QUEUE_END_OF_LIST
3839 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3840 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3842 while (qp != I40E_QUEUE_END_OF_LIST) {
3845 val = rd32(hw, I40E_QINT_RQCTL(qp));
3847 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3848 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3849 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3850 I40E_QINT_RQCTL_INTEVENT_MASK);
3852 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3853 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3855 wr32(hw, I40E_QINT_RQCTL(qp), val);
3857 val = rd32(hw, I40E_QINT_TQCTL(qp));
3859 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3860 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3862 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3863 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3864 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3865 I40E_QINT_TQCTL_INTEVENT_MASK);
3867 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3868 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3870 wr32(hw, I40E_QINT_TQCTL(qp), val);
3875 free_irq(pf->pdev->irq, pf);
3877 val = rd32(hw, I40E_PFINT_LNKLST0);
3878 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3879 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3880 val |= I40E_QUEUE_END_OF_LIST
3881 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3882 wr32(hw, I40E_PFINT_LNKLST0, val);
3884 val = rd32(hw, I40E_QINT_RQCTL(qp));
3885 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3886 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3887 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3888 I40E_QINT_RQCTL_INTEVENT_MASK);
3890 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3891 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3893 wr32(hw, I40E_QINT_RQCTL(qp), val);
3895 val = rd32(hw, I40E_QINT_TQCTL(qp));
3897 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3898 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3899 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3900 I40E_QINT_TQCTL_INTEVENT_MASK);
3902 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3903 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3905 wr32(hw, I40E_QINT_TQCTL(qp), val);
3910 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3911 * @vsi: the VSI being configured
3912 * @v_idx: Index of vector to be freed
3914 * This function frees the memory allocated to the q_vector. In addition if
3915 * NAPI is enabled it will delete any references to the NAPI struct prior
3916 * to freeing the q_vector.
3918 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3920 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3921 struct i40e_ring *ring;
3926 /* disassociate q_vector from rings */
3927 i40e_for_each_ring(ring, q_vector->tx)
3928 ring->q_vector = NULL;
3930 i40e_for_each_ring(ring, q_vector->rx)
3931 ring->q_vector = NULL;
3933 /* only VSI w/ an associated netdev is set up w/ NAPI */
3935 netif_napi_del(&q_vector->napi);
3937 vsi->q_vectors[v_idx] = NULL;
3939 kfree_rcu(q_vector, rcu);
3943 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3944 * @vsi: the VSI being un-configured
3946 * This frees the memory allocated to the q_vectors and
3947 * deletes references to the NAPI struct.
3949 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3953 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3954 i40e_free_q_vector(vsi, v_idx);
3958 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3959 * @pf: board private structure
3961 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3963 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3964 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3965 pci_disable_msix(pf->pdev);
3966 kfree(pf->msix_entries);
3967 pf->msix_entries = NULL;
3968 kfree(pf->irq_pile);
3969 pf->irq_pile = NULL;
3970 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3971 pci_disable_msi(pf->pdev);
3973 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3977 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3978 * @pf: board private structure
3980 * We go through and clear interrupt specific resources and reset the structure
3981 * to pre-load conditions
3983 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3987 i40e_stop_misc_vector(pf);
3988 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3989 synchronize_irq(pf->msix_entries[0].vector);
3990 free_irq(pf->msix_entries[0].vector, pf);
3993 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3994 for (i = 0; i < pf->num_alloc_vsi; i++)
3996 i40e_vsi_free_q_vectors(pf->vsi[i]);
3997 i40e_reset_interrupt_capability(pf);
4001 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4002 * @vsi: the VSI being configured
4004 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4011 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4012 napi_enable(&vsi->q_vectors[q_idx]->napi);
4016 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4017 * @vsi: the VSI being configured
4019 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4026 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4027 napi_disable(&vsi->q_vectors[q_idx]->napi);
4031 * i40e_vsi_close - Shut down a VSI
4032 * @vsi: the vsi to be quelled
4034 static void i40e_vsi_close(struct i40e_vsi *vsi)
4036 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4038 i40e_vsi_free_irq(vsi);
4039 i40e_vsi_free_tx_resources(vsi);
4040 i40e_vsi_free_rx_resources(vsi);
4041 vsi->current_netdev_flags = 0;
4045 * i40e_quiesce_vsi - Pause a given VSI
4046 * @vsi: the VSI being paused
4048 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4050 if (test_bit(__I40E_DOWN, &vsi->state))
4053 /* No need to disable FCoE VSI when Tx suspended */
4054 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4055 vsi->type == I40E_VSI_FCOE) {
4056 dev_dbg(&vsi->back->pdev->dev,
4057 "%s: VSI seid %d skipping FCoE VSI disable\n",
4058 __func__, vsi->seid);
4062 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4063 if (vsi->netdev && netif_running(vsi->netdev)) {
4064 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4066 i40e_vsi_close(vsi);
4071 * i40e_unquiesce_vsi - Resume a given VSI
4072 * @vsi: the VSI being resumed
4074 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4076 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4079 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4080 if (vsi->netdev && netif_running(vsi->netdev))
4081 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4083 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4087 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4090 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4094 for (v = 0; v < pf->num_alloc_vsi; v++) {
4096 i40e_quiesce_vsi(pf->vsi[v]);
4101 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4104 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4108 for (v = 0; v < pf->num_alloc_vsi; v++) {
4110 i40e_unquiesce_vsi(pf->vsi[v]);
4114 #ifdef CONFIG_I40E_DCB
4116 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4117 * @vsi: the VSI being configured
4119 * This function waits for the given VSI's Tx queues to be disabled.
4121 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4123 struct i40e_pf *pf = vsi->back;
4126 pf_q = vsi->base_queue;
4127 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4128 /* Check and wait for the disable status of the queue */
4129 ret = i40e_pf_txq_wait(pf, pf_q, false);
4131 dev_info(&pf->pdev->dev,
4132 "%s: VSI seid %d Tx ring %d disable timeout\n",
4133 __func__, vsi->seid, pf_q);
4142 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4145 * This function waits for the Tx queues to be in disabled state for all the
4146 * VSIs that are managed by this PF.
4148 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4152 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4153 /* No need to wait for FCoE VSI queues */
4154 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4155 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4167 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4168 * @q_idx: TX queue number
4169 * @vsi: Pointer to VSI struct
4171 * This function checks specified queue for given VSI. Detects hung condition.
4172 * Sets hung bit since it is two step process. Before next run of service task
4173 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4174 * hung condition remain unchanged and during subsequent run, this function
4175 * issues SW interrupt to recover from hung condition.
4177 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4179 struct i40e_ring *tx_ring = NULL;
4181 u32 head, val, tx_pending;
4186 /* now that we have an index, find the tx_ring struct */
4187 for (i = 0; i < vsi->num_queue_pairs; i++) {
4188 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4189 if (q_idx == vsi->tx_rings[i]->queue_index) {
4190 tx_ring = vsi->tx_rings[i];
4199 /* Read interrupt register */
4200 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4202 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4203 tx_ring->vsi->base_vector - 1));
4205 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4207 head = i40e_get_head(tx_ring);
4209 tx_pending = i40e_get_tx_pending(tx_ring);
4211 /* Interrupts are disabled and TX pending is non-zero,
4212 * trigger the SW interrupt (don't wait). Worst case
4213 * there will be one extra interrupt which may result
4214 * into not cleaning any queues because queues are cleaned.
4216 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4217 i40e_force_wb(vsi, tx_ring->q_vector);
4221 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4222 * @pf: pointer to PF struct
4224 * LAN VSI has netdev and netdev has TX queues. This function is to check
4225 * each of those TX queues if they are hung, trigger recovery by issuing
4228 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4230 struct net_device *netdev;
4231 struct i40e_vsi *vsi;
4234 /* Only for LAN VSI */
4235 vsi = pf->vsi[pf->lan_vsi];
4240 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4241 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4242 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4245 /* Make sure type is MAIN VSI */
4246 if (vsi->type != I40E_VSI_MAIN)
4249 netdev = vsi->netdev;
4253 /* Bail out if netif_carrier is not OK */
4254 if (!netif_carrier_ok(netdev))
4257 /* Go thru' TX queues for netdev */
4258 for (i = 0; i < netdev->num_tx_queues; i++) {
4259 struct netdev_queue *q;
4261 q = netdev_get_tx_queue(netdev, i);
4263 i40e_detect_recover_hung_queue(i, vsi);
4268 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4269 * @pf: pointer to PF
4271 * Get TC map for ISCSI PF type that will include iSCSI TC
4274 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4276 struct i40e_dcb_app_priority_table app;
4277 struct i40e_hw *hw = &pf->hw;
4278 u8 enabled_tc = 1; /* TC0 is always enabled */
4280 /* Get the iSCSI APP TLV */
4281 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4283 for (i = 0; i < dcbcfg->numapps; i++) {
4284 app = dcbcfg->app[i];
4285 if (app.selector == I40E_APP_SEL_TCPIP &&
4286 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4287 tc = dcbcfg->etscfg.prioritytable[app.priority];
4288 enabled_tc |= BIT_ULL(tc);
4297 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4298 * @dcbcfg: the corresponding DCBx configuration structure
4300 * Return the number of TCs from given DCBx configuration
4302 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4307 /* Scan the ETS Config Priority Table to find
4308 * traffic class enabled for a given priority
4309 * and use the traffic class index to get the
4310 * number of traffic classes enabled
4312 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4313 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4314 num_tc = dcbcfg->etscfg.prioritytable[i];
4317 /* Traffic class index starts from zero so
4318 * increment to return the actual count
4324 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4325 * @dcbcfg: the corresponding DCBx configuration structure
4327 * Query the current DCB configuration and return the number of
4328 * traffic classes enabled from the given DCBX config
4330 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4332 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4336 for (i = 0; i < num_tc; i++)
4337 enabled_tc |= BIT(i);
4343 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4344 * @pf: PF being queried
4346 * Return number of traffic classes enabled for the given PF
4348 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4350 struct i40e_hw *hw = &pf->hw;
4353 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4355 /* If DCB is not enabled then always in single TC */
4356 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4359 /* SFP mode will be enabled for all TCs on port */
4360 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4361 return i40e_dcb_get_num_tc(dcbcfg);
4363 /* MFP mode return count of enabled TCs for this PF */
4364 if (pf->hw.func_caps.iscsi)
4365 enabled_tc = i40e_get_iscsi_tc_map(pf);
4367 return 1; /* Only TC0 */
4369 /* At least have TC0 */
4370 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4371 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4372 if (enabled_tc & BIT_ULL(i))
4379 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4380 * @pf: PF being queried
4382 * Return a bitmap for first enabled traffic class for this PF.
4384 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4386 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4390 return 0x1; /* TC0 */
4392 /* Find the first enabled TC */
4393 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4394 if (enabled_tc & BIT_ULL(i))
4402 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4403 * @pf: PF being queried
4405 * Return a bitmap for enabled traffic classes for this PF.
4407 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4409 /* If DCB is not enabled for this PF then just return default TC */
4410 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4411 return i40e_pf_get_default_tc(pf);
4413 /* SFP mode we want PF to be enabled for all TCs */
4414 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4415 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4417 /* MFP enabled and iSCSI PF type */
4418 if (pf->hw.func_caps.iscsi)
4419 return i40e_get_iscsi_tc_map(pf);
4421 return i40e_pf_get_default_tc(pf);
4425 * i40e_vsi_get_bw_info - Query VSI BW Information
4426 * @vsi: the VSI being queried
4428 * Returns 0 on success, negative value on failure
4430 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4432 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4433 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4434 struct i40e_pf *pf = vsi->back;
4435 struct i40e_hw *hw = &pf->hw;
4440 /* Get the VSI level BW configuration */
4441 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4443 dev_info(&pf->pdev->dev,
4444 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4445 i40e_stat_str(&pf->hw, ret),
4446 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4450 /* Get the VSI level BW configuration per TC */
4451 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4454 dev_info(&pf->pdev->dev,
4455 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4456 i40e_stat_str(&pf->hw, ret),
4457 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4461 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4462 dev_info(&pf->pdev->dev,
4463 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4464 bw_config.tc_valid_bits,
4465 bw_ets_config.tc_valid_bits);
4466 /* Still continuing */
4469 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4470 vsi->bw_max_quanta = bw_config.max_bw;
4471 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4472 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4473 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4474 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4475 vsi->bw_ets_limit_credits[i] =
4476 le16_to_cpu(bw_ets_config.credits[i]);
4477 /* 3 bits out of 4 for each TC */
4478 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4485 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4486 * @vsi: the VSI being configured
4487 * @enabled_tc: TC bitmap
4488 * @bw_credits: BW shared credits per TC
4490 * Returns 0 on success, negative value on failure
4492 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4495 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4499 bw_data.tc_valid_bits = enabled_tc;
4500 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4501 bw_data.tc_bw_credits[i] = bw_share[i];
4503 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4506 dev_info(&vsi->back->pdev->dev,
4507 "AQ command Config VSI BW allocation per TC failed = %d\n",
4508 vsi->back->hw.aq.asq_last_status);
4512 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4513 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4519 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4520 * @vsi: the VSI being configured
4521 * @enabled_tc: TC map to be enabled
4524 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4526 struct net_device *netdev = vsi->netdev;
4527 struct i40e_pf *pf = vsi->back;
4528 struct i40e_hw *hw = &pf->hw;
4531 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4537 netdev_reset_tc(netdev);
4541 /* Set up actual enabled TCs on the VSI */
4542 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4545 /* set per TC queues for the VSI */
4546 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4547 /* Only set TC queues for enabled tcs
4549 * e.g. For a VSI that has TC0 and TC3 enabled the
4550 * enabled_tc bitmap would be 0x00001001; the driver
4551 * will set the numtc for netdev as 2 that will be
4552 * referenced by the netdev layer as TC 0 and 1.
4554 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4555 netdev_set_tc_queue(netdev,
4556 vsi->tc_config.tc_info[i].netdev_tc,
4557 vsi->tc_config.tc_info[i].qcount,
4558 vsi->tc_config.tc_info[i].qoffset);
4561 /* Assign UP2TC map for the VSI */
4562 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4563 /* Get the actual TC# for the UP */
4564 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4565 /* Get the mapped netdev TC# for the UP */
4566 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4567 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4572 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4573 * @vsi: the VSI being configured
4574 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4576 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4577 struct i40e_vsi_context *ctxt)
4579 /* copy just the sections touched not the entire info
4580 * since not all sections are valid as returned by
4583 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4584 memcpy(&vsi->info.queue_mapping,
4585 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4586 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4587 sizeof(vsi->info.tc_mapping));
4591 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4592 * @vsi: VSI to be configured
4593 * @enabled_tc: TC bitmap
4595 * This configures a particular VSI for TCs that are mapped to the
4596 * given TC bitmap. It uses default bandwidth share for TCs across
4597 * VSIs to configure TC for a particular VSI.
4600 * It is expected that the VSI queues have been quisced before calling
4603 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4605 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4606 struct i40e_vsi_context ctxt;
4610 /* Check if enabled_tc is same as existing or new TCs */
4611 if (vsi->tc_config.enabled_tc == enabled_tc)
4614 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4615 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4616 if (enabled_tc & BIT_ULL(i))
4620 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4622 dev_info(&vsi->back->pdev->dev,
4623 "Failed configuring TC map %d for VSI %d\n",
4624 enabled_tc, vsi->seid);
4628 /* Update Queue Pairs Mapping for currently enabled UPs */
4629 ctxt.seid = vsi->seid;
4630 ctxt.pf_num = vsi->back->hw.pf_id;
4632 ctxt.uplink_seid = vsi->uplink_seid;
4633 ctxt.info = vsi->info;
4634 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4636 /* Update the VSI after updating the VSI queue-mapping information */
4637 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4639 dev_info(&vsi->back->pdev->dev,
4640 "Update vsi tc config failed, err %s aq_err %s\n",
4641 i40e_stat_str(&vsi->back->hw, ret),
4642 i40e_aq_str(&vsi->back->hw,
4643 vsi->back->hw.aq.asq_last_status));
4646 /* update the local VSI info with updated queue map */
4647 i40e_vsi_update_queue_map(vsi, &ctxt);
4648 vsi->info.valid_sections = 0;
4650 /* Update current VSI BW information */
4651 ret = i40e_vsi_get_bw_info(vsi);
4653 dev_info(&vsi->back->pdev->dev,
4654 "Failed updating vsi bw info, err %s aq_err %s\n",
4655 i40e_stat_str(&vsi->back->hw, ret),
4656 i40e_aq_str(&vsi->back->hw,
4657 vsi->back->hw.aq.asq_last_status));
4661 /* Update the netdev TC setup */
4662 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4668 * i40e_veb_config_tc - Configure TCs for given VEB
4670 * @enabled_tc: TC bitmap
4672 * Configures given TC bitmap for VEB (switching) element
4674 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4676 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4677 struct i40e_pf *pf = veb->pf;
4681 /* No TCs or already enabled TCs just return */
4682 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4685 bw_data.tc_valid_bits = enabled_tc;
4686 /* bw_data.absolute_credits is not set (relative) */
4688 /* Enable ETS TCs with equal BW Share for now */
4689 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4690 if (enabled_tc & BIT_ULL(i))
4691 bw_data.tc_bw_share_credits[i] = 1;
4694 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4697 dev_info(&pf->pdev->dev,
4698 "VEB bw config failed, err %s aq_err %s\n",
4699 i40e_stat_str(&pf->hw, ret),
4700 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4704 /* Update the BW information */
4705 ret = i40e_veb_get_bw_info(veb);
4707 dev_info(&pf->pdev->dev,
4708 "Failed getting veb bw config, err %s aq_err %s\n",
4709 i40e_stat_str(&pf->hw, ret),
4710 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4717 #ifdef CONFIG_I40E_DCB
4719 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4722 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4723 * the caller would've quiesce all the VSIs before calling
4726 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4732 /* Enable the TCs available on PF to all VEBs */
4733 tc_map = i40e_pf_get_tc_map(pf);
4734 for (v = 0; v < I40E_MAX_VEB; v++) {
4737 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4739 dev_info(&pf->pdev->dev,
4740 "Failed configuring TC for VEB seid=%d\n",
4742 /* Will try to configure as many components */
4746 /* Update each VSI */
4747 for (v = 0; v < pf->num_alloc_vsi; v++) {
4751 /* - Enable all TCs for the LAN VSI
4753 * - For FCoE VSI only enable the TC configured
4754 * as per the APP TLV
4756 * - For all others keep them at TC0 for now
4758 if (v == pf->lan_vsi)
4759 tc_map = i40e_pf_get_tc_map(pf);
4761 tc_map = i40e_pf_get_default_tc(pf);
4763 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4764 tc_map = i40e_get_fcoe_tc_map(pf);
4765 #endif /* #ifdef I40E_FCOE */
4767 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4769 dev_info(&pf->pdev->dev,
4770 "Failed configuring TC for VSI seid=%d\n",
4772 /* Will try to configure as many components */
4774 /* Re-configure VSI vectors based on updated TC map */
4775 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4776 if (pf->vsi[v]->netdev)
4777 i40e_dcbnl_set_all(pf->vsi[v]);
4783 * i40e_resume_port_tx - Resume port Tx
4786 * Resume a port's Tx and issue a PF reset in case of failure to
4789 static int i40e_resume_port_tx(struct i40e_pf *pf)
4791 struct i40e_hw *hw = &pf->hw;
4794 ret = i40e_aq_resume_port_tx(hw, NULL);
4796 dev_info(&pf->pdev->dev,
4797 "Resume Port Tx failed, err %s aq_err %s\n",
4798 i40e_stat_str(&pf->hw, ret),
4799 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4800 /* Schedule PF reset to recover */
4801 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4802 i40e_service_event_schedule(pf);
4809 * i40e_init_pf_dcb - Initialize DCB configuration
4810 * @pf: PF being configured
4812 * Query the current DCB configuration and cache it
4813 * in the hardware structure
4815 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4817 struct i40e_hw *hw = &pf->hw;
4820 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4821 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4822 (pf->hw.aq.fw_maj_ver < 4))
4825 /* Get the initial DCB configuration */
4826 err = i40e_init_dcb(hw);
4828 /* Device/Function is not DCBX capable */
4829 if ((!hw->func_caps.dcb) ||
4830 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4831 dev_info(&pf->pdev->dev,
4832 "DCBX offload is not supported or is disabled for this PF.\n");
4834 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4838 /* When status is not DISABLED then DCBX in FW */
4839 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4840 DCB_CAP_DCBX_VER_IEEE;
4842 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4843 /* Enable DCB tagging only when more than one TC */
4844 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4845 pf->flags |= I40E_FLAG_DCB_ENABLED;
4846 dev_dbg(&pf->pdev->dev,
4847 "DCBX offload is supported for this PF.\n");
4850 dev_info(&pf->pdev->dev,
4851 "Query for DCB configuration failed, err %s aq_err %s\n",
4852 i40e_stat_str(&pf->hw, err),
4853 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4859 #endif /* CONFIG_I40E_DCB */
4860 #define SPEED_SIZE 14
4863 * i40e_print_link_message - print link up or down
4864 * @vsi: the VSI for which link needs a message
4866 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4868 char speed[SPEED_SIZE] = "Unknown";
4869 char fc[FC_SIZE] = "RX/TX";
4872 netdev_info(vsi->netdev, "NIC Link is Down\n");
4876 /* Warn user if link speed on NPAR enabled partition is not at
4879 if (vsi->back->hw.func_caps.npar_enable &&
4880 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4881 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4882 netdev_warn(vsi->netdev,
4883 "The partition detected link speed that is less than 10Gbps\n");
4885 switch (vsi->back->hw.phy.link_info.link_speed) {
4886 case I40E_LINK_SPEED_40GB:
4887 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4889 case I40E_LINK_SPEED_20GB:
4890 strncpy(speed, "20 Gbps", SPEED_SIZE);
4892 case I40E_LINK_SPEED_10GB:
4893 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4895 case I40E_LINK_SPEED_1GB:
4896 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4898 case I40E_LINK_SPEED_100MB:
4899 strncpy(speed, "100 Mbps", SPEED_SIZE);
4905 switch (vsi->back->hw.fc.current_mode) {
4907 strlcpy(fc, "RX/TX", FC_SIZE);
4909 case I40E_FC_TX_PAUSE:
4910 strlcpy(fc, "TX", FC_SIZE);
4912 case I40E_FC_RX_PAUSE:
4913 strlcpy(fc, "RX", FC_SIZE);
4916 strlcpy(fc, "None", FC_SIZE);
4920 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4925 * i40e_up_complete - Finish the last steps of bringing up a connection
4926 * @vsi: the VSI being configured
4928 static int i40e_up_complete(struct i40e_vsi *vsi)
4930 struct i40e_pf *pf = vsi->back;
4933 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4934 i40e_vsi_configure_msix(vsi);
4936 i40e_configure_msi_and_legacy(vsi);
4939 err = i40e_vsi_control_rings(vsi, true);
4943 clear_bit(__I40E_DOWN, &vsi->state);
4944 i40e_napi_enable_all(vsi);
4945 i40e_vsi_enable_irq(vsi);
4947 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4949 i40e_print_link_message(vsi, true);
4950 netif_tx_start_all_queues(vsi->netdev);
4951 netif_carrier_on(vsi->netdev);
4952 } else if (vsi->netdev) {
4953 i40e_print_link_message(vsi, false);
4954 /* need to check for qualified module here*/
4955 if ((pf->hw.phy.link_info.link_info &
4956 I40E_AQ_MEDIA_AVAILABLE) &&
4957 (!(pf->hw.phy.link_info.an_info &
4958 I40E_AQ_QUALIFIED_MODULE)))
4959 netdev_err(vsi->netdev,
4960 "the driver failed to link because an unqualified module was detected.");
4963 /* replay FDIR SB filters */
4964 if (vsi->type == I40E_VSI_FDIR) {
4965 /* reset fd counters */
4966 pf->fd_add_err = pf->fd_atr_cnt = 0;
4967 if (pf->fd_tcp_rule > 0) {
4968 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4969 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4970 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4971 pf->fd_tcp_rule = 0;
4973 i40e_fdir_filter_restore(vsi);
4975 i40e_service_event_schedule(pf);
4981 * i40e_vsi_reinit_locked - Reset the VSI
4982 * @vsi: the VSI being configured
4984 * Rebuild the ring structs after some configuration
4985 * has changed, e.g. MTU size.
4987 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4989 struct i40e_pf *pf = vsi->back;
4991 WARN_ON(in_interrupt());
4992 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4993 usleep_range(1000, 2000);
4996 /* Give a VF some time to respond to the reset. The
4997 * two second wait is based upon the watchdog cycle in
5000 if (vsi->type == I40E_VSI_SRIOV)
5003 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5007 * i40e_up - Bring the connection back up after being down
5008 * @vsi: the VSI being configured
5010 int i40e_up(struct i40e_vsi *vsi)
5014 err = i40e_vsi_configure(vsi);
5016 err = i40e_up_complete(vsi);
5022 * i40e_down - Shutdown the connection processing
5023 * @vsi: the VSI being stopped
5025 void i40e_down(struct i40e_vsi *vsi)
5029 /* It is assumed that the caller of this function
5030 * sets the vsi->state __I40E_DOWN bit.
5033 netif_carrier_off(vsi->netdev);
5034 netif_tx_disable(vsi->netdev);
5036 i40e_vsi_disable_irq(vsi);
5037 i40e_vsi_control_rings(vsi, false);
5038 i40e_napi_disable_all(vsi);
5040 for (i = 0; i < vsi->num_queue_pairs; i++) {
5041 i40e_clean_tx_ring(vsi->tx_rings[i]);
5042 i40e_clean_rx_ring(vsi->rx_rings[i]);
5047 * i40e_setup_tc - configure multiple traffic classes
5048 * @netdev: net device to configure
5049 * @tc: number of traffic classes to enable
5052 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5054 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5057 struct i40e_netdev_priv *np = netdev_priv(netdev);
5058 struct i40e_vsi *vsi = np->vsi;
5059 struct i40e_pf *pf = vsi->back;
5064 /* Check if DCB enabled to continue */
5065 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5066 netdev_info(netdev, "DCB is not enabled for adapter\n");
5070 /* Check if MFP enabled */
5071 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5072 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5076 /* Check whether tc count is within enabled limit */
5077 if (tc > i40e_pf_get_num_tc(pf)) {
5078 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5082 /* Generate TC map for number of tc requested */
5083 for (i = 0; i < tc; i++)
5084 enabled_tc |= BIT_ULL(i);
5086 /* Requesting same TC configuration as already enabled */
5087 if (enabled_tc == vsi->tc_config.enabled_tc)
5090 /* Quiesce VSI queues */
5091 i40e_quiesce_vsi(vsi);
5093 /* Configure VSI for enabled TCs */
5094 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5096 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5102 i40e_unquiesce_vsi(vsi);
5109 * i40e_open - Called when a network interface is made active
5110 * @netdev: network interface device structure
5112 * The open entry point is called when a network interface is made
5113 * active by the system (IFF_UP). At this point all resources needed
5114 * for transmit and receive operations are allocated, the interrupt
5115 * handler is registered with the OS, the netdev watchdog subtask is
5116 * enabled, and the stack is notified that the interface is ready.
5118 * Returns 0 on success, negative value on failure
5120 int i40e_open(struct net_device *netdev)
5122 struct i40e_netdev_priv *np = netdev_priv(netdev);
5123 struct i40e_vsi *vsi = np->vsi;
5124 struct i40e_pf *pf = vsi->back;
5127 /* disallow open during test or if eeprom is broken */
5128 if (test_bit(__I40E_TESTING, &pf->state) ||
5129 test_bit(__I40E_BAD_EEPROM, &pf->state))
5132 netif_carrier_off(netdev);
5134 err = i40e_vsi_open(vsi);
5138 /* configure global TSO hardware offload settings */
5139 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5140 TCP_FLAG_FIN) >> 16);
5141 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5143 TCP_FLAG_CWR) >> 16);
5144 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5146 #ifdef CONFIG_I40E_VXLAN
5147 vxlan_get_rx_port(netdev);
5155 * @vsi: the VSI to open
5157 * Finish initialization of the VSI.
5159 * Returns 0 on success, negative value on failure
5161 int i40e_vsi_open(struct i40e_vsi *vsi)
5163 struct i40e_pf *pf = vsi->back;
5164 char int_name[I40E_INT_NAME_STR_LEN];
5167 /* allocate descriptors */
5168 err = i40e_vsi_setup_tx_resources(vsi);
5171 err = i40e_vsi_setup_rx_resources(vsi);
5175 err = i40e_vsi_configure(vsi);
5180 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5181 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5182 err = i40e_vsi_request_irq(vsi, int_name);
5186 /* Notify the stack of the actual queue counts. */
5187 err = netif_set_real_num_tx_queues(vsi->netdev,
5188 vsi->num_queue_pairs);
5190 goto err_set_queues;
5192 err = netif_set_real_num_rx_queues(vsi->netdev,
5193 vsi->num_queue_pairs);
5195 goto err_set_queues;
5197 } else if (vsi->type == I40E_VSI_FDIR) {
5198 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5199 dev_driver_string(&pf->pdev->dev),
5200 dev_name(&pf->pdev->dev));
5201 err = i40e_vsi_request_irq(vsi, int_name);
5208 err = i40e_up_complete(vsi);
5210 goto err_up_complete;
5217 i40e_vsi_free_irq(vsi);
5219 i40e_vsi_free_rx_resources(vsi);
5221 i40e_vsi_free_tx_resources(vsi);
5222 if (vsi == pf->vsi[pf->lan_vsi])
5223 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5229 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5230 * @pf: Pointer to PF
5232 * This function destroys the hlist where all the Flow Director
5233 * filters were saved.
5235 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5237 struct i40e_fdir_filter *filter;
5238 struct hlist_node *node2;
5240 hlist_for_each_entry_safe(filter, node2,
5241 &pf->fdir_filter_list, fdir_node) {
5242 hlist_del(&filter->fdir_node);
5245 pf->fdir_pf_active_filters = 0;
5249 * i40e_close - Disables a network interface
5250 * @netdev: network interface device structure
5252 * The close entry point is called when an interface is de-activated
5253 * by the OS. The hardware is still under the driver's control, but
5254 * this netdev interface is disabled.
5256 * Returns 0, this is not allowed to fail
5259 int i40e_close(struct net_device *netdev)
5261 static int i40e_close(struct net_device *netdev)
5264 struct i40e_netdev_priv *np = netdev_priv(netdev);
5265 struct i40e_vsi *vsi = np->vsi;
5267 i40e_vsi_close(vsi);
5273 * i40e_do_reset - Start a PF or Core Reset sequence
5274 * @pf: board private structure
5275 * @reset_flags: which reset is requested
5277 * The essential difference in resets is that the PF Reset
5278 * doesn't clear the packet buffers, doesn't reset the PE
5279 * firmware, and doesn't bother the other PFs on the chip.
5281 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5285 WARN_ON(in_interrupt());
5287 if (i40e_check_asq_alive(&pf->hw))
5288 i40e_vc_notify_reset(pf);
5290 /* do the biggest reset indicated */
5291 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5293 /* Request a Global Reset
5295 * This will start the chip's countdown to the actual full
5296 * chip reset event, and a warning interrupt to be sent
5297 * to all PFs, including the requestor. Our handler
5298 * for the warning interrupt will deal with the shutdown
5299 * and recovery of the switch setup.
5301 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5302 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5303 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5304 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5306 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5308 /* Request a Core Reset
5310 * Same as Global Reset, except does *not* include the MAC/PHY
5312 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5313 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5314 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5315 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5316 i40e_flush(&pf->hw);
5318 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5320 /* Request a PF Reset
5322 * Resets only the PF-specific registers
5324 * This goes directly to the tear-down and rebuild of
5325 * the switch, since we need to do all the recovery as
5326 * for the Core Reset.
5328 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5329 i40e_handle_reset_warning(pf);
5331 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5334 /* Find the VSI(s) that requested a re-init */
5335 dev_info(&pf->pdev->dev,
5336 "VSI reinit requested\n");
5337 for (v = 0; v < pf->num_alloc_vsi; v++) {
5338 struct i40e_vsi *vsi = pf->vsi[v];
5340 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5341 i40e_vsi_reinit_locked(pf->vsi[v]);
5342 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5346 /* no further action needed, so return now */
5348 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5351 /* Find the VSI(s) that needs to be brought down */
5352 dev_info(&pf->pdev->dev, "VSI down requested\n");
5353 for (v = 0; v < pf->num_alloc_vsi; v++) {
5354 struct i40e_vsi *vsi = pf->vsi[v];
5356 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5357 set_bit(__I40E_DOWN, &vsi->state);
5359 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5363 /* no further action needed, so return now */
5366 dev_info(&pf->pdev->dev,
5367 "bad reset request 0x%08x\n", reset_flags);
5372 #ifdef CONFIG_I40E_DCB
5374 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5375 * @pf: board private structure
5376 * @old_cfg: current DCB config
5377 * @new_cfg: new DCB config
5379 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5380 struct i40e_dcbx_config *old_cfg,
5381 struct i40e_dcbx_config *new_cfg)
5383 bool need_reconfig = false;
5385 /* Check if ETS configuration has changed */
5386 if (memcmp(&new_cfg->etscfg,
5388 sizeof(new_cfg->etscfg))) {
5389 /* If Priority Table has changed reconfig is needed */
5390 if (memcmp(&new_cfg->etscfg.prioritytable,
5391 &old_cfg->etscfg.prioritytable,
5392 sizeof(new_cfg->etscfg.prioritytable))) {
5393 need_reconfig = true;
5394 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5397 if (memcmp(&new_cfg->etscfg.tcbwtable,
5398 &old_cfg->etscfg.tcbwtable,
5399 sizeof(new_cfg->etscfg.tcbwtable)))
5400 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5402 if (memcmp(&new_cfg->etscfg.tsatable,
5403 &old_cfg->etscfg.tsatable,
5404 sizeof(new_cfg->etscfg.tsatable)))
5405 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5408 /* Check if PFC configuration has changed */
5409 if (memcmp(&new_cfg->pfc,
5411 sizeof(new_cfg->pfc))) {
5412 need_reconfig = true;
5413 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5416 /* Check if APP Table has changed */
5417 if (memcmp(&new_cfg->app,
5419 sizeof(new_cfg->app))) {
5420 need_reconfig = true;
5421 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5424 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5426 return need_reconfig;
5430 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5431 * @pf: board private structure
5432 * @e: event info posted on ARQ
5434 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5435 struct i40e_arq_event_info *e)
5437 struct i40e_aqc_lldp_get_mib *mib =
5438 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5439 struct i40e_hw *hw = &pf->hw;
5440 struct i40e_dcbx_config tmp_dcbx_cfg;
5441 bool need_reconfig = false;
5445 /* Not DCB capable or capability disabled */
5446 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5449 /* Ignore if event is not for Nearest Bridge */
5450 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5451 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5452 dev_dbg(&pf->pdev->dev,
5453 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5454 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5457 /* Check MIB Type and return if event for Remote MIB update */
5458 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5459 dev_dbg(&pf->pdev->dev,
5460 "%s: LLDP event mib type %s\n", __func__,
5461 type ? "remote" : "local");
5462 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5463 /* Update the remote cached instance and return */
5464 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5465 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5466 &hw->remote_dcbx_config);
5470 /* Store the old configuration */
5471 tmp_dcbx_cfg = hw->local_dcbx_config;
5473 /* Reset the old DCBx configuration data */
5474 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5475 /* Get updated DCBX data from firmware */
5476 ret = i40e_get_dcb_config(&pf->hw);
5478 dev_info(&pf->pdev->dev,
5479 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5480 i40e_stat_str(&pf->hw, ret),
5481 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5485 /* No change detected in DCBX configs */
5486 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5487 sizeof(tmp_dcbx_cfg))) {
5488 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5492 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5493 &hw->local_dcbx_config);
5495 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5500 /* Enable DCB tagging only when more than one TC */
5501 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5502 pf->flags |= I40E_FLAG_DCB_ENABLED;
5504 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5506 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5507 /* Reconfiguration needed quiesce all VSIs */
5508 i40e_pf_quiesce_all_vsi(pf);
5510 /* Changes in configuration update VEB/VSI */
5511 i40e_dcb_reconfigure(pf);
5513 ret = i40e_resume_port_tx(pf);
5515 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5516 /* In case of error no point in resuming VSIs */
5520 /* Wait for the PF's Tx queues to be disabled */
5521 ret = i40e_pf_wait_txq_disabled(pf);
5523 /* Schedule PF reset to recover */
5524 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5525 i40e_service_event_schedule(pf);
5527 i40e_pf_unquiesce_all_vsi(pf);
5533 #endif /* CONFIG_I40E_DCB */
5536 * i40e_do_reset_safe - Protected reset path for userland calls.
5537 * @pf: board private structure
5538 * @reset_flags: which reset is requested
5541 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5544 i40e_do_reset(pf, reset_flags);
5549 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5550 * @pf: board private structure
5551 * @e: event info posted on ARQ
5553 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5556 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5557 struct i40e_arq_event_info *e)
5559 struct i40e_aqc_lan_overflow *data =
5560 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5561 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5562 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5563 struct i40e_hw *hw = &pf->hw;
5567 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5570 /* Queue belongs to VF, find the VF and issue VF reset */
5571 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5572 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5573 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5574 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5575 vf_id -= hw->func_caps.vf_base_id;
5576 vf = &pf->vf[vf_id];
5577 i40e_vc_notify_vf_reset(vf);
5578 /* Allow VF to process pending reset notification */
5580 i40e_reset_vf(vf, false);
5585 * i40e_service_event_complete - Finish up the service event
5586 * @pf: board private structure
5588 static void i40e_service_event_complete(struct i40e_pf *pf)
5590 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5592 /* flush memory to make sure state is correct before next watchog */
5593 smp_mb__before_atomic();
5594 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5598 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5599 * @pf: board private structure
5601 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5605 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5606 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5611 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5612 * @pf: board private structure
5614 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5618 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5619 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5620 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5621 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5626 * i40e_get_global_fd_count - Get total FD filters programmed on device
5627 * @pf: board private structure
5629 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5633 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5634 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5635 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5636 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5641 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5642 * @pf: board private structure
5644 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5646 u32 fcnt_prog, fcnt_avail;
5648 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5651 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5654 fcnt_prog = i40e_get_global_fd_count(pf);
5655 fcnt_avail = pf->fdir_pf_filter_count;
5656 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5657 (pf->fd_add_err == 0) ||
5658 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5659 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5660 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5661 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5662 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5663 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5666 /* Wait for some more space to be available to turn on ATR */
5667 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5668 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5669 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5670 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5671 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5672 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5677 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5678 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5680 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5681 * @pf: board private structure
5683 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5685 unsigned long min_flush_time;
5686 int flush_wait_retry = 50;
5687 bool disable_atr = false;
5691 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5694 if (time_after(jiffies, pf->fd_flush_timestamp +
5695 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5696 /* If the flush is happening too quick and we have mostly
5697 * SB rules we should not re-enable ATR for some time.
5699 min_flush_time = pf->fd_flush_timestamp
5700 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5701 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5703 if (!(time_after(jiffies, min_flush_time)) &&
5704 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5705 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5706 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5710 pf->fd_flush_timestamp = jiffies;
5711 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5712 /* flush all filters */
5713 wr32(&pf->hw, I40E_PFQF_CTL_1,
5714 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5715 i40e_flush(&pf->hw);
5719 /* Check FD flush status every 5-6msec */
5720 usleep_range(5000, 6000);
5721 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5722 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5724 } while (flush_wait_retry--);
5725 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5726 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5728 /* replay sideband filters */
5729 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5731 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5732 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5733 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5734 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5740 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5741 * @pf: board private structure
5743 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5745 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5748 /* We can see up to 256 filter programming desc in transit if the filters are
5749 * being applied really fast; before we see the first
5750 * filter miss error on Rx queue 0. Accumulating enough error messages before
5751 * reacting will make sure we don't cause flush too often.
5753 #define I40E_MAX_FD_PROGRAM_ERROR 256
5756 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5757 * @pf: board private structure
5759 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5762 /* if interface is down do nothing */
5763 if (test_bit(__I40E_DOWN, &pf->state))
5766 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5769 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5770 i40e_fdir_flush_and_replay(pf);
5772 i40e_fdir_check_and_reenable(pf);
5777 * i40e_vsi_link_event - notify VSI of a link event
5778 * @vsi: vsi to be notified
5779 * @link_up: link up or down
5781 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5783 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5786 switch (vsi->type) {
5791 if (!vsi->netdev || !vsi->netdev_registered)
5795 netif_carrier_on(vsi->netdev);
5796 netif_tx_wake_all_queues(vsi->netdev);
5798 netif_carrier_off(vsi->netdev);
5799 netif_tx_stop_all_queues(vsi->netdev);
5803 case I40E_VSI_SRIOV:
5804 case I40E_VSI_VMDQ2:
5806 case I40E_VSI_MIRROR:
5808 /* there is no notification for other VSIs */
5814 * i40e_veb_link_event - notify elements on the veb of a link event
5815 * @veb: veb to be notified
5816 * @link_up: link up or down
5818 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5823 if (!veb || !veb->pf)
5827 /* depth first... */
5828 for (i = 0; i < I40E_MAX_VEB; i++)
5829 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5830 i40e_veb_link_event(pf->veb[i], link_up);
5832 /* ... now the local VSIs */
5833 for (i = 0; i < pf->num_alloc_vsi; i++)
5834 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5835 i40e_vsi_link_event(pf->vsi[i], link_up);
5839 * i40e_link_event - Update netif_carrier status
5840 * @pf: board private structure
5842 static void i40e_link_event(struct i40e_pf *pf)
5844 bool new_link, old_link;
5845 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5846 u8 new_link_speed, old_link_speed;
5848 /* set this to force the get_link_status call to refresh state */
5849 pf->hw.phy.get_link_info = true;
5851 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5852 new_link = i40e_get_link_status(&pf->hw);
5853 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5854 new_link_speed = pf->hw.phy.link_info.link_speed;
5856 if (new_link == old_link &&
5857 new_link_speed == old_link_speed &&
5858 (test_bit(__I40E_DOWN, &vsi->state) ||
5859 new_link == netif_carrier_ok(vsi->netdev)))
5862 if (!test_bit(__I40E_DOWN, &vsi->state))
5863 i40e_print_link_message(vsi, new_link);
5865 /* Notify the base of the switch tree connected to
5866 * the link. Floating VEBs are not notified.
5868 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5869 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5871 i40e_vsi_link_event(vsi, new_link);
5874 i40e_vc_notify_link_state(pf);
5876 if (pf->flags & I40E_FLAG_PTP)
5877 i40e_ptp_set_increment(pf);
5881 * i40e_watchdog_subtask - periodic checks not using event driven response
5882 * @pf: board private structure
5884 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5888 /* if interface is down do nothing */
5889 if (test_bit(__I40E_DOWN, &pf->state) ||
5890 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5893 /* make sure we don't do these things too often */
5894 if (time_before(jiffies, (pf->service_timer_previous +
5895 pf->service_timer_period)))
5897 pf->service_timer_previous = jiffies;
5899 i40e_link_event(pf);
5901 /* Update the stats for active netdevs so the network stack
5902 * can look at updated numbers whenever it cares to
5904 for (i = 0; i < pf->num_alloc_vsi; i++)
5905 if (pf->vsi[i] && pf->vsi[i]->netdev)
5906 i40e_update_stats(pf->vsi[i]);
5908 /* Update the stats for the active switching components */
5909 for (i = 0; i < I40E_MAX_VEB; i++)
5911 i40e_update_veb_stats(pf->veb[i]);
5913 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5917 * i40e_reset_subtask - Set up for resetting the device and driver
5918 * @pf: board private structure
5920 static void i40e_reset_subtask(struct i40e_pf *pf)
5922 u32 reset_flags = 0;
5925 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5926 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5927 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5929 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5930 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5931 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5933 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5934 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5935 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5937 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5938 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5939 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5941 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5942 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5943 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5946 /* If there's a recovery already waiting, it takes
5947 * precedence before starting a new reset sequence.
5949 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5950 i40e_handle_reset_warning(pf);
5954 /* If we're already down or resetting, just bail */
5956 !test_bit(__I40E_DOWN, &pf->state) &&
5957 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5958 i40e_do_reset(pf, reset_flags);
5965 * i40e_handle_link_event - Handle link event
5966 * @pf: board private structure
5967 * @e: event info posted on ARQ
5969 static void i40e_handle_link_event(struct i40e_pf *pf,
5970 struct i40e_arq_event_info *e)
5972 struct i40e_hw *hw = &pf->hw;
5973 struct i40e_aqc_get_link_status *status =
5974 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5976 /* save off old link status information */
5977 hw->phy.link_info_old = hw->phy.link_info;
5979 /* Do a new status request to re-enable LSE reporting
5980 * and load new status information into the hw struct
5981 * This completely ignores any state information
5982 * in the ARQ event info, instead choosing to always
5983 * issue the AQ update link status command.
5985 i40e_link_event(pf);
5987 /* check for unqualified module, if link is down */
5988 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5989 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5990 (!(status->link_info & I40E_AQ_LINK_UP)))
5991 dev_err(&pf->pdev->dev,
5992 "The driver failed to link because an unqualified module was detected.\n");
5996 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5997 * @pf: board private structure
5999 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6001 struct i40e_arq_event_info event;
6002 struct i40e_hw *hw = &pf->hw;
6009 /* Do not run clean AQ when PF reset fails */
6010 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6013 /* check for error indications */
6014 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6016 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6017 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6018 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6020 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6021 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6022 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6024 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6025 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6026 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6029 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6031 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6033 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6034 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6035 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6037 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6038 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6039 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6041 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6042 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6043 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6046 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6048 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6049 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6054 ret = i40e_clean_arq_element(hw, &event, &pending);
6055 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6058 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6062 opcode = le16_to_cpu(event.desc.opcode);
6065 case i40e_aqc_opc_get_link_status:
6066 i40e_handle_link_event(pf, &event);
6068 case i40e_aqc_opc_send_msg_to_pf:
6069 ret = i40e_vc_process_vf_msg(pf,
6070 le16_to_cpu(event.desc.retval),
6071 le32_to_cpu(event.desc.cookie_high),
6072 le32_to_cpu(event.desc.cookie_low),
6076 case i40e_aqc_opc_lldp_update_mib:
6077 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6078 #ifdef CONFIG_I40E_DCB
6080 ret = i40e_handle_lldp_event(pf, &event);
6082 #endif /* CONFIG_I40E_DCB */
6084 case i40e_aqc_opc_event_lan_overflow:
6085 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6086 i40e_handle_lan_overflow_event(pf, &event);
6088 case i40e_aqc_opc_send_msg_to_peer:
6089 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6091 case i40e_aqc_opc_nvm_erase:
6092 case i40e_aqc_opc_nvm_update:
6093 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6096 dev_info(&pf->pdev->dev,
6097 "ARQ Error: Unknown event 0x%04x received\n",
6101 } while (pending && (i++ < pf->adminq_work_limit));
6103 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6104 /* re-enable Admin queue interrupt cause */
6105 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6106 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6107 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6110 kfree(event.msg_buf);
6114 * i40e_verify_eeprom - make sure eeprom is good to use
6115 * @pf: board private structure
6117 static void i40e_verify_eeprom(struct i40e_pf *pf)
6121 err = i40e_diag_eeprom_test(&pf->hw);
6123 /* retry in case of garbage read */
6124 err = i40e_diag_eeprom_test(&pf->hw);
6126 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6128 set_bit(__I40E_BAD_EEPROM, &pf->state);
6132 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6133 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6134 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6139 * i40e_enable_pf_switch_lb
6140 * @pf: pointer to the PF structure
6142 * enable switch loop back or die - no point in a return value
6144 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6146 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6147 struct i40e_vsi_context ctxt;
6150 ctxt.seid = pf->main_vsi_seid;
6151 ctxt.pf_num = pf->hw.pf_id;
6153 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6155 dev_info(&pf->pdev->dev,
6156 "couldn't get PF vsi config, err %s aq_err %s\n",
6157 i40e_stat_str(&pf->hw, ret),
6158 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6161 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6162 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6163 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6165 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6167 dev_info(&pf->pdev->dev,
6168 "update vsi switch failed, err %s aq_err %s\n",
6169 i40e_stat_str(&pf->hw, ret),
6170 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6175 * i40e_disable_pf_switch_lb
6176 * @pf: pointer to the PF structure
6178 * disable switch loop back or die - no point in a return value
6180 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6182 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6183 struct i40e_vsi_context ctxt;
6186 ctxt.seid = pf->main_vsi_seid;
6187 ctxt.pf_num = pf->hw.pf_id;
6189 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6191 dev_info(&pf->pdev->dev,
6192 "couldn't get PF vsi config, err %s aq_err %s\n",
6193 i40e_stat_str(&pf->hw, ret),
6194 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6197 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6198 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6199 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6201 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6203 dev_info(&pf->pdev->dev,
6204 "update vsi switch failed, err %s aq_err %s\n",
6205 i40e_stat_str(&pf->hw, ret),
6206 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6211 * i40e_config_bridge_mode - Configure the HW bridge mode
6212 * @veb: pointer to the bridge instance
6214 * Configure the loop back mode for the LAN VSI that is downlink to the
6215 * specified HW bridge instance. It is expected this function is called
6216 * when a new HW bridge is instantiated.
6218 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6220 struct i40e_pf *pf = veb->pf;
6222 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6223 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6224 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6225 i40e_disable_pf_switch_lb(pf);
6227 i40e_enable_pf_switch_lb(pf);
6231 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6232 * @veb: pointer to the VEB instance
6234 * This is a recursive function that first builds the attached VSIs then
6235 * recurses in to build the next layer of VEB. We track the connections
6236 * through our own index numbers because the seid's from the HW could
6237 * change across the reset.
6239 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6241 struct i40e_vsi *ctl_vsi = NULL;
6242 struct i40e_pf *pf = veb->pf;
6246 /* build VSI that owns this VEB, temporarily attached to base VEB */
6247 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6249 pf->vsi[v]->veb_idx == veb->idx &&
6250 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6251 ctl_vsi = pf->vsi[v];
6256 dev_info(&pf->pdev->dev,
6257 "missing owner VSI for veb_idx %d\n", veb->idx);
6259 goto end_reconstitute;
6261 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6262 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6263 ret = i40e_add_vsi(ctl_vsi);
6265 dev_info(&pf->pdev->dev,
6266 "rebuild of veb_idx %d owner VSI failed: %d\n",
6268 goto end_reconstitute;
6270 i40e_vsi_reset_stats(ctl_vsi);
6272 /* create the VEB in the switch and move the VSI onto the VEB */
6273 ret = i40e_add_veb(veb, ctl_vsi);
6275 goto end_reconstitute;
6277 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6278 veb->bridge_mode = BRIDGE_MODE_VEB;
6280 veb->bridge_mode = BRIDGE_MODE_VEPA;
6281 i40e_config_bridge_mode(veb);
6283 /* create the remaining VSIs attached to this VEB */
6284 for (v = 0; v < pf->num_alloc_vsi; v++) {
6285 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6288 if (pf->vsi[v]->veb_idx == veb->idx) {
6289 struct i40e_vsi *vsi = pf->vsi[v];
6290 vsi->uplink_seid = veb->seid;
6291 ret = i40e_add_vsi(vsi);
6293 dev_info(&pf->pdev->dev,
6294 "rebuild of vsi_idx %d failed: %d\n",
6296 goto end_reconstitute;
6298 i40e_vsi_reset_stats(vsi);
6302 /* create any VEBs attached to this VEB - RECURSION */
6303 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6304 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6305 pf->veb[veb_idx]->uplink_seid = veb->seid;
6306 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6317 * i40e_get_capabilities - get info about the HW
6318 * @pf: the PF struct
6320 static int i40e_get_capabilities(struct i40e_pf *pf)
6322 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6327 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6329 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6333 /* this loads the data into the hw struct for us */
6334 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6336 i40e_aqc_opc_list_func_capabilities,
6338 /* data loaded, buffer no longer needed */
6341 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6342 /* retry with a larger buffer */
6343 buf_len = data_size;
6344 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6345 dev_info(&pf->pdev->dev,
6346 "capability discovery failed, err %s aq_err %s\n",
6347 i40e_stat_str(&pf->hw, err),
6348 i40e_aq_str(&pf->hw,
6349 pf->hw.aq.asq_last_status));
6354 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6355 (pf->hw.aq.fw_maj_ver < 2)) {
6356 pf->hw.func_caps.num_msix_vectors++;
6357 pf->hw.func_caps.num_msix_vectors_vf++;
6360 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6361 dev_info(&pf->pdev->dev,
6362 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6363 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6364 pf->hw.func_caps.num_msix_vectors,
6365 pf->hw.func_caps.num_msix_vectors_vf,
6366 pf->hw.func_caps.fd_filters_guaranteed,
6367 pf->hw.func_caps.fd_filters_best_effort,
6368 pf->hw.func_caps.num_tx_qp,
6369 pf->hw.func_caps.num_vsis);
6371 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6372 + pf->hw.func_caps.num_vfs)
6373 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6374 dev_info(&pf->pdev->dev,
6375 "got num_vsis %d, setting num_vsis to %d\n",
6376 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6377 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6383 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6386 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6387 * @pf: board private structure
6389 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6391 struct i40e_vsi *vsi;
6394 /* quick workaround for an NVM issue that leaves a critical register
6397 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6398 static const u32 hkey[] = {
6399 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6400 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6401 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6404 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6405 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6408 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6411 /* find existing VSI and see if it needs configuring */
6413 for (i = 0; i < pf->num_alloc_vsi; i++) {
6414 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6420 /* create a new VSI if none exists */
6422 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6423 pf->vsi[pf->lan_vsi]->seid, 0);
6425 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6426 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6431 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6435 * i40e_fdir_teardown - release the Flow Director resources
6436 * @pf: board private structure
6438 static void i40e_fdir_teardown(struct i40e_pf *pf)
6442 i40e_fdir_filter_exit(pf);
6443 for (i = 0; i < pf->num_alloc_vsi; i++) {
6444 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6445 i40e_vsi_release(pf->vsi[i]);
6452 * i40e_prep_for_reset - prep for the core to reset
6453 * @pf: board private structure
6455 * Close up the VFs and other things in prep for PF Reset.
6457 static void i40e_prep_for_reset(struct i40e_pf *pf)
6459 struct i40e_hw *hw = &pf->hw;
6460 i40e_status ret = 0;
6463 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6464 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6467 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6469 /* quiesce the VSIs and their queues that are not already DOWN */
6470 i40e_pf_quiesce_all_vsi(pf);
6472 for (v = 0; v < pf->num_alloc_vsi; v++) {
6474 pf->vsi[v]->seid = 0;
6477 i40e_shutdown_adminq(&pf->hw);
6479 /* call shutdown HMC */
6480 if (hw->hmc.hmc_obj) {
6481 ret = i40e_shutdown_lan_hmc(hw);
6483 dev_warn(&pf->pdev->dev,
6484 "shutdown_lan_hmc failed: %d\n", ret);
6489 * i40e_send_version - update firmware with driver version
6492 static void i40e_send_version(struct i40e_pf *pf)
6494 struct i40e_driver_version dv;
6496 dv.major_version = DRV_VERSION_MAJOR;
6497 dv.minor_version = DRV_VERSION_MINOR;
6498 dv.build_version = DRV_VERSION_BUILD;
6499 dv.subbuild_version = 0;
6500 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6501 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6505 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6506 * @pf: board private structure
6507 * @reinit: if the Main VSI needs to re-initialized.
6509 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6511 struct i40e_hw *hw = &pf->hw;
6512 u8 set_fc_aq_fail = 0;
6516 /* Now we wait for GRST to settle out.
6517 * We don't have to delete the VEBs or VSIs from the hw switch
6518 * because the reset will make them disappear.
6520 ret = i40e_pf_reset(hw);
6522 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6523 set_bit(__I40E_RESET_FAILED, &pf->state);
6524 goto clear_recovery;
6528 if (test_bit(__I40E_DOWN, &pf->state))
6529 goto clear_recovery;
6530 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6532 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6533 ret = i40e_init_adminq(&pf->hw);
6535 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6536 i40e_stat_str(&pf->hw, ret),
6537 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6538 goto clear_recovery;
6541 /* re-verify the eeprom if we just had an EMP reset */
6542 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6543 i40e_verify_eeprom(pf);
6545 i40e_clear_pxe_mode(hw);
6546 ret = i40e_get_capabilities(pf);
6548 goto end_core_reset;
6550 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6551 hw->func_caps.num_rx_qp,
6552 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6554 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6555 goto end_core_reset;
6557 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6559 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6560 goto end_core_reset;
6563 #ifdef CONFIG_I40E_DCB
6564 ret = i40e_init_pf_dcb(pf);
6566 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6567 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6568 /* Continue without DCB enabled */
6570 #endif /* CONFIG_I40E_DCB */
6572 ret = i40e_init_pf_fcoe(pf);
6574 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6577 /* do basic switch setup */
6578 ret = i40e_setup_pf_switch(pf, reinit);
6580 goto end_core_reset;
6582 /* driver is only interested in link up/down and module qualification
6583 * reports from firmware
6585 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6586 I40E_AQ_EVENT_LINK_UPDOWN |
6587 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6589 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6590 i40e_stat_str(&pf->hw, ret),
6591 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6593 /* make sure our flow control settings are restored */
6594 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6596 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6597 i40e_stat_str(&pf->hw, ret),
6598 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6600 /* Rebuild the VSIs and VEBs that existed before reset.
6601 * They are still in our local switch element arrays, so only
6602 * need to rebuild the switch model in the HW.
6604 * If there were VEBs but the reconstitution failed, we'll try
6605 * try to recover minimal use by getting the basic PF VSI working.
6607 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6608 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6609 /* find the one VEB connected to the MAC, and find orphans */
6610 for (v = 0; v < I40E_MAX_VEB; v++) {
6614 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6615 pf->veb[v]->uplink_seid == 0) {
6616 ret = i40e_reconstitute_veb(pf->veb[v]);
6621 /* If Main VEB failed, we're in deep doodoo,
6622 * so give up rebuilding the switch and set up
6623 * for minimal rebuild of PF VSI.
6624 * If orphan failed, we'll report the error
6625 * but try to keep going.
6627 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6628 dev_info(&pf->pdev->dev,
6629 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6631 pf->vsi[pf->lan_vsi]->uplink_seid
6634 } else if (pf->veb[v]->uplink_seid == 0) {
6635 dev_info(&pf->pdev->dev,
6636 "rebuild of orphan VEB failed: %d\n",
6643 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6644 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6645 /* no VEB, so rebuild only the Main VSI */
6646 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6648 dev_info(&pf->pdev->dev,
6649 "rebuild of Main VSI failed: %d\n", ret);
6650 goto end_core_reset;
6654 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6655 (pf->hw.aq.fw_maj_ver < 4)) {
6657 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6659 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6660 i40e_stat_str(&pf->hw, ret),
6661 i40e_aq_str(&pf->hw,
6662 pf->hw.aq.asq_last_status));
6664 /* reinit the misc interrupt */
6665 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6666 ret = i40e_setup_misc_vector(pf);
6668 /* restart the VSIs that were rebuilt and running before the reset */
6669 i40e_pf_unquiesce_all_vsi(pf);
6671 if (pf->num_alloc_vfs) {
6672 for (v = 0; v < pf->num_alloc_vfs; v++)
6673 i40e_reset_vf(&pf->vf[v], true);
6676 /* tell the firmware that we're starting */
6677 i40e_send_version(pf);
6680 clear_bit(__I40E_RESET_FAILED, &pf->state);
6682 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6686 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6687 * @pf: board private structure
6689 * Close up the VFs and other things in prep for a Core Reset,
6690 * then get ready to rebuild the world.
6692 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6694 i40e_prep_for_reset(pf);
6695 i40e_reset_and_rebuild(pf, false);
6699 * i40e_handle_mdd_event
6700 * @pf: pointer to the PF structure
6702 * Called from the MDD irq handler to identify possibly malicious vfs
6704 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6706 struct i40e_hw *hw = &pf->hw;
6707 bool mdd_detected = false;
6708 bool pf_mdd_detected = false;
6713 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6716 /* find what triggered the MDD event */
6717 reg = rd32(hw, I40E_GL_MDET_TX);
6718 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6719 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6720 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6721 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6722 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6723 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6724 I40E_GL_MDET_TX_EVENT_SHIFT;
6725 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6726 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6727 pf->hw.func_caps.base_queue;
6728 if (netif_msg_tx_err(pf))
6729 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6730 event, queue, pf_num, vf_num);
6731 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6732 mdd_detected = true;
6734 reg = rd32(hw, I40E_GL_MDET_RX);
6735 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6736 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6737 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6738 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6739 I40E_GL_MDET_RX_EVENT_SHIFT;
6740 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6741 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6742 pf->hw.func_caps.base_queue;
6743 if (netif_msg_rx_err(pf))
6744 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6745 event, queue, func);
6746 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6747 mdd_detected = true;
6751 reg = rd32(hw, I40E_PF_MDET_TX);
6752 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6753 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6754 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6755 pf_mdd_detected = true;
6757 reg = rd32(hw, I40E_PF_MDET_RX);
6758 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6759 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6760 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6761 pf_mdd_detected = true;
6763 /* Queue belongs to the PF, initiate a reset */
6764 if (pf_mdd_detected) {
6765 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6766 i40e_service_event_schedule(pf);
6770 /* see if one of the VFs needs its hand slapped */
6771 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6773 reg = rd32(hw, I40E_VP_MDET_TX(i));
6774 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6775 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6776 vf->num_mdd_events++;
6777 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6781 reg = rd32(hw, I40E_VP_MDET_RX(i));
6782 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6783 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6784 vf->num_mdd_events++;
6785 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6789 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6790 dev_info(&pf->pdev->dev,
6791 "Too many MDD events on VF %d, disabled\n", i);
6792 dev_info(&pf->pdev->dev,
6793 "Use PF Control I/F to re-enable the VF\n");
6794 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6798 /* re-enable mdd interrupt cause */
6799 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6800 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6801 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6802 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6806 #ifdef CONFIG_I40E_VXLAN
6808 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6809 * @pf: board private structure
6811 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6813 struct i40e_hw *hw = &pf->hw;
6818 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6821 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6823 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6824 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6825 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6826 port = pf->vxlan_ports[i];
6828 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6829 I40E_AQC_TUNNEL_TYPE_VXLAN,
6832 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6835 dev_info(&pf->pdev->dev,
6836 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6837 port ? "add" : "delete",
6839 i40e_stat_str(&pf->hw, ret),
6840 i40e_aq_str(&pf->hw,
6841 pf->hw.aq.asq_last_status));
6842 pf->vxlan_ports[i] = 0;
6850 * i40e_service_task - Run the driver's async subtasks
6851 * @work: pointer to work_struct containing our data
6853 static void i40e_service_task(struct work_struct *work)
6855 struct i40e_pf *pf = container_of(work,
6858 unsigned long start_time = jiffies;
6860 /* don't bother with service tasks if a reset is in progress */
6861 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6862 i40e_service_event_complete(pf);
6866 i40e_detect_recover_hung(pf);
6867 i40e_reset_subtask(pf);
6868 i40e_handle_mdd_event(pf);
6869 i40e_vc_process_vflr_event(pf);
6870 i40e_watchdog_subtask(pf);
6871 i40e_fdir_reinit_subtask(pf);
6872 i40e_sync_filters_subtask(pf);
6873 #ifdef CONFIG_I40E_VXLAN
6874 i40e_sync_vxlan_filters_subtask(pf);
6876 i40e_clean_adminq_subtask(pf);
6878 i40e_service_event_complete(pf);
6880 /* If the tasks have taken longer than one timer cycle or there
6881 * is more work to be done, reschedule the service task now
6882 * rather than wait for the timer to tick again.
6884 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6885 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6886 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6887 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6888 i40e_service_event_schedule(pf);
6892 * i40e_service_timer - timer callback
6893 * @data: pointer to PF struct
6895 static void i40e_service_timer(unsigned long data)
6897 struct i40e_pf *pf = (struct i40e_pf *)data;
6899 mod_timer(&pf->service_timer,
6900 round_jiffies(jiffies + pf->service_timer_period));
6901 i40e_service_event_schedule(pf);
6905 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6906 * @vsi: the VSI being configured
6908 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6910 struct i40e_pf *pf = vsi->back;
6912 switch (vsi->type) {
6914 vsi->alloc_queue_pairs = pf->num_lan_qps;
6915 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6916 I40E_REQ_DESCRIPTOR_MULTIPLE);
6917 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6918 vsi->num_q_vectors = pf->num_lan_msix;
6920 vsi->num_q_vectors = 1;
6925 vsi->alloc_queue_pairs = 1;
6926 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6927 I40E_REQ_DESCRIPTOR_MULTIPLE);
6928 vsi->num_q_vectors = 1;
6931 case I40E_VSI_VMDQ2:
6932 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6933 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6934 I40E_REQ_DESCRIPTOR_MULTIPLE);
6935 vsi->num_q_vectors = pf->num_vmdq_msix;
6938 case I40E_VSI_SRIOV:
6939 vsi->alloc_queue_pairs = pf->num_vf_qps;
6940 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6941 I40E_REQ_DESCRIPTOR_MULTIPLE);
6946 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6947 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6948 I40E_REQ_DESCRIPTOR_MULTIPLE);
6949 vsi->num_q_vectors = pf->num_fcoe_msix;
6952 #endif /* I40E_FCOE */
6962 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6963 * @type: VSI pointer
6964 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6966 * On error: returns error code (negative)
6967 * On success: returns 0
6969 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6974 /* allocate memory for both Tx and Rx ring pointers */
6975 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6976 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6979 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6981 if (alloc_qvectors) {
6982 /* allocate memory for q_vector pointers */
6983 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6984 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6985 if (!vsi->q_vectors) {
6993 kfree(vsi->tx_rings);
6998 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6999 * @pf: board private structure
7000 * @type: type of VSI
7002 * On error: returns error code (negative)
7003 * On success: returns vsi index in PF (positive)
7005 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7008 struct i40e_vsi *vsi;
7012 /* Need to protect the allocation of the VSIs at the PF level */
7013 mutex_lock(&pf->switch_mutex);
7015 /* VSI list may be fragmented if VSI creation/destruction has
7016 * been happening. We can afford to do a quick scan to look
7017 * for any free VSIs in the list.
7019 * find next empty vsi slot, looping back around if necessary
7022 while (i < pf->num_alloc_vsi && pf->vsi[i])
7024 if (i >= pf->num_alloc_vsi) {
7026 while (i < pf->next_vsi && pf->vsi[i])
7030 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7031 vsi_idx = i; /* Found one! */
7034 goto unlock_pf; /* out of VSI slots! */
7038 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7045 set_bit(__I40E_DOWN, &vsi->state);
7048 vsi->rx_itr_setting = pf->rx_itr_default;
7049 vsi->tx_itr_setting = pf->tx_itr_default;
7050 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7051 pf->rss_table_size : 64;
7052 vsi->netdev_registered = false;
7053 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7054 INIT_LIST_HEAD(&vsi->mac_filter_list);
7055 vsi->irqs_ready = false;
7057 ret = i40e_set_num_rings_in_vsi(vsi);
7061 ret = i40e_vsi_alloc_arrays(vsi, true);
7065 /* Setup default MSIX irq handler for VSI */
7066 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7068 pf->vsi[vsi_idx] = vsi;
7073 pf->next_vsi = i - 1;
7076 mutex_unlock(&pf->switch_mutex);
7081 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7082 * @type: VSI pointer
7083 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7085 * On error: returns error code (negative)
7086 * On success: returns 0
7088 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7090 /* free the ring and vector containers */
7091 if (free_qvectors) {
7092 kfree(vsi->q_vectors);
7093 vsi->q_vectors = NULL;
7095 kfree(vsi->tx_rings);
7096 vsi->tx_rings = NULL;
7097 vsi->rx_rings = NULL;
7101 * i40e_vsi_clear - Deallocate the VSI provided
7102 * @vsi: the VSI being un-configured
7104 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7115 mutex_lock(&pf->switch_mutex);
7116 if (!pf->vsi[vsi->idx]) {
7117 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7118 vsi->idx, vsi->idx, vsi, vsi->type);
7122 if (pf->vsi[vsi->idx] != vsi) {
7123 dev_err(&pf->pdev->dev,
7124 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7125 pf->vsi[vsi->idx]->idx,
7127 pf->vsi[vsi->idx]->type,
7128 vsi->idx, vsi, vsi->type);
7132 /* updates the PF for this cleared vsi */
7133 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7134 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7136 i40e_vsi_free_arrays(vsi, true);
7138 pf->vsi[vsi->idx] = NULL;
7139 if (vsi->idx < pf->next_vsi)
7140 pf->next_vsi = vsi->idx;
7143 mutex_unlock(&pf->switch_mutex);
7151 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7152 * @vsi: the VSI being cleaned
7154 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7158 if (vsi->tx_rings && vsi->tx_rings[0]) {
7159 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7160 kfree_rcu(vsi->tx_rings[i], rcu);
7161 vsi->tx_rings[i] = NULL;
7162 vsi->rx_rings[i] = NULL;
7168 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7169 * @vsi: the VSI being configured
7171 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7173 struct i40e_ring *tx_ring, *rx_ring;
7174 struct i40e_pf *pf = vsi->back;
7177 /* Set basic values in the rings to be used later during open() */
7178 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7179 /* allocate space for both Tx and Rx in one shot */
7180 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7184 tx_ring->queue_index = i;
7185 tx_ring->reg_idx = vsi->base_queue + i;
7186 tx_ring->ring_active = false;
7188 tx_ring->netdev = vsi->netdev;
7189 tx_ring->dev = &pf->pdev->dev;
7190 tx_ring->count = vsi->num_desc;
7192 tx_ring->dcb_tc = 0;
7193 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7194 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7195 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7196 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7197 vsi->tx_rings[i] = tx_ring;
7199 rx_ring = &tx_ring[1];
7200 rx_ring->queue_index = i;
7201 rx_ring->reg_idx = vsi->base_queue + i;
7202 rx_ring->ring_active = false;
7204 rx_ring->netdev = vsi->netdev;
7205 rx_ring->dev = &pf->pdev->dev;
7206 rx_ring->count = vsi->num_desc;
7208 rx_ring->dcb_tc = 0;
7209 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7210 set_ring_16byte_desc_enabled(rx_ring);
7212 clear_ring_16byte_desc_enabled(rx_ring);
7213 vsi->rx_rings[i] = rx_ring;
7219 i40e_vsi_clear_rings(vsi);
7224 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7225 * @pf: board private structure
7226 * @vectors: the number of MSI-X vectors to request
7228 * Returns the number of vectors reserved, or error
7230 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7232 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7233 I40E_MIN_MSIX, vectors);
7235 dev_info(&pf->pdev->dev,
7236 "MSI-X vector reservation failed: %d\n", vectors);
7244 * i40e_init_msix - Setup the MSIX capability
7245 * @pf: board private structure
7247 * Work with the OS to set up the MSIX vectors needed.
7249 * Returns the number of vectors reserved or negative on failure
7251 static int i40e_init_msix(struct i40e_pf *pf)
7253 struct i40e_hw *hw = &pf->hw;
7258 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7261 /* The number of vectors we'll request will be comprised of:
7262 * - Add 1 for "other" cause for Admin Queue events, etc.
7263 * - The number of LAN queue pairs
7264 * - Queues being used for RSS.
7265 * We don't need as many as max_rss_size vectors.
7266 * use rss_size instead in the calculation since that
7267 * is governed by number of cpus in the system.
7268 * - assumes symmetric Tx/Rx pairing
7269 * - The number of VMDq pairs
7271 * - The number of FCOE qps.
7273 * Once we count this up, try the request.
7275 * If we can't get what we want, we'll simplify to nearly nothing
7276 * and try again. If that still fails, we punt.
7278 vectors_left = hw->func_caps.num_msix_vectors;
7281 /* reserve one vector for miscellaneous handler */
7287 /* reserve vectors for the main PF traffic queues */
7288 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7289 vectors_left -= pf->num_lan_msix;
7290 v_budget += pf->num_lan_msix;
7292 /* reserve one vector for sideband flow director */
7293 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7298 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7303 /* can we reserve enough for FCoE? */
7304 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7306 pf->num_fcoe_msix = 0;
7307 else if (vectors_left >= pf->num_fcoe_qps)
7308 pf->num_fcoe_msix = pf->num_fcoe_qps;
7310 pf->num_fcoe_msix = 1;
7311 v_budget += pf->num_fcoe_msix;
7312 vectors_left -= pf->num_fcoe_msix;
7316 /* any vectors left over go for VMDq support */
7317 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7318 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7319 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7321 /* if we're short on vectors for what's desired, we limit
7322 * the queues per vmdq. If this is still more than are
7323 * available, the user will need to change the number of
7324 * queues/vectors used by the PF later with the ethtool
7327 if (vmdq_vecs < vmdq_vecs_wanted)
7328 pf->num_vmdq_qps = 1;
7329 pf->num_vmdq_msix = pf->num_vmdq_qps;
7331 v_budget += vmdq_vecs;
7332 vectors_left -= vmdq_vecs;
7335 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7337 if (!pf->msix_entries)
7340 for (i = 0; i < v_budget; i++)
7341 pf->msix_entries[i].entry = i;
7342 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7344 if (v_actual != v_budget) {
7345 /* If we have limited resources, we will start with no vectors
7346 * for the special features and then allocate vectors to some
7347 * of these features based on the policy and at the end disable
7348 * the features that did not get any vectors.
7351 pf->num_fcoe_qps = 0;
7352 pf->num_fcoe_msix = 0;
7354 pf->num_vmdq_msix = 0;
7357 if (v_actual < I40E_MIN_MSIX) {
7358 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7359 kfree(pf->msix_entries);
7360 pf->msix_entries = NULL;
7363 } else if (v_actual == I40E_MIN_MSIX) {
7364 /* Adjust for minimal MSIX use */
7365 pf->num_vmdq_vsis = 0;
7366 pf->num_vmdq_qps = 0;
7367 pf->num_lan_qps = 1;
7368 pf->num_lan_msix = 1;
7370 } else if (v_actual != v_budget) {
7373 /* reserve the misc vector */
7376 /* Scale vector usage down */
7377 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7378 pf->num_vmdq_vsis = 1;
7379 pf->num_vmdq_qps = 1;
7380 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7382 /* partition out the remaining vectors */
7385 pf->num_lan_msix = 1;
7389 /* give one vector to FCoE */
7390 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7391 pf->num_lan_msix = 1;
7392 pf->num_fcoe_msix = 1;
7395 pf->num_lan_msix = 2;
7400 /* give one vector to FCoE */
7401 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7402 pf->num_fcoe_msix = 1;
7406 /* give the rest to the PF */
7407 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7412 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7413 (pf->num_vmdq_msix == 0)) {
7414 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7415 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7419 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7420 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7421 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7428 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7429 * @vsi: the VSI being configured
7430 * @v_idx: index of the vector in the vsi struct
7432 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7434 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7436 struct i40e_q_vector *q_vector;
7438 /* allocate q_vector */
7439 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7443 q_vector->vsi = vsi;
7444 q_vector->v_idx = v_idx;
7445 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7447 netif_napi_add(vsi->netdev, &q_vector->napi,
7448 i40e_napi_poll, NAPI_POLL_WEIGHT);
7450 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7451 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7453 /* tie q_vector and vsi together */
7454 vsi->q_vectors[v_idx] = q_vector;
7460 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7461 * @vsi: the VSI being configured
7463 * We allocate one q_vector per queue interrupt. If allocation fails we
7466 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7468 struct i40e_pf *pf = vsi->back;
7469 int v_idx, num_q_vectors;
7472 /* if not MSIX, give the one vector only to the LAN VSI */
7473 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7474 num_q_vectors = vsi->num_q_vectors;
7475 else if (vsi == pf->vsi[pf->lan_vsi])
7480 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7481 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7490 i40e_free_q_vector(vsi, v_idx);
7496 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7497 * @pf: board private structure to initialize
7499 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7504 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7505 vectors = i40e_init_msix(pf);
7507 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7509 I40E_FLAG_FCOE_ENABLED |
7511 I40E_FLAG_RSS_ENABLED |
7512 I40E_FLAG_DCB_CAPABLE |
7513 I40E_FLAG_SRIOV_ENABLED |
7514 I40E_FLAG_FD_SB_ENABLED |
7515 I40E_FLAG_FD_ATR_ENABLED |
7516 I40E_FLAG_VMDQ_ENABLED);
7518 /* rework the queue expectations without MSIX */
7519 i40e_determine_queue_usage(pf);
7523 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7524 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7525 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7526 vectors = pci_enable_msi(pf->pdev);
7528 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7530 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7532 vectors = 1; /* one MSI or Legacy vector */
7535 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7536 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7538 /* set up vector assignment tracking */
7539 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7540 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7541 if (!pf->irq_pile) {
7542 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7545 pf->irq_pile->num_entries = vectors;
7546 pf->irq_pile->search_hint = 0;
7548 /* track first vector for misc interrupts, ignore return */
7549 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7555 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7556 * @pf: board private structure
7558 * This sets up the handler for MSIX 0, which is used to manage the
7559 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7560 * when in MSI or Legacy interrupt mode.
7562 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7564 struct i40e_hw *hw = &pf->hw;
7567 /* Only request the irq if this is the first time through, and
7568 * not when we're rebuilding after a Reset
7570 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7571 err = request_irq(pf->msix_entries[0].vector,
7572 i40e_intr, 0, pf->int_name, pf);
7574 dev_info(&pf->pdev->dev,
7575 "request_irq for %s failed: %d\n",
7581 i40e_enable_misc_int_causes(pf);
7583 /* associate no queues to the misc vector */
7584 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7585 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7589 i40e_irq_dynamic_enable_icr0(pf);
7595 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7596 * @vsi: vsi structure
7597 * @seed: RSS hash seed
7599 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7601 struct i40e_aqc_get_set_rss_key_data rss_key;
7602 struct i40e_pf *pf = vsi->back;
7603 struct i40e_hw *hw = &pf->hw;
7604 bool pf_lut = false;
7608 memset(&rss_key, 0, sizeof(rss_key));
7609 memcpy(&rss_key, seed, sizeof(rss_key));
7611 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7615 /* Populate the LUT with max no. of queues in round robin fashion */
7616 for (i = 0; i < vsi->rss_table_size; i++)
7617 rss_lut[i] = i % vsi->rss_size;
7619 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7621 dev_info(&pf->pdev->dev,
7622 "Cannot set RSS key, err %s aq_err %s\n",
7623 i40e_stat_str(&pf->hw, ret),
7624 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7628 if (vsi->type == I40E_VSI_MAIN)
7631 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7632 vsi->rss_table_size);
7634 dev_info(&pf->pdev->dev,
7635 "Cannot set RSS lut, err %s aq_err %s\n",
7636 i40e_stat_str(&pf->hw, ret),
7637 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7643 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7644 * @vsi: VSI structure
7646 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7648 u8 seed[I40E_HKEY_ARRAY_SIZE];
7649 struct i40e_pf *pf = vsi->back;
7651 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7652 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7654 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7655 return i40e_config_rss_aq(vsi, seed);
7661 * i40e_config_rss_reg - Prepare for RSS if used
7662 * @pf: board private structure
7663 * @seed: RSS hash seed
7665 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7667 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7668 struct i40e_hw *hw = &pf->hw;
7669 u32 *seed_dw = (u32 *)seed;
7670 u32 current_queue = 0;
7674 /* Fill out hash function seed */
7675 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7676 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7678 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7680 for (j = 0; j < 4; j++) {
7681 if (current_queue == vsi->rss_size)
7683 lut |= ((current_queue) << (8 * j));
7686 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7694 * i40e_config_rss - Prepare for RSS if used
7695 * @pf: board private structure
7697 static int i40e_config_rss(struct i40e_pf *pf)
7699 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7700 u8 seed[I40E_HKEY_ARRAY_SIZE];
7701 struct i40e_hw *hw = &pf->hw;
7705 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7707 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7708 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7709 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7710 hena |= i40e_pf_get_default_rss_hena(pf);
7712 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7713 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7715 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7717 /* Determine the RSS table size based on the hardware capabilities */
7718 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7719 reg_val = (pf->rss_table_size == 512) ?
7720 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7721 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7722 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7724 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7725 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7727 return i40e_config_rss_reg(pf, seed);
7731 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7732 * @pf: board private structure
7733 * @queue_count: the requested queue count for rss.
7735 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7736 * count which may be different from the requested queue count.
7738 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7740 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7743 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7746 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7748 if (queue_count != vsi->num_queue_pairs) {
7749 vsi->req_queue_pairs = queue_count;
7750 i40e_prep_for_reset(pf);
7752 pf->rss_size = new_rss_size;
7754 i40e_reset_and_rebuild(pf, true);
7755 i40e_config_rss(pf);
7757 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7758 return pf->rss_size;
7762 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7763 * @pf: board private structure
7765 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7768 bool min_valid, max_valid;
7771 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7772 &min_valid, &max_valid);
7776 pf->npar_min_bw = min_bw;
7778 pf->npar_max_bw = max_bw;
7785 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7786 * @pf: board private structure
7788 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7790 struct i40e_aqc_configure_partition_bw_data bw_data;
7793 /* Set the valid bit for this PF */
7794 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7795 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7796 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7798 /* Set the new bandwidths */
7799 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7805 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7806 * @pf: board private structure
7808 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7810 /* Commit temporary BW setting to permanent NVM image */
7811 enum i40e_admin_queue_err last_aq_status;
7815 if (pf->hw.partition_id != 1) {
7816 dev_info(&pf->pdev->dev,
7817 "Commit BW only works on partition 1! This is partition %d",
7818 pf->hw.partition_id);
7819 ret = I40E_NOT_SUPPORTED;
7823 /* Acquire NVM for read access */
7824 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7825 last_aq_status = pf->hw.aq.asq_last_status;
7827 dev_info(&pf->pdev->dev,
7828 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7829 i40e_stat_str(&pf->hw, ret),
7830 i40e_aq_str(&pf->hw, last_aq_status));
7834 /* Read word 0x10 of NVM - SW compatibility word 1 */
7835 ret = i40e_aq_read_nvm(&pf->hw,
7836 I40E_SR_NVM_CONTROL_WORD,
7837 0x10, sizeof(nvm_word), &nvm_word,
7839 /* Save off last admin queue command status before releasing
7842 last_aq_status = pf->hw.aq.asq_last_status;
7843 i40e_release_nvm(&pf->hw);
7845 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7846 i40e_stat_str(&pf->hw, ret),
7847 i40e_aq_str(&pf->hw, last_aq_status));
7851 /* Wait a bit for NVM release to complete */
7854 /* Acquire NVM for write access */
7855 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7856 last_aq_status = pf->hw.aq.asq_last_status;
7858 dev_info(&pf->pdev->dev,
7859 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7860 i40e_stat_str(&pf->hw, ret),
7861 i40e_aq_str(&pf->hw, last_aq_status));
7864 /* Write it back out unchanged to initiate update NVM,
7865 * which will force a write of the shadow (alt) RAM to
7866 * the NVM - thus storing the bandwidth values permanently.
7868 ret = i40e_aq_update_nvm(&pf->hw,
7869 I40E_SR_NVM_CONTROL_WORD,
7870 0x10, sizeof(nvm_word),
7871 &nvm_word, true, NULL);
7872 /* Save off last admin queue command status before releasing
7875 last_aq_status = pf->hw.aq.asq_last_status;
7876 i40e_release_nvm(&pf->hw);
7878 dev_info(&pf->pdev->dev,
7879 "BW settings NOT SAVED, err %s aq_err %s\n",
7880 i40e_stat_str(&pf->hw, ret),
7881 i40e_aq_str(&pf->hw, last_aq_status));
7888 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7889 * @pf: board private structure to initialize
7891 * i40e_sw_init initializes the Adapter private data structure.
7892 * Fields are initialized based on PCI device information and
7893 * OS network device settings (MTU size).
7895 static int i40e_sw_init(struct i40e_pf *pf)
7900 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7901 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7902 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7903 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7904 if (I40E_DEBUG_USER & debug)
7905 pf->hw.debug_mask = debug;
7906 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7907 I40E_DEFAULT_MSG_ENABLE);
7910 /* Set default capability flags */
7911 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7912 I40E_FLAG_MSI_ENABLED |
7913 I40E_FLAG_MSIX_ENABLED;
7915 if (iommu_present(&pci_bus_type))
7916 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7918 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7920 /* Set default ITR */
7921 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7922 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7924 /* Depending on PF configurations, it is possible that the RSS
7925 * maximum might end up larger than the available queues
7927 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7929 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7930 pf->rss_size_max = min_t(int, pf->rss_size_max,
7931 pf->hw.func_caps.num_tx_qp);
7932 if (pf->hw.func_caps.rss) {
7933 pf->flags |= I40E_FLAG_RSS_ENABLED;
7934 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7937 /* MFP mode enabled */
7938 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7939 pf->flags |= I40E_FLAG_MFP_ENABLED;
7940 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7941 if (i40e_get_npar_bw_setting(pf))
7942 dev_warn(&pf->pdev->dev,
7943 "Could not get NPAR bw settings\n");
7945 dev_info(&pf->pdev->dev,
7946 "Min BW = %8.8x, Max BW = %8.8x\n",
7947 pf->npar_min_bw, pf->npar_max_bw);
7950 /* FW/NVM is not yet fixed in this regard */
7951 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7952 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7953 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7954 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7955 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7956 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7958 dev_info(&pf->pdev->dev,
7959 "Flow Director Sideband mode Disabled in MFP mode\n");
7961 pf->fdir_pf_filter_count =
7962 pf->hw.func_caps.fd_filters_guaranteed;
7963 pf->hw.fdir_shared_filter_count =
7964 pf->hw.func_caps.fd_filters_best_effort;
7967 if (pf->hw.func_caps.vmdq) {
7968 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7969 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7973 err = i40e_init_pf_fcoe(pf);
7975 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7977 #endif /* I40E_FCOE */
7978 #ifdef CONFIG_PCI_IOV
7979 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7980 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7981 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7982 pf->num_req_vfs = min_t(int,
7983 pf->hw.func_caps.num_vfs,
7986 #endif /* CONFIG_PCI_IOV */
7987 if (pf->hw.mac.type == I40E_MAC_X722) {
7988 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7989 I40E_FLAG_128_QP_RSS_CAPABLE |
7990 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7991 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7992 I40E_FLAG_WB_ON_ITR_CAPABLE |
7993 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7995 pf->eeprom_version = 0xDEAD;
7996 pf->lan_veb = I40E_NO_VEB;
7997 pf->lan_vsi = I40E_NO_VSI;
7999 /* set up queue assignment tracking */
8000 size = sizeof(struct i40e_lump_tracking)
8001 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8002 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8007 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8008 pf->qp_pile->search_hint = 0;
8010 pf->tx_timeout_recovery_level = 1;
8012 mutex_init(&pf->switch_mutex);
8014 /* If NPAR is enabled nudge the Tx scheduler */
8015 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8016 i40e_set_npar_bw_setting(pf);
8023 * i40e_set_ntuple - set the ntuple feature flag and take action
8024 * @pf: board private structure to initialize
8025 * @features: the feature set that the stack is suggesting
8027 * returns a bool to indicate if reset needs to happen
8029 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8031 bool need_reset = false;
8033 /* Check if Flow Director n-tuple support was enabled or disabled. If
8034 * the state changed, we need to reset.
8036 if (features & NETIF_F_NTUPLE) {
8037 /* Enable filters and mark for reset */
8038 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8040 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8042 /* turn off filters, mark for reset and clear SW filter list */
8043 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8045 i40e_fdir_filter_exit(pf);
8047 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8048 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8049 /* reset fd counters */
8050 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8051 pf->fdir_pf_active_filters = 0;
8052 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8053 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8054 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8055 /* if ATR was auto disabled it can be re-enabled. */
8056 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8057 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8058 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8064 * i40e_set_features - set the netdev feature flags
8065 * @netdev: ptr to the netdev being adjusted
8066 * @features: the feature set that the stack is suggesting
8068 static int i40e_set_features(struct net_device *netdev,
8069 netdev_features_t features)
8071 struct i40e_netdev_priv *np = netdev_priv(netdev);
8072 struct i40e_vsi *vsi = np->vsi;
8073 struct i40e_pf *pf = vsi->back;
8076 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8077 i40e_vlan_stripping_enable(vsi);
8079 i40e_vlan_stripping_disable(vsi);
8081 need_reset = i40e_set_ntuple(pf, features);
8084 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8089 #ifdef CONFIG_I40E_VXLAN
8091 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8092 * @pf: board private structure
8093 * @port: The UDP port to look up
8095 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8097 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8101 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8102 if (pf->vxlan_ports[i] == port)
8110 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8111 * @netdev: This physical port's netdev
8112 * @sa_family: Socket Family that VXLAN is notifying us about
8113 * @port: New UDP port number that VXLAN started listening to
8115 static void i40e_add_vxlan_port(struct net_device *netdev,
8116 sa_family_t sa_family, __be16 port)
8118 struct i40e_netdev_priv *np = netdev_priv(netdev);
8119 struct i40e_vsi *vsi = np->vsi;
8120 struct i40e_pf *pf = vsi->back;
8124 if (sa_family == AF_INET6)
8127 idx = i40e_get_vxlan_port_idx(pf, port);
8129 /* Check if port already exists */
8130 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8131 netdev_info(netdev, "vxlan port %d already offloaded\n",
8136 /* Now check if there is space to add the new port */
8137 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8139 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8140 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8145 /* New port: add it and mark its index in the bitmap */
8146 pf->vxlan_ports[next_idx] = port;
8147 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8148 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8152 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8153 * @netdev: This physical port's netdev
8154 * @sa_family: Socket Family that VXLAN is notifying us about
8155 * @port: UDP port number that VXLAN stopped listening to
8157 static void i40e_del_vxlan_port(struct net_device *netdev,
8158 sa_family_t sa_family, __be16 port)
8160 struct i40e_netdev_priv *np = netdev_priv(netdev);
8161 struct i40e_vsi *vsi = np->vsi;
8162 struct i40e_pf *pf = vsi->back;
8165 if (sa_family == AF_INET6)
8168 idx = i40e_get_vxlan_port_idx(pf, port);
8170 /* Check if port already exists */
8171 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8172 /* if port exists, set it to 0 (mark for deletion)
8173 * and make it pending
8175 pf->vxlan_ports[idx] = 0;
8176 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8177 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8179 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8185 static int i40e_get_phys_port_id(struct net_device *netdev,
8186 struct netdev_phys_item_id *ppid)
8188 struct i40e_netdev_priv *np = netdev_priv(netdev);
8189 struct i40e_pf *pf = np->vsi->back;
8190 struct i40e_hw *hw = &pf->hw;
8192 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8195 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8196 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8202 * i40e_ndo_fdb_add - add an entry to the hardware database
8203 * @ndm: the input from the stack
8204 * @tb: pointer to array of nladdr (unused)
8205 * @dev: the net device pointer
8206 * @addr: the MAC address entry being added
8207 * @flags: instructions from stack about fdb operation
8209 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8210 struct net_device *dev,
8211 const unsigned char *addr, u16 vid,
8214 struct i40e_netdev_priv *np = netdev_priv(dev);
8215 struct i40e_pf *pf = np->vsi->back;
8218 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8222 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8226 /* Hardware does not support aging addresses so if a
8227 * ndm_state is given only allow permanent addresses
8229 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8230 netdev_info(dev, "FDB only supports static addresses\n");
8234 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8235 err = dev_uc_add_excl(dev, addr);
8236 else if (is_multicast_ether_addr(addr))
8237 err = dev_mc_add_excl(dev, addr);
8241 /* Only return duplicate errors if NLM_F_EXCL is set */
8242 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8249 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8250 * @dev: the netdev being configured
8251 * @nlh: RTNL message
8253 * Inserts a new hardware bridge if not already created and
8254 * enables the bridging mode requested (VEB or VEPA). If the
8255 * hardware bridge has already been inserted and the request
8256 * is to change the mode then that requires a PF reset to
8257 * allow rebuild of the components with required hardware
8258 * bridge mode enabled.
8260 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8261 struct nlmsghdr *nlh,
8264 struct i40e_netdev_priv *np = netdev_priv(dev);
8265 struct i40e_vsi *vsi = np->vsi;
8266 struct i40e_pf *pf = vsi->back;
8267 struct i40e_veb *veb = NULL;
8268 struct nlattr *attr, *br_spec;
8271 /* Only for PF VSI for now */
8272 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8275 /* Find the HW bridge for PF VSI */
8276 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8277 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8281 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8283 nla_for_each_nested(attr, br_spec, rem) {
8286 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8289 mode = nla_get_u16(attr);
8290 if ((mode != BRIDGE_MODE_VEPA) &&
8291 (mode != BRIDGE_MODE_VEB))
8294 /* Insert a new HW bridge */
8296 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8297 vsi->tc_config.enabled_tc);
8299 veb->bridge_mode = mode;
8300 i40e_config_bridge_mode(veb);
8302 /* No Bridge HW offload available */
8306 } else if (mode != veb->bridge_mode) {
8307 /* Existing HW bridge but different mode needs reset */
8308 veb->bridge_mode = mode;
8309 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8310 if (mode == BRIDGE_MODE_VEB)
8311 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8313 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8314 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8323 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8326 * @seq: RTNL message seq #
8327 * @dev: the netdev being configured
8328 * @filter_mask: unused
8330 * Return the mode in which the hardware bridge is operating in
8333 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8334 struct net_device *dev,
8335 u32 filter_mask, int nlflags)
8337 struct i40e_netdev_priv *np = netdev_priv(dev);
8338 struct i40e_vsi *vsi = np->vsi;
8339 struct i40e_pf *pf = vsi->back;
8340 struct i40e_veb *veb = NULL;
8343 /* Only for PF VSI for now */
8344 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8347 /* Find the HW bridge for the PF VSI */
8348 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8349 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8356 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8357 nlflags, 0, 0, filter_mask, NULL);
8360 #define I40E_MAX_TUNNEL_HDR_LEN 80
8362 * i40e_features_check - Validate encapsulated packet conforms to limits
8364 * @netdev: This physical port's netdev
8365 * @features: Offload features that the stack believes apply
8367 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8368 struct net_device *dev,
8369 netdev_features_t features)
8371 if (skb->encapsulation &&
8372 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8373 I40E_MAX_TUNNEL_HDR_LEN))
8374 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8379 static const struct net_device_ops i40e_netdev_ops = {
8380 .ndo_open = i40e_open,
8381 .ndo_stop = i40e_close,
8382 .ndo_start_xmit = i40e_lan_xmit_frame,
8383 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8384 .ndo_set_rx_mode = i40e_set_rx_mode,
8385 .ndo_validate_addr = eth_validate_addr,
8386 .ndo_set_mac_address = i40e_set_mac,
8387 .ndo_change_mtu = i40e_change_mtu,
8388 .ndo_do_ioctl = i40e_ioctl,
8389 .ndo_tx_timeout = i40e_tx_timeout,
8390 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8391 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8392 #ifdef CONFIG_NET_POLL_CONTROLLER
8393 .ndo_poll_controller = i40e_netpoll,
8395 .ndo_setup_tc = i40e_setup_tc,
8397 .ndo_fcoe_enable = i40e_fcoe_enable,
8398 .ndo_fcoe_disable = i40e_fcoe_disable,
8400 .ndo_set_features = i40e_set_features,
8401 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8402 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8403 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8404 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8405 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8406 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8407 #ifdef CONFIG_I40E_VXLAN
8408 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8409 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8411 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8412 .ndo_fdb_add = i40e_ndo_fdb_add,
8413 .ndo_features_check = i40e_features_check,
8414 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8415 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8419 * i40e_config_netdev - Setup the netdev flags
8420 * @vsi: the VSI being configured
8422 * Returns 0 on success, negative value on failure
8424 static int i40e_config_netdev(struct i40e_vsi *vsi)
8426 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8427 struct i40e_pf *pf = vsi->back;
8428 struct i40e_hw *hw = &pf->hw;
8429 struct i40e_netdev_priv *np;
8430 struct net_device *netdev;
8431 u8 mac_addr[ETH_ALEN];
8434 etherdev_size = sizeof(struct i40e_netdev_priv);
8435 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8439 vsi->netdev = netdev;
8440 np = netdev_priv(netdev);
8443 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8444 NETIF_F_GSO_UDP_TUNNEL |
8447 netdev->features = NETIF_F_SG |
8451 NETIF_F_GSO_UDP_TUNNEL |
8452 NETIF_F_HW_VLAN_CTAG_TX |
8453 NETIF_F_HW_VLAN_CTAG_RX |
8454 NETIF_F_HW_VLAN_CTAG_FILTER |
8463 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8464 netdev->features |= NETIF_F_NTUPLE;
8466 /* copy netdev features into list of user selectable features */
8467 netdev->hw_features |= netdev->features;
8469 if (vsi->type == I40E_VSI_MAIN) {
8470 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8471 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8472 /* The following steps are necessary to prevent reception
8473 * of tagged packets - some older NVM configurations load a
8474 * default a MAC-VLAN filter that accepts any tagged packet
8475 * which must be replaced by a normal filter.
8477 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8478 i40e_add_filter(vsi, mac_addr,
8479 I40E_VLAN_ANY, false, true);
8481 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8482 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8483 pf->vsi[pf->lan_vsi]->netdev->name);
8484 random_ether_addr(mac_addr);
8485 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8487 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8489 ether_addr_copy(netdev->dev_addr, mac_addr);
8490 ether_addr_copy(netdev->perm_addr, mac_addr);
8491 /* vlan gets same features (except vlan offload)
8492 * after any tweaks for specific VSI types
8494 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8495 NETIF_F_HW_VLAN_CTAG_RX |
8496 NETIF_F_HW_VLAN_CTAG_FILTER);
8497 netdev->priv_flags |= IFF_UNICAST_FLT;
8498 netdev->priv_flags |= IFF_SUPP_NOFCS;
8499 /* Setup netdev TC information */
8500 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8502 netdev->netdev_ops = &i40e_netdev_ops;
8503 netdev->watchdog_timeo = 5 * HZ;
8504 i40e_set_ethtool_ops(netdev);
8506 i40e_fcoe_config_netdev(netdev, vsi);
8513 * i40e_vsi_delete - Delete a VSI from the switch
8514 * @vsi: the VSI being removed
8516 * Returns 0 on success, negative value on failure
8518 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8520 /* remove default VSI is not allowed */
8521 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8524 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8528 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8529 * @vsi: the VSI being queried
8531 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8533 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8535 struct i40e_veb *veb;
8536 struct i40e_pf *pf = vsi->back;
8538 /* Uplink is not a bridge so default to VEB */
8539 if (vsi->veb_idx == I40E_NO_VEB)
8542 veb = pf->veb[vsi->veb_idx];
8543 /* Uplink is a bridge in VEPA mode */
8544 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8547 /* Uplink is a bridge in VEB mode */
8552 * i40e_add_vsi - Add a VSI to the switch
8553 * @vsi: the VSI being configured
8555 * This initializes a VSI context depending on the VSI type to be added and
8556 * passes it down to the add_vsi aq command.
8558 static int i40e_add_vsi(struct i40e_vsi *vsi)
8561 struct i40e_mac_filter *f, *ftmp;
8562 struct i40e_pf *pf = vsi->back;
8563 struct i40e_hw *hw = &pf->hw;
8564 struct i40e_vsi_context ctxt;
8565 u8 enabled_tc = 0x1; /* TC0 enabled */
8568 memset(&ctxt, 0, sizeof(ctxt));
8569 switch (vsi->type) {
8571 /* The PF's main VSI is already setup as part of the
8572 * device initialization, so we'll not bother with
8573 * the add_vsi call, but we will retrieve the current
8576 ctxt.seid = pf->main_vsi_seid;
8577 ctxt.pf_num = pf->hw.pf_id;
8579 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8580 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8582 dev_info(&pf->pdev->dev,
8583 "couldn't get PF vsi config, err %s aq_err %s\n",
8584 i40e_stat_str(&pf->hw, ret),
8585 i40e_aq_str(&pf->hw,
8586 pf->hw.aq.asq_last_status));
8589 vsi->info = ctxt.info;
8590 vsi->info.valid_sections = 0;
8592 vsi->seid = ctxt.seid;
8593 vsi->id = ctxt.vsi_number;
8595 enabled_tc = i40e_pf_get_tc_map(pf);
8597 /* MFP mode setup queue map and update VSI */
8598 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8599 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8600 memset(&ctxt, 0, sizeof(ctxt));
8601 ctxt.seid = pf->main_vsi_seid;
8602 ctxt.pf_num = pf->hw.pf_id;
8604 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8605 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8607 dev_info(&pf->pdev->dev,
8608 "update vsi failed, err %s aq_err %s\n",
8609 i40e_stat_str(&pf->hw, ret),
8610 i40e_aq_str(&pf->hw,
8611 pf->hw.aq.asq_last_status));
8615 /* update the local VSI info queue map */
8616 i40e_vsi_update_queue_map(vsi, &ctxt);
8617 vsi->info.valid_sections = 0;
8619 /* Default/Main VSI is only enabled for TC0
8620 * reconfigure it to enable all TCs that are
8621 * available on the port in SFP mode.
8622 * For MFP case the iSCSI PF would use this
8623 * flow to enable LAN+iSCSI TC.
8625 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8627 dev_info(&pf->pdev->dev,
8628 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8630 i40e_stat_str(&pf->hw, ret),
8631 i40e_aq_str(&pf->hw,
8632 pf->hw.aq.asq_last_status));
8639 ctxt.pf_num = hw->pf_id;
8641 ctxt.uplink_seid = vsi->uplink_seid;
8642 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8643 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8644 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8645 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8646 ctxt.info.valid_sections |=
8647 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8648 ctxt.info.switch_id =
8649 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8651 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8654 case I40E_VSI_VMDQ2:
8655 ctxt.pf_num = hw->pf_id;
8657 ctxt.uplink_seid = vsi->uplink_seid;
8658 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8659 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8661 /* This VSI is connected to VEB so the switch_id
8662 * should be set to zero by default.
8664 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8665 ctxt.info.valid_sections |=
8666 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8667 ctxt.info.switch_id =
8668 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8671 /* Setup the VSI tx/rx queue map for TC0 only for now */
8672 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8675 case I40E_VSI_SRIOV:
8676 ctxt.pf_num = hw->pf_id;
8677 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8678 ctxt.uplink_seid = vsi->uplink_seid;
8679 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8680 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8682 /* This VSI is connected to VEB so the switch_id
8683 * should be set to zero by default.
8685 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8686 ctxt.info.valid_sections |=
8687 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8688 ctxt.info.switch_id =
8689 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8692 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8693 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8694 if (pf->vf[vsi->vf_id].spoofchk) {
8695 ctxt.info.valid_sections |=
8696 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8697 ctxt.info.sec_flags |=
8698 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8699 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8701 /* Setup the VSI tx/rx queue map for TC0 only for now */
8702 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8707 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8709 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8714 #endif /* I40E_FCOE */
8719 if (vsi->type != I40E_VSI_MAIN) {
8720 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8722 dev_info(&vsi->back->pdev->dev,
8723 "add vsi failed, err %s aq_err %s\n",
8724 i40e_stat_str(&pf->hw, ret),
8725 i40e_aq_str(&pf->hw,
8726 pf->hw.aq.asq_last_status));
8730 vsi->info = ctxt.info;
8731 vsi->info.valid_sections = 0;
8732 vsi->seid = ctxt.seid;
8733 vsi->id = ctxt.vsi_number;
8736 /* If macvlan filters already exist, force them to get loaded */
8737 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8741 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8742 struct i40e_aqc_remove_macvlan_element_data element;
8744 memset(&element, 0, sizeof(element));
8745 ether_addr_copy(element.mac_addr, f->macaddr);
8746 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8747 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8750 /* some older FW has a different default */
8752 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8753 i40e_aq_remove_macvlan(hw, vsi->seid,
8757 i40e_aq_mac_address_write(hw,
8758 I40E_AQC_WRITE_TYPE_LAA_WOL,
8763 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8764 pf->flags |= I40E_FLAG_FILTER_SYNC;
8767 /* Update VSI BW information */
8768 ret = i40e_vsi_get_bw_info(vsi);
8770 dev_info(&pf->pdev->dev,
8771 "couldn't get vsi bw info, err %s aq_err %s\n",
8772 i40e_stat_str(&pf->hw, ret),
8773 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8774 /* VSI is already added so not tearing that up */
8783 * i40e_vsi_release - Delete a VSI and free its resources
8784 * @vsi: the VSI being removed
8786 * Returns 0 on success or < 0 on error
8788 int i40e_vsi_release(struct i40e_vsi *vsi)
8790 struct i40e_mac_filter *f, *ftmp;
8791 struct i40e_veb *veb = NULL;
8798 /* release of a VEB-owner or last VSI is not allowed */
8799 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8800 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8801 vsi->seid, vsi->uplink_seid);
8804 if (vsi == pf->vsi[pf->lan_vsi] &&
8805 !test_bit(__I40E_DOWN, &pf->state)) {
8806 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8810 uplink_seid = vsi->uplink_seid;
8811 if (vsi->type != I40E_VSI_SRIOV) {
8812 if (vsi->netdev_registered) {
8813 vsi->netdev_registered = false;
8815 /* results in a call to i40e_close() */
8816 unregister_netdev(vsi->netdev);
8819 i40e_vsi_close(vsi);
8821 i40e_vsi_disable_irq(vsi);
8824 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8825 i40e_del_filter(vsi, f->macaddr, f->vlan,
8826 f->is_vf, f->is_netdev);
8827 i40e_sync_vsi_filters(vsi, false);
8829 i40e_vsi_delete(vsi);
8830 i40e_vsi_free_q_vectors(vsi);
8832 free_netdev(vsi->netdev);
8835 i40e_vsi_clear_rings(vsi);
8836 i40e_vsi_clear(vsi);
8838 /* If this was the last thing on the VEB, except for the
8839 * controlling VSI, remove the VEB, which puts the controlling
8840 * VSI onto the next level down in the switch.
8842 * Well, okay, there's one more exception here: don't remove
8843 * the orphan VEBs yet. We'll wait for an explicit remove request
8844 * from up the network stack.
8846 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8848 pf->vsi[i]->uplink_seid == uplink_seid &&
8849 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8850 n++; /* count the VSIs */
8853 for (i = 0; i < I40E_MAX_VEB; i++) {
8856 if (pf->veb[i]->uplink_seid == uplink_seid)
8857 n++; /* count the VEBs */
8858 if (pf->veb[i]->seid == uplink_seid)
8861 if (n == 0 && veb && veb->uplink_seid != 0)
8862 i40e_veb_release(veb);
8868 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8869 * @vsi: ptr to the VSI
8871 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8872 * corresponding SW VSI structure and initializes num_queue_pairs for the
8873 * newly allocated VSI.
8875 * Returns 0 on success or negative on failure
8877 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8880 struct i40e_pf *pf = vsi->back;
8882 if (vsi->q_vectors[0]) {
8883 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8888 if (vsi->base_vector) {
8889 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8890 vsi->seid, vsi->base_vector);
8894 ret = i40e_vsi_alloc_q_vectors(vsi);
8896 dev_info(&pf->pdev->dev,
8897 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8898 vsi->num_q_vectors, vsi->seid, ret);
8899 vsi->num_q_vectors = 0;
8900 goto vector_setup_out;
8903 /* In Legacy mode, we do not have to get any other vector since we
8904 * piggyback on the misc/ICR0 for queue interrupts.
8906 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8908 if (vsi->num_q_vectors)
8909 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8910 vsi->num_q_vectors, vsi->idx);
8911 if (vsi->base_vector < 0) {
8912 dev_info(&pf->pdev->dev,
8913 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8914 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8915 i40e_vsi_free_q_vectors(vsi);
8917 goto vector_setup_out;
8925 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8926 * @vsi: pointer to the vsi.
8928 * This re-allocates a vsi's queue resources.
8930 * Returns pointer to the successfully allocated and configured VSI sw struct
8931 * on success, otherwise returns NULL on failure.
8933 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8935 struct i40e_pf *pf = vsi->back;
8939 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8940 i40e_vsi_clear_rings(vsi);
8942 i40e_vsi_free_arrays(vsi, false);
8943 i40e_set_num_rings_in_vsi(vsi);
8944 ret = i40e_vsi_alloc_arrays(vsi, false);
8948 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8950 dev_info(&pf->pdev->dev,
8951 "failed to get tracking for %d queues for VSI %d err %d\n",
8952 vsi->alloc_queue_pairs, vsi->seid, ret);
8955 vsi->base_queue = ret;
8957 /* Update the FW view of the VSI. Force a reset of TC and queue
8958 * layout configurations.
8960 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8961 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8962 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8963 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8965 /* assign it some queues */
8966 ret = i40e_alloc_rings(vsi);
8970 /* map all of the rings to the q_vectors */
8971 i40e_vsi_map_rings_to_vectors(vsi);
8975 i40e_vsi_free_q_vectors(vsi);
8976 if (vsi->netdev_registered) {
8977 vsi->netdev_registered = false;
8978 unregister_netdev(vsi->netdev);
8979 free_netdev(vsi->netdev);
8982 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8984 i40e_vsi_clear(vsi);
8989 * i40e_vsi_setup - Set up a VSI by a given type
8990 * @pf: board private structure
8992 * @uplink_seid: the switch element to link to
8993 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8995 * This allocates the sw VSI structure and its queue resources, then add a VSI
8996 * to the identified VEB.
8998 * Returns pointer to the successfully allocated and configure VSI sw struct on
8999 * success, otherwise returns NULL on failure.
9001 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9002 u16 uplink_seid, u32 param1)
9004 struct i40e_vsi *vsi = NULL;
9005 struct i40e_veb *veb = NULL;
9009 /* The requested uplink_seid must be either
9010 * - the PF's port seid
9011 * no VEB is needed because this is the PF
9012 * or this is a Flow Director special case VSI
9013 * - seid of an existing VEB
9014 * - seid of a VSI that owns an existing VEB
9015 * - seid of a VSI that doesn't own a VEB
9016 * a new VEB is created and the VSI becomes the owner
9017 * - seid of the PF VSI, which is what creates the first VEB
9018 * this is a special case of the previous
9020 * Find which uplink_seid we were given and create a new VEB if needed
9022 for (i = 0; i < I40E_MAX_VEB; i++) {
9023 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9029 if (!veb && uplink_seid != pf->mac_seid) {
9031 for (i = 0; i < pf->num_alloc_vsi; i++) {
9032 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9038 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9043 if (vsi->uplink_seid == pf->mac_seid)
9044 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9045 vsi->tc_config.enabled_tc);
9046 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9047 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9048 vsi->tc_config.enabled_tc);
9050 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9051 dev_info(&vsi->back->pdev->dev,
9052 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
9056 /* We come up by default in VEPA mode if SRIOV is not
9057 * already enabled, in which case we can't force VEPA
9060 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9061 veb->bridge_mode = BRIDGE_MODE_VEPA;
9062 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9064 i40e_config_bridge_mode(veb);
9066 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9067 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9071 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9075 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9076 uplink_seid = veb->seid;
9079 /* get vsi sw struct */
9080 v_idx = i40e_vsi_mem_alloc(pf, type);
9083 vsi = pf->vsi[v_idx];
9087 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9089 if (type == I40E_VSI_MAIN)
9090 pf->lan_vsi = v_idx;
9091 else if (type == I40E_VSI_SRIOV)
9092 vsi->vf_id = param1;
9093 /* assign it some queues */
9094 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9097 dev_info(&pf->pdev->dev,
9098 "failed to get tracking for %d queues for VSI %d err=%d\n",
9099 vsi->alloc_queue_pairs, vsi->seid, ret);
9102 vsi->base_queue = ret;
9104 /* get a VSI from the hardware */
9105 vsi->uplink_seid = uplink_seid;
9106 ret = i40e_add_vsi(vsi);
9110 switch (vsi->type) {
9111 /* setup the netdev if needed */
9113 case I40E_VSI_VMDQ2:
9115 ret = i40e_config_netdev(vsi);
9118 ret = register_netdev(vsi->netdev);
9121 vsi->netdev_registered = true;
9122 netif_carrier_off(vsi->netdev);
9123 #ifdef CONFIG_I40E_DCB
9124 /* Setup DCB netlink interface */
9125 i40e_dcbnl_setup(vsi);
9126 #endif /* CONFIG_I40E_DCB */
9130 /* set up vectors and rings if needed */
9131 ret = i40e_vsi_setup_vectors(vsi);
9135 ret = i40e_alloc_rings(vsi);
9139 /* map all of the rings to the q_vectors */
9140 i40e_vsi_map_rings_to_vectors(vsi);
9142 i40e_vsi_reset_stats(vsi);
9146 /* no netdev or rings for the other VSI types */
9150 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9151 (vsi->type == I40E_VSI_VMDQ2)) {
9152 ret = i40e_vsi_config_rss(vsi);
9157 i40e_vsi_free_q_vectors(vsi);
9159 if (vsi->netdev_registered) {
9160 vsi->netdev_registered = false;
9161 unregister_netdev(vsi->netdev);
9162 free_netdev(vsi->netdev);
9166 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9168 i40e_vsi_clear(vsi);
9174 * i40e_veb_get_bw_info - Query VEB BW information
9175 * @veb: the veb to query
9177 * Query the Tx scheduler BW configuration data for given VEB
9179 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9181 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9182 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9183 struct i40e_pf *pf = veb->pf;
9184 struct i40e_hw *hw = &pf->hw;
9189 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9192 dev_info(&pf->pdev->dev,
9193 "query veb bw config failed, err %s aq_err %s\n",
9194 i40e_stat_str(&pf->hw, ret),
9195 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9199 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9202 dev_info(&pf->pdev->dev,
9203 "query veb bw ets config failed, err %s aq_err %s\n",
9204 i40e_stat_str(&pf->hw, ret),
9205 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9209 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9210 veb->bw_max_quanta = ets_data.tc_bw_max;
9211 veb->is_abs_credits = bw_data.absolute_credits_enable;
9212 veb->enabled_tc = ets_data.tc_valid_bits;
9213 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9214 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9215 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9216 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9217 veb->bw_tc_limit_credits[i] =
9218 le16_to_cpu(bw_data.tc_bw_limits[i]);
9219 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9227 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9228 * @pf: board private structure
9230 * On error: returns error code (negative)
9231 * On success: returns vsi index in PF (positive)
9233 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9236 struct i40e_veb *veb;
9239 /* Need to protect the allocation of switch elements at the PF level */
9240 mutex_lock(&pf->switch_mutex);
9242 /* VEB list may be fragmented if VEB creation/destruction has
9243 * been happening. We can afford to do a quick scan to look
9244 * for any free slots in the list.
9246 * find next empty veb slot, looping back around if necessary
9249 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9251 if (i >= I40E_MAX_VEB) {
9253 goto err_alloc_veb; /* out of VEB slots! */
9256 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9263 veb->enabled_tc = 1;
9268 mutex_unlock(&pf->switch_mutex);
9273 * i40e_switch_branch_release - Delete a branch of the switch tree
9274 * @branch: where to start deleting
9276 * This uses recursion to find the tips of the branch to be
9277 * removed, deleting until we get back to and can delete this VEB.
9279 static void i40e_switch_branch_release(struct i40e_veb *branch)
9281 struct i40e_pf *pf = branch->pf;
9282 u16 branch_seid = branch->seid;
9283 u16 veb_idx = branch->idx;
9286 /* release any VEBs on this VEB - RECURSION */
9287 for (i = 0; i < I40E_MAX_VEB; i++) {
9290 if (pf->veb[i]->uplink_seid == branch->seid)
9291 i40e_switch_branch_release(pf->veb[i]);
9294 /* Release the VSIs on this VEB, but not the owner VSI.
9296 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9297 * the VEB itself, so don't use (*branch) after this loop.
9299 for (i = 0; i < pf->num_alloc_vsi; i++) {
9302 if (pf->vsi[i]->uplink_seid == branch_seid &&
9303 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9304 i40e_vsi_release(pf->vsi[i]);
9308 /* There's one corner case where the VEB might not have been
9309 * removed, so double check it here and remove it if needed.
9310 * This case happens if the veb was created from the debugfs
9311 * commands and no VSIs were added to it.
9313 if (pf->veb[veb_idx])
9314 i40e_veb_release(pf->veb[veb_idx]);
9318 * i40e_veb_clear - remove veb struct
9319 * @veb: the veb to remove
9321 static void i40e_veb_clear(struct i40e_veb *veb)
9327 struct i40e_pf *pf = veb->pf;
9329 mutex_lock(&pf->switch_mutex);
9330 if (pf->veb[veb->idx] == veb)
9331 pf->veb[veb->idx] = NULL;
9332 mutex_unlock(&pf->switch_mutex);
9339 * i40e_veb_release - Delete a VEB and free its resources
9340 * @veb: the VEB being removed
9342 void i40e_veb_release(struct i40e_veb *veb)
9344 struct i40e_vsi *vsi = NULL;
9350 /* find the remaining VSI and check for extras */
9351 for (i = 0; i < pf->num_alloc_vsi; i++) {
9352 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9358 dev_info(&pf->pdev->dev,
9359 "can't remove VEB %d with %d VSIs left\n",
9364 /* move the remaining VSI to uplink veb */
9365 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9366 if (veb->uplink_seid) {
9367 vsi->uplink_seid = veb->uplink_seid;
9368 if (veb->uplink_seid == pf->mac_seid)
9369 vsi->veb_idx = I40E_NO_VEB;
9371 vsi->veb_idx = veb->veb_idx;
9374 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9375 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9378 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9379 i40e_veb_clear(veb);
9383 * i40e_add_veb - create the VEB in the switch
9384 * @veb: the VEB to be instantiated
9385 * @vsi: the controlling VSI
9387 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9389 struct i40e_pf *pf = veb->pf;
9390 bool is_default = veb->pf->cur_promisc;
9391 bool is_cloud = false;
9394 /* get a VEB from the hardware */
9395 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9396 veb->enabled_tc, is_default,
9397 is_cloud, &veb->seid, NULL);
9399 dev_info(&pf->pdev->dev,
9400 "couldn't add VEB, err %s aq_err %s\n",
9401 i40e_stat_str(&pf->hw, ret),
9402 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9406 /* get statistics counter */
9407 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9408 &veb->stats_idx, NULL, NULL, NULL);
9410 dev_info(&pf->pdev->dev,
9411 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9412 i40e_stat_str(&pf->hw, ret),
9413 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9416 ret = i40e_veb_get_bw_info(veb);
9418 dev_info(&pf->pdev->dev,
9419 "couldn't get VEB bw info, err %s aq_err %s\n",
9420 i40e_stat_str(&pf->hw, ret),
9421 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9422 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9426 vsi->uplink_seid = veb->seid;
9427 vsi->veb_idx = veb->idx;
9428 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9434 * i40e_veb_setup - Set up a VEB
9435 * @pf: board private structure
9436 * @flags: VEB setup flags
9437 * @uplink_seid: the switch element to link to
9438 * @vsi_seid: the initial VSI seid
9439 * @enabled_tc: Enabled TC bit-map
9441 * This allocates the sw VEB structure and links it into the switch
9442 * It is possible and legal for this to be a duplicate of an already
9443 * existing VEB. It is also possible for both uplink and vsi seids
9444 * to be zero, in order to create a floating VEB.
9446 * Returns pointer to the successfully allocated VEB sw struct on
9447 * success, otherwise returns NULL on failure.
9449 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9450 u16 uplink_seid, u16 vsi_seid,
9453 struct i40e_veb *veb, *uplink_veb = NULL;
9454 int vsi_idx, veb_idx;
9457 /* if one seid is 0, the other must be 0 to create a floating relay */
9458 if ((uplink_seid == 0 || vsi_seid == 0) &&
9459 (uplink_seid + vsi_seid != 0)) {
9460 dev_info(&pf->pdev->dev,
9461 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9462 uplink_seid, vsi_seid);
9466 /* make sure there is such a vsi and uplink */
9467 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9468 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9470 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9471 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9476 if (uplink_seid && uplink_seid != pf->mac_seid) {
9477 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9478 if (pf->veb[veb_idx] &&
9479 pf->veb[veb_idx]->seid == uplink_seid) {
9480 uplink_veb = pf->veb[veb_idx];
9485 dev_info(&pf->pdev->dev,
9486 "uplink seid %d not found\n", uplink_seid);
9491 /* get veb sw struct */
9492 veb_idx = i40e_veb_mem_alloc(pf);
9495 veb = pf->veb[veb_idx];
9497 veb->uplink_seid = uplink_seid;
9498 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9499 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9501 /* create the VEB in the switch */
9502 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9505 if (vsi_idx == pf->lan_vsi)
9506 pf->lan_veb = veb->idx;
9511 i40e_veb_clear(veb);
9517 * i40e_setup_pf_switch_element - set PF vars based on switch type
9518 * @pf: board private structure
9519 * @ele: element we are building info from
9520 * @num_reported: total number of elements
9521 * @printconfig: should we print the contents
9523 * helper function to assist in extracting a few useful SEID values.
9525 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9526 struct i40e_aqc_switch_config_element_resp *ele,
9527 u16 num_reported, bool printconfig)
9529 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9530 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9531 u8 element_type = ele->element_type;
9532 u16 seid = le16_to_cpu(ele->seid);
9535 dev_info(&pf->pdev->dev,
9536 "type=%d seid=%d uplink=%d downlink=%d\n",
9537 element_type, seid, uplink_seid, downlink_seid);
9539 switch (element_type) {
9540 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9541 pf->mac_seid = seid;
9543 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9545 if (uplink_seid != pf->mac_seid)
9547 if (pf->lan_veb == I40E_NO_VEB) {
9550 /* find existing or else empty VEB */
9551 for (v = 0; v < I40E_MAX_VEB; v++) {
9552 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9557 if (pf->lan_veb == I40E_NO_VEB) {
9558 v = i40e_veb_mem_alloc(pf);
9565 pf->veb[pf->lan_veb]->seid = seid;
9566 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9567 pf->veb[pf->lan_veb]->pf = pf;
9568 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9570 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9571 if (num_reported != 1)
9573 /* This is immediately after a reset so we can assume this is
9576 pf->mac_seid = uplink_seid;
9577 pf->pf_seid = downlink_seid;
9578 pf->main_vsi_seid = seid;
9580 dev_info(&pf->pdev->dev,
9581 "pf_seid=%d main_vsi_seid=%d\n",
9582 pf->pf_seid, pf->main_vsi_seid);
9584 case I40E_SWITCH_ELEMENT_TYPE_PF:
9585 case I40E_SWITCH_ELEMENT_TYPE_VF:
9586 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9587 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9588 case I40E_SWITCH_ELEMENT_TYPE_PE:
9589 case I40E_SWITCH_ELEMENT_TYPE_PA:
9590 /* ignore these for now */
9593 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9594 element_type, seid);
9600 * i40e_fetch_switch_configuration - Get switch config from firmware
9601 * @pf: board private structure
9602 * @printconfig: should we print the contents
9604 * Get the current switch configuration from the device and
9605 * extract a few useful SEID values.
9607 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9609 struct i40e_aqc_get_switch_config_resp *sw_config;
9615 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9619 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9621 u16 num_reported, num_total;
9623 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9627 dev_info(&pf->pdev->dev,
9628 "get switch config failed err %s aq_err %s\n",
9629 i40e_stat_str(&pf->hw, ret),
9630 i40e_aq_str(&pf->hw,
9631 pf->hw.aq.asq_last_status));
9636 num_reported = le16_to_cpu(sw_config->header.num_reported);
9637 num_total = le16_to_cpu(sw_config->header.num_total);
9640 dev_info(&pf->pdev->dev,
9641 "header: %d reported %d total\n",
9642 num_reported, num_total);
9644 for (i = 0; i < num_reported; i++) {
9645 struct i40e_aqc_switch_config_element_resp *ele =
9646 &sw_config->element[i];
9648 i40e_setup_pf_switch_element(pf, ele, num_reported,
9651 } while (next_seid != 0);
9658 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9659 * @pf: board private structure
9660 * @reinit: if the Main VSI needs to re-initialized.
9662 * Returns 0 on success, negative value on failure
9664 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9668 /* find out what's out there already */
9669 ret = i40e_fetch_switch_configuration(pf, false);
9671 dev_info(&pf->pdev->dev,
9672 "couldn't fetch switch config, err %s aq_err %s\n",
9673 i40e_stat_str(&pf->hw, ret),
9674 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9677 i40e_pf_reset_stats(pf);
9679 /* first time setup */
9680 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9681 struct i40e_vsi *vsi = NULL;
9684 /* Set up the PF VSI associated with the PF's main VSI
9685 * that is already in the HW switch
9687 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9688 uplink_seid = pf->veb[pf->lan_veb]->seid;
9690 uplink_seid = pf->mac_seid;
9691 if (pf->lan_vsi == I40E_NO_VSI)
9692 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9694 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9696 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9697 i40e_fdir_teardown(pf);
9701 /* force a reset of TC and queue layout configurations */
9702 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9703 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9704 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9705 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9707 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9709 i40e_fdir_sb_setup(pf);
9711 /* Setup static PF queue filter control settings */
9712 ret = i40e_setup_pf_filter_control(pf);
9714 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9716 /* Failure here should not stop continuing other steps */
9719 /* enable RSS in the HW, even for only one queue, as the stack can use
9722 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9723 i40e_config_rss(pf);
9725 /* fill in link information and enable LSE reporting */
9726 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9727 i40e_link_event(pf);
9729 /* Initialize user-specific link properties */
9730 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9731 I40E_AQ_AN_COMPLETED) ? true : false);
9739 * i40e_determine_queue_usage - Work out queue distribution
9740 * @pf: board private structure
9742 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9746 pf->num_lan_qps = 0;
9748 pf->num_fcoe_qps = 0;
9751 /* Find the max queues to be put into basic use. We'll always be
9752 * using TC0, whether or not DCB is running, and TC0 will get the
9755 queues_left = pf->hw.func_caps.num_tx_qp;
9757 if ((queues_left == 1) ||
9758 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9759 /* one qp for PF, no queues for anything else */
9761 pf->rss_size = pf->num_lan_qps = 1;
9763 /* make sure all the fancies are disabled */
9764 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9766 I40E_FLAG_FCOE_ENABLED |
9768 I40E_FLAG_FD_SB_ENABLED |
9769 I40E_FLAG_FD_ATR_ENABLED |
9770 I40E_FLAG_DCB_CAPABLE |
9771 I40E_FLAG_SRIOV_ENABLED |
9772 I40E_FLAG_VMDQ_ENABLED);
9773 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9774 I40E_FLAG_FD_SB_ENABLED |
9775 I40E_FLAG_FD_ATR_ENABLED |
9776 I40E_FLAG_DCB_CAPABLE))) {
9778 pf->rss_size = pf->num_lan_qps = 1;
9779 queues_left -= pf->num_lan_qps;
9781 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9783 I40E_FLAG_FCOE_ENABLED |
9785 I40E_FLAG_FD_SB_ENABLED |
9786 I40E_FLAG_FD_ATR_ENABLED |
9787 I40E_FLAG_DCB_ENABLED |
9788 I40E_FLAG_VMDQ_ENABLED);
9790 /* Not enough queues for all TCs */
9791 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9792 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9793 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9794 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9796 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9798 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9799 pf->hw.func_caps.num_tx_qp);
9801 queues_left -= pf->num_lan_qps;
9805 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9806 if (I40E_DEFAULT_FCOE <= queues_left) {
9807 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9808 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9809 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9811 pf->num_fcoe_qps = 0;
9812 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9813 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9816 queues_left -= pf->num_fcoe_qps;
9820 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9821 if (queues_left > 1) {
9822 queues_left -= 1; /* save 1 queue for FD */
9824 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9825 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9829 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9830 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9831 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9832 (queues_left / pf->num_vf_qps));
9833 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9836 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9837 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9838 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9839 (queues_left / pf->num_vmdq_qps));
9840 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9843 pf->queues_left = queues_left;
9845 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9850 * i40e_setup_pf_filter_control - Setup PF static filter control
9851 * @pf: PF to be setup
9853 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9854 * settings. If PE/FCoE are enabled then it will also set the per PF
9855 * based filter sizes required for them. It also enables Flow director,
9856 * ethertype and macvlan type filter settings for the pf.
9858 * Returns 0 on success, negative on failure
9860 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9862 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9864 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9866 /* Flow Director is enabled */
9867 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9868 settings->enable_fdir = true;
9870 /* Ethtype and MACVLAN filters enabled for PF */
9871 settings->enable_ethtype = true;
9872 settings->enable_macvlan = true;
9874 if (i40e_set_filter_control(&pf->hw, settings))
9880 #define INFO_STRING_LEN 255
9881 static void i40e_print_features(struct i40e_pf *pf)
9883 struct i40e_hw *hw = &pf->hw;
9886 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9888 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9894 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9895 #ifdef CONFIG_PCI_IOV
9896 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9898 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9899 pf->hw.func_caps.num_vsis,
9900 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9901 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9903 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9904 buf += sprintf(buf, "RSS ");
9905 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9906 buf += sprintf(buf, "FD_ATR ");
9907 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9908 buf += sprintf(buf, "FD_SB ");
9909 buf += sprintf(buf, "NTUPLE ");
9911 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9912 buf += sprintf(buf, "DCB ");
9913 if (pf->flags & I40E_FLAG_PTP)
9914 buf += sprintf(buf, "PTP ");
9916 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9917 buf += sprintf(buf, "FCOE ");
9920 BUG_ON(buf > (string + INFO_STRING_LEN));
9921 dev_info(&pf->pdev->dev, "%s\n", string);
9926 * i40e_probe - Device initialization routine
9927 * @pdev: PCI device information struct
9928 * @ent: entry in i40e_pci_tbl
9930 * i40e_probe initializes a PF identified by a pci_dev structure.
9931 * The OS initialization, configuring of the PF private structure,
9932 * and a hardware reset occur.
9934 * Returns 0 on success, negative on failure
9936 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9938 struct i40e_aq_get_phy_abilities_resp abilities;
9941 static u16 pfs_found;
9947 err = pci_enable_device_mem(pdev);
9951 /* set up for high or low dma */
9952 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9954 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9957 "DMA configuration failed: 0x%x\n", err);
9962 /* set up pci connections */
9963 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9964 IORESOURCE_MEM), i40e_driver_name);
9966 dev_info(&pdev->dev,
9967 "pci_request_selected_regions failed %d\n", err);
9971 pci_enable_pcie_error_reporting(pdev);
9972 pci_set_master(pdev);
9974 /* Now that we have a PCI connection, we need to do the
9975 * low level device setup. This is primarily setting up
9976 * the Admin Queue structures and then querying for the
9977 * device's current profile information.
9979 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9986 set_bit(__I40E_DOWN, &pf->state);
9991 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
9992 I40E_MAX_CSR_SPACE);
9994 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
9997 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9998 (unsigned int)pci_resource_start(pdev, 0),
9999 pf->ioremap_len, err);
10002 hw->vendor_id = pdev->vendor;
10003 hw->device_id = pdev->device;
10004 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10005 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10006 hw->subsystem_device_id = pdev->subsystem_device;
10007 hw->bus.device = PCI_SLOT(pdev->devfn);
10008 hw->bus.func = PCI_FUNC(pdev->devfn);
10009 pf->instance = pfs_found;
10012 pf->msg_enable = pf->hw.debug_mask;
10013 pf->msg_enable = debug;
10016 /* do a special CORER for clearing PXE mode once at init */
10017 if (hw->revision_id == 0 &&
10018 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10019 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10024 i40e_clear_pxe_mode(hw);
10027 /* Reset here to make sure all is clean and to define PF 'n' */
10029 err = i40e_pf_reset(hw);
10031 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10036 hw->aq.num_arq_entries = I40E_AQ_LEN;
10037 hw->aq.num_asq_entries = I40E_AQ_LEN;
10038 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10039 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10040 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10042 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10044 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10046 err = i40e_init_shared_code(hw);
10048 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10053 /* set up a default setting for link flow control */
10054 pf->hw.fc.requested_mode = I40E_FC_NONE;
10056 err = i40e_init_adminq(hw);
10057 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10059 dev_info(&pdev->dev,
10060 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10064 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10065 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10066 dev_info(&pdev->dev,
10067 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10068 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10069 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10070 dev_info(&pdev->dev,
10071 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10073 i40e_verify_eeprom(pf);
10075 /* Rev 0 hardware was never productized */
10076 if (hw->revision_id < 1)
10077 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10079 i40e_clear_pxe_mode(hw);
10080 err = i40e_get_capabilities(pf);
10082 goto err_adminq_setup;
10084 err = i40e_sw_init(pf);
10086 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10090 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10091 hw->func_caps.num_rx_qp,
10092 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10094 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10095 goto err_init_lan_hmc;
10098 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10100 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10102 goto err_configure_lan_hmc;
10105 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10106 * Ignore error return codes because if it was already disabled via
10107 * hardware settings this will fail
10109 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10110 (pf->hw.aq.fw_maj_ver < 4)) {
10111 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10112 i40e_aq_stop_lldp(hw, true, NULL);
10115 i40e_get_mac_addr(hw, hw->mac.addr);
10116 if (!is_valid_ether_addr(hw->mac.addr)) {
10117 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10121 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10122 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10123 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10124 if (is_valid_ether_addr(hw->mac.port_addr))
10125 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10127 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10129 dev_info(&pdev->dev,
10130 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10131 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10132 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10134 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10136 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10137 #endif /* I40E_FCOE */
10139 pci_set_drvdata(pdev, pf);
10140 pci_save_state(pdev);
10141 #ifdef CONFIG_I40E_DCB
10142 err = i40e_init_pf_dcb(pf);
10144 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10145 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10146 /* Continue without DCB enabled */
10148 #endif /* CONFIG_I40E_DCB */
10150 /* set up periodic task facility */
10151 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10152 pf->service_timer_period = HZ;
10154 INIT_WORK(&pf->service_task, i40e_service_task);
10155 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10156 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10158 /* WoL defaults to disabled */
10159 pf->wol_en = false;
10160 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10162 /* set up the main switch operations */
10163 i40e_determine_queue_usage(pf);
10164 err = i40e_init_interrupt_scheme(pf);
10166 goto err_switch_setup;
10168 /* The number of VSIs reported by the FW is the minimum guaranteed
10169 * to us; HW supports far more and we share the remaining pool with
10170 * the other PFs. We allocate space for more than the guarantee with
10171 * the understanding that we might not get them all later.
10173 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10174 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10176 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10178 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10179 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10180 pf->vsi = kzalloc(len, GFP_KERNEL);
10183 goto err_switch_setup;
10186 #ifdef CONFIG_PCI_IOV
10187 /* prep for VF support */
10188 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10189 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10190 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10191 if (pci_num_vf(pdev))
10192 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10195 err = i40e_setup_pf_switch(pf, false);
10197 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10200 /* if FDIR VSI was set up, start it now */
10201 for (i = 0; i < pf->num_alloc_vsi; i++) {
10202 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10203 i40e_vsi_open(pf->vsi[i]);
10208 /* driver is only interested in link up/down and module qualification
10209 * reports from firmware
10211 err = i40e_aq_set_phy_int_mask(&pf->hw,
10212 I40E_AQ_EVENT_LINK_UPDOWN |
10213 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10215 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10216 i40e_stat_str(&pf->hw, err),
10217 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10219 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10220 (pf->hw.aq.fw_maj_ver < 4)) {
10222 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10224 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10225 i40e_stat_str(&pf->hw, err),
10226 i40e_aq_str(&pf->hw,
10227 pf->hw.aq.asq_last_status));
10229 /* The main driver is (mostly) up and happy. We need to set this state
10230 * before setting up the misc vector or we get a race and the vector
10231 * ends up disabled forever.
10233 clear_bit(__I40E_DOWN, &pf->state);
10235 /* In case of MSIX we are going to setup the misc vector right here
10236 * to handle admin queue events etc. In case of legacy and MSI
10237 * the misc functionality and queue processing is combined in
10238 * the same vector and that gets setup at open.
10240 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10241 err = i40e_setup_misc_vector(pf);
10243 dev_info(&pdev->dev,
10244 "setup of misc vector failed: %d\n", err);
10249 #ifdef CONFIG_PCI_IOV
10250 /* prep for VF support */
10251 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10252 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10253 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10256 /* disable link interrupts for VFs */
10257 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10258 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10259 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10262 if (pci_num_vf(pdev)) {
10263 dev_info(&pdev->dev,
10264 "Active VFs found, allocating resources.\n");
10265 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10267 dev_info(&pdev->dev,
10268 "Error %d allocating resources for existing VFs\n",
10272 #endif /* CONFIG_PCI_IOV */
10276 i40e_dbg_pf_init(pf);
10278 /* tell the firmware that we're starting */
10279 i40e_send_version(pf);
10281 /* since everything's happy, start the service_task timer */
10282 mod_timer(&pf->service_timer,
10283 round_jiffies(jiffies + pf->service_timer_period));
10286 /* create FCoE interface */
10287 i40e_fcoe_vsi_setup(pf);
10290 /* Get the negotiated link width and speed from PCI config space */
10291 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10293 i40e_set_pci_config_data(hw, link_status);
10295 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10296 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10297 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10298 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10300 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10301 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10302 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10303 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10306 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10307 hw->bus.speed < i40e_bus_speed_8000) {
10308 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10309 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10312 /* get the requested speeds from the fw */
10313 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10315 dev_info(&pf->pdev->dev,
10316 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10317 i40e_stat_str(&pf->hw, err),
10318 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10319 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10321 /* print a string summarizing features */
10322 i40e_print_features(pf);
10326 /* Unwind what we've done if something failed in the setup */
10328 set_bit(__I40E_DOWN, &pf->state);
10329 i40e_clear_interrupt_scheme(pf);
10332 i40e_reset_interrupt_capability(pf);
10333 del_timer_sync(&pf->service_timer);
10335 err_configure_lan_hmc:
10336 (void)i40e_shutdown_lan_hmc(hw);
10338 kfree(pf->qp_pile);
10341 (void)i40e_shutdown_adminq(hw);
10343 iounmap(hw->hw_addr);
10347 pci_disable_pcie_error_reporting(pdev);
10348 pci_release_selected_regions(pdev,
10349 pci_select_bars(pdev, IORESOURCE_MEM));
10352 pci_disable_device(pdev);
10357 * i40e_remove - Device removal routine
10358 * @pdev: PCI device information struct
10360 * i40e_remove is called by the PCI subsystem to alert the driver
10361 * that is should release a PCI device. This could be caused by a
10362 * Hot-Plug event, or because the driver is going to be removed from
10365 static void i40e_remove(struct pci_dev *pdev)
10367 struct i40e_pf *pf = pci_get_drvdata(pdev);
10368 i40e_status ret_code;
10371 i40e_dbg_pf_exit(pf);
10375 /* no more scheduling of any task */
10376 set_bit(__I40E_DOWN, &pf->state);
10377 del_timer_sync(&pf->service_timer);
10378 cancel_work_sync(&pf->service_task);
10379 i40e_fdir_teardown(pf);
10381 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10383 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10386 i40e_fdir_teardown(pf);
10388 /* If there is a switch structure or any orphans, remove them.
10389 * This will leave only the PF's VSI remaining.
10391 for (i = 0; i < I40E_MAX_VEB; i++) {
10395 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10396 pf->veb[i]->uplink_seid == 0)
10397 i40e_switch_branch_release(pf->veb[i]);
10400 /* Now we can shutdown the PF's VSI, just before we kill
10403 if (pf->vsi[pf->lan_vsi])
10404 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10406 /* shutdown and destroy the HMC */
10407 if (pf->hw.hmc.hmc_obj) {
10408 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10410 dev_warn(&pdev->dev,
10411 "Failed to destroy the HMC resources: %d\n",
10415 /* shutdown the adminq */
10416 ret_code = i40e_shutdown_adminq(&pf->hw);
10418 dev_warn(&pdev->dev,
10419 "Failed to destroy the Admin Queue resources: %d\n",
10422 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10423 i40e_clear_interrupt_scheme(pf);
10424 for (i = 0; i < pf->num_alloc_vsi; i++) {
10426 i40e_vsi_clear_rings(pf->vsi[i]);
10427 i40e_vsi_clear(pf->vsi[i]);
10432 for (i = 0; i < I40E_MAX_VEB; i++) {
10437 kfree(pf->qp_pile);
10440 iounmap(pf->hw.hw_addr);
10442 pci_release_selected_regions(pdev,
10443 pci_select_bars(pdev, IORESOURCE_MEM));
10445 pci_disable_pcie_error_reporting(pdev);
10446 pci_disable_device(pdev);
10450 * i40e_pci_error_detected - warning that something funky happened in PCI land
10451 * @pdev: PCI device information struct
10453 * Called to warn that something happened and the error handling steps
10454 * are in progress. Allows the driver to quiesce things, be ready for
10457 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10458 enum pci_channel_state error)
10460 struct i40e_pf *pf = pci_get_drvdata(pdev);
10462 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10464 /* shutdown all operations */
10465 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10467 i40e_prep_for_reset(pf);
10471 /* Request a slot reset */
10472 return PCI_ERS_RESULT_NEED_RESET;
10476 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10477 * @pdev: PCI device information struct
10479 * Called to find if the driver can work with the device now that
10480 * the pci slot has been reset. If a basic connection seems good
10481 * (registers are readable and have sane content) then return a
10482 * happy little PCI_ERS_RESULT_xxx.
10484 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10486 struct i40e_pf *pf = pci_get_drvdata(pdev);
10487 pci_ers_result_t result;
10491 dev_info(&pdev->dev, "%s\n", __func__);
10492 if (pci_enable_device_mem(pdev)) {
10493 dev_info(&pdev->dev,
10494 "Cannot re-enable PCI device after reset.\n");
10495 result = PCI_ERS_RESULT_DISCONNECT;
10497 pci_set_master(pdev);
10498 pci_restore_state(pdev);
10499 pci_save_state(pdev);
10500 pci_wake_from_d3(pdev, false);
10502 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10504 result = PCI_ERS_RESULT_RECOVERED;
10506 result = PCI_ERS_RESULT_DISCONNECT;
10509 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10511 dev_info(&pdev->dev,
10512 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10514 /* non-fatal, continue */
10521 * i40e_pci_error_resume - restart operations after PCI error recovery
10522 * @pdev: PCI device information struct
10524 * Called to allow the driver to bring things back up after PCI error
10525 * and/or reset recovery has finished.
10527 static void i40e_pci_error_resume(struct pci_dev *pdev)
10529 struct i40e_pf *pf = pci_get_drvdata(pdev);
10531 dev_info(&pdev->dev, "%s\n", __func__);
10532 if (test_bit(__I40E_SUSPENDED, &pf->state))
10536 i40e_handle_reset_warning(pf);
10541 * i40e_shutdown - PCI callback for shutting down
10542 * @pdev: PCI device information struct
10544 static void i40e_shutdown(struct pci_dev *pdev)
10546 struct i40e_pf *pf = pci_get_drvdata(pdev);
10547 struct i40e_hw *hw = &pf->hw;
10549 set_bit(__I40E_SUSPENDED, &pf->state);
10550 set_bit(__I40E_DOWN, &pf->state);
10552 i40e_prep_for_reset(pf);
10555 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10556 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10558 del_timer_sync(&pf->service_timer);
10559 cancel_work_sync(&pf->service_task);
10560 i40e_fdir_teardown(pf);
10563 i40e_prep_for_reset(pf);
10566 wr32(hw, I40E_PFPM_APM,
10567 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10568 wr32(hw, I40E_PFPM_WUFC,
10569 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10571 i40e_clear_interrupt_scheme(pf);
10573 if (system_state == SYSTEM_POWER_OFF) {
10574 pci_wake_from_d3(pdev, pf->wol_en);
10575 pci_set_power_state(pdev, PCI_D3hot);
10581 * i40e_suspend - PCI callback for moving to D3
10582 * @pdev: PCI device information struct
10584 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10586 struct i40e_pf *pf = pci_get_drvdata(pdev);
10587 struct i40e_hw *hw = &pf->hw;
10589 set_bit(__I40E_SUSPENDED, &pf->state);
10590 set_bit(__I40E_DOWN, &pf->state);
10593 i40e_prep_for_reset(pf);
10596 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10597 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10599 pci_wake_from_d3(pdev, pf->wol_en);
10600 pci_set_power_state(pdev, PCI_D3hot);
10606 * i40e_resume - PCI callback for waking up from D3
10607 * @pdev: PCI device information struct
10609 static int i40e_resume(struct pci_dev *pdev)
10611 struct i40e_pf *pf = pci_get_drvdata(pdev);
10614 pci_set_power_state(pdev, PCI_D0);
10615 pci_restore_state(pdev);
10616 /* pci_restore_state() clears dev->state_saves, so
10617 * call pci_save_state() again to restore it.
10619 pci_save_state(pdev);
10621 err = pci_enable_device_mem(pdev);
10623 dev_err(&pdev->dev,
10624 "%s: Cannot enable PCI device from suspend\n",
10628 pci_set_master(pdev);
10630 /* no wakeup events while running */
10631 pci_wake_from_d3(pdev, false);
10633 /* handling the reset will rebuild the device state */
10634 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10635 clear_bit(__I40E_DOWN, &pf->state);
10637 i40e_reset_and_rebuild(pf, false);
10645 static const struct pci_error_handlers i40e_err_handler = {
10646 .error_detected = i40e_pci_error_detected,
10647 .slot_reset = i40e_pci_error_slot_reset,
10648 .resume = i40e_pci_error_resume,
10651 static struct pci_driver i40e_driver = {
10652 .name = i40e_driver_name,
10653 .id_table = i40e_pci_tbl,
10654 .probe = i40e_probe,
10655 .remove = i40e_remove,
10657 .suspend = i40e_suspend,
10658 .resume = i40e_resume,
10660 .shutdown = i40e_shutdown,
10661 .err_handler = &i40e_err_handler,
10662 .sriov_configure = i40e_pci_sriov_configure,
10666 * i40e_init_module - Driver registration routine
10668 * i40e_init_module is the first routine called when the driver is
10669 * loaded. All it does is register with the PCI subsystem.
10671 static int __init i40e_init_module(void)
10673 pr_info("%s: %s - version %s\n", i40e_driver_name,
10674 i40e_driver_string, i40e_driver_version_str);
10675 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10678 return pci_register_driver(&i40e_driver);
10680 module_init(i40e_init_module);
10683 * i40e_exit_module - Driver exit cleanup routine
10685 * i40e_exit_module is called just before the driver is removed
10688 static void __exit i40e_exit_module(void)
10690 pci_unregister_driver(&i40e_driver);
10693 module_exit(i40e_exit_module);