drivers/net/ethernet/emulex/benet/be_cmds.h

   1 /*
   2  * Copyright (C) 2005 - 2013 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 /*
  19  * The driver sends configuration and managements command requests to the
  20  * firmware in the BE. These requests are communicated to the processor
  21  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
  22  * WRB inside a MAILBOX.
  23  * The commands are serviced by the ARM processor in the BladeEngine's MPU.
  24  */
  25
  26 struct be_sge {
  27         u32 pa_lo;
  28         u32 pa_hi;
  29         u32 len;
  30 };
  31
  32 #define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
  33 #define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
  34 #define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
  35 struct be_mcc_wrb {
  36         u32 embedded;           /* dword 0 */
  37         u32 payload_length;     /* dword 1 */
  38         u32 tag0;               /* dword 2 */
  39         u32 tag1;               /* dword 3 */
  40         u32 rsvd;               /* dword 4 */
  41         union {
  42                 u8 embedded_payload[236]; /* used by embedded cmds */
  43                 struct be_sge sgl[19];    /* used by non-embedded cmds */
  44         } payload;
  45 };
  46
  47 #define CQE_FLAGS_VALID_MASK            (1 << 31)
  48 #define CQE_FLAGS_ASYNC_MASK            (1 << 30)
  49 #define CQE_FLAGS_COMPLETED_MASK        (1 << 28)
  50 #define CQE_FLAGS_CONSUMED_MASK         (1 << 27)
  51
  52 /* Completion Status */
  53 enum {
  54         MCC_STATUS_SUCCESS = 0,
  55         MCC_STATUS_FAILED = 1,
  56         MCC_STATUS_ILLEGAL_REQUEST = 2,
  57         MCC_STATUS_ILLEGAL_FIELD = 3,
  58         MCC_STATUS_INSUFFICIENT_BUFFER = 4,
  59         MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
  60         MCC_STATUS_NOT_SUPPORTED = 66
  61 };
  62
  63 #define CQE_STATUS_COMPL_MASK           0xFFFF
  64 #define CQE_STATUS_COMPL_SHIFT          0       /* bits 0 - 15 */
  65 #define CQE_STATUS_EXTD_MASK            0xFFFF
  66 #define CQE_STATUS_EXTD_SHIFT           16      /* bits 16 - 31 */
  67
  68 struct be_mcc_compl {
  69         u32 status;             /* dword 0 */
  70         u32 tag0;               /* dword 1 */
  71         u32 tag1;               /* dword 2 */
  72         u32 flags;              /* dword 3 */
  73 };
  74
  75 /* When the async bit of mcc_compl is set, the last 4 bytes of
  76  * mcc_compl is interpreted as follows:
  77  */
  78 #define ASYNC_TRAILER_EVENT_CODE_SHIFT  8       /* bits 8 - 15 */
  79 #define ASYNC_TRAILER_EVENT_CODE_MASK   0xFF
  80 #define ASYNC_TRAILER_EVENT_TYPE_SHIFT  16
  81 #define ASYNC_TRAILER_EVENT_TYPE_MASK   0xFF
  82 #define ASYNC_EVENT_CODE_LINK_STATE     0x1
  83 #define ASYNC_EVENT_CODE_GRP_5          0x5
  84 #define ASYNC_EVENT_QOS_SPEED           0x1
  85 #define ASYNC_EVENT_COS_PRIORITY        0x2
  86 #define ASYNC_EVENT_PVID_STATE          0x3
  87 #define ASYNC_EVENT_CODE_QNQ            0x6
  88 #define ASYNC_DEBUG_EVENT_TYPE_QNQ      1
  89
  90 struct be_async_event_trailer {
  91         u32 code;
  92 };
  93
  94 enum {
  95         LINK_DOWN       = 0x0,
  96         LINK_UP         = 0x1
  97 };
  98 #define LINK_STATUS_MASK                        0x1
  99 #define LOGICAL_LINK_STATUS_MASK                0x2
 100
 101 /* When the event code of an async trailer is link-state, the mcc_compl
 102  * must be interpreted as follows
 103  */
 104 struct be_async_event_link_state {
 105         u8 physical_port;
 106         u8 port_link_status;
 107         u8 port_duplex;
 108         u8 port_speed;
 109         u8 port_fault;
 110         u8 rsvd0[7];
 111         struct be_async_event_trailer trailer;
 112 } __packed;
 113
 114 /* When the event code of an async trailer is GRP-5 and event_type is QOS_SPEED
 115  * the mcc_compl must be interpreted as follows
 116  */
 117 struct be_async_event_grp5_qos_link_speed {
 118         u8 physical_port;
 119         u8 rsvd[5];
 120         u16 qos_link_speed;
 121         u32 event_tag;
 122         struct be_async_event_trailer trailer;
 123 } __packed;
 124
 125 /* When the event code of an async trailer is GRP5 and event type is
 126  * CoS-Priority, the mcc_compl must be interpreted as follows
 127  */
 128 struct be_async_event_grp5_cos_priority {
 129         u8 physical_port;
 130         u8 available_priority_bmap;
 131         u8 reco_default_priority;
 132         u8 valid;
 133         u8 rsvd0;
 134         u8 event_tag;
 135         struct be_async_event_trailer trailer;
 136 } __packed;
 137
 138 /* When the event code of an async trailer is GRP5 and event type is
 139  * PVID state, the mcc_compl must be interpreted as follows
 140  */
 141 struct be_async_event_grp5_pvid_state {
 142         u8 enabled;
 143         u8 rsvd0;
 144         u16 tag;
 145         u32 event_tag;
 146         u32 rsvd1;
 147         struct be_async_event_trailer trailer;
 148 } __packed;
 149
 150 /* async event indicating outer VLAN tag in QnQ */
 151 struct be_async_event_qnq {
 152         u8 valid;       /* Indicates if outer VLAN is valid */
 153         u8 rsvd0;
 154         u16 vlan_tag;
 155         u32 event_tag;
 156         u8 rsvd1[4];
 157         struct be_async_event_trailer trailer;
 158 } __packed;
 159
 160 struct be_mcc_mailbox {
 161         struct be_mcc_wrb wrb;
 162         struct be_mcc_compl compl;
 163 };
 164
 165 #define CMD_SUBSYSTEM_COMMON    0x1
 166 #define CMD_SUBSYSTEM_ETH       0x3
 167 #define CMD_SUBSYSTEM_LOWLEVEL  0xb
 168
 169 #define OPCODE_COMMON_NTWK_MAC_QUERY                    1
 170 #define OPCODE_COMMON_NTWK_MAC_SET                      2
 171 #define OPCODE_COMMON_NTWK_MULTICAST_SET                3
 172 #define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
 173 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
 174 #define OPCODE_COMMON_READ_FLASHROM                     6
 175 #define OPCODE_COMMON_WRITE_FLASHROM                    7
 176 #define OPCODE_COMMON_CQ_CREATE                         12
 177 #define OPCODE_COMMON_EQ_CREATE                         13
 178 #define OPCODE_COMMON_MCC_CREATE                        21
 179 #define OPCODE_COMMON_SET_QOS                           28
 180 #define OPCODE_COMMON_MCC_CREATE_EXT                    90
 181 #define OPCODE_COMMON_SEEPROM_READ                      30
 182 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES               32
 183 #define OPCODE_COMMON_NTWK_RX_FILTER                    34
 184 #define OPCODE_COMMON_GET_FW_VERSION                    35
 185 #define OPCODE_COMMON_SET_FLOW_CONTROL                  36
 186 #define OPCODE_COMMON_GET_FLOW_CONTROL                  37
 187 #define OPCODE_COMMON_SET_FRAME_SIZE                    39
 188 #define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
 189 #define OPCODE_COMMON_FIRMWARE_CONFIG                   42
 190 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
 191 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
 192 #define OPCODE_COMMON_MCC_DESTROY                       53
 193 #define OPCODE_COMMON_CQ_DESTROY                        54
 194 #define OPCODE_COMMON_EQ_DESTROY                        55
 195 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
 196 #define OPCODE_COMMON_NTWK_PMAC_ADD                     59
 197 #define OPCODE_COMMON_NTWK_PMAC_DEL                     60
 198 #define OPCODE_COMMON_FUNCTION_RESET                    61
 199 #define OPCODE_COMMON_MANAGE_FAT                        68
 200 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON             69
 201 #define OPCODE_COMMON_GET_BEACON_STATE                  70
 202 #define OPCODE_COMMON_READ_TRANSRECV_DATA               73
 203 #define OPCODE_COMMON_GET_PORT_NAME                     77
 204 #define OPCODE_COMMON_SET_INTERRUPT_ENABLE              89
 205 #define OPCODE_COMMON_GET_PHY_DETAILS                   102
 206 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP           103
 207 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES    121
 208 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES           125
 209 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES           126
 210 #define OPCODE_COMMON_GET_MAC_LIST                      147
 211 #define OPCODE_COMMON_SET_MAC_LIST                      148
 212 #define OPCODE_COMMON_GET_HSW_CONFIG                    152
 213 #define OPCODE_COMMON_GET_FUNC_CONFIG                   160
 214 #define OPCODE_COMMON_GET_PROFILE_CONFIG                164
 215 #define OPCODE_COMMON_SET_PROFILE_CONFIG                165
 216 #define OPCODE_COMMON_SET_HSW_CONFIG                    153
 217 #define OPCODE_COMMON_GET_FN_PRIVILEGES                 170
 218 #define OPCODE_COMMON_READ_OBJECT                       171
 219 #define OPCODE_COMMON_WRITE_OBJECT                      172
 220 #define OPCODE_COMMON_GET_IFACE_LIST                    194
 221 #define OPCODE_COMMON_ENABLE_DISABLE_VF                 196
 222
 223 #define OPCODE_ETH_RSS_CONFIG                           1
 224 #define OPCODE_ETH_ACPI_CONFIG                          2
 225 #define OPCODE_ETH_PROMISCUOUS                          3
 226 #define OPCODE_ETH_GET_STATISTICS                       4
 227 #define OPCODE_ETH_TX_CREATE                            7
 228 #define OPCODE_ETH_RX_CREATE                            8
 229 #define OPCODE_ETH_TX_DESTROY                           9
 230 #define OPCODE_ETH_RX_DESTROY                           10
 231 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG                12
 232 #define OPCODE_ETH_GET_PPORT_STATS                      18
 233
 234 #define OPCODE_LOWLEVEL_HOST_DDR_DMA                    17
 235 #define OPCODE_LOWLEVEL_LOOPBACK_TEST                   18
 236 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE               19
 237
 238 struct be_cmd_req_hdr {
 239         u8 opcode;              /* dword 0 */
 240         u8 subsystem;           /* dword 0 */
 241         u8 port_number;         /* dword 0 */
 242         u8 domain;              /* dword 0 */
 243         u32 timeout;            /* dword 1 */
 244         u32 request_length;     /* dword 2 */
 245         u8 version;             /* dword 3 */
 246         u8 rsvd[3];             /* dword 3 */
 247 };
 248
 249 #define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
 250 #define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
 251 struct be_cmd_resp_hdr {
 252         u8 opcode;              /* dword 0 */
 253         u8 subsystem;           /* dword 0 */
 254         u8 rsvd[2];             /* dword 0 */
 255         u8 status;              /* dword 1 */
 256         u8 add_status;          /* dword 1 */
 257         u8 rsvd1[2];            /* dword 1 */
 258         u32 response_length;    /* dword 2 */
 259         u32 actual_resp_len;    /* dword 3 */
 260 };
 261
 262 struct phys_addr {
 263         u32 lo;
 264         u32 hi;
 265 };
 266
 267 /**************************
 268  * BE Command definitions *
 269  **************************/
 270
 271 /* Pseudo amap definition in which each bit of the actual structure is defined
 272  * as a byte: used to calculate offset/shift/mask of each field */
 273 struct amap_eq_context {
 274         u8 cidx[13];            /* dword 0*/
 275         u8 rsvd0[3];            /* dword 0*/
 276         u8 epidx[13];           /* dword 0*/
 277         u8 valid;               /* dword 0*/
 278         u8 rsvd1;               /* dword 0*/
 279         u8 size;                /* dword 0*/
 280         u8 pidx[13];            /* dword 1*/
 281         u8 rsvd2[3];            /* dword 1*/
 282         u8 pd[10];              /* dword 1*/
 283         u8 count[3];            /* dword 1*/
 284         u8 solevent;            /* dword 1*/
 285         u8 stalled;             /* dword 1*/
 286         u8 armed;               /* dword 1*/
 287         u8 rsvd3[4];            /* dword 2*/
 288         u8 func[8];             /* dword 2*/
 289         u8 rsvd4;               /* dword 2*/
 290         u8 delaymult[10];       /* dword 2*/
 291         u8 rsvd5[2];            /* dword 2*/
 292         u8 phase[2];            /* dword 2*/
 293         u8 nodelay;             /* dword 2*/
 294         u8 rsvd6[4];            /* dword 2*/
 295         u8 rsvd7[32];           /* dword 3*/
 296 } __packed;
 297
 298 struct be_cmd_req_eq_create {
 299         struct be_cmd_req_hdr hdr;
 300         u16 num_pages;          /* sword */
 301         u16 rsvd0;              /* sword */
 302         u8 context[sizeof(struct amap_eq_context) / 8];
 303         struct phys_addr pages[8];
 304 } __packed;
 305
 306 struct be_cmd_resp_eq_create {
 307         struct be_cmd_resp_hdr resp_hdr;
 308         u16 eq_id;              /* sword */
 309         u16 rsvd0;              /* sword */
 310 } __packed;
 311
 312 /******************** Mac query ***************************/
 313 enum {
 314         MAC_ADDRESS_TYPE_STORAGE = 0x0,
 315         MAC_ADDRESS_TYPE_NETWORK = 0x1,
 316         MAC_ADDRESS_TYPE_PD = 0x2,
 317         MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
 318 };
 319
 320 struct mac_addr {
 321         u16 size_of_struct;
 322         u8 addr[ETH_ALEN];
 323 } __packed;
 324
 325 struct be_cmd_req_mac_query {
 326         struct be_cmd_req_hdr hdr;
 327         u8 type;
 328         u8 permanent;
 329         u16 if_id;
 330         u32 pmac_id;
 331 } __packed;
 332
 333 struct be_cmd_resp_mac_query {
 334         struct be_cmd_resp_hdr hdr;
 335         struct mac_addr mac;
 336 };
 337
 338 /******************** PMac Add ***************************/
 339 struct be_cmd_req_pmac_add {
 340         struct be_cmd_req_hdr hdr;
 341         u32 if_id;
 342         u8 mac_address[ETH_ALEN];
 343         u8 rsvd0[2];
 344 } __packed;
 345
 346 struct be_cmd_resp_pmac_add {
 347         struct be_cmd_resp_hdr hdr;
 348         u32 pmac_id;
 349 };
 350
 351 /******************** PMac Del ***************************/
 352 struct be_cmd_req_pmac_del {
 353         struct be_cmd_req_hdr hdr;
 354         u32 if_id;
 355         u32 pmac_id;
 356 };
 357
 358 /******************** Create CQ ***************************/
 359 /* Pseudo amap definition in which each bit of the actual structure is defined
 360  * as a byte: used to calculate offset/shift/mask of each field */
 361 struct amap_cq_context_be {
 362         u8 cidx[11];            /* dword 0*/
 363         u8 rsvd0;               /* dword 0*/
 364         u8 coalescwm[2];        /* dword 0*/
 365         u8 nodelay;             /* dword 0*/
 366         u8 epidx[11];           /* dword 0*/
 367         u8 rsvd1;               /* dword 0*/
 368         u8 count[2];            /* dword 0*/
 369         u8 valid;               /* dword 0*/
 370         u8 solevent;            /* dword 0*/
 371         u8 eventable;           /* dword 0*/
 372         u8 pidx[11];            /* dword 1*/
 373         u8 rsvd2;               /* dword 1*/
 374         u8 pd[10];              /* dword 1*/
 375         u8 eqid[8];             /* dword 1*/
 376         u8 stalled;             /* dword 1*/
 377         u8 armed;               /* dword 1*/
 378         u8 rsvd3[4];            /* dword 2*/
 379         u8 func[8];             /* dword 2*/
 380         u8 rsvd4[20];           /* dword 2*/
 381         u8 rsvd5[32];           /* dword 3*/
 382 } __packed;
 383
 384 struct amap_cq_context_v2 {
 385         u8 rsvd0[12];           /* dword 0*/
 386         u8 coalescwm[2];        /* dword 0*/
 387         u8 nodelay;             /* dword 0*/
 388         u8 rsvd1[12];           /* dword 0*/
 389         u8 count[2];            /* dword 0*/
 390         u8 valid;               /* dword 0*/
 391         u8 rsvd2;               /* dword 0*/
 392         u8 eventable;           /* dword 0*/
 393         u8 eqid[16];            /* dword 1*/
 394         u8 rsvd3[15];           /* dword 1*/
 395         u8 armed;               /* dword 1*/
 396         u8 rsvd4[32];           /* dword 2*/
 397         u8 rsvd5[32];           /* dword 3*/
 398 } __packed;
 399
 400 struct be_cmd_req_cq_create {
 401         struct be_cmd_req_hdr hdr;
 402         u16 num_pages;
 403         u8 page_size;
 404         u8 rsvd0;
 405         u8 context[sizeof(struct amap_cq_context_be) / 8];
 406         struct phys_addr pages[8];
 407 } __packed;
 408
 409
 410 struct be_cmd_resp_cq_create {
 411         struct be_cmd_resp_hdr hdr;
 412         u16 cq_id;
 413         u16 rsvd0;
 414 } __packed;
 415
 416 struct be_cmd_req_get_fat {
 417         struct be_cmd_req_hdr hdr;
 418         u32 fat_operation;
 419         u32 read_log_offset;
 420         u32 read_log_length;
 421         u32 data_buffer_size;
 422         u32 data_buffer[1];
 423 } __packed;
 424
 425 struct be_cmd_resp_get_fat {
 426         struct be_cmd_resp_hdr hdr;
 427         u32 log_size;
 428         u32 read_log_length;
 429         u32 rsvd[2];
 430         u32 data_buffer[1];
 431 } __packed;
 432
 433
 434 /******************** Create MCCQ ***************************/
 435 /* Pseudo amap definition in which each bit of the actual structure is defined
 436  * as a byte: used to calculate offset/shift/mask of each field */
 437 struct amap_mcc_context_be {
 438         u8 con_index[14];
 439         u8 rsvd0[2];
 440         u8 ring_size[4];
 441         u8 fetch_wrb;
 442         u8 fetch_r2t;
 443         u8 cq_id[10];
 444         u8 prod_index[14];
 445         u8 fid[8];
 446         u8 pdid[9];
 447         u8 valid;
 448         u8 rsvd1[32];
 449         u8 rsvd2[32];
 450 } __packed;
 451
 452 struct amap_mcc_context_lancer {
 453         u8 async_cq_id[16];
 454         u8 ring_size[4];
 455         u8 rsvd0[12];
 456         u8 rsvd1[31];
 457         u8 valid;
 458         u8 async_cq_valid[1];
 459         u8 rsvd2[31];
 460         u8 rsvd3[32];
 461 } __packed;
 462
 463 struct be_cmd_req_mcc_create {
 464         struct be_cmd_req_hdr hdr;
 465         u16 num_pages;
 466         u16 cq_id;
 467         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 468         struct phys_addr pages[8];
 469 } __packed;
 470
 471 struct be_cmd_req_mcc_ext_create {
 472         struct be_cmd_req_hdr hdr;
 473         u16 num_pages;
 474         u16 cq_id;
 475         u32 async_event_bitmap[1];
 476         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 477         struct phys_addr pages[8];
 478 } __packed;
 479
 480 struct be_cmd_resp_mcc_create {
 481         struct be_cmd_resp_hdr hdr;
 482         u16 id;
 483         u16 rsvd0;
 484 } __packed;
 485
 486 /******************** Create TxQ ***************************/
 487 #define BE_ETH_TX_RING_TYPE_STANDARD            2
 488 #define BE_ULP1_NUM                             1
 489
 490 struct be_cmd_req_eth_tx_create {
 491         struct be_cmd_req_hdr hdr;
 492         u8 num_pages;
 493         u8 ulp_num;
 494         u16 type;
 495         u16 if_id;
 496         u8 queue_size;
 497         u8 rsvd0;
 498         u32 rsvd1;
 499         u16 cq_id;
 500         u16 rsvd2;
 501         u32 rsvd3[13];
 502         struct phys_addr pages[8];
 503 } __packed;
 504
 505 struct be_cmd_resp_eth_tx_create {
 506         struct be_cmd_resp_hdr hdr;
 507         u16 cid;
 508         u16 rid;
 509         u32 db_offset;
 510         u32 rsvd0[4];
 511 } __packed;
 512
 513 /******************** Create RxQ ***************************/
 514 struct be_cmd_req_eth_rx_create {
 515         struct be_cmd_req_hdr hdr;
 516         u16 cq_id;
 517         u8 frag_size;
 518         u8 num_pages;
 519         struct phys_addr pages[2];
 520         u32 interface_id;
 521         u16 max_frame_size;
 522         u16 rsvd0;
 523         u32 rss_queue;
 524 } __packed;
 525
 526 struct be_cmd_resp_eth_rx_create {
 527         struct be_cmd_resp_hdr hdr;
 528         u16 id;
 529         u8 rss_id;
 530         u8 rsvd0;
 531 } __packed;
 532
 533 /******************** Q Destroy  ***************************/
 534 /* Type of Queue to be destroyed */
 535 enum {
 536         QTYPE_EQ = 1,
 537         QTYPE_CQ,
 538         QTYPE_TXQ,
 539         QTYPE_RXQ,
 540         QTYPE_MCCQ
 541 };
 542
 543 struct be_cmd_req_q_destroy {
 544         struct be_cmd_req_hdr hdr;
 545         u16 id;
 546         u16 bypass_flush;       /* valid only for rx q destroy */
 547 } __packed;
 548
 549 /************ I/f Create (it's actually I/f Config Create)**********/
 550
 551 /* Capability flags for the i/f */
 552 enum be_if_flags {
 553         BE_IF_FLAGS_RSS = 0x4,
 554         BE_IF_FLAGS_PROMISCUOUS = 0x8,
 555         BE_IF_FLAGS_BROADCAST = 0x10,
 556         BE_IF_FLAGS_UNTAGGED = 0x20,
 557         BE_IF_FLAGS_ULP = 0x40,
 558         BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
 559         BE_IF_FLAGS_VLAN = 0x100,
 560         BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
 561         BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
 562         BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
 563         BE_IF_FLAGS_MULTICAST = 0x1000
 564 };
 565
 566 #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\
 567                          BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\
 568                          BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\
 569                          BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\
 570                          BE_IF_FLAGS_UNTAGGED)
 571
 572 /* An RX interface is an object with one or more MAC addresses and
 573  * filtering capabilities. */
 574 struct be_cmd_req_if_create {
 575         struct be_cmd_req_hdr hdr;
 576         u32 version;            /* ignore currently */
 577         u32 capability_flags;
 578         u32 enable_flags;
 579         u8 mac_addr[ETH_ALEN];
 580         u8 rsvd0;
 581         u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
 582         u32 vlan_tag;    /* not used currently */
 583 } __packed;
 584
 585 struct be_cmd_resp_if_create {
 586         struct be_cmd_resp_hdr hdr;
 587         u32 interface_id;
 588         u32 pmac_id;
 589 };
 590
 591 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
 592 struct be_cmd_req_if_destroy {
 593         struct be_cmd_req_hdr hdr;
 594         u32 interface_id;
 595 };
 596
 597 /*************** HW Stats Get **********************************/
 598 struct be_port_rxf_stats_v0 {
 599         u32 rx_bytes_lsd;       /* dword 0*/
 600         u32 rx_bytes_msd;       /* dword 1*/
 601         u32 rx_total_frames;    /* dword 2*/
 602         u32 rx_unicast_frames;  /* dword 3*/
 603         u32 rx_multicast_frames;        /* dword 4*/
 604         u32 rx_broadcast_frames;        /* dword 5*/
 605         u32 rx_crc_errors;      /* dword 6*/
 606         u32 rx_alignment_symbol_errors; /* dword 7*/
 607         u32 rx_pause_frames;    /* dword 8*/
 608         u32 rx_control_frames;  /* dword 9*/
 609         u32 rx_in_range_errors; /* dword 10*/
 610         u32 rx_out_range_errors;        /* dword 11*/
 611         u32 rx_frame_too_long;  /* dword 12*/
 612         u32 rx_address_filtered;        /* dword 13*/
 613         u32 rx_vlan_filtered;   /* dword 14*/
 614         u32 rx_dropped_too_small;       /* dword 15*/
 615         u32 rx_dropped_too_short;       /* dword 16*/
 616         u32 rx_dropped_header_too_small;        /* dword 17*/
 617         u32 rx_dropped_tcp_length;      /* dword 18*/
 618         u32 rx_dropped_runt;    /* dword 19*/
 619         u32 rx_64_byte_packets; /* dword 20*/
 620         u32 rx_65_127_byte_packets;     /* dword 21*/
 621         u32 rx_128_256_byte_packets;    /* dword 22*/
 622         u32 rx_256_511_byte_packets;    /* dword 23*/
 623         u32 rx_512_1023_byte_packets;   /* dword 24*/
 624         u32 rx_1024_1518_byte_packets;  /* dword 25*/
 625         u32 rx_1519_2047_byte_packets;  /* dword 26*/
 626         u32 rx_2048_4095_byte_packets;  /* dword 27*/
 627         u32 rx_4096_8191_byte_packets;  /* dword 28*/
 628         u32 rx_8192_9216_byte_packets;  /* dword 29*/
 629         u32 rx_ip_checksum_errs;        /* dword 30*/
 630         u32 rx_tcp_checksum_errs;       /* dword 31*/
 631         u32 rx_udp_checksum_errs;       /* dword 32*/
 632         u32 rx_non_rss_packets; /* dword 33*/
 633         u32 rx_ipv4_packets;    /* dword 34*/
 634         u32 rx_ipv6_packets;    /* dword 35*/
 635         u32 rx_ipv4_bytes_lsd;  /* dword 36*/
 636         u32 rx_ipv4_bytes_msd;  /* dword 37*/
 637         u32 rx_ipv6_bytes_lsd;  /* dword 38*/
 638         u32 rx_ipv6_bytes_msd;  /* dword 39*/
 639         u32 rx_chute1_packets;  /* dword 40*/
 640         u32 rx_chute2_packets;  /* dword 41*/
 641         u32 rx_chute3_packets;  /* dword 42*/
 642         u32 rx_management_packets;      /* dword 43*/
 643         u32 rx_switched_unicast_packets;        /* dword 44*/
 644         u32 rx_switched_multicast_packets;      /* dword 45*/
 645         u32 rx_switched_broadcast_packets;      /* dword 46*/
 646         u32 tx_bytes_lsd;       /* dword 47*/
 647         u32 tx_bytes_msd;       /* dword 48*/
 648         u32 tx_unicastframes;   /* dword 49*/
 649         u32 tx_multicastframes; /* dword 50*/
 650         u32 tx_broadcastframes; /* dword 51*/
 651         u32 tx_pauseframes;     /* dword 52*/
 652         u32 tx_controlframes;   /* dword 53*/
 653         u32 tx_64_byte_packets; /* dword 54*/
 654         u32 tx_65_127_byte_packets;     /* dword 55*/
 655         u32 tx_128_256_byte_packets;    /* dword 56*/
 656         u32 tx_256_511_byte_packets;    /* dword 57*/
 657         u32 tx_512_1023_byte_packets;   /* dword 58*/
 658         u32 tx_1024_1518_byte_packets;  /* dword 59*/
 659         u32 tx_1519_2047_byte_packets;  /* dword 60*/
 660         u32 tx_2048_4095_byte_packets;  /* dword 61*/
 661         u32 tx_4096_8191_byte_packets;  /* dword 62*/
 662         u32 tx_8192_9216_byte_packets;  /* dword 63*/
 663         u32 rx_fifo_overflow;   /* dword 64*/
 664         u32 rx_input_fifo_overflow;     /* dword 65*/
 665 };
 666
 667 struct be_rxf_stats_v0 {
 668         struct be_port_rxf_stats_v0 port[2];
 669         u32 rx_drops_no_pbuf;   /* dword 132*/
 670         u32 rx_drops_no_txpb;   /* dword 133*/
 671         u32 rx_drops_no_erx_descr;      /* dword 134*/
 672         u32 rx_drops_no_tpre_descr;     /* dword 135*/
 673         u32 management_rx_port_packets; /* dword 136*/
 674         u32 management_rx_port_bytes;   /* dword 137*/
 675         u32 management_rx_port_pause_frames;    /* dword 138*/
 676         u32 management_rx_port_errors;  /* dword 139*/
 677         u32 management_tx_port_packets; /* dword 140*/
 678         u32 management_tx_port_bytes;   /* dword 141*/
 679         u32 management_tx_port_pause;   /* dword 142*/
 680         u32 management_rx_port_rxfifo_overflow; /* dword 143*/
 681         u32 rx_drops_too_many_frags;    /* dword 144*/
 682         u32 rx_drops_invalid_ring;      /* dword 145*/
 683         u32 forwarded_packets;  /* dword 146*/
 684         u32 rx_drops_mtu;       /* dword 147*/
 685         u32 rsvd0[7];
 686         u32 port0_jabber_events;
 687         u32 port1_jabber_events;
 688         u32 rsvd1[6];
 689 };
 690
 691 struct be_erx_stats_v0 {
 692         u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
 693         u32 rsvd[4];
 694 };
 695
 696 struct be_pmem_stats {
 697         u32 eth_red_drops;
 698         u32 rsvd[5];
 699 };
 700
 701 struct be_hw_stats_v0 {
 702         struct be_rxf_stats_v0 rxf;
 703         u32 rsvd[48];
 704         struct be_erx_stats_v0 erx;
 705         struct be_pmem_stats pmem;
 706 };
 707
 708 struct be_cmd_req_get_stats_v0 {
 709         struct be_cmd_req_hdr hdr;
 710         u8 rsvd[sizeof(struct be_hw_stats_v0)];
 711 };
 712
 713 struct be_cmd_resp_get_stats_v0 {
 714         struct be_cmd_resp_hdr hdr;
 715         struct be_hw_stats_v0 hw_stats;
 716 };
 717
 718 struct lancer_pport_stats {
 719         u32 tx_packets_lo;
 720         u32 tx_packets_hi;
 721         u32 tx_unicast_packets_lo;
 722         u32 tx_unicast_packets_hi;
 723         u32 tx_multicast_packets_lo;
 724         u32 tx_multicast_packets_hi;
 725         u32 tx_broadcast_packets_lo;
 726         u32 tx_broadcast_packets_hi;
 727         u32 tx_bytes_lo;
 728         u32 tx_bytes_hi;
 729         u32 tx_unicast_bytes_lo;
 730         u32 tx_unicast_bytes_hi;
 731         u32 tx_multicast_bytes_lo;
 732         u32 tx_multicast_bytes_hi;
 733         u32 tx_broadcast_bytes_lo;
 734         u32 tx_broadcast_bytes_hi;
 735         u32 tx_discards_lo;
 736         u32 tx_discards_hi;
 737         u32 tx_errors_lo;
 738         u32 tx_errors_hi;
 739         u32 tx_pause_frames_lo;
 740         u32 tx_pause_frames_hi;
 741         u32 tx_pause_on_frames_lo;
 742         u32 tx_pause_on_frames_hi;
 743         u32 tx_pause_off_frames_lo;
 744         u32 tx_pause_off_frames_hi;
 745         u32 tx_internal_mac_errors_lo;
 746         u32 tx_internal_mac_errors_hi;
 747         u32 tx_control_frames_lo;
 748         u32 tx_control_frames_hi;
 749         u32 tx_packets_64_bytes_lo;
 750         u32 tx_packets_64_bytes_hi;
 751         u32 tx_packets_65_to_127_bytes_lo;
 752         u32 tx_packets_65_to_127_bytes_hi;
 753         u32 tx_packets_128_to_255_bytes_lo;
 754         u32 tx_packets_128_to_255_bytes_hi;
 755         u32 tx_packets_256_to_511_bytes_lo;
 756         u32 tx_packets_256_to_511_bytes_hi;
 757         u32 tx_packets_512_to_1023_bytes_lo;
 758         u32 tx_packets_512_to_1023_bytes_hi;
 759         u32 tx_packets_1024_to_1518_bytes_lo;
 760         u32 tx_packets_1024_to_1518_bytes_hi;
 761         u32 tx_packets_1519_to_2047_bytes_lo;
 762         u32 tx_packets_1519_to_2047_bytes_hi;
 763         u32 tx_packets_2048_to_4095_bytes_lo;
 764         u32 tx_packets_2048_to_4095_bytes_hi;
 765         u32 tx_packets_4096_to_8191_bytes_lo;
 766         u32 tx_packets_4096_to_8191_bytes_hi;
 767         u32 tx_packets_8192_to_9216_bytes_lo;
 768         u32 tx_packets_8192_to_9216_bytes_hi;
 769         u32 tx_lso_packets_lo;
 770         u32 tx_lso_packets_hi;
 771         u32 rx_packets_lo;
 772         u32 rx_packets_hi;
 773         u32 rx_unicast_packets_lo;
 774         u32 rx_unicast_packets_hi;
 775         u32 rx_multicast_packets_lo;
 776         u32 rx_multicast_packets_hi;
 777         u32 rx_broadcast_packets_lo;
 778         u32 rx_broadcast_packets_hi;
 779         u32 rx_bytes_lo;
 780         u32 rx_bytes_hi;
 781         u32 rx_unicast_bytes_lo;
 782         u32 rx_unicast_bytes_hi;
 783         u32 rx_multicast_bytes_lo;
 784         u32 rx_multicast_bytes_hi;
 785         u32 rx_broadcast_bytes_lo;
 786         u32 rx_broadcast_bytes_hi;
 787         u32 rx_unknown_protos;
 788         u32 rsvd_69; /* Word 69 is reserved */
 789         u32 rx_discards_lo;
 790         u32 rx_discards_hi;
 791         u32 rx_errors_lo;
 792         u32 rx_errors_hi;
 793         u32 rx_crc_errors_lo;
 794         u32 rx_crc_errors_hi;
 795         u32 rx_alignment_errors_lo;
 796         u32 rx_alignment_errors_hi;
 797         u32 rx_symbol_errors_lo;
 798         u32 rx_symbol_errors_hi;
 799         u32 rx_pause_frames_lo;
 800         u32 rx_pause_frames_hi;
 801         u32 rx_pause_on_frames_lo;
 802         u32 rx_pause_on_frames_hi;
 803         u32 rx_pause_off_frames_lo;
 804         u32 rx_pause_off_frames_hi;
 805         u32 rx_frames_too_long_lo;
 806         u32 rx_frames_too_long_hi;
 807         u32 rx_internal_mac_errors_lo;
 808         u32 rx_internal_mac_errors_hi;
 809         u32 rx_undersize_packets;
 810         u32 rx_oversize_packets;
 811         u32 rx_fragment_packets;
 812         u32 rx_jabbers;
 813         u32 rx_control_frames_lo;
 814         u32 rx_control_frames_hi;
 815         u32 rx_control_frames_unknown_opcode_lo;
 816         u32 rx_control_frames_unknown_opcode_hi;
 817         u32 rx_in_range_errors;
 818         u32 rx_out_of_range_errors;
 819         u32 rx_address_filtered;
 820         u32 rx_vlan_filtered;
 821         u32 rx_dropped_too_small;
 822         u32 rx_dropped_too_short;
 823         u32 rx_dropped_header_too_small;
 824         u32 rx_dropped_invalid_tcp_length;
 825         u32 rx_dropped_runt;
 826         u32 rx_ip_checksum_errors;
 827         u32 rx_tcp_checksum_errors;
 828         u32 rx_udp_checksum_errors;
 829         u32 rx_non_rss_packets;
 830         u32 rsvd_111;
 831         u32 rx_ipv4_packets_lo;
 832         u32 rx_ipv4_packets_hi;
 833         u32 rx_ipv6_packets_lo;
 834         u32 rx_ipv6_packets_hi;
 835         u32 rx_ipv4_bytes_lo;
 836         u32 rx_ipv4_bytes_hi;
 837         u32 rx_ipv6_bytes_lo;
 838         u32 rx_ipv6_bytes_hi;
 839         u32 rx_nic_packets_lo;
 840         u32 rx_nic_packets_hi;
 841         u32 rx_tcp_packets_lo;
 842         u32 rx_tcp_packets_hi;
 843         u32 rx_iscsi_packets_lo;
 844         u32 rx_iscsi_packets_hi;
 845         u32 rx_management_packets_lo;
 846         u32 rx_management_packets_hi;
 847         u32 rx_switched_unicast_packets_lo;
 848         u32 rx_switched_unicast_packets_hi;
 849         u32 rx_switched_multicast_packets_lo;
 850         u32 rx_switched_multicast_packets_hi;
 851         u32 rx_switched_broadcast_packets_lo;
 852         u32 rx_switched_broadcast_packets_hi;
 853         u32 num_forwards_lo;
 854         u32 num_forwards_hi;
 855         u32 rx_fifo_overflow;
 856         u32 rx_input_fifo_overflow;
 857         u32 rx_drops_too_many_frags_lo;
 858         u32 rx_drops_too_many_frags_hi;
 859         u32 rx_drops_invalid_queue;
 860         u32 rsvd_141;
 861         u32 rx_drops_mtu_lo;
 862         u32 rx_drops_mtu_hi;
 863         u32 rx_packets_64_bytes_lo;
 864         u32 rx_packets_64_bytes_hi;
 865         u32 rx_packets_65_to_127_bytes_lo;
 866         u32 rx_packets_65_to_127_bytes_hi;
 867         u32 rx_packets_128_to_255_bytes_lo;
 868         u32 rx_packets_128_to_255_bytes_hi;
 869         u32 rx_packets_256_to_511_bytes_lo;
 870         u32 rx_packets_256_to_511_bytes_hi;
 871         u32 rx_packets_512_to_1023_bytes_lo;
 872         u32 rx_packets_512_to_1023_bytes_hi;
 873         u32 rx_packets_1024_to_1518_bytes_lo;
 874         u32 rx_packets_1024_to_1518_bytes_hi;
 875         u32 rx_packets_1519_to_2047_bytes_lo;
 876         u32 rx_packets_1519_to_2047_bytes_hi;
 877         u32 rx_packets_2048_to_4095_bytes_lo;
 878         u32 rx_packets_2048_to_4095_bytes_hi;
 879         u32 rx_packets_4096_to_8191_bytes_lo;
 880         u32 rx_packets_4096_to_8191_bytes_hi;
 881         u32 rx_packets_8192_to_9216_bytes_lo;
 882         u32 rx_packets_8192_to_9216_bytes_hi;
 883 };
 884
 885 struct pport_stats_params {
 886         u16 pport_num;
 887         u8 rsvd;
 888         u8 reset_stats;
 889 };
 890
 891 struct lancer_cmd_req_pport_stats {
 892         struct be_cmd_req_hdr hdr;
 893         union {
 894                 struct pport_stats_params params;
 895                 u8 rsvd[sizeof(struct lancer_pport_stats)];
 896         } cmd_params;
 897 };
 898
 899 struct lancer_cmd_resp_pport_stats {
 900         struct be_cmd_resp_hdr hdr;
 901         struct lancer_pport_stats pport_stats;
 902 };
 903
 904 static inline struct lancer_pport_stats*
 905         pport_stats_from_cmd(struct be_adapter *adapter)
 906 {
 907         struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
 908         return &cmd->pport_stats;
 909 }
 910
 911 struct be_cmd_req_get_cntl_addnl_attribs {
 912         struct be_cmd_req_hdr hdr;
 913         u8 rsvd[8];
 914 };
 915
 916 struct be_cmd_resp_get_cntl_addnl_attribs {
 917         struct be_cmd_resp_hdr hdr;
 918         u16 ipl_file_number;
 919         u8 ipl_file_version;
 920         u8 rsvd0;
 921         u8 on_die_temperature; /* in degrees centigrade*/
 922         u8 rsvd1[3];
 923 };
 924
 925 struct be_cmd_req_vlan_config {
 926         struct be_cmd_req_hdr hdr;
 927         u8 interface_id;
 928         u8 promiscuous;
 929         u8 untagged;
 930         u8 num_vlan;
 931         u16 normal_vlan[64];
 932 } __packed;
 933
 934 /******************* RX FILTER ******************************/
 935 #define BE_MAX_MC               64 /* set mcast promisc if > 64 */
 936 struct macaddr {
 937         u8 byte[ETH_ALEN];
 938 };
 939
 940 struct be_cmd_req_rx_filter {
 941         struct be_cmd_req_hdr hdr;
 942         u32 global_flags_mask;
 943         u32 global_flags;
 944         u32 if_flags_mask;
 945         u32 if_flags;
 946         u32 if_id;
 947         u32 mcast_num;
 948         struct macaddr mcast_mac[BE_MAX_MC];
 949 };
 950
 951 /******************** Link Status Query *******************/
 952 struct be_cmd_req_link_status {
 953         struct be_cmd_req_hdr hdr;
 954         u32 rsvd;
 955 };
 956
 957 enum {
 958         PHY_LINK_DUPLEX_NONE = 0x0,
 959         PHY_LINK_DUPLEX_HALF = 0x1,
 960         PHY_LINK_DUPLEX_FULL = 0x2
 961 };
 962
 963 enum {
 964         PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
 965         PHY_LINK_SPEED_10MBPS = 0x1,
 966         PHY_LINK_SPEED_100MBPS = 0x2,
 967         PHY_LINK_SPEED_1GBPS = 0x3,
 968         PHY_LINK_SPEED_10GBPS = 0x4
 969 };
 970
 971 struct be_cmd_resp_link_status {
 972         struct be_cmd_resp_hdr hdr;
 973         u8 physical_port;
 974         u8 mac_duplex;
 975         u8 mac_speed;
 976         u8 mac_fault;
 977         u8 mgmt_mac_duplex;
 978         u8 mgmt_mac_speed;
 979         u16 link_speed;
 980         u8 logical_link_status;
 981         u8 rsvd1[3];
 982 } __packed;
 983
 984 /******************** Port Identification ***************************/
 985 /*    Identifies the type of port attached to NIC     */
 986 struct be_cmd_req_port_type {
 987         struct be_cmd_req_hdr hdr;
 988         u32 page_num;
 989         u32 port;
 990 };
 991
 992 enum {
 993         TR_PAGE_A0 = 0xa0,
 994         TR_PAGE_A2 = 0xa2
 995 };
 996
 997 struct be_cmd_resp_port_type {
 998         struct be_cmd_resp_hdr hdr;
 999         u32 page_num;
1000         u32 port;
1001         struct data {
1002                 u8 identifier;
1003                 u8 identifier_ext;
1004                 u8 connector;
1005                 u8 transceiver[8];
1006                 u8 rsvd0[3];
1007                 u8 length_km;
1008                 u8 length_hm;
1009                 u8 length_om1;
1010                 u8 length_om2;
1011                 u8 length_cu;
1012                 u8 length_cu_m;
1013                 u8 vendor_name[16];
1014                 u8 rsvd;
1015                 u8 vendor_oui[3];
1016                 u8 vendor_pn[16];
1017                 u8 vendor_rev[4];
1018         } data;
1019 };
1020
1021 /******************** Get FW Version *******************/
1022 struct be_cmd_req_get_fw_version {
1023         struct be_cmd_req_hdr hdr;
1024         u8 rsvd0[FW_VER_LEN];
1025         u8 rsvd1[FW_VER_LEN];
1026 } __packed;
1027
1028 struct be_cmd_resp_get_fw_version {
1029         struct be_cmd_resp_hdr hdr;
1030         u8 firmware_version_string[FW_VER_LEN];
1031         u8 fw_on_flash_version_string[FW_VER_LEN];
1032 } __packed;
1033
1034 /******************** Set Flow Contrl *******************/
1035 struct be_cmd_req_set_flow_control {
1036         struct be_cmd_req_hdr hdr;
1037         u16 tx_flow_control;
1038         u16 rx_flow_control;
1039 } __packed;
1040
1041 /******************** Get Flow Contrl *******************/
1042 struct be_cmd_req_get_flow_control {
1043         struct be_cmd_req_hdr hdr;
1044         u32 rsvd;
1045 };
1046
1047 struct be_cmd_resp_get_flow_control {
1048         struct be_cmd_resp_hdr hdr;
1049         u16 tx_flow_control;
1050         u16 rx_flow_control;
1051 } __packed;
1052
1053 /******************** Modify EQ Delay *******************/
1054 struct be_cmd_req_modify_eq_delay {
1055         struct be_cmd_req_hdr hdr;
1056         u32 num_eq;
1057         struct {
1058                 u32 eq_id;
1059                 u32 phase;
1060                 u32 delay_multiplier;
1061         } delay[8];
1062 } __packed;
1063
1064 struct be_cmd_resp_modify_eq_delay {
1065         struct be_cmd_resp_hdr hdr;
1066         u32 rsvd0;
1067 } __packed;
1068
1069 /******************** Get FW Config *******************/
1070 /* The HW can come up in either of the following multi-channel modes
1071  * based on the skew/IPL.
1072  */
1073 #define RDMA_ENABLED                            0x4
1074 #define FLEX10_MODE                             0x400
1075 #define VNIC_MODE                               0x20000
1076 #define UMC_ENABLED                             0x1000000
1077 struct be_cmd_req_query_fw_cfg {
1078         struct be_cmd_req_hdr hdr;
1079         u32 rsvd[31];
1080 };
1081
1082 struct be_cmd_resp_query_fw_cfg {
1083         struct be_cmd_resp_hdr hdr;
1084         u32 be_config_number;
1085         u32 asic_revision;
1086         u32 phys_port;
1087         u32 function_mode;
1088         u32 rsvd[26];
1089         u32 function_caps;
1090 };
1091
1092 /******************** RSS Config ****************************************/
1093 /* RSS type             Input parameters used to compute RX hash
1094  * RSS_ENABLE_IPV4      SRC IPv4, DST IPv4
1095  * RSS_ENABLE_TCP_IPV4  SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1096  * RSS_ENABLE_IPV6      SRC IPv6, DST IPv6
1097  * RSS_ENABLE_TCP_IPV6  SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1098  * RSS_ENABLE_UDP_IPV4  SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1099  * RSS_ENABLE_UDP_IPV6  SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1100  *
1101  * When multiple RSS types are enabled, HW picks the best hash policy
1102  * based on the type of the received packet.
1103  */
1104 #define RSS_ENABLE_NONE                         0x0
1105 #define RSS_ENABLE_IPV4                         0x1
1106 #define RSS_ENABLE_TCP_IPV4                     0x2
1107 #define RSS_ENABLE_IPV6                         0x4
1108 #define RSS_ENABLE_TCP_IPV6                     0x8
1109 #define RSS_ENABLE_UDP_IPV4                     0x10
1110 #define RSS_ENABLE_UDP_IPV6                     0x20
1111
1112 #define L3_RSS_FLAGS                            (RXH_IP_DST | RXH_IP_SRC)
1113 #define L4_RSS_FLAGS                            (RXH_L4_B_0_1 | RXH_L4_B_2_3)
1114
1115 struct be_cmd_req_rss_config {
1116         struct be_cmd_req_hdr hdr;
1117         u32 if_id;
1118         u16 enable_rss;
1119         u16 cpu_table_size_log2;
1120         u32 hash[10];
1121         u8 cpu_table[128];
1122         u8 flush;
1123         u8 rsvd0[3];
1124 };
1125
1126 /******************** Port Beacon ***************************/
1127
1128 #define BEACON_STATE_ENABLED            0x1
1129 #define BEACON_STATE_DISABLED           0x0
1130
1131 struct be_cmd_req_enable_disable_beacon {
1132         struct be_cmd_req_hdr hdr;
1133         u8  port_num;
1134         u8  beacon_state;
1135         u8  beacon_duration;
1136         u8  status_duration;
1137 } __packed;
1138
1139 struct be_cmd_resp_enable_disable_beacon {
1140         struct be_cmd_resp_hdr resp_hdr;
1141         u32 rsvd0;
1142 } __packed;
1143
1144 struct be_cmd_req_get_beacon_state {
1145         struct be_cmd_req_hdr hdr;
1146         u8  port_num;
1147         u8  rsvd0;
1148         u16 rsvd1;
1149 } __packed;
1150
1151 struct be_cmd_resp_get_beacon_state {
1152         struct be_cmd_resp_hdr resp_hdr;
1153         u8 beacon_state;
1154         u8 rsvd0[3];
1155 } __packed;
1156
1157 /****************** Firmware Flash ******************/
1158 struct flashrom_params {
1159         u32 op_code;
1160         u32 op_type;
1161         u32 data_buf_size;
1162         u32 offset;
1163 };
1164
1165 struct be_cmd_write_flashrom {
1166         struct be_cmd_req_hdr hdr;
1167         struct flashrom_params params;
1168         u8 data_buf[32768];
1169         u8 rsvd[4];
1170 } __packed;
1171
1172 /* cmd to read flash crc */
1173 struct be_cmd_read_flash_crc {
1174         struct be_cmd_req_hdr hdr;
1175         struct flashrom_params params;
1176         u8 crc[4];
1177         u8 rsvd[4];
1178 };
1179 /**************** Lancer Firmware Flash ************/
1180 struct amap_lancer_write_obj_context {
1181         u8 write_length[24];
1182         u8 reserved1[7];
1183         u8 eof;
1184 } __packed;
1185
1186 struct lancer_cmd_req_write_object {
1187         struct be_cmd_req_hdr hdr;
1188         u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
1189         u32 write_offset;
1190         u8 object_name[104];
1191         u32 descriptor_count;
1192         u32 buf_len;
1193         u32 addr_low;
1194         u32 addr_high;
1195 };
1196
1197 #define LANCER_NO_RESET_NEEDED          0x00
1198 #define LANCER_FW_RESET_NEEDED          0x02
1199 struct lancer_cmd_resp_write_object {
1200         u8 opcode;
1201         u8 subsystem;
1202         u8 rsvd1[2];
1203         u8 status;
1204         u8 additional_status;
1205         u8 rsvd2[2];
1206         u32 resp_len;
1207         u32 actual_resp_len;
1208         u32 actual_write_len;
1209         u8 change_status;
1210         u8 rsvd3[3];
1211 };
1212
1213 /************************ Lancer Read FW info **************/
1214 #define LANCER_READ_FILE_CHUNK                  (32*1024)
1215 #define LANCER_READ_FILE_EOF_MASK               0x80000000
1216
1217 #define LANCER_FW_DUMP_FILE                     "/dbg/dump.bin"
1218 #define LANCER_VPD_PF_FILE                      "/vpd/ntr_pf.vpd"
1219 #define LANCER_VPD_VF_FILE                      "/vpd/ntr_vf.vpd"
1220
1221 struct lancer_cmd_req_read_object {
1222         struct be_cmd_req_hdr hdr;
1223         u32 desired_read_len;
1224         u32 read_offset;
1225         u8 object_name[104];
1226         u32 descriptor_count;
1227         u32 buf_len;
1228         u32 addr_low;
1229         u32 addr_high;
1230 };
1231
1232 struct lancer_cmd_resp_read_object {
1233         u8 opcode;
1234         u8 subsystem;
1235         u8 rsvd1[2];
1236         u8 status;
1237         u8 additional_status;
1238         u8 rsvd2[2];
1239         u32 resp_len;
1240         u32 actual_resp_len;
1241         u32 actual_read_len;
1242         u32 eof;
1243 };
1244
1245 /************************ WOL *******************************/
1246 struct be_cmd_req_acpi_wol_magic_config{
1247         struct be_cmd_req_hdr hdr;
1248         u32 rsvd0[145];
1249         u8 magic_mac[6];
1250         u8 rsvd2[2];
1251 } __packed;
1252
1253 struct be_cmd_req_acpi_wol_magic_config_v1 {
1254         struct be_cmd_req_hdr hdr;
1255         u8 rsvd0[2];
1256         u8 query_options;
1257         u8 rsvd1[5];
1258         u32 rsvd2[288];
1259         u8 magic_mac[6];
1260         u8 rsvd3[22];
1261 } __packed;
1262
1263 struct be_cmd_resp_acpi_wol_magic_config_v1 {
1264         struct be_cmd_resp_hdr hdr;
1265         u8 rsvd0[2];
1266         u8 wol_settings;
1267         u8 rsvd1[5];
1268         u32 rsvd2[295];
1269 } __packed;
1270
1271 #define BE_GET_WOL_CAP                  2
1272
1273 #define BE_WOL_CAP                      0x1
1274 #define BE_PME_D0_CAP                   0x8
1275 #define BE_PME_D1_CAP                   0x10
1276 #define BE_PME_D2_CAP                   0x20
1277 #define BE_PME_D3HOT_CAP                0x40
1278 #define BE_PME_D3COLD_CAP               0x80
1279
1280 /********************** LoopBack test *********************/
1281 struct be_cmd_req_loopback_test {
1282         struct be_cmd_req_hdr hdr;
1283         u32 loopback_type;
1284         u32 num_pkts;
1285         u64 pattern;
1286         u32 src_port;
1287         u32 dest_port;
1288         u32 pkt_size;
1289 };
1290
1291 struct be_cmd_resp_loopback_test {
1292         struct be_cmd_resp_hdr resp_hdr;
1293         u32    status;
1294         u32    num_txfer;
1295         u32    num_rx;
1296         u32    miscomp_off;
1297         u32    ticks_compl;
1298 };
1299
1300 struct be_cmd_req_set_lmode {
1301         struct be_cmd_req_hdr hdr;
1302         u8 src_port;
1303         u8 dest_port;
1304         u8 loopback_type;
1305         u8 loopback_state;
1306 };
1307
1308 struct be_cmd_resp_set_lmode {
1309         struct be_cmd_resp_hdr resp_hdr;
1310         u8 rsvd0[4];
1311 };
1312
1313 /********************** DDR DMA test *********************/
1314 struct be_cmd_req_ddrdma_test {
1315         struct be_cmd_req_hdr hdr;
1316         u64 pattern;
1317         u32 byte_count;
1318         u32 rsvd0;
1319         u8  snd_buff[4096];
1320         u8  rsvd1[4096];
1321 };
1322
1323 struct be_cmd_resp_ddrdma_test {
1324         struct be_cmd_resp_hdr hdr;
1325         u64 pattern;
1326         u32 byte_cnt;
1327         u32 snd_err;
1328         u8  rsvd0[4096];
1329         u8  rcv_buff[4096];
1330 };
1331
1332 /*********************** SEEPROM Read ***********************/
1333
1334 #define BE_READ_SEEPROM_LEN 1024
1335 struct be_cmd_req_seeprom_read {
1336         struct be_cmd_req_hdr hdr;
1337         u8 rsvd0[BE_READ_SEEPROM_LEN];
1338 };
1339
1340 struct be_cmd_resp_seeprom_read {
1341         struct be_cmd_req_hdr hdr;
1342         u8 seeprom_data[BE_READ_SEEPROM_LEN];
1343 };
1344
1345 enum {
1346         PHY_TYPE_CX4_10GB = 0,
1347         PHY_TYPE_XFP_10GB,
1348         PHY_TYPE_SFP_1GB,
1349         PHY_TYPE_SFP_PLUS_10GB,
1350         PHY_TYPE_KR_10GB,
1351         PHY_TYPE_KX4_10GB,
1352         PHY_TYPE_BASET_10GB,
1353         PHY_TYPE_BASET_1GB,
1354         PHY_TYPE_BASEX_1GB,
1355         PHY_TYPE_SGMII,
1356         PHY_TYPE_DISABLED = 255
1357 };
1358
1359 #define BE_SUPPORTED_SPEED_NONE         0
1360 #define BE_SUPPORTED_SPEED_10MBPS       1
1361 #define BE_SUPPORTED_SPEED_100MBPS      2
1362 #define BE_SUPPORTED_SPEED_1GBPS        4
1363 #define BE_SUPPORTED_SPEED_10GBPS       8
1364
1365 #define BE_AN_EN                        0x2
1366 #define BE_PAUSE_SYM_EN                 0x80
1367
1368 /* MAC speed valid values */
1369 #define SPEED_DEFAULT  0x0
1370 #define SPEED_FORCED_10GB  0x1
1371 #define SPEED_FORCED_1GB  0x2
1372 #define SPEED_AUTONEG_10GB  0x3
1373 #define SPEED_AUTONEG_1GB  0x4
1374 #define SPEED_AUTONEG_100MB  0x5
1375 #define SPEED_AUTONEG_10GB_1GB 0x6
1376 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1377 #define SPEED_AUTONEG_1GB_100MB  0x8
1378 #define SPEED_AUTONEG_10MB  0x9
1379 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1380 #define SPEED_AUTONEG_100MB_10MB 0xb
1381 #define SPEED_FORCED_100MB  0xc
1382 #define SPEED_FORCED_10MB  0xd
1383
1384 struct be_cmd_req_get_phy_info {
1385         struct be_cmd_req_hdr hdr;
1386         u8 rsvd0[24];
1387 };
1388
1389 struct be_phy_info {
1390         u16 phy_type;
1391         u16 interface_type;
1392         u32 misc_params;
1393         u16 ext_phy_details;
1394         u16 rsvd;
1395         u16 auto_speeds_supported;
1396         u16 fixed_speeds_supported;
1397         u32 future_use[2];
1398 };
1399
1400 struct be_cmd_resp_get_phy_info {
1401         struct be_cmd_req_hdr hdr;
1402         struct be_phy_info phy_info;
1403 };
1404
1405 /*********************** Set QOS ***********************/
1406
1407 #define BE_QOS_BITS_NIC                         1
1408
1409 struct be_cmd_req_set_qos {
1410         struct be_cmd_req_hdr hdr;
1411         u32 valid_bits;
1412         u32 max_bps_nic;
1413         u32 rsvd[7];
1414 };
1415
1416 struct be_cmd_resp_set_qos {
1417         struct be_cmd_resp_hdr hdr;
1418         u32 rsvd;
1419 };
1420
1421 /*********************** Controller Attributes ***********************/
1422 struct be_cmd_req_cntl_attribs {
1423         struct be_cmd_req_hdr hdr;
1424 };
1425
1426 struct be_cmd_resp_cntl_attribs {
1427         struct be_cmd_resp_hdr hdr;
1428         struct mgmt_controller_attrib attribs;
1429 };
1430
1431 /*********************** Set driver function ***********************/
1432 #define CAPABILITY_SW_TIMESTAMPS        2
1433 #define CAPABILITY_BE3_NATIVE_ERX_API   4
1434
1435 struct be_cmd_req_set_func_cap {
1436         struct be_cmd_req_hdr hdr;
1437         u32 valid_cap_flags;
1438         u32 cap_flags;
1439         u8 rsvd[212];
1440 };
1441
1442 struct be_cmd_resp_set_func_cap {
1443         struct be_cmd_resp_hdr hdr;
1444         u32 valid_cap_flags;
1445         u32 cap_flags;
1446         u8 rsvd[212];
1447 };
1448
1449 /*********************** Function Privileges ***********************/
1450 enum {
1451         BE_PRIV_DEFAULT = 0x1,
1452         BE_PRIV_LNKQUERY = 0x2,
1453         BE_PRIV_LNKSTATS = 0x4,
1454         BE_PRIV_LNKMGMT = 0x8,
1455         BE_PRIV_LNKDIAG = 0x10,
1456         BE_PRIV_UTILQUERY = 0x20,
1457         BE_PRIV_FILTMGMT = 0x40,
1458         BE_PRIV_IFACEMGMT = 0x80,
1459         BE_PRIV_VHADM = 0x100,
1460         BE_PRIV_DEVCFG = 0x200,
1461         BE_PRIV_DEVSEC = 0x400
1462 };
1463 #define MAX_PRIVILEGES          (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1464                                  BE_PRIV_DEVSEC)
1465 #define MIN_PRIVILEGES          BE_PRIV_DEFAULT
1466
1467 struct be_cmd_priv_map {
1468         u8 opcode;
1469         u8 subsystem;
1470         u32 priv_mask;
1471 };
1472
1473 struct be_cmd_req_get_fn_privileges {
1474         struct be_cmd_req_hdr hdr;
1475         u32 rsvd;
1476 };
1477
1478 struct be_cmd_resp_get_fn_privileges {
1479         struct be_cmd_resp_hdr hdr;
1480         u32 privilege_mask;
1481 };
1482
1483
1484 /******************** GET/SET_MACLIST  **************************/
1485 #define BE_MAX_MAC                      64
1486 struct be_cmd_req_get_mac_list {
1487         struct be_cmd_req_hdr hdr;
1488         u8 mac_type;
1489         u8 perm_override;
1490         u16 iface_id;
1491         u32 mac_id;
1492         u32 rsvd[3];
1493 } __packed;
1494
1495 struct get_list_macaddr {
1496         u16 mac_addr_size;
1497         union {
1498                 u8 macaddr[6];
1499                 struct {
1500                         u8 rsvd[2];
1501                         u32 mac_id;
1502                 } __packed s_mac_id;
1503         } __packed mac_addr_id;
1504 } __packed;
1505
1506 struct be_cmd_resp_get_mac_list {
1507         struct be_cmd_resp_hdr hdr;
1508         struct get_list_macaddr fd_macaddr; /* Factory default mac */
1509         struct get_list_macaddr macid_macaddr; /* soft mac */
1510         u8 true_mac_count;
1511         u8 pseudo_mac_count;
1512         u8 mac_list_size;
1513         u8 rsvd;
1514         /* perm override mac */
1515         struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1516 } __packed;
1517
1518 struct be_cmd_req_set_mac_list {
1519         struct be_cmd_req_hdr hdr;
1520         u8 mac_count;
1521         u8 rsvd1;
1522         u16 rsvd2;
1523         struct macaddr mac[BE_MAX_MAC];
1524 } __packed;
1525
1526 /*********************** HSW Config ***********************/
1527 struct amap_set_hsw_context {
1528         u8 interface_id[16];
1529         u8 rsvd0[14];
1530         u8 pvid_valid;
1531         u8 rsvd1;
1532         u8 rsvd2[16];
1533         u8 pvid[16];
1534         u8 rsvd3[32];
1535         u8 rsvd4[32];
1536         u8 rsvd5[32];
1537 } __packed;
1538
1539 struct be_cmd_req_set_hsw_config {
1540         struct be_cmd_req_hdr hdr;
1541         u8 context[sizeof(struct amap_set_hsw_context) / 8];
1542 } __packed;
1543
1544 struct be_cmd_resp_set_hsw_config {
1545         struct be_cmd_resp_hdr hdr;
1546         u32 rsvd;
1547 };
1548
1549 struct amap_get_hsw_req_context {
1550         u8 interface_id[16];
1551         u8 rsvd0[14];
1552         u8 pvid_valid;
1553         u8 pport;
1554 } __packed;
1555
1556 struct amap_get_hsw_resp_context {
1557         u8 rsvd1[16];
1558         u8 pvid[16];
1559         u8 rsvd2[32];
1560         u8 rsvd3[32];
1561         u8 rsvd4[32];
1562 } __packed;
1563
1564 struct be_cmd_req_get_hsw_config {
1565         struct be_cmd_req_hdr hdr;
1566         u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1567 } __packed;
1568
1569 struct be_cmd_resp_get_hsw_config {
1570         struct be_cmd_resp_hdr hdr;
1571         u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1572         u32 rsvd;
1573 };
1574
1575 /******************* get port names ***************/
1576 struct be_cmd_req_get_port_name {
1577         struct be_cmd_req_hdr hdr;
1578         u32 rsvd0;
1579 };
1580
1581 struct be_cmd_resp_get_port_name {
1582         struct be_cmd_req_hdr hdr;
1583         u8 port_name[4];
1584 };
1585
1586 /*************** HW Stats Get v1 **********************************/
1587 #define BE_TXP_SW_SZ                    48
1588 struct be_port_rxf_stats_v1 {
1589         u32 rsvd0[12];
1590         u32 rx_crc_errors;
1591         u32 rx_alignment_symbol_errors;
1592         u32 rx_pause_frames;
1593         u32 rx_priority_pause_frames;
1594         u32 rx_control_frames;
1595         u32 rx_in_range_errors;
1596         u32 rx_out_range_errors;
1597         u32 rx_frame_too_long;
1598         u32 rx_address_filtered;
1599         u32 rx_dropped_too_small;
1600         u32 rx_dropped_too_short;
1601         u32 rx_dropped_header_too_small;
1602         u32 rx_dropped_tcp_length;
1603         u32 rx_dropped_runt;
1604         u32 rsvd1[10];
1605         u32 rx_ip_checksum_errs;
1606         u32 rx_tcp_checksum_errs;
1607         u32 rx_udp_checksum_errs;
1608         u32 rsvd2[7];
1609         u32 rx_switched_unicast_packets;
1610         u32 rx_switched_multicast_packets;
1611         u32 rx_switched_broadcast_packets;
1612         u32 rsvd3[3];
1613         u32 tx_pauseframes;
1614         u32 tx_priority_pauseframes;
1615         u32 tx_controlframes;
1616         u32 rsvd4[10];
1617         u32 rxpp_fifo_overflow_drop;
1618         u32 rx_input_fifo_overflow_drop;
1619         u32 pmem_fifo_overflow_drop;
1620         u32 jabber_events;
1621         u32 rsvd5[3];
1622 };
1623
1624
1625 struct be_rxf_stats_v1 {
1626         struct be_port_rxf_stats_v1 port[4];
1627         u32 rsvd0[2];
1628         u32 rx_drops_no_pbuf;
1629         u32 rx_drops_no_txpb;
1630         u32 rx_drops_no_erx_descr;
1631         u32 rx_drops_no_tpre_descr;
1632         u32 rsvd1[6];
1633         u32 rx_drops_too_many_frags;
1634         u32 rx_drops_invalid_ring;
1635         u32 forwarded_packets;
1636         u32 rx_drops_mtu;
1637         u32 rsvd2[14];
1638 };
1639
1640 struct be_erx_stats_v1 {
1641         u32 rx_drops_no_fragments[68];     /* dwordS 0 to 67*/
1642         u32 rsvd[4];
1643 };
1644
1645 struct be_hw_stats_v1 {
1646         struct be_rxf_stats_v1 rxf;
1647         u32 rsvd0[BE_TXP_SW_SZ];
1648         struct be_erx_stats_v1 erx;
1649         struct be_pmem_stats pmem;
1650         u32 rsvd1[18];
1651 };
1652
1653 struct be_cmd_req_get_stats_v1 {
1654         struct be_cmd_req_hdr hdr;
1655         u8 rsvd[sizeof(struct be_hw_stats_v1)];
1656 };
1657
1658 struct be_cmd_resp_get_stats_v1 {
1659         struct be_cmd_resp_hdr hdr;
1660         struct be_hw_stats_v1 hw_stats;
1661 };
1662
1663 /************** get fat capabilites *******************/
1664 #define MAX_MODULES 27
1665 #define MAX_MODES 4
1666 #define MODE_UART 0
1667 #define FW_LOG_LEVEL_DEFAULT 48
1668 #define FW_LOG_LEVEL_FATAL 64
1669
1670 struct ext_fat_mode {
1671         u8 mode;
1672         u8 rsvd0;
1673         u16 port_mask;
1674         u32 dbg_lvl;
1675         u64 fun_mask;
1676 } __packed;
1677
1678 struct ext_fat_modules {
1679         u8 modules_str[32];
1680         u32 modules_id;
1681         u32 num_modes;
1682         struct ext_fat_mode trace_lvl[MAX_MODES];
1683 } __packed;
1684
1685 struct be_fat_conf_params {
1686         u32 max_log_entries;
1687         u32 log_entry_size;
1688         u8 log_type;
1689         u8 max_log_funs;
1690         u8 max_log_ports;
1691         u8 rsvd0;
1692         u32 supp_modes;
1693         u32 num_modules;
1694         struct ext_fat_modules module[MAX_MODULES];
1695 } __packed;
1696
1697 struct be_cmd_req_get_ext_fat_caps {
1698         struct be_cmd_req_hdr hdr;
1699         u32 parameter_type;
1700 };
1701
1702 struct be_cmd_resp_get_ext_fat_caps {
1703         struct be_cmd_resp_hdr hdr;
1704         struct be_fat_conf_params get_params;
1705 };
1706
1707 struct be_cmd_req_set_ext_fat_caps {
1708         struct be_cmd_req_hdr hdr;
1709         struct be_fat_conf_params set_params;
1710 };
1711
1712 #define RESOURCE_DESC_SIZE                      88
1713 #define NIC_RESOURCE_DESC_TYPE_V0               0x41
1714 #define NIC_RESOURCE_DESC_TYPE_V1               0x51
1715 #define MAX_RESOURCE_DESC                       4
1716 #define MAX_RESOURCE_DESC_V1                    32
1717
1718 /* QOS unit number */
1719 #define QUN                                     4
1720 /* Immediate */
1721 #define IMM                                     6
1722 /* No save */
1723 #define NOSV                                    7
1724
1725 struct be_nic_resource_desc {
1726         u8 desc_type;
1727         u8 desc_len;
1728         u8 rsvd1;
1729         u8 flags;
1730         u8 vf_num;
1731         u8 rsvd2;
1732         u8 pf_num;
1733         u8 rsvd3;
1734         u16 unicast_mac_count;
1735         u8 rsvd4[6];
1736         u16 mcc_count;
1737         u16 vlan_count;
1738         u16 mcast_mac_count;
1739         u16 txq_count;
1740         u16 rq_count;
1741         u16 rssq_count;
1742         u16 lro_count;
1743         u16 cq_count;
1744         u16 toe_conn_count;
1745         u16 eq_count;
1746         u32 rsvd5;
1747         u32 cap_flags;
1748         u8 link_param;
1749         u8 rsvd6[3];
1750         u32 bw_min;
1751         u32 bw_max;
1752         u8 acpi_params;
1753         u8 wol_param;
1754         u16 rsvd7;
1755         u32 rsvd8[3];
1756 };
1757
1758 struct be_cmd_req_get_func_config {
1759         struct be_cmd_req_hdr hdr;
1760 };
1761
1762 struct be_cmd_resp_get_func_config {
1763         struct be_cmd_resp_hdr hdr;
1764         u32 desc_count;
1765         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE];
1766 };
1767
1768 #define ACTIVE_PROFILE_TYPE                     0x2
1769 struct be_cmd_req_get_profile_config {
1770         struct be_cmd_req_hdr hdr;
1771         u8 rsvd;
1772         u8 type;
1773         u16 rsvd1;
1774 };
1775
1776 struct be_cmd_resp_get_profile_config {
1777         struct be_cmd_req_hdr hdr;
1778         u32 desc_count;
1779         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE];
1780 };
1781
1782 struct be_cmd_resp_get_profile_config_v1 {
1783         struct be_cmd_req_hdr hdr;
1784         u32 desc_count;
1785         u8 func_param[MAX_RESOURCE_DESC_V1 * RESOURCE_DESC_SIZE];
1786 };
1787
1788 struct be_cmd_req_set_profile_config {
1789         struct be_cmd_req_hdr hdr;
1790         u32 rsvd;
1791         u32 desc_count;
1792         struct be_nic_resource_desc nic_desc;
1793 };
1794
1795 struct be_cmd_resp_set_profile_config {
1796         struct be_cmd_req_hdr hdr;
1797 };
1798
1799 struct be_cmd_enable_disable_vf {
1800         struct be_cmd_req_hdr hdr;
1801         u8 enable;
1802         u8 rsvd[3];
1803 };
1804
1805 struct be_cmd_req_intr_set {
1806         struct be_cmd_req_hdr hdr;
1807         u8 intr_enabled;
1808         u8 rsvd[3];
1809 };
1810
1811 static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
1812 {
1813         return flags & adapter->cmd_privileges ? true : false;
1814 }
1815
1816 /************** Get IFACE LIST *******************/
1817 struct be_if_desc {
1818         u32 if_id;
1819         u32 cap_flags;
1820         u32 en_flags;
1821 };
1822
1823 struct be_cmd_req_get_iface_list {
1824         struct be_cmd_req_hdr hdr;
1825 };
1826
1827 struct be_cmd_resp_get_iface_list {
1828         struct be_cmd_req_hdr hdr;
1829         u32 if_cnt;
1830         struct be_if_desc if_desc;
1831 };
1832
1833 extern int be_pci_fnum_get(struct be_adapter *adapter);
1834 extern int be_fw_wait_ready(struct be_adapter *adapter);
1835 extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
1836                                  bool permanent, u32 if_handle, u32 pmac_id);
1837 extern int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
1838                         u32 if_id, u32 *pmac_id, u32 domain);
1839 extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id,
1840                         int pmac_id, u32 domain);
1841 extern int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags,
1842                             u32 en_flags, u32 *if_handle, u32 domain);
1843 extern int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle,
1844                         u32 domain);
1845 extern int be_cmd_eq_create(struct be_adapter *adapter,
1846                         struct be_queue_info *eq, int eq_delay);
1847 extern int be_cmd_cq_create(struct be_adapter *adapter,
1848                         struct be_queue_info *cq, struct be_queue_info *eq,
1849                         bool no_delay, int num_cqe_dma_coalesce);
1850 extern int be_cmd_mccq_create(struct be_adapter *adapter,
1851                         struct be_queue_info *mccq,
1852                         struct be_queue_info *cq);
1853 extern int be_cmd_txq_create(struct be_adapter *adapter,
1854                         struct be_tx_obj *txo);
1855 extern int be_cmd_rxq_create(struct be_adapter *adapter,
1856                         struct be_queue_info *rxq, u16 cq_id,
1857                         u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
1858 extern int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
1859                         int type);
1860 extern int be_cmd_rxq_destroy(struct be_adapter *adapter,
1861                         struct be_queue_info *q);
1862 extern int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
1863                                     u8 *link_status, u32 dom);
1864 extern int be_cmd_reset(struct be_adapter *adapter);
1865 extern int be_cmd_get_stats(struct be_adapter *adapter,
1866                         struct be_dma_mem *nonemb_cmd);
1867 extern int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1868                         struct be_dma_mem *nonemb_cmd);
1869 extern int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
1870                 char *fw_on_flash);
1871
1872 extern int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd);
1873 extern int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id,
1874                         u16 *vtag_array, u32 num, bool untagged,
1875                         bool promiscuous);
1876 extern int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
1877 extern int be_cmd_set_flow_control(struct be_adapter *adapter,
1878                         u32 tx_fc, u32 rx_fc);
1879 extern int be_cmd_get_flow_control(struct be_adapter *adapter,
1880                         u32 *tx_fc, u32 *rx_fc);
1881 extern int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num,
1882                         u32 *function_mode, u32 *function_caps, u16 *asic_rev);
1883 extern int be_cmd_reset_function(struct be_adapter *adapter);
1884 extern int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
1885                              u32 rss_hash_opts, u16 table_size);
1886 extern int be_process_mcc(struct be_adapter *adapter);
1887 extern int be_cmd_set_beacon_state(struct be_adapter *adapter,
1888                         u8 port_num, u8 beacon, u8 status, u8 state);
1889 extern int be_cmd_get_beacon_state(struct be_adapter *adapter,
1890                         u8 port_num, u32 *state);
1891 extern int be_cmd_write_flashrom(struct be_adapter *adapter,
1892                         struct be_dma_mem *cmd, u32 flash_oper,
1893                         u32 flash_opcode, u32 buf_size);
1894 extern int lancer_cmd_write_object(struct be_adapter *adapter,
1895                                    struct be_dma_mem *cmd,
1896                                    u32 data_size, u32 data_offset,
1897                                    const char *obj_name,
1898                                    u32 *data_written, u8 *change_status,
1899                                    u8 *addn_status);
1900 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
1901                 u32 data_size, u32 data_offset, const char *obj_name,
1902                 u32 *data_read, u32 *eof, u8 *addn_status);
1903 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
1904                                 int offset);
1905 extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
1906                                 struct be_dma_mem *nonemb_cmd);
1907 extern int be_cmd_fw_init(struct be_adapter *adapter);
1908 extern int be_cmd_fw_clean(struct be_adapter *adapter);
1909 extern void be_async_mcc_enable(struct be_adapter *adapter);
1910 extern void be_async_mcc_disable(struct be_adapter *adapter);
1911 extern int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
1912                                 u32 loopback_type, u32 pkt_size,
1913                                 u32 num_pkts, u64 pattern);
1914 extern int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
1915                         u32 byte_cnt, struct be_dma_mem *cmd);
1916 extern int be_cmd_get_seeprom_data(struct be_adapter *adapter,
1917                                 struct be_dma_mem *nonemb_cmd);
1918 extern int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
1919                                 u8 loopback_type, u8 enable);
1920 extern int be_cmd_get_phy_info(struct be_adapter *adapter);
1921 extern int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain);
1922 extern void be_detect_error(struct be_adapter *adapter);
1923 extern int be_cmd_get_die_temperature(struct be_adapter *adapter);
1924 extern int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
1925 extern int be_cmd_req_native_mode(struct be_adapter *adapter);
1926 extern int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size);
1927 extern void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf);
1928 extern int be_cmd_get_fn_privileges(struct be_adapter *adapter,
1929                                     u32 *privilege, u32 domain);
1930 extern int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
1931                                     bool *pmac_id_active, u32 *pmac_id,
1932                                     u8 domain);
1933 extern int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
1934                                                 u8 mac_count, u32 domain);
1935 extern int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,
1936                         u32 domain, u16 intf_id);
1937 extern int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,
1938                         u32 domain, u16 intf_id);
1939 extern int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
1940 extern int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
1941                                           struct be_dma_mem *cmd);
1942 extern int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
1943                                           struct be_dma_mem *cmd,
1944                                           struct be_fat_conf_params *cfgs);
1945 extern int lancer_wait_ready(struct be_adapter *adapter);
1946 extern int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask);
1947 extern int lancer_initiate_dump(struct be_adapter *adapter);
1948 extern bool dump_present(struct be_adapter *adapter);
1949 extern int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
1950 extern int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name);
1951 extern int be_cmd_get_func_config(struct be_adapter *adapter);
1952 extern int be_cmd_get_profile_config(struct be_adapter *adapter, u32 *cap_flags,
1953                                      u16 *txq_count, u8 domain);
1954
1955 extern int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps,
1956                                      u8 domain);
1957 extern int be_cmd_get_if_id(struct be_adapter *adapter,
1958                             struct be_vf_cfg *vf_cfg, int vf_num);
1959 extern int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);
1960 extern int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable);