drivers/net/ethernet/brocade/bna/bna_tx_rx.c

   1 /*
   2  * Linux network driver for Brocade Converged Network Adapter.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License (GPL) Version 2 as
   6  * published by the Free Software Foundation
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12   */
  13 /*
  14  * Copyright (c) 2005-2011 Brocade Communications Systems, Inc.
  15  * All rights reserved
  16  * www.brocade.com
  17  */
  18 #include "bna.h"
  19 #include "bfi.h"
  20
  21 /* IB */
  22 static void
  23 bna_ib_coalescing_timeo_set(struct bna_ib *ib, u8 coalescing_timeo)
  24 {
  25         ib->coalescing_timeo = coalescing_timeo;
  26         ib->door_bell.doorbell_ack = BNA_DOORBELL_IB_INT_ACK(
  27                                 (u32)ib->coalescing_timeo, 0);
  28 }
  29
  30 /* RXF */
  31
  32 #define bna_rxf_vlan_cfg_soft_reset(rxf)                                \
  33 do {                                                                    \
  34         (rxf)->vlan_pending_bitmask = (u8)BFI_VLAN_BMASK_ALL;           \
  35         (rxf)->vlan_strip_pending = true;                               \
  36 } while (0)
  37
  38 #define bna_rxf_rss_cfg_soft_reset(rxf)                                 \
  39 do {                                                                    \
  40         if ((rxf)->rss_status == BNA_STATUS_T_ENABLED)                  \
  41                 (rxf)->rss_pending = (BNA_RSS_F_RIT_PENDING |           \
  42                                 BNA_RSS_F_CFG_PENDING |                 \
  43                                 BNA_RSS_F_STATUS_PENDING);              \
  44 } while (0)
  45
  46 static int bna_rxf_cfg_apply(struct bna_rxf *rxf);
  47 static void bna_rxf_cfg_reset(struct bna_rxf *rxf);
  48 static int bna_rxf_fltr_clear(struct bna_rxf *rxf);
  49 static int bna_rxf_ucast_cfg_apply(struct bna_rxf *rxf);
  50 static int bna_rxf_promisc_cfg_apply(struct bna_rxf *rxf);
  51 static int bna_rxf_allmulti_cfg_apply(struct bna_rxf *rxf);
  52 static int bna_rxf_vlan_strip_cfg_apply(struct bna_rxf *rxf);
  53 static int bna_rxf_ucast_cfg_reset(struct bna_rxf *rxf,
  54                                         enum bna_cleanup_type cleanup);
  55 static int bna_rxf_promisc_cfg_reset(struct bna_rxf *rxf,
  56                                         enum bna_cleanup_type cleanup);
  57 static int bna_rxf_allmulti_cfg_reset(struct bna_rxf *rxf,
  58                                         enum bna_cleanup_type cleanup);
  59
  60 bfa_fsm_state_decl(bna_rxf, stopped, struct bna_rxf,
  61                         enum bna_rxf_event);
  62 bfa_fsm_state_decl(bna_rxf, paused, struct bna_rxf,
  63                         enum bna_rxf_event);
  64 bfa_fsm_state_decl(bna_rxf, cfg_wait, struct bna_rxf,
  65                         enum bna_rxf_event);
  66 bfa_fsm_state_decl(bna_rxf, started, struct bna_rxf,
  67                         enum bna_rxf_event);
  68 bfa_fsm_state_decl(bna_rxf, fltr_clr_wait, struct bna_rxf,
  69                         enum bna_rxf_event);
  70 bfa_fsm_state_decl(bna_rxf, last_resp_wait, struct bna_rxf,
  71                         enum bna_rxf_event);
  72
  73 static void
  74 bna_rxf_sm_stopped_entry(struct bna_rxf *rxf)
  75 {
  76         call_rxf_stop_cbfn(rxf);
  77 }
  78
  79 static void
  80 bna_rxf_sm_stopped(struct bna_rxf *rxf, enum bna_rxf_event event)
  81 {
  82         switch (event) {
  83         case RXF_E_START:
  84                 if (rxf->flags & BNA_RXF_F_PAUSED) {
  85                         bfa_fsm_set_state(rxf, bna_rxf_sm_paused);
  86                         call_rxf_start_cbfn(rxf);
  87                 } else
  88                         bfa_fsm_set_state(rxf, bna_rxf_sm_cfg_wait);
  89                 break;
  90
  91         case RXF_E_STOP:
  92                 call_rxf_stop_cbfn(rxf);
  93                 break;
  94
  95         case RXF_E_FAIL:
  96                 /* No-op */
  97                 break;
  98
  99         case RXF_E_CONFIG:
 100                 call_rxf_cam_fltr_cbfn(rxf);
 101                 break;
 102
 103         case RXF_E_PAUSE:
 104                 rxf->flags |= BNA_RXF_F_PAUSED;
 105                 call_rxf_pause_cbfn(rxf);
 106                 break;
 107
 108         case RXF_E_RESUME:
 109                 rxf->flags &= ~BNA_RXF_F_PAUSED;
 110                 call_rxf_resume_cbfn(rxf);
 111                 break;
 112
 113         default:
 114                 bfa_sm_fault(event);
 115         }
 116 }
 117
 118 static void
 119 bna_rxf_sm_paused_entry(struct bna_rxf *rxf)
 120 {
 121         call_rxf_pause_cbfn(rxf);
 122 }
 123
 124 static void
 125 bna_rxf_sm_paused(struct bna_rxf *rxf, enum bna_rxf_event event)
 126 {
 127         switch (event) {
 128         case RXF_E_STOP:
 129         case RXF_E_FAIL:
 130                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 131                 break;
 132
 133         case RXF_E_CONFIG:
 134                 call_rxf_cam_fltr_cbfn(rxf);
 135                 break;
 136
 137         case RXF_E_RESUME:
 138                 rxf->flags &= ~BNA_RXF_F_PAUSED;
 139                 bfa_fsm_set_state(rxf, bna_rxf_sm_cfg_wait);
 140                 break;
 141
 142         default:
 143                 bfa_sm_fault(event);
 144         }
 145 }
 146
 147 static void
 148 bna_rxf_sm_cfg_wait_entry(struct bna_rxf *rxf)
 149 {
 150         if (!bna_rxf_cfg_apply(rxf)) {
 151                 /* No more pending config updates */
 152                 bfa_fsm_set_state(rxf, bna_rxf_sm_started);
 153         }
 154 }
 155
 156 static void
 157 bna_rxf_sm_cfg_wait(struct bna_rxf *rxf, enum bna_rxf_event event)
 158 {
 159         switch (event) {
 160         case RXF_E_STOP:
 161                 bfa_fsm_set_state(rxf, bna_rxf_sm_last_resp_wait);
 162                 break;
 163
 164         case RXF_E_FAIL:
 165                 bna_rxf_cfg_reset(rxf);
 166                 call_rxf_start_cbfn(rxf);
 167                 call_rxf_cam_fltr_cbfn(rxf);
 168                 call_rxf_resume_cbfn(rxf);
 169                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 170                 break;
 171
 172         case RXF_E_CONFIG:
 173                 /* No-op */
 174                 break;
 175
 176         case RXF_E_PAUSE:
 177                 rxf->flags |= BNA_RXF_F_PAUSED;
 178                 call_rxf_start_cbfn(rxf);
 179                 bfa_fsm_set_state(rxf, bna_rxf_sm_fltr_clr_wait);
 180                 break;
 181
 182         case RXF_E_FW_RESP:
 183                 if (!bna_rxf_cfg_apply(rxf)) {
 184                         /* No more pending config updates */
 185                         bfa_fsm_set_state(rxf, bna_rxf_sm_started);
 186                 }
 187                 break;
 188
 189         default:
 190                 bfa_sm_fault(event);
 191         }
 192 }
 193
 194 static void
 195 bna_rxf_sm_started_entry(struct bna_rxf *rxf)
 196 {
 197         call_rxf_start_cbfn(rxf);
 198         call_rxf_cam_fltr_cbfn(rxf);
 199         call_rxf_resume_cbfn(rxf);
 200 }
 201
 202 static void
 203 bna_rxf_sm_started(struct bna_rxf *rxf, enum bna_rxf_event event)
 204 {
 205         switch (event) {
 206         case RXF_E_STOP:
 207         case RXF_E_FAIL:
 208                 bna_rxf_cfg_reset(rxf);
 209                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 210                 break;
 211
 212         case RXF_E_CONFIG:
 213                 bfa_fsm_set_state(rxf, bna_rxf_sm_cfg_wait);
 214                 break;
 215
 216         case RXF_E_PAUSE:
 217                 rxf->flags |= BNA_RXF_F_PAUSED;
 218                 if (!bna_rxf_fltr_clear(rxf))
 219                         bfa_fsm_set_state(rxf, bna_rxf_sm_paused);
 220                 else
 221                         bfa_fsm_set_state(rxf, bna_rxf_sm_fltr_clr_wait);
 222                 break;
 223
 224         default:
 225                 bfa_sm_fault(event);
 226         }
 227 }
 228
 229 static void
 230 bna_rxf_sm_fltr_clr_wait_entry(struct bna_rxf *rxf)
 231 {
 232 }
 233
 234 static void
 235 bna_rxf_sm_fltr_clr_wait(struct bna_rxf *rxf, enum bna_rxf_event event)
 236 {
 237         switch (event) {
 238         case RXF_E_FAIL:
 239                 bna_rxf_cfg_reset(rxf);
 240                 call_rxf_pause_cbfn(rxf);
 241                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 242                 break;
 243
 244         case RXF_E_FW_RESP:
 245                 if (!bna_rxf_fltr_clear(rxf)) {
 246                         /* No more pending CAM entries to clear */
 247                         bfa_fsm_set_state(rxf, bna_rxf_sm_paused);
 248                 }
 249                 break;
 250
 251         default:
 252                 bfa_sm_fault(event);
 253         }
 254 }
 255
 256 static void
 257 bna_rxf_sm_last_resp_wait_entry(struct bna_rxf *rxf)
 258 {
 259 }
 260
 261 static void
 262 bna_rxf_sm_last_resp_wait(struct bna_rxf *rxf, enum bna_rxf_event event)
 263 {
 264         switch (event) {
 265         case RXF_E_FAIL:
 266         case RXF_E_FW_RESP:
 267                 bna_rxf_cfg_reset(rxf);
 268                 bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 269                 break;
 270
 271         default:
 272                 bfa_sm_fault(event);
 273         }
 274 }
 275
 276 static void
 277 bna_bfi_ucast_req(struct bna_rxf *rxf, struct bna_mac *mac,
 278                 enum bfi_enet_h2i_msgs req_type)
 279 {
 280         struct bfi_enet_ucast_req *req = &rxf->bfi_enet_cmd.ucast_req;
 281
 282         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET, req_type, 0, rxf->rx->rid);
 283         req->mh.num_entries = htons(
 284         bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_ucast_req)));
 285         memcpy(&req->mac_addr, &mac->addr, sizeof(mac_t));
 286         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 287                 sizeof(struct bfi_enet_ucast_req), &req->mh);
 288         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 289 }
 290
 291 static void
 292 bna_bfi_mcast_add_req(struct bna_rxf *rxf, struct bna_mac *mac)
 293 {
 294         struct bfi_enet_mcast_add_req *req =
 295                 &rxf->bfi_enet_cmd.mcast_add_req;
 296
 297         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET, BFI_ENET_H2I_MAC_MCAST_ADD_REQ,
 298                 0, rxf->rx->rid);
 299         req->mh.num_entries = htons(
 300         bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_mcast_add_req)));
 301         memcpy(&req->mac_addr, &mac->addr, sizeof(mac_t));
 302         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 303                 sizeof(struct bfi_enet_mcast_add_req), &req->mh);
 304         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 305 }
 306
 307 static void
 308 bna_bfi_mcast_del_req(struct bna_rxf *rxf, u16 handle)
 309 {
 310         struct bfi_enet_mcast_del_req *req =
 311                 &rxf->bfi_enet_cmd.mcast_del_req;
 312
 313         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET, BFI_ENET_H2I_MAC_MCAST_DEL_REQ,
 314                 0, rxf->rx->rid);
 315         req->mh.num_entries = htons(
 316         bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_mcast_del_req)));
 317         req->handle = htons(handle);
 318         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 319                 sizeof(struct bfi_enet_mcast_del_req), &req->mh);
 320         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 321 }
 322
 323 static void
 324 bna_bfi_mcast_filter_req(struct bna_rxf *rxf, enum bna_status status)
 325 {
 326         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 327
 328         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 329                 BFI_ENET_H2I_MAC_MCAST_FILTER_REQ, 0, rxf->rx->rid);
 330         req->mh.num_entries = htons(
 331                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 332         req->enable = status;
 333         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 334                 sizeof(struct bfi_enet_enable_req), &req->mh);
 335         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 336 }
 337
 338 static void
 339 bna_bfi_rx_promisc_req(struct bna_rxf *rxf, enum bna_status status)
 340 {
 341         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 342
 343         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 344                 BFI_ENET_H2I_RX_PROMISCUOUS_REQ, 0, rxf->rx->rid);
 345         req->mh.num_entries = htons(
 346                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 347         req->enable = status;
 348         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 349                 sizeof(struct bfi_enet_enable_req), &req->mh);
 350         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 351 }
 352
 353 static void
 354 bna_bfi_rx_vlan_filter_set(struct bna_rxf *rxf, u8 block_idx)
 355 {
 356         struct bfi_enet_rx_vlan_req *req = &rxf->bfi_enet_cmd.vlan_req;
 357         int i;
 358         int j;
 359
 360         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 361                 BFI_ENET_H2I_RX_VLAN_SET_REQ, 0, rxf->rx->rid);
 362         req->mh.num_entries = htons(
 363                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rx_vlan_req)));
 364         req->block_idx = block_idx;
 365         for (i = 0; i < (BFI_ENET_VLAN_BLOCK_SIZE / 32); i++) {
 366                 j = (block_idx * (BFI_ENET_VLAN_BLOCK_SIZE / 32)) + i;
 367                 if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED)
 368                         req->bit_mask[i] =
 369                                 htonl(rxf->vlan_filter_table[j]);
 370                 else
 371                         req->bit_mask[i] = 0xFFFFFFFF;
 372         }
 373         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 374                 sizeof(struct bfi_enet_rx_vlan_req), &req->mh);
 375         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 376 }
 377
 378 static void
 379 bna_bfi_vlan_strip_enable(struct bna_rxf *rxf)
 380 {
 381         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 382
 383         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 384                 BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ, 0, rxf->rx->rid);
 385         req->mh.num_entries = htons(
 386                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 387         req->enable = rxf->vlan_strip_status;
 388         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 389                 sizeof(struct bfi_enet_enable_req), &req->mh);
 390         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 391 }
 392
 393 static void
 394 bna_bfi_rit_cfg(struct bna_rxf *rxf)
 395 {
 396         struct bfi_enet_rit_req *req = &rxf->bfi_enet_cmd.rit_req;
 397
 398         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 399                 BFI_ENET_H2I_RIT_CFG_REQ, 0, rxf->rx->rid);
 400         req->mh.num_entries = htons(
 401                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rit_req)));
 402         req->size = htons(rxf->rit_size);
 403         memcpy(&req->table[0], rxf->rit, rxf->rit_size);
 404         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 405                 sizeof(struct bfi_enet_rit_req), &req->mh);
 406         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 407 }
 408
 409 static void
 410 bna_bfi_rss_cfg(struct bna_rxf *rxf)
 411 {
 412         struct bfi_enet_rss_cfg_req *req = &rxf->bfi_enet_cmd.rss_req;
 413         int i;
 414
 415         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 416                 BFI_ENET_H2I_RSS_CFG_REQ, 0, rxf->rx->rid);
 417         req->mh.num_entries = htons(
 418                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rss_cfg_req)));
 419         req->cfg.type = rxf->rss_cfg.hash_type;
 420         req->cfg.mask = rxf->rss_cfg.hash_mask;
 421         for (i = 0; i < BFI_ENET_RSS_KEY_LEN; i++)
 422                 req->cfg.key[i] =
 423                         htonl(rxf->rss_cfg.toeplitz_hash_key[i]);
 424         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 425                 sizeof(struct bfi_enet_rss_cfg_req), &req->mh);
 426         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 427 }
 428
 429 static void
 430 bna_bfi_rss_enable(struct bna_rxf *rxf)
 431 {
 432         struct bfi_enet_enable_req *req = &rxf->bfi_enet_cmd.req;
 433
 434         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
 435                 BFI_ENET_H2I_RSS_ENABLE_REQ, 0, rxf->rx->rid);
 436         req->mh.num_entries = htons(
 437                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_enable_req)));
 438         req->enable = rxf->rss_status;
 439         bfa_msgq_cmd_set(&rxf->msgq_cmd, NULL, NULL,
 440                 sizeof(struct bfi_enet_enable_req), &req->mh);
 441         bfa_msgq_cmd_post(&rxf->rx->bna->msgq, &rxf->msgq_cmd);
 442 }
 443
 444 /* This function gets the multicast MAC that has already been added to CAM */
 445 static struct bna_mac *
 446 bna_rxf_mcmac_get(struct bna_rxf *rxf, u8 *mac_addr)
 447 {
 448         struct bna_mac *mac;
 449         struct list_head *qe;
 450
 451         list_for_each(qe, &rxf->mcast_active_q) {
 452                 mac = (struct bna_mac *)qe;
 453                 if (BNA_MAC_IS_EQUAL(&mac->addr, mac_addr))
 454                         return mac;
 455         }
 456
 457         list_for_each(qe, &rxf->mcast_pending_del_q) {
 458                 mac = (struct bna_mac *)qe;
 459                 if (BNA_MAC_IS_EQUAL(&mac->addr, mac_addr))
 460                         return mac;
 461         }
 462
 463         return NULL;
 464 }
 465
 466 static struct bna_mcam_handle *
 467 bna_rxf_mchandle_get(struct bna_rxf *rxf, int handle)
 468 {
 469         struct bna_mcam_handle *mchandle;
 470         struct list_head *qe;
 471
 472         list_for_each(qe, &rxf->mcast_handle_q) {
 473                 mchandle = (struct bna_mcam_handle *)qe;
 474                 if (mchandle->handle == handle)
 475                         return mchandle;
 476         }
 477
 478         return NULL;
 479 }
 480
 481 static void
 482 bna_rxf_mchandle_attach(struct bna_rxf *rxf, u8 *mac_addr, int handle)
 483 {
 484         struct bna_mac *mcmac;
 485         struct bna_mcam_handle *mchandle;
 486
 487         mcmac = bna_rxf_mcmac_get(rxf, mac_addr);
 488         mchandle = bna_rxf_mchandle_get(rxf, handle);
 489         if (mchandle == NULL) {
 490                 mchandle = bna_mcam_mod_handle_get(&rxf->rx->bna->mcam_mod);
 491                 mchandle->handle = handle;
 492                 mchandle->refcnt = 0;
 493                 list_add_tail(&mchandle->qe, &rxf->mcast_handle_q);
 494         }
 495         mchandle->refcnt++;
 496         mcmac->handle = mchandle;
 497 }
 498
 499 static int
 500 bna_rxf_mcast_del(struct bna_rxf *rxf, struct bna_mac *mac,
 501                 enum bna_cleanup_type cleanup)
 502 {
 503         struct bna_mcam_handle *mchandle;
 504         int ret = 0;
 505
 506         mchandle = mac->handle;
 507         if (mchandle == NULL)
 508                 return ret;
 509
 510         mchandle->refcnt--;
 511         if (mchandle->refcnt == 0) {
 512                 if (cleanup == BNA_HARD_CLEANUP) {
 513                         bna_bfi_mcast_del_req(rxf, mchandle->handle);
 514                         ret = 1;
 515                 }
 516                 list_del(&mchandle->qe);
 517                 bfa_q_qe_init(&mchandle->qe);
 518                 bna_mcam_mod_handle_put(&rxf->rx->bna->mcam_mod, mchandle);
 519         }
 520         mac->handle = NULL;
 521
 522         return ret;
 523 }
 524
 525 static int
 526 bna_rxf_mcast_cfg_apply(struct bna_rxf *rxf)
 527 {
 528         struct bna_mac *mac = NULL;
 529         struct list_head *qe;
 530         int ret;
 531
 532         /* First delete multicast entries to maintain the count */
 533         while (!list_empty(&rxf->mcast_pending_del_q)) {
 534                 bfa_q_deq(&rxf->mcast_pending_del_q, &qe);
 535                 bfa_q_qe_init(qe);
 536                 mac = (struct bna_mac *)qe;
 537                 ret = bna_rxf_mcast_del(rxf, mac, BNA_HARD_CLEANUP);
 538                 bna_cam_mod_mac_put(bna_mcam_mod_del_q(rxf->rx->bna), mac);
 539                 if (ret)
 540                         return ret;
 541         }
 542
 543         /* Add multicast entries */
 544         if (!list_empty(&rxf->mcast_pending_add_q)) {
 545                 bfa_q_deq(&rxf->mcast_pending_add_q, &qe);
 546                 bfa_q_qe_init(qe);
 547                 mac = (struct bna_mac *)qe;
 548                 list_add_tail(&mac->qe, &rxf->mcast_active_q);
 549                 bna_bfi_mcast_add_req(rxf, mac);
 550                 return 1;
 551         }
 552
 553         return 0;
 554 }
 555
 556 static int
 557 bna_rxf_vlan_cfg_apply(struct bna_rxf *rxf)
 558 {
 559         u8 vlan_pending_bitmask;
 560         int block_idx = 0;
 561
 562         if (rxf->vlan_pending_bitmask) {
 563                 vlan_pending_bitmask = rxf->vlan_pending_bitmask;
 564                 while (!(vlan_pending_bitmask & 0x1)) {
 565                         block_idx++;
 566                         vlan_pending_bitmask >>= 1;
 567                 }
 568                 rxf->vlan_pending_bitmask &= ~(1 << block_idx);
 569                 bna_bfi_rx_vlan_filter_set(rxf, block_idx);
 570                 return 1;
 571         }
 572
 573         return 0;
 574 }
 575
 576 static int
 577 bna_rxf_mcast_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
 578 {
 579         struct list_head *qe;
 580         struct bna_mac *mac;
 581         int ret;
 582
 583         /* Throw away delete pending mcast entries */
 584         while (!list_empty(&rxf->mcast_pending_del_q)) {
 585                 bfa_q_deq(&rxf->mcast_pending_del_q, &qe);
 586                 bfa_q_qe_init(qe);
 587                 mac = (struct bna_mac *)qe;
 588                 ret = bna_rxf_mcast_del(rxf, mac, cleanup);
 589                 bna_cam_mod_mac_put(bna_mcam_mod_del_q(rxf->rx->bna), mac);
 590                 if (ret)
 591                         return ret;
 592         }
 593
 594         /* Move active mcast entries to pending_add_q */
 595         while (!list_empty(&rxf->mcast_active_q)) {
 596                 bfa_q_deq(&rxf->mcast_active_q, &qe);
 597                 bfa_q_qe_init(qe);
 598                 list_add_tail(qe, &rxf->mcast_pending_add_q);
 599                 mac = (struct bna_mac *)qe;
 600                 if (bna_rxf_mcast_del(rxf, mac, cleanup))
 601                         return 1;
 602         }
 603
 604         return 0;
 605 }
 606
 607 static int
 608 bna_rxf_rss_cfg_apply(struct bna_rxf *rxf)
 609 {
 610         if (rxf->rss_pending) {
 611                 if (rxf->rss_pending & BNA_RSS_F_RIT_PENDING) {
 612                         rxf->rss_pending &= ~BNA_RSS_F_RIT_PENDING;
 613                         bna_bfi_rit_cfg(rxf);
 614                         return 1;
 615                 }
 616
 617                 if (rxf->rss_pending & BNA_RSS_F_CFG_PENDING) {
 618                         rxf->rss_pending &= ~BNA_RSS_F_CFG_PENDING;
 619                         bna_bfi_rss_cfg(rxf);
 620                         return 1;
 621                 }
 622
 623                 if (rxf->rss_pending & BNA_RSS_F_STATUS_PENDING) {
 624                         rxf->rss_pending &= ~BNA_RSS_F_STATUS_PENDING;
 625                         bna_bfi_rss_enable(rxf);
 626                         return 1;
 627                 }
 628         }
 629
 630         return 0;
 631 }
 632
 633 static int
 634 bna_rxf_cfg_apply(struct bna_rxf *rxf)
 635 {
 636         if (bna_rxf_ucast_cfg_apply(rxf))
 637                 return 1;
 638
 639         if (bna_rxf_mcast_cfg_apply(rxf))
 640                 return 1;
 641
 642         if (bna_rxf_promisc_cfg_apply(rxf))
 643                 return 1;
 644
 645         if (bna_rxf_allmulti_cfg_apply(rxf))
 646                 return 1;
 647
 648         if (bna_rxf_vlan_cfg_apply(rxf))
 649                 return 1;
 650
 651         if (bna_rxf_vlan_strip_cfg_apply(rxf))
 652                 return 1;
 653
 654         if (bna_rxf_rss_cfg_apply(rxf))
 655                 return 1;
 656
 657         return 0;
 658 }
 659
 660 /* Only software reset */
 661 static int
 662 bna_rxf_fltr_clear(struct bna_rxf *rxf)
 663 {
 664         if (bna_rxf_ucast_cfg_reset(rxf, BNA_HARD_CLEANUP))
 665                 return 1;
 666
 667         if (bna_rxf_mcast_cfg_reset(rxf, BNA_HARD_CLEANUP))
 668                 return 1;
 669
 670         if (bna_rxf_promisc_cfg_reset(rxf, BNA_HARD_CLEANUP))
 671                 return 1;
 672
 673         if (bna_rxf_allmulti_cfg_reset(rxf, BNA_HARD_CLEANUP))
 674                 return 1;
 675
 676         return 0;
 677 }
 678
 679 static void
 680 bna_rxf_cfg_reset(struct bna_rxf *rxf)
 681 {
 682         bna_rxf_ucast_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 683         bna_rxf_mcast_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 684         bna_rxf_promisc_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 685         bna_rxf_allmulti_cfg_reset(rxf, BNA_SOFT_CLEANUP);
 686         bna_rxf_vlan_cfg_soft_reset(rxf);
 687         bna_rxf_rss_cfg_soft_reset(rxf);
 688 }
 689
 690 static void
 691 bna_rit_init(struct bna_rxf *rxf, int rit_size)
 692 {
 693         struct bna_rx *rx = rxf->rx;
 694         struct bna_rxp *rxp;
 695         struct list_head *qe;
 696         int offset = 0;
 697
 698         rxf->rit_size = rit_size;
 699         list_for_each(qe, &rx->rxp_q) {
 700                 rxp = (struct bna_rxp *)qe;
 701                 rxf->rit[offset] = rxp->cq.ccb->id;
 702                 offset++;
 703         }
 704
 705 }
 706
 707 void
 708 bna_bfi_rxf_cfg_rsp(struct bna_rxf *rxf, struct bfi_msgq_mhdr *msghdr)
 709 {
 710         bfa_fsm_send_event(rxf, RXF_E_FW_RESP);
 711 }
 712
 713 void
 714 bna_bfi_rxf_ucast_set_rsp(struct bna_rxf *rxf,
 715                         struct bfi_msgq_mhdr *msghdr)
 716 {
 717         struct bfi_enet_rsp *rsp =
 718                 (struct bfi_enet_rsp *)msghdr;
 719
 720         if (rsp->error) {
 721                 /* Clear ucast from cache */
 722                 rxf->ucast_active_set = 0;
 723         }
 724
 725         bfa_fsm_send_event(rxf, RXF_E_FW_RESP);
 726 }
 727
 728 void
 729 bna_bfi_rxf_mcast_add_rsp(struct bna_rxf *rxf,
 730                         struct bfi_msgq_mhdr *msghdr)
 731 {
 732         struct bfi_enet_mcast_add_req *req =
 733                 &rxf->bfi_enet_cmd.mcast_add_req;
 734         struct bfi_enet_mcast_add_rsp *rsp =
 735                 (struct bfi_enet_mcast_add_rsp *)msghdr;
 736
 737         bna_rxf_mchandle_attach(rxf, (u8 *)&req->mac_addr,
 738                 ntohs(rsp->handle));
 739         bfa_fsm_send_event(rxf, RXF_E_FW_RESP);
 740 }
 741
 742 static void
 743 bna_rxf_init(struct bna_rxf *rxf,
 744                 struct bna_rx *rx,
 745                 struct bna_rx_config *q_config,
 746                 struct bna_res_info *res_info)
 747 {
 748         rxf->rx = rx;
 749
 750         INIT_LIST_HEAD(&rxf->ucast_pending_add_q);
 751         INIT_LIST_HEAD(&rxf->ucast_pending_del_q);
 752         rxf->ucast_pending_set = 0;
 753         rxf->ucast_active_set = 0;
 754         INIT_LIST_HEAD(&rxf->ucast_active_q);
 755         rxf->ucast_pending_mac = NULL;
 756
 757         INIT_LIST_HEAD(&rxf->mcast_pending_add_q);
 758         INIT_LIST_HEAD(&rxf->mcast_pending_del_q);
 759         INIT_LIST_HEAD(&rxf->mcast_active_q);
 760         INIT_LIST_HEAD(&rxf->mcast_handle_q);
 761
 762         if (q_config->paused)
 763                 rxf->flags |= BNA_RXF_F_PAUSED;
 764
 765         rxf->rit = (u8 *)
 766                 res_info[BNA_RX_RES_MEM_T_RIT].res_u.mem_info.mdl[0].kva;
 767         bna_rit_init(rxf, q_config->num_paths);
 768
 769         rxf->rss_status = q_config->rss_status;
 770         if (rxf->rss_status == BNA_STATUS_T_ENABLED) {
 771                 rxf->rss_cfg = q_config->rss_config;
 772                 rxf->rss_pending |= BNA_RSS_F_CFG_PENDING;
 773                 rxf->rss_pending |= BNA_RSS_F_RIT_PENDING;
 774                 rxf->rss_pending |= BNA_RSS_F_STATUS_PENDING;
 775         }
 776
 777         rxf->vlan_filter_status = BNA_STATUS_T_DISABLED;
 778         memset(rxf->vlan_filter_table, 0,
 779                         (sizeof(u32) * (BFI_ENET_VLAN_ID_MAX / 32)));
 780         rxf->vlan_filter_table[0] |= 1; /* for pure priority tagged frames */
 781         rxf->vlan_pending_bitmask = (u8)BFI_VLAN_BMASK_ALL;
 782
 783         rxf->vlan_strip_status = q_config->vlan_strip_status;
 784
 785         bfa_fsm_set_state(rxf, bna_rxf_sm_stopped);
 786 }
 787
 788 static void
 789 bna_rxf_uninit(struct bna_rxf *rxf)
 790 {
 791         struct bna_mac *mac;
 792
 793         rxf->ucast_pending_set = 0;
 794         rxf->ucast_active_set = 0;
 795
 796         while (!list_empty(&rxf->ucast_pending_add_q)) {
 797                 bfa_q_deq(&rxf->ucast_pending_add_q, &mac);
 798                 bfa_q_qe_init(&mac->qe);
 799                 bna_cam_mod_mac_put(bna_ucam_mod_free_q(rxf->rx->bna), mac);
 800         }
 801
 802         if (rxf->ucast_pending_mac) {
 803                 bfa_q_qe_init(&rxf->ucast_pending_mac->qe);
 804                 bna_cam_mod_mac_put(bna_ucam_mod_free_q(rxf->rx->bna),
 805                                     rxf->ucast_pending_mac);
 806                 rxf->ucast_pending_mac = NULL;
 807         }
 808
 809         while (!list_empty(&rxf->mcast_pending_add_q)) {
 810                 bfa_q_deq(&rxf->mcast_pending_add_q, &mac);
 811                 bfa_q_qe_init(&mac->qe);
 812                 bna_cam_mod_mac_put(bna_mcam_mod_free_q(rxf->rx->bna), mac);
 813         }
 814
 815         rxf->rxmode_pending = 0;
 816         rxf->rxmode_pending_bitmask = 0;
 817         if (rxf->rx->bna->promisc_rid == rxf->rx->rid)
 818                 rxf->rx->bna->promisc_rid = BFI_INVALID_RID;
 819         if (rxf->rx->bna->default_mode_rid == rxf->rx->rid)
 820                 rxf->rx->bna->default_mode_rid = BFI_INVALID_RID;
 821
 822         rxf->rss_pending = 0;
 823         rxf->vlan_strip_pending = false;
 824
 825         rxf->flags = 0;
 826
 827         rxf->rx = NULL;
 828 }
 829
 830 static void
 831 bna_rx_cb_rxf_started(struct bna_rx *rx)
 832 {
 833         bfa_fsm_send_event(rx, RX_E_RXF_STARTED);
 834 }
 835
 836 static void
 837 bna_rxf_start(struct bna_rxf *rxf)
 838 {
 839         rxf->start_cbfn = bna_rx_cb_rxf_started;
 840         rxf->start_cbarg = rxf->rx;
 841         bfa_fsm_send_event(rxf, RXF_E_START);
 842 }
 843
 844 static void
 845 bna_rx_cb_rxf_stopped(struct bna_rx *rx)
 846 {
 847         bfa_fsm_send_event(rx, RX_E_RXF_STOPPED);
 848 }
 849
 850 static void
 851 bna_rxf_stop(struct bna_rxf *rxf)
 852 {
 853         rxf->stop_cbfn = bna_rx_cb_rxf_stopped;
 854         rxf->stop_cbarg = rxf->rx;
 855         bfa_fsm_send_event(rxf, RXF_E_STOP);
 856 }
 857
 858 static void
 859 bna_rxf_fail(struct bna_rxf *rxf)
 860 {
 861         bfa_fsm_send_event(rxf, RXF_E_FAIL);
 862 }
 863
 864 enum bna_cb_status
 865 bna_rx_ucast_set(struct bna_rx *rx, u8 *ucmac,
 866                  void (*cbfn)(struct bnad *, struct bna_rx *))
 867 {
 868         struct bna_rxf *rxf = &rx->rxf;
 869
 870         if (rxf->ucast_pending_mac == NULL) {
 871                 rxf->ucast_pending_mac =
 872                         bna_cam_mod_mac_get(bna_ucam_mod_free_q(rxf->rx->bna));
 873                 if (rxf->ucast_pending_mac == NULL)
 874                         return BNA_CB_UCAST_CAM_FULL;
 875                 bfa_q_qe_init(&rxf->ucast_pending_mac->qe);
 876         }
 877
 878         memcpy(rxf->ucast_pending_mac->addr, ucmac, ETH_ALEN);
 879         rxf->ucast_pending_set = 1;
 880         rxf->cam_fltr_cbfn = cbfn;
 881         rxf->cam_fltr_cbarg = rx->bna->bnad;
 882
 883         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 884
 885         return BNA_CB_SUCCESS;
 886 }
 887
 888 enum bna_cb_status
 889 bna_rx_mcast_add(struct bna_rx *rx, u8 *addr,
 890                  void (*cbfn)(struct bnad *, struct bna_rx *))
 891 {
 892         struct bna_rxf *rxf = &rx->rxf;
 893         struct bna_mac *mac;
 894
 895         /* Check if already added or pending addition */
 896         if (bna_mac_find(&rxf->mcast_active_q, addr) ||
 897                 bna_mac_find(&rxf->mcast_pending_add_q, addr)) {
 898                 if (cbfn)
 899                         cbfn(rx->bna->bnad, rx);
 900                 return BNA_CB_SUCCESS;
 901         }
 902
 903         mac = bna_cam_mod_mac_get(bna_mcam_mod_free_q(rxf->rx->bna));
 904         if (mac == NULL)
 905                 return BNA_CB_MCAST_LIST_FULL;
 906         bfa_q_qe_init(&mac->qe);
 907         memcpy(mac->addr, addr, ETH_ALEN);
 908         list_add_tail(&mac->qe, &rxf->mcast_pending_add_q);
 909
 910         rxf->cam_fltr_cbfn = cbfn;
 911         rxf->cam_fltr_cbarg = rx->bna->bnad;
 912
 913         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 914
 915         return BNA_CB_SUCCESS;
 916 }
 917
 918 enum bna_cb_status
 919 bna_rx_ucast_listset(struct bna_rx *rx, int count, u8 *uclist,
 920                      void (*cbfn)(struct bnad *, struct bna_rx *))
 921 {
 922         struct bna_ucam_mod *ucam_mod = &rx->bna->ucam_mod;
 923         struct bna_rxf *rxf = &rx->rxf;
 924         struct list_head list_head;
 925         struct list_head *qe;
 926         u8 *mcaddr;
 927         struct bna_mac *mac, *del_mac;
 928         int i;
 929
 930         /* Purge the pending_add_q */
 931         while (!list_empty(&rxf->ucast_pending_add_q)) {
 932                 bfa_q_deq(&rxf->ucast_pending_add_q, &qe);
 933                 bfa_q_qe_init(qe);
 934                 mac = (struct bna_mac *)qe;
 935                 bna_cam_mod_mac_put(&ucam_mod->free_q, mac);
 936         }
 937
 938         /* Schedule active_q entries for deletion */
 939         while (!list_empty(&rxf->ucast_active_q)) {
 940                 bfa_q_deq(&rxf->ucast_active_q, &qe);
 941                 mac = (struct bna_mac *)qe;
 942                 bfa_q_qe_init(&mac->qe);
 943
 944                 del_mac = bna_cam_mod_mac_get(&ucam_mod->del_q);
 945                 memcpy(del_mac, mac, sizeof(*del_mac));
 946                 list_add_tail(&del_mac->qe, &rxf->ucast_pending_del_q);
 947                 bna_cam_mod_mac_put(&ucam_mod->free_q, mac);
 948         }
 949
 950         /* Allocate nodes */
 951         INIT_LIST_HEAD(&list_head);
 952         for (i = 0, mcaddr = uclist; i < count; i++) {
 953                 mac = bna_cam_mod_mac_get(&ucam_mod->free_q);
 954                 if (mac == NULL)
 955                         goto err_return;
 956                 bfa_q_qe_init(&mac->qe);
 957                 memcpy(mac->addr, mcaddr, ETH_ALEN);
 958                 list_add_tail(&mac->qe, &list_head);
 959                 mcaddr += ETH_ALEN;
 960         }
 961
 962         /* Add the new entries */
 963         while (!list_empty(&list_head)) {
 964                 bfa_q_deq(&list_head, &qe);
 965                 mac = (struct bna_mac *)qe;
 966                 bfa_q_qe_init(&mac->qe);
 967                 list_add_tail(&mac->qe, &rxf->ucast_pending_add_q);
 968         }
 969
 970         rxf->cam_fltr_cbfn = cbfn;
 971         rxf->cam_fltr_cbarg = rx->bna->bnad;
 972         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
 973
 974         return BNA_CB_SUCCESS;
 975
 976 err_return:
 977         while (!list_empty(&list_head)) {
 978                 bfa_q_deq(&list_head, &qe);
 979                 mac = (struct bna_mac *)qe;
 980                 bfa_q_qe_init(&mac->qe);
 981                 bna_cam_mod_mac_put(&ucam_mod->free_q, mac);
 982         }
 983
 984         return BNA_CB_UCAST_CAM_FULL;
 985 }
 986
 987 enum bna_cb_status
 988 bna_rx_mcast_listset(struct bna_rx *rx, int count, u8 *mclist,
 989                      void (*cbfn)(struct bnad *, struct bna_rx *))
 990 {
 991         struct bna_mcam_mod *mcam_mod = &rx->bna->mcam_mod;
 992         struct bna_rxf *rxf = &rx->rxf;
 993         struct list_head list_head;
 994         struct list_head *qe;
 995         u8 *mcaddr;
 996         struct bna_mac *mac, *del_mac;
 997         int i;
 998
 999         /* Purge the pending_add_q */
1000         while (!list_empty(&rxf->mcast_pending_add_q)) {
1001                 bfa_q_deq(&rxf->mcast_pending_add_q, &qe);
1002                 bfa_q_qe_init(qe);
1003                 mac = (struct bna_mac *)qe;
1004                 bna_cam_mod_mac_put(&mcam_mod->free_q, mac);
1005         }
1006
1007         /* Schedule active_q entries for deletion */
1008         while (!list_empty(&rxf->mcast_active_q)) {
1009                 bfa_q_deq(&rxf->mcast_active_q, &qe);
1010                 mac = (struct bna_mac *)qe;
1011                 bfa_q_qe_init(&mac->qe);
1012
1013                 del_mac = bna_cam_mod_mac_get(&mcam_mod->del_q);
1014
1015                 memcpy(del_mac, mac, sizeof(*del_mac));
1016                 list_add_tail(&del_mac->qe, &rxf->mcast_pending_del_q);
1017                 mac->handle = NULL;
1018                 bna_cam_mod_mac_put(&mcam_mod->free_q, mac);
1019         }
1020
1021         /* Allocate nodes */
1022         INIT_LIST_HEAD(&list_head);
1023         for (i = 0, mcaddr = mclist; i < count; i++) {
1024                 mac = bna_cam_mod_mac_get(&mcam_mod->free_q);
1025                 if (mac == NULL)
1026                         goto err_return;
1027                 bfa_q_qe_init(&mac->qe);
1028                 memcpy(mac->addr, mcaddr, ETH_ALEN);
1029                 list_add_tail(&mac->qe, &list_head);
1030
1031                 mcaddr += ETH_ALEN;
1032         }
1033
1034         /* Add the new entries */
1035         while (!list_empty(&list_head)) {
1036                 bfa_q_deq(&list_head, &qe);
1037                 mac = (struct bna_mac *)qe;
1038                 bfa_q_qe_init(&mac->qe);
1039                 list_add_tail(&mac->qe, &rxf->mcast_pending_add_q);
1040         }
1041
1042         rxf->cam_fltr_cbfn = cbfn;
1043         rxf->cam_fltr_cbarg = rx->bna->bnad;
1044         bfa_fsm_send_event(rxf, RXF_E_CONFIG);
1045
1046         return BNA_CB_SUCCESS;
1047
1048 err_return:
1049         while (!list_empty(&list_head)) {
1050                 bfa_q_deq(&list_head, &qe);
1051                 mac = (struct bna_mac *)qe;
1052                 bfa_q_qe_init(&mac->qe);
1053                 bna_cam_mod_mac_put(&mcam_mod->free_q, mac);
1054         }
1055
1056         return BNA_CB_MCAST_LIST_FULL;
1057 }
1058
1059 void
1060 bna_rx_mcast_delall(struct bna_rx *rx,
1061                     void (*cbfn)(struct bnad *, struct bna_rx *))
1062 {
1063         struct bna_rxf *rxf = &rx->rxf;
1064         struct list_head *qe;
1065         struct bna_mac *mac, *del_mac;
1066         int need_hw_config = 0;
1067
1068         /* Purge all entries from pending_add_q */
1069         while (!list_empty(&rxf->mcast_pending_add_q)) {
1070                 bfa_q_deq(&rxf->mcast_pending_add_q, &qe);
1071                 mac = (struct bna_mac *)qe;
1072                 bfa_q_qe_init(&mac->qe);
1073                 bna_cam_mod_mac_put(bna_mcam_mod_free_q(rxf->rx->bna), mac);
1074         }
1075
1076         /* Schedule all entries in active_q for deletion */
1077         while (!list_empty(&rxf->mcast_active_q)) {
1078                 bfa_q_deq(&rxf->mcast_active_q, &qe);
1079                 mac = (struct bna_mac *)qe;
1080                 bfa_q_qe_init(&mac->qe);
1081
1082                 del_mac = bna_cam_mod_mac_get(bna_mcam_mod_del_q(rxf->rx->bna));
1083
1084                 memcpy(del_mac, mac, sizeof(*del_mac));
1085                 list_add_tail(&del_mac->qe, &rxf->mcast_pending_del_q);
1086                 mac->handle = NULL;
1087                 bna_cam_mod_mac_put(bna_mcam_mod_free_q(rxf->rx->bna), mac);
1088                 need_hw_config = 1;
1089         }
1090
1091         if (need_hw_config) {
1092                 rxf->cam_fltr_cbfn = cbfn;
1093                 rxf->cam_fltr_cbarg = rx->bna->bnad;
1094                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
1095                 return;
1096         }
1097
1098         if (cbfn)
1099                 (*cbfn)(rx->bna->bnad, rx);
1100 }
1101
1102 void
1103 bna_rx_vlan_add(struct bna_rx *rx, int vlan_id)
1104 {
1105         struct bna_rxf *rxf = &rx->rxf;
1106         int index = (vlan_id >> BFI_VLAN_WORD_SHIFT);
1107         int bit = (1 << (vlan_id & BFI_VLAN_WORD_MASK));
1108         int group_id = (vlan_id >> BFI_VLAN_BLOCK_SHIFT);
1109
1110         rxf->vlan_filter_table[index] |= bit;
1111         if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED) {
1112                 rxf->vlan_pending_bitmask |= (1 << group_id);
1113                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
1114         }
1115 }
1116
1117 void
1118 bna_rx_vlan_del(struct bna_rx *rx, int vlan_id)
1119 {
1120         struct bna_rxf *rxf = &rx->rxf;
1121         int index = (vlan_id >> BFI_VLAN_WORD_SHIFT);
1122         int bit = (1 << (vlan_id & BFI_VLAN_WORD_MASK));
1123         int group_id = (vlan_id >> BFI_VLAN_BLOCK_SHIFT);
1124
1125         rxf->vlan_filter_table[index] &= ~bit;
1126         if (rxf->vlan_filter_status == BNA_STATUS_T_ENABLED) {
1127                 rxf->vlan_pending_bitmask |= (1 << group_id);
1128                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
1129         }
1130 }
1131
1132 static int
1133 bna_rxf_ucast_cfg_apply(struct bna_rxf *rxf)
1134 {
1135         struct bna_mac *mac = NULL;
1136         struct list_head *qe;
1137
1138         /* Delete MAC addresses previousely added */
1139         if (!list_empty(&rxf->ucast_pending_del_q)) {
1140                 bfa_q_deq(&rxf->ucast_pending_del_q, &qe);
1141                 bfa_q_qe_init(qe);
1142                 mac = (struct bna_mac *)qe;
1143                 bna_bfi_ucast_req(rxf, mac, BFI_ENET_H2I_MAC_UCAST_DEL_REQ);
1144                 bna_cam_mod_mac_put(bna_ucam_mod_del_q(rxf->rx->bna), mac);
1145                 return 1;
1146         }
1147
1148         /* Set default unicast MAC */
1149         if (rxf->ucast_pending_set) {
1150                 rxf->ucast_pending_set = 0;
1151                 memcpy(rxf->ucast_active_mac.addr,
1152                         rxf->ucast_pending_mac->addr, ETH_ALEN);
1153                 rxf->ucast_active_set = 1;
1154                 bna_bfi_ucast_req(rxf, &rxf->ucast_active_mac,
1155                         BFI_ENET_H2I_MAC_UCAST_SET_REQ);
1156                 return 1;
1157         }
1158
1159         /* Add additional MAC entries */
1160         if (!list_empty(&rxf->ucast_pending_add_q)) {
1161                 bfa_q_deq(&rxf->ucast_pending_add_q, &qe);
1162                 bfa_q_qe_init(qe);
1163                 mac = (struct bna_mac *)qe;
1164                 list_add_tail(&mac->qe, &rxf->ucast_active_q);
1165                 bna_bfi_ucast_req(rxf, mac, BFI_ENET_H2I_MAC_UCAST_ADD_REQ);
1166                 return 1;
1167         }
1168
1169         return 0;
1170 }
1171
1172 static int
1173 bna_rxf_ucast_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
1174 {
1175         struct list_head *qe;
1176         struct bna_mac *mac;
1177
1178         /* Throw away delete pending ucast entries */
1179         while (!list_empty(&rxf->ucast_pending_del_q)) {
1180                 bfa_q_deq(&rxf->ucast_pending_del_q, &qe);
1181                 bfa_q_qe_init(qe);
1182                 mac = (struct bna_mac *)qe;
1183                 if (cleanup == BNA_SOFT_CLEANUP)
1184                         bna_cam_mod_mac_put(bna_ucam_mod_del_q(rxf->rx->bna),
1185                                             mac);
1186                 else {
1187                         bna_bfi_ucast_req(rxf, mac,
1188                                 BFI_ENET_H2I_MAC_UCAST_DEL_REQ);
1189                         bna_cam_mod_mac_put(bna_ucam_mod_del_q(rxf->rx->bna),
1190                                             mac);
1191                         return 1;
1192                 }
1193         }
1194
1195         /* Move active ucast entries to pending_add_q */
1196         while (!list_empty(&rxf->ucast_active_q)) {
1197                 bfa_q_deq(&rxf->ucast_active_q, &qe);
1198                 bfa_q_qe_init(qe);
1199                 list_add_tail(qe, &rxf->ucast_pending_add_q);
1200                 if (cleanup == BNA_HARD_CLEANUP) {
1201                         mac = (struct bna_mac *)qe;
1202                         bna_bfi_ucast_req(rxf, mac,
1203                                 BFI_ENET_H2I_MAC_UCAST_DEL_REQ);
1204                         return 1;
1205                 }
1206         }
1207
1208         if (rxf->ucast_active_set) {
1209                 rxf->ucast_pending_set = 1;
1210                 rxf->ucast_active_set = 0;
1211                 if (cleanup == BNA_HARD_CLEANUP) {
1212                         bna_bfi_ucast_req(rxf, &rxf->ucast_active_mac,
1213                                 BFI_ENET_H2I_MAC_UCAST_CLR_REQ);
1214                         return 1;
1215                 }
1216         }
1217
1218         return 0;
1219 }
1220
1221 static int
1222 bna_rxf_promisc_cfg_apply(struct bna_rxf *rxf)
1223 {
1224         struct bna *bna = rxf->rx->bna;
1225
1226         /* Enable/disable promiscuous mode */
1227         if (is_promisc_enable(rxf->rxmode_pending,
1228                                 rxf->rxmode_pending_bitmask)) {
1229                 /* move promisc configuration from pending -> active */
1230                 promisc_inactive(rxf->rxmode_pending,
1231                                 rxf->rxmode_pending_bitmask);
1232                 rxf->rxmode_active |= BNA_RXMODE_PROMISC;
1233                 bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_ENABLED);
1234                 return 1;
1235         } else if (is_promisc_disable(rxf->rxmode_pending,
1236                                 rxf->rxmode_pending_bitmask)) {
1237                 /* move promisc configuration from pending -> active */
1238                 promisc_inactive(rxf->rxmode_pending,
1239                                 rxf->rxmode_pending_bitmask);
1240                 rxf->rxmode_active &= ~BNA_RXMODE_PROMISC;
1241                 bna->promisc_rid = BFI_INVALID_RID;
1242                 bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_DISABLED);
1243                 return 1;
1244         }
1245
1246         return 0;
1247 }
1248
1249 static int
1250 bna_rxf_promisc_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
1251 {
1252         struct bna *bna = rxf->rx->bna;
1253
1254         /* Clear pending promisc mode disable */
1255         if (is_promisc_disable(rxf->rxmode_pending,
1256                                 rxf->rxmode_pending_bitmask)) {
1257                 promisc_inactive(rxf->rxmode_pending,
1258                                 rxf->rxmode_pending_bitmask);
1259                 rxf->rxmode_active &= ~BNA_RXMODE_PROMISC;
1260                 bna->promisc_rid = BFI_INVALID_RID;
1261                 if (cleanup == BNA_HARD_CLEANUP) {
1262                         bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_DISABLED);
1263                         return 1;
1264                 }
1265         }
1266
1267         /* Move promisc mode config from active -> pending */
1268         if (rxf->rxmode_active & BNA_RXMODE_PROMISC) {
1269                 promisc_enable(rxf->rxmode_pending,
1270                                 rxf->rxmode_pending_bitmask);
1271                 rxf->rxmode_active &= ~BNA_RXMODE_PROMISC;
1272                 if (cleanup == BNA_HARD_CLEANUP) {
1273                         bna_bfi_rx_promisc_req(rxf, BNA_STATUS_T_DISABLED);
1274                         return 1;
1275                 }
1276         }
1277
1278         return 0;
1279 }
1280
1281 static int
1282 bna_rxf_allmulti_cfg_apply(struct bna_rxf *rxf)
1283 {
1284         /* Enable/disable allmulti mode */
1285         if (is_allmulti_enable(rxf->rxmode_pending,
1286                                 rxf->rxmode_pending_bitmask)) {
1287                 /* move allmulti configuration from pending -> active */
1288                 allmulti_inactive(rxf->rxmode_pending,
1289                                 rxf->rxmode_pending_bitmask);
1290                 rxf->rxmode_active |= BNA_RXMODE_ALLMULTI;
1291                 bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_DISABLED);
1292                 return 1;
1293         } else if (is_allmulti_disable(rxf->rxmode_pending,
1294                                         rxf->rxmode_pending_bitmask)) {
1295                 /* move allmulti configuration from pending -> active */
1296                 allmulti_inactive(rxf->rxmode_pending,
1297                                 rxf->rxmode_pending_bitmask);
1298                 rxf->rxmode_active &= ~BNA_RXMODE_ALLMULTI;
1299                 bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_ENABLED);
1300                 return 1;
1301         }
1302
1303         return 0;
1304 }
1305
1306 static int
1307 bna_rxf_allmulti_cfg_reset(struct bna_rxf *rxf, enum bna_cleanup_type cleanup)
1308 {
1309         /* Clear pending allmulti mode disable */
1310         if (is_allmulti_disable(rxf->rxmode_pending,
1311                                 rxf->rxmode_pending_bitmask)) {
1312                 allmulti_inactive(rxf->rxmode_pending,
1313                                 rxf->rxmode_pending_bitmask);
1314                 rxf->rxmode_active &= ~BNA_RXMODE_ALLMULTI;
1315                 if (cleanup == BNA_HARD_CLEANUP) {
1316                         bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_ENABLED);
1317                         return 1;
1318                 }
1319         }
1320
1321         /* Move allmulti mode config from active -> pending */
1322         if (rxf->rxmode_active & BNA_RXMODE_ALLMULTI) {
1323                 allmulti_enable(rxf->rxmode_pending,
1324                                 rxf->rxmode_pending_bitmask);
1325                 rxf->rxmode_active &= ~BNA_RXMODE_ALLMULTI;
1326                 if (cleanup == BNA_HARD_CLEANUP) {
1327                         bna_bfi_mcast_filter_req(rxf, BNA_STATUS_T_ENABLED);
1328                         return 1;
1329                 }
1330         }
1331
1332         return 0;
1333 }
1334
1335 static int
1336 bna_rxf_promisc_enable(struct bna_rxf *rxf)
1337 {
1338         struct bna *bna = rxf->rx->bna;
1339         int ret = 0;
1340
1341         if (is_promisc_enable(rxf->rxmode_pending,
1342                                 rxf->rxmode_pending_bitmask) ||
1343                 (rxf->rxmode_active & BNA_RXMODE_PROMISC)) {
1344                 /* Do nothing if pending enable or already enabled */
1345         } else if (is_promisc_disable(rxf->rxmode_pending,
1346                                         rxf->rxmode_pending_bitmask)) {
1347                 /* Turn off pending disable command */
1348                 promisc_inactive(rxf->rxmode_pending,
1349                         rxf->rxmode_pending_bitmask);
1350         } else {
1351                 /* Schedule enable */
1352                 promisc_enable(rxf->rxmode_pending,
1353                                 rxf->rxmode_pending_bitmask);
1354                 bna->promisc_rid = rxf->rx->rid;
1355                 ret = 1;
1356         }
1357
1358         return ret;
1359 }
1360
1361 static int
1362 bna_rxf_promisc_disable(struct bna_rxf *rxf)
1363 {
1364         struct bna *bna = rxf->rx->bna;
1365         int ret = 0;
1366
1367         if (is_promisc_disable(rxf->rxmode_pending,
1368                                 rxf->rxmode_pending_bitmask) ||
1369                 (!(rxf->rxmode_active & BNA_RXMODE_PROMISC))) {
1370                 /* Do nothing if pending disable or already disabled */
1371         } else if (is_promisc_enable(rxf->rxmode_pending,
1372                                         rxf->rxmode_pending_bitmask)) {
1373                 /* Turn off pending enable command */
1374                 promisc_inactive(rxf->rxmode_pending,
1375                                 rxf->rxmode_pending_bitmask);
1376                 bna->promisc_rid = BFI_INVALID_RID;
1377         } else if (rxf->rxmode_active & BNA_RXMODE_PROMISC) {
1378                 /* Schedule disable */
1379                 promisc_disable(rxf->rxmode_pending,
1380                                 rxf->rxmode_pending_bitmask);
1381                 ret = 1;
1382         }
1383
1384         return ret;
1385 }
1386
1387 static int
1388 bna_rxf_allmulti_enable(struct bna_rxf *rxf)
1389 {
1390         int ret = 0;
1391
1392         if (is_allmulti_enable(rxf->rxmode_pending,
1393                         rxf->rxmode_pending_bitmask) ||
1394                         (rxf->rxmode_active & BNA_RXMODE_ALLMULTI)) {
1395                 /* Do nothing if pending enable or already enabled */
1396         } else if (is_allmulti_disable(rxf->rxmode_pending,
1397                                         rxf->rxmode_pending_bitmask)) {
1398                 /* Turn off pending disable command */
1399                 allmulti_inactive(rxf->rxmode_pending,
1400                         rxf->rxmode_pending_bitmask);
1401         } else {
1402                 /* Schedule enable */
1403                 allmulti_enable(rxf->rxmode_pending,
1404                                 rxf->rxmode_pending_bitmask);
1405                 ret = 1;
1406         }
1407
1408         return ret;
1409 }
1410
1411 static int
1412 bna_rxf_allmulti_disable(struct bna_rxf *rxf)
1413 {
1414         int ret = 0;
1415
1416         if (is_allmulti_disable(rxf->rxmode_pending,
1417                                 rxf->rxmode_pending_bitmask) ||
1418                 (!(rxf->rxmode_active & BNA_RXMODE_ALLMULTI))) {
1419                 /* Do nothing if pending disable or already disabled */
1420         } else if (is_allmulti_enable(rxf->rxmode_pending,
1421                                         rxf->rxmode_pending_bitmask)) {
1422                 /* Turn off pending enable command */
1423                 allmulti_inactive(rxf->rxmode_pending,
1424                                 rxf->rxmode_pending_bitmask);
1425         } else if (rxf->rxmode_active & BNA_RXMODE_ALLMULTI) {
1426                 /* Schedule disable */
1427                 allmulti_disable(rxf->rxmode_pending,
1428                                 rxf->rxmode_pending_bitmask);
1429                 ret = 1;
1430         }
1431
1432         return ret;
1433 }
1434
1435 static int
1436 bna_rxf_vlan_strip_cfg_apply(struct bna_rxf *rxf)
1437 {
1438         if (rxf->vlan_strip_pending) {
1439                         rxf->vlan_strip_pending = false;
1440                         bna_bfi_vlan_strip_enable(rxf);
1441                         return 1;
1442         }
1443
1444         return 0;
1445 }
1446
1447 /* RX */
1448
1449 #define BNA_GET_RXQS(qcfg)      (((qcfg)->rxp_type == BNA_RXP_SINGLE) ? \
1450         (qcfg)->num_paths : ((qcfg)->num_paths * 2))
1451
1452 #define SIZE_TO_PAGES(size)     (((size) >> PAGE_SHIFT) + ((((size) &\
1453         (PAGE_SIZE - 1)) + (PAGE_SIZE - 1)) >> PAGE_SHIFT))
1454
1455 #define call_rx_stop_cbfn(rx)                                           \
1456 do {                                                                \
1457         if ((rx)->stop_cbfn) {                                          \
1458                 void (*cbfn)(void *, struct bna_rx *);    \
1459                 void *cbarg;                                        \
1460                 cbfn = (rx)->stop_cbfn;                          \
1461                 cbarg = (rx)->stop_cbarg;                              \
1462                 (rx)->stop_cbfn = NULL;                                 \
1463                 (rx)->stop_cbarg = NULL;                                \
1464                 cbfn(cbarg, rx);                                        \
1465         }                                                              \
1466 } while (0)
1467
1468 #define call_rx_stall_cbfn(rx)                                          \
1469 do {                                                                    \
1470         if ((rx)->rx_stall_cbfn)                                        \
1471                 (rx)->rx_stall_cbfn((rx)->bna->bnad, (rx));             \
1472 } while (0)
1473
1474 #define bfi_enet_datapath_q_init(bfi_q, bna_qpt)                        \
1475 do {                                                                    \
1476         struct bna_dma_addr cur_q_addr =                                \
1477                 *((struct bna_dma_addr *)((bna_qpt)->kv_qpt_ptr));      \
1478         (bfi_q)->pg_tbl.a32.addr_lo = (bna_qpt)->hw_qpt_ptr.lsb;        \
1479         (bfi_q)->pg_tbl.a32.addr_hi = (bna_qpt)->hw_qpt_ptr.msb;        \
1480         (bfi_q)->first_entry.a32.addr_lo = cur_q_addr.lsb;              \
1481         (bfi_q)->first_entry.a32.addr_hi = cur_q_addr.msb;              \
1482         (bfi_q)->pages = htons((u16)(bna_qpt)->page_count);     \
1483         (bfi_q)->page_sz = htons((u16)(bna_qpt)->page_size);\
1484 } while (0)
1485
1486 static void bna_bfi_rx_enet_start(struct bna_rx *rx);
1487 static void bna_rx_enet_stop(struct bna_rx *rx);
1488 static void bna_rx_mod_cb_rx_stopped(void *arg, struct bna_rx *rx);
1489
1490 bfa_fsm_state_decl(bna_rx, stopped,
1491         struct bna_rx, enum bna_rx_event);
1492 bfa_fsm_state_decl(bna_rx, start_wait,
1493         struct bna_rx, enum bna_rx_event);
1494 bfa_fsm_state_decl(bna_rx, start_stop_wait,
1495         struct bna_rx, enum bna_rx_event);
1496 bfa_fsm_state_decl(bna_rx, rxf_start_wait,
1497         struct bna_rx, enum bna_rx_event);
1498 bfa_fsm_state_decl(bna_rx, started,
1499         struct bna_rx, enum bna_rx_event);
1500 bfa_fsm_state_decl(bna_rx, rxf_stop_wait,
1501         struct bna_rx, enum bna_rx_event);
1502 bfa_fsm_state_decl(bna_rx, stop_wait,
1503         struct bna_rx, enum bna_rx_event);
1504 bfa_fsm_state_decl(bna_rx, cleanup_wait,
1505         struct bna_rx, enum bna_rx_event);
1506 bfa_fsm_state_decl(bna_rx, failed,
1507         struct bna_rx, enum bna_rx_event);
1508 bfa_fsm_state_decl(bna_rx, quiesce_wait,
1509         struct bna_rx, enum bna_rx_event);
1510
1511 static void bna_rx_sm_stopped_entry(struct bna_rx *rx)
1512 {
1513         call_rx_stop_cbfn(rx);
1514 }
1515
1516 static void bna_rx_sm_stopped(struct bna_rx *rx,
1517                                 enum bna_rx_event event)
1518 {
1519         switch (event) {
1520         case RX_E_START:
1521                 bfa_fsm_set_state(rx, bna_rx_sm_start_wait);
1522                 break;
1523
1524         case RX_E_STOP:
1525                 call_rx_stop_cbfn(rx);
1526                 break;
1527
1528         case RX_E_FAIL:
1529                 /* no-op */
1530                 break;
1531
1532         default:
1533                 bfa_sm_fault(event);
1534                 break;
1535         }
1536 }
1537
1538 static void bna_rx_sm_start_wait_entry(struct bna_rx *rx)
1539 {
1540         bna_bfi_rx_enet_start(rx);
1541 }
1542
1543 static void
1544 bna_rx_sm_stop_wait_entry(struct bna_rx *rx)
1545 {
1546 }
1547
1548 static void
1549 bna_rx_sm_stop_wait(struct bna_rx *rx, enum bna_rx_event event)
1550 {
1551         switch (event) {
1552         case RX_E_FAIL:
1553         case RX_E_STOPPED:
1554                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1555                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1556                 break;
1557
1558         case RX_E_STARTED:
1559                 bna_rx_enet_stop(rx);
1560                 break;
1561
1562         default:
1563                 bfa_sm_fault(event);
1564                 break;
1565         }
1566 }
1567
1568 static void bna_rx_sm_start_wait(struct bna_rx *rx,
1569                                 enum bna_rx_event event)
1570 {
1571         switch (event) {
1572         case RX_E_STOP:
1573                 bfa_fsm_set_state(rx, bna_rx_sm_start_stop_wait);
1574                 break;
1575
1576         case RX_E_FAIL:
1577                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1578                 break;
1579
1580         case RX_E_STARTED:
1581                 bfa_fsm_set_state(rx, bna_rx_sm_rxf_start_wait);
1582                 break;
1583
1584         default:
1585                 bfa_sm_fault(event);
1586                 break;
1587         }
1588 }
1589
1590 static void bna_rx_sm_rxf_start_wait_entry(struct bna_rx *rx)
1591 {
1592         rx->rx_post_cbfn(rx->bna->bnad, rx);
1593         bna_rxf_start(&rx->rxf);
1594 }
1595
1596 static void
1597 bna_rx_sm_rxf_stop_wait_entry(struct bna_rx *rx)
1598 {
1599 }
1600
1601 static void
1602 bna_rx_sm_rxf_stop_wait(struct bna_rx *rx, enum bna_rx_event event)
1603 {
1604         switch (event) {
1605         case RX_E_FAIL:
1606                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1607                 bna_rxf_fail(&rx->rxf);
1608                 call_rx_stall_cbfn(rx);
1609                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1610                 break;
1611
1612         case RX_E_RXF_STARTED:
1613                 bna_rxf_stop(&rx->rxf);
1614                 break;
1615
1616         case RX_E_RXF_STOPPED:
1617                 bfa_fsm_set_state(rx, bna_rx_sm_stop_wait);
1618                 call_rx_stall_cbfn(rx);
1619                 bna_rx_enet_stop(rx);
1620                 break;
1621
1622         default:
1623                 bfa_sm_fault(event);
1624                 break;
1625         }
1626
1627 }
1628
1629 static void
1630 bna_rx_sm_start_stop_wait_entry(struct bna_rx *rx)
1631 {
1632 }
1633
1634 static void
1635 bna_rx_sm_start_stop_wait(struct bna_rx *rx, enum bna_rx_event event)
1636 {
1637         switch (event) {
1638         case RX_E_FAIL:
1639         case RX_E_STOPPED:
1640                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1641                 break;
1642
1643         case RX_E_STARTED:
1644                 bna_rx_enet_stop(rx);
1645                 break;
1646
1647         default:
1648                 bfa_sm_fault(event);
1649         }
1650 }
1651
1652 static void
1653 bna_rx_sm_started_entry(struct bna_rx *rx)
1654 {
1655         struct bna_rxp *rxp;
1656         struct list_head *qe_rxp;
1657         int is_regular = (rx->type == BNA_RX_T_REGULAR);
1658
1659         /* Start IB */
1660         list_for_each(qe_rxp, &rx->rxp_q) {
1661                 rxp = (struct bna_rxp *)qe_rxp;
1662                 bna_ib_start(rx->bna, &rxp->cq.ib, is_regular);
1663         }
1664
1665         bna_ethport_cb_rx_started(&rx->bna->ethport);
1666 }
1667
1668 static void
1669 bna_rx_sm_started(struct bna_rx *rx, enum bna_rx_event event)
1670 {
1671         switch (event) {
1672         case RX_E_STOP:
1673                 bfa_fsm_set_state(rx, bna_rx_sm_rxf_stop_wait);
1674                 bna_ethport_cb_rx_stopped(&rx->bna->ethport);
1675                 bna_rxf_stop(&rx->rxf);
1676                 break;
1677
1678         case RX_E_FAIL:
1679                 bfa_fsm_set_state(rx, bna_rx_sm_failed);
1680                 bna_ethport_cb_rx_stopped(&rx->bna->ethport);
1681                 bna_rxf_fail(&rx->rxf);
1682                 call_rx_stall_cbfn(rx);
1683                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1684                 break;
1685
1686         default:
1687                 bfa_sm_fault(event);
1688                 break;
1689         }
1690 }
1691
1692 static void bna_rx_sm_rxf_start_wait(struct bna_rx *rx,
1693                                 enum bna_rx_event event)
1694 {
1695         switch (event) {
1696         case RX_E_STOP:
1697                 bfa_fsm_set_state(rx, bna_rx_sm_rxf_stop_wait);
1698                 break;
1699
1700         case RX_E_FAIL:
1701                 bfa_fsm_set_state(rx, bna_rx_sm_failed);
1702                 bna_rxf_fail(&rx->rxf);
1703                 call_rx_stall_cbfn(rx);
1704                 rx->rx_cleanup_cbfn(rx->bna->bnad, rx);
1705                 break;
1706
1707         case RX_E_RXF_STARTED:
1708                 bfa_fsm_set_state(rx, bna_rx_sm_started);
1709                 break;
1710
1711         default:
1712                 bfa_sm_fault(event);
1713                 break;
1714         }
1715 }
1716
1717 static void
1718 bna_rx_sm_cleanup_wait_entry(struct bna_rx *rx)
1719 {
1720 }
1721
1722 static void
1723 bna_rx_sm_cleanup_wait(struct bna_rx *rx, enum bna_rx_event event)
1724 {
1725         switch (event) {
1726         case RX_E_FAIL:
1727         case RX_E_RXF_STOPPED:
1728                 /* No-op */
1729                 break;
1730
1731         case RX_E_CLEANUP_DONE:
1732                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1733                 break;
1734
1735         default:
1736                 bfa_sm_fault(event);
1737                 break;
1738         }
1739 }
1740
1741 static void
1742 bna_rx_sm_failed_entry(struct bna_rx *rx)
1743 {
1744 }
1745
1746 static void
1747 bna_rx_sm_failed(struct bna_rx *rx, enum bna_rx_event event)
1748 {
1749         switch (event) {
1750         case RX_E_START:
1751                 bfa_fsm_set_state(rx, bna_rx_sm_quiesce_wait);
1752                 break;
1753
1754         case RX_E_STOP:
1755                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1756                 break;
1757
1758         case RX_E_FAIL:
1759         case RX_E_RXF_STARTED:
1760         case RX_E_RXF_STOPPED:
1761                 /* No-op */
1762                 break;
1763
1764         case RX_E_CLEANUP_DONE:
1765                 bfa_fsm_set_state(rx, bna_rx_sm_stopped);
1766                 break;
1767
1768         default:
1769                 bfa_sm_fault(event);
1770                 break;
1771 }       }
1772
1773 static void
1774 bna_rx_sm_quiesce_wait_entry(struct bna_rx *rx)
1775 {
1776 }
1777
1778 static void
1779 bna_rx_sm_quiesce_wait(struct bna_rx *rx, enum bna_rx_event event)
1780 {
1781         switch (event) {
1782         case RX_E_STOP:
1783                 bfa_fsm_set_state(rx, bna_rx_sm_cleanup_wait);
1784                 break;
1785
1786         case RX_E_FAIL:
1787                 bfa_fsm_set_state(rx, bna_rx_sm_failed);
1788                 break;
1789
1790         case RX_E_CLEANUP_DONE:
1791                 bfa_fsm_set_state(rx, bna_rx_sm_start_wait);
1792                 break;
1793
1794         default:
1795                 bfa_sm_fault(event);
1796                 break;
1797         }
1798 }
1799
1800 static void
1801 bna_bfi_rx_enet_start(struct bna_rx *rx)
1802 {
1803         struct bfi_enet_rx_cfg_req *cfg_req = &rx->bfi_enet_cmd.cfg_req;
1804         struct bna_rxp *rxp = NULL;
1805         struct bna_rxq *q0 = NULL, *q1 = NULL;
1806         struct list_head *rxp_qe;
1807         int i;
1808
1809         bfi_msgq_mhdr_set(cfg_req->mh, BFI_MC_ENET,
1810                 BFI_ENET_H2I_RX_CFG_SET_REQ, 0, rx->rid);
1811         cfg_req->mh.num_entries = htons(
1812                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_rx_cfg_req)));
1813
1814         cfg_req->num_queue_sets = rx->num_paths;
1815         for (i = 0, rxp_qe = bfa_q_first(&rx->rxp_q);
1816                 i < rx->num_paths;
1817                 i++, rxp_qe = bfa_q_next(rxp_qe)) {
1818                 rxp = (struct bna_rxp *)rxp_qe;
1819
1820                 GET_RXQS(rxp, q0, q1);
1821                 switch (rxp->type) {
1822                 case BNA_RXP_SLR:
1823                 case BNA_RXP_HDS:
1824                         /* Small RxQ */
1825                         bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].qs.q,
1826                                                 &q1->qpt);
1827                         cfg_req->q_cfg[i].qs.rx_buffer_size =
1828                                 htons((u16)q1->buffer_size);
1829                         /* Fall through */
1830
1831                 case BNA_RXP_SINGLE:
1832                         /* Large/Single RxQ */
1833                         bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].ql.q,
1834                                                 &q0->qpt);
1835                         q0->buffer_size =
1836                                 bna_enet_mtu_get(&rx->bna->enet);
1837                         cfg_req->q_cfg[i].ql.rx_buffer_size =
1838                                 htons((u16)q0->buffer_size);
1839                         break;
1840
1841                 default:
1842                         BUG_ON(1);
1843                 }
1844
1845                 bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].cq.q,
1846                                         &rxp->cq.qpt);
1847
1848                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_lo =
1849                         rxp->cq.ib.ib_seg_host_addr.lsb;
1850                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_hi =
1851                         rxp->cq.ib.ib_seg_host_addr.msb;
1852                 cfg_req->q_cfg[i].ib.intr.msix_index =
1853                         htons((u16)rxp->cq.ib.intr_vector);
1854         }
1855
1856         cfg_req->ib_cfg.int_pkt_dma = BNA_STATUS_T_DISABLED;
1857         cfg_req->ib_cfg.int_enabled = BNA_STATUS_T_ENABLED;
1858         cfg_req->ib_cfg.int_pkt_enabled = BNA_STATUS_T_DISABLED;
1859         cfg_req->ib_cfg.continuous_coalescing = BNA_STATUS_T_DISABLED;
1860         cfg_req->ib_cfg.msix = (rxp->cq.ib.intr_type == BNA_INTR_T_MSIX)
1861                                 ? BNA_STATUS_T_ENABLED :
1862                                 BNA_STATUS_T_DISABLED;
1863         cfg_req->ib_cfg.coalescing_timeout =
1864                         htonl((u32)rxp->cq.ib.coalescing_timeo);
1865         cfg_req->ib_cfg.inter_pkt_timeout =
1866                         htonl((u32)rxp->cq.ib.interpkt_timeo);
1867         cfg_req->ib_cfg.inter_pkt_count = (u8)rxp->cq.ib.interpkt_count;
1868
1869         switch (rxp->type) {
1870         case BNA_RXP_SLR:
1871                 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_LARGE_SMALL;
1872                 break;
1873
1874         case BNA_RXP_HDS:
1875                 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_HDS;
1876                 cfg_req->rx_cfg.hds.type = rx->hds_cfg.hdr_type;
1877                 cfg_req->rx_cfg.hds.force_offset = rx->hds_cfg.forced_offset;
1878                 cfg_req->rx_cfg.hds.max_header_size = rx->hds_cfg.forced_offset;
1879                 break;
1880
1881         case BNA_RXP_SINGLE:
1882                 cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_SINGLE;
1883                 break;
1884
1885         default:
1886                 BUG_ON(1);
1887         }
1888         cfg_req->rx_cfg.strip_vlan = rx->rxf.vlan_strip_status;
1889
1890         bfa_msgq_cmd_set(&rx->msgq_cmd, NULL, NULL,
1891                 sizeof(struct bfi_enet_rx_cfg_req), &cfg_req->mh);
1892         bfa_msgq_cmd_post(&rx->bna->msgq, &rx->msgq_cmd);
1893 }
1894
1895 static void
1896 bna_bfi_rx_enet_stop(struct bna_rx *rx)
1897 {
1898         struct bfi_enet_req *req = &rx->bfi_enet_cmd.req;
1899
1900         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
1901                 BFI_ENET_H2I_RX_CFG_CLR_REQ, 0, rx->rid);
1902         req->mh.num_entries = htons(
1903                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_req)));
1904         bfa_msgq_cmd_set(&rx->msgq_cmd, NULL, NULL, sizeof(struct bfi_enet_req),
1905                 &req->mh);
1906         bfa_msgq_cmd_post(&rx->bna->msgq, &rx->msgq_cmd);
1907 }
1908
1909 static void
1910 bna_rx_enet_stop(struct bna_rx *rx)
1911 {
1912         struct bna_rxp *rxp;
1913         struct list_head                 *qe_rxp;
1914
1915         /* Stop IB */
1916         list_for_each(qe_rxp, &rx->rxp_q) {
1917                 rxp = (struct bna_rxp *)qe_rxp;
1918                 bna_ib_stop(rx->bna, &rxp->cq.ib);
1919         }
1920
1921         bna_bfi_rx_enet_stop(rx);
1922 }
1923
1924 static int
1925 bna_rx_res_check(struct bna_rx_mod *rx_mod, struct bna_rx_config *rx_cfg)
1926 {
1927         if ((rx_mod->rx_free_count == 0) ||
1928                 (rx_mod->rxp_free_count == 0) ||
1929                 (rx_mod->rxq_free_count == 0))
1930                 return 0;
1931
1932         if (rx_cfg->rxp_type == BNA_RXP_SINGLE) {
1933                 if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||
1934                         (rx_mod->rxq_free_count < rx_cfg->num_paths))
1935                                 return 0;
1936         } else {
1937                 if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||
1938                         (rx_mod->rxq_free_count < (2 * rx_cfg->num_paths)))
1939                         return 0;
1940         }
1941
1942         return 1;
1943 }
1944
1945 static struct bna_rxq *
1946 bna_rxq_get(struct bna_rx_mod *rx_mod)
1947 {
1948         struct bna_rxq *rxq = NULL;
1949         struct list_head        *qe = NULL;
1950
1951         bfa_q_deq(&rx_mod->rxq_free_q, &qe);
1952         rx_mod->rxq_free_count--;
1953         rxq = (struct bna_rxq *)qe;
1954         bfa_q_qe_init(&rxq->qe);
1955
1956         return rxq;
1957 }
1958
1959 static void
1960 bna_rxq_put(struct bna_rx_mod *rx_mod, struct bna_rxq *rxq)
1961 {
1962         bfa_q_qe_init(&rxq->qe);
1963         list_add_tail(&rxq->qe, &rx_mod->rxq_free_q);
1964         rx_mod->rxq_free_count++;
1965 }
1966
1967 static struct bna_rxp *
1968 bna_rxp_get(struct bna_rx_mod *rx_mod)
1969 {
1970         struct list_head        *qe = NULL;
1971         struct bna_rxp *rxp = NULL;
1972
1973         bfa_q_deq(&rx_mod->rxp_free_q, &qe);
1974         rx_mod->rxp_free_count--;
1975         rxp = (struct bna_rxp *)qe;
1976         bfa_q_qe_init(&rxp->qe);
1977
1978         return rxp;
1979 }
1980
1981 static void
1982 bna_rxp_put(struct bna_rx_mod *rx_mod, struct bna_rxp *rxp)
1983 {
1984         bfa_q_qe_init(&rxp->qe);
1985         list_add_tail(&rxp->qe, &rx_mod->rxp_free_q);
1986         rx_mod->rxp_free_count++;
1987 }
1988
1989 static struct bna_rx *
1990 bna_rx_get(struct bna_rx_mod *rx_mod, enum bna_rx_type type)
1991 {
1992         struct list_head        *qe = NULL;
1993         struct bna_rx *rx = NULL;
1994
1995         if (type == BNA_RX_T_REGULAR) {
1996                 bfa_q_deq(&rx_mod->rx_free_q, &qe);
1997         } else
1998                 bfa_q_deq_tail(&rx_mod->rx_free_q, &qe);
1999
2000         rx_mod->rx_free_count--;
2001         rx = (struct bna_rx *)qe;
2002         bfa_q_qe_init(&rx->qe);
2003         list_add_tail(&rx->qe, &rx_mod->rx_active_q);
2004         rx->type = type;
2005
2006         return rx;
2007 }
2008
2009 static void
2010 bna_rx_put(struct bna_rx_mod *rx_mod, struct bna_rx *rx)
2011 {
2012         struct list_head *prev_qe = NULL;
2013         struct list_head *qe;
2014
2015         bfa_q_qe_init(&rx->qe);
2016
2017         list_for_each(qe, &rx_mod->rx_free_q) {
2018                 if (((struct bna_rx *)qe)->rid < rx->rid)
2019                         prev_qe = qe;
2020                 else
2021                         break;
2022         }
2023
2024         if (prev_qe == NULL) {
2025                 /* This is the first entry */
2026                 bfa_q_enq_head(&rx_mod->rx_free_q, &rx->qe);
2027         } else if (bfa_q_next(prev_qe) == &rx_mod->rx_free_q) {
2028                 /* This is the last entry */
2029                 list_add_tail(&rx->qe, &rx_mod->rx_free_q);
2030         } else {
2031                 /* Somewhere in the middle */
2032                 bfa_q_next(&rx->qe) = bfa_q_next(prev_qe);
2033                 bfa_q_prev(&rx->qe) = prev_qe;
2034                 bfa_q_next(prev_qe) = &rx->qe;
2035                 bfa_q_prev(bfa_q_next(&rx->qe)) = &rx->qe;
2036         }
2037
2038         rx_mod->rx_free_count++;
2039 }
2040
2041 static void
2042 bna_rxp_add_rxqs(struct bna_rxp *rxp, struct bna_rxq *q0,
2043                 struct bna_rxq *q1)
2044 {
2045         switch (rxp->type) {
2046         case BNA_RXP_SINGLE:
2047                 rxp->rxq.single.only = q0;
2048                 rxp->rxq.single.reserved = NULL;
2049                 break;
2050         case BNA_RXP_SLR:
2051                 rxp->rxq.slr.large = q0;
2052                 rxp->rxq.slr.small = q1;
2053                 break;
2054         case BNA_RXP_HDS:
2055                 rxp->rxq.hds.data = q0;
2056                 rxp->rxq.hds.hdr = q1;
2057                 break;
2058         default:
2059                 break;
2060         }
2061 }
2062
2063 static void
2064 bna_rxq_qpt_setup(struct bna_rxq *rxq,
2065                 struct bna_rxp *rxp,
2066                 u32 page_count,
2067                 u32 page_size,
2068                 struct bna_mem_descr *qpt_mem,
2069                 struct bna_mem_descr *swqpt_mem,
2070                 struct bna_mem_descr *page_mem)
2071 {
2072         u8 *kva;
2073         u64 dma;
2074         struct bna_dma_addr bna_dma;
2075         int     i;
2076
2077         rxq->qpt.hw_qpt_ptr.lsb = qpt_mem->dma.lsb;
2078         rxq->qpt.hw_qpt_ptr.msb = qpt_mem->dma.msb;
2079         rxq->qpt.kv_qpt_ptr = qpt_mem->kva;
2080         rxq->qpt.page_count = page_count;
2081         rxq->qpt.page_size = page_size;
2082
2083         rxq->rcb->sw_qpt = (void **) swqpt_mem->kva;
2084         rxq->rcb->sw_q = page_mem->kva;
2085
2086         kva = page_mem->kva;
2087         BNA_GET_DMA_ADDR(&page_mem->dma, dma);
2088
2089         for (i = 0; i < rxq->qpt.page_count; i++) {
2090                 rxq->rcb->sw_qpt[i] = kva;
2091                 kva += PAGE_SIZE;
2092
2093                 BNA_SET_DMA_ADDR(dma, &bna_dma);
2094                 ((struct bna_dma_addr *)rxq->qpt.kv_qpt_ptr)[i].lsb =
2095                         bna_dma.lsb;
2096                 ((struct bna_dma_addr *)rxq->qpt.kv_qpt_ptr)[i].msb =
2097                         bna_dma.msb;
2098                 dma += PAGE_SIZE;
2099         }
2100 }
2101
2102 static void
2103 bna_rxp_cqpt_setup(struct bna_rxp *rxp,
2104                 u32 page_count,
2105                 u32 page_size,
2106                 struct bna_mem_descr *qpt_mem,
2107                 struct bna_mem_descr *swqpt_mem,
2108                 struct bna_mem_descr *page_mem)
2109 {
2110         u8 *kva;
2111         u64 dma;
2112         struct bna_dma_addr bna_dma;
2113         int     i;
2114
2115         rxp->cq.qpt.hw_qpt_ptr.lsb = qpt_mem->dma.lsb;
2116         rxp->cq.qpt.hw_qpt_ptr.msb = qpt_mem->dma.msb;
2117         rxp->cq.qpt.kv_qpt_ptr = qpt_mem->kva;
2118         rxp->cq.qpt.page_count = page_count;
2119         rxp->cq.qpt.page_size = page_size;
2120
2121         rxp->cq.ccb->sw_qpt = (void **) swqpt_mem->kva;
2122         rxp->cq.ccb->sw_q = page_mem->kva;
2123
2124         kva = page_mem->kva;
2125         BNA_GET_DMA_ADDR(&page_mem->dma, dma);
2126
2127         for (i = 0; i < rxp->cq.qpt.page_count; i++) {
2128                 rxp->cq.ccb->sw_qpt[i] = kva;
2129                 kva += PAGE_SIZE;
2130
2131                 BNA_SET_DMA_ADDR(dma, &bna_dma);
2132                 ((struct bna_dma_addr *)rxp->cq.qpt.kv_qpt_ptr)[i].lsb =
2133                         bna_dma.lsb;
2134                 ((struct bna_dma_addr *)rxp->cq.qpt.kv_qpt_ptr)[i].msb =
2135                         bna_dma.msb;
2136                 dma += PAGE_SIZE;
2137         }
2138 }
2139
2140 static void
2141 bna_rx_mod_cb_rx_stopped(void *arg, struct bna_rx *rx)
2142 {
2143         struct bna_rx_mod *rx_mod = (struct bna_rx_mod *)arg;
2144
2145         bfa_wc_down(&rx_mod->rx_stop_wc);
2146 }
2147
2148 static void
2149 bna_rx_mod_cb_rx_stopped_all(void *arg)
2150 {
2151         struct bna_rx_mod *rx_mod = (struct bna_rx_mod *)arg;
2152
2153         if (rx_mod->stop_cbfn)
2154                 rx_mod->stop_cbfn(&rx_mod->bna->enet);
2155         rx_mod->stop_cbfn = NULL;
2156 }
2157
2158 static void
2159 bna_rx_start(struct bna_rx *rx)
2160 {
2161         rx->rx_flags |= BNA_RX_F_ENET_STARTED;
2162         if (rx->rx_flags & BNA_RX_F_ENABLED)
2163                 bfa_fsm_send_event(rx, RX_E_START);
2164 }
2165
2166 static void
2167 bna_rx_stop(struct bna_rx *rx)
2168 {
2169         rx->rx_flags &= ~BNA_RX_F_ENET_STARTED;
2170         if (rx->fsm == (bfa_fsm_t) bna_rx_sm_stopped)
2171                 bna_rx_mod_cb_rx_stopped(&rx->bna->rx_mod, rx);
2172         else {
2173                 rx->stop_cbfn = bna_rx_mod_cb_rx_stopped;
2174                 rx->stop_cbarg = &rx->bna->rx_mod;
2175                 bfa_fsm_send_event(rx, RX_E_STOP);
2176         }
2177 }
2178
2179 static void
2180 bna_rx_fail(struct bna_rx *rx)
2181 {
2182         /* Indicate Enet is not enabled, and failed */
2183         rx->rx_flags &= ~BNA_RX_F_ENET_STARTED;
2184         bfa_fsm_send_event(rx, RX_E_FAIL);
2185 }
2186
2187 void
2188 bna_rx_mod_start(struct bna_rx_mod *rx_mod, enum bna_rx_type type)
2189 {
2190         struct bna_rx *rx;
2191         struct list_head *qe;
2192
2193         rx_mod->flags |= BNA_RX_MOD_F_ENET_STARTED;
2194         if (type == BNA_RX_T_LOOPBACK)
2195                 rx_mod->flags |= BNA_RX_MOD_F_ENET_LOOPBACK;
2196
2197         list_for_each(qe, &rx_mod->rx_active_q) {
2198                 rx = (struct bna_rx *)qe;
2199                 if (rx->type == type)
2200                         bna_rx_start(rx);
2201         }
2202 }
2203
2204 void
2205 bna_rx_mod_stop(struct bna_rx_mod *rx_mod, enum bna_rx_type type)
2206 {
2207         struct bna_rx *rx;
2208         struct list_head *qe;
2209
2210         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_STARTED;
2211         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_LOOPBACK;
2212
2213         rx_mod->stop_cbfn = bna_enet_cb_rx_stopped;
2214
2215         bfa_wc_init(&rx_mod->rx_stop_wc, bna_rx_mod_cb_rx_stopped_all, rx_mod);
2216
2217         list_for_each(qe, &rx_mod->rx_active_q) {
2218                 rx = (struct bna_rx *)qe;
2219                 if (rx->type == type) {
2220                         bfa_wc_up(&rx_mod->rx_stop_wc);
2221                         bna_rx_stop(rx);
2222                 }
2223         }
2224
2225         bfa_wc_wait(&rx_mod->rx_stop_wc);
2226 }
2227
2228 void
2229 bna_rx_mod_fail(struct bna_rx_mod *rx_mod)
2230 {
2231         struct bna_rx *rx;
2232         struct list_head *qe;
2233
2234         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_STARTED;
2235         rx_mod->flags &= ~BNA_RX_MOD_F_ENET_LOOPBACK;
2236
2237         list_for_each(qe, &rx_mod->rx_active_q) {
2238                 rx = (struct bna_rx *)qe;
2239                 bna_rx_fail(rx);
2240         }
2241 }
2242
2243 void bna_rx_mod_init(struct bna_rx_mod *rx_mod, struct bna *bna,
2244                         struct bna_res_info *res_info)
2245 {
2246         int     index;
2247         struct bna_rx *rx_ptr;
2248         struct bna_rxp *rxp_ptr;
2249         struct bna_rxq *rxq_ptr;
2250
2251         rx_mod->bna = bna;
2252         rx_mod->flags = 0;
2253
2254         rx_mod->rx = (struct bna_rx *)
2255                 res_info[BNA_MOD_RES_MEM_T_RX_ARRAY].res_u.mem_info.mdl[0].kva;
2256         rx_mod->rxp = (struct bna_rxp *)
2257                 res_info[BNA_MOD_RES_MEM_T_RXP_ARRAY].res_u.mem_info.mdl[0].kva;
2258         rx_mod->rxq = (struct bna_rxq *)
2259                 res_info[BNA_MOD_RES_MEM_T_RXQ_ARRAY].res_u.mem_info.mdl[0].kva;
2260
2261         /* Initialize the queues */
2262         INIT_LIST_HEAD(&rx_mod->rx_free_q);
2263         rx_mod->rx_free_count = 0;
2264         INIT_LIST_HEAD(&rx_mod->rxq_free_q);
2265         rx_mod->rxq_free_count = 0;
2266         INIT_LIST_HEAD(&rx_mod->rxp_free_q);
2267         rx_mod->rxp_free_count = 0;
2268         INIT_LIST_HEAD(&rx_mod->rx_active_q);
2269
2270         /* Build RX queues */
2271         for (index = 0; index < bna->ioceth.attr.num_rxp; index++) {
2272                 rx_ptr = &rx_mod->rx[index];
2273
2274                 bfa_q_qe_init(&rx_ptr->qe);
2275                 INIT_LIST_HEAD(&rx_ptr->rxp_q);
2276                 rx_ptr->bna = NULL;
2277                 rx_ptr->rid = index;
2278                 rx_ptr->stop_cbfn = NULL;
2279                 rx_ptr->stop_cbarg = NULL;
2280
2281                 list_add_tail(&rx_ptr->qe, &rx_mod->rx_free_q);
2282                 rx_mod->rx_free_count++;
2283         }
2284
2285         /* build RX-path queue */
2286         for (index = 0; index < bna->ioceth.attr.num_rxp; index++) {
2287                 rxp_ptr = &rx_mod->rxp[index];
2288                 bfa_q_qe_init(&rxp_ptr->qe);
2289                 list_add_tail(&rxp_ptr->qe, &rx_mod->rxp_free_q);
2290                 rx_mod->rxp_free_count++;
2291         }
2292
2293         /* build RXQ queue */
2294         for (index = 0; index < (bna->ioceth.attr.num_rxp * 2); index++) {
2295                 rxq_ptr = &rx_mod->rxq[index];
2296                 bfa_q_qe_init(&rxq_ptr->qe);
2297                 list_add_tail(&rxq_ptr->qe, &rx_mod->rxq_free_q);
2298                 rx_mod->rxq_free_count++;
2299         }
2300 }
2301
2302 void
2303 bna_rx_mod_uninit(struct bna_rx_mod *rx_mod)
2304 {
2305         struct list_head                *qe;
2306         int i;
2307
2308         i = 0;
2309         list_for_each(qe, &rx_mod->rx_free_q)
2310                 i++;
2311
2312         i = 0;
2313         list_for_each(qe, &rx_mod->rxp_free_q)
2314                 i++;
2315
2316         i = 0;
2317         list_for_each(qe, &rx_mod->rxq_free_q)
2318                 i++;
2319
2320         rx_mod->bna = NULL;
2321 }
2322
2323 void
2324 bna_bfi_rx_enet_start_rsp(struct bna_rx *rx, struct bfi_msgq_mhdr *msghdr)
2325 {
2326         struct bfi_enet_rx_cfg_rsp *cfg_rsp = &rx->bfi_enet_cmd.cfg_rsp;
2327         struct bna_rxp *rxp = NULL;
2328         struct bna_rxq *q0 = NULL, *q1 = NULL;
2329         struct list_head *rxp_qe;
2330         int i;
2331
2332         bfa_msgq_rsp_copy(&rx->bna->msgq, (u8 *)cfg_rsp,
2333                 sizeof(struct bfi_enet_rx_cfg_rsp));
2334
2335         rx->hw_id = cfg_rsp->hw_id;
2336
2337         for (i = 0, rxp_qe = bfa_q_first(&rx->rxp_q);
2338                 i < rx->num_paths;
2339                 i++, rxp_qe = bfa_q_next(rxp_qe)) {
2340                 rxp = (struct bna_rxp *)rxp_qe;
2341                 GET_RXQS(rxp, q0, q1);
2342
2343                 /* Setup doorbells */
2344                 rxp->cq.ccb->i_dbell->doorbell_addr =
2345                         rx->bna->pcidev.pci_bar_kva
2346                         + ntohl(cfg_rsp->q_handles[i].i_dbell);
2347                 rxp->hw_id = cfg_rsp->q_handles[i].hw_cqid;
2348                 q0->rcb->q_dbell =
2349                         rx->bna->pcidev.pci_bar_kva
2350                         + ntohl(cfg_rsp->q_handles[i].ql_dbell);
2351                 q0->hw_id = cfg_rsp->q_handles[i].hw_lqid;
2352                 if (q1) {
2353                         q1->rcb->q_dbell =
2354                         rx->bna->pcidev.pci_bar_kva
2355                         + ntohl(cfg_rsp->q_handles[i].qs_dbell);
2356                         q1->hw_id = cfg_rsp->q_handles[i].hw_sqid;
2357                 }
2358
2359                 /* Initialize producer/consumer indexes */
2360                 (*rxp->cq.ccb->hw_producer_index) = 0;
2361                 rxp->cq.ccb->producer_index = 0;
2362                 q0->rcb->producer_index = q0->rcb->consumer_index = 0;
2363                 if (q1)
2364                         q1->rcb->producer_index = q1->rcb->consumer_index = 0;
2365         }
2366
2367         bfa_fsm_send_event(rx, RX_E_STARTED);
2368 }
2369
2370 void
2371 bna_bfi_rx_enet_stop_rsp(struct bna_rx *rx, struct bfi_msgq_mhdr *msghdr)
2372 {
2373         bfa_fsm_send_event(rx, RX_E_STOPPED);
2374 }
2375
2376 void
2377 bna_rx_res_req(struct bna_rx_config *q_cfg, struct bna_res_info *res_info)
2378 {
2379         u32 cq_size, hq_size, dq_size;
2380         u32 cpage_count, hpage_count, dpage_count;
2381         struct bna_mem_info *mem_info;
2382         u32 cq_depth;
2383         u32 hq_depth;
2384         u32 dq_depth;
2385
2386         dq_depth = q_cfg->q_depth;
2387         hq_depth = ((q_cfg->rxp_type == BNA_RXP_SINGLE) ? 0 : q_cfg->q_depth);
2388         cq_depth = dq_depth + hq_depth;
2389
2390         BNA_TO_POWER_OF_2_HIGH(cq_depth);
2391         cq_size = cq_depth * BFI_CQ_WI_SIZE;
2392         cq_size = ALIGN(cq_size, PAGE_SIZE);
2393         cpage_count = SIZE_TO_PAGES(cq_size);
2394
2395         BNA_TO_POWER_OF_2_HIGH(dq_depth);
2396         dq_size = dq_depth * BFI_RXQ_WI_SIZE;
2397         dq_size = ALIGN(dq_size, PAGE_SIZE);
2398         dpage_count = SIZE_TO_PAGES(dq_size);
2399
2400         if (BNA_RXP_SINGLE != q_cfg->rxp_type) {
2401                 BNA_TO_POWER_OF_2_HIGH(hq_depth);
2402                 hq_size = hq_depth * BFI_RXQ_WI_SIZE;
2403                 hq_size = ALIGN(hq_size, PAGE_SIZE);
2404                 hpage_count = SIZE_TO_PAGES(hq_size);
2405         } else
2406                 hpage_count = 0;
2407
2408         res_info[BNA_RX_RES_MEM_T_CCB].res_type = BNA_RES_T_MEM;
2409         mem_info = &res_info[BNA_RX_RES_MEM_T_CCB].res_u.mem_info;
2410         mem_info->mem_type = BNA_MEM_T_KVA;
2411         mem_info->len = sizeof(struct bna_ccb);
2412         mem_info->num = q_cfg->num_paths;
2413
2414         res_info[BNA_RX_RES_MEM_T_RCB].res_type = BNA_RES_T_MEM;
2415         mem_info = &res_info[BNA_RX_RES_MEM_T_RCB].res_u.mem_info;
2416         mem_info->mem_type = BNA_MEM_T_KVA;
2417         mem_info->len = sizeof(struct bna_rcb);
2418         mem_info->num = BNA_GET_RXQS(q_cfg);
2419
2420         res_info[BNA_RX_RES_MEM_T_CQPT].res_type = BNA_RES_T_MEM;
2421         mem_info = &res_info[BNA_RX_RES_MEM_T_CQPT].res_u.mem_info;
2422         mem_info->mem_type = BNA_MEM_T_DMA;
2423         mem_info->len = cpage_count * sizeof(struct bna_dma_addr);
2424         mem_info->num = q_cfg->num_paths;
2425
2426         res_info[BNA_RX_RES_MEM_T_CSWQPT].res_type = BNA_RES_T_MEM;
2427         mem_info = &res_info[BNA_RX_RES_MEM_T_CSWQPT].res_u.mem_info;
2428         mem_info->mem_type = BNA_MEM_T_KVA;
2429         mem_info->len = cpage_count * sizeof(void *);
2430         mem_info->num = q_cfg->num_paths;
2431
2432         res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_type = BNA_RES_T_MEM;
2433         mem_info = &res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_u.mem_info;
2434         mem_info->mem_type = BNA_MEM_T_DMA;
2435         mem_info->len = PAGE_SIZE * cpage_count;
2436         mem_info->num = q_cfg->num_paths;
2437
2438         res_info[BNA_RX_RES_MEM_T_DQPT].res_type = BNA_RES_T_MEM;
2439         mem_info = &res_info[BNA_RX_RES_MEM_T_DQPT].res_u.mem_info;
2440         mem_info->mem_type = BNA_MEM_T_DMA;
2441         mem_info->len = dpage_count * sizeof(struct bna_dma_addr);
2442         mem_info->num = q_cfg->num_paths;
2443
2444         res_info[BNA_RX_RES_MEM_T_DSWQPT].res_type = BNA_RES_T_MEM;
2445         mem_info = &res_info[BNA_RX_RES_MEM_T_DSWQPT].res_u.mem_info;
2446         mem_info->mem_type = BNA_MEM_T_KVA;
2447         mem_info->len = dpage_count * sizeof(void *);
2448         mem_info->num = q_cfg->num_paths;
2449
2450         res_info[BNA_RX_RES_MEM_T_DPAGE].res_type = BNA_RES_T_MEM;
2451         mem_info = &res_info[BNA_RX_RES_MEM_T_DPAGE].res_u.mem_info;
2452         mem_info->mem_type = BNA_MEM_T_DMA;
2453         mem_info->len = PAGE_SIZE * dpage_count;
2454         mem_info->num = q_cfg->num_paths;
2455
2456         res_info[BNA_RX_RES_MEM_T_HQPT].res_type = BNA_RES_T_MEM;
2457         mem_info = &res_info[BNA_RX_RES_MEM_T_HQPT].res_u.mem_info;
2458         mem_info->mem_type = BNA_MEM_T_DMA;
2459         mem_info->len = hpage_count * sizeof(struct bna_dma_addr);
2460         mem_info->num = (hpage_count ? q_cfg->num_paths : 0);
2461
2462         res_info[BNA_RX_RES_MEM_T_HSWQPT].res_type = BNA_RES_T_MEM;
2463         mem_info = &res_info[BNA_RX_RES_MEM_T_HSWQPT].res_u.mem_info;
2464         mem_info->mem_type = BNA_MEM_T_KVA;
2465         mem_info->len = hpage_count * sizeof(void *);
2466         mem_info->num = (hpage_count ? q_cfg->num_paths : 0);
2467
2468         res_info[BNA_RX_RES_MEM_T_HPAGE].res_type = BNA_RES_T_MEM;
2469         mem_info = &res_info[BNA_RX_RES_MEM_T_HPAGE].res_u.mem_info;
2470         mem_info->mem_type = BNA_MEM_T_DMA;
2471         mem_info->len = PAGE_SIZE * hpage_count;
2472         mem_info->num = (hpage_count ? q_cfg->num_paths : 0);
2473
2474         res_info[BNA_RX_RES_MEM_T_IBIDX].res_type = BNA_RES_T_MEM;
2475         mem_info = &res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info;
2476         mem_info->mem_type = BNA_MEM_T_DMA;
2477         mem_info->len = BFI_IBIDX_SIZE;
2478         mem_info->num = q_cfg->num_paths;
2479
2480         res_info[BNA_RX_RES_MEM_T_RIT].res_type = BNA_RES_T_MEM;
2481         mem_info = &res_info[BNA_RX_RES_MEM_T_RIT].res_u.mem_info;
2482         mem_info->mem_type = BNA_MEM_T_KVA;
2483         mem_info->len = BFI_ENET_RSS_RIT_MAX;
2484         mem_info->num = 1;
2485
2486         res_info[BNA_RX_RES_T_INTR].res_type = BNA_RES_T_INTR;
2487         res_info[BNA_RX_RES_T_INTR].res_u.intr_info.intr_type = BNA_INTR_T_MSIX;
2488         res_info[BNA_RX_RES_T_INTR].res_u.intr_info.num = q_cfg->num_paths;
2489 }
2490
2491 struct bna_rx *
2492 bna_rx_create(struct bna *bna, struct bnad *bnad,
2493                 struct bna_rx_config *rx_cfg,
2494                 const struct bna_rx_event_cbfn *rx_cbfn,
2495                 struct bna_res_info *res_info,
2496                 void *priv)
2497 {
2498         struct bna_rx_mod *rx_mod = &bna->rx_mod;
2499         struct bna_rx *rx;
2500         struct bna_rxp *rxp;
2501         struct bna_rxq *q0;
2502         struct bna_rxq *q1;
2503         struct bna_intr_info *intr_info;
2504         u32 page_count;
2505         struct bna_mem_descr *ccb_mem;
2506         struct bna_mem_descr *rcb_mem;
2507         struct bna_mem_descr *unmapq_mem;
2508         struct bna_mem_descr *cqpt_mem;
2509         struct bna_mem_descr *cswqpt_mem;
2510         struct bna_mem_descr *cpage_mem;
2511         struct bna_mem_descr *hqpt_mem;
2512         struct bna_mem_descr *dqpt_mem;
2513         struct bna_mem_descr *hsqpt_mem;
2514         struct bna_mem_descr *dsqpt_mem;
2515         struct bna_mem_descr *hpage_mem;
2516         struct bna_mem_descr *dpage_mem;
2517         int i;
2518         int dpage_count, hpage_count, rcb_idx;
2519
2520         if (!bna_rx_res_check(rx_mod, rx_cfg))
2521                 return NULL;
2522
2523         intr_info = &res_info[BNA_RX_RES_T_INTR].res_u.intr_info;
2524         ccb_mem = &res_info[BNA_RX_RES_MEM_T_CCB].res_u.mem_info.mdl[0];
2525         rcb_mem = &res_info[BNA_RX_RES_MEM_T_RCB].res_u.mem_info.mdl[0];
2526         unmapq_mem = &res_info[BNA_RX_RES_MEM_T_UNMAPQ].res_u.mem_info.mdl[0];
2527         cqpt_mem = &res_info[BNA_RX_RES_MEM_T_CQPT].res_u.mem_info.mdl[0];
2528         cswqpt_mem = &res_info[BNA_RX_RES_MEM_T_CSWQPT].res_u.mem_info.mdl[0];
2529         cpage_mem = &res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_u.mem_info.mdl[0];
2530         hqpt_mem = &res_info[BNA_RX_RES_MEM_T_HQPT].res_u.mem_info.mdl[0];
2531         dqpt_mem = &res_info[BNA_RX_RES_MEM_T_DQPT].res_u.mem_info.mdl[0];
2532         hsqpt_mem = &res_info[BNA_RX_RES_MEM_T_HSWQPT].res_u.mem_info.mdl[0];
2533         dsqpt_mem = &res_info[BNA_RX_RES_MEM_T_DSWQPT].res_u.mem_info.mdl[0];
2534         hpage_mem = &res_info[BNA_RX_RES_MEM_T_HPAGE].res_u.mem_info.mdl[0];
2535         dpage_mem = &res_info[BNA_RX_RES_MEM_T_DPAGE].res_u.mem_info.mdl[0];
2536
2537         page_count = res_info[BNA_RX_RES_MEM_T_CQPT_PAGE].res_u.mem_info.len /
2538                         PAGE_SIZE;
2539
2540         dpage_count = res_info[BNA_RX_RES_MEM_T_DPAGE].res_u.mem_info.len /
2541                         PAGE_SIZE;
2542
2543         hpage_count = res_info[BNA_RX_RES_MEM_T_HPAGE].res_u.mem_info.len /
2544                         PAGE_SIZE;
2545
2546         rx = bna_rx_get(rx_mod, rx_cfg->rx_type);
2547         rx->bna = bna;
2548         rx->rx_flags = 0;
2549         INIT_LIST_HEAD(&rx->rxp_q);
2550         rx->stop_cbfn = NULL;
2551         rx->stop_cbarg = NULL;
2552         rx->priv = priv;
2553
2554         rx->rcb_setup_cbfn = rx_cbfn->rcb_setup_cbfn;
2555         rx->rcb_destroy_cbfn = rx_cbfn->rcb_destroy_cbfn;
2556         rx->ccb_setup_cbfn = rx_cbfn->ccb_setup_cbfn;
2557         rx->ccb_destroy_cbfn = rx_cbfn->ccb_destroy_cbfn;
2558         rx->rx_stall_cbfn = rx_cbfn->rx_stall_cbfn;
2559         /* Following callbacks are mandatory */
2560         rx->rx_cleanup_cbfn = rx_cbfn->rx_cleanup_cbfn;
2561         rx->rx_post_cbfn = rx_cbfn->rx_post_cbfn;
2562
2563         if (rx->bna->rx_mod.flags & BNA_RX_MOD_F_ENET_STARTED) {
2564                 switch (rx->type) {
2565                 case BNA_RX_T_REGULAR:
2566                         if (!(rx->bna->rx_mod.flags &
2567                                 BNA_RX_MOD_F_ENET_LOOPBACK))
2568                                 rx->rx_flags |= BNA_RX_F_ENET_STARTED;
2569                         break;
2570                 case BNA_RX_T_LOOPBACK:
2571                         if (rx->bna->rx_mod.flags & BNA_RX_MOD_F_ENET_LOOPBACK)
2572                                 rx->rx_flags |= BNA_RX_F_ENET_STARTED;
2573                         break;
2574                 }
2575         }
2576
2577         rx->num_paths = rx_cfg->num_paths;
2578         for (i = 0, rcb_idx = 0; i < rx->num_paths; i++) {
2579                 rxp = bna_rxp_get(rx_mod);
2580                 list_add_tail(&rxp->qe, &rx->rxp_q);
2581                 rxp->type = rx_cfg->rxp_type;
2582                 rxp->rx = rx;
2583                 rxp->cq.rx = rx;
2584
2585                 q0 = bna_rxq_get(rx_mod);
2586                 if (BNA_RXP_SINGLE == rx_cfg->rxp_type)
2587                         q1 = NULL;
2588                 else
2589                         q1 = bna_rxq_get(rx_mod);
2590
2591                 if (1 == intr_info->num)
2592                         rxp->vector = intr_info->idl[0].vector;
2593                 else
2594                         rxp->vector = intr_info->idl[i].vector;
2595
2596                 /* Setup IB */
2597
2598                 rxp->cq.ib.ib_seg_host_addr.lsb =
2599                 res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.lsb;
2600                 rxp->cq.ib.ib_seg_host_addr.msb =
2601                 res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.msb;
2602                 rxp->cq.ib.ib_seg_host_addr_kva =
2603                 res_info[BNA_RX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].kva;
2604                 rxp->cq.ib.intr_type = intr_info->intr_type;
2605                 if (intr_info->intr_type == BNA_INTR_T_MSIX)
2606                         rxp->cq.ib.intr_vector = rxp->vector;
2607                 else
2608                         rxp->cq.ib.intr_vector = (1 << rxp->vector);
2609                 rxp->cq.ib.coalescing_timeo = rx_cfg->coalescing_timeo;
2610                 rxp->cq.ib.interpkt_count = BFI_RX_INTERPKT_COUNT;
2611                 rxp->cq.ib.interpkt_timeo = BFI_RX_INTERPKT_TIMEO;
2612
2613                 bna_rxp_add_rxqs(rxp, q0, q1);
2614
2615                 /* Setup large Q */
2616
2617                 q0->rx = rx;
2618                 q0->rxp = rxp;
2619
2620                 q0->rcb = (struct bna_rcb *) rcb_mem[rcb_idx].kva;
2621                 q0->rcb->unmap_q = (void *)unmapq_mem[rcb_idx].kva;
2622                 rcb_idx++;
2623                 q0->rcb->q_depth = rx_cfg->q_depth;
2624                 q0->rcb->rxq = q0;
2625                 q0->rcb->bnad = bna->bnad;
2626                 q0->rcb->id = 0;
2627                 q0->rx_packets = q0->rx_bytes = 0;
2628                 q0->rx_packets_with_error = q0->rxbuf_alloc_failed = 0;
2629
2630                 bna_rxq_qpt_setup(q0, rxp, dpage_count, PAGE_SIZE,
2631                         &dqpt_mem[i], &dsqpt_mem[i], &dpage_mem[i]);
2632
2633                 if (rx->rcb_setup_cbfn)
2634                         rx->rcb_setup_cbfn(bnad, q0->rcb);
2635
2636                 /* Setup small Q */
2637
2638                 if (q1) {
2639                         q1->rx = rx;
2640                         q1->rxp = rxp;
2641
2642                         q1->rcb = (struct bna_rcb *) rcb_mem[rcb_idx].kva;
2643                         q1->rcb->unmap_q = (void *)unmapq_mem[rcb_idx].kva;
2644                         rcb_idx++;
2645                         q1->rcb->q_depth = rx_cfg->q_depth;
2646                         q1->rcb->rxq = q1;
2647                         q1->rcb->bnad = bna->bnad;
2648                         q1->rcb->id = 1;
2649                         q1->buffer_size = (rx_cfg->rxp_type == BNA_RXP_HDS) ?
2650                                         rx_cfg->hds_config.forced_offset
2651                                         : rx_cfg->small_buff_size;
2652                         q1->rx_packets = q1->rx_bytes = 0;
2653                         q1->rx_packets_with_error = q1->rxbuf_alloc_failed = 0;
2654
2655                         bna_rxq_qpt_setup(q1, rxp, hpage_count, PAGE_SIZE,
2656                                 &hqpt_mem[i], &hsqpt_mem[i],
2657                                 &hpage_mem[i]);
2658
2659                         if (rx->rcb_setup_cbfn)
2660                                 rx->rcb_setup_cbfn(bnad, q1->rcb);
2661                 }
2662
2663                 /* Setup CQ */
2664
2665                 rxp->cq.ccb = (struct bna_ccb *) ccb_mem[i].kva;
2666                 rxp->cq.ccb->q_depth =  rx_cfg->q_depth +
2667                                         ((rx_cfg->rxp_type == BNA_RXP_SINGLE) ?
2668                                         0 : rx_cfg->q_depth);
2669                 rxp->cq.ccb->cq = &rxp->cq;
2670                 rxp->cq.ccb->rcb[0] = q0->rcb;
2671                 q0->rcb->ccb = rxp->cq.ccb;
2672                 if (q1) {
2673                         rxp->cq.ccb->rcb[1] = q1->rcb;
2674                         q1->rcb->ccb = rxp->cq.ccb;
2675                 }
2676                 rxp->cq.ccb->hw_producer_index =
2677                         (u32 *)rxp->cq.ib.ib_seg_host_addr_kva;
2678                 rxp->cq.ccb->i_dbell = &rxp->cq.ib.door_bell;
2679                 rxp->cq.ccb->intr_type = rxp->cq.ib.intr_type;
2680                 rxp->cq.ccb->intr_vector = rxp->cq.ib.intr_vector;
2681                 rxp->cq.ccb->rx_coalescing_timeo =
2682                         rxp->cq.ib.coalescing_timeo;
2683                 rxp->cq.ccb->pkt_rate.small_pkt_cnt = 0;
2684                 rxp->cq.ccb->pkt_rate.large_pkt_cnt = 0;
2685                 rxp->cq.ccb->bnad = bna->bnad;
2686                 rxp->cq.ccb->id = i;
2687
2688                 bna_rxp_cqpt_setup(rxp, page_count, PAGE_SIZE,
2689                         &cqpt_mem[i], &cswqpt_mem[i], &cpage_mem[i]);
2690
2691                 if (rx->ccb_setup_cbfn)
2692                         rx->ccb_setup_cbfn(bnad, rxp->cq.ccb);
2693         }
2694
2695         rx->hds_cfg = rx_cfg->hds_config;
2696
2697         bna_rxf_init(&rx->rxf, rx, rx_cfg, res_info);
2698
2699         bfa_fsm_set_state(rx, bna_rx_sm_stopped);
2700
2701         rx_mod->rid_mask |= (1 << rx->rid);
2702
2703         return rx;
2704 }
2705
2706 void
2707 bna_rx_destroy(struct bna_rx *rx)
2708 {
2709         struct bna_rx_mod *rx_mod = &rx->bna->rx_mod;
2710         struct bna_rxq *q0 = NULL;
2711         struct bna_rxq *q1 = NULL;
2712         struct bna_rxp *rxp;
2713         struct list_head *qe;
2714
2715         bna_rxf_uninit(&rx->rxf);
2716
2717         while (!list_empty(&rx->rxp_q)) {
2718                 bfa_q_deq(&rx->rxp_q, &rxp);
2719                 GET_RXQS(rxp, q0, q1);
2720                 if (rx->rcb_destroy_cbfn)
2721                         rx->rcb_destroy_cbfn(rx->bna->bnad, q0->rcb);
2722                 q0->rcb = NULL;
2723                 q0->rxp = NULL;
2724                 q0->rx = NULL;
2725                 bna_rxq_put(rx_mod, q0);
2726
2727                 if (q1) {
2728                         if (rx->rcb_destroy_cbfn)
2729                                 rx->rcb_destroy_cbfn(rx->bna->bnad, q1->rcb);
2730                         q1->rcb = NULL;
2731                         q1->rxp = NULL;
2732                         q1->rx = NULL;
2733                         bna_rxq_put(rx_mod, q1);
2734                 }
2735                 rxp->rxq.slr.large = NULL;
2736                 rxp->rxq.slr.small = NULL;
2737
2738                 if (rx->ccb_destroy_cbfn)
2739                         rx->ccb_destroy_cbfn(rx->bna->bnad, rxp->cq.ccb);
2740                 rxp->cq.ccb = NULL;
2741                 rxp->rx = NULL;
2742                 bna_rxp_put(rx_mod, rxp);
2743         }
2744
2745         list_for_each(qe, &rx_mod->rx_active_q) {
2746                 if (qe == &rx->qe) {
2747                         list_del(&rx->qe);
2748                         bfa_q_qe_init(&rx->qe);
2749                         break;
2750                 }
2751         }
2752
2753         rx_mod->rid_mask &= ~(1 << rx->rid);
2754
2755         rx->bna = NULL;
2756         rx->priv = NULL;
2757         bna_rx_put(rx_mod, rx);
2758 }
2759
2760 void
2761 bna_rx_enable(struct bna_rx *rx)
2762 {
2763         if (rx->fsm != (bfa_sm_t)bna_rx_sm_stopped)
2764                 return;
2765
2766         rx->rx_flags |= BNA_RX_F_ENABLED;
2767         if (rx->rx_flags & BNA_RX_F_ENET_STARTED)
2768                 bfa_fsm_send_event(rx, RX_E_START);
2769 }
2770
2771 void
2772 bna_rx_disable(struct bna_rx *rx, enum bna_cleanup_type type,
2773                 void (*cbfn)(void *, struct bna_rx *))
2774 {
2775         if (type == BNA_SOFT_CLEANUP) {
2776                 /* h/w should not be accessed. Treat we're stopped */
2777                 (*cbfn)(rx->bna->bnad, rx);
2778         } else {
2779                 rx->stop_cbfn = cbfn;
2780                 rx->stop_cbarg = rx->bna->bnad;
2781
2782                 rx->rx_flags &= ~BNA_RX_F_ENABLED;
2783
2784                 bfa_fsm_send_event(rx, RX_E_STOP);
2785         }
2786 }
2787
2788 void
2789 bna_rx_cleanup_complete(struct bna_rx *rx)
2790 {
2791         bfa_fsm_send_event(rx, RX_E_CLEANUP_DONE);
2792 }
2793
2794 void
2795 bna_rx_vlan_strip_enable(struct bna_rx *rx)
2796 {
2797         struct bna_rxf *rxf = &rx->rxf;
2798
2799         if (rxf->vlan_strip_status == BNA_STATUS_T_DISABLED) {
2800                 rxf->vlan_strip_status = BNA_STATUS_T_ENABLED;
2801                 rxf->vlan_strip_pending = true;
2802                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2803         }
2804 }
2805
2806 void
2807 bna_rx_vlan_strip_disable(struct bna_rx *rx)
2808 {
2809         struct bna_rxf *rxf = &rx->rxf;
2810
2811         if (rxf->vlan_strip_status != BNA_STATUS_T_DISABLED) {
2812                 rxf->vlan_strip_status = BNA_STATUS_T_DISABLED;
2813                 rxf->vlan_strip_pending = true;
2814                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2815         }
2816 }
2817
2818 enum bna_cb_status
2819 bna_rx_mode_set(struct bna_rx *rx, enum bna_rxmode new_mode,
2820                 enum bna_rxmode bitmask,
2821                 void (*cbfn)(struct bnad *, struct bna_rx *))
2822 {
2823         struct bna_rxf *rxf = &rx->rxf;
2824         int need_hw_config = 0;
2825
2826         /* Error checks */
2827
2828         if (is_promisc_enable(new_mode, bitmask)) {
2829                 /* If promisc mode is already enabled elsewhere in the system */
2830                 if ((rx->bna->promisc_rid != BFI_INVALID_RID) &&
2831                         (rx->bna->promisc_rid != rxf->rx->rid))
2832                         goto err_return;
2833
2834                 /* If default mode is already enabled in the system */
2835                 if (rx->bna->default_mode_rid != BFI_INVALID_RID)
2836                         goto err_return;
2837
2838                 /* Trying to enable promiscuous and default mode together */
2839                 if (is_default_enable(new_mode, bitmask))
2840                         goto err_return;
2841         }
2842
2843         if (is_default_enable(new_mode, bitmask)) {
2844                 /* If default mode is already enabled elsewhere in the system */
2845                 if ((rx->bna->default_mode_rid != BFI_INVALID_RID) &&
2846                         (rx->bna->default_mode_rid != rxf->rx->rid)) {
2847                                 goto err_return;
2848                 }
2849
2850                 /* If promiscuous mode is already enabled in the system */
2851                 if (rx->bna->promisc_rid != BFI_INVALID_RID)
2852                         goto err_return;
2853         }
2854
2855         /* Process the commands */
2856
2857         if (is_promisc_enable(new_mode, bitmask)) {
2858                 if (bna_rxf_promisc_enable(rxf))
2859                         need_hw_config = 1;
2860         } else if (is_promisc_disable(new_mode, bitmask)) {
2861                 if (bna_rxf_promisc_disable(rxf))
2862                         need_hw_config = 1;
2863         }
2864
2865         if (is_allmulti_enable(new_mode, bitmask)) {
2866                 if (bna_rxf_allmulti_enable(rxf))
2867                         need_hw_config = 1;
2868         } else if (is_allmulti_disable(new_mode, bitmask)) {
2869                 if (bna_rxf_allmulti_disable(rxf))
2870                         need_hw_config = 1;
2871         }
2872
2873         /* Trigger h/w if needed */
2874
2875         if (need_hw_config) {
2876                 rxf->cam_fltr_cbfn = cbfn;
2877                 rxf->cam_fltr_cbarg = rx->bna->bnad;
2878                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2879         } else if (cbfn)
2880                 (*cbfn)(rx->bna->bnad, rx);
2881
2882         return BNA_CB_SUCCESS;
2883
2884 err_return:
2885         return BNA_CB_FAIL;
2886 }
2887
2888 void
2889 bna_rx_vlanfilter_enable(struct bna_rx *rx)
2890 {
2891         struct bna_rxf *rxf = &rx->rxf;
2892
2893         if (rxf->vlan_filter_status == BNA_STATUS_T_DISABLED) {
2894                 rxf->vlan_filter_status = BNA_STATUS_T_ENABLED;
2895                 rxf->vlan_pending_bitmask = (u8)BFI_VLAN_BMASK_ALL;
2896                 bfa_fsm_send_event(rxf, RXF_E_CONFIG);
2897         }
2898 }
2899
2900 void
2901 bna_rx_coalescing_timeo_set(struct bna_rx *rx, int coalescing_timeo)
2902 {
2903         struct bna_rxp *rxp;
2904         struct list_head *qe;
2905
2906         list_for_each(qe, &rx->rxp_q) {
2907                 rxp = (struct bna_rxp *)qe;
2908                 rxp->cq.ccb->rx_coalescing_timeo = coalescing_timeo;
2909                 bna_ib_coalescing_timeo_set(&rxp->cq.ib, coalescing_timeo);
2910         }
2911 }
2912
2913 void
2914 bna_rx_dim_reconfig(struct bna *bna, const u32 vector[][BNA_BIAS_T_MAX])
2915 {
2916         int i, j;
2917
2918         for (i = 0; i < BNA_LOAD_T_MAX; i++)
2919                 for (j = 0; j < BNA_BIAS_T_MAX; j++)
2920                         bna->rx_mod.dim_vector[i][j] = vector[i][j];
2921 }
2922
2923 void
2924 bna_rx_dim_update(struct bna_ccb *ccb)
2925 {
2926         struct bna *bna = ccb->cq->rx->bna;
2927         u32 load, bias;
2928         u32 pkt_rt, small_rt, large_rt;
2929         u8 coalescing_timeo;
2930
2931         if ((ccb->pkt_rate.small_pkt_cnt == 0) &&
2932                 (ccb->pkt_rate.large_pkt_cnt == 0))
2933                 return;
2934
2935         /* Arrive at preconfigured coalescing timeo value based on pkt rate */
2936
2937         small_rt = ccb->pkt_rate.small_pkt_cnt;
2938         large_rt = ccb->pkt_rate.large_pkt_cnt;
2939
2940         pkt_rt = small_rt + large_rt;
2941
2942         if (pkt_rt < BNA_PKT_RATE_10K)
2943                 load = BNA_LOAD_T_LOW_4;
2944         else if (pkt_rt < BNA_PKT_RATE_20K)
2945                 load = BNA_LOAD_T_LOW_3;
2946         else if (pkt_rt < BNA_PKT_RATE_30K)
2947                 load = BNA_LOAD_T_LOW_2;
2948         else if (pkt_rt < BNA_PKT_RATE_40K)
2949                 load = BNA_LOAD_T_LOW_1;
2950         else if (pkt_rt < BNA_PKT_RATE_50K)
2951                 load = BNA_LOAD_T_HIGH_1;
2952         else if (pkt_rt < BNA_PKT_RATE_60K)
2953                 load = BNA_LOAD_T_HIGH_2;
2954         else if (pkt_rt < BNA_PKT_RATE_80K)
2955                 load = BNA_LOAD_T_HIGH_3;
2956         else
2957                 load = BNA_LOAD_T_HIGH_4;
2958
2959         if (small_rt > (large_rt << 1))
2960                 bias = 0;
2961         else
2962                 bias = 1;
2963
2964         ccb->pkt_rate.small_pkt_cnt = 0;
2965         ccb->pkt_rate.large_pkt_cnt = 0;
2966
2967         coalescing_timeo = bna->rx_mod.dim_vector[load][bias];
2968         ccb->rx_coalescing_timeo = coalescing_timeo;
2969
2970         /* Set it to IB */
2971         bna_ib_coalescing_timeo_set(&ccb->cq->ib, coalescing_timeo);
2972 }
2973
2974 const u32 bna_napi_dim_vector[BNA_LOAD_T_MAX][BNA_BIAS_T_MAX] = {
2975         {12, 12},
2976         {6, 10},
2977         {5, 10},
2978         {4, 8},
2979         {3, 6},
2980         {3, 6},
2981         {2, 4},
2982         {1, 2},
2983 };
2984
2985 /* TX */
2986
2987 #define call_tx_stop_cbfn(tx)                                           \
2988 do {                                                                    \
2989         if ((tx)->stop_cbfn) {                                          \
2990                 void (*cbfn)(void *, struct bna_tx *);          \
2991                 void *cbarg;                                            \
2992                 cbfn = (tx)->stop_cbfn;                                 \
2993                 cbarg = (tx)->stop_cbarg;                               \
2994                 (tx)->stop_cbfn = NULL;                                 \
2995                 (tx)->stop_cbarg = NULL;                                \
2996                 cbfn(cbarg, (tx));                                      \
2997         }                                                               \
2998 } while (0)
2999
3000 #define call_tx_prio_change_cbfn(tx)                                    \
3001 do {                                                                    \
3002         if ((tx)->prio_change_cbfn) {                                   \
3003                 void (*cbfn)(struct bnad *, struct bna_tx *);   \
3004                 cbfn = (tx)->prio_change_cbfn;                          \
3005                 (tx)->prio_change_cbfn = NULL;                          \
3006                 cbfn((tx)->bna->bnad, (tx));                            \
3007         }                                                               \
3008 } while (0)
3009
3010 static void bna_tx_mod_cb_tx_stopped(void *tx_mod, struct bna_tx *tx);
3011 static void bna_bfi_tx_enet_start(struct bna_tx *tx);
3012 static void bna_tx_enet_stop(struct bna_tx *tx);
3013
3014 enum bna_tx_event {
3015         TX_E_START                      = 1,
3016         TX_E_STOP                       = 2,
3017         TX_E_FAIL                       = 3,
3018         TX_E_STARTED                    = 4,
3019         TX_E_STOPPED                    = 5,
3020         TX_E_PRIO_CHANGE                = 6,
3021         TX_E_CLEANUP_DONE               = 7,
3022         TX_E_BW_UPDATE                  = 8,
3023 };
3024
3025 bfa_fsm_state_decl(bna_tx, stopped, struct bna_tx, enum bna_tx_event);
3026 bfa_fsm_state_decl(bna_tx, start_wait, struct bna_tx, enum bna_tx_event);
3027 bfa_fsm_state_decl(bna_tx, started, struct bna_tx, enum bna_tx_event);
3028 bfa_fsm_state_decl(bna_tx, stop_wait, struct bna_tx, enum bna_tx_event);
3029 bfa_fsm_state_decl(bna_tx, cleanup_wait, struct bna_tx,
3030                         enum bna_tx_event);
3031 bfa_fsm_state_decl(bna_tx, prio_stop_wait, struct bna_tx,
3032                         enum bna_tx_event);
3033 bfa_fsm_state_decl(bna_tx, prio_cleanup_wait, struct bna_tx,
3034                         enum bna_tx_event);
3035 bfa_fsm_state_decl(bna_tx, failed, struct bna_tx, enum bna_tx_event);
3036 bfa_fsm_state_decl(bna_tx, quiesce_wait, struct bna_tx,
3037                         enum bna_tx_event);
3038
3039 static void
3040 bna_tx_sm_stopped_entry(struct bna_tx *tx)
3041 {
3042         call_tx_stop_cbfn(tx);
3043 }
3044
3045 static void
3046 bna_tx_sm_stopped(struct bna_tx *tx, enum bna_tx_event event)
3047 {
3048         switch (event) {
3049         case TX_E_START:
3050                 bfa_fsm_set_state(tx, bna_tx_sm_start_wait);
3051                 break;
3052
3053         case TX_E_STOP:
3054                 call_tx_stop_cbfn(tx);
3055                 break;
3056
3057         case TX_E_FAIL:
3058                 /* No-op */
3059                 break;
3060
3061         case TX_E_PRIO_CHANGE:
3062                 call_tx_prio_change_cbfn(tx);
3063                 break;
3064
3065         case TX_E_BW_UPDATE:
3066                 /* No-op */
3067                 break;
3068
3069         default:
3070                 bfa_sm_fault(event);
3071         }
3072 }
3073
3074 static void
3075 bna_tx_sm_start_wait_entry(struct bna_tx *tx)
3076 {
3077         bna_bfi_tx_enet_start(tx);
3078 }
3079
3080 static void
3081 bna_tx_sm_start_wait(struct bna_tx *tx, enum bna_tx_event event)
3082 {
3083         switch (event) {
3084         case TX_E_STOP:
3085                 tx->flags &= ~(BNA_TX_F_PRIO_CHANGED | BNA_TX_F_BW_UPDATED);
3086                 bfa_fsm_set_state(tx, bna_tx_sm_stop_wait);
3087                 break;
3088
3089         case TX_E_FAIL:
3090                 tx->flags &= ~(BNA_TX_F_PRIO_CHANGED | BNA_TX_F_BW_UPDATED);
3091                 bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3092                 break;
3093
3094         case TX_E_STARTED:
3095                 if (tx->flags & (BNA_TX_F_PRIO_CHANGED | BNA_TX_F_BW_UPDATED)) {
3096                         tx->flags &= ~(BNA_TX_F_PRIO_CHANGED |
3097                                 BNA_TX_F_BW_UPDATED);
3098                         bfa_fsm_set_state(tx, bna_tx_sm_prio_stop_wait);
3099                 } else
3100                         bfa_fsm_set_state(tx, bna_tx_sm_started);
3101                 break;
3102
3103         case TX_E_PRIO_CHANGE:
3104                 tx->flags |=  BNA_TX_F_PRIO_CHANGED;
3105                 break;
3106
3107         case TX_E_BW_UPDATE:
3108                 tx->flags |= BNA_TX_F_BW_UPDATED;
3109                 break;
3110
3111         default:
3112                 bfa_sm_fault(event);
3113         }
3114 }
3115
3116 static void
3117 bna_tx_sm_started_entry(struct bna_tx *tx)
3118 {
3119         struct bna_txq *txq;
3120         struct list_head                 *qe;
3121         int is_regular = (tx->type == BNA_TX_T_REGULAR);
3122
3123         list_for_each(qe, &tx->txq_q) {
3124                 txq = (struct bna_txq *)qe;
3125                 txq->tcb->priority = txq->priority;
3126                 /* Start IB */
3127                 bna_ib_start(tx->bna, &txq->ib, is_regular);
3128         }
3129         tx->tx_resume_cbfn(tx->bna->bnad, tx);
3130 }
3131
3132 static void
3133 bna_tx_sm_started(struct bna_tx *tx, enum bna_tx_event event)
3134 {
3135         switch (event) {
3136         case TX_E_STOP:
3137                 bfa_fsm_set_state(tx, bna_tx_sm_stop_wait);
3138                 tx->tx_stall_cbfn(tx->bna->bnad, tx);
3139                 bna_tx_enet_stop(tx);
3140                 break;
3141
3142         case TX_E_FAIL:
3143                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3144                 tx->tx_stall_cbfn(tx->bna->bnad, tx);
3145                 tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3146                 break;
3147
3148         case TX_E_PRIO_CHANGE:
3149         case TX_E_BW_UPDATE:
3150                 bfa_fsm_set_state(tx, bna_tx_sm_prio_stop_wait);
3151                 break;
3152
3153         default:
3154                 bfa_sm_fault(event);
3155         }
3156 }
3157
3158 static void
3159 bna_tx_sm_stop_wait_entry(struct bna_tx *tx)
3160 {
3161 }
3162
3163 static void
3164 bna_tx_sm_stop_wait(struct bna_tx *tx, enum bna_tx_event event)
3165 {
3166         switch (event) {
3167         case TX_E_FAIL:
3168         case TX_E_STOPPED:
3169                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3170                 tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3171                 break;
3172
3173         case TX_E_STARTED:
3174                 /**
3175                  * We are here due to start_wait -> stop_wait transition on
3176                  * TX_E_STOP event
3177                  */
3178                 bna_tx_enet_stop(tx);
3179                 break;
3180
3181         case TX_E_PRIO_CHANGE:
3182         case TX_E_BW_UPDATE:
3183                 /* No-op */
3184                 break;
3185
3186         default:
3187                 bfa_sm_fault(event);
3188         }
3189 }
3190
3191 static void
3192 bna_tx_sm_cleanup_wait_entry(struct bna_tx *tx)
3193 {
3194 }
3195
3196 static void
3197 bna_tx_sm_cleanup_wait(struct bna_tx *tx, enum bna_tx_event event)
3198 {
3199         switch (event) {
3200         case TX_E_FAIL:
3201         case TX_E_PRIO_CHANGE:
3202         case TX_E_BW_UPDATE:
3203                 /* No-op */
3204                 break;
3205
3206         case TX_E_CLEANUP_DONE:
3207                 bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3208                 break;
3209
3210         default:
3211                 bfa_sm_fault(event);
3212         }
3213 }
3214
3215 static void
3216 bna_tx_sm_prio_stop_wait_entry(struct bna_tx *tx)
3217 {
3218         tx->tx_stall_cbfn(tx->bna->bnad, tx);
3219         bna_tx_enet_stop(tx);
3220 }
3221
3222 static void
3223 bna_tx_sm_prio_stop_wait(struct bna_tx *tx, enum bna_tx_event event)
3224 {
3225         switch (event) {
3226         case TX_E_STOP:
3227                 bfa_fsm_set_state(tx, bna_tx_sm_stop_wait);
3228                 break;
3229
3230         case TX_E_FAIL:
3231                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3232                 call_tx_prio_change_cbfn(tx);
3233                 tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3234                 break;
3235
3236         case TX_E_STOPPED:
3237                 bfa_fsm_set_state(tx, bna_tx_sm_prio_cleanup_wait);
3238                 break;
3239
3240         case TX_E_PRIO_CHANGE:
3241         case TX_E_BW_UPDATE:
3242                 /* No-op */
3243                 break;
3244
3245         default:
3246                 bfa_sm_fault(event);
3247         }
3248 }
3249
3250 static void
3251 bna_tx_sm_prio_cleanup_wait_entry(struct bna_tx *tx)
3252 {
3253         call_tx_prio_change_cbfn(tx);
3254         tx->tx_cleanup_cbfn(tx->bna->bnad, tx);
3255 }
3256
3257 static void
3258 bna_tx_sm_prio_cleanup_wait(struct bna_tx *tx, enum bna_tx_event event)
3259 {
3260         switch (event) {
3261         case TX_E_STOP:
3262                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3263                 break;
3264
3265         case TX_E_FAIL:
3266                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3267                 break;
3268
3269         case TX_E_PRIO_CHANGE:
3270         case TX_E_BW_UPDATE:
3271                 /* No-op */
3272                 break;
3273
3274         case TX_E_CLEANUP_DONE:
3275                 bfa_fsm_set_state(tx, bna_tx_sm_start_wait);
3276                 break;
3277
3278         default:
3279                 bfa_sm_fault(event);
3280         }
3281 }
3282
3283 static void
3284 bna_tx_sm_failed_entry(struct bna_tx *tx)
3285 {
3286 }
3287
3288 static void
3289 bna_tx_sm_failed(struct bna_tx *tx, enum bna_tx_event event)
3290 {
3291         switch (event) {
3292         case TX_E_START:
3293                 bfa_fsm_set_state(tx, bna_tx_sm_quiesce_wait);
3294                 break;
3295
3296         case TX_E_STOP:
3297                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3298                 break;
3299
3300         case TX_E_FAIL:
3301                 /* No-op */
3302                 break;
3303
3304         case TX_E_CLEANUP_DONE:
3305                 bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3306                 break;
3307
3308         default:
3309                 bfa_sm_fault(event);
3310         }
3311 }
3312
3313 static void
3314 bna_tx_sm_quiesce_wait_entry(struct bna_tx *tx)
3315 {
3316 }
3317
3318 static void
3319 bna_tx_sm_quiesce_wait(struct bna_tx *tx, enum bna_tx_event event)
3320 {
3321         switch (event) {
3322         case TX_E_STOP:
3323                 bfa_fsm_set_state(tx, bna_tx_sm_cleanup_wait);
3324                 break;
3325
3326         case TX_E_FAIL:
3327                 bfa_fsm_set_state(tx, bna_tx_sm_failed);
3328                 break;
3329
3330         case TX_E_CLEANUP_DONE:
3331                 bfa_fsm_set_state(tx, bna_tx_sm_start_wait);
3332                 break;
3333
3334         case TX_E_BW_UPDATE:
3335                 /* No-op */
3336                 break;
3337
3338         default:
3339                 bfa_sm_fault(event);
3340         }
3341 }
3342
3343 static void
3344 bna_bfi_tx_enet_start(struct bna_tx *tx)
3345 {
3346         struct bfi_enet_tx_cfg_req *cfg_req = &tx->bfi_enet_cmd.cfg_req;
3347         struct bna_txq *txq = NULL;
3348         struct list_head *qe;
3349         int i;
3350
3351         bfi_msgq_mhdr_set(cfg_req->mh, BFI_MC_ENET,
3352                 BFI_ENET_H2I_TX_CFG_SET_REQ, 0, tx->rid);
3353         cfg_req->mh.num_entries = htons(
3354                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_tx_cfg_req)));
3355
3356         cfg_req->num_queues = tx->num_txq;
3357         for (i = 0, qe = bfa_q_first(&tx->txq_q);
3358                 i < tx->num_txq;
3359                 i++, qe = bfa_q_next(qe)) {
3360                 txq = (struct bna_txq *)qe;
3361
3362                 bfi_enet_datapath_q_init(&cfg_req->q_cfg[i].q.q, &txq->qpt);
3363                 cfg_req->q_cfg[i].q.priority = txq->priority;
3364
3365                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_lo =
3366                         txq->ib.ib_seg_host_addr.lsb;
3367                 cfg_req->q_cfg[i].ib.index_addr.a32.addr_hi =
3368                         txq->ib.ib_seg_host_addr.msb;
3369                 cfg_req->q_cfg[i].ib.intr.msix_index =
3370                         htons((u16)txq->ib.intr_vector);
3371         }
3372
3373         cfg_req->ib_cfg.int_pkt_dma = BNA_STATUS_T_ENABLED;
3374         cfg_req->ib_cfg.int_enabled = BNA_STATUS_T_ENABLED;
3375         cfg_req->ib_cfg.int_pkt_enabled = BNA_STATUS_T_DISABLED;
3376         cfg_req->ib_cfg.continuous_coalescing = BNA_STATUS_T_ENABLED;
3377         cfg_req->ib_cfg.msix = (txq->ib.intr_type == BNA_INTR_T_MSIX)
3378                                 ? BNA_STATUS_T_ENABLED : BNA_STATUS_T_DISABLED;
3379         cfg_req->ib_cfg.coalescing_timeout =
3380                         htonl((u32)txq->ib.coalescing_timeo);
3381         cfg_req->ib_cfg.inter_pkt_timeout =
3382                         htonl((u32)txq->ib.interpkt_timeo);
3383         cfg_req->ib_cfg.inter_pkt_count = (u8)txq->ib.interpkt_count;
3384
3385         cfg_req->tx_cfg.vlan_mode = BFI_ENET_TX_VLAN_WI;
3386         cfg_req->tx_cfg.vlan_id = htons((u16)tx->txf_vlan_id);
3387         cfg_req->tx_cfg.admit_tagged_frame = BNA_STATUS_T_DISABLED;
3388         cfg_req->tx_cfg.apply_vlan_filter = BNA_STATUS_T_DISABLED;
3389
3390         bfa_msgq_cmd_set(&tx->msgq_cmd, NULL, NULL,
3391                 sizeof(struct bfi_enet_tx_cfg_req), &cfg_req->mh);
3392         bfa_msgq_cmd_post(&tx->bna->msgq, &tx->msgq_cmd);
3393 }
3394
3395 static void
3396 bna_bfi_tx_enet_stop(struct bna_tx *tx)
3397 {
3398         struct bfi_enet_req *req = &tx->bfi_enet_cmd.req;
3399
3400         bfi_msgq_mhdr_set(req->mh, BFI_MC_ENET,
3401                 BFI_ENET_H2I_TX_CFG_CLR_REQ, 0, tx->rid);
3402         req->mh.num_entries = htons(
3403                 bfi_msgq_num_cmd_entries(sizeof(struct bfi_enet_req)));
3404         bfa_msgq_cmd_set(&tx->msgq_cmd, NULL, NULL, sizeof(struct bfi_enet_req),
3405                 &req->mh);
3406         bfa_msgq_cmd_post(&tx->bna->msgq, &tx->msgq_cmd);
3407 }
3408
3409 static void
3410 bna_tx_enet_stop(struct bna_tx *tx)
3411 {
3412         struct bna_txq *txq;
3413         struct list_head                 *qe;
3414
3415         /* Stop IB */
3416         list_for_each(qe, &tx->txq_q) {
3417                 txq = (struct bna_txq *)qe;
3418                 bna_ib_stop(tx->bna, &txq->ib);
3419         }
3420
3421         bna_bfi_tx_enet_stop(tx);
3422 }
3423
3424 static void
3425 bna_txq_qpt_setup(struct bna_txq *txq, int page_count, int page_size,
3426                 struct bna_mem_descr *qpt_mem,
3427                 struct bna_mem_descr *swqpt_mem,
3428                 struct bna_mem_descr *page_mem)
3429 {
3430         u8 *kva;
3431         u64 dma;
3432         struct bna_dma_addr bna_dma;
3433         int i;
3434
3435         txq->qpt.hw_qpt_ptr.lsb = qpt_mem->dma.lsb;
3436         txq->qpt.hw_qpt_ptr.msb = qpt_mem->dma.msb;
3437         txq->qpt.kv_qpt_ptr = qpt_mem->kva;
3438         txq->qpt.page_count = page_count;
3439         txq->qpt.page_size = page_size;
3440
3441         txq->tcb->sw_qpt = (void **) swqpt_mem->kva;
3442         txq->tcb->sw_q = page_mem->kva;
3443
3444         kva = page_mem->kva;
3445         BNA_GET_DMA_ADDR(&page_mem->dma, dma);
3446
3447         for (i = 0; i < page_count; i++) {
3448                 txq->tcb->sw_qpt[i] = kva;
3449                 kva += PAGE_SIZE;
3450
3451                 BNA_SET_DMA_ADDR(dma, &bna_dma);
3452                 ((struct bna_dma_addr *)txq->qpt.kv_qpt_ptr)[i].lsb =
3453                         bna_dma.lsb;
3454                 ((struct bna_dma_addr *)txq->qpt.kv_qpt_ptr)[i].msb =
3455                         bna_dma.msb;
3456                 dma += PAGE_SIZE;
3457         }
3458 }
3459
3460 static struct bna_tx *
3461 bna_tx_get(struct bna_tx_mod *tx_mod, enum bna_tx_type type)
3462 {
3463         struct list_head        *qe = NULL;
3464         struct bna_tx *tx = NULL;
3465
3466         if (list_empty(&tx_mod->tx_free_q))
3467                 return NULL;
3468         if (type == BNA_TX_T_REGULAR) {
3469                 bfa_q_deq(&tx_mod->tx_free_q, &qe);
3470         } else {
3471                 bfa_q_deq_tail(&tx_mod->tx_free_q, &qe);
3472         }
3473         tx = (struct bna_tx *)qe;
3474         bfa_q_qe_init(&tx->qe);
3475         tx->type = type;
3476
3477         return tx;
3478 }
3479
3480 static void
3481 bna_tx_free(struct bna_tx *tx)
3482 {
3483         struct bna_tx_mod *tx_mod = &tx->bna->tx_mod;
3484         struct bna_txq *txq;
3485         struct list_head *prev_qe;
3486         struct list_head *qe;
3487
3488         while (!list_empty(&tx->txq_q)) {
3489                 bfa_q_deq(&tx->txq_q, &txq);
3490                 bfa_q_qe_init(&txq->qe);
3491                 txq->tcb = NULL;
3492                 txq->tx = NULL;
3493                 list_add_tail(&txq->qe, &tx_mod->txq_free_q);
3494         }
3495
3496         list_for_each(qe, &tx_mod->tx_active_q) {
3497                 if (qe == &tx->qe) {
3498                         list_del(&tx->qe);
3499                         bfa_q_qe_init(&tx->qe);
3500                         break;
3501                 }
3502         }
3503
3504         tx->bna = NULL;
3505         tx->priv = NULL;
3506
3507         prev_qe = NULL;
3508         list_for_each(qe, &tx_mod->tx_free_q) {
3509                 if (((struct bna_tx *)qe)->rid < tx->rid)
3510                         prev_qe = qe;
3511                 else {
3512                         break;
3513                 }
3514         }
3515
3516         if (prev_qe == NULL) {
3517                 /* This is the first entry */
3518                 bfa_q_enq_head(&tx_mod->tx_free_q, &tx->qe);
3519         } else if (bfa_q_next(prev_qe) == &tx_mod->tx_free_q) {
3520                 /* This is the last entry */
3521                 list_add_tail(&tx->qe, &tx_mod->tx_free_q);
3522         } else {
3523                 /* Somewhere in the middle */
3524                 bfa_q_next(&tx->qe) = bfa_q_next(prev_qe);
3525                 bfa_q_prev(&tx->qe) = prev_qe;
3526                 bfa_q_next(prev_qe) = &tx->qe;
3527                 bfa_q_prev(bfa_q_next(&tx->qe)) = &tx->qe;
3528         }
3529 }
3530
3531 static void
3532 bna_tx_start(struct bna_tx *tx)
3533 {
3534         tx->flags |= BNA_TX_F_ENET_STARTED;
3535         if (tx->flags & BNA_TX_F_ENABLED)
3536                 bfa_fsm_send_event(tx, TX_E_START);
3537 }
3538
3539 static void
3540 bna_tx_stop(struct bna_tx *tx)
3541 {
3542         tx->stop_cbfn = bna_tx_mod_cb_tx_stopped;
3543         tx->stop_cbarg = &tx->bna->tx_mod;
3544
3545         tx->flags &= ~BNA_TX_F_ENET_STARTED;
3546         bfa_fsm_send_event(tx, TX_E_STOP);
3547 }
3548
3549 static void
3550 bna_tx_fail(struct bna_tx *tx)
3551 {
3552         tx->flags &= ~BNA_TX_F_ENET_STARTED;
3553         bfa_fsm_send_event(tx, TX_E_FAIL);
3554 }
3555
3556 void
3557 bna_bfi_tx_enet_start_rsp(struct bna_tx *tx, struct bfi_msgq_mhdr *msghdr)
3558 {
3559         struct bfi_enet_tx_cfg_rsp *cfg_rsp = &tx->bfi_enet_cmd.cfg_rsp;
3560         struct bna_txq *txq = NULL;
3561         struct list_head *qe;
3562         int i;
3563
3564         bfa_msgq_rsp_copy(&tx->bna->msgq, (u8 *)cfg_rsp,
3565                 sizeof(struct bfi_enet_tx_cfg_rsp));
3566
3567         tx->hw_id = cfg_rsp->hw_id;
3568
3569         for (i = 0, qe = bfa_q_first(&tx->txq_q);
3570                 i < tx->num_txq; i++, qe = bfa_q_next(qe)) {
3571                 txq = (struct bna_txq *)qe;
3572
3573                 /* Setup doorbells */
3574                 txq->tcb->i_dbell->doorbell_addr =
3575                         tx->bna->pcidev.pci_bar_kva
3576                         + ntohl(cfg_rsp->q_handles[i].i_dbell);
3577                 txq->tcb->q_dbell =
3578                         tx->bna->pcidev.pci_bar_kva
3579                         + ntohl(cfg_rsp->q_handles[i].q_dbell);
3580                 txq->hw_id = cfg_rsp->q_handles[i].hw_qid;
3581
3582                 /* Initialize producer/consumer indexes */
3583                 (*txq->tcb->hw_consumer_index) = 0;
3584                 txq->tcb->producer_index = txq->tcb->consumer_index = 0;
3585         }
3586
3587         bfa_fsm_send_event(tx, TX_E_STARTED);
3588 }
3589
3590 void
3591 bna_bfi_tx_enet_stop_rsp(struct bna_tx *tx, struct bfi_msgq_mhdr *msghdr)
3592 {
3593         bfa_fsm_send_event(tx, TX_E_STOPPED);
3594 }
3595
3596 void
3597 bna_bfi_bw_update_aen(struct bna_tx_mod *tx_mod)
3598 {
3599         struct bna_tx *tx;
3600         struct list_head                *qe;
3601
3602         list_for_each(qe, &tx_mod->tx_active_q) {
3603                 tx = (struct bna_tx *)qe;
3604                 bfa_fsm_send_event(tx, TX_E_BW_UPDATE);
3605         }
3606 }
3607
3608 void
3609 bna_tx_res_req(int num_txq, int txq_depth, struct bna_res_info *res_info)
3610 {
3611         u32 q_size;
3612         u32 page_count;
3613         struct bna_mem_info *mem_info;
3614
3615         res_info[BNA_TX_RES_MEM_T_TCB].res_type = BNA_RES_T_MEM;
3616         mem_info = &res_info[BNA_TX_RES_MEM_T_TCB].res_u.mem_info;
3617         mem_info->mem_type = BNA_MEM_T_KVA;
3618         mem_info->len = sizeof(struct bna_tcb);
3619         mem_info->num = num_txq;
3620
3621         q_size = txq_depth * BFI_TXQ_WI_SIZE;
3622         q_size = ALIGN(q_size, PAGE_SIZE);
3623         page_count = q_size >> PAGE_SHIFT;
3624
3625         res_info[BNA_TX_RES_MEM_T_QPT].res_type = BNA_RES_T_MEM;
3626         mem_info = &res_info[BNA_TX_RES_MEM_T_QPT].res_u.mem_info;
3627         mem_info->mem_type = BNA_MEM_T_DMA;
3628         mem_info->len = page_count * sizeof(struct bna_dma_addr);
3629         mem_info->num = num_txq;
3630
3631         res_info[BNA_TX_RES_MEM_T_SWQPT].res_type = BNA_RES_T_MEM;
3632         mem_info = &res_info[BNA_TX_RES_MEM_T_SWQPT].res_u.mem_info;
3633         mem_info->mem_type = BNA_MEM_T_KVA;
3634         mem_info->len = page_count * sizeof(void *);
3635         mem_info->num = num_txq;
3636
3637         res_info[BNA_TX_RES_MEM_T_PAGE].res_type = BNA_RES_T_MEM;
3638         mem_info = &res_info[BNA_TX_RES_MEM_T_PAGE].res_u.mem_info;
3639         mem_info->mem_type = BNA_MEM_T_DMA;
3640         mem_info->len = PAGE_SIZE * page_count;
3641         mem_info->num = num_txq;
3642
3643         res_info[BNA_TX_RES_MEM_T_IBIDX].res_type = BNA_RES_T_MEM;
3644         mem_info = &res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info;
3645         mem_info->mem_type = BNA_MEM_T_DMA;
3646         mem_info->len = BFI_IBIDX_SIZE;
3647         mem_info->num = num_txq;
3648
3649         res_info[BNA_TX_RES_INTR_T_TXCMPL].res_type = BNA_RES_T_INTR;
3650         res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info.intr_type =
3651                         BNA_INTR_T_MSIX;
3652         res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info.num = num_txq;
3653 }
3654
3655 struct bna_tx *
3656 bna_tx_create(struct bna *bna, struct bnad *bnad,
3657                 struct bna_tx_config *tx_cfg,
3658                 const struct bna_tx_event_cbfn *tx_cbfn,
3659                 struct bna_res_info *res_info, void *priv)
3660 {
3661         struct bna_intr_info *intr_info;
3662         struct bna_tx_mod *tx_mod = &bna->tx_mod;
3663         struct bna_tx *tx;
3664         struct bna_txq *txq;
3665         struct list_head *qe;
3666         int page_count;
3667         int i;
3668
3669         intr_info = &res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info;
3670         page_count = (res_info[BNA_TX_RES_MEM_T_PAGE].res_u.mem_info.len) /
3671                                         PAGE_SIZE;
3672
3673         /**
3674          * Get resources
3675          */
3676
3677         if ((intr_info->num != 1) && (intr_info->num != tx_cfg->num_txq))
3678                 return NULL;
3679
3680         /* Tx */
3681
3682         tx = bna_tx_get(tx_mod, tx_cfg->tx_type);
3683         if (!tx)
3684                 return NULL;
3685         tx->bna = bna;
3686         tx->priv = priv;
3687
3688         /* TxQs */
3689
3690         INIT_LIST_HEAD(&tx->txq_q);
3691         for (i = 0; i < tx_cfg->num_txq; i++) {
3692                 if (list_empty(&tx_mod->txq_free_q))
3693                         goto err_return;
3694
3695                 bfa_q_deq(&tx_mod->txq_free_q, &txq);
3696                 bfa_q_qe_init(&txq->qe);
3697                 list_add_tail(&txq->qe, &tx->txq_q);
3698                 txq->tx = tx;
3699         }
3700
3701         /*
3702          * Initialize
3703          */
3704
3705         /* Tx */
3706
3707         tx->tcb_setup_cbfn = tx_cbfn->tcb_setup_cbfn;
3708         tx->tcb_destroy_cbfn = tx_cbfn->tcb_destroy_cbfn;
3709         /* Following callbacks are mandatory */
3710         tx->tx_stall_cbfn = tx_cbfn->tx_stall_cbfn;
3711         tx->tx_resume_cbfn = tx_cbfn->tx_resume_cbfn;
3712         tx->tx_cleanup_cbfn = tx_cbfn->tx_cleanup_cbfn;
3713
3714         list_add_tail(&tx->qe, &tx_mod->tx_active_q);
3715
3716         tx->num_txq = tx_cfg->num_txq;
3717
3718         tx->flags = 0;
3719         if (tx->bna->tx_mod.flags & BNA_TX_MOD_F_ENET_STARTED) {
3720                 switch (tx->type) {
3721                 case BNA_TX_T_REGULAR:
3722                         if (!(tx->bna->tx_mod.flags &
3723                                 BNA_TX_MOD_F_ENET_LOOPBACK))
3724                                 tx->flags |= BNA_TX_F_ENET_STARTED;
3725                         break;
3726                 case BNA_TX_T_LOOPBACK:
3727                         if (tx->bna->tx_mod.flags & BNA_TX_MOD_F_ENET_LOOPBACK)
3728                                 tx->flags |= BNA_TX_F_ENET_STARTED;
3729                         break;
3730                 }
3731         }
3732
3733         /* TxQ */
3734
3735         i = 0;
3736         list_for_each(qe, &tx->txq_q) {
3737                 txq = (struct bna_txq *)qe;
3738                 txq->tcb = (struct bna_tcb *)
3739                 res_info[BNA_TX_RES_MEM_T_TCB].res_u.mem_info.mdl[i].kva;
3740                 txq->tx_packets = 0;
3741                 txq->tx_bytes = 0;
3742
3743                 /* IB */
3744                 txq->ib.ib_seg_host_addr.lsb =
3745                 res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.lsb;
3746                 txq->ib.ib_seg_host_addr.msb =
3747                 res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].dma.msb;
3748                 txq->ib.ib_seg_host_addr_kva =
3749                 res_info[BNA_TX_RES_MEM_T_IBIDX].res_u.mem_info.mdl[i].kva;
3750                 txq->ib.intr_type = intr_info->intr_type;
3751                 txq->ib.intr_vector = (intr_info->num == 1) ?
3752                                         intr_info->idl[0].vector :
3753                                         intr_info->idl[i].vector;
3754                 if (intr_info->intr_type == BNA_INTR_T_INTX)
3755                         txq->ib.intr_vector = (1 <<  txq->ib.intr_vector);
3756                 txq->ib.coalescing_timeo = tx_cfg->coalescing_timeo;
3757                 txq->ib.interpkt_timeo = BFI_TX_INTERPKT_TIMEO;
3758                 txq->ib.interpkt_count = BFI_TX_INTERPKT_COUNT;
3759
3760                 /* TCB */
3761
3762                 txq->tcb->q_depth = tx_cfg->txq_depth;
3763                 txq->tcb->unmap_q = (void *)
3764                 res_info[BNA_TX_RES_MEM_T_UNMAPQ].res_u.mem_info.mdl[i].kva;
3765                 txq->tcb->hw_consumer_index =
3766                         (u32 *)txq->ib.ib_seg_host_addr_kva;
3767                 txq->tcb->i_dbell = &txq->ib.door_bell;
3768                 txq->tcb->intr_type = txq->ib.intr_type;
3769                 txq->tcb->intr_vector = txq->ib.intr_vector;
3770                 txq->tcb->txq = txq;
3771                 txq->tcb->bnad = bnad;
3772                 txq->tcb->id = i;
3773
3774                 /* QPT, SWQPT, Pages */
3775                 bna_txq_qpt_setup(txq, page_count, PAGE_SIZE,
3776                         &res_info[BNA_TX_RES_MEM_T_QPT].res_u.mem_info.mdl[i],
3777                         &res_info[BNA_TX_RES_MEM_T_SWQPT].res_u.mem_info.mdl[i],
3778                         &res_info[BNA_TX_RES_MEM_T_PAGE].
3779                                   res_u.mem_info.mdl[i]);
3780
3781                 /* Callback to bnad for setting up TCB */
3782                 if (tx->tcb_setup_cbfn)
3783                         (tx->tcb_setup_cbfn)(bna->bnad, txq->tcb);
3784
3785                 if (tx_cfg->num_txq == BFI_TX_MAX_PRIO)
3786                         txq->priority = txq->tcb->id;
3787                 else
3788                         txq->priority = tx_mod->default_prio;
3789
3790                 i++;
3791         }
3792
3793         tx->txf_vlan_id = 0;
3794
3795         bfa_fsm_set_state(tx, bna_tx_sm_stopped);
3796
3797         tx_mod->rid_mask |= (1 << tx->rid);
3798
3799         return tx;
3800
3801 err_return:
3802         bna_tx_free(tx);
3803         return NULL;
3804 }
3805
3806 void
3807 bna_tx_destroy(struct bna_tx *tx)
3808 {
3809         struct bna_txq *txq;
3810         struct list_head *qe;
3811
3812         list_for_each(qe, &tx->txq_q) {
3813                 txq = (struct bna_txq *)qe;
3814                 if (tx->tcb_destroy_cbfn)
3815                         (tx->tcb_destroy_cbfn)(tx->bna->bnad, txq->tcb);
3816         }
3817
3818         tx->bna->tx_mod.rid_mask &= ~(1 << tx->rid);
3819         bna_tx_free(tx);
3820 }
3821
3822 void
3823 bna_tx_enable(struct bna_tx *tx)
3824 {
3825         if (tx->fsm != (bfa_sm_t)bna_tx_sm_stopped)
3826                 return;
3827
3828         tx->flags |= BNA_TX_F_ENABLED;
3829
3830         if (tx->flags & BNA_TX_F_ENET_STARTED)
3831                 bfa_fsm_send_event(tx, TX_E_START);
3832 }
3833
3834 void
3835 bna_tx_disable(struct bna_tx *tx, enum bna_cleanup_type type,
3836                 void (*cbfn)(void *, struct bna_tx *))
3837 {
3838         if (type == BNA_SOFT_CLEANUP) {
3839                 (*cbfn)(tx->bna->bnad, tx);
3840                 return;
3841         }
3842
3843         tx->stop_cbfn = cbfn;
3844         tx->stop_cbarg = tx->bna->bnad;
3845
3846         tx->flags &= ~BNA_TX_F_ENABLED;
3847
3848         bfa_fsm_send_event(tx, TX_E_STOP);
3849 }
3850
3851 void
3852 bna_tx_cleanup_complete(struct bna_tx *tx)
3853 {
3854         bfa_fsm_send_event(tx, TX_E_CLEANUP_DONE);
3855 }
3856
3857 static void
3858 bna_tx_mod_cb_tx_stopped(void *arg, struct bna_tx *tx)
3859 {
3860         struct bna_tx_mod *tx_mod = (struct bna_tx_mod *)arg;
3861
3862         bfa_wc_down(&tx_mod->tx_stop_wc);
3863 }
3864
3865 static void
3866 bna_tx_mod_cb_tx_stopped_all(void *arg)
3867 {
3868         struct bna_tx_mod *tx_mod = (struct bna_tx_mod *)arg;
3869
3870         if (tx_mod->stop_cbfn)
3871                 tx_mod->stop_cbfn(&tx_mod->bna->enet);
3872         tx_mod->stop_cbfn = NULL;
3873 }
3874
3875 void
3876 bna_tx_mod_init(struct bna_tx_mod *tx_mod, struct bna *bna,
3877                 struct bna_res_info *res_info)
3878 {
3879         int i;
3880
3881         tx_mod->bna = bna;
3882         tx_mod->flags = 0;
3883
3884         tx_mod->tx = (struct bna_tx *)
3885                 res_info[BNA_MOD_RES_MEM_T_TX_ARRAY].res_u.mem_info.mdl[0].kva;
3886         tx_mod->txq = (struct bna_txq *)
3887                 res_info[BNA_MOD_RES_MEM_T_TXQ_ARRAY].res_u.mem_info.mdl[0].kva;
3888
3889         INIT_LIST_HEAD(&tx_mod->tx_free_q);
3890         INIT_LIST_HEAD(&tx_mod->tx_active_q);
3891
3892         INIT_LIST_HEAD(&tx_mod->txq_free_q);
3893
3894         for (i = 0; i < bna->ioceth.attr.num_txq; i++) {
3895                 tx_mod->tx[i].rid = i;
3896                 bfa_q_qe_init(&tx_mod->tx[i].qe);
3897                 list_add_tail(&tx_mod->tx[i].qe, &tx_mod->tx_free_q);
3898                 bfa_q_qe_init(&tx_mod->txq[i].qe);
3899                 list_add_tail(&tx_mod->txq[i].qe, &tx_mod->txq_free_q);
3900         }
3901
3902         tx_mod->prio_map = BFI_TX_PRIO_MAP_ALL;
3903         tx_mod->default_prio = 0;
3904         tx_mod->iscsi_over_cee = BNA_STATUS_T_DISABLED;
3905         tx_mod->iscsi_prio = -1;
3906 }
3907
3908 void
3909 bna_tx_mod_uninit(struct bna_tx_mod *tx_mod)
3910 {
3911         struct list_head                *qe;
3912         int i;
3913
3914         i = 0;
3915         list_for_each(qe, &tx_mod->tx_free_q)
3916                 i++;
3917
3918         i = 0;
3919         list_for_each(qe, &tx_mod->txq_free_q)
3920                 i++;
3921
3922         tx_mod->bna = NULL;
3923 }
3924
3925 void
3926 bna_tx_mod_start(struct bna_tx_mod *tx_mod, enum bna_tx_type type)
3927 {
3928         struct bna_tx *tx;
3929         struct list_head                *qe;
3930
3931         tx_mod->flags |= BNA_TX_MOD_F_ENET_STARTED;
3932         if (type == BNA_TX_T_LOOPBACK)
3933                 tx_mod->flags |= BNA_TX_MOD_F_ENET_LOOPBACK;
3934
3935         list_for_each(qe, &tx_mod->tx_active_q) {
3936                 tx = (struct bna_tx *)qe;
3937                 if (tx->type == type)
3938                         bna_tx_start(tx);
3939         }
3940 }
3941
3942 void
3943 bna_tx_mod_stop(struct bna_tx_mod *tx_mod, enum bna_tx_type type)
3944 {
3945         struct bna_tx *tx;
3946         struct list_head                *qe;
3947
3948         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_STARTED;
3949         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_LOOPBACK;
3950
3951         tx_mod->stop_cbfn = bna_enet_cb_tx_stopped;
3952
3953         bfa_wc_init(&tx_mod->tx_stop_wc, bna_tx_mod_cb_tx_stopped_all, tx_mod);
3954
3955         list_for_each(qe, &tx_mod->tx_active_q) {
3956                 tx = (struct bna_tx *)qe;
3957                 if (tx->type == type) {
3958                         bfa_wc_up(&tx_mod->tx_stop_wc);
3959                         bna_tx_stop(tx);
3960                 }
3961         }
3962
3963         bfa_wc_wait(&tx_mod->tx_stop_wc);
3964 }
3965
3966 void
3967 bna_tx_mod_fail(struct bna_tx_mod *tx_mod)
3968 {
3969         struct bna_tx *tx;
3970         struct list_head                *qe;
3971
3972         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_STARTED;
3973         tx_mod->flags &= ~BNA_TX_MOD_F_ENET_LOOPBACK;
3974
3975         list_for_each(qe, &tx_mod->tx_active_q) {
3976                 tx = (struct bna_tx *)qe;
3977                 bna_tx_fail(tx);
3978         }
3979 }
3980
3981 void
3982 bna_tx_coalescing_timeo_set(struct bna_tx *tx, int coalescing_timeo)
3983 {
3984         struct bna_txq *txq;
3985         struct list_head *qe;
3986
3987         list_for_each(qe, &tx->txq_q) {
3988                 txq = (struct bna_txq *)qe;
3989                 bna_ib_coalescing_timeo_set(&txq->ib, coalescing_timeo);
3990         }
3991 }