2 * Linux network driver for Brocade Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
25 /* BFI FW image type */
26 #define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */
27 #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
29 /* Msg header common to all msgs */
31 u8 msg_class; /*!< @ref enum bfi_mclass */
32 u8 msg_id; /*!< msg opcode with in the class */
36 u8 fn_lpu; /*!< msg destination */
38 u16 i2htok; /*!< token in msgs to host */
42 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
43 #define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
44 #define bfi_mhdr_2_qid(_mh) ((_mh)->mtag.h2i.qid)
46 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
47 (_mh).msg_class = (_mc); \
48 (_mh).msg_id = (_op); \
49 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
52 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
53 (_mh).msg_class = (_mc); \
54 (_mh).msg_id = (_op); \
55 (_mh).mtag.i2htok = (_i2htok); \
59 * Message opcodes: 0-127 to firmware, 128-255 to host
61 #define BFI_I2H_OPCODE_BASE 128
62 #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
64 /****************************************************************************
66 * Scatter Gather Element and Page definition
68 ****************************************************************************
79 /* Generic DMA addr-len pair. */
81 union bfi_addr_u al_addr; /* DMA addr of buffer */
82 u32 al_len; /* length of buffer */
86 * Large Message structure - 128 Bytes size Msgs
88 #define BFI_LMSG_SZ 128
89 #define BFI_LMSG_PL_WSZ \
90 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4)
92 /* Mailbox message structure */
93 #define BFI_MBMSG_SZ 7
99 /* Supported PCI function class codes (personality) */
100 enum bfi_pcifn_class {
101 BFI_PCIFN_CLASS_FC = 0x0c04,
102 BFI_PCIFN_CLASS_ETH = 0x0200,
105 /* Message Classes */
107 BFI_MC_IOC = 1, /*!< IO Controller (IOC) */
108 BFI_MC_DIAG = 2, /*!< Diagnostic Msgs */
109 BFI_MC_FLASH = 3, /*!< Flash message class */
110 BFI_MC_CEE = 4, /*!< CEE */
111 BFI_MC_FCPORT = 5, /*!< FC port */
112 BFI_MC_IOCFC = 6, /*!< FC - IO Controller (IOC) */
113 BFI_MC_LL = 7, /*!< Link Layer */
114 BFI_MC_UF = 8, /*!< Unsolicited frame receive */
115 BFI_MC_FCXP = 9, /*!< FC Transport */
116 BFI_MC_LPS = 10, /*!< lport fc login services */
117 BFI_MC_RPORT = 11, /*!< Remote port */
118 BFI_MC_ITNIM = 12, /*!< I-T nexus (Initiator mode) */
119 BFI_MC_IOIM_READ = 13, /*!< read IO (Initiator mode) */
120 BFI_MC_IOIM_WRITE = 14, /*!< write IO (Initiator mode) */
121 BFI_MC_IOIM_IO = 15, /*!< IO (Initiator mode) */
122 BFI_MC_IOIM = 16, /*!< IO (Initiator mode) */
123 BFI_MC_IOIM_IOCOM = 17, /*!< good IO completion */
124 BFI_MC_TSKIM = 18, /*!< Initiator Task management */
125 BFI_MC_SBOOT = 19, /*!< SAN boot services */
126 BFI_MC_IPFC = 20, /*!< IP over FC Msgs */
127 BFI_MC_PORT = 21, /*!< Physical port */
128 BFI_MC_SFP = 22, /*!< SFP module */
129 BFI_MC_MSGQ = 23, /*!< MSGQ */
130 BFI_MC_ENET = 24, /*!< ENET commands/responses */
131 BFI_MC_PHY = 25, /*!< External PHY message class */
132 BFI_MC_NBOOT = 26, /*!< Network Boot */
133 BFI_MC_TIO_READ = 27, /*!< read IO (Target mode) */
134 BFI_MC_TIO_WRITE = 28, /*!< write IO (Target mode) */
135 BFI_MC_TIO_DATA_XFERED = 29, /*!< ds transferred (target mode) */
136 BFI_MC_TIO_IO = 30, /*!< IO (Target mode) */
137 BFI_MC_TIO = 31, /*!< IO (target mode) */
138 BFI_MC_MFG = 32, /*!< MFG/ASIC block commands */
139 BFI_MC_EDMA = 33, /*!< EDMA copy commands */
143 #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
145 #define BFI_FWBOOT_ENV_OS 0
147 /*----------------------------------------------------------------------
149 *----------------------------------------------------------------------
152 /* Different asic generations */
156 BFI_ASIC_GEN_CT2 = 3,
160 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
161 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
162 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
163 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
166 enum bfi_ioc_h2i_msgs {
167 BFI_IOC_H2I_ENABLE_REQ = 1,
168 BFI_IOC_H2I_DISABLE_REQ = 2,
169 BFI_IOC_H2I_GETATTR_REQ = 3,
170 BFI_IOC_H2I_DBG_SYNC = 4,
171 BFI_IOC_H2I_DBG_DUMP = 5,
174 enum bfi_ioc_i2h_msgs {
175 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
176 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
177 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
178 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
181 /* BFI_IOC_H2I_GETATTR_REQ message */
182 struct bfi_ioc_getattr_req {
184 union bfi_addr_u attr_addr;
187 struct bfi_ioc_attr {
188 u64 mfg_pwwn; /*!< Mfg port wwn */
189 u64 mfg_nwwn; /*!< Mfg node wwn */
190 mac_t mfg_mac; /*!< Mfg mac */
191 u8 port_mode; /* enum bfi_port_mode */
195 mac_t mac; /*!< PBC or Mfg mac */
199 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
203 u8 rx_bbcredit; /*!< receive buffer credits */
204 u32 adapter_prop; /*!< adapter properties */
205 u16 maxfrsize; /*!< max receive frame size */
208 char fw_version[BFA_VERSION_LEN];
209 char optrom_version[BFA_VERSION_LEN];
210 struct bfa_mfg_vpd vpd;
211 u32 card_type; /*!< card type */
214 /* BFI_IOC_I2H_GETATTR_REPLY message */
215 struct bfi_ioc_getattr_reply {
216 struct bfi_mhdr mh; /*!< Common msg header */
217 u8 status; /*!< cfg reply status */
221 /* Firmware memory page offsets */
222 #define BFI_IOC_SMEM_PG0_CB (0x40)
223 #define BFI_IOC_SMEM_PG0_CT (0x180)
225 /* Firmware statistic offset */
226 #define BFI_IOC_FWSTATS_OFF (0x6B40)
227 #define BFI_IOC_FWSTATS_SZ (4096)
229 /* Firmware trace offset */
230 #define BFI_IOC_TRC_OFF (0x4b00)
231 #define BFI_IOC_TRC_ENTS 256
232 #define BFI_IOC_TRC_ENT_SZ 16
233 #define BFI_IOC_TRC_HDR_SZ 32
235 #define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
236 #define BFI_IOC_MD5SUM_SZ 4
237 struct bfi_ioc_image_hdr {
238 u32 signature; /*!< constant signature */
239 u8 asic_gen; /*!< asic generation */
241 u8 port0_mode; /*!< device mode for port 0 */
242 u8 port1_mode; /*!< device mode for port 1 */
243 u32 exec; /*!< exec vector */
244 u32 bootenv; /*!< firmware boot env */
246 u32 md5sum[BFI_IOC_MD5SUM_SZ];
249 #define BFI_FWBOOT_DEVMODE_OFF 4
250 #define BFI_FWBOOT_TYPE_OFF 8
251 #define BFI_FWBOOT_ENV_OFF 12
252 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
253 (((u32)(__asic_gen)) << 24 | \
254 ((u32)(__asic_mode)) << 16 | \
255 ((u32)(__p0_mode)) << 8 | \
258 enum bfi_fwboot_type {
259 BFI_FWBOOT_TYPE_NORMAL = 0,
260 BFI_FWBOOT_TYPE_FLASH = 1,
261 BFI_FWBOOT_TYPE_MEMTEST = 2,
265 BFI_PORT_MODE_FC = 1,
266 BFI_PORT_MODE_ETH = 2,
269 struct bfi_ioc_hbeat {
270 struct bfi_mhdr mh; /*!< common msg header */
271 u32 hb_count; /*!< current heart beat count */
274 /* IOC hardware/firmware state */
276 BFI_IOC_UNINIT = 0, /*!< not initialized */
277 BFI_IOC_INITING = 1, /*!< h/w is being initialized */
278 BFI_IOC_HWINIT = 2, /*!< h/w is initialized */
279 BFI_IOC_CFG = 3, /*!< IOC configuration in progress */
280 BFI_IOC_OP = 4, /*!< IOC is operational */
281 BFI_IOC_DISABLING = 5, /*!< IOC is being disabled */
282 BFI_IOC_DISABLED = 6, /*!< IOC is disabled */
283 BFI_IOC_CFG_DISABLED = 7, /*!< IOC is being disabled;transient */
284 BFI_IOC_FAIL = 8, /*!< IOC heart-beat failure */
285 BFI_IOC_MEMTEST = 9, /*!< IOC is doing memtest */
288 #define BFI_IOC_ENDIAN_SIG 0x12345678
291 BFI_ADAPTER_TYPE_FC = 0x01, /*!< FC adapters */
292 BFI_ADAPTER_TYPE_MK = 0x0f0000, /*!< adapter type mask */
293 BFI_ADAPTER_TYPE_SH = 16, /*!< adapter type shift */
294 BFI_ADAPTER_NPORTS_MK = 0xff00, /*!< number of ports mask */
295 BFI_ADAPTER_NPORTS_SH = 8, /*!< number of ports shift */
296 BFI_ADAPTER_SPEED_MK = 0xff, /*!< adapter speed mask */
297 BFI_ADAPTER_SPEED_SH = 0, /*!< adapter speed shift */
298 BFI_ADAPTER_PROTO = 0x100000, /*!< prototype adapaters */
299 BFI_ADAPTER_TTV = 0x200000, /*!< TTV debug capable */
300 BFI_ADAPTER_UNSUPP = 0x400000, /*!< unknown adapter type */
303 #define BFI_ADAPTER_GETP(__prop, __adap_prop) \
304 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
305 BFI_ADAPTER_ ## __prop ## _SH)
306 #define BFI_ADAPTER_SETP(__prop, __val) \
307 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
308 #define BFI_ADAPTER_IS_PROTO(__adap_type) \
309 ((__adap_type) & BFI_ADAPTER_PROTO)
310 #define BFI_ADAPTER_IS_TTV(__adap_type) \
311 ((__adap_type) & BFI_ADAPTER_TTV)
312 #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
313 ((__adap_type) & BFI_ADAPTER_UNSUPP)
314 #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
315 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
318 /* BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages */
319 struct bfi_ioc_ctrl_req {
326 /* BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages */
327 struct bfi_ioc_ctrl_reply {
328 struct bfi_mhdr mh; /*!< Common msg header */
329 u8 status; /*!< enable/disable status */
330 u8 port_mode; /*!< enum bfa_mode */
331 u8 cap_bm; /*!< capability bit mask */
335 #define BFI_IOC_MSGSZ 8
337 union bfi_ioc_h2i_msg_u {
339 struct bfi_ioc_ctrl_req enable_req;
340 struct bfi_ioc_ctrl_req disable_req;
341 struct bfi_ioc_getattr_req getattr_req;
342 u32 mboxmsg[BFI_IOC_MSGSZ];
346 union bfi_ioc_i2h_msg_u {
348 struct bfi_ioc_ctrl_reply fw_event;
349 u32 mboxmsg[BFI_IOC_MSGSZ];
352 /*----------------------------------------------------------------------
354 *----------------------------------------------------------------------
357 enum bfi_msgq_h2i_msgs {
358 BFI_MSGQ_H2I_INIT_REQ = 1,
359 BFI_MSGQ_H2I_DOORBELL_PI = 2,
360 BFI_MSGQ_H2I_DOORBELL_CI = 3,
361 BFI_MSGQ_H2I_CMDQ_COPY_RSP = 4,
364 enum bfi_msgq_i2h_msgs {
365 BFI_MSGQ_I2H_INIT_RSP = BFA_I2HM(BFI_MSGQ_H2I_INIT_REQ),
366 BFI_MSGQ_I2H_DOORBELL_PI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_PI),
367 BFI_MSGQ_I2H_DOORBELL_CI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_CI),
368 BFI_MSGQ_I2H_CMDQ_COPY_REQ = BFA_I2HM(BFI_MSGQ_H2I_CMDQ_COPY_RSP),
371 /* Messages(commands/responsed/AENS will have the following header */
372 struct bfi_msgq_mhdr {
381 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
382 (_mh).msg_class = (_mc); \
383 (_mh).msg_id = (_mid); \
384 (_mh).msg_token = (_tok); \
385 (_mh).enet_id = (_enet_id); \
389 * Mailbox for messaging interface
391 #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
392 #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
394 #define bfi_msgq_num_cmd_entries(_size) \
395 (((_size) + BFI_MSGQ_CMD_ENTRY_SIZE - 1) / BFI_MSGQ_CMD_ENTRY_SIZE)
398 union bfi_addr_u addr;
399 u16 q_depth; /* Total num of entries in the queue */
403 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
404 struct bfi_msgq_cfg_req {
406 struct bfi_msgq cmdq;
407 struct bfi_msgq rspq;
410 /* BFI_ENET_MSGQ_CFG_RSP */
411 struct bfi_msgq_cfg_rsp {
417 /* BFI_MSGQ_H2I_DOORBELL */
418 struct bfi_msgq_h2i_db {
426 /* BFI_MSGQ_I2H_DOORBELL */
427 struct bfi_msgq_i2h_db {
435 #define BFI_CMD_COPY_SZ 28
437 /* BFI_MSGQ_H2I_CMD_COPY_RSP */
438 struct bfi_msgq_h2i_cmdq_copy_rsp {
440 u8 data[BFI_CMD_COPY_SZ];
443 /* BFI_MSGQ_I2H_CMD_COPY_REQ */
444 struct bfi_msgq_i2h_cmdq_copy_req {
451 * FLASH module specific
453 enum bfi_flash_h2i_msgs {
454 BFI_FLASH_H2I_QUERY_REQ = 1,
455 BFI_FLASH_H2I_ERASE_REQ = 2,
456 BFI_FLASH_H2I_WRITE_REQ = 3,
457 BFI_FLASH_H2I_READ_REQ = 4,
458 BFI_FLASH_H2I_BOOT_VER_REQ = 5,
461 enum bfi_flash_i2h_msgs {
462 BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
463 BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
464 BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
465 BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
466 BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
467 BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
471 * Flash query request
473 struct bfi_flash_query_req {
474 struct bfi_mhdr mh; /* Common msg header */
475 struct bfi_alen alen;
479 * Flash write request
481 struct bfi_flash_write_req {
482 struct bfi_mhdr mh; /* Common msg header */
483 struct bfi_alen alen;
484 u32 type; /* partition type */
485 u8 instance; /* partition instance */
495 struct bfi_flash_read_req {
496 struct bfi_mhdr mh; /* Common msg header */
497 u32 type; /* partition type */
498 u8 instance; /* partition instance */
502 struct bfi_alen alen;
506 * Flash query response
508 struct bfi_flash_query_rsp {
509 struct bfi_mhdr mh; /* Common msg header */
514 * Flash read response
516 struct bfi_flash_read_rsp {
517 struct bfi_mhdr mh; /* Common msg header */
518 u32 type; /* partition type */
519 u8 instance; /* partition instance */
526 * Flash write response
528 struct bfi_flash_write_rsp {
529 struct bfi_mhdr mh; /* Common msg header */
530 u32 type; /* partition type */
531 u8 instance; /* partition instance */
539 #endif /* __BFI_H__ */