1 /* bnx2x_sriov.c: Broadcom Everest network driver.
3 * Copyright 2009-2013 Broadcom Corporation
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
15 * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
16 * Written by: Shmulik Ravid
17 * Ariel Elior <ariel.elior@qlogic.com>
21 #include "bnx2x_init.h"
22 #include "bnx2x_cmn.h"
24 #include <linux/crc32.h>
25 #include <linux/if_vlan.h>
27 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
28 struct bnx2x_virtf **vf,
29 struct pf_vf_bulletin_content **bulletin,
32 /* General service functions */
33 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
36 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
38 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
40 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
42 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
46 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
49 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
51 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
53 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
55 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
59 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
64 if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
70 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
72 u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
73 return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
76 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
77 u8 igu_sb_id, u8 segment, u16 index, u8 op,
80 /* acking a VF sb through the PF - use the GRC */
82 u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
83 u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
84 u32 func_encode = vf->abs_vfid;
85 u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
86 struct igu_regular cmd_data = {0};
88 cmd_data.sb_id_and_flags =
89 ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
90 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
91 (update << IGU_REGULAR_BUPDATE_SHIFT) |
92 (op << IGU_REGULAR_ENABLE_INT_SHIFT));
94 ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
95 func_encode << IGU_CTRL_REG_FID_SHIFT |
96 IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
98 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
99 cmd_data.sb_id_and_flags, igu_addr_data);
100 REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
104 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
106 REG_WR(bp, igu_addr_ctl, ctl);
111 static bool bnx2x_validate_vf_sp_objs(struct bnx2x *bp,
112 struct bnx2x_virtf *vf,
115 if (!bnx2x_leading_vfq(vf, sp_initialized)) {
117 BNX2X_ERR("Slowpath objects not yet initialized!\n");
119 DP(BNX2X_MSG_IOV, "Slowpath objects not yet initialized!\n");
125 /* VFOP operations states */
126 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
127 struct bnx2x_queue_init_params *init_params,
128 struct bnx2x_queue_setup_params *setup_params,
129 u16 q_idx, u16 sb_idx)
132 "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
136 init_params->tx.sb_cq_index,
137 init_params->tx.hc_rate,
139 setup_params->txq_params.traffic_type);
142 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
143 struct bnx2x_queue_init_params *init_params,
144 struct bnx2x_queue_setup_params *setup_params,
145 u16 q_idx, u16 sb_idx)
147 struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
149 DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
150 "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
154 init_params->rx.sb_cq_index,
155 init_params->rx.hc_rate,
156 setup_params->gen_params.mtu,
158 rxq_params->sge_buf_sz,
159 rxq_params->max_sges_pkt,
160 rxq_params->tpa_agg_sz,
162 rxq_params->drop_flags,
163 rxq_params->cache_line_log);
166 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
167 struct bnx2x_virtf *vf,
168 struct bnx2x_vf_queue *q,
169 struct bnx2x_vf_queue_construct_params *p,
170 unsigned long q_type)
172 struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
173 struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
177 /* Enable host coalescing in the transition to INIT state */
178 if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
179 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
181 if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
182 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
185 init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
186 init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
189 init_p->cxts[0] = q->cxt;
193 /* Setup-op general parameters */
194 setup_p->gen_params.spcl_id = vf->sp_cl_id;
195 setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
196 setup_p->gen_params.fp_hsi = vf->fp_hsi;
198 /* Setup-op pause params:
199 * Nothing to do, the pause thresholds are set by default to 0 which
200 * effectively turns off the feature for this queue. We don't want
201 * one queue (VF) to interfering with another queue (another VF)
203 if (vf->cfg_flags & VF_CFG_FW_FC)
204 BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n",
207 * collect statistics, zero statistics, local-switching, security,
208 * OV for Flex10, RSS and MCAST for leading
210 if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
211 __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
213 /* for VFs, enable tx switching, bd coherency, and mac address
216 __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
217 __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
218 __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
220 /* Setup-op rx parameters */
221 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
222 struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
224 rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
225 rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
226 rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
228 if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
229 rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
232 /* Setup-op tx parameters */
233 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
234 setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
235 setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
239 static int bnx2x_vf_queue_create(struct bnx2x *bp,
240 struct bnx2x_virtf *vf, int qid,
241 struct bnx2x_vf_queue_construct_params *qctor)
243 struct bnx2x_queue_state_params *q_params;
246 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
248 /* Prepare ramrod information */
249 q_params = &qctor->qstate;
250 q_params->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
251 set_bit(RAMROD_COMP_WAIT, &q_params->ramrod_flags);
253 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
254 BNX2X_Q_LOGICAL_STATE_ACTIVE) {
255 DP(BNX2X_MSG_IOV, "queue was already up. Aborting gracefully\n");
259 /* Run Queue 'construction' ramrods */
260 q_params->cmd = BNX2X_Q_CMD_INIT;
261 rc = bnx2x_queue_state_change(bp, q_params);
265 memcpy(&q_params->params.setup, &qctor->prep_qsetup,
266 sizeof(struct bnx2x_queue_setup_params));
267 q_params->cmd = BNX2X_Q_CMD_SETUP;
268 rc = bnx2x_queue_state_change(bp, q_params);
272 /* enable interrupts */
273 bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, bnx2x_vfq(vf, qid, sb_idx)),
274 USTORM_ID, 0, IGU_INT_ENABLE, 0);
279 static int bnx2x_vf_queue_destroy(struct bnx2x *bp, struct bnx2x_virtf *vf,
282 enum bnx2x_queue_cmd cmds[] = {BNX2X_Q_CMD_HALT,
283 BNX2X_Q_CMD_TERMINATE,
284 BNX2X_Q_CMD_CFC_DEL};
285 struct bnx2x_queue_state_params q_params;
288 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
290 /* Prepare ramrod information */
291 memset(&q_params, 0, sizeof(struct bnx2x_queue_state_params));
292 q_params.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
293 set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
295 if (bnx2x_get_q_logical_state(bp, q_params.q_obj) ==
296 BNX2X_Q_LOGICAL_STATE_STOPPED) {
297 DP(BNX2X_MSG_IOV, "queue was already stopped. Aborting gracefully\n");
301 /* Run Queue 'destruction' ramrods */
302 for (i = 0; i < ARRAY_SIZE(cmds); i++) {
303 q_params.cmd = cmds[i];
304 rc = bnx2x_queue_state_change(bp, &q_params);
306 BNX2X_ERR("Failed to run Queue command %d\n", cmds[i]);
312 if (bnx2x_vfq(vf, qid, cxt)) {
313 bnx2x_vfq(vf, qid, cxt)->ustorm_ag_context.cdu_usage = 0;
314 bnx2x_vfq(vf, qid, cxt)->xstorm_ag_context.cdu_reserved = 0;
321 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
323 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
325 /* the first igu entry belonging to VFs of this PF */
326 if (!BP_VFDB(bp)->first_vf_igu_entry)
327 BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
329 /* the first igu entry belonging to this VF */
330 if (!vf_sb_count(vf))
331 vf->igu_base_id = igu_sb_id;
336 BP_VFDB(bp)->vf_sbs_pool++;
339 static inline void bnx2x_vf_vlan_credit(struct bnx2x *bp,
340 struct bnx2x_vlan_mac_obj *obj,
343 struct list_head *pos;
347 read_lock = bnx2x_vlan_mac_h_read_lock(bp, obj);
349 DP(BNX2X_MSG_SP, "Failed to take vlan mac read head; continuing anyway\n");
351 list_for_each(pos, &obj->head)
355 bnx2x_vlan_mac_h_read_unlock(bp, obj);
357 atomic_set(counter, cnt);
360 static int bnx2x_vf_vlan_mac_clear(struct bnx2x *bp, struct bnx2x_virtf *vf,
361 int qid, bool drv_only, bool mac)
363 struct bnx2x_vlan_mac_ramrod_params ramrod;
366 DP(BNX2X_MSG_IOV, "vf[%d] - deleting all %s\n", vf->abs_vfid,
367 mac ? "MACs" : "VLANs");
369 /* Prepare ramrod params */
370 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
372 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
373 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
375 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
376 &ramrod.user_req.vlan_mac_flags);
377 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
379 ramrod.user_req.cmd = BNX2X_VLAN_MAC_DEL;
381 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
383 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
385 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
388 rc = ramrod.vlan_mac_obj->delete_all(bp,
390 &ramrod.user_req.vlan_mac_flags,
391 &ramrod.ramrod_flags);
393 BNX2X_ERR("Failed to delete all %s\n",
394 mac ? "MACs" : "VLANs");
398 /* Clear the vlan counters */
400 atomic_set(&bnx2x_vfq(vf, qid, vlan_count), 0);
405 static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp,
406 struct bnx2x_virtf *vf, int qid,
407 struct bnx2x_vf_mac_vlan_filter *filter,
410 struct bnx2x_vlan_mac_ramrod_params ramrod;
413 DP(BNX2X_MSG_IOV, "vf[%d] - %s a %s filter\n",
414 vf->abs_vfid, filter->add ? "Adding" : "Deleting",
415 filter->type == BNX2X_VF_FILTER_MAC ? "MAC" : "VLAN");
417 /* Prepare ramrod params */
418 memset(&ramrod, 0, sizeof(struct bnx2x_vlan_mac_ramrod_params));
419 if (filter->type == BNX2X_VF_FILTER_VLAN) {
420 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
421 &ramrod.user_req.vlan_mac_flags);
422 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
423 ramrod.user_req.u.vlan.vlan = filter->vid;
425 set_bit(BNX2X_ETH_MAC, &ramrod.user_req.vlan_mac_flags);
426 ramrod.vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
427 memcpy(&ramrod.user_req.u.mac.mac, filter->mac, ETH_ALEN);
429 ramrod.user_req.cmd = filter->add ? BNX2X_VLAN_MAC_ADD :
432 /* Verify there are available vlan credits */
433 if (filter->add && filter->type == BNX2X_VF_FILTER_VLAN &&
434 (atomic_read(&bnx2x_vfq(vf, qid, vlan_count)) >=
435 vf_vlan_rules_cnt(vf))) {
436 BNX2X_ERR("No credits for vlan [%d >= %d]\n",
437 atomic_read(&bnx2x_vfq(vf, qid, vlan_count)),
438 vf_vlan_rules_cnt(vf));
442 set_bit(RAMROD_EXEC, &ramrod.ramrod_flags);
444 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod.ramrod_flags);
446 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
448 /* Add/Remove the filter */
449 rc = bnx2x_config_vlan_mac(bp, &ramrod);
450 if (rc && rc != -EEXIST) {
451 BNX2X_ERR("Failed to %s %s\n",
452 filter->add ? "add" : "delete",
453 filter->type == BNX2X_VF_FILTER_MAC ? "MAC" :
458 /* Update the vlan counters */
459 if (filter->type == BNX2X_VF_FILTER_VLAN)
460 bnx2x_vf_vlan_credit(bp, ramrod.vlan_mac_obj,
461 &bnx2x_vfq(vf, qid, vlan_count));
466 int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf,
467 struct bnx2x_vf_mac_vlan_filters *filters,
468 int qid, bool drv_only)
472 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
474 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
477 /* Prepare ramrod params */
478 for (i = 0; i < filters->count; i++) {
479 rc = bnx2x_vf_mac_vlan_config(bp, vf, qid,
480 &filters->filters[i], drv_only);
485 /* Rollback if needed */
486 if (i != filters->count) {
487 BNX2X_ERR("Managed only %d/%d filters - rolling back\n",
488 i, filters->count + 1);
490 filters->filters[i].add = !filters->filters[i].add;
491 bnx2x_vf_mac_vlan_config(bp, vf, qid,
492 &filters->filters[i],
497 /* It's our responsibility to free the filters */
503 int bnx2x_vf_queue_setup(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid,
504 struct bnx2x_vf_queue_construct_params *qctor)
508 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
510 rc = bnx2x_vf_queue_create(bp, vf, qid, qctor);
514 /* Configure vlan0 for leading queue */
516 struct bnx2x_vf_mac_vlan_filter filter;
518 memset(&filter, 0, sizeof(struct bnx2x_vf_mac_vlan_filter));
519 filter.type = BNX2X_VF_FILTER_VLAN;
522 rc = bnx2x_vf_mac_vlan_config(bp, vf, qid, &filter, false);
527 /* Schedule the configuration of any pending vlan filters */
528 vf->cfg_flags |= VF_CFG_VLAN;
529 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_HYPERVISOR_VLAN,
533 BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
537 static int bnx2x_vf_queue_flr(struct bnx2x *bp, struct bnx2x_virtf *vf,
542 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
544 /* If needed, clean the filtering data base */
545 if ((qid == LEADING_IDX) &&
546 bnx2x_validate_vf_sp_objs(bp, vf, false)) {
547 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true, false);
550 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid, true, true);
555 /* Terminate queue */
556 if (bnx2x_vfq(vf, qid, sp_obj).state != BNX2X_Q_STATE_RESET) {
557 struct bnx2x_queue_state_params qstate;
559 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
560 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
561 qstate.q_obj->state = BNX2X_Q_STATE_STOPPED;
562 qstate.cmd = BNX2X_Q_CMD_TERMINATE;
563 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
564 rc = bnx2x_queue_state_change(bp, &qstate);
571 BNX2X_ERR("vf[%d:%d] error: rc %d\n", vf->abs_vfid, qid, rc);
575 int bnx2x_vf_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf,
576 bnx2x_mac_addr_t *mcasts, int mc_num, bool drv_only)
578 struct bnx2x_mcast_list_elem *mc = NULL;
579 struct bnx2x_mcast_ramrod_params mcast;
582 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
584 /* Prepare Multicast command */
585 memset(&mcast, 0, sizeof(struct bnx2x_mcast_ramrod_params));
586 mcast.mcast_obj = &vf->mcast_obj;
588 set_bit(RAMROD_DRV_CLR_ONLY, &mcast.ramrod_flags);
590 set_bit(RAMROD_COMP_WAIT, &mcast.ramrod_flags);
592 mc = kzalloc(mc_num * sizeof(struct bnx2x_mcast_list_elem),
595 BNX2X_ERR("Cannot Configure mulicasts due to lack of memory\n");
600 /* clear existing mcasts */
601 mcast.mcast_list_len = vf->mcast_list_len;
602 vf->mcast_list_len = mc_num;
603 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_DEL);
605 BNX2X_ERR("Failed to remove multicasts\n");
610 /* update mcast list on the ramrod params */
612 INIT_LIST_HEAD(&mcast.mcast_list);
613 for (i = 0; i < mc_num; i++) {
614 mc[i].mac = mcasts[i];
615 list_add_tail(&mc[i].link,
620 mcast.mcast_list_len = mc_num;
621 rc = bnx2x_config_mcast(bp, &mcast, BNX2X_MCAST_CMD_ADD);
623 BNX2X_ERR("Faled to add multicasts\n");
630 static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
631 struct bnx2x_rx_mode_ramrod_params *ramrod,
632 struct bnx2x_virtf *vf,
633 unsigned long accept_flags)
635 struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
637 memset(ramrod, 0, sizeof(*ramrod));
638 ramrod->cid = vfq->cid;
639 ramrod->cl_id = vfq_cl_id(vf, vfq);
640 ramrod->rx_mode_obj = &bp->rx_mode_obj;
641 ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
642 ramrod->rx_accept_flags = accept_flags;
643 ramrod->tx_accept_flags = accept_flags;
644 ramrod->pstate = &vf->filter_state;
645 ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
647 set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
648 set_bit(RAMROD_RX, &ramrod->ramrod_flags);
649 set_bit(RAMROD_TX, &ramrod->ramrod_flags);
651 ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
652 ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
655 int bnx2x_vf_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf,
656 int qid, unsigned long accept_flags)
658 struct bnx2x_rx_mode_ramrod_params ramrod;
660 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
662 bnx2x_vf_prep_rx_mode(bp, qid, &ramrod, vf, accept_flags);
663 set_bit(RAMROD_COMP_WAIT, &ramrod.ramrod_flags);
664 vfq_get(vf, qid)->accept_flags = ramrod.rx_accept_flags;
665 return bnx2x_config_rx_mode(bp, &ramrod);
668 int bnx2x_vf_queue_teardown(struct bnx2x *bp, struct bnx2x_virtf *vf, int qid)
672 DP(BNX2X_MSG_IOV, "vf[%d:%d]\n", vf->abs_vfid, qid);
674 /* Remove all classification configuration for leading queue */
675 if (qid == LEADING_IDX) {
676 rc = bnx2x_vf_rxmode(bp, vf, qid, 0);
680 /* Remove filtering if feasible */
681 if (bnx2x_validate_vf_sp_objs(bp, vf, true)) {
682 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
686 rc = bnx2x_vf_vlan_mac_clear(bp, vf, qid,
690 rc = bnx2x_vf_mcast(bp, vf, NULL, 0, false);
697 rc = bnx2x_vf_queue_destroy(bp, vf, qid);
702 BNX2X_ERR("vf[%d:%d] error: rc %d\n",
703 vf->abs_vfid, qid, rc);
707 /* VF enable primitives
708 * when pretend is required the caller is responsible
709 * for calling pretend prior to calling these routines
712 /* internal vf enable - until vf is enabled internally all transactions
713 * are blocked. This routine should always be called last with pretend.
715 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
717 REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
720 /* clears vf error in all semi blocks */
721 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
723 REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
724 REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
725 REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
726 REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
729 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
731 u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
734 switch (was_err_group) {
736 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
739 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
742 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
745 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
748 REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
751 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
756 /* Set VF masks and configuration - pretend */
757 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
759 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
760 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
761 REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
762 REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
763 REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
764 REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
766 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
767 val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
768 if (vf->cfg_flags & VF_CFG_INT_SIMD)
769 val |= IGU_VF_CONF_SINGLE_ISR_EN;
770 val &= ~IGU_VF_CONF_PARENT_MASK;
771 val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
772 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
775 "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
778 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
780 /* iterate over all queues, clear sb consumer */
781 for (i = 0; i < vf_sb_count(vf); i++) {
782 u8 igu_sb_id = vf_igu_sb(vf, i);
784 /* zero prod memory */
785 REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
787 /* clear sb state machine */
788 bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
791 /* disable + update */
792 bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
797 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
799 /* set the VF-PF association in the FW */
800 storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
801 storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
804 bnx2x_vf_semi_clear_err(bp, abs_vfid);
805 bnx2x_vf_pglue_clear_err(bp, abs_vfid);
807 /* internal vf-enable - pretend */
808 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
809 DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
810 bnx2x_vf_enable_internal(bp, true);
811 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
814 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
816 /* Reset vf in IGU interrupts are still disabled */
817 bnx2x_vf_igu_reset(bp, vf);
819 /* pretend to enable the vf with the PBF */
820 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
821 REG_WR(bp, PBF_REG_DISABLE_VF, 0);
822 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
825 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
828 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
833 dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
835 return bnx2x_is_pcie_pending(dev);
839 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
841 /* Verify no pending pci transactions */
842 if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
843 BNX2X_ERR("PCIE Transactions still pending\n");
848 static void bnx2x_iov_re_set_vlan_filters(struct bnx2x *bp,
849 struct bnx2x_virtf *vf,
852 int num = vf_vlan_rules_cnt(vf);
853 int diff = new - num;
856 DP(BNX2X_MSG_IOV, "vf[%d] - %d vlan filter credits [previously %d]\n",
857 vf->abs_vfid, new, num);
860 rc = bp->vlans_pool.get(&bp->vlans_pool, diff);
862 rc = bp->vlans_pool.put(&bp->vlans_pool, -diff);
865 vf_vlan_rules_cnt(vf) = new;
867 DP(BNX2X_MSG_IOV, "vf[%d] - Failed to configure vlan filter credits change\n",
871 /* must be called after the number of PF queues and the number of VFs are
875 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
877 struct vf_pf_resc_request *resc = &vf->alloc_resc;
880 /* will be set only during VF-ACQUIRE */
884 /* no credit calculations for macs (just yet) */
885 resc->num_mac_filters = 1;
887 /* divvy up vlan rules */
888 bnx2x_iov_re_set_vlan_filters(bp, vf, 0);
889 vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
890 vlan_count = 1 << ilog2(vlan_count);
891 bnx2x_iov_re_set_vlan_filters(bp, vf,
892 vlan_count / BNX2X_NR_VIRTFN(bp));
894 /* no real limitation */
895 resc->num_mc_filters = 0;
897 /* num_sbs already set */
898 resc->num_sbs = vf->sb_count;
902 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
904 /* reset the state variables */
905 bnx2x_iov_static_resc(bp, vf);
909 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
911 u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
913 /* DQ usage counter */
914 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
915 bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
916 "DQ VF usage counter timed out",
918 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
920 /* FW cleanup command - poll for the results */
921 if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
923 BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
925 /* verify TX hw is flushed */
926 bnx2x_tx_hw_flushed(bp, poll_cnt);
929 static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
933 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
935 /* the cleanup operations are valid if and only if the VF
936 * was first acquired.
938 for (i = 0; i < vf_rxq_count(vf); i++) {
939 rc = bnx2x_vf_queue_flr(bp, vf, i);
944 /* remove multicasts */
945 bnx2x_vf_mcast(bp, vf, NULL, 0, true);
947 /* dispatch final cleanup and wait for HW queues to flush */
948 bnx2x_vf_flr_clnup_hw(bp, vf);
950 /* release VF resources */
951 bnx2x_vf_free_resc(bp, vf);
953 /* re-open the mailbox */
954 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
957 BNX2X_ERR("vf[%d:%d] failed flr: rc %d\n",
958 vf->abs_vfid, i, rc);
961 static void bnx2x_vf_flr_clnup(struct bnx2x *bp)
963 struct bnx2x_virtf *vf;
966 for (i = 0; i < BNX2X_NR_VIRTFN(bp); i++) {
967 /* VF should be RESET & in FLR cleanup states */
968 if (bnx2x_vf(bp, i, state) != VF_RESET ||
969 !bnx2x_vf(bp, i, flr_clnup_stage))
972 DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n",
973 i, BNX2X_NR_VIRTFN(bp));
977 /* lock the vf pf channel */
978 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
980 /* invoke the VF FLR SM */
981 bnx2x_vf_flr(bp, vf);
983 /* mark the VF to be ACKED and continue */
984 vf->flr_clnup_stage = false;
985 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
988 /* Acknowledge the handled VFs.
989 * we are acknowledge all the vfs which an flr was requested for, even
990 * if amongst them there are such that we never opened, since the mcp
991 * will interrupt us immediately again if we only ack some of the bits,
992 * resulting in an endless loop. This can happen for example in KVM
993 * where an 'all ones' flr request is sometimes given by hyper visor
995 DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
996 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
997 for (i = 0; i < FLRD_VFS_DWORDS; i++)
998 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
999 bp->vfdb->flrd_vfs[i]);
1001 bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
1003 /* clear the acked bits - better yet if the MCP implemented
1004 * write to clear semantics
1006 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1007 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
1010 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
1014 /* Read FLR'd VFs */
1015 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1016 bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
1019 "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
1020 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
1022 for_each_vf(bp, i) {
1023 struct bnx2x_virtf *vf = BP_VF(bp, i);
1026 if (vf->abs_vfid < 32)
1027 reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
1029 reset = bp->vfdb->flrd_vfs[1] &
1030 (1 << (vf->abs_vfid - 32));
1033 /* set as reset and ready for cleanup */
1034 vf->state = VF_RESET;
1035 vf->flr_clnup_stage = true;
1038 "Initiating Final cleanup for VF %d\n",
1043 /* do the FLR cleanup for all marked VFs*/
1044 bnx2x_vf_flr_clnup(bp);
1047 /* IOV global initialization routines */
1048 void bnx2x_iov_init_dq(struct bnx2x *bp)
1053 /* Set the DQ such that the CID reflect the abs_vfid */
1054 REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
1055 REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
1057 /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1060 REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1062 /* The VF window size is the log2 of the max number of CIDs per VF */
1063 REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1065 /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
1066 * the Pf doorbell size although the 2 are independent.
1068 REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1070 /* No security checks for now -
1071 * configure single rule (out of 16) mask = 0x1, value = 0x0,
1072 * CID range 0 - 0x1ffff
1074 REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1075 REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1076 REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1077 REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1079 /* set the VF doorbell threshold. This threshold represents the amount
1080 * of doorbells allowed in the main DORQ fifo for a specific VF.
1082 REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 64);
1085 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1087 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1088 REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1091 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1093 struct pci_dev *dev = bp->pdev;
1094 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1096 return dev->bus->number + ((dev->devfn + iov->offset +
1097 iov->stride * vfid) >> 8);
1100 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1102 struct pci_dev *dev = bp->pdev;
1103 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1105 return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1108 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1111 struct pci_dev *dev = bp->pdev;
1112 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1114 for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1115 u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1116 u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1119 vf->bars[n].bar = start + size * vf->abs_vfid;
1120 vf->bars[n].size = size;
1124 static int bnx2x_ari_enabled(struct pci_dev *dev)
1126 return dev->bus->self && dev->bus->self->ari_enabled;
1130 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1134 u8 fid, current_pf = 0;
1136 /* IGU in normal mode - read CAM */
1137 for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1138 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1139 if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1141 fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1142 if (fid & IGU_FID_ENCODE_IS_PF)
1143 current_pf = fid & IGU_FID_PF_NUM_MASK;
1144 else if (current_pf == BP_FUNC(bp))
1145 bnx2x_vf_set_igu_info(bp, sb_id,
1146 (fid & IGU_FID_VF_NUM_MASK));
1147 DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1148 ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1149 ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1150 (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1151 GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1153 DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1154 return BP_VFDB(bp)->vf_sbs_pool;
1157 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1160 kfree(bp->vfdb->vfqs);
1161 kfree(bp->vfdb->vfs);
1167 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1170 struct pci_dev *dev = bp->pdev;
1172 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1174 BNX2X_ERR("failed to find SRIOV capability in device\n");
1179 DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1180 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1181 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1182 pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1183 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1184 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1185 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1186 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1187 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1192 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1196 /* read the SRIOV capability structure
1197 * The fields can be read via configuration read or
1198 * directly from the device (starting at offset PCICFG_OFFSET)
1200 if (bnx2x_sriov_pci_cfg_info(bp, iov))
1203 /* get the number of SRIOV bars */
1206 /* read the first_vfid */
1207 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1208 iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1209 * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1212 "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1214 iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1215 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1220 /* must be called after PF bars are mapped */
1221 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1225 struct bnx2x_sriov *iov;
1226 struct pci_dev *dev = bp->pdev;
1234 /* verify sriov capability is present in configuration space */
1235 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1238 /* verify chip revision */
1239 if (CHIP_IS_E1x(bp))
1242 /* check if SRIOV support is turned off */
1246 /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1247 if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1248 BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1249 BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1253 /* SRIOV can be enabled only with MSIX */
1254 if (int_mode_param == BNX2X_INT_MODE_MSI ||
1255 int_mode_param == BNX2X_INT_MODE_INTX) {
1256 BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1261 /* verify ari is enabled */
1262 if (!bnx2x_ari_enabled(bp->pdev)) {
1263 BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1267 /* verify igu is in normal mode */
1268 if (CHIP_INT_MODE_IS_BC(bp)) {
1269 BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
1273 /* allocate the vfs database */
1274 bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1276 BNX2X_ERR("failed to allocate vf database\n");
1281 /* get the sriov info - Linux already collected all the pertinent
1282 * information, however the sriov structure is for the private use
1283 * of the pci module. Also we want this information regardless
1284 * of the hyper-visor.
1286 iov = &(bp->vfdb->sriov);
1287 err = bnx2x_sriov_info(bp, iov);
1291 /* SR-IOV capability was enabled but there are no VFs*/
1292 if (iov->total == 0)
1295 iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
1297 DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
1298 num_vfs_param, iov->nr_virtfn);
1300 /* allocate the vf array */
1301 bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
1302 BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
1303 if (!bp->vfdb->vfs) {
1304 BNX2X_ERR("failed to allocate vf array\n");
1309 /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
1310 for_each_vf(bp, i) {
1311 bnx2x_vf(bp, i, index) = i;
1312 bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
1313 bnx2x_vf(bp, i, state) = VF_FREE;
1314 mutex_init(&bnx2x_vf(bp, i, op_mutex));
1315 bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
1318 /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
1319 if (!bnx2x_get_vf_igu_cam_info(bp)) {
1320 BNX2X_ERR("No entries in IGU CAM for vfs\n");
1325 /* allocate the queue arrays for all VFs */
1326 bp->vfdb->vfqs = kzalloc(
1327 BNX2X_MAX_NUM_VF_QUEUES * sizeof(struct bnx2x_vf_queue),
1330 if (!bp->vfdb->vfqs) {
1331 BNX2X_ERR("failed to allocate vf queue array\n");
1336 /* Prepare the VFs event synchronization mechanism */
1337 mutex_init(&bp->vfdb->event_mutex);
1339 mutex_init(&bp->vfdb->bulletin_mutex);
1343 DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
1344 __bnx2x_iov_free_vfdb(bp);
1348 void bnx2x_iov_remove_one(struct bnx2x *bp)
1352 /* if SRIOV is not enabled there's nothing to do */
1356 bnx2x_disable_sriov(bp);
1358 /* disable access to all VFs */
1359 for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
1360 bnx2x_pretend_func(bp,
1362 bp->vfdb->sriov.first_vf_in_pf +
1364 DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
1365 bp->vfdb->sriov.first_vf_in_pf + vf_idx);
1366 bnx2x_vf_enable_internal(bp, 0);
1367 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1370 /* free vf database */
1371 __bnx2x_iov_free_vfdb(bp);
1374 void bnx2x_iov_free_mem(struct bnx2x *bp)
1381 /* free vfs hw contexts */
1382 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1383 struct hw_dma *cxt = &bp->vfdb->context[i];
1384 BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
1387 BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
1388 BP_VFDB(bp)->sp_dma.mapping,
1389 BP_VFDB(bp)->sp_dma.size);
1391 BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
1392 BP_VF_MBX_DMA(bp)->mapping,
1393 BP_VF_MBX_DMA(bp)->size);
1395 BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
1396 BP_VF_BULLETIN_DMA(bp)->mapping,
1397 BP_VF_BULLETIN_DMA(bp)->size);
1400 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
1408 /* allocate vfs hw contexts */
1409 tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
1410 BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
1412 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1413 struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
1414 cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
1417 cxt->addr = BNX2X_PCI_ALLOC(&cxt->mapping, cxt->size);
1424 tot_size -= cxt->size;
1427 /* allocate vfs ramrods dma memory - client_init and set_mac */
1428 tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
1429 BP_VFDB(bp)->sp_dma.addr = BNX2X_PCI_ALLOC(&BP_VFDB(bp)->sp_dma.mapping,
1431 if (!BP_VFDB(bp)->sp_dma.addr)
1433 BP_VFDB(bp)->sp_dma.size = tot_size;
1435 /* allocate mailboxes */
1436 tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
1437 BP_VF_MBX_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_MBX_DMA(bp)->mapping,
1439 if (!BP_VF_MBX_DMA(bp)->addr)
1442 BP_VF_MBX_DMA(bp)->size = tot_size;
1444 /* allocate local bulletin boards */
1445 tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
1446 BP_VF_BULLETIN_DMA(bp)->addr = BNX2X_PCI_ALLOC(&BP_VF_BULLETIN_DMA(bp)->mapping,
1448 if (!BP_VF_BULLETIN_DMA(bp)->addr)
1451 BP_VF_BULLETIN_DMA(bp)->size = tot_size;
1459 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
1460 struct bnx2x_vf_queue *q)
1462 u8 cl_id = vfq_cl_id(vf, q);
1463 u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
1464 unsigned long q_type = 0;
1466 set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
1467 set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
1469 /* Queue State object */
1470 bnx2x_init_queue_obj(bp, &q->sp_obj,
1471 cl_id, &q->cid, 1, func_id,
1472 bnx2x_vf_sp(bp, vf, q_data),
1473 bnx2x_vf_sp_map(bp, vf, q_data),
1476 /* sp indication is set only when vlan/mac/etc. are initialized */
1477 q->sp_initialized = false;
1480 "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
1481 vf->abs_vfid, q->sp_obj.func_id, q->cid);
1484 static int bnx2x_max_speed_cap(struct bnx2x *bp)
1486 u32 supported = bp->port.supported[bnx2x_get_link_cfg_idx(bp)];
1489 (SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full))
1492 return 10000; /* assume lowest supported speed is 10G */
1495 int bnx2x_iov_link_update_vf(struct bnx2x *bp, int idx)
1497 struct bnx2x_link_report_data *state = &bp->last_reported_link;
1498 struct pf_vf_bulletin_content *bulletin;
1499 struct bnx2x_virtf *vf;
1503 /* sanity and init */
1504 rc = bnx2x_vf_op_prep(bp, idx, &vf, &bulletin, false);
1508 mutex_lock(&bp->vfdb->bulletin_mutex);
1510 if (vf->link_cfg == IFLA_VF_LINK_STATE_AUTO) {
1511 bulletin->valid_bitmap |= 1 << LINK_VALID;
1513 bulletin->link_speed = state->line_speed;
1514 bulletin->link_flags = 0;
1515 if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1516 &state->link_report_flags))
1517 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1518 if (test_bit(BNX2X_LINK_REPORT_FD,
1519 &state->link_report_flags))
1520 bulletin->link_flags |= VFPF_LINK_REPORT_FULL_DUPLEX;
1521 if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
1522 &state->link_report_flags))
1523 bulletin->link_flags |= VFPF_LINK_REPORT_RX_FC_ON;
1524 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
1525 &state->link_report_flags))
1526 bulletin->link_flags |= VFPF_LINK_REPORT_TX_FC_ON;
1527 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_DISABLE &&
1528 !(bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1529 bulletin->valid_bitmap |= 1 << LINK_VALID;
1530 bulletin->link_flags |= VFPF_LINK_REPORT_LINK_DOWN;
1531 } else if (vf->link_cfg == IFLA_VF_LINK_STATE_ENABLE &&
1532 (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)) {
1533 bulletin->valid_bitmap |= 1 << LINK_VALID;
1534 bulletin->link_speed = bnx2x_max_speed_cap(bp);
1535 bulletin->link_flags &= ~VFPF_LINK_REPORT_LINK_DOWN;
1541 DP(NETIF_MSG_LINK | BNX2X_MSG_IOV,
1542 "vf %d mode %u speed %d flags %x\n", idx,
1543 vf->link_cfg, bulletin->link_speed, bulletin->link_flags);
1545 /* Post update on VF's bulletin board */
1546 rc = bnx2x_post_vf_bulletin(bp, idx);
1548 BNX2X_ERR("failed to update VF[%d] bulletin\n", idx);
1554 mutex_unlock(&bp->vfdb->bulletin_mutex);
1558 int bnx2x_set_vf_link_state(struct net_device *dev, int idx, int link_state)
1560 struct bnx2x *bp = netdev_priv(dev);
1561 struct bnx2x_virtf *vf = BP_VF(bp, idx);
1566 if (vf->link_cfg == link_state)
1567 return 0; /* nothing todo */
1569 vf->link_cfg = link_state;
1571 return bnx2x_iov_link_update_vf(bp, idx);
1574 void bnx2x_iov_link_update(struct bnx2x *bp)
1581 for_each_vf(bp, vfid)
1582 bnx2x_iov_link_update_vf(bp, vfid);
1585 /* called by bnx2x_nic_load */
1586 int bnx2x_iov_nic_init(struct bnx2x *bp)
1590 if (!IS_SRIOV(bp)) {
1591 DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
1595 DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
1597 /* let FLR complete ... */
1600 /* initialize vf database */
1601 for_each_vf(bp, vfid) {
1602 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1604 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
1607 union cdu_context *base_cxt = (union cdu_context *)
1608 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
1609 (base_vf_cid & (ILT_PAGE_CIDS-1));
1612 "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
1613 vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
1614 BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
1616 /* init statically provisioned resources */
1617 bnx2x_iov_static_resc(bp, vf);
1619 /* queues are initialized during VF-ACQUIRE */
1620 vf->filter_state = 0;
1621 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
1623 /* init mcast object - This object will be re-initialized
1624 * during VF-ACQUIRE with the proper cl_id and cid.
1625 * It needs to be initialized here so that it can be safely
1626 * handled by a subsequent FLR flow.
1628 vf->mcast_list_len = 0;
1629 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
1631 bnx2x_vf_sp(bp, vf, mcast_rdata),
1632 bnx2x_vf_sp_map(bp, vf, mcast_rdata),
1633 BNX2X_FILTER_MCAST_PENDING,
1635 BNX2X_OBJ_TYPE_RX_TX);
1637 /* set the mailbox message addresses */
1638 BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
1639 (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
1640 MBX_MSG_ALIGNED_SIZE);
1642 BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
1643 vfid * MBX_MSG_ALIGNED_SIZE;
1645 /* Enable vf mailbox */
1646 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1650 for_each_vf(bp, vfid) {
1651 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
1653 /* fill in the BDF and bars */
1654 vf->bus = bnx2x_vf_bus(bp, vfid);
1655 vf->devfn = bnx2x_vf_devfn(bp, vfid);
1656 bnx2x_vf_set_bars(bp, vf);
1659 "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
1660 vf->abs_vfid, vf->bus, vf->devfn,
1661 (unsigned)vf->bars[0].bar, vf->bars[0].size,
1662 (unsigned)vf->bars[1].bar, vf->bars[1].size,
1663 (unsigned)vf->bars[2].bar, vf->bars[2].size);
1669 /* called by bnx2x_chip_cleanup */
1670 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
1677 /* release all the VFs */
1679 bnx2x_vf_release(bp, BP_VF(bp, i));
1684 /* called by bnx2x_init_hw_func, returns the next ilt line */
1685 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
1688 struct bnx2x_ilt *ilt = BP_ILT(bp);
1693 /* set vfs ilt lines */
1694 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
1695 struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
1697 ilt->lines[line+i].page = hw_cxt->addr;
1698 ilt->lines[line+i].page_mapping = hw_cxt->mapping;
1699 ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
1704 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
1706 return ((cid >= BNX2X_FIRST_VF_CID) &&
1707 ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
1711 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
1712 struct bnx2x_vf_queue *vfq,
1713 union event_ring_elem *elem)
1715 unsigned long ramrod_flags = 0;
1718 /* Always push next commands out, don't wait here */
1719 set_bit(RAMROD_CONT, &ramrod_flags);
1721 switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
1722 case BNX2X_FILTER_MAC_PENDING:
1723 rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
1726 case BNX2X_FILTER_VLAN_PENDING:
1727 rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
1731 BNX2X_ERR("Unsupported classification command: %d\n",
1732 elem->message.data.eth_event.echo);
1736 BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
1738 DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
1742 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
1743 struct bnx2x_virtf *vf)
1745 struct bnx2x_mcast_ramrod_params rparam = {NULL};
1748 rparam.mcast_obj = &vf->mcast_obj;
1749 vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
1751 /* If there are pending mcast commands - send them */
1752 if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
1753 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1755 BNX2X_ERR("Failed to send pending mcast commands: %d\n",
1761 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
1762 struct bnx2x_virtf *vf)
1764 smp_mb__before_atomic();
1765 clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1766 smp_mb__after_atomic();
1769 static void bnx2x_vf_handle_rss_update_eqe(struct bnx2x *bp,
1770 struct bnx2x_virtf *vf)
1772 vf->rss_conf_obj.raw.clear_pending(&vf->rss_conf_obj.raw);
1775 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
1777 struct bnx2x_virtf *vf;
1778 int qidx = 0, abs_vfid;
1785 /* first get the cid - the only events we handle here are cfc-delete
1786 * and set-mac completion
1788 opcode = elem->message.opcode;
1791 case EVENT_RING_OPCODE_CFC_DEL:
1792 cid = SW_CID((__force __le32)
1793 elem->message.data.cfc_del_event.cid);
1794 DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
1796 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1797 case EVENT_RING_OPCODE_MULTICAST_RULES:
1798 case EVENT_RING_OPCODE_FILTERS_RULES:
1799 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1800 cid = (elem->message.data.eth_event.echo &
1802 DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
1804 case EVENT_RING_OPCODE_VF_FLR:
1805 abs_vfid = elem->message.data.vf_flr_event.vf_id;
1806 DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
1809 case EVENT_RING_OPCODE_MALICIOUS_VF:
1810 abs_vfid = elem->message.data.malicious_vf_event.vf_id;
1811 BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
1813 elem->message.data.malicious_vf_event.err_id);
1819 /* check if the cid is the VF range */
1820 if (!bnx2x_iov_is_vf_cid(bp, cid)) {
1821 DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
1825 /* extract vf and rxq index from vf_cid - relies on the following:
1826 * 1. vfid on cid reflects the true abs_vfid
1827 * 2. The max number of VFs (per path) is 64
1829 qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
1830 abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1832 vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1835 BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
1841 case EVENT_RING_OPCODE_CFC_DEL:
1842 DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
1843 vf->abs_vfid, qidx);
1844 vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
1847 BNX2X_Q_CMD_CFC_DEL);
1849 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
1850 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
1851 vf->abs_vfid, qidx);
1852 bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
1854 case EVENT_RING_OPCODE_MULTICAST_RULES:
1855 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
1856 vf->abs_vfid, qidx);
1857 bnx2x_vf_handle_mcast_eqe(bp, vf);
1859 case EVENT_RING_OPCODE_FILTERS_RULES:
1860 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
1861 vf->abs_vfid, qidx);
1862 bnx2x_vf_handle_filters_eqe(bp, vf);
1864 case EVENT_RING_OPCODE_RSS_UPDATE_RULES:
1865 DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
1866 vf->abs_vfid, qidx);
1867 bnx2x_vf_handle_rss_update_eqe(bp, vf);
1868 case EVENT_RING_OPCODE_VF_FLR:
1869 case EVENT_RING_OPCODE_MALICIOUS_VF:
1870 /* Do nothing for now */
1877 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
1879 /* extract the vf from vf_cid - relies on the following:
1880 * 1. vfid on cid reflects the true abs_vfid
1881 * 2. The max number of VFs (per path) is 64
1883 int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
1884 return bnx2x_vf_by_abs_fid(bp, abs_vfid);
1887 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
1888 struct bnx2x_queue_sp_obj **q_obj)
1890 struct bnx2x_virtf *vf;
1895 vf = bnx2x_vf_by_cid(bp, vf_cid);
1898 /* extract queue index from vf_cid - relies on the following:
1899 * 1. vfid on cid reflects the true abs_vfid
1900 * 2. The max number of VFs (per path) is 64
1902 int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
1903 *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
1905 BNX2X_ERR("No vf matching cid %d\n", vf_cid);
1909 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
1912 int first_queue_query_index, num_queues_req;
1913 dma_addr_t cur_data_offset;
1914 struct stats_query_entry *cur_query_entry;
1916 bool is_fcoe = false;
1924 /* fcoe adds one global request and one queue request */
1925 num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
1926 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
1929 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1930 "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
1931 BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
1932 first_queue_query_index + num_queues_req);
1934 cur_data_offset = bp->fw_stats_data_mapping +
1935 offsetof(struct bnx2x_fw_stats_data, queue_stats) +
1936 num_queues_req * sizeof(struct per_queue_stats);
1938 cur_query_entry = &bp->fw_stats_req->
1939 query[first_queue_query_index + num_queues_req];
1941 for_each_vf(bp, i) {
1943 struct bnx2x_virtf *vf = BP_VF(bp, i);
1945 if (vf->state != VF_ENABLED) {
1946 DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS),
1947 "vf %d not enabled so no stats for it\n",
1952 DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
1953 for_each_vfq(vf, j) {
1954 struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
1956 dma_addr_t q_stats_addr =
1957 vf->fw_stat_map + j * vf->stats_stride;
1959 /* collect stats fro active queues only */
1960 if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
1961 BNX2X_Q_LOGICAL_STATE_STOPPED)
1964 /* create stats query entry for this queue */
1965 cur_query_entry->kind = STATS_TYPE_QUEUE;
1966 cur_query_entry->index = vfq_stat_id(vf, rxq);
1967 cur_query_entry->funcID =
1968 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
1969 cur_query_entry->address.hi =
1970 cpu_to_le32(U64_HI(q_stats_addr));
1971 cur_query_entry->address.lo =
1972 cpu_to_le32(U64_LO(q_stats_addr));
1974 "added address %x %x for vf %d queue %d client %d\n",
1975 cur_query_entry->address.hi,
1976 cur_query_entry->address.lo, cur_query_entry->funcID,
1977 j, cur_query_entry->index);
1979 cur_data_offset += sizeof(struct per_queue_stats);
1982 /* all stats are coalesced to the leading queue */
1983 if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
1987 bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
1990 /* VF API helpers */
1991 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
1994 u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
1995 u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
1997 REG_WR(bp, reg, val);
2000 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
2005 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2006 vfq_qzone_id(vf, vfq_get(vf, i)), false);
2009 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
2013 /* clear the VF configuration - pretend */
2014 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
2015 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
2016 val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
2017 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
2018 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
2019 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2022 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
2024 return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
2025 BNX2X_VF_MAX_QUEUES);
2029 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
2030 struct vf_pf_resc_request *req_resc)
2032 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2033 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2035 /* Save a vlan filter for the Hypervisor */
2036 return ((req_resc->num_rxqs <= rxq_cnt) &&
2037 (req_resc->num_txqs <= txq_cnt) &&
2038 (req_resc->num_sbs <= vf_sb_count(vf)) &&
2039 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
2040 (req_resc->num_vlan_filters <= vf_vlan_rules_visible_cnt(vf)));
2044 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
2045 struct vf_pf_resc_request *resc)
2047 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2050 union cdu_context *base_cxt = (union cdu_context *)
2051 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2052 (base_vf_cid & (ILT_PAGE_CIDS-1));
2055 /* if state is 'acquired' the VF was not released or FLR'd, in
2056 * this case the returned resources match the acquired already
2057 * acquired resources. Verify that the requested numbers do
2058 * not exceed the already acquired numbers.
2060 if (vf->state == VF_ACQUIRED) {
2061 DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2064 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2065 BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2072 /* Otherwise vf state must be 'free' or 'reset' */
2073 if (vf->state != VF_FREE && vf->state != VF_RESET) {
2074 BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2075 vf->abs_vfid, vf->state);
2079 /* static allocation:
2080 * the global maximum number are fixed per VF. Fail the request if
2081 * requested number exceed these globals
2083 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2085 "cannot fulfill vf resource request. Placing maximal available values in response\n");
2086 /* set the max resource in the vf */
2090 /* Set resources counters - 0 request means max available */
2091 vf_sb_count(vf) = resc->num_sbs;
2092 vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2093 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2094 if (resc->num_mac_filters)
2095 vf_mac_rules_cnt(vf) = resc->num_mac_filters;
2096 /* Add an additional vlan filter credit for the hypervisor */
2097 bnx2x_iov_re_set_vlan_filters(bp, vf, resc->num_vlan_filters + 1);
2100 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2101 vf_sb_count(vf), vf_rxq_count(vf),
2102 vf_txq_count(vf), vf_mac_rules_cnt(vf),
2103 vf_vlan_rules_visible_cnt(vf));
2105 /* Initialize the queues */
2107 DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2111 for_each_vfq(vf, i) {
2112 struct bnx2x_vf_queue *q = vfq_get(vf, i);
2115 BNX2X_ERR("q number %d was not allocated\n", i);
2120 q->cxt = &((base_cxt + i)->eth);
2121 q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2123 DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2124 vf->abs_vfid, i, q->index, q->cid, q->cxt);
2126 /* init SP objects */
2127 bnx2x_vfq_init(bp, vf, q);
2129 vf->state = VF_ACQUIRED;
2133 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2135 struct bnx2x_func_init_params func_init = {0};
2139 /* the sb resources are initialized at this point, do the
2140 * FW/HW initializations
2142 for_each_vf_sb(vf, i)
2143 bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2144 vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2147 if (vf->state != VF_ACQUIRED) {
2148 DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2149 vf->abs_vfid, vf->state);
2153 /* let FLR complete ... */
2156 /* FLR cleanup epilogue */
2157 if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2160 /* reset IGU VF statistics: MSIX */
2161 REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2164 if (vf->cfg_flags & VF_CFG_STATS)
2165 flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ);
2167 if (vf->cfg_flags & VF_CFG_TPA)
2168 flags |= FUNC_FLG_TPA;
2170 if (is_vf_multi(vf))
2171 flags |= FUNC_FLG_RSS;
2173 /* function setup */
2174 func_init.func_flgs = flags;
2175 func_init.pf_id = BP_FUNC(bp);
2176 func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2177 func_init.fw_stat_map = vf->fw_stat_map;
2178 func_init.spq_map = vf->spq_map;
2179 func_init.spq_prod = 0;
2180 bnx2x_func_init(bp, &func_init);
2183 bnx2x_vf_enable_access(bp, vf->abs_vfid);
2184 bnx2x_vf_enable_traffic(bp, vf);
2186 /* queue protection table */
2188 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2189 vfq_qzone_id(vf, vfq_get(vf, i)), true);
2191 vf->state = VF_ENABLED;
2193 /* update vf bulletin board */
2194 bnx2x_post_vf_bulletin(bp, vf->index);
2199 struct set_vf_state_cookie {
2200 struct bnx2x_virtf *vf;
2204 static void bnx2x_set_vf_state(void *cookie)
2206 struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2208 p->vf->state = p->state;
2211 int bnx2x_vf_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2215 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2217 /* Close all queues */
2218 for (i = 0; i < vf_rxq_count(vf); i++) {
2219 rc = bnx2x_vf_queue_teardown(bp, vf, i);
2224 /* disable the interrupts */
2225 DP(BNX2X_MSG_IOV, "disabling igu\n");
2226 bnx2x_vf_igu_disable(bp, vf);
2228 /* disable the VF */
2229 DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2230 bnx2x_vf_clr_qtbl(bp, vf);
2232 /* need to make sure there are no outstanding stats ramrods which may
2233 * cause the device to access the VF's stats buffer which it will free
2234 * as soon as we return from the close flow.
2237 struct set_vf_state_cookie cookie;
2240 cookie.state = VF_ACQUIRED;
2241 bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2244 DP(BNX2X_MSG_IOV, "set state to acquired\n");
2248 BNX2X_ERR("vf[%d] CLOSE error: rc %d\n", vf->abs_vfid, rc);
2252 /* VF release can be called either: 1. The VF was acquired but
2253 * not enabled 2. the vf was enabled or in the process of being
2256 int bnx2x_vf_free(struct bnx2x *bp, struct bnx2x_virtf *vf)
2260 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2261 vf->state == VF_FREE ? "Free" :
2262 vf->state == VF_ACQUIRED ? "Acquired" :
2263 vf->state == VF_ENABLED ? "Enabled" :
2264 vf->state == VF_RESET ? "Reset" :
2267 switch (vf->state) {
2269 rc = bnx2x_vf_close(bp, vf);
2272 /* Fallthrough to release resources */
2274 DP(BNX2X_MSG_IOV, "about to free resources\n");
2275 bnx2x_vf_free_resc(bp, vf);
2285 BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, rc);
2289 int bnx2x_vf_rss_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2290 struct bnx2x_config_rss_params *rss)
2292 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2293 set_bit(RAMROD_COMP_WAIT, &rss->ramrod_flags);
2294 return bnx2x_config_rss(bp, rss);
2297 int bnx2x_vf_tpa_update(struct bnx2x *bp, struct bnx2x_virtf *vf,
2298 struct vfpf_tpa_tlv *tlv,
2299 struct bnx2x_queue_update_tpa_params *params)
2301 aligned_u64 *sge_addr = tlv->tpa_client_info.sge_addr;
2302 struct bnx2x_queue_state_params qstate;
2305 DP(BNX2X_MSG_IOV, "vf[%d]\n", vf->abs_vfid);
2307 /* Set ramrod params */
2308 memset(&qstate, 0, sizeof(struct bnx2x_queue_state_params));
2309 memcpy(&qstate.params.update_tpa, params,
2310 sizeof(struct bnx2x_queue_update_tpa_params));
2311 qstate.cmd = BNX2X_Q_CMD_UPDATE_TPA;
2312 set_bit(RAMROD_COMP_WAIT, &qstate.ramrod_flags);
2314 for (qid = 0; qid < vf_rxq_count(vf); qid++) {
2315 qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
2316 qstate.params.update_tpa.sge_map = sge_addr[qid];
2317 DP(BNX2X_MSG_IOV, "sge_addr[%d:%d] %08x:%08x\n",
2318 vf->abs_vfid, qid, U64_HI(sge_addr[qid]),
2319 U64_LO(sge_addr[qid]));
2320 rc = bnx2x_queue_state_change(bp, &qstate);
2322 BNX2X_ERR("Failed to configure sge_addr %08x:%08x for [%d:%d]\n",
2323 U64_HI(sge_addr[qid]), U64_LO(sge_addr[qid]),
2332 /* VF release ~ VF close + VF release-resources
2333 * Release is the ultimate SW shutdown and is called whenever an
2334 * irrecoverable error is encountered.
2336 int bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2340 DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
2341 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2343 rc = bnx2x_vf_free(bp, vf);
2346 "VF[%d] Failed to allocate resources for release op- rc=%d\n",
2348 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
2352 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2353 enum channel_tlvs tlv)
2355 /* we don't lock the channel for unsupported tlvs */
2356 if (!bnx2x_tlv_supported(tlv)) {
2357 BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
2361 /* lock the channel */
2362 mutex_lock(&vf->op_mutex);
2364 /* record the locking op */
2365 vf->op_current = tlv;
2368 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
2372 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
2373 enum channel_tlvs expected_tlv)
2375 enum channel_tlvs current_tlv;
2378 BNX2X_ERR("VF was %p\n", vf);
2382 current_tlv = vf->op_current;
2384 /* we don't unlock the channel for unsupported tlvs */
2385 if (!bnx2x_tlv_supported(expected_tlv))
2388 WARN(expected_tlv != vf->op_current,
2389 "lock mismatch: expected %d found %d", expected_tlv,
2392 /* record the locking op */
2393 vf->op_current = CHANNEL_TLV_NONE;
2395 /* lock the channel */
2396 mutex_unlock(&vf->op_mutex);
2398 /* log the unlock */
2399 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
2400 vf->abs_vfid, current_tlv);
2403 static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
2405 struct bnx2x_queue_state_params q_params;
2409 /* Verify changes are needed and record current Tx switching state */
2410 prev_flags = bp->flags;
2412 bp->flags |= TX_SWITCHING;
2414 bp->flags &= ~TX_SWITCHING;
2415 if (prev_flags == bp->flags)
2418 /* Verify state enables the sending of queue ramrods */
2419 if ((bp->state != BNX2X_STATE_OPEN) ||
2420 (bnx2x_get_q_logical_state(bp,
2421 &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
2422 BNX2X_Q_LOGICAL_STATE_ACTIVE))
2425 /* send q. update ramrod to configure Tx switching */
2426 memset(&q_params, 0, sizeof(q_params));
2427 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2428 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2429 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
2430 &q_params.params.update.update_flags);
2432 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2433 &q_params.params.update.update_flags);
2435 __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
2436 &q_params.params.update.update_flags);
2438 /* send the ramrod on all the queues of the PF */
2439 for_each_eth_queue(bp, i) {
2440 struct bnx2x_fastpath *fp = &bp->fp[i];
2442 /* Set the appropriate Queue object */
2443 q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
2445 /* Update the Queue state */
2446 rc = bnx2x_queue_state_change(bp, &q_params);
2448 BNX2X_ERR("Failed to configure Tx switching\n");
2453 DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
2457 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
2459 struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
2461 if (!IS_SRIOV(bp)) {
2462 BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
2466 DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
2467 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2469 /* HW channel is only operational when PF is up */
2470 if (bp->state != BNX2X_STATE_OPEN) {
2471 BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
2475 /* we are always bound by the total_vfs in the configuration space */
2476 if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
2477 BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
2478 num_vfs_param, BNX2X_NR_VIRTFN(bp));
2479 num_vfs_param = BNX2X_NR_VIRTFN(bp);
2482 bp->requested_nr_virtfn = num_vfs_param;
2483 if (num_vfs_param == 0) {
2484 bnx2x_set_pf_tx_switching(bp, false);
2485 bnx2x_disable_sriov(bp);
2488 return bnx2x_enable_sriov(bp);
2492 #define IGU_ENTRY_SIZE 4
2494 int bnx2x_enable_sriov(struct bnx2x *bp)
2496 int rc = 0, req_vfs = bp->requested_nr_virtfn;
2497 int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
2498 u32 igu_entry, address;
2504 first_vf = bp->vfdb->sriov.first_vf_in_pf;
2506 /* statically distribute vf sb pool between VFs */
2507 num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
2508 BP_VFDB(bp)->vf_sbs_pool / req_vfs);
2510 /* zero previous values learned from igu cam */
2511 for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
2512 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2515 vf_sb_count(BP_VF(bp, vf_idx)) = 0;
2517 bp->vfdb->vf_sbs_pool = 0;
2519 /* prepare IGU cam */
2520 sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
2521 address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
2522 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2523 for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
2524 igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
2525 vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
2526 IGU_REG_MAPPING_MEMORY_VALID;
2527 DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
2529 REG_WR(bp, address, igu_entry);
2531 address += IGU_ENTRY_SIZE;
2535 /* Reinitialize vf database according to igu cam */
2536 bnx2x_get_vf_igu_cam_info(bp);
2538 DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
2539 BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
2542 for_each_vf(bp, vf_idx) {
2543 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
2545 /* set local queue arrays */
2546 vf->vfqs = &bp->vfdb->vfqs[qcount];
2547 qcount += vf_sb_count(vf);
2548 bnx2x_iov_static_resc(bp, vf);
2551 /* prepare msix vectors in VF configuration space - the value in the
2552 * PCI configuration space should be the index of the last entry,
2553 * namely one less than the actual size of the table
2555 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
2556 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
2557 REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
2559 DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
2560 vf_idx, num_vf_queues - 1);
2562 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2564 /* enable sriov. This will probe all the VFs, and consequentially cause
2565 * the "acquire" messages to appear on the VF PF channel.
2567 DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
2568 bnx2x_disable_sriov(bp);
2570 rc = bnx2x_set_pf_tx_switching(bp, true);
2574 rc = pci_enable_sriov(bp->pdev, req_vfs);
2576 BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
2579 DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
2583 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
2586 struct pf_vf_bulletin_content *bulletin;
2588 DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
2589 for_each_vf(bp, vfidx) {
2590 bulletin = BP_VF_BULLETIN(bp, vfidx);
2591 if (BP_VF(bp, vfidx)->cfg_flags & VF_CFG_VLAN)
2592 bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0);
2596 void bnx2x_disable_sriov(struct bnx2x *bp)
2598 if (pci_vfs_assigned(bp->pdev)) {
2600 "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2604 pci_disable_sriov(bp->pdev);
2607 static int bnx2x_vf_op_prep(struct bnx2x *bp, int vfidx,
2608 struct bnx2x_virtf **vf,
2609 struct pf_vf_bulletin_content **bulletin,
2612 if (bp->state != BNX2X_STATE_OPEN) {
2613 BNX2X_ERR("PF is down - can't utilize iov-related functionality\n");
2617 if (!IS_SRIOV(bp)) {
2618 BNX2X_ERR("sriov is disabled - can't utilize iov-related functionality\n");
2622 if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
2623 BNX2X_ERR("VF is uninitialized - can't utilize iov-related functionality. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
2624 vfidx, BNX2X_NR_VIRTFN(bp));
2629 *vf = BP_VF(bp, vfidx);
2630 *bulletin = BP_VF_BULLETIN(bp, vfidx);
2633 BNX2X_ERR("Unable to get VF structure for vfidx %d\n", vfidx);
2637 if (test_queue && !(*vf)->vfqs) {
2638 BNX2X_ERR("vfqs struct is null. Was this invoked before dynamically enabling SR-IOV? vfidx was %d\n",
2644 BNX2X_ERR("Bulletin Board struct is null for vfidx %d\n",
2652 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
2653 struct ifla_vf_info *ivi)
2655 struct bnx2x *bp = netdev_priv(dev);
2656 struct bnx2x_virtf *vf = NULL;
2657 struct pf_vf_bulletin_content *bulletin = NULL;
2658 struct bnx2x_vlan_mac_obj *mac_obj;
2659 struct bnx2x_vlan_mac_obj *vlan_obj;
2662 /* sanity and init */
2663 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2667 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2668 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2669 if (!mac_obj || !vlan_obj) {
2670 BNX2X_ERR("VF partially initialized\n");
2676 ivi->max_tx_rate = 10000; /* always 10G. TBA take from link struct */
2677 ivi->min_tx_rate = 0;
2678 ivi->spoofchk = 1; /*always enabled */
2679 if (vf->state == VF_ENABLED) {
2680 /* mac and vlan are in vlan_mac objects */
2681 if (bnx2x_validate_vf_sp_objs(bp, vf, false)) {
2682 mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
2684 vlan_obj->get_n_elements(bp, vlan_obj, 1,
2685 (u8 *)&ivi->vlan, 0,
2689 mutex_lock(&bp->vfdb->bulletin_mutex);
2691 if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
2692 /* mac configured by ndo so its in bulletin board */
2693 memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
2695 /* function has not been loaded yet. Show mac as 0s */
2696 memset(&ivi->mac, 0, ETH_ALEN);
2699 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
2700 /* vlan configured by ndo so its in bulletin board */
2701 memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
2703 /* function has not been loaded yet. Show vlans as 0s */
2704 memset(&ivi->vlan, 0, VLAN_HLEN);
2706 mutex_unlock(&bp->vfdb->bulletin_mutex);
2712 /* New mac for VF. Consider these cases:
2713 * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
2714 * supply at acquire.
2715 * 2. VF has already been acquired but has not yet initialized - store in local
2716 * bulletin board. mac will be posted on VF bulletin board after VF init. VF
2717 * will configure this mac when it is ready.
2718 * 3. VF has already initialized but has not yet setup a queue - post the new
2719 * mac on VF's bulletin board right now. VF will configure this mac when it
2721 * 4. VF has already set a queue - delete any macs already configured for this
2722 * queue and manually config the new mac.
2723 * In any event, once this function has been called refuse any attempts by the
2724 * VF to configure any mac for itself except for this mac. In case of a race
2725 * where the VF fails to see the new post on its bulletin board before sending a
2726 * mac configuration request, the PF will simply fail the request and VF can try
2727 * again after consulting its bulletin board.
2729 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
2731 struct bnx2x *bp = netdev_priv(dev);
2732 int rc, q_logical_state;
2733 struct bnx2x_virtf *vf = NULL;
2734 struct pf_vf_bulletin_content *bulletin = NULL;
2736 if (!is_valid_ether_addr(mac)) {
2737 BNX2X_ERR("mac address invalid\n");
2741 /* sanity and init */
2742 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2746 mutex_lock(&bp->vfdb->bulletin_mutex);
2748 /* update PF's copy of the VF's bulletin. Will no longer accept mac
2749 * configuration requests from vf unless match this mac
2751 bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
2752 memcpy(bulletin->mac, mac, ETH_ALEN);
2754 /* Post update on VF's bulletin board */
2755 rc = bnx2x_post_vf_bulletin(bp, vfidx);
2757 /* release lock before checking return code */
2758 mutex_unlock(&bp->vfdb->bulletin_mutex);
2761 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
2766 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
2767 if (vf->state == VF_ENABLED &&
2768 q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
2769 /* configure the mac in device on this vf's queue */
2770 unsigned long ramrod_flags = 0;
2771 struct bnx2x_vlan_mac_obj *mac_obj;
2773 /* User should be able to see failure reason in system logs */
2774 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2777 /* must lock vfpf channel to protect against vf flows */
2778 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2780 /* remove existing eth macs */
2781 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
2782 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
2784 BNX2X_ERR("failed to delete eth macs\n");
2789 /* remove existing uc list macs */
2790 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
2792 BNX2X_ERR("failed to delete uc_list macs\n");
2797 /* configure the new mac to device */
2798 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2799 bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
2800 BNX2X_ETH_MAC, &ramrod_flags);
2803 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
2809 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos)
2811 struct bnx2x_queue_state_params q_params = {NULL};
2812 struct bnx2x_vlan_mac_ramrod_params ramrod_param;
2813 struct bnx2x_queue_update_params *update_params;
2814 struct pf_vf_bulletin_content *bulletin = NULL;
2815 struct bnx2x_rx_mode_ramrod_params rx_ramrod;
2816 struct bnx2x *bp = netdev_priv(dev);
2817 struct bnx2x_vlan_mac_obj *vlan_obj;
2818 unsigned long vlan_mac_flags = 0;
2819 unsigned long ramrod_flags = 0;
2820 struct bnx2x_virtf *vf = NULL;
2821 unsigned long accept_flags;
2825 BNX2X_ERR("illegal vlan value %d\n", vlan);
2829 DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
2832 /* sanity and init */
2833 rc = bnx2x_vf_op_prep(bp, vfidx, &vf, &bulletin, true);
2837 /* update PF's copy of the VF's bulletin. No point in posting the vlan
2838 * to the VF since it doesn't have anything to do with it. But it useful
2839 * to store it here in case the VF is not up yet and we can only
2840 * configure the vlan later when it does. Treat vlan id 0 as remove the
2843 mutex_lock(&bp->vfdb->bulletin_mutex);
2846 bulletin->valid_bitmap |= 1 << VLAN_VALID;
2848 bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
2849 bulletin->vlan = vlan;
2851 mutex_unlock(&bp->vfdb->bulletin_mutex);
2853 /* is vf initialized and queue set up? */
2854 if (vf->state != VF_ENABLED ||
2855 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
2856 BNX2X_Q_LOGICAL_STATE_ACTIVE)
2859 /* User should be able to see error in system logs */
2860 if (!bnx2x_validate_vf_sp_objs(bp, vf, true))
2863 /* must lock vfpf channel to protect against vf flows */
2864 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2866 /* remove existing vlans */
2867 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2868 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
2869 rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
2872 BNX2X_ERR("failed to delete vlans\n");
2877 /* need to remove/add the VF's accept_any_vlan bit */
2878 accept_flags = bnx2x_leading_vfq(vf, accept_flags);
2880 clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2882 set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
2884 bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
2886 bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
2887 bnx2x_config_rx_mode(bp, &rx_ramrod);
2889 /* configure the new vlan to device */
2890 memset(&ramrod_param, 0, sizeof(ramrod_param));
2891 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
2892 ramrod_param.vlan_mac_obj = vlan_obj;
2893 ramrod_param.ramrod_flags = ramrod_flags;
2894 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
2895 &ramrod_param.user_req.vlan_mac_flags);
2896 ramrod_param.user_req.u.vlan.vlan = vlan;
2897 ramrod_param.user_req.cmd = BNX2X_VLAN_MAC_ADD;
2898 rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
2900 BNX2X_ERR("failed to configure vlan\n");
2905 /* send queue update ramrod to configure default vlan and silent
2908 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
2909 q_params.cmd = BNX2X_Q_CMD_UPDATE;
2910 q_params.q_obj = &bnx2x_leading_vfq(vf, sp_obj);
2911 update_params = &q_params.params.update;
2912 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
2913 &update_params->update_flags);
2914 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
2915 &update_params->update_flags);
2917 /* if vlan is 0 then we want to leave the VF traffic
2918 * untagged, and leave the incoming traffic untouched
2919 * (i.e. do not remove any vlan tags).
2921 __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2922 &update_params->update_flags);
2923 __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2924 &update_params->update_flags);
2926 /* configure default vlan to vf queue and set silent
2927 * vlan removal (the vf remains unaware of this vlan).
2929 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
2930 &update_params->update_flags);
2931 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
2932 &update_params->update_flags);
2933 update_params->def_vlan = vlan;
2934 update_params->silent_removal_value =
2935 vlan & VLAN_VID_MASK;
2936 update_params->silent_removal_mask = VLAN_VID_MASK;
2939 /* Update the Queue state */
2940 rc = bnx2x_queue_state_change(bp, &q_params);
2942 BNX2X_ERR("Failed to configure default VLAN\n");
2947 /* clear the flag indicating that this VF needs its vlan
2948 * (will only be set if the HV configured the Vlan before vf was
2949 * up and we were called because the VF came up later
2952 vf->cfg_flags &= ~VF_CFG_VLAN;
2953 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
2958 /* crc is the first field in the bulletin board. Compute the crc over the
2959 * entire bulletin board excluding the crc field itself. Use the length field
2960 * as the Bulletin Board was posted by a PF with possibly a different version
2961 * from the vf which will sample it. Therefore, the length is computed by the
2962 * PF and then used blindly by the VF.
2964 u32 bnx2x_crc_vf_bulletin(struct pf_vf_bulletin_content *bulletin)
2966 return crc32(BULLETIN_CRC_SEED,
2967 ((u8 *)bulletin) + sizeof(bulletin->crc),
2968 bulletin->length - sizeof(bulletin->crc));
2971 /* Check for new posts on the bulletin board */
2972 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
2974 struct pf_vf_bulletin_content *bulletin;
2977 /* sampling structure in mid post may result with corrupted data
2978 * validate crc to ensure coherency.
2980 for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
2983 /* sample the bulletin board */
2984 memcpy(&bp->shadow_bulletin, bp->pf2vf_bulletin,
2985 sizeof(union pf_vf_bulletin));
2987 crc = bnx2x_crc_vf_bulletin(&bp->shadow_bulletin.content);
2989 if (bp->shadow_bulletin.content.crc == crc)
2992 BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
2993 bp->shadow_bulletin.content.crc, crc);
2996 if (attempts >= BULLETIN_ATTEMPTS) {
2997 BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
2999 return PFVF_BULLETIN_CRC_ERR;
3001 bulletin = &bp->shadow_bulletin.content;
3003 /* bulletin board hasn't changed since last sample */
3004 if (bp->old_bulletin.version == bulletin->version)
3005 return PFVF_BULLETIN_UNCHANGED;
3007 /* the mac address in bulletin board is valid and is new */
3008 if (bulletin->valid_bitmap & 1 << MAC_ADDR_VALID &&
3009 !ether_addr_equal(bulletin->mac, bp->old_bulletin.mac)) {
3010 /* update new mac to net device */
3011 memcpy(bp->dev->dev_addr, bulletin->mac, ETH_ALEN);
3014 if (bulletin->valid_bitmap & (1 << LINK_VALID)) {
3015 DP(BNX2X_MSG_IOV, "link update speed %d flags %x\n",
3016 bulletin->link_speed, bulletin->link_flags);
3018 bp->vf_link_vars.line_speed = bulletin->link_speed;
3019 bp->vf_link_vars.link_report_flags = 0;
3021 if (bulletin->link_flags & VFPF_LINK_REPORT_LINK_DOWN)
3022 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
3023 &bp->vf_link_vars.link_report_flags);
3025 if (bulletin->link_flags & VFPF_LINK_REPORT_FULL_DUPLEX)
3026 __set_bit(BNX2X_LINK_REPORT_FD,
3027 &bp->vf_link_vars.link_report_flags);
3028 /* Rx Flow Control is ON */
3029 if (bulletin->link_flags & VFPF_LINK_REPORT_RX_FC_ON)
3030 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON,
3031 &bp->vf_link_vars.link_report_flags);
3032 /* Tx Flow Control is ON */
3033 if (bulletin->link_flags & VFPF_LINK_REPORT_TX_FC_ON)
3034 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON,
3035 &bp->vf_link_vars.link_report_flags);
3036 __bnx2x_link_report(bp);
3039 /* copy new bulletin board to bp */
3040 memcpy(&bp->old_bulletin, bulletin,
3041 sizeof(struct pf_vf_bulletin_content));
3043 return PFVF_BULLETIN_UPDATED;
3046 void bnx2x_timer_sriov(struct bnx2x *bp)
3048 bnx2x_sample_bulletin(bp);
3050 /* if channel is down we need to self destruct */
3051 if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN)
3052 bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3056 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3058 /* vf doorbells are embedded within the regview */
3059 return bp->regview + PXP_VF_ADDR_DB_START;
3062 void bnx2x_vf_pci_dealloc(struct bnx2x *bp)
3064 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3065 sizeof(struct bnx2x_vf_mbx_msg));
3066 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
3067 sizeof(union pf_vf_bulletin));
3070 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3072 mutex_init(&bp->vf2pf_mutex);
3074 /* allocate vf2pf mailbox for vf to pf channel */
3075 bp->vf2pf_mbox = BNX2X_PCI_ALLOC(&bp->vf2pf_mbox_mapping,
3076 sizeof(struct bnx2x_vf_mbx_msg));
3077 if (!bp->vf2pf_mbox)
3080 /* allocate pf 2 vf bulletin board */
3081 bp->pf2vf_bulletin = BNX2X_PCI_ALLOC(&bp->pf2vf_bulletin_mapping,
3082 sizeof(union pf_vf_bulletin));
3083 if (!bp->pf2vf_bulletin)
3086 bnx2x_vf_bulletin_finalize(&bp->pf2vf_bulletin->content, true);
3091 bnx2x_vf_pci_dealloc(bp);
3095 void bnx2x_iov_channel_down(struct bnx2x *bp)
3098 struct pf_vf_bulletin_content *bulletin;
3103 for_each_vf(bp, vf_idx) {
3104 /* locate this VFs bulletin board and update the channel down
3107 bulletin = BP_VF_BULLETIN(bp, vf_idx);
3108 bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3110 /* update vf bulletin board */
3111 bnx2x_post_vf_bulletin(bp, vf_idx);
3115 void bnx2x_iov_task(struct work_struct *work)
3117 struct bnx2x *bp = container_of(work, struct bnx2x, iov_task.work);
3119 if (!netif_running(bp->dev))
3122 if (test_and_clear_bit(BNX2X_IOV_HANDLE_FLR,
3123 &bp->iov_task_state))
3124 bnx2x_vf_handle_flr_event(bp);
3126 if (test_and_clear_bit(BNX2X_IOV_HANDLE_VF_MSG,
3127 &bp->iov_task_state))
3131 void bnx2x_schedule_iov_task(struct bnx2x *bp, enum bnx2x_iov_flag flag)
3133 smp_mb__before_atomic();
3134 set_bit(flag, &bp->iov_task_state);
3135 smp_mb__after_atomic();
3136 DP(BNX2X_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3137 queue_delayed_work(bnx2x_iov_wq, &bp->iov_task, 0);