2 * Broadcom BCM7xxx System Port Ethernet MAC driver
4 * Copyright (C) 2014 Broadcom Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
28 #include "bcmsysport.h"
30 /* I/O accessors register helpers */
31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
34 u32 reg = __raw_readl(priv->base + offset + off); \
37 static inline void name##_writel(struct bcm_sysport_priv *priv, \
40 __raw_writel(val, priv->base + offset + off); \
43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
55 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
57 #define BCM_SYSPORT_INTR_L2(which) \
58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
61 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
62 priv->irq##which##_mask &= ~(mask); \
64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
67 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
68 priv->irq##which##_mask |= (mask); \
71 BCM_SYSPORT_INTR_L2(0)
72 BCM_SYSPORT_INTR_L2(1)
74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
75 * nanoseconds), so keep the check for 64-bits explicit here to save
76 * one register write per-packet on 32-bits platforms.
78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
83 __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
84 d + DESC_ADDR_HI_STATUS_LEN);
86 __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
90 struct dma_desc *desc,
93 /* Ports are latched, so write upper address first */
94 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
95 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
98 /* Ethtool operations */
99 static int bcm_sysport_set_settings(struct net_device *dev,
100 struct ethtool_cmd *cmd)
102 struct bcm_sysport_priv *priv = netdev_priv(dev);
104 if (!netif_running(dev))
107 return phy_ethtool_sset(priv->phydev, cmd);
110 static int bcm_sysport_get_settings(struct net_device *dev,
111 struct ethtool_cmd *cmd)
113 struct bcm_sysport_priv *priv = netdev_priv(dev);
115 if (!netif_running(dev))
118 return phy_ethtool_gset(priv->phydev, cmd);
121 static int bcm_sysport_set_rx_csum(struct net_device *dev,
122 netdev_features_t wanted)
124 struct bcm_sysport_priv *priv = netdev_priv(dev);
127 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
128 reg = rxchk_readl(priv, RXCHK_CONTROL);
134 /* If UniMAC forwards CRC, we need to skip over it to get
135 * a valid CHK bit to be set in the per-packet status word
137 if (priv->rx_chk_en && priv->crc_fwd)
138 reg |= RXCHK_SKIP_FCS;
140 reg &= ~RXCHK_SKIP_FCS;
142 /* If Broadcom tags are enabled (e.g: using a switch), make
143 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
144 * tag after the Ethernet MAC Source Address.
146 if (netdev_uses_dsa(dev))
147 reg |= RXCHK_BRCM_TAG_EN;
149 reg &= ~RXCHK_BRCM_TAG_EN;
151 rxchk_writel(priv, reg, RXCHK_CONTROL);
156 static int bcm_sysport_set_tx_csum(struct net_device *dev,
157 netdev_features_t wanted)
159 struct bcm_sysport_priv *priv = netdev_priv(dev);
162 /* Hardware transmit checksum requires us to enable the Transmit status
163 * block prepended to the packet contents
165 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
166 reg = tdma_readl(priv, TDMA_CONTROL);
171 tdma_writel(priv, reg, TDMA_CONTROL);
176 static int bcm_sysport_set_features(struct net_device *dev,
177 netdev_features_t features)
179 netdev_features_t changed = features ^ dev->features;
180 netdev_features_t wanted = dev->wanted_features;
183 if (changed & NETIF_F_RXCSUM)
184 ret = bcm_sysport_set_rx_csum(dev, wanted);
185 if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
186 ret = bcm_sysport_set_tx_csum(dev, wanted);
191 /* Hardware counters must be kept in sync because the order/offset
192 * is important here (order in structure declaration = order in hardware)
194 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
196 STAT_NETDEV(rx_packets),
197 STAT_NETDEV(tx_packets),
198 STAT_NETDEV(rx_bytes),
199 STAT_NETDEV(tx_bytes),
200 STAT_NETDEV(rx_errors),
201 STAT_NETDEV(tx_errors),
202 STAT_NETDEV(rx_dropped),
203 STAT_NETDEV(tx_dropped),
204 STAT_NETDEV(multicast),
205 /* UniMAC RSV counters */
206 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
207 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
208 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
209 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
210 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
211 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
212 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
213 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
214 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
215 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
216 STAT_MIB_RX("rx_pkts", mib.rx.pkt),
217 STAT_MIB_RX("rx_bytes", mib.rx.bytes),
218 STAT_MIB_RX("rx_multicast", mib.rx.mca),
219 STAT_MIB_RX("rx_broadcast", mib.rx.bca),
220 STAT_MIB_RX("rx_fcs", mib.rx.fcs),
221 STAT_MIB_RX("rx_control", mib.rx.cf),
222 STAT_MIB_RX("rx_pause", mib.rx.pf),
223 STAT_MIB_RX("rx_unknown", mib.rx.uo),
224 STAT_MIB_RX("rx_align", mib.rx.aln),
225 STAT_MIB_RX("rx_outrange", mib.rx.flr),
226 STAT_MIB_RX("rx_code", mib.rx.cde),
227 STAT_MIB_RX("rx_carrier", mib.rx.fcr),
228 STAT_MIB_RX("rx_oversize", mib.rx.ovr),
229 STAT_MIB_RX("rx_jabber", mib.rx.jbr),
230 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
231 STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
232 STAT_MIB_RX("rx_unicast", mib.rx.uc),
233 STAT_MIB_RX("rx_ppp", mib.rx.ppp),
234 STAT_MIB_RX("rx_crc", mib.rx.rcrc),
235 /* UniMAC TSV counters */
236 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
237 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
238 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
239 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
240 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
241 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
242 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
243 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
244 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
245 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
246 STAT_MIB_TX("tx_pkts", mib.tx.pkts),
247 STAT_MIB_TX("tx_multicast", mib.tx.mca),
248 STAT_MIB_TX("tx_broadcast", mib.tx.bca),
249 STAT_MIB_TX("tx_pause", mib.tx.pf),
250 STAT_MIB_TX("tx_control", mib.tx.cf),
251 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
252 STAT_MIB_TX("tx_oversize", mib.tx.ovr),
253 STAT_MIB_TX("tx_defer", mib.tx.drf),
254 STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
255 STAT_MIB_TX("tx_single_col", mib.tx.scl),
256 STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
257 STAT_MIB_TX("tx_late_col", mib.tx.lcl),
258 STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
259 STAT_MIB_TX("tx_frags", mib.tx.frg),
260 STAT_MIB_TX("tx_total_col", mib.tx.ncl),
261 STAT_MIB_TX("tx_jabber", mib.tx.jbr),
262 STAT_MIB_TX("tx_bytes", mib.tx.bytes),
263 STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
264 STAT_MIB_TX("tx_unicast", mib.tx.uc),
265 /* UniMAC RUNT counters */
266 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
267 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
268 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
269 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
270 /* RXCHK misc statistics */
271 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
272 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
273 RXCHK_OTHER_DISC_CNTR),
274 /* RBUF misc statistics */
275 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
276 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
279 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
281 static void bcm_sysport_get_drvinfo(struct net_device *dev,
282 struct ethtool_drvinfo *info)
284 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
285 strlcpy(info->version, "0.1", sizeof(info->version));
286 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
287 info->n_stats = BCM_SYSPORT_STATS_LEN;
290 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
292 struct bcm_sysport_priv *priv = netdev_priv(dev);
294 return priv->msg_enable;
297 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
299 struct bcm_sysport_priv *priv = netdev_priv(dev);
301 priv->msg_enable = enable;
304 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
306 switch (string_set) {
308 return BCM_SYSPORT_STATS_LEN;
314 static void bcm_sysport_get_strings(struct net_device *dev,
315 u32 stringset, u8 *data)
321 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
322 memcpy(data + i * ETH_GSTRING_LEN,
323 bcm_sysport_gstrings_stats[i].stat_string,
332 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
336 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
337 const struct bcm_sysport_stats *s;
342 s = &bcm_sysport_gstrings_stats[i];
344 case BCM_SYSPORT_STAT_NETDEV:
346 case BCM_SYSPORT_STAT_MIB_RX:
347 case BCM_SYSPORT_STAT_MIB_TX:
348 case BCM_SYSPORT_STAT_RUNT:
349 if (s->type != BCM_SYSPORT_STAT_MIB_RX)
350 offset = UMAC_MIB_STAT_OFFSET;
351 val = umac_readl(priv, UMAC_MIB_START + j + offset);
353 case BCM_SYSPORT_STAT_RXCHK:
354 val = rxchk_readl(priv, s->reg_offset);
356 rxchk_writel(priv, 0, s->reg_offset);
358 case BCM_SYSPORT_STAT_RBUF:
359 val = rbuf_readl(priv, s->reg_offset);
361 rbuf_writel(priv, 0, s->reg_offset);
366 p = (char *)priv + s->stat_offset;
370 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
373 static void bcm_sysport_get_stats(struct net_device *dev,
374 struct ethtool_stats *stats, u64 *data)
376 struct bcm_sysport_priv *priv = netdev_priv(dev);
379 if (netif_running(dev))
380 bcm_sysport_update_mib_counters(priv);
382 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
383 const struct bcm_sysport_stats *s;
386 s = &bcm_sysport_gstrings_stats[i];
387 if (s->type == BCM_SYSPORT_STAT_NETDEV)
388 p = (char *)&dev->stats;
396 static void bcm_sysport_get_wol(struct net_device *dev,
397 struct ethtool_wolinfo *wol)
399 struct bcm_sysport_priv *priv = netdev_priv(dev);
402 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
403 wol->wolopts = priv->wolopts;
405 if (!(priv->wolopts & WAKE_MAGICSECURE))
408 /* Return the programmed SecureOn password */
409 reg = umac_readl(priv, UMAC_PSW_MS);
410 put_unaligned_be16(reg, &wol->sopass[0]);
411 reg = umac_readl(priv, UMAC_PSW_LS);
412 put_unaligned_be32(reg, &wol->sopass[2]);
415 static int bcm_sysport_set_wol(struct net_device *dev,
416 struct ethtool_wolinfo *wol)
418 struct bcm_sysport_priv *priv = netdev_priv(dev);
419 struct device *kdev = &priv->pdev->dev;
420 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
422 if (!device_can_wakeup(kdev))
425 if (wol->wolopts & ~supported)
428 /* Program the SecureOn password */
429 if (wol->wolopts & WAKE_MAGICSECURE) {
430 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
432 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
436 /* Flag the device and relevant IRQ as wakeup capable */
438 device_set_wakeup_enable(kdev, 1);
439 if (priv->wol_irq_disabled)
440 enable_irq_wake(priv->wol_irq);
441 priv->wol_irq_disabled = 0;
443 device_set_wakeup_enable(kdev, 0);
444 /* Avoid unbalanced disable_irq_wake calls */
445 if (!priv->wol_irq_disabled)
446 disable_irq_wake(priv->wol_irq);
447 priv->wol_irq_disabled = 1;
450 priv->wolopts = wol->wolopts;
455 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
457 dev_kfree_skb_any(cb->skb);
459 dma_unmap_addr_set(cb, dma_addr, 0);
462 static int bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
463 struct bcm_sysport_cb *cb)
465 struct device *kdev = &priv->pdev->dev;
466 struct net_device *ndev = priv->netdev;
470 cb->skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
472 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
476 mapping = dma_map_single(kdev, cb->skb->data,
477 RX_BUF_LENGTH, DMA_FROM_DEVICE);
478 ret = dma_mapping_error(kdev, mapping);
480 bcm_sysport_free_cb(cb);
481 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
485 dma_unmap_addr_set(cb, dma_addr, mapping);
486 dma_desc_set_addr(priv, priv->rx_bd_assign_ptr, mapping);
488 priv->rx_bd_assign_index++;
489 priv->rx_bd_assign_index &= (priv->num_rx_bds - 1);
490 priv->rx_bd_assign_ptr = priv->rx_bds +
491 (priv->rx_bd_assign_index * DESC_SIZE);
493 netif_dbg(priv, rx_status, ndev, "RX refill\n");
498 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
500 struct bcm_sysport_cb *cb;
504 for (i = 0; i < priv->num_rx_bds; i++) {
505 cb = &priv->rx_cbs[priv->rx_bd_assign_index];
509 ret = bcm_sysport_rx_refill(priv, cb);
517 /* Poll the hardware for up to budget packets to process */
518 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
521 struct device *kdev = &priv->pdev->dev;
522 struct net_device *ndev = priv->netdev;
523 unsigned int processed = 0, to_process;
524 struct bcm_sysport_cb *cb;
526 unsigned int p_index;
530 /* Determine how much we should process since last call */
531 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
532 p_index &= RDMA_PROD_INDEX_MASK;
534 if (p_index < priv->rx_c_index)
535 to_process = (RDMA_CONS_INDEX_MASK + 1) -
536 priv->rx_c_index + p_index;
538 to_process = p_index - priv->rx_c_index;
540 netif_dbg(priv, rx_status, ndev,
541 "p_index=%d rx_c_index=%d to_process=%d\n",
542 p_index, priv->rx_c_index, to_process);
544 while ((processed < to_process) && (processed < budget)) {
545 cb = &priv->rx_cbs[priv->rx_read_ptr];
551 if (priv->rx_read_ptr == priv->num_rx_bds)
552 priv->rx_read_ptr = 0;
554 /* We do not have a backing SKB, so we do not a corresponding
555 * DMA mapping for this incoming packet since
556 * bcm_sysport_rx_refill always either has both skb and mapping
559 if (unlikely(!skb)) {
560 netif_err(priv, rx_err, ndev, "out of memory!\n");
561 ndev->stats.rx_dropped++;
562 ndev->stats.rx_errors++;
566 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
567 RX_BUF_LENGTH, DMA_FROM_DEVICE);
569 /* Extract the Receive Status Block prepended */
570 rsb = (struct bcm_rsb *)skb->data;
571 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
572 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
575 netif_dbg(priv, rx_status, ndev,
576 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
577 p_index, priv->rx_c_index, priv->rx_read_ptr,
580 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
581 netif_err(priv, rx_status, ndev, "fragmented packet!\n");
582 ndev->stats.rx_dropped++;
583 ndev->stats.rx_errors++;
584 bcm_sysport_free_cb(cb);
588 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
589 netif_err(priv, rx_err, ndev, "error packet\n");
590 if (status & RX_STATUS_OVFLOW)
591 ndev->stats.rx_over_errors++;
592 ndev->stats.rx_dropped++;
593 ndev->stats.rx_errors++;
594 bcm_sysport_free_cb(cb);
600 /* Hardware validated our checksum */
601 if (likely(status & DESC_L4_CSUM))
602 skb->ip_summed = CHECKSUM_UNNECESSARY;
604 /* Hardware pre-pends packets with 2bytes before Ethernet
605 * header plus we have the Receive Status Block, strip off all
606 * of this from the SKB.
608 skb_pull(skb, sizeof(*rsb) + 2);
609 len -= (sizeof(*rsb) + 2);
611 /* UniMAC may forward CRC */
613 skb_trim(skb, len - ETH_FCS_LEN);
617 skb->protocol = eth_type_trans(skb, ndev);
618 ndev->stats.rx_packets++;
619 ndev->stats.rx_bytes += len;
621 napi_gro_receive(&priv->napi, skb);
623 bcm_sysport_rx_refill(priv, cb);
629 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
630 struct bcm_sysport_cb *cb,
631 unsigned int *bytes_compl,
632 unsigned int *pkts_compl)
634 struct device *kdev = &priv->pdev->dev;
635 struct net_device *ndev = priv->netdev;
638 ndev->stats.tx_bytes += cb->skb->len;
639 *bytes_compl += cb->skb->len;
640 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
641 dma_unmap_len(cb, dma_len),
643 ndev->stats.tx_packets++;
645 bcm_sysport_free_cb(cb);
647 } else if (dma_unmap_addr(cb, dma_addr)) {
648 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
649 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
650 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
651 dma_unmap_addr_set(cb, dma_addr, 0);
655 /* Reclaim queued SKBs for transmission completion, lockless version */
656 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
657 struct bcm_sysport_tx_ring *ring)
659 struct net_device *ndev = priv->netdev;
660 unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
661 unsigned int pkts_compl = 0, bytes_compl = 0;
662 struct bcm_sysport_cb *cb;
663 struct netdev_queue *txq;
666 txq = netdev_get_tx_queue(ndev, ring->index);
668 /* Compute how many descriptors have been processed since last call */
669 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
670 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
671 ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
673 last_c_index = ring->c_index;
674 num_tx_cbs = ring->size;
676 c_index &= (num_tx_cbs - 1);
678 if (c_index >= last_c_index)
679 last_tx_cn = c_index - last_c_index;
681 last_tx_cn = num_tx_cbs - last_c_index + c_index;
683 netif_dbg(priv, tx_done, ndev,
684 "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
685 ring->index, c_index, last_tx_cn, last_c_index);
687 while (last_tx_cn-- > 0) {
688 cb = ring->cbs + last_c_index;
689 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
693 last_c_index &= (num_tx_cbs - 1);
696 ring->c_index = c_index;
698 if (netif_tx_queue_stopped(txq) && pkts_compl)
699 netif_tx_wake_queue(txq);
701 netif_dbg(priv, tx_done, ndev,
702 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
703 ring->index, ring->c_index, pkts_compl, bytes_compl);
708 /* Locked version of the per-ring TX reclaim routine */
709 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
710 struct bcm_sysport_tx_ring *ring)
712 unsigned int released;
715 spin_lock_irqsave(&ring->lock, flags);
716 released = __bcm_sysport_tx_reclaim(priv, ring);
717 spin_unlock_irqrestore(&ring->lock, flags);
722 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
724 struct bcm_sysport_tx_ring *ring =
725 container_of(napi, struct bcm_sysport_tx_ring, napi);
726 unsigned int work_done = 0;
728 work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
730 if (work_done == 0) {
732 /* re-enable TX interrupt */
733 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
739 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
743 for (q = 0; q < priv->netdev->num_tx_queues; q++)
744 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
747 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
749 struct bcm_sysport_priv *priv =
750 container_of(napi, struct bcm_sysport_priv, napi);
751 unsigned int work_done = 0;
753 work_done = bcm_sysport_desc_rx(priv, budget);
755 priv->rx_c_index += work_done;
756 priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
757 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
759 if (work_done < budget) {
761 /* re-enable RX interrupts */
762 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
768 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
772 /* Stop monitoring MPD interrupt */
773 intrl2_0_mask_set(priv, INTRL2_0_MPD);
775 /* Clear the MagicPacket detection logic */
776 reg = umac_readl(priv, UMAC_MPD_CTRL);
778 umac_writel(priv, reg, UMAC_MPD_CTRL);
780 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
783 /* RX and misc interrupt routine */
784 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
786 struct net_device *dev = dev_id;
787 struct bcm_sysport_priv *priv = netdev_priv(dev);
789 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
790 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
791 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
793 if (unlikely(priv->irq0_stat == 0)) {
794 netdev_warn(priv->netdev, "spurious RX interrupt\n");
798 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
799 if (likely(napi_schedule_prep(&priv->napi))) {
800 /* disable RX interrupts */
801 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
802 __napi_schedule(&priv->napi);
806 /* TX ring is full, perform a full reclaim since we do not know
807 * which one would trigger this interrupt
809 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
810 bcm_sysport_tx_reclaim_all(priv);
812 if (priv->irq0_stat & INTRL2_0_MPD) {
813 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
814 bcm_sysport_resume_from_wol(priv);
820 /* TX interrupt service routine */
821 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
823 struct net_device *dev = dev_id;
824 struct bcm_sysport_priv *priv = netdev_priv(dev);
825 struct bcm_sysport_tx_ring *txr;
828 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
829 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
830 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
832 if (unlikely(priv->irq1_stat == 0)) {
833 netdev_warn(priv->netdev, "spurious TX interrupt\n");
837 for (ring = 0; ring < dev->num_tx_queues; ring++) {
838 if (!(priv->irq1_stat & BIT(ring)))
841 txr = &priv->tx_rings[ring];
843 if (likely(napi_schedule_prep(&txr->napi))) {
844 intrl2_1_mask_set(priv, BIT(ring));
845 __napi_schedule(&txr->napi);
852 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
854 struct bcm_sysport_priv *priv = dev_id;
856 pm_wakeup_event(&priv->pdev->dev, 0);
861 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
862 struct net_device *dev)
864 struct sk_buff *nskb;
871 /* Re-allocate SKB if needed */
872 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
873 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
876 dev->stats.tx_errors++;
877 dev->stats.tx_dropped++;
883 tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
884 /* Zero-out TSB by default */
885 memset(tsb, 0, sizeof(*tsb));
887 if (skb->ip_summed == CHECKSUM_PARTIAL) {
888 ip_ver = htons(skb->protocol);
891 ip_proto = ip_hdr(skb)->protocol;
894 ip_proto = ipv6_hdr(skb)->nexthdr;
900 /* Get the checksum offset and the L4 (transport) offset */
901 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
902 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
903 csum_info |= (csum_start << L4_PTR_SHIFT);
905 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
906 csum_info |= L4_LENGTH_VALID;
907 if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
913 tsb->l4_ptr_dest_map = csum_info;
919 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
920 struct net_device *dev)
922 struct bcm_sysport_priv *priv = netdev_priv(dev);
923 struct device *kdev = &priv->pdev->dev;
924 struct bcm_sysport_tx_ring *ring;
925 struct bcm_sysport_cb *cb;
926 struct netdev_queue *txq;
927 struct dma_desc *desc;
928 unsigned int skb_len;
935 queue = skb_get_queue_mapping(skb);
936 txq = netdev_get_tx_queue(dev, queue);
937 ring = &priv->tx_rings[queue];
939 /* lock against tx reclaim in BH context and TX ring full interrupt */
940 spin_lock_irqsave(&ring->lock, flags);
941 if (unlikely(ring->desc_count == 0)) {
942 netif_tx_stop_queue(txq);
943 netdev_err(dev, "queue %d awake and ring full!\n", queue);
944 ret = NETDEV_TX_BUSY;
948 /* Insert TSB and checksum infos */
950 skb = bcm_sysport_insert_tsb(skb, dev);
957 /* The Ethernet switch we are interfaced with needs packets to be at
958 * least 64 bytes (including FCS) otherwise they will be discarded when
959 * they enter the switch port logic. When Broadcom tags are enabled, we
960 * need to make sure that packets are at least 68 bytes
961 * (including FCS and tag) because the length verification is done after
962 * the Broadcom tag is stripped off the ingress packet.
964 if (skb_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
969 skb_len = skb->len < ETH_ZLEN + ENET_BRCM_TAG_LEN ?
970 ETH_ZLEN + ENET_BRCM_TAG_LEN : skb->len;
972 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
973 if (dma_mapping_error(kdev, mapping)) {
974 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
980 /* Remember the SKB for future freeing */
981 cb = &ring->cbs[ring->curr_desc];
983 dma_unmap_addr_set(cb, dma_addr, mapping);
984 dma_unmap_len_set(cb, dma_len, skb_len);
986 /* Fetch a descriptor entry from our pool */
987 desc = ring->desc_cpu;
989 desc->addr_lo = lower_32_bits(mapping);
990 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
991 len_status |= (skb_len << DESC_LEN_SHIFT);
992 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
994 if (skb->ip_summed == CHECKSUM_PARTIAL)
995 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
998 if (ring->curr_desc == ring->size)
1002 /* Ensure write completion of the descriptor status/length
1003 * in DRAM before the System Port WRITE_PORT register latches
1007 desc->addr_status_len = len_status;
1010 /* Write this descriptor address to the RING write port */
1011 tdma_port_write_desc_addr(priv, desc, ring->index);
1013 /* Check ring space and update SW control flow */
1014 if (ring->desc_count == 0)
1015 netif_tx_stop_queue(txq);
1017 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1018 ring->index, ring->desc_count, ring->curr_desc);
1022 spin_unlock_irqrestore(&ring->lock, flags);
1026 static void bcm_sysport_tx_timeout(struct net_device *dev)
1028 netdev_warn(dev, "transmit timeout!\n");
1030 dev->trans_start = jiffies;
1031 dev->stats.tx_errors++;
1033 netif_tx_wake_all_queues(dev);
1036 /* phylib adjust link callback */
1037 static void bcm_sysport_adj_link(struct net_device *dev)
1039 struct bcm_sysport_priv *priv = netdev_priv(dev);
1040 struct phy_device *phydev = priv->phydev;
1041 unsigned int changed = 0;
1042 u32 cmd_bits = 0, reg;
1044 if (priv->old_link != phydev->link) {
1046 priv->old_link = phydev->link;
1049 if (priv->old_duplex != phydev->duplex) {
1051 priv->old_duplex = phydev->duplex;
1054 switch (phydev->speed) {
1056 cmd_bits = CMD_SPEED_2500;
1059 cmd_bits = CMD_SPEED_1000;
1062 cmd_bits = CMD_SPEED_100;
1065 cmd_bits = CMD_SPEED_10;
1070 cmd_bits <<= CMD_SPEED_SHIFT;
1072 if (phydev->duplex == DUPLEX_HALF)
1073 cmd_bits |= CMD_HD_EN;
1075 if (priv->old_pause != phydev->pause) {
1077 priv->old_pause = phydev->pause;
1081 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1087 reg = umac_readl(priv, UMAC_CMD);
1088 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1089 CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1090 CMD_TX_PAUSE_IGNORE);
1092 umac_writel(priv, reg, UMAC_CMD);
1095 phy_print_status(priv->phydev);
1098 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1101 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1102 struct device *kdev = &priv->pdev->dev;
1107 /* Simple descriptors partitioning for now */
1110 /* We just need one DMA descriptor which is DMA-able, since writing to
1111 * the port will allocate a new descriptor in its internal linked-list
1113 p = dma_zalloc_coherent(kdev, 1, &ring->desc_dma, GFP_KERNEL);
1115 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1119 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1121 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1125 /* Initialize SW view of the ring */
1126 spin_lock_init(&ring->lock);
1128 netif_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1129 ring->index = index;
1131 ring->alloc_size = ring->size;
1133 ring->desc_count = ring->size;
1134 ring->curr_desc = 0;
1136 /* Initialize HW ring */
1137 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1138 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1139 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1140 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1141 tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1142 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1144 /* Program the number of descriptors as MAX_THRESHOLD and half of
1145 * its size for the hysteresis trigger
1147 tdma_writel(priv, ring->size |
1148 1 << RING_HYST_THRESH_SHIFT,
1149 TDMA_DESC_RING_MAX_HYST(index));
1151 /* Enable the ring queue in the arbiter */
1152 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1153 reg |= (1 << index);
1154 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1156 napi_enable(&ring->napi);
1158 netif_dbg(priv, hw, priv->netdev,
1159 "TDMA cfg, size=%d, desc_cpu=%p\n",
1160 ring->size, ring->desc_cpu);
1165 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1168 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1169 struct device *kdev = &priv->pdev->dev;
1172 /* Caller should stop the TDMA engine */
1173 reg = tdma_readl(priv, TDMA_STATUS);
1174 if (!(reg & TDMA_DISABLED))
1175 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1177 napi_disable(&ring->napi);
1178 netif_napi_del(&ring->napi);
1180 bcm_sysport_tx_reclaim(priv, ring);
1185 if (ring->desc_dma) {
1186 dma_free_coherent(kdev, 1, ring->desc_cpu, ring->desc_dma);
1190 ring->alloc_size = 0;
1192 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1196 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1197 unsigned int enable)
1199 unsigned int timeout = 1000;
1202 reg = rdma_readl(priv, RDMA_CONTROL);
1207 rdma_writel(priv, reg, RDMA_CONTROL);
1209 /* Poll for RMDA disabling completion */
1211 reg = rdma_readl(priv, RDMA_STATUS);
1212 if (!!(reg & RDMA_DISABLED) == !enable)
1214 usleep_range(1000, 2000);
1215 } while (timeout-- > 0);
1217 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1223 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1224 unsigned int enable)
1226 unsigned int timeout = 1000;
1229 reg = tdma_readl(priv, TDMA_CONTROL);
1234 tdma_writel(priv, reg, TDMA_CONTROL);
1236 /* Poll for TMDA disabling completion */
1238 reg = tdma_readl(priv, TDMA_STATUS);
1239 if (!!(reg & TDMA_DISABLED) == !enable)
1242 usleep_range(1000, 2000);
1243 } while (timeout-- > 0);
1245 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1250 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1255 /* Initialize SW view of the RX ring */
1256 priv->num_rx_bds = NUM_RX_DESC;
1257 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1258 priv->rx_bd_assign_ptr = priv->rx_bds;
1259 priv->rx_bd_assign_index = 0;
1260 priv->rx_c_index = 0;
1261 priv->rx_read_ptr = 0;
1262 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1264 if (!priv->rx_cbs) {
1265 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1269 ret = bcm_sysport_alloc_rx_bufs(priv);
1271 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1275 /* Initialize HW, ensure RDMA is disabled */
1276 reg = rdma_readl(priv, RDMA_STATUS);
1277 if (!(reg & RDMA_DISABLED))
1278 rdma_enable_set(priv, 0);
1280 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1281 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1282 rdma_writel(priv, 0, RDMA_PROD_INDEX);
1283 rdma_writel(priv, 0, RDMA_CONS_INDEX);
1284 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1285 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1286 /* Operate the queue in ring mode */
1287 rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1288 rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1289 rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1290 rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1292 rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1294 netif_dbg(priv, hw, priv->netdev,
1295 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1296 priv->num_rx_bds, priv->rx_bds);
1301 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1303 struct bcm_sysport_cb *cb;
1307 /* Caller should ensure RDMA is disabled */
1308 reg = rdma_readl(priv, RDMA_STATUS);
1309 if (!(reg & RDMA_DISABLED))
1310 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1312 for (i = 0; i < priv->num_rx_bds; i++) {
1313 cb = &priv->rx_cbs[i];
1314 if (dma_unmap_addr(cb, dma_addr))
1315 dma_unmap_single(&priv->pdev->dev,
1316 dma_unmap_addr(cb, dma_addr),
1317 RX_BUF_LENGTH, DMA_FROM_DEVICE);
1318 bcm_sysport_free_cb(cb);
1321 kfree(priv->rx_cbs);
1322 priv->rx_cbs = NULL;
1324 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1327 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1329 struct bcm_sysport_priv *priv = netdev_priv(dev);
1332 reg = umac_readl(priv, UMAC_CMD);
1333 if (dev->flags & IFF_PROMISC)
1336 reg &= ~CMD_PROMISC;
1337 umac_writel(priv, reg, UMAC_CMD);
1339 /* No support for ALLMULTI */
1340 if (dev->flags & IFF_ALLMULTI)
1344 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1345 u32 mask, unsigned int enable)
1349 reg = umac_readl(priv, UMAC_CMD);
1354 umac_writel(priv, reg, UMAC_CMD);
1356 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1357 * to be processed (1 msec).
1360 usleep_range(1000, 2000);
1363 static inline void umac_reset(struct bcm_sysport_priv *priv)
1367 reg = umac_readl(priv, UMAC_CMD);
1368 reg |= CMD_SW_RESET;
1369 umac_writel(priv, reg, UMAC_CMD);
1371 reg = umac_readl(priv, UMAC_CMD);
1372 reg &= ~CMD_SW_RESET;
1373 umac_writel(priv, reg, UMAC_CMD);
1376 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1377 unsigned char *addr)
1379 umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1380 (addr[2] << 8) | addr[3], UMAC_MAC0);
1381 umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1384 static void topctrl_flush(struct bcm_sysport_priv *priv)
1386 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1387 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1389 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1390 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1393 static void bcm_sysport_netif_start(struct net_device *dev)
1395 struct bcm_sysport_priv *priv = netdev_priv(dev);
1398 napi_enable(&priv->napi);
1400 phy_start(priv->phydev);
1402 /* Enable TX interrupts for the 32 TXQs */
1403 intrl2_1_mask_clear(priv, 0xffffffff);
1405 /* Last call before we start the real business */
1406 netif_tx_start_all_queues(dev);
1409 static void rbuf_init(struct bcm_sysport_priv *priv)
1413 reg = rbuf_readl(priv, RBUF_CONTROL);
1414 reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1415 rbuf_writel(priv, reg, RBUF_CONTROL);
1418 static int bcm_sysport_open(struct net_device *dev)
1420 struct bcm_sysport_priv *priv = netdev_priv(dev);
1427 /* Flush TX and RX FIFOs at TOPCTRL level */
1428 topctrl_flush(priv);
1430 /* Disable the UniMAC RX/TX */
1431 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1433 /* Enable RBUF 2bytes alignment and Receive Status Block */
1436 /* Set maximum frame length */
1437 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1439 /* Set MAC address */
1440 umac_set_hw_addr(priv, dev->dev_addr);
1442 /* Read CRC forward */
1443 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1445 priv->phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1446 0, priv->phy_interface);
1447 if (!priv->phydev) {
1448 netdev_err(dev, "could not attach to PHY\n");
1452 /* Reset house keeping link status */
1453 priv->old_duplex = -1;
1454 priv->old_link = -1;
1455 priv->old_pause = -1;
1457 /* mask all interrupts and request them */
1458 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1459 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1460 intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1461 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1462 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1463 intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1465 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1467 netdev_err(dev, "failed to request RX interrupt\n");
1468 goto out_phy_disconnect;
1471 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1473 netdev_err(dev, "failed to request TX interrupt\n");
1477 /* Initialize both hardware and software ring */
1478 for (i = 0; i < dev->num_tx_queues; i++) {
1479 ret = bcm_sysport_init_tx_ring(priv, i);
1481 netdev_err(dev, "failed to initialize TX ring %d\n",
1483 goto out_free_tx_ring;
1487 /* Initialize linked-list */
1488 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1490 /* Initialize RX ring */
1491 ret = bcm_sysport_init_rx_ring(priv);
1493 netdev_err(dev, "failed to initialize RX ring\n");
1494 goto out_free_rx_ring;
1498 ret = rdma_enable_set(priv, 1);
1500 goto out_free_rx_ring;
1502 /* Enable RX interrupt and TX ring full interrupt */
1503 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1506 ret = tdma_enable_set(priv, 1);
1508 goto out_clear_rx_int;
1510 /* Turn on UniMAC TX/RX */
1511 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1513 bcm_sysport_netif_start(dev);
1518 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1520 bcm_sysport_fini_rx_ring(priv);
1522 for (i = 0; i < dev->num_tx_queues; i++)
1523 bcm_sysport_fini_tx_ring(priv, i);
1524 free_irq(priv->irq1, dev);
1526 free_irq(priv->irq0, dev);
1528 phy_disconnect(priv->phydev);
1532 static void bcm_sysport_netif_stop(struct net_device *dev)
1534 struct bcm_sysport_priv *priv = netdev_priv(dev);
1536 /* stop all software from updating hardware */
1537 netif_tx_stop_all_queues(dev);
1538 napi_disable(&priv->napi);
1539 phy_stop(priv->phydev);
1541 /* mask all interrupts */
1542 intrl2_0_mask_set(priv, 0xffffffff);
1543 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1544 intrl2_1_mask_set(priv, 0xffffffff);
1545 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1548 static int bcm_sysport_stop(struct net_device *dev)
1550 struct bcm_sysport_priv *priv = netdev_priv(dev);
1554 bcm_sysport_netif_stop(dev);
1556 /* Disable UniMAC RX */
1557 umac_enable_set(priv, CMD_RX_EN, 0);
1559 ret = tdma_enable_set(priv, 0);
1561 netdev_err(dev, "timeout disabling RDMA\n");
1565 /* Wait for a maximum packet size to be drained */
1566 usleep_range(2000, 3000);
1568 ret = rdma_enable_set(priv, 0);
1570 netdev_err(dev, "timeout disabling TDMA\n");
1574 /* Disable UniMAC TX */
1575 umac_enable_set(priv, CMD_TX_EN, 0);
1577 /* Free RX/TX rings SW structures */
1578 for (i = 0; i < dev->num_tx_queues; i++)
1579 bcm_sysport_fini_tx_ring(priv, i);
1580 bcm_sysport_fini_rx_ring(priv);
1582 free_irq(priv->irq0, dev);
1583 free_irq(priv->irq1, dev);
1585 /* Disconnect from PHY */
1586 phy_disconnect(priv->phydev);
1591 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1592 .get_settings = bcm_sysport_get_settings,
1593 .set_settings = bcm_sysport_set_settings,
1594 .get_drvinfo = bcm_sysport_get_drvinfo,
1595 .get_msglevel = bcm_sysport_get_msglvl,
1596 .set_msglevel = bcm_sysport_set_msglvl,
1597 .get_link = ethtool_op_get_link,
1598 .get_strings = bcm_sysport_get_strings,
1599 .get_ethtool_stats = bcm_sysport_get_stats,
1600 .get_sset_count = bcm_sysport_get_sset_count,
1601 .get_wol = bcm_sysport_get_wol,
1602 .set_wol = bcm_sysport_set_wol,
1605 static const struct net_device_ops bcm_sysport_netdev_ops = {
1606 .ndo_start_xmit = bcm_sysport_xmit,
1607 .ndo_tx_timeout = bcm_sysport_tx_timeout,
1608 .ndo_open = bcm_sysport_open,
1609 .ndo_stop = bcm_sysport_stop,
1610 .ndo_set_features = bcm_sysport_set_features,
1611 .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
1614 #define REV_FMT "v%2x.%02x"
1616 static int bcm_sysport_probe(struct platform_device *pdev)
1618 struct bcm_sysport_priv *priv;
1619 struct device_node *dn;
1620 struct net_device *dev;
1621 const void *macaddr;
1626 dn = pdev->dev.of_node;
1627 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1629 /* Read the Transmit/Receive Queue properties */
1630 if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1631 txq = TDMA_NUM_RINGS;
1632 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1635 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1639 /* Initialize private members */
1640 priv = netdev_priv(dev);
1642 priv->irq0 = platform_get_irq(pdev, 0);
1643 priv->irq1 = platform_get_irq(pdev, 1);
1644 priv->wol_irq = platform_get_irq(pdev, 2);
1645 if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1646 dev_err(&pdev->dev, "invalid interrupts\n");
1651 priv->base = devm_ioremap_resource(&pdev->dev, r);
1652 if (IS_ERR(priv->base)) {
1653 ret = PTR_ERR(priv->base);
1660 priv->phy_interface = of_get_phy_mode(dn);
1661 /* Default to GMII interface mode */
1662 if (priv->phy_interface < 0)
1663 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1665 /* In the case of a fixed PHY, the DT node associated
1666 * to the PHY is the Ethernet MAC DT node.
1668 if (of_phy_is_fixed_link(dn)) {
1669 ret = of_phy_register_fixed_link(dn);
1671 dev_err(&pdev->dev, "failed to register fixed PHY\n");
1678 /* Initialize netdevice members */
1679 macaddr = of_get_mac_address(dn);
1680 if (!macaddr || !is_valid_ether_addr(macaddr)) {
1681 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1682 random_ether_addr(dev->dev_addr);
1684 ether_addr_copy(dev->dev_addr, macaddr);
1687 SET_NETDEV_DEV(dev, &pdev->dev);
1688 dev_set_drvdata(&pdev->dev, dev);
1689 dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1690 dev->netdev_ops = &bcm_sysport_netdev_ops;
1691 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1693 /* HW supported features, none enabled by default */
1694 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1695 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1697 /* Request the WOL interrupt and advertise suspend if available */
1698 priv->wol_irq_disabled = 1;
1699 ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1700 bcm_sysport_wol_isr, 0, dev->name, priv);
1702 device_set_wakeup_capable(&pdev->dev, 1);
1704 /* Set the needed headroom once and for all */
1705 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1706 dev->needed_headroom += sizeof(struct bcm_tsb);
1708 /* libphy will adjust the link state accordingly */
1709 netif_carrier_off(dev);
1711 ret = register_netdev(dev);
1713 dev_err(&pdev->dev, "failed to register net_device\n");
1717 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1718 dev_info(&pdev->dev,
1719 "Broadcom SYSTEMPORT" REV_FMT
1720 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1721 (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1722 priv->base, priv->irq0, priv->irq1, txq, rxq);
1730 static int bcm_sysport_remove(struct platform_device *pdev)
1732 struct net_device *dev = dev_get_drvdata(&pdev->dev);
1734 /* Not much to do, ndo_close has been called
1735 * and we use managed allocations
1737 unregister_netdev(dev);
1739 dev_set_drvdata(&pdev->dev, NULL);
1744 #ifdef CONFIG_PM_SLEEP
1745 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1747 struct net_device *ndev = priv->netdev;
1748 unsigned int timeout = 1000;
1751 /* Password has already been programmed */
1752 reg = umac_readl(priv, UMAC_MPD_CTRL);
1755 if (priv->wolopts & WAKE_MAGICSECURE)
1757 umac_writel(priv, reg, UMAC_MPD_CTRL);
1759 /* Make sure RBUF entered WoL mode as result */
1761 reg = rbuf_readl(priv, RBUF_STATUS);
1762 if (reg & RBUF_WOL_MODE)
1766 } while (timeout-- > 0);
1768 /* Do not leave the UniMAC RBUF matching only MPD packets */
1770 reg = umac_readl(priv, UMAC_MPD_CTRL);
1772 umac_writel(priv, reg, UMAC_MPD_CTRL);
1773 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1777 /* UniMAC receive needs to be turned on */
1778 umac_enable_set(priv, CMD_RX_EN, 1);
1780 /* Enable the interrupt wake-up source */
1781 intrl2_0_mask_clear(priv, INTRL2_0_MPD);
1783 netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1788 static int bcm_sysport_suspend(struct device *d)
1790 struct net_device *dev = dev_get_drvdata(d);
1791 struct bcm_sysport_priv *priv = netdev_priv(dev);
1796 if (!netif_running(dev))
1799 bcm_sysport_netif_stop(dev);
1801 phy_suspend(priv->phydev);
1803 netif_device_detach(dev);
1805 /* Disable UniMAC RX */
1806 umac_enable_set(priv, CMD_RX_EN, 0);
1808 ret = rdma_enable_set(priv, 0);
1810 netdev_err(dev, "RDMA timeout!\n");
1814 /* Disable RXCHK if enabled */
1815 if (priv->rx_chk_en) {
1816 reg = rxchk_readl(priv, RXCHK_CONTROL);
1818 rxchk_writel(priv, reg, RXCHK_CONTROL);
1823 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1825 ret = tdma_enable_set(priv, 0);
1827 netdev_err(dev, "TDMA timeout!\n");
1831 /* Wait for a packet boundary */
1832 usleep_range(2000, 3000);
1834 umac_enable_set(priv, CMD_TX_EN, 0);
1836 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1838 /* Free RX/TX rings SW structures */
1839 for (i = 0; i < dev->num_tx_queues; i++)
1840 bcm_sysport_fini_tx_ring(priv, i);
1841 bcm_sysport_fini_rx_ring(priv);
1843 /* Get prepared for Wake-on-LAN */
1844 if (device_may_wakeup(d) && priv->wolopts)
1845 ret = bcm_sysport_suspend_to_wol(priv);
1850 static int bcm_sysport_resume(struct device *d)
1852 struct net_device *dev = dev_get_drvdata(d);
1853 struct bcm_sysport_priv *priv = netdev_priv(dev);
1858 if (!netif_running(dev))
1861 /* We may have been suspended and never received a WOL event that
1862 * would turn off MPD detection, take care of that now
1864 bcm_sysport_resume_from_wol(priv);
1866 /* Initialize both hardware and software ring */
1867 for (i = 0; i < dev->num_tx_queues; i++) {
1868 ret = bcm_sysport_init_tx_ring(priv, i);
1870 netdev_err(dev, "failed to initialize TX ring %d\n",
1872 goto out_free_tx_rings;
1876 /* Initialize linked-list */
1877 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1879 /* Initialize RX ring */
1880 ret = bcm_sysport_init_rx_ring(priv);
1882 netdev_err(dev, "failed to initialize RX ring\n");
1883 goto out_free_rx_ring;
1886 netif_device_attach(dev);
1888 /* Enable RX interrupt and TX ring full interrupt */
1889 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1891 /* RX pipe enable */
1892 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1894 ret = rdma_enable_set(priv, 1);
1896 netdev_err(dev, "failed to enable RDMA\n");
1897 goto out_free_rx_ring;
1901 if (priv->rx_chk_en) {
1902 reg = rxchk_readl(priv, RXCHK_CONTROL);
1904 rxchk_writel(priv, reg, RXCHK_CONTROL);
1909 /* Set maximum frame length */
1910 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1912 /* Set MAC address */
1913 umac_set_hw_addr(priv, dev->dev_addr);
1915 umac_enable_set(priv, CMD_RX_EN, 1);
1917 /* TX pipe enable */
1918 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1920 umac_enable_set(priv, CMD_TX_EN, 1);
1922 ret = tdma_enable_set(priv, 1);
1924 netdev_err(dev, "TDMA timeout!\n");
1925 goto out_free_rx_ring;
1928 phy_resume(priv->phydev);
1930 bcm_sysport_netif_start(dev);
1935 bcm_sysport_fini_rx_ring(priv);
1937 for (i = 0; i < dev->num_tx_queues; i++)
1938 bcm_sysport_fini_tx_ring(priv, i);
1943 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
1944 bcm_sysport_suspend, bcm_sysport_resume);
1946 static const struct of_device_id bcm_sysport_of_match[] = {
1947 { .compatible = "brcm,systemport-v1.00" },
1948 { .compatible = "brcm,systemport" },
1952 static struct platform_driver bcm_sysport_driver = {
1953 .probe = bcm_sysport_probe,
1954 .remove = bcm_sysport_remove,
1956 .name = "brcm-systemport",
1957 .owner = THIS_MODULE,
1958 .of_match_table = bcm_sysport_of_match,
1959 .pm = &bcm_sysport_pm_ops,
1962 module_platform_driver(bcm_sysport_driver);
1964 MODULE_AUTHOR("Broadcom Corporation");
1965 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
1966 MODULE_ALIAS("platform:brcm-systemport");
1967 MODULE_LICENSE("GPL");