2 \brief Declaration of library functions
4 Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
12 /*******************************************************************************
13 * C O M P I L E R F L A G S
14 ********************************************************************************
17 /*******************************************************************************
18 * E X T E R N A L R E F E R E N C E S
19 ********************************************************************************
25 /*******************************************************************************
27 ********************************************************************************
30 /*******************************************************************************
32 ********************************************************************************
35 #define WMT_IC_NAME_MT6620 "MT6620"
36 #define WMT_IC_NAME_MT6628 "MT6628"
39 #define WMT_IC_VER_E1 "E1"
40 #define WMT_IC_VER_E2 "E2"
41 #define WMT_IC_VER_E3 "E3"
42 #define WMT_IC_VER_E4 "E4"
43 #define WMT_IC_VER_E5 "E5"
44 #define WMT_IC_VER_E6 "E6"
45 #define WMT_IC_VER_E7 "E7"
47 #define WMT_IC_PATCH_DUMMY_EXT "_ex"
48 #define WMT_IC_PATCH_NO_EXT ""
49 #define WMT_IC_PATCH_E1_EXT "_e1"
50 #define WMT_IC_PATCH_E2_EXT "_e2"
51 #define WMT_IC_PATCH_E3_EXT "_e3"
52 #define WMT_IC_PATCH_E4_EXT "_e4"
53 #define WMT_IC_PATCH_E5_EXT "_e5"
54 #define WMT_IC_PATCH_E6_EXT "_e6"
56 #define WMT_IC_PATCH_TAIL "_hdr.bin"
58 #define WMT_IC_INVALID_CHIP_ID 0xFFFF
60 #define MAJORNUM(x) (x & 0x00F0)
61 #define MINORNUM(x) (x & 0x000F)
63 /*******************************************************************************
64 * R E G I S T E R M A P
65 ********************************************************************************
67 /* General definition used for ALL/UNKNOWN CHIPS */
68 /* Now MT6620 uses these definitions */
69 #define GEN_CONFG_BASE (0x80000000UL)
70 #define GEN_HVR (GEN_CONFG_BASE + 0x0UL) /* HW_VER */
71 #define GEN_FVR (GEN_CONFG_BASE + 0x4UL) /* FW_VER */
72 #define GEN_VER_MASK (0x0000FFFFUL) /* HW_VER and FW_VER valid bits mask */
73 #define GEN_HCR (GEN_CONFG_BASE + 0x8UL) /* HW_CODE, chip id */
74 #define GEN_HCR_MASK (0x0000FFFFUL) /* HW_CODE valid bits mask */
76 /*******************************************************************************
78 ********************************************************************************
81 typedef struct _WMT_IC_INFO_S
83 UINT32 u4HwVer; /* u4HwId */
87 MTK_WCN_BOOL bPsmSupport;
88 MTK_WCN_BOOL bWorkWithoutPatch;
89 ENUM_WMTHWVER_TYPE_T eWmtHwVer;
90 } WMT_IC_INFO_S, *P_WMT_IC_INFO_S;
92 /*******************************************************************************
94 ********************************************************************************
97 /*******************************************************************************
98 * P R I V A T E D A T A
99 ********************************************************************************
102 /*******************************************************************************
103 * F U N C T I O N D E C L A R A T I O N S
104 ********************************************************************************
107 /*******************************************************************************
109 ********************************************************************************
112 #endif /* _WMT_IC_H_ */