1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
34 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
35 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
36 #define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14
37 #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
38 #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
39 #define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50
40 #define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190
46 #define PCI_SDHCI_IFPIO 0x00
47 #define PCI_SDHCI_IFDMA 0x01
48 #define PCI_SDHCI_IFVENDOR 0x02
50 #define PCI_SLOT_INFO 0x40 /* 8 bits */
51 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
52 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
56 struct sdhci_pci_chip;
57 struct sdhci_pci_slot;
59 struct sdhci_pci_fixes {
62 bool allow_runtime_pm;
64 int (*probe) (struct sdhci_pci_chip *);
66 int (*probe_slot) (struct sdhci_pci_slot *);
67 void (*remove_slot) (struct sdhci_pci_slot *, int);
69 int (*suspend) (struct sdhci_pci_chip *);
70 int (*resume) (struct sdhci_pci_chip *);
73 struct sdhci_pci_slot {
74 struct sdhci_pci_chip *chip;
75 struct sdhci_host *host;
76 struct sdhci_pci_data *data;
83 void (*hw_reset)(struct sdhci_host *host);
86 struct sdhci_pci_chip {
91 bool allow_runtime_pm;
92 const struct sdhci_pci_fixes *fixes;
94 int num_slots; /* Slots on controller */
95 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
99 /*****************************************************************************\
101 * Hardware specific quirk handling *
103 \*****************************************************************************/
105 static int ricoh_probe(struct sdhci_pci_chip *chip)
107 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
108 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
109 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
113 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
116 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
117 & SDHCI_TIMEOUT_CLK_MASK) |
119 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
120 & SDHCI_CLOCK_BASE_MASK) |
122 SDHCI_TIMEOUT_CLK_UNIT |
129 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
131 /* Apply a delay to allow controller to settle */
132 /* Otherwise it becomes confused if card state changed
138 static const struct sdhci_pci_fixes sdhci_ricoh = {
139 .probe = ricoh_probe,
140 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
141 SDHCI_QUIRK_FORCE_DMA |
142 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
145 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
146 .probe_slot = ricoh_mmc_probe_slot,
147 .resume = ricoh_mmc_resume,
148 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
149 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
150 SDHCI_QUIRK_NO_CARD_NO_RESET |
151 SDHCI_QUIRK_MISSING_CAPS
154 static const struct sdhci_pci_fixes sdhci_ene_712 = {
155 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
156 SDHCI_QUIRK_BROKEN_DMA,
159 static const struct sdhci_pci_fixes sdhci_ene_714 = {
160 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
161 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
162 SDHCI_QUIRK_BROKEN_DMA,
165 static const struct sdhci_pci_fixes sdhci_cafe = {
166 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
167 SDHCI_QUIRK_NO_BUSY_IRQ |
168 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
169 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
172 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
174 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
179 * ADMA operation is disabled for Moorestown platform due to
182 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
185 * slots number is fixed here for MRST as SDIO3/5 are never used and
186 * have hardware bugs.
192 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
194 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
198 #ifdef CONFIG_PM_RUNTIME
200 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
202 struct sdhci_pci_slot *slot = dev_id;
203 struct sdhci_host *host = slot->host;
205 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
209 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
211 int err, irq, gpio = slot->cd_gpio;
213 slot->cd_gpio = -EINVAL;
214 slot->cd_irq = -EINVAL;
216 if (!gpio_is_valid(gpio))
219 err = gpio_request(gpio, "sd_cd");
223 err = gpio_direction_input(gpio);
227 irq = gpio_to_irq(gpio);
231 err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
232 IRQF_TRIGGER_FALLING, "sd_cd", slot);
236 slot->cd_gpio = gpio;
244 dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
247 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
249 if (slot->cd_irq >= 0)
250 free_irq(slot->cd_irq, slot);
251 if (gpio_is_valid(slot->cd_gpio))
252 gpio_free(slot->cd_gpio);
257 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
261 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
267 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
269 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
270 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
271 MMC_CAP2_HC_ERASE_SZ;
275 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
277 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
281 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
282 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
283 .probe_slot = mrst_hc_probe_slot,
286 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
287 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
288 .probe = mrst_hc_probe,
291 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
292 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
293 .allow_runtime_pm = true,
296 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
297 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
298 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
299 .allow_runtime_pm = true,
300 .probe_slot = mfd_sdio_probe_slot,
303 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
304 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
305 .allow_runtime_pm = true,
306 .probe_slot = mfd_emmc_probe_slot,
309 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
310 .quirks = SDHCI_QUIRK_BROKEN_ADMA,
311 .probe_slot = pch_hc_probe_slot,
314 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
318 reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
320 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
321 /* For eMMC, minimum is 1us but give it 9us for good measure */
324 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
325 /* For eMMC, minimum is 200us but give it 300us for good measure */
326 usleep_range(300, 1000);
329 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
331 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
333 slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
334 slot->hw_reset = sdhci_pci_int_hw_reset;
338 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
340 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
344 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
345 .allow_runtime_pm = true,
346 .probe_slot = byt_emmc_probe_slot,
349 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
350 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
351 .allow_runtime_pm = true,
352 .probe_slot = byt_sdio_probe_slot,
355 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
356 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON,
357 .allow_runtime_pm = true,
360 /* Define Host controllers for Intel Merrifield platform */
361 #define INTEL_MRFL_EMMC_0 0
362 #define INTEL_MRFL_EMMC_1 1
364 static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot)
366 if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_0) &&
367 (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_1))
368 /* SD support is not ready yet */
371 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
377 static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = {
378 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
379 .probe_slot = intel_mrfl_mmc_probe_slot,
382 /* O2Micro extra registers */
383 #define O2_SD_LOCK_WP 0xD3
384 #define O2_SD_MULTI_VCC3V 0xEE
385 #define O2_SD_CLKREQ 0xEC
386 #define O2_SD_CAPS 0xE0
387 #define O2_SD_ADMA1 0xE2
388 #define O2_SD_ADMA2 0xE7
389 #define O2_SD_INF_MOD 0xF1
391 static int o2_probe(struct sdhci_pci_chip *chip)
396 switch (chip->pdev->device) {
397 case PCI_DEVICE_ID_O2_8220:
398 case PCI_DEVICE_ID_O2_8221:
399 case PCI_DEVICE_ID_O2_8320:
400 case PCI_DEVICE_ID_O2_8321:
401 /* This extra setup is required due to broken ADMA. */
402 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
406 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
408 /* Set Multi 3 to VCC3V# */
409 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
411 /* Disable CLK_REQ# support after media DET */
412 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
416 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
418 /* Choose capabilities, enable SDMA. We have to write 0x01
419 * to the capabilities register first to unlock it.
421 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
425 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
426 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
428 /* Disable ADMA1/2 */
429 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
430 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
432 /* Disable the infinite transfer mode */
433 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
437 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
440 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
444 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
450 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
455 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
460 * Turn PMOS on [bit 0], set over current detection to 2.4 V
461 * [bit 1:2] and enable over current debouncing [bit 6].
468 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
475 static int jmicron_probe(struct sdhci_pci_chip *chip)
480 if (chip->pdev->revision == 0) {
481 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
482 SDHCI_QUIRK_32BIT_DMA_SIZE |
483 SDHCI_QUIRK_32BIT_ADMA_SIZE |
484 SDHCI_QUIRK_RESET_AFTER_REQUEST |
485 SDHCI_QUIRK_BROKEN_SMALL_PIO;
489 * JMicron chips can have two interfaces to the same hardware
490 * in order to work around limitations in Microsoft's driver.
491 * We need to make sure we only bind to one of them.
493 * This code assumes two things:
495 * 1. The PCI code adds subfunctions in order.
497 * 2. The MMC interface has a lower subfunction number
498 * than the SD interface.
500 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
501 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
502 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
503 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
506 struct pci_dev *sd_dev;
509 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
510 mmcdev, sd_dev)) != NULL) {
511 if ((PCI_SLOT(chip->pdev->devfn) ==
512 PCI_SLOT(sd_dev->devfn)) &&
513 (chip->pdev->bus == sd_dev->bus))
519 dev_info(&chip->pdev->dev, "Refusing to bind to "
520 "secondary interface.\n");
526 * JMicron chips need a bit of a nudge to enable the power
529 ret = jmicron_pmos(chip, 1);
531 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
535 /* quirk for unsable RO-detection on JM388 chips */
536 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
537 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
538 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
543 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
547 scratch = readb(host->ioaddr + 0xC0);
554 writeb(scratch, host->ioaddr + 0xC0);
557 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
559 if (slot->chip->pdev->revision == 0) {
562 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
563 version = (version & SDHCI_VENDOR_VER_MASK) >>
564 SDHCI_VENDOR_VER_SHIFT;
567 * Older versions of the chip have lots of nasty glitches
568 * in the ADMA engine. It's best just to avoid it
572 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
575 /* JM388 MMC doesn't support 1.8V while SD supports it */
576 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
577 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
578 MMC_VDD_29_30 | MMC_VDD_30_31 |
579 MMC_VDD_165_195; /* allow 1.8V */
580 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
581 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
585 * The secondary interface requires a bit set to get the
588 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
589 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
590 jmicron_enable_mmc(slot->host, 1);
592 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
597 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
602 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
603 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
604 jmicron_enable_mmc(slot->host, 0);
607 static int jmicron_suspend(struct sdhci_pci_chip *chip)
611 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
612 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
613 for (i = 0; i < chip->num_slots; i++)
614 jmicron_enable_mmc(chip->slots[i]->host, 0);
620 static int jmicron_resume(struct sdhci_pci_chip *chip)
624 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
625 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
626 for (i = 0; i < chip->num_slots; i++)
627 jmicron_enable_mmc(chip->slots[i]->host, 1);
630 ret = jmicron_pmos(chip, 1);
632 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
639 static const struct sdhci_pci_fixes sdhci_o2 = {
643 static const struct sdhci_pci_fixes sdhci_jmicron = {
644 .probe = jmicron_probe,
646 .probe_slot = jmicron_probe_slot,
647 .remove_slot = jmicron_remove_slot,
649 .suspend = jmicron_suspend,
650 .resume = jmicron_resume,
653 /* SysKonnect CardBus2SDIO extra registers */
654 #define SYSKT_CTRL 0x200
655 #define SYSKT_RDFIFO_STAT 0x204
656 #define SYSKT_WRFIFO_STAT 0x208
657 #define SYSKT_POWER_DATA 0x20c
658 #define SYSKT_POWER_330 0xef
659 #define SYSKT_POWER_300 0xf8
660 #define SYSKT_POWER_184 0xcc
661 #define SYSKT_POWER_CMD 0x20d
662 #define SYSKT_POWER_START (1 << 7)
663 #define SYSKT_POWER_STATUS 0x20e
664 #define SYSKT_POWER_STATUS_OK (1 << 0)
665 #define SYSKT_BOARD_REV 0x210
666 #define SYSKT_CHIP_REV 0x211
667 #define SYSKT_CONF_DATA 0x212
668 #define SYSKT_CONF_DATA_1V8 (1 << 2)
669 #define SYSKT_CONF_DATA_2V5 (1 << 1)
670 #define SYSKT_CONF_DATA_3V3 (1 << 0)
672 static int syskt_probe(struct sdhci_pci_chip *chip)
674 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
675 chip->pdev->class &= ~0x0000FF;
676 chip->pdev->class |= PCI_SDHCI_IFDMA;
681 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
685 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
686 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
687 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
688 "board rev %d.%d, chip rev %d.%d\n",
689 board_rev >> 4, board_rev & 0xf,
690 chip_rev >> 4, chip_rev & 0xf);
691 if (chip_rev >= 0x20)
692 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
694 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
695 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
697 tm = 10; /* Wait max 1 ms */
699 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
700 if (ps & SYSKT_POWER_STATUS_OK)
705 dev_err(&slot->chip->pdev->dev,
706 "power regulator never stabilized");
707 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
714 static const struct sdhci_pci_fixes sdhci_syskt = {
715 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
716 .probe = syskt_probe,
717 .probe_slot = syskt_probe_slot,
720 static int via_probe(struct sdhci_pci_chip *chip)
722 if (chip->pdev->revision == 0x10)
723 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
728 static const struct sdhci_pci_fixes sdhci_via = {
732 static const struct pci_device_id pci_ids[] = {
734 .vendor = PCI_VENDOR_ID_RICOH,
735 .device = PCI_DEVICE_ID_RICOH_R5C822,
736 .subvendor = PCI_ANY_ID,
737 .subdevice = PCI_ANY_ID,
738 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
742 .vendor = PCI_VENDOR_ID_RICOH,
744 .subvendor = PCI_ANY_ID,
745 .subdevice = PCI_ANY_ID,
746 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
750 .vendor = PCI_VENDOR_ID_RICOH,
752 .subvendor = PCI_ANY_ID,
753 .subdevice = PCI_ANY_ID,
754 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
758 .vendor = PCI_VENDOR_ID_RICOH,
760 .subvendor = PCI_ANY_ID,
761 .subdevice = PCI_ANY_ID,
762 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
766 .vendor = PCI_VENDOR_ID_ENE,
767 .device = PCI_DEVICE_ID_ENE_CB712_SD,
768 .subvendor = PCI_ANY_ID,
769 .subdevice = PCI_ANY_ID,
770 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
774 .vendor = PCI_VENDOR_ID_ENE,
775 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
776 .subvendor = PCI_ANY_ID,
777 .subdevice = PCI_ANY_ID,
778 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
782 .vendor = PCI_VENDOR_ID_ENE,
783 .device = PCI_DEVICE_ID_ENE_CB714_SD,
784 .subvendor = PCI_ANY_ID,
785 .subdevice = PCI_ANY_ID,
786 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
790 .vendor = PCI_VENDOR_ID_ENE,
791 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
792 .subvendor = PCI_ANY_ID,
793 .subdevice = PCI_ANY_ID,
794 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
798 .vendor = PCI_VENDOR_ID_MARVELL,
799 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
800 .subvendor = PCI_ANY_ID,
801 .subdevice = PCI_ANY_ID,
802 .driver_data = (kernel_ulong_t)&sdhci_cafe,
806 .vendor = PCI_VENDOR_ID_JMICRON,
807 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
808 .subvendor = PCI_ANY_ID,
809 .subdevice = PCI_ANY_ID,
810 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
814 .vendor = PCI_VENDOR_ID_JMICRON,
815 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
816 .subvendor = PCI_ANY_ID,
817 .subdevice = PCI_ANY_ID,
818 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
822 .vendor = PCI_VENDOR_ID_JMICRON,
823 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
824 .subvendor = PCI_ANY_ID,
825 .subdevice = PCI_ANY_ID,
826 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
830 .vendor = PCI_VENDOR_ID_JMICRON,
831 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
832 .subvendor = PCI_ANY_ID,
833 .subdevice = PCI_ANY_ID,
834 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
838 .vendor = PCI_VENDOR_ID_SYSKONNECT,
840 .subvendor = PCI_ANY_ID,
841 .subdevice = PCI_ANY_ID,
842 .driver_data = (kernel_ulong_t)&sdhci_syskt,
846 .vendor = PCI_VENDOR_ID_VIA,
848 .subvendor = PCI_ANY_ID,
849 .subdevice = PCI_ANY_ID,
850 .driver_data = (kernel_ulong_t)&sdhci_via,
854 .vendor = PCI_VENDOR_ID_INTEL,
855 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
856 .subvendor = PCI_ANY_ID,
857 .subdevice = PCI_ANY_ID,
858 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
862 .vendor = PCI_VENDOR_ID_INTEL,
863 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
864 .subvendor = PCI_ANY_ID,
865 .subdevice = PCI_ANY_ID,
866 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
870 .vendor = PCI_VENDOR_ID_INTEL,
871 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
872 .subvendor = PCI_ANY_ID,
873 .subdevice = PCI_ANY_ID,
874 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
878 .vendor = PCI_VENDOR_ID_INTEL,
879 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
880 .subvendor = PCI_ANY_ID,
881 .subdevice = PCI_ANY_ID,
882 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
886 .vendor = PCI_VENDOR_ID_INTEL,
887 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
888 .subvendor = PCI_ANY_ID,
889 .subdevice = PCI_ANY_ID,
890 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
894 .vendor = PCI_VENDOR_ID_INTEL,
895 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
896 .subvendor = PCI_ANY_ID,
897 .subdevice = PCI_ANY_ID,
898 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
902 .vendor = PCI_VENDOR_ID_INTEL,
903 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
904 .subvendor = PCI_ANY_ID,
905 .subdevice = PCI_ANY_ID,
906 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
910 .vendor = PCI_VENDOR_ID_INTEL,
911 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
912 .subvendor = PCI_ANY_ID,
913 .subdevice = PCI_ANY_ID,
914 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
918 .vendor = PCI_VENDOR_ID_INTEL,
919 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
920 .subvendor = PCI_ANY_ID,
921 .subdevice = PCI_ANY_ID,
922 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
926 .vendor = PCI_VENDOR_ID_INTEL,
927 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
928 .subvendor = PCI_ANY_ID,
929 .subdevice = PCI_ANY_ID,
930 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
934 .vendor = PCI_VENDOR_ID_INTEL,
935 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC,
936 .subvendor = PCI_ANY_ID,
937 .subdevice = PCI_ANY_ID,
938 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
942 .vendor = PCI_VENDOR_ID_INTEL,
943 .device = PCI_DEVICE_ID_INTEL_BYT_SDIO,
944 .subvendor = PCI_ANY_ID,
945 .subdevice = PCI_ANY_ID,
946 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
950 .vendor = PCI_VENDOR_ID_INTEL,
951 .device = PCI_DEVICE_ID_INTEL_BYT_SD,
952 .subvendor = PCI_ANY_ID,
953 .subdevice = PCI_ANY_ID,
954 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
958 .vendor = PCI_VENDOR_ID_INTEL,
959 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
960 .subvendor = PCI_ANY_ID,
961 .subdevice = PCI_ANY_ID,
962 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
966 .vendor = PCI_VENDOR_ID_INTEL,
967 .device = PCI_DEVICE_ID_INTEL_MRFL_MMC,
968 .subvendor = PCI_ANY_ID,
969 .subdevice = PCI_ANY_ID,
970 .driver_data = (kernel_ulong_t)&sdhci_intel_mrfl_mmc,
973 .vendor = PCI_VENDOR_ID_O2,
974 .device = PCI_DEVICE_ID_O2_8120,
975 .subvendor = PCI_ANY_ID,
976 .subdevice = PCI_ANY_ID,
977 .driver_data = (kernel_ulong_t)&sdhci_o2,
981 .vendor = PCI_VENDOR_ID_O2,
982 .device = PCI_DEVICE_ID_O2_8220,
983 .subvendor = PCI_ANY_ID,
984 .subdevice = PCI_ANY_ID,
985 .driver_data = (kernel_ulong_t)&sdhci_o2,
989 .vendor = PCI_VENDOR_ID_O2,
990 .device = PCI_DEVICE_ID_O2_8221,
991 .subvendor = PCI_ANY_ID,
992 .subdevice = PCI_ANY_ID,
993 .driver_data = (kernel_ulong_t)&sdhci_o2,
997 .vendor = PCI_VENDOR_ID_O2,
998 .device = PCI_DEVICE_ID_O2_8320,
999 .subvendor = PCI_ANY_ID,
1000 .subdevice = PCI_ANY_ID,
1001 .driver_data = (kernel_ulong_t)&sdhci_o2,
1005 .vendor = PCI_VENDOR_ID_O2,
1006 .device = PCI_DEVICE_ID_O2_8321,
1007 .subvendor = PCI_ANY_ID,
1008 .subdevice = PCI_ANY_ID,
1009 .driver_data = (kernel_ulong_t)&sdhci_o2,
1012 { /* Generic SD host controller */
1013 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1016 { /* end: all zeroes */ },
1019 MODULE_DEVICE_TABLE(pci, pci_ids);
1021 /*****************************************************************************\
1023 * SDHCI core callbacks *
1025 \*****************************************************************************/
1027 static int sdhci_pci_enable_dma(struct sdhci_host *host)
1029 struct sdhci_pci_slot *slot;
1030 struct pci_dev *pdev;
1033 slot = sdhci_priv(host);
1034 pdev = slot->chip->pdev;
1036 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
1037 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1038 (host->flags & SDHCI_USE_SDMA)) {
1039 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1040 "doesn't fully claim to support it.\n");
1043 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1047 pci_set_master(pdev);
1052 static int sdhci_pci_bus_width(struct sdhci_host *host, int width)
1056 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1059 case MMC_BUS_WIDTH_8:
1060 ctrl |= SDHCI_CTRL_8BITBUS;
1061 ctrl &= ~SDHCI_CTRL_4BITBUS;
1063 case MMC_BUS_WIDTH_4:
1064 ctrl |= SDHCI_CTRL_4BITBUS;
1065 ctrl &= ~SDHCI_CTRL_8BITBUS;
1068 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1072 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1077 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1079 struct sdhci_pci_slot *slot = sdhci_priv(host);
1080 int rst_n_gpio = slot->rst_n_gpio;
1082 if (!gpio_is_valid(rst_n_gpio))
1084 gpio_set_value_cansleep(rst_n_gpio, 0);
1085 /* For eMMC, minimum is 1us but give it 10us for good measure */
1087 gpio_set_value_cansleep(rst_n_gpio, 1);
1088 /* For eMMC, minimum is 200us but give it 300us for good measure */
1089 usleep_range(300, 1000);
1092 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1094 struct sdhci_pci_slot *slot = sdhci_priv(host);
1097 slot->hw_reset(host);
1100 static const struct sdhci_ops sdhci_pci_ops = {
1101 .enable_dma = sdhci_pci_enable_dma,
1102 .platform_bus_width = sdhci_pci_bus_width,
1103 .hw_reset = sdhci_pci_hw_reset,
1106 /*****************************************************************************\
1110 \*****************************************************************************/
1114 static int sdhci_pci_suspend(struct device *dev)
1116 struct pci_dev *pdev = to_pci_dev(dev);
1117 struct sdhci_pci_chip *chip;
1118 struct sdhci_pci_slot *slot;
1119 mmc_pm_flag_t slot_pm_flags;
1120 mmc_pm_flag_t pm_flags = 0;
1123 chip = pci_get_drvdata(pdev);
1127 for (i = 0; i < chip->num_slots; i++) {
1128 slot = chip->slots[i];
1132 ret = sdhci_suspend_host(slot->host);
1135 goto err_pci_suspend;
1137 slot_pm_flags = slot->host->mmc->pm_flags;
1138 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1139 sdhci_enable_irq_wakeups(slot->host);
1141 pm_flags |= slot_pm_flags;
1144 if (chip->fixes && chip->fixes->suspend) {
1145 ret = chip->fixes->suspend(chip);
1147 goto err_pci_suspend;
1150 pci_save_state(pdev);
1151 if (pm_flags & MMC_PM_KEEP_POWER) {
1152 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
1153 pci_pme_active(pdev, true);
1154 pci_enable_wake(pdev, PCI_D3hot, 1);
1156 pci_set_power_state(pdev, PCI_D3hot);
1158 pci_enable_wake(pdev, PCI_D3hot, 0);
1159 pci_disable_device(pdev);
1160 pci_set_power_state(pdev, PCI_D3hot);
1167 sdhci_resume_host(chip->slots[i]->host);
1171 static int sdhci_pci_resume(struct device *dev)
1173 struct pci_dev *pdev = to_pci_dev(dev);
1174 struct sdhci_pci_chip *chip;
1175 struct sdhci_pci_slot *slot;
1178 chip = pci_get_drvdata(pdev);
1182 pci_set_power_state(pdev, PCI_D0);
1183 pci_restore_state(pdev);
1184 ret = pci_enable_device(pdev);
1188 if (chip->fixes && chip->fixes->resume) {
1189 ret = chip->fixes->resume(chip);
1194 for (i = 0; i < chip->num_slots; i++) {
1195 slot = chip->slots[i];
1199 ret = sdhci_resume_host(slot->host);
1207 #else /* CONFIG_PM */
1209 #define sdhci_pci_suspend NULL
1210 #define sdhci_pci_resume NULL
1212 #endif /* CONFIG_PM */
1214 #ifdef CONFIG_PM_RUNTIME
1216 static int sdhci_pci_runtime_suspend(struct device *dev)
1218 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1219 struct sdhci_pci_chip *chip;
1220 struct sdhci_pci_slot *slot;
1223 chip = pci_get_drvdata(pdev);
1227 for (i = 0; i < chip->num_slots; i++) {
1228 slot = chip->slots[i];
1232 ret = sdhci_runtime_suspend_host(slot->host);
1235 goto err_pci_runtime_suspend;
1238 if (chip->fixes && chip->fixes->suspend) {
1239 ret = chip->fixes->suspend(chip);
1241 goto err_pci_runtime_suspend;
1246 err_pci_runtime_suspend:
1248 sdhci_runtime_resume_host(chip->slots[i]->host);
1252 static int sdhci_pci_runtime_resume(struct device *dev)
1254 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1255 struct sdhci_pci_chip *chip;
1256 struct sdhci_pci_slot *slot;
1259 chip = pci_get_drvdata(pdev);
1263 if (chip->fixes && chip->fixes->resume) {
1264 ret = chip->fixes->resume(chip);
1269 for (i = 0; i < chip->num_slots; i++) {
1270 slot = chip->slots[i];
1274 ret = sdhci_runtime_resume_host(slot->host);
1282 static int sdhci_pci_runtime_idle(struct device *dev)
1289 #define sdhci_pci_runtime_suspend NULL
1290 #define sdhci_pci_runtime_resume NULL
1291 #define sdhci_pci_runtime_idle NULL
1295 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1296 .suspend = sdhci_pci_suspend,
1297 .resume = sdhci_pci_resume,
1298 .runtime_suspend = sdhci_pci_runtime_suspend,
1299 .runtime_resume = sdhci_pci_runtime_resume,
1300 .runtime_idle = sdhci_pci_runtime_idle,
1303 /*****************************************************************************\
1305 * Device probing/removal *
1307 \*****************************************************************************/
1309 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1310 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1313 struct sdhci_pci_slot *slot;
1314 struct sdhci_host *host;
1315 int ret, bar = first_bar + slotno;
1317 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1318 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1319 return ERR_PTR(-ENODEV);
1322 if (pci_resource_len(pdev, bar) < 0x100) {
1323 dev_err(&pdev->dev, "Invalid iomem size. You may "
1324 "experience problems.\n");
1327 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1328 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1329 return ERR_PTR(-ENODEV);
1332 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1333 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1334 return ERR_PTR(-ENODEV);
1337 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1339 dev_err(&pdev->dev, "cannot allocate host\n");
1340 return ERR_CAST(host);
1343 slot = sdhci_priv(host);
1347 slot->pci_bar = bar;
1348 slot->rst_n_gpio = -EINVAL;
1349 slot->cd_gpio = -EINVAL;
1351 /* Retrieve platform data if there is any */
1352 if (*sdhci_pci_get_data)
1353 slot->data = sdhci_pci_get_data(pdev, slotno);
1356 if (slot->data->setup) {
1357 ret = slot->data->setup(slot->data);
1359 dev_err(&pdev->dev, "platform setup failed\n");
1363 slot->rst_n_gpio = slot->data->rst_n_gpio;
1364 slot->cd_gpio = slot->data->cd_gpio;
1367 host->hw_name = "PCI";
1368 host->ops = &sdhci_pci_ops;
1369 host->quirks = chip->quirks;
1370 host->quirks2 = chip->quirks2;
1372 host->irq = pdev->irq;
1374 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1376 dev_err(&pdev->dev, "cannot request region\n");
1380 host->ioaddr = pci_ioremap_bar(pdev, bar);
1381 if (!host->ioaddr) {
1382 dev_err(&pdev->dev, "failed to remap registers\n");
1387 if (chip->fixes && chip->fixes->probe_slot) {
1388 ret = chip->fixes->probe_slot(slot);
1393 if (gpio_is_valid(slot->rst_n_gpio)) {
1394 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1395 gpio_direction_output(slot->rst_n_gpio, 1);
1396 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1397 slot->hw_reset = sdhci_pci_gpio_hw_reset;
1399 dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1400 slot->rst_n_gpio = -EINVAL;
1404 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1405 host->mmc->slotno = slotno;
1406 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1408 ret = sdhci_add_host(host);
1412 sdhci_pci_add_own_cd(slot);
1417 if (gpio_is_valid(slot->rst_n_gpio))
1418 gpio_free(slot->rst_n_gpio);
1420 if (chip->fixes && chip->fixes->remove_slot)
1421 chip->fixes->remove_slot(slot, 0);
1424 iounmap(host->ioaddr);
1427 pci_release_region(pdev, bar);
1430 if (slot->data && slot->data->cleanup)
1431 slot->data->cleanup(slot->data);
1434 sdhci_free_host(host);
1436 return ERR_PTR(ret);
1439 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1444 sdhci_pci_remove_own_cd(slot);
1447 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1448 if (scratch == (u32)-1)
1451 sdhci_remove_host(slot->host, dead);
1453 if (gpio_is_valid(slot->rst_n_gpio))
1454 gpio_free(slot->rst_n_gpio);
1456 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1457 slot->chip->fixes->remove_slot(slot, dead);
1459 if (slot->data && slot->data->cleanup)
1460 slot->data->cleanup(slot->data);
1462 pci_release_region(slot->chip->pdev, slot->pci_bar);
1464 sdhci_free_host(slot->host);
1467 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1469 pm_runtime_put_noidle(dev);
1470 pm_runtime_allow(dev);
1471 pm_runtime_set_autosuspend_delay(dev, 50);
1472 pm_runtime_use_autosuspend(dev);
1473 pm_suspend_ignore_children(dev, 1);
1476 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1478 pm_runtime_forbid(dev);
1479 pm_runtime_get_noresume(dev);
1482 static int sdhci_pci_probe(struct pci_dev *pdev,
1483 const struct pci_device_id *ent)
1485 struct sdhci_pci_chip *chip;
1486 struct sdhci_pci_slot *slot;
1488 u8 slots, first_bar;
1491 BUG_ON(pdev == NULL);
1492 BUG_ON(ent == NULL);
1494 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1495 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1497 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1501 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1502 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1506 BUG_ON(slots > MAX_SLOTS);
1508 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1512 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1514 if (first_bar > 5) {
1515 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1519 ret = pci_enable_device(pdev);
1523 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1530 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1532 chip->quirks = chip->fixes->quirks;
1533 chip->quirks2 = chip->fixes->quirks2;
1534 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1536 chip->num_slots = slots;
1538 pci_set_drvdata(pdev, chip);
1540 if (chip->fixes && chip->fixes->probe) {
1541 ret = chip->fixes->probe(chip);
1546 slots = chip->num_slots; /* Quirk may have changed this */
1548 for (i = 0; i < slots; i++) {
1549 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1551 for (i--; i >= 0; i--)
1552 sdhci_pci_remove_slot(chip->slots[i]);
1553 ret = PTR_ERR(slot);
1557 chip->slots[i] = slot;
1560 if (chip->allow_runtime_pm)
1561 sdhci_pci_runtime_pm_allow(&pdev->dev);
1566 pci_set_drvdata(pdev, NULL);
1570 pci_disable_device(pdev);
1574 static void sdhci_pci_remove(struct pci_dev *pdev)
1577 struct sdhci_pci_chip *chip;
1579 chip = pci_get_drvdata(pdev);
1582 if (chip->allow_runtime_pm)
1583 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1585 for (i = 0; i < chip->num_slots; i++)
1586 sdhci_pci_remove_slot(chip->slots[i]);
1588 pci_set_drvdata(pdev, NULL);
1592 pci_disable_device(pdev);
1595 static struct pci_driver sdhci_driver = {
1596 .name = "sdhci-pci",
1597 .id_table = pci_ids,
1598 .probe = sdhci_pci_probe,
1599 .remove = sdhci_pci_remove,
1601 .pm = &sdhci_pci_pm_ops
1605 module_pci_driver(sdhci_driver);
1607 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1608 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1609 MODULE_LICENSE("GPL");