2 * Arasan Secure Digital Host Controller Interface.
3 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
4 * Copyright (c) 2012 Wind River Systems, Inc.
5 * Copyright (C) 2013 Pengutronix e.K.
6 * Copyright (C) 2013 Xilinx Inc.
8 * Based on sdhci-of-esdhc.c
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 * Copyright (c) 2009 MontaVista Software, Inc.
13 * Authors: Xiaobo Xie <X.Xie@freescale.com>
14 * Anton Vorontsov <avorontsov@ru.mvista.com>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or (at
19 * your option) any later version.
22 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/phy/phy.h>
25 #include "sdhci-pltfm.h"
27 #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c
29 #define CLK_CTRL_TIMEOUT_SHIFT 16
30 #define CLK_CTRL_TIMEOUT_MASK (0xf << CLK_CTRL_TIMEOUT_SHIFT)
31 #define CLK_CTRL_TIMEOUT_MIN_EXP 13
34 * struct sdhci_arasan_data
35 * @clk_ahb: Pointer to the AHB clock
36 * @phy: Pointer to the generic phy
38 struct sdhci_arasan_data {
43 static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
47 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
49 div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
50 div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
52 freq = clk_get_rate(pltfm_host->clk);
53 freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
58 static struct sdhci_ops sdhci_arasan_ops = {
59 .set_clock = sdhci_set_clock,
60 .get_max_clock = sdhci_pltfm_clk_get_max_clock,
61 .get_timeout_clock = sdhci_arasan_get_timeout_clock,
62 .set_bus_width = sdhci_set_bus_width,
64 .set_uhs_signaling = sdhci_set_uhs_signaling,
67 static struct sdhci_pltfm_data sdhci_arasan_pdata = {
68 .ops = &sdhci_arasan_ops,
69 .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
70 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
71 SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
74 #ifdef CONFIG_PM_SLEEP
76 * sdhci_arasan_suspend - Suspend method for the driver
77 * @dev: Address of the device structure
78 * Return: 0 on success and error value on error
80 * Put the device in a low power state.
82 static int sdhci_arasan_suspend(struct device *dev)
84 struct platform_device *pdev = to_platform_device(dev);
85 struct sdhci_host *host = platform_get_drvdata(pdev);
86 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
87 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
90 ret = sdhci_suspend_host(host);
94 if (!IS_ERR(sdhci_arasan->phy)) {
95 ret = phy_power_off(sdhci_arasan->phy);
97 dev_err(dev, "Cannot power off phy.\n");
102 clk_disable(pltfm_host->clk);
103 clk_disable(sdhci_arasan->clk_ahb);
109 * sdhci_arasan_resume - Resume method for the driver
110 * @dev: Address of the device structure
111 * Return: 0 on success and error value on error
113 * Resume operation after suspend
115 static int sdhci_arasan_resume(struct device *dev)
117 struct platform_device *pdev = to_platform_device(dev);
118 struct sdhci_host *host = platform_get_drvdata(pdev);
119 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
120 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
123 ret = clk_enable(sdhci_arasan->clk_ahb);
125 dev_err(dev, "Cannot enable AHB clock.\n");
129 ret = clk_enable(pltfm_host->clk);
131 dev_err(dev, "Cannot enable SD clock.\n");
135 if (!IS_ERR(sdhci_arasan->phy)) {
136 ret = phy_power_on(sdhci_arasan->phy);
138 dev_err(dev, "Cannot power on phy.\n");
143 return sdhci_resume_host(host);
146 clk_disable(pltfm_host->clk);
148 clk_disable(sdhci_arasan->clk_ahb);
151 #endif /* ! CONFIG_PM_SLEEP */
153 static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
154 sdhci_arasan_resume);
156 static int sdhci_arasan_probe(struct platform_device *pdev)
160 struct sdhci_host *host;
161 struct sdhci_pltfm_host *pltfm_host;
162 struct sdhci_arasan_data *sdhci_arasan;
164 sdhci_arasan = devm_kzalloc(&pdev->dev, sizeof(*sdhci_arasan),
169 sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
170 if (IS_ERR(sdhci_arasan->clk_ahb)) {
171 dev_err(&pdev->dev, "clk_ahb clock not found.\n");
172 return PTR_ERR(sdhci_arasan->clk_ahb);
175 clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
176 if (IS_ERR(clk_xin)) {
177 dev_err(&pdev->dev, "clk_xin clock not found.\n");
178 return PTR_ERR(clk_xin);
181 ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
183 dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
187 ret = clk_prepare_enable(clk_xin);
189 dev_err(&pdev->dev, "Unable to enable SD clock.\n");
193 host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 0);
196 goto clk_disable_all;
199 if (of_device_is_compatible(pdev->dev.of_node, "arasan,sdhci-4.9a")) {
200 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
201 host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
204 sdhci_get_of_property(pdev);
205 pltfm_host = sdhci_priv(host);
206 pltfm_host->priv = sdhci_arasan;
207 pltfm_host->clk = clk_xin;
209 ret = mmc_of_parse(host->mmc);
211 dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
212 goto clk_disable_all;
215 sdhci_arasan->phy = ERR_PTR(-ENODEV);
216 if (of_device_is_compatible(pdev->dev.of_node,
217 "arasan,sdhci-5.1")) {
218 sdhci_arasan->phy = devm_phy_get(&pdev->dev,
220 if (IS_ERR(sdhci_arasan->phy)) {
221 ret = PTR_ERR(sdhci_arasan->phy);
222 dev_err(&pdev->dev, "No phy for arasan,sdhci-5.1.\n");
223 goto clk_disable_all;
226 ret = phy_init(sdhci_arasan->phy);
228 dev_err(&pdev->dev, "phy_init err.\n");
229 goto clk_disable_all;
232 ret = phy_power_on(sdhci_arasan->phy);
234 dev_err(&pdev->dev, "phy_power_on err.\n");
239 ret = sdhci_add_host(host);
246 if (!IS_ERR(sdhci_arasan->phy))
247 phy_power_off(sdhci_arasan->phy);
248 sdhci_pltfm_free(pdev);
250 if (!IS_ERR(sdhci_arasan->phy))
251 phy_exit(sdhci_arasan->phy);
253 clk_disable_unprepare(clk_xin);
255 clk_disable_unprepare(sdhci_arasan->clk_ahb);
260 static int sdhci_arasan_remove(struct platform_device *pdev)
262 struct sdhci_host *host = platform_get_drvdata(pdev);
263 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
264 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
266 if (!IS_ERR(sdhci_arasan->phy)) {
267 phy_power_off(sdhci_arasan->phy);
268 phy_exit(sdhci_arasan->phy);
271 clk_disable_unprepare(sdhci_arasan->clk_ahb);
273 return sdhci_pltfm_unregister(pdev);
276 static const struct of_device_id sdhci_arasan_of_match[] = {
277 { .compatible = "arasan,sdhci-8.9a" },
278 { .compatible = "arasan,sdhci-5.1" },
279 { .compatible = "arasan,sdhci-4.9a" },
282 MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
284 static struct platform_driver sdhci_arasan_driver = {
286 .name = "sdhci-arasan",
287 .of_match_table = sdhci_arasan_of_match,
288 .pm = &sdhci_arasan_dev_pm_ops,
290 .probe = sdhci_arasan_probe,
291 .remove = sdhci_arasan_remove,
294 module_platform_driver(sdhci_arasan_driver);
296 MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
297 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
298 MODULE_LICENSE("GPL");