2 * Arasan Secure Digital Host Controller Interface.
3 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
4 * Copyright (c) 2012 Wind River Systems, Inc.
5 * Copyright (C) 2013 Pengutronix e.K.
6 * Copyright (C) 2013 Xilinx Inc.
8 * Based on sdhci-of-esdhc.c
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 * Copyright (c) 2009 MontaVista Software, Inc.
13 * Authors: Xiaobo Xie <X.Xie@freescale.com>
14 * Anton Vorontsov <avorontsov@ru.mvista.com>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or (at
19 * your option) any later version.
22 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/phy/phy.h>
25 #include "sdhci-pltfm.h"
27 #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c
28 #define SDHCI_ARASAN_VENDOR_REGISTER 0x78
30 #define VENDOR_ENHANCED_STROBE BIT(0)
31 #define CLK_CTRL_TIMEOUT_SHIFT 16
32 #define CLK_CTRL_TIMEOUT_MASK (0xf << CLK_CTRL_TIMEOUT_SHIFT)
33 #define CLK_CTRL_TIMEOUT_MIN_EXP 13
36 * struct sdhci_arasan_data
37 * @clk_ahb: Pointer to the AHB clock
38 * @phy: Pointer to the generic phy
40 struct sdhci_arasan_data {
45 static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
49 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
51 div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
52 div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
54 freq = clk_get_rate(pltfm_host->clk);
55 freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
60 static void sdhci_arasan_enhanced_strobe(struct mmc_host *mmc,
64 struct sdhci_host *host = mmc_priv(mmc);
66 vendor = readl(host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER);
67 if (ios->enhanced_strobe)
68 vendor |= VENDOR_ENHANCED_STROBE;
70 vendor &= (~VENDOR_ENHANCED_STROBE);
72 writel(vendor, host->ioaddr + SDHCI_ARASAN_VENDOR_REGISTER);
75 static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock)
77 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
78 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
79 bool ctrl_phy = false;
81 if (clock > MMC_HIGH_52_MAX_DTR && (!IS_ERR(sdhci_arasan->phy)))
85 spin_unlock_irq(&host->lock);
86 phy_power_off(sdhci_arasan->phy);
87 spin_lock_irq(&host->lock);
90 sdhci_set_clock(host, clock);
93 spin_unlock_irq(&host->lock);
94 phy_power_on(sdhci_arasan->phy);
95 spin_lock_irq(&host->lock);
99 static struct sdhci_ops sdhci_arasan_ops = {
100 .set_clock = sdhci_arasan_set_clock,
101 .get_max_clock = sdhci_pltfm_clk_get_max_clock,
102 .get_timeout_clock = sdhci_arasan_get_timeout_clock,
103 .set_bus_width = sdhci_set_bus_width,
104 .reset = sdhci_reset,
105 .set_uhs_signaling = sdhci_set_uhs_signaling,
108 static struct sdhci_pltfm_data sdhci_arasan_pdata = {
109 .ops = &sdhci_arasan_ops,
110 .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
111 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
112 SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
115 #ifdef CONFIG_PM_SLEEP
117 * sdhci_arasan_suspend - Suspend method for the driver
118 * @dev: Address of the device structure
119 * Return: 0 on success and error value on error
121 * Put the device in a low power state.
123 static int sdhci_arasan_suspend(struct device *dev)
125 struct platform_device *pdev = to_platform_device(dev);
126 struct sdhci_host *host = platform_get_drvdata(pdev);
127 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
128 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
131 ret = sdhci_suspend_host(host);
135 if (!IS_ERR(sdhci_arasan->phy)) {
136 ret = phy_power_off(sdhci_arasan->phy);
138 dev_err(dev, "Cannot power off phy.\n");
139 sdhci_resume_host(host);
144 clk_disable(pltfm_host->clk);
145 clk_disable(sdhci_arasan->clk_ahb);
151 * sdhci_arasan_resume - Resume method for the driver
152 * @dev: Address of the device structure
153 * Return: 0 on success and error value on error
155 * Resume operation after suspend
157 static int sdhci_arasan_resume(struct device *dev)
159 struct platform_device *pdev = to_platform_device(dev);
160 struct sdhci_host *host = platform_get_drvdata(pdev);
161 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
162 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
165 ret = clk_enable(sdhci_arasan->clk_ahb);
167 dev_err(dev, "Cannot enable AHB clock.\n");
171 ret = clk_enable(pltfm_host->clk);
173 dev_err(dev, "Cannot enable SD clock.\n");
177 if (!IS_ERR(sdhci_arasan->phy)) {
178 ret = phy_power_on(sdhci_arasan->phy);
180 dev_err(dev, "Cannot power on phy.\n");
185 return sdhci_resume_host(host);
187 #endif /* ! CONFIG_PM_SLEEP */
189 static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
190 sdhci_arasan_resume);
192 static int sdhci_arasan_probe(struct platform_device *pdev)
196 struct sdhci_host *host;
197 struct sdhci_pltfm_host *pltfm_host;
198 struct sdhci_arasan_data *sdhci_arasan;
200 sdhci_arasan = devm_kzalloc(&pdev->dev, sizeof(*sdhci_arasan),
205 sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
206 if (IS_ERR(sdhci_arasan->clk_ahb)) {
207 dev_err(&pdev->dev, "clk_ahb clock not found.\n");
208 ret = PTR_ERR(sdhci_arasan->clk_ahb);
212 clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
213 if (IS_ERR(clk_xin)) {
214 dev_err(&pdev->dev, "clk_xin clock not found.\n");
215 ret = PTR_ERR(clk_xin);
219 ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
221 dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
225 ret = clk_prepare_enable(clk_xin);
227 dev_err(&pdev->dev, "Unable to enable SD clock.\n");
231 host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 0);
234 goto clk_disable_all;
237 if (of_device_is_compatible(pdev->dev.of_node, "arasan,sdhci-4.9a")) {
238 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
239 host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
242 sdhci_get_of_property(pdev);
243 pltfm_host = sdhci_priv(host);
244 pltfm_host->priv = sdhci_arasan;
245 pltfm_host->clk = clk_xin;
247 ret = mmc_of_parse(host->mmc);
249 dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
250 goto clk_disable_all;
253 sdhci_arasan->phy = ERR_PTR(-ENODEV);
254 if (of_device_is_compatible(pdev->dev.of_node,
255 "arasan,sdhci-5.1")) {
256 sdhci_arasan->phy = devm_phy_get(&pdev->dev,
258 if (IS_ERR(sdhci_arasan->phy)) {
259 ret = PTR_ERR(sdhci_arasan->phy);
260 dev_err(&pdev->dev, "No phy for arasan,sdhci-5.1.\n");
261 goto clk_disable_all;
264 ret = phy_init(sdhci_arasan->phy);
266 dev_err(&pdev->dev, "phy_init err.\n");
267 goto clk_disable_all;
270 ret = phy_power_on(sdhci_arasan->phy);
272 dev_err(&pdev->dev, "phy_power_on err.\n");
276 host->mmc_host_ops.hs400_enhanced_strobe =
277 sdhci_arasan_enhanced_strobe;
280 ret = sdhci_add_host(host);
287 if (!IS_ERR(sdhci_arasan->phy))
288 phy_power_off(sdhci_arasan->phy);
290 if (!IS_ERR(sdhci_arasan->phy))
291 phy_exit(sdhci_arasan->phy);
293 clk_disable_unprepare(clk_xin);
295 clk_disable_unprepare(sdhci_arasan->clk_ahb);
297 sdhci_pltfm_free(pdev);
301 static int sdhci_arasan_remove(struct platform_device *pdev)
304 struct sdhci_host *host = platform_get_drvdata(pdev);
305 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
306 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
308 if (!IS_ERR(sdhci_arasan->phy)) {
309 phy_power_off(sdhci_arasan->phy);
310 phy_exit(sdhci_arasan->phy);
313 ret = sdhci_pltfm_unregister(pdev);
315 clk_disable_unprepare(sdhci_arasan->clk_ahb);
320 static const struct of_device_id sdhci_arasan_of_match[] = {
321 { .compatible = "arasan,sdhci-8.9a" },
322 { .compatible = "arasan,sdhci-5.1" },
323 { .compatible = "arasan,sdhci-4.9a" },
326 MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
328 static struct platform_driver sdhci_arasan_driver = {
330 .name = "sdhci-arasan",
331 .of_match_table = sdhci_arasan_of_match,
332 .pm = &sdhci_arasan_dev_pm_ops,
334 .probe = sdhci_arasan_probe,
335 .remove = sdhci_arasan_remove,
338 module_platform_driver(sdhci_arasan_driver);
340 MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
341 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
342 MODULE_LICENSE("GPL");