1 /* drivers/mmc/host/rk29_sdmmc.c
3 * Copyright (C) 2010 ROCKCHIP, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 * mount -t debugfs debugfs /data/debugfs;cat /data/debugfs/mmc0/status
14 * echo 't' >/proc/sysrq-trigger
15 * echo 19 >/sys/module/wakelock/parameters/debug_mask
16 * vdc volume uevent on
19 #include <linux/blkdev.h>
20 #include <linux/clk.h>
21 #include <linux/debugfs.h>
22 #include <linux/device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/err.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/ioport.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/scatterlist.h>
31 #include <linux/seq_file.h>
32 #include <linux/stat.h>
33 #include <linux/delay.h>
34 #include <linux/irq.h>
35 #include <linux/mmc/host.h>
36 #include <linux/mmc/mmc.h>
37 #include <linux/mmc/card.h>
38 #include <linux/earlysuspend.h>
40 #include <mach/board.h>
41 #include <mach/rk29_iomap.h>
42 #include <mach/gpio.h>
43 #include <mach/iomux.h>
46 #include <mach/rk29-dma-pl330.h>
47 #include <asm/scatterlist.h>
49 #include "rk2818-sdmmc.h"
51 #define RK29_SDMMC_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | SDMMC_INT_HTO | SDMMC_INT_SBE | SDMMC_INT_EBE | SDMMC_INT_FRUN)
52 #define RK29_SDMMC_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | SDMMC_INT_RE | SDMMC_INT_HLE)
53 #define RK29_SDMMC_ERROR_FLAGS (RK29_SDMMC_DATA_ERROR_FLAGS | RK29_SDMMC_CMD_ERROR_FLAGS | SDMMC_INT_HLE)
55 #define RK29_SDMMC_TMO_COUNT 10000
57 #define RK29_SDCARD_CLK 48 //48Mhz
58 #define RK29_SDIO_CLK 36 //36Mhz
61 EVENT_CMD_COMPLETE = 0,
68 MRQ_REQUEST_START = 0,
71 MRQ_INT_DATA_DONE, //3
77 MRQ_CMD_START_TMO, //9
78 MRQ_CMD_START_DONE, //10
79 MRQ_STOP_START_TMO, //11
80 MRQ_STOP_START_DONE, //12
81 MRQ_CLK_START_TMO, //13
82 MRQ_CLK_START_DONE, //14
83 MRQ_RESET_CTRL_ERR, //15
84 MRQ_RESET_CTRL_DONE, //16
89 MRQ_REQUEST_DONE, //21
91 enum rk29_sdmmc_state {
99 #define rk29_sdmmc_test_and_clear_pending(host, event) \
100 test_and_clear_bit(event, &host->pending_events)
101 #define rk29_sdmmc_set_completed(host, event) \
102 set_bit(event, &host->completed_events)
103 #define rk29_sdmmc_set_pending(host, event) \
104 set_bit(event, &host->pending_events)
105 #define rk29_sdmmc_set_mrq_status(host, status) \
106 set_bit(status, &host->mrq_status)
107 #define rk29_sdmmc_test_mrq_status(host, status) \
108 test_bit(status, &host->mrq_status)
110 struct rk29_sdmmc_dma_info {
113 struct rk29_dma_client client;
115 static struct rk29_sdmmc_dma_info dma_infos[] = {
119 .name = "rk29-dma-sdmmc0",
125 .name = "rk29-dma-sdio1",
129 static int rk29_sdmmc_is_sdio(struct rk29_sdmmc_platform_data *pdata)
131 if(strncmp(pdata->dma_name, "sdio", strlen("sdio")) == 0)
146 int enable_sd_warkup;
149 unsigned int ios_clock;
152 unsigned int stop_cmdr;
153 unsigned int cmd_intsts;
154 unsigned int data_intsts;
155 unsigned long pending_events;
156 unsigned long completed_events;
157 unsigned long mrq_status;
158 unsigned long old_mrq_status;
165 struct mmc_host *mmc;
166 struct delayed_work work;
167 struct rk29_sdmmc_dma_info dma_info;
168 struct tasklet_struct tasklet;
169 struct mmc_request *mrq;
170 struct mmc_command *cmd;
172 struct timer_list monitor_timer;
174 enum rk29_sdmmc_state state;
177 int (*get_wifi_cd)(struct device *);
178 #ifdef CONFIG_HAS_EARLYSUSPEND
179 struct early_suspend early_suspend;
182 struct rk29_sdmmc *sdio_host = NULL;
183 static void rk29_sdmmc_write(unsigned char __iomem *regbase, unsigned int regOff,unsigned int val)
185 __raw_writel(val,regbase + regOff);
188 static unsigned int rk29_sdmmc_read(unsigned char __iomem *regbase, unsigned int regOff)
190 return __raw_readl(regbase + regOff);
194 #if defined (CONFIG_DEBUG_FS)
196 * The debugfs stuff below is mostly optimized away when
197 * CONFIG_DEBUG_FS is not set.
199 static int rk29_sdmmc_req_show(struct seq_file *s, void *v)
201 struct rk29_sdmmc *host = s->private;
202 struct mmc_request *mrq;
203 struct mmc_command *cmd;
204 struct mmc_command *stop;
205 struct mmc_data *data;
207 /* Make sure we get a consistent snapshot */
208 spin_lock(&host->lock);
218 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
219 cmd->opcode, cmd->arg, cmd->flags,
220 cmd->resp[0], cmd->resp[1], cmd->resp[2],
221 cmd->resp[2], cmd->error);
223 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
224 data->bytes_xfered, data->blocks,
225 data->blksz, data->flags, data->error);
228 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
229 stop->opcode, stop->arg, stop->flags,
230 stop->resp[0], stop->resp[1], stop->resp[2],
231 stop->resp[2], stop->error);
234 spin_unlock(&host->lock);
239 static int rk29_sdmmc_regs_show(struct seq_file *s, void *v)
241 struct rk29_sdmmc *host = s->private;
243 seq_printf(s, "SDMMC_CTRL: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTRL));
244 seq_printf(s, "SDMMC_PWREN: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_PWREN));
245 seq_printf(s, "SDMMC_CLKDIV: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKDIV));
246 seq_printf(s, "SDMMC_CLKSRC: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKSRC));
247 seq_printf(s, "SDMMC_CLKENA: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKENA));
248 seq_printf(s, "SDMMC_TMOUT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TMOUT));
249 seq_printf(s, "SDMMC_CTYPE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTYPE));
250 seq_printf(s, "SDMMC_BLKSIZ: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BLKSIZ));
251 seq_printf(s, "SDMMC_BYTCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BYTCNT));
252 seq_printf(s, "SDMMC_INTMASK:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_INTMASK));
253 seq_printf(s, "SDMMC_CMDARG: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMDARG));
254 seq_printf(s, "SDMMC_CMD: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMD));
255 seq_printf(s, "SDMMC_RESP0: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP0));
256 seq_printf(s, "SDMMC_RESP1: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP1));
257 seq_printf(s, "SDMMC_RESP2: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP2));
258 seq_printf(s, "SDMMC_RESP3: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP3));
259 seq_printf(s, "SDMMC_MINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_MINTSTS));
260 seq_printf(s, "SDMMC_RINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RINTSTS));
261 seq_printf(s, "SDMMC_STATUS: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_STATUS));
262 seq_printf(s, "SDMMC_FIFOTH: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_FIFOTH));
263 seq_printf(s, "SDMMC_CDETECT:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CDETECT));
264 seq_printf(s, "SDMMC_WRTPRT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_WRTPRT));
265 seq_printf(s, "SDMMC_TCBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TCBCNT));
266 seq_printf(s, "SDMMC_TBBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TBBCNT));
267 seq_printf(s, "SDMMC_DEBNCE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_DEBNCE));
272 static int rk29_sdmmc_status_show(struct seq_file *s, void *v)
274 struct rk29_sdmmc *host = s->private;
276 seq_printf(s, "state: \t\t0x%08x\n", host->state);
277 seq_printf(s, "pending_events: \t0x%08lx\n", host->pending_events);
278 seq_printf(s, "completed_events: \t0x%08lx\n", host->completed_events);
279 seq_printf(s, "mrq_status: \t\t0x%08lx\n", host->mrq_status);
280 seq_printf(s, "old_mrq_status: \t0x%08lx\n", host->old_mrq_status);
286 static int rk29_sdmmc_req_open(struct inode *inode, struct file *file)
288 return single_open(file, rk29_sdmmc_req_show, inode->i_private);
291 static const struct file_operations rk29_sdmmc_req_fops = {
292 .owner = THIS_MODULE,
293 .open = rk29_sdmmc_req_open,
296 .release = single_release,
299 static int rk29_sdmmc_regs_open(struct inode *inode, struct file *file)
301 return single_open(file, rk29_sdmmc_regs_show, inode->i_private);
304 static const struct file_operations rk29_sdmmc_regs_fops = {
305 .owner = THIS_MODULE,
306 .open = rk29_sdmmc_regs_open,
309 .release = single_release,
311 static int rk29_sdmmc_status_open(struct inode *inode, struct file *file)
313 return single_open(file, rk29_sdmmc_status_show, inode->i_private);
316 static const struct file_operations rk29_sdmmc_status_fops = {
317 .owner = THIS_MODULE,
318 .open = rk29_sdmmc_status_open,
321 .release = single_release,
324 static void rk29_sdmmc_init_debugfs(struct rk29_sdmmc *host)
326 struct mmc_host *mmc = host->mmc;
330 root = mmc->debugfs_root;
334 node = debugfs_create_file("regs", S_IRUSR, root, host,&rk29_sdmmc_regs_fops);
338 node = debugfs_create_file("req", S_IRUSR, root, host, &rk29_sdmmc_req_fops);
342 node = debugfs_create_file("status", S_IRUSR, root, host, &rk29_sdmmc_status_fops);
349 dev_err(&mmc->class_dev, "failed to initialize debugfs for host\n");
352 static void rk29_sdmmc_show_info(struct rk29_sdmmc *host)
354 dev_info(host->dev, "state: \t\t0x%08x\n", host->state);
355 dev_info(host->dev, "pending_events: \t0x%08lx\n", host->pending_events);
356 dev_info(host->dev, "completed_events: \t0x%08lx\n", host->completed_events);
357 dev_info(host->dev, "mrq_status: \t\t0x%08lx\n\n", host->mrq_status);
358 dev_info(host->dev, "old_mrq_status: \t0x%08lx\n\n", host->old_mrq_status);
359 dev_info(host->dev, "SDMMC_CTRL: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTRL));
360 dev_info(host->dev, "SDMMC_PWREN: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_PWREN));
361 dev_info(host->dev, "SDMMC_CLKDIV: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKDIV));
362 dev_info(host->dev, "SDMMC_CLKSRC: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKSRC));
363 dev_info(host->dev, "SDMMC_CLKENA: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKENA));
364 dev_info(host->dev, "SDMMC_TMOUT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TMOUT));
365 dev_info(host->dev, "SDMMC_CTYPE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTYPE));
366 dev_info(host->dev, "SDMMC_BLKSIZ: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BLKSIZ));
367 dev_info(host->dev, "SDMMC_BYTCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BYTCNT));
368 dev_info(host->dev, "SDMMC_INTMASK:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_INTMASK));
369 dev_info(host->dev, "SDMMC_CMDARG: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMDARG));
370 dev_info(host->dev, "SDMMC_CMD: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMD));
371 dev_info(host->dev, "SDMMC_RESP0: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP0));
372 dev_info(host->dev, "SDMMC_RESP1: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP1));
373 dev_info(host->dev, "SDMMC_RESP2: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP2));
374 dev_info(host->dev, "SDMMC_RESP3: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP3));
375 dev_info(host->dev, "SDMMC_MINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_MINTSTS));
376 dev_info(host->dev, "SDMMC_RINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RINTSTS));
377 dev_info(host->dev, "SDMMC_STATUS: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_STATUS));
378 dev_info(host->dev, "SDMMC_FIFOTH: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_FIFOTH));
379 dev_info(host->dev, "SDMMC_CDETECT:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CDETECT));
380 dev_info(host->dev, "SDMMC_WRTPRT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_WRTPRT));
381 dev_info(host->dev, "SDMMC_TCBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TCBCNT));
382 dev_info(host->dev, "SDMMC_TBBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TBBCNT));
383 dev_info(host->dev, "SDMMC_DEBNCE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_DEBNCE));
385 static int rk29_sdmmc_reset_fifo(struct rk29_sdmmc *host)
388 int retry = RK29_SDMMC_TMO_COUNT;
389 if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_MC_BUSY|SDMMC_STAUTS_DATA_BUSY)) &&
390 (rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_EMPTY))
395 tmo = RK29_SDMMC_TMO_COUNT;
396 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_FIFO_RESET);
397 while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CTRL) & SDMMC_CTRL_FIFO_RESET);
398 if(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_MC_BUSY|SDMMC_STAUTS_DATA_BUSY))
404 dev_dbg(host->dev, "%s error\n", __func__);
410 static int rk29_sdmmc_reset_ctrl(struct rk29_sdmmc *host)
412 int tmo = RK29_SDMMC_TMO_COUNT;
414 if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_MC_BUSY|SDMMC_STAUTS_DATA_BUSY)))
417 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
418 while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
419 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_INT_ENABLE);
422 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_DONE);
427 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_ERR);
428 dev_err(host->dev, "%s error\n", __func__);
433 static int rk29_sdmmc_start_command(struct rk29_sdmmc *host,
434 struct mmc_command *cmd, u32 cmd_flags)
436 int tmo = RK29_SDMMC_TMO_COUNT;
439 local_irq_save(flags);
441 rk29_sdmmc_write(host->regs, SDMMC_CMDARG, cmd->arg);
442 rk29_sdmmc_write(host->regs, SDMMC_CMD, cmd_flags | SDMMC_CMD_START);
443 local_irq_restore(flags);
445 while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START)
453 static int send_stop_cmd(struct rk29_sdmmc *host)
455 dev_dbg(host->dev,"start cmd:%d ARGR=0x%08x CMDR=0x%08x\n",
456 host->mrq->data->stop->opcode, host->mrq->data->stop->arg, host->stop_cmdr);
457 if(rk29_sdmmc_start_command(host, host->mrq->data->stop, host->stop_cmdr)) {
458 rk29_sdmmc_set_mrq_status(host, MRQ_STOP_START_TMO);
462 rk29_sdmmc_set_mrq_status(host, MRQ_STOP_START_DONE);
466 static void rk29_sdmmc_dma_cleanup(struct rk29_sdmmc *host)
468 struct mmc_data *data = host->mrq->data;
470 dma_unmap_sg(host->dev, data->sg, data->sg_len,
471 ((data->flags & MMC_DATA_WRITE)
472 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
475 static void rk29_sdmmc_stop_dma(struct rk29_sdmmc *host)
478 rk29_sdmmc_set_mrq_status(host, MRQ_STOP_DMA);
479 rk29_sdmmc_dma_cleanup(host);
480 ret = rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_STOP);
482 dev_err(host->dev, "stop dma:rk29_dma_ctrl stop error\n");
483 ret = rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_FLUSH);
485 dev_err(host->dev, "stop dma:rk29_dma_ctrl flush error\n");
486 rk29_sdmmc_write(host->regs, SDMMC_CTRL,
487 (rk29_sdmmc_read(host->regs, SDMMC_CTRL))&(~SDMMC_CTRL_DMA_ENABLE));
490 static void rk29_sdmmc_request_done(struct rk29_sdmmc *host,struct mmc_request *mrq)
492 int tmo = RK29_SDMMC_TMO_COUNT;
494 spin_unlock(&host->lock);
495 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, ~SDMMC_INT_SDIO);
496 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,
497 rk29_sdmmc_read(host->regs, SDMMC_INTMASK) &
498 ~(SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS));
500 if(!rk29_sdmmc_test_mrq_status(host, MRQ_STOP_DMA) &&
501 rk29_sdmmc_test_mrq_status(host, MRQ_START_DMA))
502 rk29_sdmmc_stop_dma(host);
503 if(mrq->stop && !rk29_sdmmc_test_mrq_status(host, MRQ_STOP_START_DONE))
505 if(mrq->cmd->opcode == 17 && (host->data_intsts & SDMMC_INT_SBE)){
506 rk29_sdmmc_write(host->regs, SDMMC_CMD, 12|SDMMC_CMD_STOP | SDMMC_CMD_START);
507 while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START);
509 if(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_FULL ){
510 rk29_sdmmc_read(host->regs, SDMMC_DATA);
511 rk29_sdmmc_read(host->regs, SDMMC_DATA);
513 //if(mrq->data && mrq->data->error)
514 rk29_sdmmc_reset_fifo(host);
517 host->state = STATE_IDLE;
518 rk29_sdmmc_set_mrq_status(host, MRQ_REQUEST_DONE);
519 mmc_request_done(host->mmc, mrq);
520 del_timer(&host->monitor_timer);
522 spin_lock(&host->lock);
525 static int sdmmc_send_cmd(struct rk29_sdmmc *host, unsigned int cmd, int arg)
527 int tmo = RK29_SDMMC_TMO_COUNT;
528 rk29_sdmmc_write(host->regs, SDMMC_CMDARG, arg);
529 rk29_sdmmc_write(host->regs, SDMMC_CMD, SDMMC_CMD_START | cmd);
530 while (--tmo && readl(host->regs + SDMMC_CMD) & SDMMC_CMD_START);
537 int rk29_sdmmc_set_clock(struct rk29_sdmmc *host)
542 div = (((host->bus_hz + (host->bus_hz / 5)) / host->ios_clock)) >> 1;
550 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
551 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
552 if(sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0))
554 rk29_sdmmc_write(host->regs, SDMMC_CLKDIV, div);
556 host->clock = (div == 0)? host->bus_hz :(host->bus_hz / div) >> 1;
557 if(sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0))
559 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, SDMMC_CLKEN_ENABLE);
560 if(sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0))
563 rk29_sdmmc_set_mrq_status(host, MRQ_CLK_START_DONE);
566 rk29_sdmmc_set_mrq_status(host, MRQ_CLK_START_TMO);
570 static void rk29_sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
572 struct rk29_sdmmc *host = mmc_priv(mmc);;
575 switch (ios->bus_width) {
576 case MMC_BUS_WIDTH_1:
577 rk29_sdmmc_write(host->regs, SDMMC_CTYPE, 0);
579 case MMC_BUS_WIDTH_4:
580 rk29_sdmmc_write(host->regs, SDMMC_CTYPE, SDMMC_CTYPE_4BIT);
583 host->ios_clock = ios->clock;
585 switch (ios->power_mode) {
588 rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
595 static int rk29_sdmmc_get_ro(struct mmc_host *mmc)
597 struct rk29_sdmmc *host = mmc_priv(mmc);
598 u32 wrtprt = rk29_sdmmc_read(host->regs, SDMMC_WRTPRT);
600 return (wrtprt & SDMMC_WRITE_PROTECT)?1:0;
604 static int rk29_sdmmc_get_cd(struct mmc_host *mmc)
606 struct rk29_sdmmc *host = mmc_priv(mmc);
609 return host->get_wifi_cd(mmc_dev(host->mmc));
610 else if(host->gpio_det == INVALID_GPIO)
613 return gpio_get_value(host->gpio_det)?0:1;
616 static inline unsigned ns_to_clocks(unsigned clkrate, unsigned ns)
619 if (clkrate > 1000000)
620 clks = (ns * (clkrate / 1000000) + 999) / 1000;
622 clks = ((ns/1000) * (clkrate / 1000) + 999) / 1000;
627 static void rk29_sdmmc_set_timeout(struct rk29_sdmmc *host,struct mmc_data *data)
634 else if(host->div == 0)
635 clock = host->bus_hz;
637 clock = (host->bus_hz / host->div) >> 1;
638 timeout = ns_to_clocks(clock, data->timeout_ns) + data->timeout_clks;
639 rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xffffffff);
640 //rk29_sdmmc_write(host->regs, SDMMC_TMOUT, (timeout << 8) | (70));
642 static u32 rk29_sdmmc_prepare_command(struct mmc_host *mmc,
643 struct mmc_command *cmd)
645 struct mmc_data *data;
648 cmd->error = -EINPROGRESS;
652 cmdr |= SDMMC_CMD_STOP;
654 cmdr &= ~SDMMC_CMD_PRV_DAT_WAIT;
656 cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
658 if (cmd->flags & MMC_RSP_PRESENT) {
659 cmdr |= SDMMC_CMD_RESP_EXP; // expect the respond, need to set this bit
660 if (cmd->flags & MMC_RSP_136)
661 cmdr |= SDMMC_CMD_RESP_LONG; // expect long respond
663 if(cmd->flags & MMC_RSP_CRC)
664 cmdr |= SDMMC_CMD_RESP_CRC;
669 cmdr |= SDMMC_CMD_DAT_EXP;
670 if (data->flags & MMC_DATA_STREAM)
671 cmdr |= SDMMC_CMD_STRM_MODE; // set stream mode
672 if (data->flags & MMC_DATA_WRITE)
673 cmdr |= SDMMC_CMD_DAT_WR;
677 static int rk29_sdmmc_submit_data(struct rk29_sdmmc *host, struct mmc_data *data)
679 struct scatterlist *sg;
680 unsigned int i,direction;
681 int dma_len=0, ret = 0;
683 if (data->blksz & 3){
684 dev_info(host->dev, "data->blksz = %d\n", data->blksz);
687 for_each_sg(data->sg, sg, data->sg_len, i) {
688 if (sg->offset & 3 || sg->length & 3){
689 dev_info(host->dev, "sg->offset = %d, sg->length = %d\n",
690 sg->offset, sg->length);
694 if (data->flags & MMC_DATA_READ)
695 direction = RK29_DMASRC_HW;
697 direction = RK29_DMASRC_MEM;
699 ret = rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_STOP);
701 dev_err(host->dev, "rk29_dma_ctrl stop error\n");
702 ret = rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_FLUSH);
704 dev_err(host->dev, "rk29_dma_ctrl flush error\n");
705 ret = rk29_dma_devconfig(host->dma_info.chn, direction, (unsigned long )(host->dma_addr));
707 dev_err(host->dev, "rk29_dma_devconfig error\n");
708 dma_len = dma_map_sg(host->dev, data->sg, data->sg_len,
709 (data->flags & MMC_DATA_READ)? DMA_FROM_DEVICE : DMA_TO_DEVICE);
710 for (i = 0; i < dma_len; i++) {
711 ret = rk29_dma_enqueue(host->dma_info.chn, host, sg_dma_address(&data->sg[i]),sg_dma_len(&data->sg[i])); // data->sg->dma_address, data->sg->length);
713 dev_err(host->dev, "rk29 dma enqueue error\n");
715 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))|SDMMC_CTRL_DMA_ENABLE);// enable dma
716 ret = rk29_dma_ctrl(host->dma_info.chn, RK29_DMAOP_START);
718 dev_err(host->dev, "rk29_dma_ctrl start error\n");
719 rk29_sdmmc_set_mrq_status(host, MRQ_START_DMA);
722 static int rk29_sdmmc_test_cmd_start(struct rk29_sdmmc *host)
724 return rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START;
726 static int rk29_sdmmc_start_request(struct rk29_sdmmc *host,struct mmc_request *mrq)
729 struct mmc_command *cmd;
732 BUG_ON(host->state != STATE_IDLE);
734 spin_lock(&host->lock);
736 if(rk29_sdmmc_test_cmd_start(host)){
737 dev_info(host->dev, "cmd_start bit is set ,reset ctroller\n");
738 ret = rk29_sdmmc_reset_ctrl(host);
743 host->state = STATE_SENDING_CMD;
746 rk29_sdmmc_set_timeout(host,mrq->data);
747 rk29_sdmmc_write(host->regs, SDMMC_BYTCNT,mrq->data->blksz*mrq->data->blocks);
748 rk29_sdmmc_write(host->regs, SDMMC_BLKSIZ,mrq->data->blksz);
751 cmdflags = rk29_sdmmc_prepare_command(host->mmc, cmd);
754 cmdflags |= SDMMC_CMD_INIT;
758 rk29_sdmmc_set_mrq_status(host, MRQ_HAS_DATA);
759 ret = rk29_sdmmc_submit_data(host, mrq->data);
762 rk29_sdmmc_set_mrq_status(host, MRQ_DMA_SET_ERR);
765 dev_dbg(host->dev,"start cmd:%d ARGR=0x%08x CMDR=0x%08x\n",
766 cmd->opcode, cmd->arg, cmdflags);
768 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, ~SDMMC_INT_SDIO);
769 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,
770 rk29_sdmmc_read(host->regs, SDMMC_INTMASK) |
771 (SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS));
772 ret = rk29_sdmmc_start_command(host, cmd, cmdflags);
774 rk29_sdmmc_set_mrq_status(host, MRQ_CMD_START_TMO);
777 rk29_sdmmc_set_mrq_status(host, MRQ_CMD_START_DONE);
779 rk29_sdmmc_set_mrq_status(host, MRQ_HAS_STOP);
780 host->stop_cmdr = rk29_sdmmc_prepare_command(host->mmc, mrq->stop);
781 if(mrq->cmd->opcode == 25)
782 host->stop_cmdr |= SDMMC_CMD_DAT_WR;
784 spin_unlock(&host->lock);
787 spin_unlock(&host->lock);
791 static void rk29_sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
794 struct rk29_sdmmc *host = mmc_priv(mmc);
797 dev_info(host->dev, "mrq = NULL!!!!!\n");
799 dev_info(host->dev, "%s-> host->mrq = NULL\n", __func__);
800 rk29_sdmmc_show_info(host);
802 if((!rk29_sdmmc_test_mrq_status(host, MRQ_STOP_DMA) &&
803 rk29_sdmmc_test_mrq_status(host, MRQ_START_DMA)) ||
804 (rk29_sdmmc_test_mrq_status(host, MRQ_STOP_DMA) &&
805 !rk29_sdmmc_test_mrq_status(host, MRQ_START_DMA)))
806 dev_warn(host->dev, "start_dma but no stop_dma, or no start_dma but stop_dma\n");
808 host->old_mrq_status = host->mrq_status;
809 host->mrq_status = 0;
810 host->pending_events = 0;
811 host->completed_events= 0;
812 host->cmd_intsts = 0;
813 host->data_intsts = 0;
819 timeout = 5000 + mrq->data->timeout_ns/1000000;
820 mod_timer(&host->monitor_timer, jiffies + msecs_to_jiffies(timeout));
822 if (!rk29_sdmmc_get_cd(mmc)) {
823 mrq->cmd->error = -ENOMEDIUM;
824 rk29_sdmmc_request_done(host, mrq);
825 dev_dbg(host->dev, "mrq_status = 0x%08lx\n", host->mrq_status);
829 if(rk29_sdmmc_set_clock(host)) {
830 mrq->cmd->error = -EINPROGRESS;
831 dev_info(host->dev, "rk29_sdmmc_set_clock timeout, ios_clock = %d, clock = %d\n", host->ios_clock, host->clock);
832 rk29_sdmmc_request_done(host, mrq);
833 rk29_sdmmc_reset_ctrl(host);
834 rk29_sdmmc_show_info(host);
838 if(rk29_sdmmc_start_request(host,mrq)) {
839 dev_info(host->dev, "rk29_sdmmc_start_request timeout\n");
840 mrq->cmd->error = -EINPROGRESS;
841 rk29_sdmmc_request_done(host, mrq);
842 rk29_sdmmc_reset_ctrl(host);
843 rk29_sdmmc_show_info(host);
848 static void rk29_sdmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
852 struct rk29_sdmmc *host = mmc_priv(mmc);
854 spin_lock_irqsave(&host->lock, flags);
855 intmask = rk29_sdmmc_read(host->regs, SDMMC_INTMASK);
857 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask | SDMMC_INT_SDIO);
859 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask & ~SDMMC_INT_SDIO);
860 spin_unlock_irqrestore(&host->lock, flags);
863 static void rk29_sdmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
865 card->quirks = MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
868 static const struct mmc_host_ops rk29_sdmmc_ops[] = {
870 .request = rk29_sdmmc_request,
871 .set_ios = rk29_sdmmc_set_ios,
872 .get_ro = rk29_sdmmc_get_ro,
873 .get_cd = rk29_sdmmc_get_cd,
876 .request = rk29_sdmmc_request,
877 .set_ios = rk29_sdmmc_set_ios,
878 .enable_sdio_irq = rk29_sdmmc_enable_sdio_irq,
879 .init_card = rk29_sdmmc_init_card,
883 static void rk29_sdmmc_request_end(struct rk29_sdmmc *host)
884 __releases(&host->lock)
885 __acquires(&host->lock)
888 rk29_sdmmc_request_done(host, host->mrq);
891 static void rk29_sdmmc_command_complete(struct rk29_sdmmc *host,
892 struct mmc_command *cmd)
894 unsigned int intsts = host->cmd_intsts;
896 host->cmd_intsts = 0;
897 if(cmd->flags & MMC_RSP_PRESENT) {
899 if(cmd->flags & MMC_RSP_136) {
900 cmd->resp[3] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
901 cmd->resp[2] = rk29_sdmmc_read(host->regs, SDMMC_RESP1);
902 cmd->resp[1] = rk29_sdmmc_read(host->regs, SDMMC_RESP2);
903 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP3);
905 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
912 if (intsts & SDMMC_INT_RTO)
913 cmd->error = -ETIMEDOUT;
914 else if ((cmd->flags & MMC_RSP_CRC) && (intsts & SDMMC_INT_RCRC))
915 cmd->error = -EILSEQ;
916 else if (intsts & SDMMC_INT_RE)
918 else if(intsts & SDMMC_INT_HLE)
925 "command error: status=0x%08x resp=0x%08x\n"
926 "cmd=0x%08x arg=0x%08x flg=0x%08x err=%d\n",
927 intsts, cmd->resp[0],
928 cmd->opcode, cmd->arg, cmd->flags, cmd->error);
931 rk29_sdmmc_stop_dma(host);
936 static void rk29_sdmmc_tasklet_func(unsigned long priv)
938 struct rk29_sdmmc *host = (struct rk29_sdmmc *)priv;
939 enum rk29_sdmmc_state state;
940 enum rk29_sdmmc_state prev_state;
943 spin_lock(&host->lock);
952 case STATE_SENDING_CMD:
953 if (!rk29_sdmmc_test_and_clear_pending(host,
956 rk29_sdmmc_set_completed(host, EVENT_CMD_COMPLETE);
958 dev_info(host->dev, "sending cmd, host->mrq = NULL\n");
959 rk29_sdmmc_show_info(host);
961 rk29_sdmmc_command_complete(host, host->mrq->cmd);
962 if (!host->mrq->data || (host->mrq->cmd->error)) {
963 rk29_sdmmc_request_end(host);
966 prev_state = state = STATE_SENDING_DATA;
968 case STATE_SENDING_DATA:
969 if (rk29_sdmmc_test_and_clear_pending(host,
972 dev_info(host->dev, "sending data, host->mrq = NULL\n");
973 rk29_sdmmc_show_info(host);
975 if(!rk29_sdmmc_test_mrq_status(host, MRQ_DMA_DONE) &&
976 rk29_sdmmc_test_mrq_status(host, MRQ_START_DMA))
977 dev_info(host->dev, "dma is running...\n");
978 rk29_sdmmc_stop_dma(host);
979 if (host->mrq->data->stop)
981 state = STATE_DATA_ERROR;
984 prev_state = state = STATE_DATA_BUSY;
986 case STATE_DATA_BUSY:
987 if (!rk29_sdmmc_test_and_clear_pending(host,EVENT_DATA_COMPLETE) &&
988 !(host->data_intsts & SDMMC_INT_SBE))
991 rk29_sdmmc_set_completed(host, EVENT_DATA_COMPLETE);
992 intsts = host->data_intsts;
994 dev_info(host->dev, "%s-> host->mrq = NULL\n", __func__);
995 rk29_sdmmc_show_info(host);
997 if(host->mrq->data) {
998 if (unlikely(intsts & RK29_SDMMC_DATA_ERROR_FLAGS)) {
999 if (intsts & SDMMC_INT_DRTO) {
1000 dev_err(host->dev,"data timeout error\n");
1001 host->mrq->data->error = -ETIMEDOUT;
1002 } else if (intsts & SDMMC_INT_DCRC) {
1003 dev_err(host->dev,"data CRC error\n");
1004 host->mrq->data->error = -EILSEQ;
1005 } else if (intsts & SDMMC_INT_SBE) {
1006 dev_err(host->dev,"data start bit error\n");
1007 host->mrq->data->error = -EILSEQ;
1009 dev_err(host->dev,"data FIFO error (status=%08x)\n",intsts);
1010 host->mrq->data->error = -EIO;
1012 rk29_sdmmc_show_info(host);
1014 host->mrq->data->bytes_xfered = host->mrq->data->blocks * host->mrq->data->blksz;
1015 host->mrq->data->error = 0;
1018 if (!host->mrq->data->stop) {
1019 rk29_sdmmc_request_end(host);
1023 prev_state = state = STATE_SENDING_STOP;
1024 if (host->mrq->data && !host->mrq->data->error)
1025 send_stop_cmd(host);
1028 case STATE_SENDING_STOP:
1029 if (!rk29_sdmmc_test_and_clear_pending(host,
1030 EVENT_CMD_COMPLETE))
1033 dev_info(host->dev, "%s-> host->mrq = NULL\n", __func__);
1034 rk29_sdmmc_show_info(host);
1037 rk29_sdmmc_command_complete(host, host->mrq->stop);
1038 rk29_sdmmc_request_end(host);
1040 case STATE_DATA_ERROR:
1041 state = STATE_DATA_BUSY;
1044 } while (state != prev_state);
1046 host->state = state;
1049 spin_unlock(&host->lock);
1055 static irqreturn_t rk29_sdmmc_isr(int irq, void *dev_id)
1057 struct rk29_sdmmc *host = dev_id;
1058 unsigned int intsts;
1060 intsts = rk29_sdmmc_read(host->regs, SDMMC_MINTSTS);
1062 spin_lock(&host->lock);
1063 if(intsts & RK29_SDMMC_CMD_ERROR_FLAGS) {
1064 rk29_sdmmc_set_mrq_status(host, MRQ_INT_CMD_ERR);
1065 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_CMD_ERROR_FLAGS);
1066 host->cmd_intsts = intsts;
1068 rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1070 dev_info(host->dev, "%s-> host->mrq = NULL\n", __func__);
1071 rk29_sdmmc_show_info(host);
1074 dev_info(host->dev, "[cmd%d] cmd error(intsts 0x%x, host->state %d, pending_events %ld)\n",
1075 host->mrq->cmd->opcode,intsts,host->state,host->pending_events);
1076 tasklet_schedule(&host->tasklet);
1079 if (intsts & RK29_SDMMC_DATA_ERROR_FLAGS) {
1080 rk29_sdmmc_set_mrq_status(host, MRQ_INT_DATA_ERR);
1081 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_DATA_ERROR_FLAGS);
1082 host->data_intsts = intsts;
1084 rk29_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1086 dev_info(host->dev, "%s-> host->mrq = NULL\n", __func__);
1087 rk29_sdmmc_show_info(host);
1090 dev_info(host->dev, "[cmd%d] data error(intsts 0x%x, host->state %d, pending_events %ld)\n",
1091 host->mrq->cmd->opcode, intsts,host->state,host->pending_events);
1092 tasklet_schedule(&host->tasklet);
1095 if(intsts & SDMMC_INT_DTO) {
1096 rk29_sdmmc_set_mrq_status(host, MRQ_INT_DATA_DONE);
1097 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_DTO);
1098 if (!host->data_intsts)
1099 host->data_intsts = intsts;
1101 rk29_sdmmc_set_pending(host, EVENT_DATA_COMPLETE);
1102 tasklet_schedule(&host->tasklet);
1104 if (intsts & SDMMC_INT_CMD_DONE) {
1105 rk29_sdmmc_set_mrq_status(host, MRQ_INT_CMD_DONE);
1106 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_CMD_DONE);
1107 if(!host->cmd_intsts)
1108 host->cmd_intsts = intsts;
1111 rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1112 tasklet_schedule(&host->tasklet);
1114 if(host->is_sdio && (intsts & SDMMC_INT_SDIO)) {
1115 rk29_sdmmc_set_mrq_status(host, MRQ_INT_SDIO);
1116 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_SDIO);
1117 mmc_signal_sdio_irq(host->mmc);
1119 spin_unlock(&host->lock);
1123 static void rk29_sdmmc_dma_complete(void *arg, int size, enum rk29_dma_buffresult result)
1125 struct rk29_sdmmc *host = arg;
1127 dev_dbg(host->dev, "DMA complete\n");
1128 rk29_sdmmc_set_mrq_status(host, MRQ_DMA_DONE);
1131 static void rk29_sdmmc_detect_change(struct rk29_sdmmc *host)
1133 spin_lock(&host->lock);
1135 del_timer(&host->monitor_timer);
1136 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, ~SDMMC_INT_SDIO);
1137 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,
1138 rk29_sdmmc_read(host->regs, SDMMC_INTMASK) &
1139 ~(SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS));
1141 switch (host->state) {
1144 case STATE_SENDING_CMD:
1146 host->mrq->cmd->error = -ENOMEDIUM;
1147 if (!host->mrq->data)
1150 case STATE_SENDING_DATA:
1152 host->mrq->data->error = -ENOMEDIUM;
1153 rk29_sdmmc_stop_dma(host);
1155 case STATE_DATA_BUSY:
1156 case STATE_DATA_ERROR:
1157 if (host->mrq->data && host->mrq->data->error == -EINPROGRESS)
1158 host->mrq->data->error = -ENOMEDIUM;
1159 if (!host->mrq->stop)
1162 case STATE_SENDING_STOP:
1163 if(host->mrq->stop) {
1164 host->mrq->stop->error = -ENOMEDIUM;
1168 rk29_sdmmc_request_end(host);
1170 rk29_sdmmc_reset_fifo(host);
1171 spin_unlock(&host->lock);
1172 mmc_detect_change(host->mmc, 0);
1175 static void rk29_sdmmc1_status_notify_cb(int card_present, void *dev_id)
1177 struct rk29_sdmmc *host = dev_id;
1179 card_present = rk29_sdmmc_get_cd(host->mmc);
1180 dev_info(host->dev, "sdio change detected,status is %d\n",card_present);
1182 rk29_sdmmc_detect_change(host);
1185 static void rk29_sdmmc_get_dma_dma_info(struct rk29_sdmmc *host)
1188 host->dma_info = dma_infos[1];
1190 host->dma_info = dma_infos[0];
1193 static irqreturn_t rk29_sdmmc_detect_change_isr(int irq, void *dev_id);
1194 static void rk29_sdmmc_detect_change_work(struct work_struct *work)
1197 struct rk29_sdmmc *host = container_of(work, struct rk29_sdmmc, work.work);
1199 dev_info(host->dev, "sd detect change, card is %s\n",
1200 rk29_sdmmc_get_cd(host->mmc)?"inserted":"removed");
1201 if(host->enable_sd_warkup && rk29_sdmmc_get_cd(host->mmc))
1202 rk28_send_wakeup_key();
1203 rk29_sdmmc_detect_change(host);
1205 free_irq(host->gpio_irq, host);
1206 ret = request_irq(host->gpio_irq,
1207 rk29_sdmmc_detect_change_isr,
1208 rk29_sdmmc_get_cd(host->mmc)?IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING,
1212 dev_err(host->dev, "gpio request_irq error\n");
1214 static irqreturn_t rk29_sdmmc_detect_change_isr(int irq, void *dev_id)
1216 struct rk29_sdmmc *host = dev_id;
1218 disable_irq_nosync(host->gpio_irq);
1219 if(rk29_sdmmc_get_cd(host->mmc))
1220 schedule_delayed_work(&host->work, msecs_to_jiffies(500));
1222 schedule_delayed_work(&host->work, 0);
1226 static void rk29_sdmmc_monitor_timer(unsigned long data)
1228 struct rk29_sdmmc *host = (struct rk29_sdmmc *)data;
1230 if(!rk29_sdmmc_test_mrq_status(host, MRQ_REQUEST_DONE)){
1231 dev_info(host->dev, "no dto interrupt\n");
1232 rk29_sdmmc_show_info(host);
1233 host->mrq->cmd->error = -ETIMEDOUT;
1235 host->mrq->data->error = -ETIMEDOUT;
1236 rk29_sdmmc_request_end(host);
1237 //rk29_sdmmc_reset_ctrl(host);
1242 #ifdef CONFIG_HAS_EARLYSUSPEND
1243 static void rk29_sdmmc_early_suspend(struct early_suspend *h)
1245 struct rk29_sdmmc *host = container_of(h,
1249 dev_dbg(host->dev, "Enter rk29_sdmmc_early_suspend\n");
1252 static void rk29_sdmmc_early_resume(struct early_suspend *h)
1254 struct rk29_sdmmc *host = container_of(h,
1258 dev_dbg(host->dev, "Exit rk29_sdmmc_early_resume\n");
1263 static int rk29_sdmmc_probe(struct platform_device *pdev)
1265 struct mmc_host *mmc;
1266 struct rk29_sdmmc *host;
1267 struct resource *regs;
1268 struct rk29_sdmmc_platform_data *pdata;
1271 pdata = pdev->dev.platform_data;
1273 dev_err(&pdev->dev, "Platform data missing\n");
1279 mmc = mmc_alloc_host(sizeof(struct rk29_sdmmc), &pdev->dev);
1283 host = mmc_priv(mmc);
1285 host->dev = &pdev->dev;
1287 host->state = STATE_IDLE;
1290 host->is_sdio = rk29_sdmmc_is_sdio(pdata);
1294 host->get_wifi_cd = pdata->status;
1296 host->irq = platform_get_irq(pdev, 0);
1297 if (host->irq < 0) {
1298 dev_err(&pdev->dev, "platform_get_irq error\n");
1300 goto err_mmc_free_host;
1303 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1305 dev_err(&pdev->dev, "platform_get_resource error\n");
1307 goto err_mmc_free_host;
1310 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1312 dev_err(&pdev->dev, "ioremap error\n");
1314 goto err_mmc_free_host;
1316 spin_lock_init(&host->lock);
1319 rk29_sdmmc_get_dma_dma_info(host);
1320 ret = rk29_dma_request(host->dma_info.chn, &(host->dma_info.client), NULL);
1322 dev_err(&pdev->dev, "rk29_dma_request error\n");
1325 ret = rk29_dma_config(host->dma_info.chn, 4, 1);
1328 dev_err(&pdev->dev, "rk29_dma_config error\n");
1329 //goto err_rk29_dma_free;
1331 ret = rk29_dma_set_buffdone_fn(host->dma_info.chn, rk29_sdmmc_dma_complete);
1333 dev_err(&pdev->dev, "rk29_dma_set_buffdone_fn error\n");
1334 goto err_rk29_dma_free;
1336 host->dma_addr = regs->start + SDMMC_DATA;
1339 host->clk = clk_get(&pdev->dev, "mmc");
1341 clk_set_rate(host->clk,RK29_SDIO_CLK * 1000000);
1343 clk_set_rate(host->clk,RK29_SDCARD_CLK * 1000000);
1344 clk_enable(host->clk);
1345 clk_enable(clk_get(&pdev->dev, "hclk_mmc"));
1346 host->bus_hz = clk_get_rate(host->clk);
1348 /* reset all blocks */
1349 rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1350 /* wait till resets clear */
1351 while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1352 /* Clear the interrupts for the host controller */
1353 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1354 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1355 /* Put in max timeout */
1356 rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xFFFFFFFF);
1358 /* FIFO threshold settings */
1359 rk29_sdmmc_write(host->regs, SDMMC_FIFOTH, ((0x3 << 28) | (0x0f << 16) | (0x10 << 0))); // RXMark = 15, TXMark = 16, DMA Size = 16
1360 /* disable clock to CIU */
1361 rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1362 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1363 rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
1365 ret = request_irq(host->irq, rk29_sdmmc_isr, 0, dev_name(&pdev->dev), host);
1367 dev_err(&pdev->dev, "request_irq error\n");
1368 goto err_rk29_dma_free;
1371 /* card insert flags init*/
1372 if (pdata->register_status_notify) {
1373 pdata->register_status_notify(rk29_sdmmc1_status_notify_cb, host);
1378 mmc->ops = &rk29_sdmmc_ops[1];
1380 mmc->ops = &rk29_sdmmc_ops[0];
1383 mmc->pm_flags = MMC_PM_IGNORE_PM_NOTIFY; //ignore pm notify
1385 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510);
1386 mmc->f_max = host->bus_hz;
1387 mmc->ocr_avail = pdata->host_ocr_avail;
1388 mmc->caps = pdata->host_caps;
1389 mmc->max_phys_segs = 64;
1390 mmc->max_hw_segs = 64;
1391 mmc->max_blk_size = 4095;
1392 mmc->max_blk_count = 65535;
1393 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1394 mmc->max_seg_size = mmc->max_req_size;
1396 ret = mmc_add_host(mmc);
1398 dev_err(&pdev->dev, "mmc_add_host error\n");
1402 #if defined (CONFIG_DEBUG_FS)
1403 rk29_sdmmc_init_debugfs(host);
1405 tasklet_init(&host->tasklet, rk29_sdmmc_tasklet_func, (unsigned long)host);
1406 setup_timer(&host->monitor_timer, rk29_sdmmc_monitor_timer,(unsigned long)host);
1408 host->gpio_det = pdata->detect_irq;
1409 if(!host->is_sdio && host->gpio_det != INVALID_GPIO) {
1410 INIT_DELAYED_WORK(&host->work, rk29_sdmmc_detect_change_work);
1411 ret = gpio_request(host->gpio_det, "sd_detect");
1413 dev_err(&pdev->dev, "gpio_request error\n");
1414 goto err_mmc_remove_host;
1416 gpio_direction_input(host->gpio_det);
1417 host->gpio_irq = gpio_to_irq(host->gpio_det);
1419 ret = request_irq(host->gpio_irq,
1420 rk29_sdmmc_detect_change_isr,
1421 rk29_sdmmc_get_cd(host->mmc)?IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING,
1425 dev_err(&pdev->dev, "gpio request_irq error\n");
1428 host->enable_sd_warkup = pdata->enable_sd_wakeup;
1429 if(host->enable_sd_warkup)
1430 enable_irq_wake(host->gpio_irq);
1432 platform_set_drvdata(pdev, host);
1433 rk29_sdmmc_write(host->regs, SDMMC_CTYPE, 0);
1434 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1435 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS);
1436 rk29_sdmmc_write(host->regs, SDMMC_CTRL,SDMMC_CTRL_INT_ENABLE);
1437 rk29_sdmmc_write(host->regs, SDMMC_CLKENA,1);
1438 #ifdef CONFIG_HAS_EARLYSUSPEND
1439 host->early_suspend.suspend = rk29_sdmmc_early_suspend;
1440 host->early_suspend.resume = rk29_sdmmc_early_resume;
1441 host->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1;
1442 register_early_suspend(&host->early_suspend);
1444 dev_info(host->dev, "RK29 SDMMC controller at irq %d\n", host->irq);
1446 free_irq(host->gpio_irq, host);
1448 gpio_free(host->gpio_det);
1449 err_mmc_remove_host:
1450 mmc_remove_host(host->mmc);
1452 free_irq(host->irq, host);
1454 rk29_dma_free(host->dma_info.chn, &host->dma_info.client);
1456 iounmap(host->regs);
1458 mmc_free_host(host->mmc);
1467 static int __exit rk29_sdmmc_remove(struct platform_device *pdev)
1469 struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1471 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1472 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1475 free_irq(host->gpio_irq, host);
1476 gpio_free(host->gpio_det);
1477 mmc_remove_host(host->mmc);
1478 free_irq(host->irq, host);
1479 rk29_dma_free(host->dma_info.chn, &host->dma_info.client);
1481 /* disable clock to CIU */
1482 rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1483 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1485 iounmap(host->regs);
1486 mmc_free_host(host->mmc);
1489 static int rk29_sdmmc_suspend(struct platform_device *pdev, pm_message_t state)
1493 struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1495 dev_info(host->dev, "Enter rk29_sdmmc_suspend\n");
1496 if(host->mmc && !host->is_sdio && host->gpio_det != INVALID_GPIO){
1497 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35))
1498 ret = mmc_suspend_host(host->mmc);
1500 ret = mmc_suspend_host(host->mmc,state);
1502 if(!host->enable_sd_warkup)
1503 free_irq(host->gpio_irq, host);
1505 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
1506 clk_disable(host->clk);
1511 static int rk29_sdmmc_resume(struct platform_device *pdev)
1515 struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1517 dev_info(host->dev, "Exit rk29_sdmmc_suspend\n");
1518 clk_enable(host->clk);
1519 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 1);
1520 if(host->mmc && !host->is_sdio && host->gpio_det != INVALID_GPIO){
1521 if(!host->enable_sd_warkup){
1522 ret = request_irq(host->gpio_irq,
1523 rk29_sdmmc_detect_change_isr,
1524 rk29_sdmmc_get_cd(host->mmc)?IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING,
1528 dev_err(host->dev, "gpio request_irq error\n");
1531 ret = mmc_resume_host(host->mmc);
1532 mmc_detect_change(host->mmc, 0);
1537 static struct platform_driver rk29_sdmmc_driver = {
1538 .suspend = rk29_sdmmc_suspend,
1539 .resume = rk29_sdmmc_resume,
1540 .remove = __exit_p(rk29_sdmmc_remove),
1542 .name = "rk29_sdmmc",
1546 static int __init rk29_sdmmc_init(void)
1548 return platform_driver_probe(&rk29_sdmmc_driver, rk29_sdmmc_probe);
1551 static void __exit rk29_sdmmc_exit(void)
1553 platform_driver_unregister(&rk29_sdmmc_driver);
1556 module_init(rk29_sdmmc_init);
1557 module_exit(rk29_sdmmc_exit);
1559 MODULE_DESCRIPTION("Rk29 Multimedia Card Interface driver");
1560 MODULE_AUTHOR("Rockchips");
1561 MODULE_LICENSE("GPL v2");