1 /* drivers/mmc/host/rk29_sdmmc.c
3 * Copyright (C) 2010 ROCKCHIP, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 * mount -t debugfs debugfs /data/debugfs;cat /data/debugfs/mmc0/status
14 * echo 't' >/proc/sysrq-trigger
15 * echo 19 >/sys/module/wakelock/parameters/debug_mask
18 #include <linux/blkdev.h>
19 #include <linux/clk.h>
20 #include <linux/debugfs.h>
21 #include <linux/device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/err.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/ioport.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
29 #include <linux/scatterlist.h>
30 #include <linux/seq_file.h>
31 #include <linux/stat.h>
32 #include <linux/delay.h>
33 #include <linux/irq.h>
34 #include <linux/mmc/host.h>
35 #include <linux/mmc/mmc.h>
36 #include <linux/mmc/card.h>
38 #include <mach/board.h>
39 #include <mach/rk29_iomap.h>
40 #include <mach/gpio.h>
41 #include <mach/iomux.h>
44 #include <mach/rk29-dma-pl330.h>
45 #include <asm/scatterlist.h>
47 #include "rk2818-sdmmc.h"
49 #define RK29_SDMMC_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | SDMMC_INT_HTO | SDMMC_INT_SBE | SDMMC_INT_EBE | SDMMC_INT_FRUN)
50 #define RK29_SDMMC_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | SDMMC_INT_RE | SDMMC_INT_HLE)
51 #define RK29_SDMMC_ERROR_FLAGS (RK29_SDMMC_DATA_ERROR_FLAGS | RK29_SDMMC_CMD_ERROR_FLAGS | SDMMC_INT_HLE)
53 #define RK29_SDMMC_TMO_COUNT 5000
56 EVENT_CMD_COMPLETE = 0,
63 MRQ_REQUEST_START = 0,
66 MRQ_INT_DATE_DONE, //3
72 MRQ_CMD_START_TMO, //9
73 MRQ_CMD_START_DONE, //10
74 MRQ_STOP_START_TMO, //11
75 MRQ_STOP_START_DONE, //12
76 MRQ_CLK_START_TMO, //13
77 MRQ_CLK_START_DONE, //14
78 MRQ_RESET_CTRL_ERR, //15
79 MRQ_RESET_CTRL_DONE, //16
83 MRQ_REQUEST_DONE, //20
85 enum rk29_sdmmc_state {
93 #define rk29_sdmmc_test_and_clear_pending(host, event) \
94 test_and_clear_bit(event, &host->pending_events)
95 #define rk29_sdmmc_set_completed(host, event) \
96 set_bit(event, &host->completed_events)
97 #define rk29_sdmmc_set_pending(host, event) \
98 set_bit(event, &host->pending_events)
99 #define rk29_sdmmc_set_mrq_status(host, status) \
100 set_bit(status, &host->mrq_status)
101 #define rk29_sdmmc_test_mrq_status(host, status) \
102 test_bit(status, &host->mrq_status)
104 struct rk29_sdmmc_dma_info {
107 struct rk29_dma_client client;
109 static struct rk29_sdmmc_dma_info dma_infos[] = {
113 .name = "rk29-dma-sdmmc0",
119 .name = "rk29-dma-sdio1",
123 static int rk29_sdmmc_is_sdio(struct rk29_sdmmc_platform_data *pdata)
125 if(strncmp(pdata->dma_name, "sdio", strlen("sdio")) == 0)
140 int enable_sd_warkup;
143 unsigned int ios_clock;
146 unsigned int stop_cmdr;
147 unsigned int cmd_intsts;
148 unsigned int data_intsts;
149 unsigned long pending_events;
150 unsigned long completed_events;
151 unsigned long mrq_status;
152 unsigned long old_mrq_status;
159 struct mmc_host *mmc;
160 struct work_struct work;
161 struct rk29_sdmmc_dma_info dma_info;
162 struct tasklet_struct tasklet;
163 struct mmc_request *mrq;
164 struct mmc_command *cmd;
166 struct timer_list monitor_timer;
168 enum rk29_sdmmc_state state;
171 int (*get_wifi_cd)(struct device *);
174 static void rk29_sdmmc_write(unsigned char __iomem *regbase, unsigned int regOff,unsigned int val)
176 __raw_writel(val,regbase + regOff);
179 static unsigned int rk29_sdmmc_read(unsigned char __iomem *regbase, unsigned int regOff)
181 return __raw_readl(regbase + regOff);
185 #if defined (CONFIG_DEBUG_FS)
187 * The debugfs stuff below is mostly optimized away when
188 * CONFIG_DEBUG_FS is not set.
190 static int rk29_sdmmc_req_show(struct seq_file *s, void *v)
192 struct rk29_sdmmc *host = s->private;
193 struct mmc_request *mrq;
194 struct mmc_command *cmd;
195 struct mmc_command *stop;
196 struct mmc_data *data;
198 /* Make sure we get a consistent snapshot */
199 spin_lock(&host->lock);
209 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
210 cmd->opcode, cmd->arg, cmd->flags,
211 cmd->resp[0], cmd->resp[1], cmd->resp[2],
212 cmd->resp[2], cmd->error);
214 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
215 data->bytes_xfered, data->blocks,
216 data->blksz, data->flags, data->error);
219 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
220 stop->opcode, stop->arg, stop->flags,
221 stop->resp[0], stop->resp[1], stop->resp[2],
222 stop->resp[2], stop->error);
225 spin_unlock(&host->lock);
230 static int rk29_sdmmc_regs_show(struct seq_file *s, void *v)
232 struct rk29_sdmmc *host = s->private;
234 seq_printf(s, "SDMMC_CTRL: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTRL));
235 seq_printf(s, "SDMMC_PWREN: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_PWREN));
236 seq_printf(s, "SDMMC_CLKDIV: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKDIV));
237 seq_printf(s, "SDMMC_CLKSRC: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKSRC));
238 seq_printf(s, "SDMMC_CLKENA: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKENA));
239 seq_printf(s, "SDMMC_TMOUT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TMOUT));
240 seq_printf(s, "SDMMC_CTYPE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTYPE));
241 seq_printf(s, "SDMMC_BLKSIZ: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BLKSIZ));
242 seq_printf(s, "SDMMC_BYTCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BYTCNT));
243 seq_printf(s, "SDMMC_INTMASK:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_INTMASK));
244 seq_printf(s, "SDMMC_CMDARG: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMDARG));
245 seq_printf(s, "SDMMC_CMD: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMD));
246 seq_printf(s, "SDMMC_RESP0: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP0));
247 seq_printf(s, "SDMMC_RESP1: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP1));
248 seq_printf(s, "SDMMC_RESP2: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP2));
249 seq_printf(s, "SDMMC_RESP3: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP3));
250 seq_printf(s, "SDMMC_MINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_MINTSTS));
251 seq_printf(s, "SDMMC_RINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RINTSTS));
252 seq_printf(s, "SDMMC_STATUS: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_STATUS));
253 seq_printf(s, "SDMMC_FIFOTH: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_FIFOTH));
254 seq_printf(s, "SDMMC_CDETECT:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CDETECT));
255 seq_printf(s, "SDMMC_WRTPRT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_WRTPRT));
256 seq_printf(s, "SDMMC_TCBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TCBCNT));
257 seq_printf(s, "SDMMC_TBBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TBBCNT));
258 seq_printf(s, "SDMMC_DEBNCE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_DEBNCE));
263 static int rk29_sdmmc_status_show(struct seq_file *s, void *v)
265 struct rk29_sdmmc *host = s->private;
267 seq_printf(s, "state: \t\t0x%08x\n", host->state);
268 seq_printf(s, "pending_events: \t0x%08lx\n", host->pending_events);
269 seq_printf(s, "completed_events: \t0x%08lx\n", host->completed_events);
270 seq_printf(s, "mrq_status: \t\t0x%08lx\n", host->mrq_status);
271 seq_printf(s, "old_mrq_status: \t0x%08lx\n", host->old_mrq_status);
277 static int rk29_sdmmc_req_open(struct inode *inode, struct file *file)
279 return single_open(file, rk29_sdmmc_req_show, inode->i_private);
282 static const struct file_operations rk29_sdmmc_req_fops = {
283 .owner = THIS_MODULE,
284 .open = rk29_sdmmc_req_open,
287 .release = single_release,
290 static int rk29_sdmmc_regs_open(struct inode *inode, struct file *file)
292 return single_open(file, rk29_sdmmc_regs_show, inode->i_private);
295 static const struct file_operations rk29_sdmmc_regs_fops = {
296 .owner = THIS_MODULE,
297 .open = rk29_sdmmc_regs_open,
300 .release = single_release,
302 static int rk29_sdmmc_status_open(struct inode *inode, struct file *file)
304 return single_open(file, rk29_sdmmc_status_show, inode->i_private);
307 static const struct file_operations rk29_sdmmc_status_fops = {
308 .owner = THIS_MODULE,
309 .open = rk29_sdmmc_status_open,
312 .release = single_release,
315 static void rk29_sdmmc_init_debugfs(struct rk29_sdmmc *host)
317 struct mmc_host *mmc = host->mmc;
321 root = mmc->debugfs_root;
325 node = debugfs_create_file("regs", S_IRUSR, root, host,&rk29_sdmmc_regs_fops);
329 node = debugfs_create_file("req", S_IRUSR, root, host, &rk29_sdmmc_req_fops);
333 node = debugfs_create_file("status", S_IRUSR, root, host, &rk29_sdmmc_status_fops);
340 dev_err(&mmc->class_dev, "failed to initialize debugfs for host\n");
343 static void rk29_sdmmc_show_info(struct rk29_sdmmc *host)
345 dev_info(host->dev, "state: \t\t0x%08x\n", host->state);
346 dev_info(host->dev, "pending_events: \t0x%08lx\n", host->pending_events);
347 dev_info(host->dev, "completed_events: \t0x%08lx\n", host->completed_events);
348 dev_info(host->dev, "mrq_status: \t\t0x%08lx\n\n", host->mrq_status);
349 dev_info(host->dev, "old_mrq_status: \t0x%08lx\n\n", host->old_mrq_status);
350 dev_info(host->dev, "SDMMC_CTRL: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTRL));
351 dev_info(host->dev, "SDMMC_PWREN: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_PWREN));
352 dev_info(host->dev, "SDMMC_CLKDIV: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKDIV));
353 dev_info(host->dev, "SDMMC_CLKSRC: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKSRC));
354 dev_info(host->dev, "SDMMC_CLKENA: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKENA));
355 dev_info(host->dev, "SDMMC_TMOUT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TMOUT));
356 dev_info(host->dev, "SDMMC_CTYPE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTYPE));
357 dev_info(host->dev, "SDMMC_BLKSIZ: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BLKSIZ));
358 dev_info(host->dev, "SDMMC_BYTCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BYTCNT));
359 dev_info(host->dev, "SDMMC_INTMASK:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_INTMASK));
360 dev_info(host->dev, "SDMMC_CMDARG: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMDARG));
361 dev_info(host->dev, "SDMMC_CMD: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMD));
362 dev_info(host->dev, "SDMMC_RESP0: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP0));
363 dev_info(host->dev, "SDMMC_RESP1: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP1));
364 dev_info(host->dev, "SDMMC_RESP2: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP2));
365 dev_info(host->dev, "SDMMC_RESP3: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP3));
366 dev_info(host->dev, "SDMMC_MINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_MINTSTS));
367 dev_info(host->dev, "SDMMC_RINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RINTSTS));
368 dev_info(host->dev, "SDMMC_STATUS: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_STATUS));
369 dev_info(host->dev, "SDMMC_FIFOTH: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_FIFOTH));
370 dev_info(host->dev, "SDMMC_CDETECT:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CDETECT));
371 dev_info(host->dev, "SDMMC_WRTPRT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_WRTPRT));
372 dev_info(host->dev, "SDMMC_TCBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TCBCNT));
373 dev_info(host->dev, "SDMMC_TBBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TBBCNT));
374 dev_info(host->dev, "SDMMC_DEBNCE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_DEBNCE));
376 static int rk29_sdmmc_reset_fifo(struct rk29_sdmmc *host)
378 int tmo = RK29_SDMMC_TMO_COUNT;
379 if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_MC_BUSY|SDMMC_STAUTS_DATA_BUSY)))
382 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_FIFO_RESET);
383 while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CTRL) & SDMMC_CTRL_FIFO_RESET);
385 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_DONE);
389 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_ERR);
390 dev_err(host->dev, "%s error\n", __func__);
394 static int rk29_sdmmc_reset_ctrl(struct rk29_sdmmc *host)
396 int tmo = RK29_SDMMC_TMO_COUNT;
397 if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_MC_BUSY|SDMMC_STAUTS_DATA_BUSY)))
400 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
401 while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
402 rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_INT_ENABLE);
405 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_DONE);
409 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_ERR);
410 dev_err(host->dev, "%s error\n", __func__);
415 static int rk29_sdmmc_start_command(struct rk29_sdmmc *host,
416 struct mmc_command *cmd, u32 cmd_flags)
418 int tmo = RK29_SDMMC_TMO_COUNT;
421 local_irq_save(flags);
423 rk29_sdmmc_write(host->regs, SDMMC_CMDARG, cmd->arg);
424 rk29_sdmmc_write(host->regs, SDMMC_CMD, cmd_flags | SDMMC_CMD_START);
425 local_irq_restore(flags);
427 while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START)
435 static int send_stop_cmd(struct rk29_sdmmc *host)
437 dev_dbg(host->dev,"start cmd:%d ARGR=0x%08x CMDR=0x%08x\n",
438 host->mrq->data->stop->opcode, host->mrq->data->stop->arg, host->stop_cmdr);
439 if(rk29_sdmmc_start_command(host, host->mrq->data->stop, host->stop_cmdr)) {
440 rk29_sdmmc_set_mrq_status(host, MRQ_STOP_START_TMO);
444 rk29_sdmmc_set_mrq_status(host, MRQ_STOP_START_DONE);
449 static void rk29_sdmmc_request_done(struct rk29_sdmmc *host,struct mmc_request *mrq)
451 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, ~SDMMC_INT_SDIO);
452 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,
453 rk29_sdmmc_read(host->regs, SDMMC_INTMASK) &
454 ~(SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS));
457 //clk_disable(host->clk);
458 if(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_FULL ){
459 rk29_sdmmc_read(host->regs, SDMMC_DATA);
460 rk29_sdmmc_read(host->regs, SDMMC_DATA);
462 if(mrq->data && mrq->data->error)
463 rk29_sdmmc_reset_fifo(host);
465 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
468 host->state = STATE_IDLE;
469 rk29_sdmmc_set_mrq_status(host, MRQ_REQUEST_DONE);
470 mmc_request_done(host->mmc, mrq);
473 static int sdmmc_send_cmd(struct rk29_sdmmc *host, unsigned int cmd, int arg)
475 int tmo = RK29_SDMMC_TMO_COUNT;
476 rk29_sdmmc_write(host->regs, SDMMC_CMDARG, arg);
477 rk29_sdmmc_write(host->regs, SDMMC_CMD, SDMMC_CMD_START | cmd);
478 while (--tmo && readl(host->regs + SDMMC_CMD) & SDMMC_CMD_START);
485 int rk29_sdmmc_set_clock(struct rk29_sdmmc *host)
490 div = (((host->bus_hz + (host->bus_hz / 5)) / host->ios_clock)) >> 1;
494 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
495 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
496 if(sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0))
498 rk29_sdmmc_write(host->regs, SDMMC_CLKDIV, div);
500 host->clock = (host->bus_hz / div) >> 1;
501 if(sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0))
503 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, SDMMC_CLKEN_ENABLE);
504 if(sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0))
507 rk29_sdmmc_set_mrq_status(host, MRQ_CLK_START_DONE);
510 rk29_sdmmc_set_mrq_status(host, MRQ_CLK_START_TMO);
514 static void rk29_sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
516 struct rk29_sdmmc *host = mmc_priv(mmc);;
519 switch (ios->bus_width) {
520 case MMC_BUS_WIDTH_1:
521 rk29_sdmmc_write(host->regs, SDMMC_CTYPE, 0);
523 case MMC_BUS_WIDTH_4:
524 rk29_sdmmc_write(host->regs, SDMMC_CTYPE, SDMMC_CTYPE_4BIT);
527 host->ios_clock = ios->clock;
529 switch (ios->power_mode) {
532 rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
539 static int rk29_sdmmc_get_ro(struct mmc_host *mmc)
541 struct rk29_sdmmc *host = mmc_priv(mmc);
542 u32 wrtprt = rk29_sdmmc_read(host->regs, SDMMC_WRTPRT);
544 return (wrtprt & SDMMC_WRITE_PROTECT)?1:0;
548 static int rk29_sdmmc_get_cd(struct mmc_host *mmc)
550 struct rk29_sdmmc *host = mmc_priv(mmc);
553 return host->get_wifi_cd(mmc_dev(host->mmc));
554 else if(host->gpio_det == INVALID_GPIO)
557 return gpio_get_value(host->gpio_det)?0:1;
560 static inline unsigned ns_to_clocks(unsigned clkrate, unsigned ns)
563 if (clkrate > 1000000)
564 clks = (ns * (clkrate / 1000000) + 999) / 1000;
566 clks = ((ns/1000) * (clkrate / 1000) + 999) / 1000;
571 static void rk29_sdmmc_set_timeout(struct rk29_sdmmc *host,struct mmc_data *data)
578 else if(host->div == 0)
579 clock = host->bus_hz;
581 clock = (host->bus_hz / host->div) >> 1;
582 timeout = ns_to_clocks(clock, data->timeout_ns) + data->timeout_clks;
583 rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xffffffff);
584 //rk29_sdmmc_write(host->regs, SDMMC_TMOUT, (timeout << 8) | (70));
586 static u32 rk29_sdmmc_prepare_command(struct mmc_host *mmc,
587 struct mmc_command *cmd)
589 struct mmc_data *data;
592 cmd->error = -EINPROGRESS;
596 cmdr |= SDMMC_CMD_STOP;
598 cmdr &= ~SDMMC_CMD_PRV_DAT_WAIT;
600 cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
602 if (cmd->flags & MMC_RSP_PRESENT) {
603 cmdr |= SDMMC_CMD_RESP_EXP; // expect the respond, need to set this bit
604 if (cmd->flags & MMC_RSP_136)
605 cmdr |= SDMMC_CMD_RESP_LONG; // expect long respond
607 if(cmd->flags & MMC_RSP_CRC)
608 cmdr |= SDMMC_CMD_RESP_CRC;
613 cmdr |= SDMMC_CMD_DAT_EXP;
614 if (data->flags & MMC_DATA_STREAM)
615 cmdr |= SDMMC_CMD_STRM_MODE; // set stream mode
616 if (data->flags & MMC_DATA_WRITE)
617 cmdr |= SDMMC_CMD_DAT_WR;
621 static int rk29_sdmmc_submit_data(struct rk29_sdmmc *host, struct mmc_data *data)
623 struct scatterlist *sg;
624 unsigned int i,direction;
629 for_each_sg(data->sg, sg, data->sg_len, i) {
630 if (sg->offset & 3 || sg->length & 3)
633 if (data->flags & MMC_DATA_READ)
634 direction = RK29_DMASRC_HW;
636 direction = RK29_DMASRC_MEM;
638 rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_STOP);
639 rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_FLUSH);
640 rk29_dma_devconfig(host->dma_info.chn, direction, (unsigned long )(host->dma_addr));
641 dma_len = dma_map_sg(host->dev, data->sg, data->sg_len,
642 (data->flags & MMC_DATA_READ)? DMA_FROM_DEVICE : DMA_TO_DEVICE);
643 for (i = 0; i < dma_len; i++)
644 rk29_dma_enqueue(host->dma_info.chn, host, sg_dma_address(&data->sg[i]),sg_dma_len(&data->sg[i])); // data->sg->dma_address, data->sg->length);
645 rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))|SDMMC_CTRL_DMA_ENABLE);// enable dma
646 rk29_dma_ctrl(host->dma_info.chn, RK29_DMAOP_START);
649 static int rk29_sdmmc_test_cmd_start(struct rk29_sdmmc *host)
651 return rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START;
653 static int rk29_sdmmc_start_request(struct rk29_sdmmc *host,struct mmc_request *mrq)
656 struct mmc_command *cmd;
659 BUG_ON(host->state != STATE_IDLE);
661 spin_lock(&host->lock);
663 if(rk29_sdmmc_test_cmd_start(host)){
664 dev_info(host->dev, "cmd_start bit is set ,reset ctroller\n");
665 ret = rk29_sdmmc_reset_ctrl(host);
670 host->state = STATE_SENDING_CMD;
673 rk29_sdmmc_set_timeout(host,mrq->data);
674 rk29_sdmmc_write(host->regs, SDMMC_BYTCNT,mrq->data->blksz*mrq->data->blocks);
675 rk29_sdmmc_write(host->regs, SDMMC_BLKSIZ,mrq->data->blksz);
678 cmdflags = rk29_sdmmc_prepare_command(host->mmc, cmd);
681 cmdflags |= SDMMC_CMD_INIT;
683 if(cmd->opcode == 0 &&
684 ((rk29_sdmmc_read(host, SDMMC_STATUS) & SDMMC_STAUTS_MC_BUSY)||
685 (rk29_sdmmc_read(host, SDMMC_STATUS) & SDMMC_STAUTS_DATA_BUSY)))
686 cmdflags |= SDMMC_CMD_STOP;
688 rk29_sdmmc_set_mrq_status(host, MRQ_HAS_DATA);
689 ret = rk29_sdmmc_submit_data(host, mrq->data);
692 rk29_sdmmc_set_mrq_status(host, MRQ_DMA_SET_ERR);
695 dev_dbg(host->dev,"start cmd:%d ARGR=0x%08x CMDR=0x%08x\n",
696 cmd->opcode, cmd->arg, cmdflags);
697 ret = rk29_sdmmc_start_command(host, cmd, cmdflags);
699 rk29_sdmmc_set_mrq_status(host, MRQ_CMD_START_TMO);
702 rk29_sdmmc_set_mrq_status(host, MRQ_CMD_START_DONE);
704 rk29_sdmmc_set_mrq_status(host, MRQ_HAS_STOP);
705 host->stop_cmdr = rk29_sdmmc_prepare_command(host->mmc, mrq->stop);
707 spin_unlock(&host->lock);
710 spin_unlock(&host->lock);
714 static void rk29_sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
716 struct rk29_sdmmc *host = mmc_priv(mmc);
719 rk29_sdmmc_show_info(host);
721 host->old_mrq_status = host->mrq_status;
722 host->mrq_status = 0;
723 host->pending_events = 0;
724 host->completed_events= 0;
725 host->cmd_intsts = 0;
726 host->data_intsts = 0;
728 mod_timer(&host->monitor_timer, jiffies + msecs_to_jiffies(5000));
730 //clk_enable(host->clk);
731 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 1);
733 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, ~SDMMC_INT_SDIO);
734 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,
735 rk29_sdmmc_read(host->regs, SDMMC_INTMASK) |
736 (SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS));
738 if (!rk29_sdmmc_get_cd(mmc)) {
739 mrq->cmd->error = -ENOMEDIUM;
740 rk29_sdmmc_request_done(host, mrq);
741 dev_dbg(host->dev, "mrq_status = 0x%08lx\n", host->mrq_status);
745 if(rk29_sdmmc_set_clock(host)) {
746 mrq->cmd->error = -EINPROGRESS;
747 dev_info(host->dev, "rk29_sdmmc_set_clock timeout\n");
748 rk29_sdmmc_request_done(host, mrq);
752 if(rk29_sdmmc_start_request(host,mrq)) {
753 dev_info(host->dev, "rk29_sdmmc_start_request timeout\n");
754 mrq->cmd->error = -EINPROGRESS;
755 rk29_sdmmc_request_done(host, mrq);
760 static void rk29_sdmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
764 struct rk29_sdmmc *host = mmc_priv(mmc);
766 spin_lock_irqsave(&host->lock, flags);
767 intmask = rk29_sdmmc_read(host->regs, SDMMC_INTMASK);
769 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask | SDMMC_INT_SDIO);
771 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask & ~SDMMC_INT_SDIO);
772 spin_unlock_irqrestore(&host->lock, flags);
775 static void rk29_sdmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
777 card->quirks = MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
780 static const struct mmc_host_ops rk29_sdmmc_ops[] = {
782 .request = rk29_sdmmc_request,
783 .set_ios = rk29_sdmmc_set_ios,
784 .get_ro = rk29_sdmmc_get_ro,
785 .get_cd = rk29_sdmmc_get_cd,
788 .request = rk29_sdmmc_request,
789 .set_ios = rk29_sdmmc_set_ios,
790 .enable_sdio_irq = rk29_sdmmc_enable_sdio_irq,
791 .init_card = rk29_sdmmc_init_card,
795 static void rk29_sdmmc_request_end(struct rk29_sdmmc *host)
796 __releases(&host->lock)
797 __acquires(&host->lock)
799 spin_unlock(&host->lock);
801 rk29_sdmmc_request_done(host, host->mrq);
803 spin_lock(&host->lock);
805 static void rk29_sdmmc_dma_cleanup(struct rk29_sdmmc *host)
807 struct mmc_data *data = host->mrq->data;
809 dma_unmap_sg(host->dev, data->sg, data->sg_len,
810 ((data->flags & MMC_DATA_WRITE)
811 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
814 static void rk29_sdmmc_stop_dma(struct rk29_sdmmc *host)
816 rk29_sdmmc_set_mrq_status(host, MRQ_STOP_DMA);
817 rk29_sdmmc_dma_cleanup(host);
818 rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_STOP);
819 rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_FLUSH);
820 //rk29_sdmmc_write(host->regs, SDMMC_CTRL,
821 //(rk29_sdmmc_read(host->regs, SDMMC_CTRL))&(~SDMMC_CTRL_DMA_ENABLE));
824 static void rk29_sdmmc_command_complete(struct rk29_sdmmc *host,
825 struct mmc_command *cmd)
827 unsigned int intsts = host->cmd_intsts;
829 host->cmd_intsts = 0;
830 if(cmd->flags & MMC_RSP_PRESENT) {
832 if(cmd->flags & MMC_RSP_136) {
833 cmd->resp[3] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
834 cmd->resp[2] = rk29_sdmmc_read(host->regs, SDMMC_RESP1);
835 cmd->resp[1] = rk29_sdmmc_read(host->regs, SDMMC_RESP2);
836 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP3);
838 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
845 if (intsts & SDMMC_INT_RTO)
846 cmd->error = -ETIMEDOUT;
847 else if ((cmd->flags & MMC_RSP_CRC) && (intsts & SDMMC_INT_RCRC))
848 cmd->error = -EILSEQ;
849 else if (intsts & SDMMC_INT_RE)
851 else if(intsts & SDMMC_INT_HLE)
858 "command error: status=0x%08x resp=0x%08x\n"
859 "cmd=0x%08x arg=0x%08x flg=0x%08x err=%d\n",
860 intsts, cmd->resp[0],
861 cmd->opcode, cmd->arg, cmd->flags, cmd->error);
864 rk29_sdmmc_stop_dma(host);
869 static void rk29_sdmmc_tasklet_func(unsigned long priv)
871 struct rk29_sdmmc *host = (struct rk29_sdmmc *)priv;
872 enum rk29_sdmmc_state state;
873 enum rk29_sdmmc_state prev_state;
876 spin_lock(&host->lock);
885 case STATE_SENDING_CMD:
886 if (!rk29_sdmmc_test_and_clear_pending(host,
889 rk29_sdmmc_set_completed(host, EVENT_CMD_COMPLETE);
891 rk29_sdmmc_command_complete(host, host->mrq->cmd);
893 rk29_sdmmc_show_info(host);
894 if (!host->mrq->data || (host->mrq->cmd->error)) {
895 rk29_sdmmc_request_end(host);
898 prev_state = state = STATE_SENDING_DATA;
900 case STATE_SENDING_DATA:
901 if (rk29_sdmmc_test_and_clear_pending(host,
904 rk29_sdmmc_show_info(host);
905 rk29_sdmmc_stop_dma(host);
906 if (host->mrq->data->stop)
908 state = STATE_DATA_ERROR;
911 prev_state = state = STATE_DATA_BUSY;
913 case STATE_DATA_BUSY:
914 if (!rk29_sdmmc_test_and_clear_pending(host,
915 EVENT_DATA_COMPLETE))
918 rk29_sdmmc_set_completed(host, EVENT_DATA_COMPLETE);
919 intsts = host->data_intsts;
921 rk29_sdmmc_show_info(host);
922 if(host->mrq->data) {
923 if (unlikely(intsts & RK29_SDMMC_DATA_ERROR_FLAGS)) {
924 if (intsts & SDMMC_INT_DRTO) {
925 dev_err(host->dev,"data timeout error\n");
926 host->mrq->data->error = -ETIMEDOUT;
927 } else if (intsts & SDMMC_INT_DCRC) {
928 dev_err(host->dev,"data CRC error\n");
929 host->mrq->data->error = -EILSEQ;
931 dev_err(host->dev,"data FIFO error (status=%08x)\n",intsts);
932 host->mrq->data->error = -EIO;
934 rk29_sdmmc_show_info(host);
936 host->mrq->data->bytes_xfered = host->mrq->data->blocks * host->mrq->data->blksz;
937 host->mrq->data->error = 0;
940 if (!host->mrq->data->stop) {
941 rk29_sdmmc_request_end(host);
945 prev_state = state = STATE_SENDING_STOP;
946 if (host->mrq->data && !host->mrq->data->error)
950 case STATE_SENDING_STOP:
951 if (!rk29_sdmmc_test_and_clear_pending(host,
955 rk29_sdmmc_show_info(host);
957 rk29_sdmmc_command_complete(host, host->mrq->stop);
958 rk29_sdmmc_request_end(host);
960 case STATE_DATA_ERROR:
961 state = STATE_DATA_BUSY;
964 } while (state != prev_state);
969 spin_unlock(&host->lock);
975 static irqreturn_t rk29_sdmmc_isr(int irq, void *dev_id)
977 struct rk29_sdmmc *host = dev_id;
980 intsts = rk29_sdmmc_read(host->regs, SDMMC_MINTSTS);
982 spin_lock(&host->lock);
983 if(intsts & RK29_SDMMC_CMD_ERROR_FLAGS) {
984 rk29_sdmmc_set_mrq_status(host, MRQ_INT_CMD_ERR);
985 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_CMD_ERROR_FLAGS);
986 host->cmd_intsts = intsts;
988 rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
990 rk29_sdmmc_show_info(host);
992 dev_info(host->dev, "[cmd%d] cmd error(intsts 0x%x, host->state %d, pending_events %ld)\n",
993 host->mrq->cmd->opcode,intsts,host->state,host->pending_events);
994 tasklet_schedule(&host->tasklet);
997 if (intsts & RK29_SDMMC_DATA_ERROR_FLAGS) {
998 rk29_sdmmc_set_mrq_status(host, MRQ_INT_DATA_ERR);
999 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_DATA_ERROR_FLAGS);
1000 host->data_intsts = intsts;
1002 rk29_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1003 tasklet_schedule(&host->tasklet);
1005 rk29_sdmmc_show_info(host);
1007 dev_info(host->dev, "[cmd%d] data error(intsts 0x%x, host->state %d, pending_events %ld)\n",
1008 host->mrq->cmd->opcode, intsts,host->state,host->pending_events);
1011 if(intsts & SDMMC_INT_DTO) {
1012 rk29_sdmmc_set_mrq_status(host, MRQ_INT_DATE_DONE);
1013 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_DTO);
1014 if (!host->data_intsts)
1015 host->data_intsts = intsts;
1017 rk29_sdmmc_set_pending(host, EVENT_DATA_COMPLETE);
1018 tasklet_schedule(&host->tasklet);
1020 if (intsts & SDMMC_INT_CMD_DONE) {
1021 rk29_sdmmc_set_mrq_status(host, MRQ_INT_CMD_DONE);
1022 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_CMD_DONE);
1023 if(!host->cmd_intsts)
1024 host->cmd_intsts = intsts;
1027 rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1028 tasklet_schedule(&host->tasklet);
1030 if(host->is_sdio && (intsts & SDMMC_INT_SDIO)) {
1031 rk29_sdmmc_set_mrq_status(host, MRQ_INT_SDIO);
1032 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_SDIO);
1033 mmc_signal_sdio_irq(host->mmc);
1035 spin_unlock(&host->lock);
1039 static void rk29_sdmmc_dma_complete(void *arg, int size, enum rk29_dma_buffresult result)
1041 struct rk29_sdmmc *host = arg;
1043 dev_dbg(host->dev, "DMA complete\n");
1044 rk29_sdmmc_set_mrq_status(host, MRQ_DMA_DONE);
1047 static void rk29_sdmmc_detect_change(struct rk29_sdmmc *host)
1049 spin_lock(&host->lock);
1052 switch (host->state) {
1055 case STATE_SENDING_CMD:
1057 host->mrq->cmd->error = -ENOMEDIUM;
1058 if (!host->mrq->data)
1061 case STATE_SENDING_DATA:
1063 host->mrq->data->error = -ENOMEDIUM;
1064 rk29_sdmmc_stop_dma(host);
1066 case STATE_DATA_BUSY:
1067 case STATE_DATA_ERROR:
1068 if (host->mrq->data && host->mrq->data->error == -EINPROGRESS)
1069 host->mrq->data->error = -ENOMEDIUM;
1070 if (!host->mrq->stop)
1073 case STATE_SENDING_STOP:
1074 if(host->mrq->stop) {
1075 host->mrq->stop->error = -ENOMEDIUM;
1079 rk29_sdmmc_request_end(host);
1081 rk29_sdmmc_reset_fifo(host);
1082 spin_unlock(&host->lock);
1083 mmc_detect_change(host->mmc, 0);
1086 static void rk29_sdmmc1_status_notify_cb(int card_present, void *dev_id)
1088 struct rk29_sdmmc *host = dev_id;
1090 card_present = rk29_sdmmc_get_cd(host->mmc);
1091 dev_info(host->dev, "sdio change detected,status is %d\n",card_present);
1093 rk29_sdmmc_detect_change(host);
1096 static void rk29_sdmmc_get_dma_dma_info(struct rk29_sdmmc *host)
1099 host->dma_info = dma_infos[1];
1101 host->dma_info = dma_infos[0];
1104 static irqreturn_t rk29_sdmmc_detect_change_isr(int irq, void *dev_id);
1105 static void rk29_sdmmc_detect_change_work(struct work_struct *work)
1108 struct rk29_sdmmc *host = container_of(work, struct rk29_sdmmc, work);
1110 if(host->enable_sd_warkup && rk29_sdmmc_get_cd(host->mmc) && !host->mmc->card)
1111 rk28_send_wakeup_key();
1112 rk29_sdmmc_detect_change(host);
1114 free_irq(host->gpio_irq, host);
1115 ret = request_irq(host->gpio_irq,
1116 rk29_sdmmc_detect_change_isr,
1117 rk29_sdmmc_get_cd(host->mmc)?IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING,
1121 dev_err(host->dev, "gpio request_irq error\n");
1123 static irqreturn_t rk29_sdmmc_detect_change_isr(int irq, void *dev_id)
1125 struct rk29_sdmmc *host = dev_id;
1127 disable_irq_nosync(host->gpio_irq);
1128 dev_info(host->dev, "sd detect change, card is %s\n",
1129 rk29_sdmmc_get_cd(host->mmc)?"inserted":"removed");
1130 schedule_work(&host->work);
1134 static void rk29_sdmmc_monitor_timer(unsigned long data)
1136 struct rk29_sdmmc *host = (struct rk29_sdmmc *)data;
1138 if(!rk29_sdmmc_test_mrq_status(host, MRQ_REQUEST_DONE)){
1139 rk29_sdmmc_show_info(host);
1140 host->mrq->cmd->error = -ENOMEDIUM;
1142 host->mrq->data->error = -ENOMEDIUM;
1143 rk29_sdmmc_request_end(host);
1147 static int rk29_sdmmc_probe(struct platform_device *pdev)
1149 struct mmc_host *mmc;
1150 struct rk29_sdmmc *host;
1151 struct resource *regs;
1152 struct rk29_sdmmc_platform_data *pdata;
1155 pdata = pdev->dev.platform_data;
1157 dev_err(&pdev->dev, "Platform data missing\n");
1163 mmc = mmc_alloc_host(sizeof(struct rk29_sdmmc), &pdev->dev);
1167 host = mmc_priv(mmc);
1169 host->dev = &pdev->dev;
1171 host->state = STATE_IDLE;
1174 host->is_sdio = rk29_sdmmc_is_sdio(pdata);
1175 host->get_wifi_cd = pdata->status;
1177 host->irq = platform_get_irq(pdev, 0);
1178 if (host->irq < 0) {
1179 dev_err(&pdev->dev, "platform_get_irq error\n");
1181 goto err_mmc_free_host;
1184 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1186 dev_err(&pdev->dev, "platform_get_resource error\n");
1188 goto err_mmc_free_host;
1191 host->regs = ioremap(regs->start, regs->end - regs->start);
1193 dev_err(&pdev->dev, "ioremap error\n");
1195 goto err_mmc_free_host;
1197 spin_lock_init(&host->lock);
1200 rk29_sdmmc_get_dma_dma_info(host);
1201 ret = rk29_dma_request(host->dma_info.chn, &(host->dma_info.client), NULL);
1203 dev_err(&pdev->dev, "rk29_dma_request error\n");
1206 ret = rk29_dma_config(host->dma_info.chn, 16);
1209 dev_err(&pdev->dev, "rk29_dma_config error\n");
1210 goto err_rk29_dma_free;
1212 ret = rk29_dma_set_buffdone_fn(host->dma_info.chn, rk29_sdmmc_dma_complete);
1214 dev_err(&pdev->dev, "rk29_dma_set_buffdone_fn error\n");
1215 goto err_rk29_dma_free;
1217 host->dma_addr = regs->start + SDMMC_DATA;
1220 host->clk = clk_get(&pdev->dev, "mmc");
1221 clk_set_rate(host->clk,52000000);
1222 clk_enable(host->clk);
1223 clk_enable(clk_get(&pdev->dev, "hclk_mmc"));
1224 host->bus_hz = clk_get_rate(host->clk);
1226 /* reset all blocks */
1227 rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1228 /* wait till resets clear */
1229 while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1230 /* Clear the interrupts for the host controller */
1231 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1232 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1233 /* Put in max timeout */
1234 rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xFFFFFFFF);
1236 /* FIFO threshold settings */
1237 rk29_sdmmc_write(host->regs, SDMMC_FIFOTH, ((0x3 << 28) | (0x0f << 16) | (0x10 << 0))); // RXMark = 15, TXMark = 16, DMA Size = 16
1238 /* disable clock to CIU */
1239 rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1240 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1241 rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
1243 ret = request_irq(host->irq, rk29_sdmmc_isr, 0, dev_name(&pdev->dev), host);
1245 dev_err(&pdev->dev, "request_irq error\n");
1246 goto err_rk29_dma_free;
1249 /* card insert flags init*/
1250 if (pdata->register_status_notify) {
1251 pdata->register_status_notify(rk29_sdmmc1_status_notify_cb, host);
1256 mmc->ops = &rk29_sdmmc_ops[1];
1258 mmc->ops = &rk29_sdmmc_ops[0];
1260 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510);
1261 mmc->f_max = host->bus_hz/2;
1262 mmc->ocr_avail = pdata->host_ocr_avail;
1263 mmc->caps = pdata->host_caps;
1264 mmc->max_phys_segs = 64;
1265 mmc->max_hw_segs = 64;
1266 mmc->max_blk_size = 4095;
1267 mmc->max_blk_count = 65535;
1268 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1269 mmc->max_seg_size = mmc->max_req_size;
1271 ret = mmc_add_host(mmc);
1273 dev_err(&pdev->dev, "mmc_add_host error\n");
1277 #if defined (CONFIG_DEBUG_FS)
1278 rk29_sdmmc_init_debugfs(host);
1280 tasklet_init(&host->tasklet, rk29_sdmmc_tasklet_func, (unsigned long)host);
1281 setup_timer(&host->monitor_timer, rk29_sdmmc_monitor_timer,(unsigned long)host);
1283 host->gpio_det = pdata->detect_irq;
1284 if(!host->is_sdio && host->gpio_det != INVALID_GPIO) {
1285 INIT_WORK(&host->work, rk29_sdmmc_detect_change_work);
1286 ret = gpio_request(host->gpio_det, "sd_detect");
1288 dev_err(&pdev->dev, "gpio_request error\n");
1289 goto err_mmc_remove_host;
1291 gpio_direction_input(host->gpio_det);
1292 host->gpio_irq = gpio_to_irq(host->gpio_det);
1294 ret = request_irq(host->gpio_irq,
1295 rk29_sdmmc_detect_change_isr,
1296 rk29_sdmmc_get_cd(host->mmc)?IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING,
1300 dev_err(&pdev->dev, "gpio request_irq error\n");
1303 host->enable_sd_warkup = pdata->enable_sd_wakeup;
1304 if(host->enable_sd_warkup)
1305 enable_irq_wake(host->gpio_irq);
1307 platform_set_drvdata(pdev, host);
1308 rk29_sdmmc_write(host->regs, SDMMC_CTYPE, 0);
1309 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1310 rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS);
1311 rk29_sdmmc_write(host->regs, SDMMC_CTRL,SDMMC_CTRL_INT_ENABLE);
1312 rk29_sdmmc_write(host->regs, SDMMC_CLKENA,1);
1314 dev_info(host->dev, "RK29 SDMMC controller at irq %d\n", host->irq);
1316 free_irq(host->gpio_irq, host);
1318 gpio_free(host->gpio_det);
1319 err_mmc_remove_host:
1320 mmc_remove_host(host->mmc);
1322 free_irq(host->irq, host);
1324 rk29_dma_free(host->dma_info.chn, &host->dma_info.client);
1326 iounmap(host->regs);
1328 mmc_free_host(host->mmc);
1337 static int __exit rk29_sdmmc_remove(struct platform_device *pdev)
1339 struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1341 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1342 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1345 free_irq(host->gpio_irq, host);
1346 gpio_free(host->gpio_det);
1347 mmc_remove_host(host->mmc);
1348 free_irq(host->irq, host);
1349 rk29_dma_free(host->dma_info.chn, &host->dma_info.client);
1351 /* disable clock to CIU */
1352 rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1353 rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1355 iounmap(host->regs);
1356 mmc_free_host(host->mmc);
1359 static int rk29_sdmmc_suspend(struct platform_device *pdev, pm_message_t state)
1363 struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1365 dev_info(host->dev, "Enter rk29_sdmmc_suspend\n");
1366 if(host->mmc && !host->is_sdio){
1367 ret = mmc_suspend_host(host->mmc, state);
1368 if(host->enable_sd_warkup)
1369 free_irq(host->gpio_irq, host);
1371 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
1372 clk_disable(host->clk);
1377 static int rk29_sdmmc_resume(struct platform_device *pdev)
1381 struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1383 dev_info(host->dev, "Exit rk29_sdmmc_suspend\n");
1384 clk_enable(host->clk);
1385 rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 1);
1386 if(host->mmc && !host->is_sdio){
1387 if(host->enable_sd_warkup)
1388 ret = request_irq(host->gpio_irq,
1389 rk29_sdmmc_detect_change_isr,
1390 rk29_sdmmc_get_cd(host->mmc)?IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING,
1394 dev_err(host->dev, "gpio request_irq error\n");
1395 ret = mmc_resume_host(host->mmc);
1400 static struct platform_driver rk29_sdmmc_driver = {
1401 .suspend = rk29_sdmmc_suspend,
1402 .resume = rk29_sdmmc_resume,
1403 .remove = __exit_p(rk29_sdmmc_remove),
1405 .name = "rk29_sdmmc",
1409 static int __init rk29_sdmmc_init(void)
1411 return platform_driver_probe(&rk29_sdmmc_driver, rk29_sdmmc_probe);
1414 static void __exit rk29_sdmmc_exit(void)
1416 platform_driver_unregister(&rk29_sdmmc_driver);
1419 module_init(rk29_sdmmc_init);
1420 module_exit(rk29_sdmmc_exit);
1422 MODULE_DESCRIPTION("Rk29 Multimedia Card Interface driver");
1423 MODULE_AUTHOR("Rockchips");
1424 MODULE_LICENSE("GPL v2");