fc6be2aa8bf9df077bd8ad99c60b10edf3c65425
[firefly-linux-kernel-4.4.55.git] / drivers / mmc / host / rk29_sdmmc.c
1 /* drivers/mmc/host/rk29_sdmmc.c
2  *
3  * Copyright (C) 2010 ROCKCHIP, Inc.
4  *
5  * This software is licensed under the terms of the GNU General Public
6  * License version 2, as published by the Free Software Foundation, and
7  * may be copied, distributed, and modified under those terms.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  * mount -t debugfs debugfs /data/debugfs;cat /data/debugfs/mmc0/status
14  * echo 't' >/proc/sysrq-trigger
15  * echo 19 >/sys/module/wakelock/parameters/debug_mask
16  */
17  
18 #include <linux/blkdev.h>
19 #include <linux/clk.h>
20 #include <linux/debugfs.h>
21 #include <linux/device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/err.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/ioport.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
29 #include <linux/scatterlist.h>
30 #include <linux/seq_file.h>
31 #include <linux/stat.h>
32 #include <linux/delay.h>
33 #include <linux/irq.h>
34 #include <linux/mmc/host.h>
35 #include <linux/mmc/mmc.h>
36 #include <linux/mmc/card.h>
37
38 #include <mach/board.h>
39 #include <mach/rk29_iomap.h>
40 #include <mach/gpio.h>
41 #include <mach/iomux.h>
42
43 #include <asm/dma.h>
44 #include <mach/rk29-dma-pl330.h>
45 #include <asm/scatterlist.h>
46
47 #include "rk2818-sdmmc.h"
48
49 #define RK29_SDMMC_DATA_ERROR_FLAGS     (SDMMC_INT_DRTO | SDMMC_INT_DCRC | SDMMC_INT_HTO | SDMMC_INT_SBE | SDMMC_INT_EBE | SDMMC_INT_FRUN)
50 #define RK29_SDMMC_CMD_ERROR_FLAGS      (SDMMC_INT_RTO | SDMMC_INT_RCRC | SDMMC_INT_RE | SDMMC_INT_HLE)
51 #define RK29_SDMMC_ERROR_FLAGS          (RK29_SDMMC_DATA_ERROR_FLAGS | RK29_SDMMC_CMD_ERROR_FLAGS | SDMMC_INT_HLE)
52
53 #define RK29_SDMMC_TMO_COUNT            5000            
54
55 enum {
56         EVENT_CMD_COMPLETE = 0,
57         EVENT_XFER_COMPLETE,
58         EVENT_DATA_COMPLETE,
59         EVENT_DATA_ERROR,
60         EVENT_XFER_ERROR
61 };
62 enum {
63         MRQ_REQUEST_START = 0,
64         MRQ_INT_CMD_DONE,  //1
65         MRQ_INT_CMD_ERR,  //2
66         MRQ_INT_DATE_DONE,  //3
67         MRQ_INT_DATA_ERR,  //4
68         MRQ_INT_CD,  //5
69         MRQ_INT_SDIO,  //6
70         MRQ_HAS_DATA,  //7
71         MRQ_HAS_STOP,  //8
72         MRQ_CMD_START_TMO,  //9
73         MRQ_CMD_START_DONE,  //10
74         MRQ_STOP_START_TMO,  //11
75         MRQ_STOP_START_DONE,  //12
76         MRQ_CLK_START_TMO,  //13
77         MRQ_CLK_START_DONE,  //14
78         MRQ_RESET_CTRL_ERR,  //15
79         MRQ_RESET_CTRL_DONE,  //16
80         MRQ_DMA_SET_ERR,  //17
81         MRQ_STOP_DMA,  //18
82         MRQ_DMA_DONE,  //19
83         MRQ_REQUEST_DONE,  //20
84 };
85 enum rk29_sdmmc_state {
86         STATE_IDLE = 0,
87         STATE_SENDING_CMD,
88         STATE_SENDING_DATA,
89         STATE_DATA_BUSY,
90         STATE_SENDING_STOP,
91         STATE_DATA_ERROR,
92 };
93 #define rk29_sdmmc_test_and_clear_pending(host, event)          \
94         test_and_clear_bit(event, &host->pending_events)
95 #define rk29_sdmmc_set_completed(host, event)                   \
96                 set_bit(event, &host->completed_events)
97 #define rk29_sdmmc_set_pending(host, event)                             \
98         set_bit(event, &host->pending_events)
99 #define rk29_sdmmc_set_mrq_status(host, status)                         \
100                 set_bit(status, &host->mrq_status)
101 #define rk29_sdmmc_test_mrq_status(host, status)                                \
102                         test_bit(status, &host->mrq_status)
103
104 struct rk29_sdmmc_dma_info {
105         enum dma_ch chn;
106         char *name;
107         struct rk29_dma_client client;
108 };
109 static struct rk29_sdmmc_dma_info dma_infos[] = {
110         {
111                 .chn = DMACH_SDMMC,
112                 .client = {
113                         .name = "rk29-dma-sdmmc0",
114                 }
115         },
116         {
117                 .chn = DMACH_SDIO,
118                 .client = {
119                         .name = "rk29-dma-sdio1",
120                 }
121         },
122 };
123 static int rk29_sdmmc_is_sdio(struct rk29_sdmmc_platform_data *pdata)
124 {
125         if(strncmp(pdata->dma_name, "sdio", strlen("sdio")) == 0)
126                 return 1;
127         else
128                 return 0;
129 }
130
131 struct rk29_sdmmc {
132         struct device                           *dev;
133         
134         int                                                     is_sdio;
135         int                                                     is_init;
136         int                                                     gpio_det;
137         int                                                     gpio_irq;
138         int                                                     irq;
139
140         int                                                     enable_sd_warkup;
141
142         unsigned int                            clock;
143         unsigned int                            ios_clock;
144         unsigned int                            div;
145         spinlock_t                                      lock;
146         unsigned int                            stop_cmdr;
147         unsigned int                            cmd_intsts;
148         unsigned int                            data_intsts;
149         unsigned long                           pending_events;
150         unsigned long                           completed_events;
151         unsigned long                           mrq_status;
152         unsigned long                           old_mrq_status;
153
154         unsigned int                            bus_hz;
155         
156
157         void __iomem                            *regs;
158
159         struct mmc_host                         *mmc;
160         struct work_struct              work;
161         struct rk29_sdmmc_dma_info      dma_info;
162         struct tasklet_struct           tasklet;
163         struct mmc_request                      *mrq;
164         struct mmc_command                      *cmd;
165         struct clk                                      *clk;
166         struct timer_list                       monitor_timer;
167
168         enum rk29_sdmmc_state           state;
169         dma_addr_t                              dma_addr;
170         
171         int (*get_wifi_cd)(struct device *);
172 };
173
174 static void rk29_sdmmc_write(unsigned char  __iomem     *regbase, unsigned int regOff,unsigned int val)
175 {
176         __raw_writel(val,regbase + regOff);
177 }
178
179 static unsigned int rk29_sdmmc_read(unsigned char  __iomem      *regbase, unsigned int regOff)
180 {
181         return __raw_readl(regbase + regOff);
182 }
183
184
185 #if defined (CONFIG_DEBUG_FS)
186 /*
187  * The debugfs stuff below is mostly optimized away when
188  * CONFIG_DEBUG_FS is not set.
189  */
190 static int rk29_sdmmc_req_show(struct seq_file *s, void *v)
191 {
192         struct rk29_sdmmc       *host = s->private;
193         struct mmc_request      *mrq;
194         struct mmc_command      *cmd;
195         struct mmc_command      *stop;
196         struct mmc_data         *data;
197
198         /* Make sure we get a consistent snapshot */
199         spin_lock(&host->lock);
200         mrq = host->mrq;
201
202         if (mrq) {
203                 cmd = mrq->cmd;
204                 data = mrq->data;
205                 stop = mrq->stop;
206
207                 if (cmd)
208                         seq_printf(s,
209                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
210                                 cmd->opcode, cmd->arg, cmd->flags,
211                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
212                                 cmd->resp[2], cmd->error);
213                 if (data)
214                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
215                                 data->bytes_xfered, data->blocks,
216                                 data->blksz, data->flags, data->error);
217                 if (stop)
218                         seq_printf(s,
219                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
220                                 stop->opcode, stop->arg, stop->flags,
221                                 stop->resp[0], stop->resp[1], stop->resp[2],
222                                 stop->resp[2], stop->error);
223         }
224
225         spin_unlock(&host->lock);
226
227         return 0;
228 }
229
230 static int rk29_sdmmc_regs_show(struct seq_file *s, void *v)
231 {
232         struct rk29_sdmmc       *host = s->private;
233
234         seq_printf(s, "SDMMC_CTRL:   \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTRL));
235         seq_printf(s, "SDMMC_PWREN:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_PWREN));
236         seq_printf(s, "SDMMC_CLKDIV: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKDIV));
237         seq_printf(s, "SDMMC_CLKSRC: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKSRC));
238         seq_printf(s, "SDMMC_CLKENA: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKENA));
239         seq_printf(s, "SDMMC_TMOUT:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TMOUT));
240         seq_printf(s, "SDMMC_CTYPE:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTYPE));
241         seq_printf(s, "SDMMC_BLKSIZ: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BLKSIZ));
242         seq_printf(s, "SDMMC_BYTCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BYTCNT));
243         seq_printf(s, "SDMMC_INTMASK:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_INTMASK));
244         seq_printf(s, "SDMMC_CMDARG: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMDARG));
245         seq_printf(s, "SDMMC_CMD:    \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMD));
246         seq_printf(s, "SDMMC_RESP0:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP0));
247         seq_printf(s, "SDMMC_RESP1:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP1));
248         seq_printf(s, "SDMMC_RESP2:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP2));
249         seq_printf(s, "SDMMC_RESP3:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP3));
250         seq_printf(s, "SDMMC_MINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_MINTSTS));
251         seq_printf(s, "SDMMC_RINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RINTSTS));
252         seq_printf(s, "SDMMC_STATUS: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_STATUS));
253         seq_printf(s, "SDMMC_FIFOTH: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_FIFOTH));
254         seq_printf(s, "SDMMC_CDETECT:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CDETECT));
255         seq_printf(s, "SDMMC_WRTPRT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_WRTPRT));
256         seq_printf(s, "SDMMC_TCBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TCBCNT));
257         seq_printf(s, "SDMMC_TBBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TBBCNT));
258         seq_printf(s, "SDMMC_DEBNCE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_DEBNCE));
259
260         return 0;
261 }
262
263 static int rk29_sdmmc_status_show(struct seq_file *s, void *v)
264 {
265         struct rk29_sdmmc       *host = s->private;
266
267         seq_printf(s, "state:   \t\t0x%08x\n", host->state);
268         seq_printf(s, "pending_events:   \t0x%08lx\n", host->pending_events);
269         seq_printf(s, "completed_events:   \t0x%08lx\n", host->completed_events);
270         seq_printf(s, "mrq_status:   \t\t0x%08lx\n", host->mrq_status);
271         seq_printf(s, "old_mrq_status:   \t0x%08lx\n", host->old_mrq_status);
272
273         return 0;
274 }
275
276
277 static int rk29_sdmmc_req_open(struct inode *inode, struct file *file)
278 {
279         return single_open(file, rk29_sdmmc_req_show, inode->i_private);
280 }
281
282 static const struct file_operations rk29_sdmmc_req_fops = {
283         .owner          = THIS_MODULE,
284         .open           = rk29_sdmmc_req_open,
285         .read           = seq_read,
286         .llseek         = seq_lseek,
287         .release        = single_release,
288 };
289
290 static int rk29_sdmmc_regs_open(struct inode *inode, struct file *file)
291 {
292         return single_open(file, rk29_sdmmc_regs_show, inode->i_private);
293 }
294
295 static const struct file_operations rk29_sdmmc_regs_fops = {
296         .owner          = THIS_MODULE,
297         .open           = rk29_sdmmc_regs_open,
298         .read           = seq_read,
299         .llseek         = seq_lseek,
300         .release        = single_release,
301 };
302 static int rk29_sdmmc_status_open(struct inode *inode, struct file *file)
303 {
304         return single_open(file, rk29_sdmmc_status_show, inode->i_private);
305 }
306
307 static const struct file_operations rk29_sdmmc_status_fops = {
308         .owner          = THIS_MODULE,
309         .open           = rk29_sdmmc_status_open,
310         .read           = seq_read,
311         .llseek         = seq_lseek,
312         .release        = single_release,
313 };
314
315 static void rk29_sdmmc_init_debugfs(struct rk29_sdmmc *host)
316 {
317         struct mmc_host         *mmc = host->mmc;
318         struct dentry           *root;
319         struct dentry           *node;
320
321         root = mmc->debugfs_root;
322         if (!root)
323                 return;
324
325         node = debugfs_create_file("regs", S_IRUSR, root, host,&rk29_sdmmc_regs_fops);
326         if (!node)
327                 goto err;
328
329         node = debugfs_create_file("req", S_IRUSR, root, host, &rk29_sdmmc_req_fops);
330         if (!node)
331                 goto err;
332
333         node = debugfs_create_file("status", S_IRUSR, root, host, &rk29_sdmmc_status_fops);
334         if (!node)
335                 goto err;
336
337         return;
338
339 err:
340         dev_err(&mmc->class_dev, "failed to initialize debugfs for host\n");
341 }
342 #endif
343 static void rk29_sdmmc_show_info(struct rk29_sdmmc *host)
344 {
345         dev_info(host->dev, "state:   \t\t0x%08x\n", host->state);
346         dev_info(host->dev, "pending_events:   \t0x%08lx\n", host->pending_events);
347         dev_info(host->dev, "completed_events:   \t0x%08lx\n", host->completed_events);
348         dev_info(host->dev, "mrq_status:   \t\t0x%08lx\n\n", host->mrq_status);
349         dev_info(host->dev, "old_mrq_status:   \t0x%08lx\n\n", host->old_mrq_status);
350         dev_info(host->dev, "SDMMC_CTRL:   \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTRL));
351         dev_info(host->dev, "SDMMC_PWREN:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_PWREN));
352         dev_info(host->dev, "SDMMC_CLKDIV: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKDIV));
353         dev_info(host->dev, "SDMMC_CLKSRC: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKSRC));
354         dev_info(host->dev, "SDMMC_CLKENA: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CLKENA));
355         dev_info(host->dev, "SDMMC_TMOUT:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TMOUT));
356         dev_info(host->dev, "SDMMC_CTYPE:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CTYPE));
357         dev_info(host->dev, "SDMMC_BLKSIZ: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BLKSIZ));
358         dev_info(host->dev, "SDMMC_BYTCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_BYTCNT));
359         dev_info(host->dev, "SDMMC_INTMASK:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_INTMASK));
360         dev_info(host->dev, "SDMMC_CMDARG: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMDARG));
361         dev_info(host->dev, "SDMMC_CMD:    \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CMD));
362         dev_info(host->dev, "SDMMC_RESP0:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP0));
363         dev_info(host->dev, "SDMMC_RESP1:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP1));
364         dev_info(host->dev, "SDMMC_RESP2:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP2));
365         dev_info(host->dev, "SDMMC_RESP3:  \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RESP3));
366         dev_info(host->dev, "SDMMC_MINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_MINTSTS));
367         dev_info(host->dev, "SDMMC_RINTSTS:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_RINTSTS));
368         dev_info(host->dev, "SDMMC_STATUS: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_STATUS));
369         dev_info(host->dev, "SDMMC_FIFOTH: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_FIFOTH));
370         dev_info(host->dev, "SDMMC_CDETECT:\t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_CDETECT));
371         dev_info(host->dev, "SDMMC_WRTPRT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_WRTPRT));
372         dev_info(host->dev, "SDMMC_TCBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TCBCNT));
373         dev_info(host->dev, "SDMMC_TBBCNT: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_TBBCNT));
374         dev_info(host->dev, "SDMMC_DEBNCE: \t0x%08x\n", rk29_sdmmc_read(host->regs, SDMMC_DEBNCE));
375 }
376 static int rk29_sdmmc_reset_fifo(struct rk29_sdmmc *host)
377 {
378         int tmo = RK29_SDMMC_TMO_COUNT;
379         if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_MC_BUSY|SDMMC_STAUTS_DATA_BUSY)))
380                 return 0;
381
382         rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_FIFO_RESET);
383         while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CTRL) & SDMMC_CTRL_FIFO_RESET);
384         if(tmo > 0) {
385                 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_DONE);
386                 return 0;
387         }
388         else {
389                 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_ERR);
390                 dev_err(host->dev, "%s error\n", __func__);
391                 return -1;
392         }
393 }
394 static int rk29_sdmmc_reset_ctrl(struct rk29_sdmmc *host)
395 {
396         int tmo = RK29_SDMMC_TMO_COUNT;
397         if(!(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & (SDMMC_STAUTS_MC_BUSY|SDMMC_STAUTS_DATA_BUSY)))
398                 return 0;
399
400         rk29_sdmmc_write(host->regs, SDMMC_CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
401         while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
402         rk29_sdmmc_write(host->regs, SDMMC_CTRL, rk29_sdmmc_read(host->regs, SDMMC_CTRL) | SDMMC_CTRL_INT_ENABLE);
403
404         if(tmo > 0) {
405                 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_DONE);
406                 return 0;
407         }
408         else {
409                 rk29_sdmmc_set_mrq_status(host, MRQ_RESET_CTRL_ERR);
410                 dev_err(host->dev, "%s error\n", __func__);
411                 return -1;
412         }
413 }
414
415 static int rk29_sdmmc_start_command(struct rk29_sdmmc *host,
416                 struct mmc_command *cmd, u32 cmd_flags)
417 {
418         int tmo = RK29_SDMMC_TMO_COUNT;
419         unsigned long flags;
420
421         local_irq_save(flags);
422         
423         rk29_sdmmc_write(host->regs, SDMMC_CMDARG, cmd->arg); 
424         rk29_sdmmc_write(host->regs, SDMMC_CMD, cmd_flags | SDMMC_CMD_START); 
425         local_irq_restore(flags);
426
427         while (--tmo && rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START)
428                 cpu_relax();
429         if(tmo > 0)
430                 return 0;
431         else
432                 return -1;
433 }
434
435 static int send_stop_cmd(struct rk29_sdmmc *host)
436 {
437         dev_dbg(host->dev,"start cmd:%d ARGR=0x%08x CMDR=0x%08x\n",
438                                                 host->mrq->data->stop->opcode, host->mrq->data->stop->arg, host->stop_cmdr);
439         if(rk29_sdmmc_start_command(host, host->mrq->data->stop, host->stop_cmdr)) {
440                 rk29_sdmmc_set_mrq_status(host, MRQ_STOP_START_TMO);
441                 return -1;
442         }
443         else {
444                 rk29_sdmmc_set_mrq_status(host, MRQ_STOP_START_DONE);
445                 return 0;
446         }
447 }
448
449 static void rk29_sdmmc_request_done(struct rk29_sdmmc *host,struct mmc_request  *mrq)
450 {
451         rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, ~SDMMC_INT_SDIO);
452         rk29_sdmmc_write(host->regs, SDMMC_INTMASK,
453                 rk29_sdmmc_read(host->regs, SDMMC_INTMASK) & 
454                 ~(SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS));
455         if(mrq->stop)
456                 send_stop_cmd(host);
457         //clk_disable(host->clk);
458         if(rk29_sdmmc_read(host->regs, SDMMC_STATUS) & SDMMC_STAUTS_FIFO_FULL ){
459                 rk29_sdmmc_read(host->regs, SDMMC_DATA);
460                 rk29_sdmmc_read(host->regs, SDMMC_DATA);
461         }
462         if(mrq->data && mrq->data->error)
463                 rk29_sdmmc_reset_fifo(host);
464
465         rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
466         
467         host->mrq = NULL;
468         host->state = STATE_IDLE;
469         rk29_sdmmc_set_mrq_status(host, MRQ_REQUEST_DONE);
470         mmc_request_done(host->mmc, mrq);
471 }
472
473 static int sdmmc_send_cmd(struct rk29_sdmmc *host, unsigned int cmd, int arg)
474 {
475         int tmo = RK29_SDMMC_TMO_COUNT;
476         rk29_sdmmc_write(host->regs, SDMMC_CMDARG, arg);
477         rk29_sdmmc_write(host->regs, SDMMC_CMD, SDMMC_CMD_START | cmd);         
478         while (--tmo && readl(host->regs + SDMMC_CMD) & SDMMC_CMD_START);
479         if(tmo > 0)
480                 return 0;
481         else
482                 return -1;
483 }
484
485 int rk29_sdmmc_set_clock(struct rk29_sdmmc *host)
486 {
487         unsigned int div;
488         if(!host->ios_clock)
489                 return 0;
490         div  = (((host->bus_hz + (host->bus_hz / 5)) / host->ios_clock)) >> 1;
491         if(host->div == div)
492                 return 0;
493         
494         rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
495         rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
496         if(sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0))
497                 goto send_cmd_err;
498         rk29_sdmmc_write(host->regs, SDMMC_CLKDIV, div);
499         host->div = div;
500         host->clock = (host->bus_hz / div) >> 1;
501         if(sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0))
502                 goto send_cmd_err;
503         rk29_sdmmc_write(host->regs, SDMMC_CLKENA, SDMMC_CLKEN_ENABLE);
504         if(sdmmc_send_cmd(host, SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0))
505                 goto send_cmd_err;
506
507         rk29_sdmmc_set_mrq_status(host, MRQ_CLK_START_DONE);
508         return 0;
509 send_cmd_err:
510         rk29_sdmmc_set_mrq_status(host, MRQ_CLK_START_TMO);
511         return -1;      
512 }
513
514 static void rk29_sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
515 {
516         struct rk29_sdmmc *host = mmc_priv(mmc);;
517
518
519         switch (ios->bus_width) {
520         case MMC_BUS_WIDTH_1:
521                 rk29_sdmmc_write(host->regs, SDMMC_CTYPE, 0);
522                 break;
523         case MMC_BUS_WIDTH_4:
524                 rk29_sdmmc_write(host->regs, SDMMC_CTYPE, SDMMC_CTYPE_4BIT);
525                 break;
526         }
527         host->ios_clock = ios->clock;
528         
529         switch (ios->power_mode) {
530         case MMC_POWER_UP:
531                 host->is_init = 1;
532                 rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
533                 break;
534         default:
535                 break;
536         }
537 }
538
539 static int rk29_sdmmc_get_ro(struct mmc_host *mmc)
540 {
541         struct rk29_sdmmc *host = mmc_priv(mmc);
542         u32 wrtprt = rk29_sdmmc_read(host->regs, SDMMC_WRTPRT);
543
544         return (wrtprt & SDMMC_WRITE_PROTECT)?1:0;
545 }
546
547
548 static int rk29_sdmmc_get_cd(struct mmc_host *mmc)
549 {
550         struct rk29_sdmmc *host = mmc_priv(mmc);
551
552         if(host->is_sdio)
553                 return host->get_wifi_cd(mmc_dev(host->mmc));
554         else if(host->gpio_det == INVALID_GPIO)
555                 return 1;
556         else
557                 return gpio_get_value(host->gpio_det)?0:1;
558 }
559
560 static inline unsigned ns_to_clocks(unsigned clkrate, unsigned ns)
561 {
562         u32 clks;
563         if (clkrate > 1000000)
564                 clks =  (ns * (clkrate / 1000000) + 999) / 1000;
565         else
566                 clks =  ((ns/1000) * (clkrate / 1000) + 999) / 1000;
567
568         return clks;
569 }
570
571 static void rk29_sdmmc_set_timeout(struct rk29_sdmmc *host,struct mmc_data *data)
572 {
573         unsigned timeout;
574         unsigned int clock;
575         
576         if(host->div == -1)
577                 return;
578         else if(host->div == 0)
579                 clock = host->bus_hz;
580         else
581                 clock = (host->bus_hz / host->div) >> 1;
582         timeout = ns_to_clocks(clock, data->timeout_ns) + data->timeout_clks;
583         rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xffffffff);
584         //rk29_sdmmc_write(host->regs, SDMMC_TMOUT, (timeout << 8) | (70));
585 }
586 static u32 rk29_sdmmc_prepare_command(struct mmc_host *mmc,
587                                  struct mmc_command *cmd)
588 {
589         struct mmc_data *data;
590         u32             cmdr;
591         
592         cmd->error = -EINPROGRESS;
593         cmdr = cmd->opcode;
594
595         if(cmdr == 12) 
596                 cmdr |= SDMMC_CMD_STOP;
597         else if(cmdr == 13) 
598                 cmdr &= ~SDMMC_CMD_PRV_DAT_WAIT;
599         else 
600                 cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
601
602         if (cmd->flags & MMC_RSP_PRESENT) {
603                 cmdr |= SDMMC_CMD_RESP_EXP; // expect the respond, need to set this bit
604                 if (cmd->flags & MMC_RSP_136) 
605                         cmdr |= SDMMC_CMD_RESP_LONG; // expect long respond
606                 
607                 if(cmd->flags & MMC_RSP_CRC) 
608                         cmdr |= SDMMC_CMD_RESP_CRC;
609         }
610
611         data = cmd->data;
612         if (data) {
613                 cmdr |= SDMMC_CMD_DAT_EXP;
614                 if (data->flags & MMC_DATA_STREAM) 
615                         cmdr |= SDMMC_CMD_STRM_MODE; //  set stream mode
616                 if (data->flags & MMC_DATA_WRITE) 
617                     cmdr |= SDMMC_CMD_DAT_WR;
618         }
619         return cmdr;
620 }
621 static int rk29_sdmmc_submit_data(struct rk29_sdmmc *host, struct mmc_data *data)
622 {
623         struct scatterlist              *sg;
624         unsigned int                    i,direction;
625         int dma_len=0;
626
627         if (data->blksz & 3)
628                 return -EINVAL;
629         for_each_sg(data->sg, sg, data->sg_len, i) {
630                 if (sg->offset & 3 || sg->length & 3)
631                         return -EINVAL;
632         }
633         if (data->flags & MMC_DATA_READ)
634                 direction = RK29_DMASRC_HW;  
635         else
636                 direction = RK29_DMASRC_MEM;  
637         
638         rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_STOP);
639         rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_FLUSH);                                             
640     rk29_dma_devconfig(host->dma_info.chn, direction, (unsigned long )(host->dma_addr));
641         dma_len = dma_map_sg(host->dev, data->sg, data->sg_len, 
642                         (data->flags & MMC_DATA_READ)? DMA_FROM_DEVICE : DMA_TO_DEVICE);                                                                           
643         for (i = 0; i < dma_len; i++)                              
644         rk29_dma_enqueue(host->dma_info.chn, host, sg_dma_address(&data->sg[i]),sg_dma_len(&data->sg[i]));  // data->sg->dma_address, data->sg->length);                
645         rk29_sdmmc_write(host->regs, SDMMC_CTRL, (rk29_sdmmc_read(host->regs, SDMMC_CTRL))|SDMMC_CTRL_DMA_ENABLE);// enable dma
646         rk29_dma_ctrl(host->dma_info.chn, RK29_DMAOP_START);    
647         return 0;
648 }
649 static int rk29_sdmmc_test_cmd_start(struct rk29_sdmmc *host)
650 {
651         return rk29_sdmmc_read(host->regs, SDMMC_CMD) & SDMMC_CMD_START;
652 }
653 static int rk29_sdmmc_start_request(struct rk29_sdmmc *host,struct mmc_request *mrq)
654 {
655         int ret = 0;
656         struct mmc_command      *cmd;
657         u32     cmdflags;
658         
659         BUG_ON(host->state != STATE_IDLE);
660         
661         spin_lock(&host->lock);
662
663         if(rk29_sdmmc_test_cmd_start(host)){
664                 dev_info(host->dev, "cmd_start bit is set ,reset ctroller\n");
665                 ret = rk29_sdmmc_reset_ctrl(host);
666         }
667         if(ret < 0)
668                 goto start_err;
669         
670         host->state = STATE_SENDING_CMD;
671         
672         if (mrq->data) {
673                 rk29_sdmmc_set_timeout(host,mrq->data);
674                 rk29_sdmmc_write(host->regs, SDMMC_BYTCNT,mrq->data->blksz*mrq->data->blocks);
675                 rk29_sdmmc_write(host->regs, SDMMC_BLKSIZ,mrq->data->blksz);
676         }
677         cmd = mrq->cmd;
678         cmdflags = rk29_sdmmc_prepare_command(host->mmc, cmd);
679         if (host->is_init) {
680                 host->is_init = 0;
681             cmdflags |= SDMMC_CMD_INIT; 
682         }
683         if(cmd->opcode == 0 &&
684                 ((rk29_sdmmc_read(host, SDMMC_STATUS) & SDMMC_STAUTS_MC_BUSY)||
685                 (rk29_sdmmc_read(host, SDMMC_STATUS) & SDMMC_STAUTS_DATA_BUSY)))
686                 cmdflags |= SDMMC_CMD_STOP;
687         if (mrq->data) {
688                 rk29_sdmmc_set_mrq_status(host, MRQ_HAS_DATA);
689                 ret = rk29_sdmmc_submit_data(host, mrq->data);
690         }
691         if(ret < 0) {
692                 rk29_sdmmc_set_mrq_status(host, MRQ_DMA_SET_ERR);
693                 goto start_err;
694         }
695         dev_dbg(host->dev,"start cmd:%d ARGR=0x%08x CMDR=0x%08x\n",
696                                                 cmd->opcode, cmd->arg, cmdflags);
697         ret = rk29_sdmmc_start_command(host, cmd, cmdflags);
698         if(ret < 0) {
699                 rk29_sdmmc_set_mrq_status(host, MRQ_CMD_START_TMO);
700                 goto start_err;
701         }
702         rk29_sdmmc_set_mrq_status(host, MRQ_CMD_START_DONE);
703         if (mrq->stop) {
704                 rk29_sdmmc_set_mrq_status(host, MRQ_HAS_STOP);
705                 host->stop_cmdr = rk29_sdmmc_prepare_command(host->mmc, mrq->stop);
706         }
707         spin_unlock(&host->lock);
708         return 0;
709 start_err:
710         spin_unlock(&host->lock);
711         return ret;
712 }
713
714 static void rk29_sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
715 {
716         struct rk29_sdmmc *host = mmc_priv(mmc);
717
718         if(host->mrq) 
719                 rk29_sdmmc_show_info(host);
720         BUG_ON(host->mrq);
721         host->old_mrq_status = host->mrq_status;
722         host->mrq_status = 0;
723         host->pending_events = 0;
724         host->completed_events= 0;
725         host->cmd_intsts = 0;
726         host->data_intsts = 0;
727         host->mrq = mrq;
728         mod_timer(&host->monitor_timer, jiffies + msecs_to_jiffies(5000));
729
730         //clk_enable(host->clk);
731     rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 1);
732         
733         rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, ~SDMMC_INT_SDIO);
734         rk29_sdmmc_write(host->regs, SDMMC_INTMASK,
735                 rk29_sdmmc_read(host->regs, SDMMC_INTMASK) | 
736                 (SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS));
737         
738         if (!rk29_sdmmc_get_cd(mmc)) {
739                 mrq->cmd->error = -ENOMEDIUM;
740                 rk29_sdmmc_request_done(host, mrq);
741                 dev_dbg(host->dev, "mrq_status = 0x%08lx\n", host->mrq_status);
742                 return;
743         }
744
745         if(rk29_sdmmc_set_clock(host)) {
746                 mrq->cmd->error = -EINPROGRESS;
747                 dev_info(host->dev, "rk29_sdmmc_set_clock timeout\n");
748                 rk29_sdmmc_request_done(host, mrq);
749                 return;
750         }
751                 
752         if(rk29_sdmmc_start_request(host,mrq)) {
753                 dev_info(host->dev, "rk29_sdmmc_start_request timeout\n");
754                 mrq->cmd->error = -EINPROGRESS;
755                 rk29_sdmmc_request_done(host, mrq);
756         }
757         return;
758 }
759
760 static void rk29_sdmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
761 {
762         u32 intmask;
763         unsigned long flags;
764         struct rk29_sdmmc *host = mmc_priv(mmc);
765         
766         spin_lock_irqsave(&host->lock, flags);
767         intmask = rk29_sdmmc_read(host->regs, SDMMC_INTMASK);
768         if(enable)
769                 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask | SDMMC_INT_SDIO);
770         else
771                 rk29_sdmmc_write(host->regs, SDMMC_INTMASK, intmask & ~SDMMC_INT_SDIO);
772         spin_unlock_irqrestore(&host->lock, flags);
773 }
774
775 static void  rk29_sdmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
776 {
777         card->quirks = MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
778
779 }
780 static const struct mmc_host_ops rk29_sdmmc_ops[] = {
781         {
782                 .request        = rk29_sdmmc_request,
783                 .set_ios        = rk29_sdmmc_set_ios,
784                 .get_ro         = rk29_sdmmc_get_ro,
785                 .get_cd         = rk29_sdmmc_get_cd,
786         },
787         {
788                 .request        = rk29_sdmmc_request,
789                 .set_ios        = rk29_sdmmc_set_ios,
790                 .enable_sdio_irq = rk29_sdmmc_enable_sdio_irq,
791         .init_card       = rk29_sdmmc_init_card,
792         },
793 };
794
795 static void rk29_sdmmc_request_end(struct rk29_sdmmc *host)
796         __releases(&host->lock)
797         __acquires(&host->lock)
798 {
799         spin_unlock(&host->lock);
800         if(host->mrq)
801                 rk29_sdmmc_request_done(host, host->mrq);
802
803         spin_lock(&host->lock);
804 }
805 static void rk29_sdmmc_dma_cleanup(struct rk29_sdmmc *host)
806 {
807         struct mmc_data *data = host->mrq->data;
808         if (data) 
809                 dma_unmap_sg(host->dev, data->sg, data->sg_len,
810                      ((data->flags & MMC_DATA_WRITE)
811                       ? DMA_TO_DEVICE : DMA_FROM_DEVICE));                      
812 }
813
814 static void rk29_sdmmc_stop_dma(struct rk29_sdmmc *host)
815 {
816         rk29_sdmmc_set_mrq_status(host, MRQ_STOP_DMA);
817         rk29_sdmmc_dma_cleanup(host);
818         rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_STOP);
819         rk29_dma_ctrl(host->dma_info.chn,RK29_DMAOP_FLUSH);
820         //rk29_sdmmc_write(host->regs, SDMMC_CTRL, 
821                         //(rk29_sdmmc_read(host->regs, SDMMC_CTRL))&(~SDMMC_CTRL_DMA_ENABLE));
822 }
823
824 static void rk29_sdmmc_command_complete(struct rk29_sdmmc *host,
825         struct mmc_command *cmd)
826 {
827         unsigned int intsts = host->cmd_intsts;
828
829         host->cmd_intsts = 0;
830         if(cmd->flags & MMC_RSP_PRESENT) {
831
832             if(cmd->flags & MMC_RSP_136) {
833                 cmd->resp[3] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
834                 cmd->resp[2] = rk29_sdmmc_read(host->regs, SDMMC_RESP1);
835                 cmd->resp[1] = rk29_sdmmc_read(host->regs, SDMMC_RESP2);
836                 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP3);
837             } else {
838                 cmd->resp[0] = rk29_sdmmc_read(host->regs, SDMMC_RESP0);
839                         cmd->resp[1] = 0;
840                         cmd->resp[2] = 0;
841                         cmd->resp[3] = 0;
842             }
843         }
844
845         if (intsts & SDMMC_INT_RTO)
846                 cmd->error = -ETIMEDOUT;
847         else if ((cmd->flags & MMC_RSP_CRC) && (intsts & SDMMC_INT_RCRC))
848                 cmd->error = -EILSEQ;
849         else if (intsts & SDMMC_INT_RE)
850                 cmd->error = -EIO;
851         else if(intsts & SDMMC_INT_HLE)
852                 cmd->error = -EIO;
853         else
854                 cmd->error = 0;
855
856         if (cmd->error) {
857                 dev_dbg(host->dev,
858                         "command error: status=0x%08x resp=0x%08x\n"
859                         "cmd=0x%08x arg=0x%08x flg=0x%08x err=%d\n", 
860                         intsts, cmd->resp[0], 
861                         cmd->opcode, cmd->arg, cmd->flags, cmd->error);
862
863                 if (cmd->data) {
864                         rk29_sdmmc_stop_dma(host);
865                 }
866         } 
867 }
868
869 static void rk29_sdmmc_tasklet_func(unsigned long priv)
870 {
871         struct rk29_sdmmc       *host = (struct rk29_sdmmc *)priv;
872         enum rk29_sdmmc_state   state;
873         enum rk29_sdmmc_state   prev_state;
874         unsigned int                    intsts;
875
876         spin_lock(&host->lock);
877         state = host->state;
878
879         do {
880                 prev_state = state;
881                 switch (state) {
882                 case STATE_IDLE:
883                         break;
884
885                 case STATE_SENDING_CMD:                 
886                         if (!rk29_sdmmc_test_and_clear_pending(host,
887                                                 EVENT_CMD_COMPLETE))
888                                 break;
889                         rk29_sdmmc_set_completed(host, EVENT_CMD_COMPLETE);
890
891                         rk29_sdmmc_command_complete(host, host->mrq->cmd);
892                         if(!host->mrq)
893                                 rk29_sdmmc_show_info(host);
894                         if (!host->mrq->data || (host->mrq->cmd->error)) {
895                                 rk29_sdmmc_request_end(host);
896                                 goto unlock;
897                         }
898                         prev_state = state = STATE_SENDING_DATA;
899
900                 case STATE_SENDING_DATA:
901                         if (rk29_sdmmc_test_and_clear_pending(host,
902                                                 EVENT_DATA_ERROR)) {
903                                 if(!host->mrq)
904                                 rk29_sdmmc_show_info(host);
905                                 rk29_sdmmc_stop_dma(host);
906                                 if (host->mrq->data->stop)
907                                         send_stop_cmd(host);
908                                 state = STATE_DATA_ERROR;
909                                 break;
910                         }
911                         prev_state = state = STATE_DATA_BUSY;
912
913                 case STATE_DATA_BUSY:
914                         if (!rk29_sdmmc_test_and_clear_pending(host,
915                                                 EVENT_DATA_COMPLETE))
916                                 break;  
917                         
918                         rk29_sdmmc_set_completed(host, EVENT_DATA_COMPLETE);
919                         intsts = host->data_intsts;
920                         if(!host->mrq)
921                                 rk29_sdmmc_show_info(host);
922                         if(host->mrq->data) {
923                                 if (unlikely(intsts & RK29_SDMMC_DATA_ERROR_FLAGS)) {
924                                         if (intsts & SDMMC_INT_DRTO) {
925                                                 dev_err(host->dev,"data timeout error\n");
926                                                 host->mrq->data->error = -ETIMEDOUT;
927                                         } else if (intsts & SDMMC_INT_DCRC) {
928                                                 dev_err(host->dev,"data CRC error\n");
929                                                 host->mrq->data->error = -EILSEQ;
930                                         } else {
931                                                 dev_err(host->dev,"data FIFO error (status=%08x)\n",intsts);
932                                                 host->mrq->data->error = -EIO;
933                                         }
934                                         rk29_sdmmc_show_info(host);
935                                 }else {
936                                         host->mrq->data->bytes_xfered = host->mrq->data->blocks * host->mrq->data->blksz;
937                                         host->mrq->data->error = 0;
938                                 }
939                         }
940                         if (!host->mrq->data->stop) {
941                                 rk29_sdmmc_request_end(host);
942                                 goto unlock;
943                         }
944
945                         prev_state = state = STATE_SENDING_STOP;
946                         if (host->mrq->data && !host->mrq->data->error)
947                                 send_stop_cmd(host);
948                         /* fall through */
949
950                 case STATE_SENDING_STOP:
951                         if (!rk29_sdmmc_test_and_clear_pending(host,
952                                                 EVENT_CMD_COMPLETE))
953                                 break;
954                         if(!host->mrq)
955                                 rk29_sdmmc_show_info(host);
956                         if(host->mrq->stop)
957                                 rk29_sdmmc_command_complete(host, host->mrq->stop);
958                         rk29_sdmmc_request_end(host);
959                         goto unlock;
960                 case STATE_DATA_ERROR:
961                         state = STATE_DATA_BUSY;
962                         break;
963                 }
964         } while (state != prev_state);
965
966         host->state = state;
967
968 unlock:
969         spin_unlock(&host->lock);
970
971 }
972
973
974
975 static irqreturn_t rk29_sdmmc_isr(int irq, void *dev_id)
976 {
977         struct rk29_sdmmc *host = dev_id;
978         unsigned int intsts;
979
980         intsts = rk29_sdmmc_read(host->regs, SDMMC_MINTSTS);
981
982         spin_lock(&host->lock);
983         if(intsts & RK29_SDMMC_CMD_ERROR_FLAGS) {
984                 rk29_sdmmc_set_mrq_status(host, MRQ_INT_CMD_ERR);
985             rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_CMD_ERROR_FLAGS); 
986             host->cmd_intsts = intsts;
987             smp_wmb();
988             rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
989                 if(!host->mrq)
990                         rk29_sdmmc_show_info(host);
991                 else
992                         dev_info(host->dev, "[cmd%d] cmd error(intsts 0x%x, host->state %d, pending_events %ld)\n", 
993                                 host->mrq->cmd->opcode,intsts,host->state,host->pending_events);
994                 tasklet_schedule(&host->tasklet);
995         }
996
997         if (intsts & RK29_SDMMC_DATA_ERROR_FLAGS) {
998                 rk29_sdmmc_set_mrq_status(host, MRQ_INT_DATA_ERR);
999                 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,RK29_SDMMC_DATA_ERROR_FLAGS);
1000                 host->data_intsts = intsts;
1001                 smp_wmb();
1002                 rk29_sdmmc_set_pending(host, EVENT_DATA_ERROR);
1003                 tasklet_schedule(&host->tasklet);
1004                 if(!host->mrq)
1005                         rk29_sdmmc_show_info(host);
1006                 else
1007                         dev_info(host->dev, "[cmd%d] data error(intsts 0x%x, host->state %d, pending_events %ld)\n", 
1008                                 host->mrq->cmd->opcode, intsts,host->state,host->pending_events);
1009         }
1010
1011         if(intsts & SDMMC_INT_DTO) {
1012                 rk29_sdmmc_set_mrq_status(host, MRQ_INT_DATE_DONE);
1013             rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_DTO); 
1014             if (!host->data_intsts)
1015                         host->data_intsts = intsts;
1016             smp_wmb();
1017             rk29_sdmmc_set_pending(host, EVENT_DATA_COMPLETE);
1018             tasklet_schedule(&host->tasklet);
1019         }
1020         if (intsts & SDMMC_INT_CMD_DONE) {
1021                 rk29_sdmmc_set_mrq_status(host, MRQ_INT_CMD_DONE);
1022             rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_CMD_DONE);
1023             if(!host->cmd_intsts) 
1024                         host->cmd_intsts = intsts;
1025
1026                 smp_wmb();
1027                 rk29_sdmmc_set_pending(host, EVENT_CMD_COMPLETE);
1028                 tasklet_schedule(&host->tasklet);
1029         }
1030         if(host->is_sdio && (intsts & SDMMC_INT_SDIO)) {
1031                 rk29_sdmmc_set_mrq_status(host, MRQ_INT_SDIO);
1032                 rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_SDIO);
1033                 mmc_signal_sdio_irq(host->mmc);
1034         }
1035         spin_unlock(&host->lock);
1036         return IRQ_HANDLED;
1037 }
1038
1039 static void rk29_sdmmc_dma_complete(void *arg, int size, enum rk29_dma_buffresult result)
1040 {
1041         struct rk29_sdmmc       *host = arg;
1042         
1043         dev_dbg(host->dev, "DMA complete\n");
1044         rk29_sdmmc_set_mrq_status(host, MRQ_DMA_DONE);
1045 }
1046
1047 static void rk29_sdmmc_detect_change(struct rk29_sdmmc *host)
1048 {
1049         spin_lock(&host->lock); 
1050
1051         if (host->mrq) {
1052                 switch (host->state) {
1053                 case STATE_IDLE:
1054                         break;
1055                 case STATE_SENDING_CMD:
1056                         if(host->mrq->cmd)
1057                                 host->mrq->cmd->error = -ENOMEDIUM;
1058                         if (!host->mrq->data)
1059                                 break;
1060                         /* fall through */
1061                 case STATE_SENDING_DATA:
1062                         if(host->mrq->data)
1063                                 host->mrq->data->error = -ENOMEDIUM;
1064                         rk29_sdmmc_stop_dma(host);
1065                         break;
1066                 case STATE_DATA_BUSY:
1067                 case STATE_DATA_ERROR:
1068                         if (host->mrq->data && host->mrq->data->error == -EINPROGRESS)
1069                                 host->mrq->data->error = -ENOMEDIUM;
1070                         if (!host->mrq->stop)
1071                                 break;
1072                         /* fall through */
1073                 case STATE_SENDING_STOP:
1074                         if(host->mrq->stop) {
1075                                 host->mrq->stop->error = -ENOMEDIUM;
1076                         }
1077                         break;
1078                 }
1079                 rk29_sdmmc_request_end(host);
1080         }
1081         rk29_sdmmc_reset_fifo(host);
1082         spin_unlock(&host->lock);
1083         mmc_detect_change(host->mmc, 0);
1084 }
1085
1086 static void rk29_sdmmc1_status_notify_cb(int card_present, void *dev_id)
1087 {
1088     struct rk29_sdmmc *host = dev_id;
1089
1090     card_present = rk29_sdmmc_get_cd(host->mmc);
1091     dev_info(host->dev, "sdio change detected,status is %d\n",card_present);
1092         
1093     rk29_sdmmc_detect_change(host);
1094 }
1095
1096 static void rk29_sdmmc_get_dma_dma_info(struct rk29_sdmmc *host)
1097 {
1098         if(host->is_sdio)
1099                 host->dma_info = dma_infos[1];
1100         else
1101                 host->dma_info = dma_infos[0];
1102 }
1103
1104 static irqreturn_t rk29_sdmmc_detect_change_isr(int irq, void *dev_id);
1105 static void rk29_sdmmc_detect_change_work(struct work_struct *work)
1106 {
1107         int ret;
1108     struct rk29_sdmmc *host =  container_of(work, struct rk29_sdmmc, work);
1109         
1110         if(host->enable_sd_warkup && rk29_sdmmc_get_cd(host->mmc) && !host->mmc->card)
1111                 rk28_send_wakeup_key();
1112         rk29_sdmmc_detect_change(host);
1113
1114         free_irq(host->gpio_irq, host);
1115         ret = request_irq(host->gpio_irq,
1116                                  rk29_sdmmc_detect_change_isr,
1117                          rk29_sdmmc_get_cd(host->mmc)?IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING,
1118                          "sd_detect",
1119                          host);
1120         if(ret < 0)
1121                 dev_err(host->dev, "gpio request_irq error\n");
1122 }
1123 static irqreturn_t rk29_sdmmc_detect_change_isr(int irq, void *dev_id)
1124 {
1125         struct rk29_sdmmc *host = dev_id;
1126
1127         disable_irq_nosync(host->gpio_irq);
1128         dev_info(host->dev, "sd detect change, card is %s\n", 
1129                 rk29_sdmmc_get_cd(host->mmc)?"inserted":"removed");
1130         schedule_work(&host->work);
1131         
1132         return IRQ_HANDLED;
1133 }
1134 static void rk29_sdmmc_monitor_timer(unsigned long data)
1135 {
1136         struct rk29_sdmmc *host = (struct rk29_sdmmc *)data;
1137         
1138         if(!rk29_sdmmc_test_mrq_status(host, MRQ_REQUEST_DONE)){
1139                 rk29_sdmmc_show_info(host);
1140                 host->mrq->cmd->error = -ENOMEDIUM;
1141                 if(host->mrq->data)
1142                         host->mrq->data->error = -ENOMEDIUM;
1143                 rk29_sdmmc_request_end(host);
1144         }
1145         
1146 }
1147 static int rk29_sdmmc_probe(struct platform_device *pdev)
1148 {
1149         struct mmc_host                 *mmc;
1150         struct rk29_sdmmc               *host;
1151         struct resource                 *regs;
1152         struct rk29_sdmmc_platform_data *pdata;
1153         int                             ret = 0;
1154
1155         pdata = pdev->dev.platform_data;
1156         if (!pdata) {
1157                 dev_err(&pdev->dev, "Platform data missing\n");
1158                 return -ENODEV;
1159         }
1160         if(pdata->io_init)
1161                 pdata->io_init();
1162
1163         mmc = mmc_alloc_host(sizeof(struct rk29_sdmmc), &pdev->dev);
1164         if (!mmc)
1165                 return -ENOMEM; 
1166
1167         host = mmc_priv(mmc);
1168         host->mmc = mmc;
1169         host->dev = &pdev->dev;
1170         host->mrq = NULL;
1171         host->state = STATE_IDLE;
1172         host->div = 0;
1173         host->is_init = 1;
1174         host->is_sdio = rk29_sdmmc_is_sdio(pdata);
1175         host->get_wifi_cd = pdata->status;
1176
1177         host->irq = platform_get_irq(pdev, 0);
1178         if (host->irq < 0) {
1179                 dev_err(&pdev->dev, "platform_get_irq error\n");
1180                 ret = host->irq;
1181                 goto err_mmc_free_host;
1182         }
1183         
1184         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1185         if (!regs) {
1186                 dev_err(&pdev->dev, "platform_get_resource error\n");
1187                 ret = -ENXIO;
1188                 goto err_mmc_free_host;
1189         }
1190         
1191         host->regs = ioremap(regs->start, regs->end - regs->start);
1192         if (!host->regs){
1193                 dev_err(&pdev->dev, "ioremap error\n");
1194                 ret = ENXIO;
1195             goto err_mmc_free_host; 
1196         }
1197         spin_lock_init(&host->lock);
1198
1199         /* dma init */
1200         rk29_sdmmc_get_dma_dma_info(host);
1201         ret = rk29_dma_request(host->dma_info.chn, &(host->dma_info.client), NULL); 
1202         if (ret < 0){
1203                 dev_err(&pdev->dev, "rk29_dma_request error\n");
1204             goto err_iounmap; 
1205         }
1206         ret = rk29_dma_config(host->dma_info.chn, 16);
1207         /*
1208         if (ret < 0){
1209                 dev_err(&pdev->dev, "rk29_dma_config error\n");
1210             goto err_rk29_dma_free; 
1211         }*/
1212         ret = rk29_dma_set_buffdone_fn(host->dma_info.chn, rk29_sdmmc_dma_complete);
1213         if (ret < 0){
1214                 dev_err(&pdev->dev, "rk29_dma_set_buffdone_fn error\n");
1215             goto err_rk29_dma_free; 
1216         }
1217         host->dma_addr = regs->start + SDMMC_DATA;
1218
1219         /* clk init */
1220         host->clk = clk_get(&pdev->dev, "mmc");
1221         clk_set_rate(host->clk,52000000);
1222         clk_enable(host->clk);
1223         clk_enable(clk_get(&pdev->dev, "hclk_mmc"));
1224         host->bus_hz = clk_get_rate(host->clk); 
1225
1226         /* reset all blocks */
1227         rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1228         /* wait till resets clear */
1229         while (rk29_sdmmc_read(host->regs, SDMMC_CTRL) & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
1230          /* Clear the interrupts for the host controller */
1231         rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1232         rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1233         /* Put in max timeout */
1234         rk29_sdmmc_write(host->regs, SDMMC_TMOUT, 0xFFFFFFFF);
1235
1236         /* FIFO threshold settings  */
1237         rk29_sdmmc_write(host->regs, SDMMC_FIFOTH, ((0x3 << 28) | (0x0f << 16) | (0x10 << 0))); // RXMark = 15, TXMark = 16, DMA Size = 16
1238         /* disable clock to CIU */
1239         rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1240         rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1241         rk29_sdmmc_write(host->regs, SDMMC_PWREN, 1);
1242
1243         ret = request_irq(host->irq, rk29_sdmmc_isr, 0, dev_name(&pdev->dev), host);
1244         if (ret < 0){
1245                 dev_err(&pdev->dev, "request_irq error\n");
1246             goto err_rk29_dma_free; 
1247         }
1248
1249         /* card insert flags init*/  
1250     if (pdata->register_status_notify) {
1251         pdata->register_status_notify(rk29_sdmmc1_status_notify_cb, host);
1252     }
1253
1254         /* add host */
1255         if(host->is_sdio)
1256                 mmc->ops = &rk29_sdmmc_ops[1];
1257         else
1258                 mmc->ops = &rk29_sdmmc_ops[0];
1259         
1260         mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510);
1261         mmc->f_max = host->bus_hz/2; 
1262         mmc->ocr_avail = pdata->host_ocr_avail;
1263         mmc->caps = pdata->host_caps;
1264         mmc->max_phys_segs = 64;
1265         mmc->max_hw_segs = 64;
1266         mmc->max_blk_size = 4095; 
1267         mmc->max_blk_count = 65535; 
1268         mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1269         mmc->max_seg_size = mmc->max_req_size;  
1270         
1271         ret = mmc_add_host(mmc);
1272         if (ret < 0){
1273                 dev_err(&pdev->dev, "mmc_add_host error\n");
1274             goto err_free_irq; 
1275         }
1276         
1277 #if defined (CONFIG_DEBUG_FS)
1278         rk29_sdmmc_init_debugfs(host);
1279 #endif
1280         tasklet_init(&host->tasklet, rk29_sdmmc_tasklet_func, (unsigned long)host);
1281         setup_timer(&host->monitor_timer, rk29_sdmmc_monitor_timer,(unsigned long)host);
1282         
1283         host->gpio_det = pdata->detect_irq;
1284         if(!host->is_sdio && host->gpio_det != INVALID_GPIO) {
1285                 INIT_WORK(&host->work, rk29_sdmmc_detect_change_work);
1286                 ret = gpio_request(host->gpio_det, "sd_detect");
1287                 if(ret < 0) {
1288                         dev_err(&pdev->dev, "gpio_request error\n");
1289                         goto err_mmc_remove_host;
1290                 }
1291                 gpio_direction_input(host->gpio_det);
1292                 host->gpio_irq = gpio_to_irq(host->gpio_det);
1293
1294                 ret = request_irq(host->gpio_irq,
1295                                   rk29_sdmmc_detect_change_isr,
1296                                   rk29_sdmmc_get_cd(host->mmc)?IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING,
1297                                   "sd_detect",
1298                                   host);
1299                 if(ret < 0) {
1300                         dev_err(&pdev->dev, "gpio request_irq error\n");
1301                         goto err_gpio_free;
1302                 }
1303                 host->enable_sd_warkup = pdata->enable_sd_wakeup;
1304                 if(host->enable_sd_warkup)
1305                         enable_irq_wake(host->gpio_irq);
1306         }
1307         platform_set_drvdata(pdev, host);
1308         rk29_sdmmc_write(host->regs, SDMMC_CTYPE, 0);
1309         rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1310         rk29_sdmmc_write(host->regs, SDMMC_INTMASK,SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS);
1311         rk29_sdmmc_write(host->regs, SDMMC_CTRL,SDMMC_CTRL_INT_ENABLE);
1312         rk29_sdmmc_write(host->regs, SDMMC_CLKENA,1);
1313         
1314         dev_info(host->dev, "RK29 SDMMC controller at irq %d\n", host->irq);
1315         return 0;
1316         free_irq(host->gpio_irq, host);
1317 err_gpio_free:
1318         gpio_free(host->gpio_det);
1319 err_mmc_remove_host:
1320         mmc_remove_host(host->mmc);
1321 err_free_irq:
1322         free_irq(host->irq, host);
1323 err_rk29_dma_free:
1324         rk29_dma_free(host->dma_info.chn, &host->dma_info.client);
1325 err_iounmap:    
1326         iounmap(host->regs);
1327 err_mmc_free_host:
1328         mmc_free_host(host->mmc);
1329
1330         while(1);
1331         return ret;
1332
1333 }
1334
1335
1336
1337 static int __exit rk29_sdmmc_remove(struct platform_device *pdev)
1338 {
1339         struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1340
1341         rk29_sdmmc_write(host->regs, SDMMC_RINTSTS, 0xFFFFFFFF);
1342         rk29_sdmmc_write(host->regs, SDMMC_INTMASK, 0); // disable all mmc interrupt first
1343         
1344         smp_wmb();
1345         free_irq(host->gpio_irq, host);
1346         gpio_free(host->gpio_det);
1347         mmc_remove_host(host->mmc);
1348         free_irq(host->irq, host);
1349         rk29_dma_free(host->dma_info.chn, &host->dma_info.client);
1350         
1351         /* disable clock to CIU */
1352         rk29_sdmmc_write(host->regs, SDMMC_CLKENA,0);
1353         rk29_sdmmc_write(host->regs, SDMMC_CLKSRC,0);
1354         
1355         iounmap(host->regs);
1356         mmc_free_host(host->mmc);
1357         return 0;
1358 }
1359 static int rk29_sdmmc_suspend(struct platform_device *pdev, pm_message_t state)
1360 {
1361         int ret = 0;
1362 #ifdef CONFIG_PM
1363         struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1364
1365         dev_info(host->dev, "Enter rk29_sdmmc_suspend\n");
1366         if(host->mmc && !host->is_sdio){
1367                 ret = mmc_suspend_host(host->mmc, state);
1368                 if(host->enable_sd_warkup)
1369                         free_irq(host->gpio_irq, host);
1370         }
1371         rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 0);
1372         clk_disable(host->clk);
1373 #endif
1374         return ret;
1375 }
1376
1377 static int rk29_sdmmc_resume(struct platform_device *pdev)
1378 {
1379         int ret = 0;
1380 #ifdef CONFIG_PM
1381         struct rk29_sdmmc *host = platform_get_drvdata(pdev);
1382
1383         dev_info(host->dev, "Exit rk29_sdmmc_suspend\n");
1384         clk_enable(host->clk);
1385     rk29_sdmmc_write(host->regs, SDMMC_CLKENA, 1);
1386         if(host->mmc && !host->is_sdio){
1387                 if(host->enable_sd_warkup)
1388                         ret = request_irq(host->gpio_irq,
1389                                   rk29_sdmmc_detect_change_isr,
1390                                   rk29_sdmmc_get_cd(host->mmc)?IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING,
1391                                   "sd_detect",
1392                                   host);
1393                 if(ret < 0)
1394                 dev_err(host->dev, "gpio request_irq error\n");
1395                 ret = mmc_resume_host(host->mmc);
1396         }
1397 #endif
1398         return ret;
1399 }
1400 static struct platform_driver rk29_sdmmc_driver = {
1401         .suspend    = rk29_sdmmc_suspend,
1402         .resume     = rk29_sdmmc_resume,
1403         .remove         = __exit_p(rk29_sdmmc_remove),
1404         .driver         = {
1405                 .name           = "rk29_sdmmc",
1406         },
1407 };
1408
1409 static int __init rk29_sdmmc_init(void)
1410 {
1411         return platform_driver_probe(&rk29_sdmmc_driver, rk29_sdmmc_probe);
1412 }
1413
1414 static void __exit rk29_sdmmc_exit(void)
1415 {
1416         platform_driver_unregister(&rk29_sdmmc_driver);
1417 }
1418
1419 module_init(rk29_sdmmc_init);
1420 module_exit(rk29_sdmmc_exit);
1421
1422 MODULE_DESCRIPTION("Rk29 Multimedia Card Interface driver");
1423 MODULE_AUTHOR("Rockchips");
1424 MODULE_LICENSE("GPL v2");
1425