drivers/mmc/host/atmel-mci.c

   1 /*
   2  * Atmel MultiMedia Card Interface driver
   3  *
   4  * Copyright (C) 2004-2008 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/blkdev.h>
  11 #include <linux/clk.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/device.h>
  14 #include <linux/dmaengine.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/err.h>
  17 #include <linux/gpio.h>
  18 #include <linux/init.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/ioport.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/scatterlist.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/slab.h>
  26 #include <linux/stat.h>
  27 #include <linux/types.h>
  28
  29 #include <linux/mmc/host.h>
  30 #include <linux/mmc/sdio.h>
  31
  32 #include <mach/atmel-mci.h>
  33 #include <linux/atmel-mci.h>
  34 #include <linux/atmel_pdc.h>
  35
  36 #include <asm/io.h>
  37 #include <asm/unaligned.h>
  38
  39 #include <mach/cpu.h>
  40 #include <mach/board.h>
  41
  42 #include "atmel-mci-regs.h"
  43
  44 #define ATMCI_DATA_ERROR_FLAGS  (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
  45 #define ATMCI_DMA_THRESHOLD     16
  46
  47 enum {
  48         EVENT_CMD_COMPLETE = 0,
  49         EVENT_XFER_COMPLETE,
  50         EVENT_DATA_COMPLETE,
  51         EVENT_DATA_ERROR,
  52 };
  53
  54 enum atmel_mci_state {
  55         STATE_IDLE = 0,
  56         STATE_SENDING_CMD,
  57         STATE_SENDING_DATA,
  58         STATE_DATA_BUSY,
  59         STATE_SENDING_STOP,
  60         STATE_DATA_ERROR,
  61 };
  62
  63 enum atmci_xfer_dir {
  64         XFER_RECEIVE = 0,
  65         XFER_TRANSMIT,
  66 };
  67
  68 enum atmci_pdc_buf {
  69         PDC_FIRST_BUF = 0,
  70         PDC_SECOND_BUF,
  71 };
  72
  73 struct atmel_mci_caps {
  74         bool    has_dma;
  75         bool    has_pdc;
  76         bool    has_cfg_reg;
  77         bool    has_cstor_reg;
  78         bool    has_highspeed;
  79         bool    has_rwproof;
  80         bool    has_odd_clk_div;
  81 };
  82
  83 struct atmel_mci_dma {
  84         struct dma_chan                 *chan;
  85         struct dma_async_tx_descriptor  *data_desc;
  86 };
  87
  88 /**
  89  * struct atmel_mci - MMC controller state shared between all slots
  90  * @lock: Spinlock protecting the queue and associated data.
  91  * @regs: Pointer to MMIO registers.
  92  * @sg: Scatterlist entry currently being processed by PIO or PDC code.
  93  * @pio_offset: Offset into the current scatterlist entry.
  94  * @cur_slot: The slot which is currently using the controller.
  95  * @mrq: The request currently being processed on @cur_slot,
  96  *      or NULL if the controller is idle.
  97  * @cmd: The command currently being sent to the card, or NULL.
  98  * @data: The data currently being transferred, or NULL if no data
  99  *      transfer is in progress.
 100  * @data_size: just data->blocks * data->blksz.
 101  * @dma: DMA client state.
 102  * @data_chan: DMA channel being used for the current data transfer.
 103  * @cmd_status: Snapshot of SR taken upon completion of the current
 104  *      command. Only valid when EVENT_CMD_COMPLETE is pending.
 105  * @data_status: Snapshot of SR taken upon completion of the current
 106  *      data transfer. Only valid when EVENT_DATA_COMPLETE or
 107  *      EVENT_DATA_ERROR is pending.
 108  * @stop_cmdr: Value to be loaded into CMDR when the stop command is
 109  *      to be sent.
 110  * @tasklet: Tasklet running the request state machine.
 111  * @pending_events: Bitmask of events flagged by the interrupt handler
 112  *      to be processed by the tasklet.
 113  * @completed_events: Bitmask of events which the state machine has
 114  *      processed.
 115  * @state: Tasklet state.
 116  * @queue: List of slots waiting for access to the controller.
 117  * @need_clock_update: Update the clock rate before the next request.
 118  * @need_reset: Reset controller before next request.
 119  * @mode_reg: Value of the MR register.
 120  * @cfg_reg: Value of the CFG register.
 121  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
 122  *      rate and timeout calculations.
 123  * @mapbase: Physical address of the MMIO registers.
 124  * @mck: The peripheral bus clock hooked up to the MMC controller.
 125  * @pdev: Platform device associated with the MMC controller.
 126  * @slot: Slots sharing this MMC controller.
 127  * @caps: MCI capabilities depending on MCI version.
 128  * @prepare_data: function to setup MCI before data transfer which
 129  * depends on MCI capabilities.
 130  * @submit_data: function to start data transfer which depends on MCI
 131  * capabilities.
 132  * @stop_transfer: function to stop data transfer which depends on MCI
 133  * capabilities.
 134  *
 135  * Locking
 136  * =======
 137  *
 138  * @lock is a softirq-safe spinlock protecting @queue as well as
 139  * @cur_slot, @mrq and @state. These must always be updated
 140  * at the same time while holding @lock.
 141  *
 142  * @lock also protects mode_reg and need_clock_update since these are
 143  * used to synchronize mode register updates with the queue
 144  * processing.
 145  *
 146  * The @mrq field of struct atmel_mci_slot is also protected by @lock,
 147  * and must always be written at the same time as the slot is added to
 148  * @queue.
 149  *
 150  * @pending_events and @completed_events are accessed using atomic bit
 151  * operations, so they don't need any locking.
 152  *
 153  * None of the fields touched by the interrupt handler need any
 154  * locking. However, ordering is important: Before EVENT_DATA_ERROR or
 155  * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
 156  * interrupts must be disabled and @data_status updated with a
 157  * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
 158  * CMDRDY interrupt must be disabled and @cmd_status updated with a
 159  * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
 160  * bytes_xfered field of @data must be written. This is ensured by
 161  * using barriers.
 162  */
 163 struct atmel_mci {
 164         spinlock_t              lock;
 165         void __iomem            *regs;
 166
 167         struct scatterlist      *sg;
 168         unsigned int            pio_offset;
 169
 170         struct atmel_mci_slot   *cur_slot;
 171         struct mmc_request      *mrq;
 172         struct mmc_command      *cmd;
 173         struct mmc_data         *data;
 174         unsigned int            data_size;
 175
 176         struct atmel_mci_dma    dma;
 177         struct dma_chan         *data_chan;
 178         struct dma_slave_config dma_conf;
 179
 180         u32                     cmd_status;
 181         u32                     data_status;
 182         u32                     stop_cmdr;
 183
 184         struct tasklet_struct   tasklet;
 185         unsigned long           pending_events;
 186         unsigned long           completed_events;
 187         enum atmel_mci_state    state;
 188         struct list_head        queue;
 189
 190         bool                    need_clock_update;
 191         bool                    need_reset;
 192         u32                     mode_reg;
 193         u32                     cfg_reg;
 194         unsigned long           bus_hz;
 195         unsigned long           mapbase;
 196         struct clk              *mck;
 197         struct platform_device  *pdev;
 198
 199         struct atmel_mci_slot   *slot[ATMCI_MAX_NR_SLOTS];
 200
 201         struct atmel_mci_caps   caps;
 202
 203         u32 (*prepare_data)(struct atmel_mci *host, struct mmc_data *data);
 204         void (*submit_data)(struct atmel_mci *host, struct mmc_data *data);
 205         void (*stop_transfer)(struct atmel_mci *host);
 206 };
 207
 208 /**
 209  * struct atmel_mci_slot - MMC slot state
 210  * @mmc: The mmc_host representing this slot.
 211  * @host: The MMC controller this slot is using.
 212  * @sdc_reg: Value of SDCR to be written before using this slot.
 213  * @sdio_irq: SDIO irq mask for this slot.
 214  * @mrq: mmc_request currently being processed or waiting to be
 215  *      processed, or NULL when the slot is idle.
 216  * @queue_node: List node for placing this node in the @queue list of
 217  *      &struct atmel_mci.
 218  * @clock: Clock rate configured by set_ios(). Protected by host->lock.
 219  * @flags: Random state bits associated with the slot.
 220  * @detect_pin: GPIO pin used for card detection, or negative if not
 221  *      available.
 222  * @wp_pin: GPIO pin used for card write protect sending, or negative
 223  *      if not available.
 224  * @detect_is_active_high: The state of the detect pin when it is active.
 225  * @detect_timer: Timer used for debouncing @detect_pin interrupts.
 226  */
 227 struct atmel_mci_slot {
 228         struct mmc_host         *mmc;
 229         struct atmel_mci        *host;
 230
 231         u32                     sdc_reg;
 232         u32                     sdio_irq;
 233
 234         struct mmc_request      *mrq;
 235         struct list_head        queue_node;
 236
 237         unsigned int            clock;
 238         unsigned long           flags;
 239 #define ATMCI_CARD_PRESENT      0
 240 #define ATMCI_CARD_NEED_INIT    1
 241 #define ATMCI_SHUTDOWN          2
 242 #define ATMCI_SUSPENDED         3
 243
 244         int                     detect_pin;
 245         int                     wp_pin;
 246         bool                    detect_is_active_high;
 247
 248         struct timer_list       detect_timer;
 249 };
 250
 251 #define atmci_test_and_clear_pending(host, event)               \
 252         test_and_clear_bit(event, &host->pending_events)
 253 #define atmci_set_completed(host, event)                        \
 254         set_bit(event, &host->completed_events)
 255 #define atmci_set_pending(host, event)                          \
 256         set_bit(event, &host->pending_events)
 257
 258 /*
 259  * The debugfs stuff below is mostly optimized away when
 260  * CONFIG_DEBUG_FS is not set.
 261  */
 262 static int atmci_req_show(struct seq_file *s, void *v)
 263 {
 264         struct atmel_mci_slot   *slot = s->private;
 265         struct mmc_request      *mrq;
 266         struct mmc_command      *cmd;
 267         struct mmc_command      *stop;
 268         struct mmc_data         *data;
 269
 270         /* Make sure we get a consistent snapshot */
 271         spin_lock_bh(&slot->host->lock);
 272         mrq = slot->mrq;
 273
 274         if (mrq) {
 275                 cmd = mrq->cmd;
 276                 data = mrq->data;
 277                 stop = mrq->stop;
 278
 279                 if (cmd)
 280                         seq_printf(s,
 281                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 282                                 cmd->opcode, cmd->arg, cmd->flags,
 283                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
 284                                 cmd->resp[3], cmd->error);
 285                 if (data)
 286                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
 287                                 data->bytes_xfered, data->blocks,
 288                                 data->blksz, data->flags, data->error);
 289                 if (stop)
 290                         seq_printf(s,
 291                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 292                                 stop->opcode, stop->arg, stop->flags,
 293                                 stop->resp[0], stop->resp[1], stop->resp[2],
 294                                 stop->resp[3], stop->error);
 295         }
 296
 297         spin_unlock_bh(&slot->host->lock);
 298
 299         return 0;
 300 }
 301
 302 static int atmci_req_open(struct inode *inode, struct file *file)
 303 {
 304         return single_open(file, atmci_req_show, inode->i_private);
 305 }
 306
 307 static const struct file_operations atmci_req_fops = {
 308         .owner          = THIS_MODULE,
 309         .open           = atmci_req_open,
 310         .read           = seq_read,
 311         .llseek         = seq_lseek,
 312         .release        = single_release,
 313 };
 314
 315 static void atmci_show_status_reg(struct seq_file *s,
 316                 const char *regname, u32 value)
 317 {
 318         static const char       *sr_bit[] = {
 319                 [0]     = "CMDRDY",
 320                 [1]     = "RXRDY",
 321                 [2]     = "TXRDY",
 322                 [3]     = "BLKE",
 323                 [4]     = "DTIP",
 324                 [5]     = "NOTBUSY",
 325                 [6]     = "ENDRX",
 326                 [7]     = "ENDTX",
 327                 [8]     = "SDIOIRQA",
 328                 [9]     = "SDIOIRQB",
 329                 [12]    = "SDIOWAIT",
 330                 [14]    = "RXBUFF",
 331                 [15]    = "TXBUFE",
 332                 [16]    = "RINDE",
 333                 [17]    = "RDIRE",
 334                 [18]    = "RCRCE",
 335                 [19]    = "RENDE",
 336                 [20]    = "RTOE",
 337                 [21]    = "DCRCE",
 338                 [22]    = "DTOE",
 339                 [23]    = "CSTOE",
 340                 [24]    = "BLKOVRE",
 341                 [25]    = "DMADONE",
 342                 [26]    = "FIFOEMPTY",
 343                 [27]    = "XFRDONE",
 344                 [30]    = "OVRE",
 345                 [31]    = "UNRE",
 346         };
 347         unsigned int            i;
 348
 349         seq_printf(s, "%s:\t0x%08x", regname, value);
 350         for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
 351                 if (value & (1 << i)) {
 352                         if (sr_bit[i])
 353                                 seq_printf(s, " %s", sr_bit[i]);
 354                         else
 355                                 seq_puts(s, " UNKNOWN");
 356                 }
 357         }
 358         seq_putc(s, '\n');
 359 }
 360
 361 static int atmci_regs_show(struct seq_file *s, void *v)
 362 {
 363         struct atmel_mci        *host = s->private;
 364         u32                     *buf;
 365
 366         buf = kmalloc(ATMCI_REGS_SIZE, GFP_KERNEL);
 367         if (!buf)
 368                 return -ENOMEM;
 369
 370         /*
 371          * Grab a more or less consistent snapshot. Note that we're
 372          * not disabling interrupts, so IMR and SR may not be
 373          * consistent.
 374          */
 375         spin_lock_bh(&host->lock);
 376         clk_enable(host->mck);
 377         memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE);
 378         clk_disable(host->mck);
 379         spin_unlock_bh(&host->lock);
 380
 381         seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
 382                         buf[ATMCI_MR / 4],
 383                         buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "",
 384                         buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : "",
 385                         buf[ATMCI_MR / 4] & 0xff);
 386         seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]);
 387         seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]);
 388         seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]);
 389         seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
 390                         buf[ATMCI_BLKR / 4],
 391                         buf[ATMCI_BLKR / 4] & 0xffff,
 392                         (buf[ATMCI_BLKR / 4] >> 16) & 0xffff);
 393         if (host->caps.has_cstor_reg)
 394                 seq_printf(s, "CSTOR:\t0x%08x\n", buf[ATMCI_CSTOR / 4]);
 395
 396         /* Don't read RSPR and RDR; it will consume the data there */
 397
 398         atmci_show_status_reg(s, "SR", buf[ATMCI_SR / 4]);
 399         atmci_show_status_reg(s, "IMR", buf[ATMCI_IMR / 4]);
 400
 401         if (host->caps.has_dma) {
 402                 u32 val;
 403
 404                 val = buf[ATMCI_DMA / 4];
 405                 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
 406                                 val, val & 3,
 407                                 ((val >> 4) & 3) ?
 408                                         1 << (((val >> 4) & 3) + 1) : 1,
 409                                 val & ATMCI_DMAEN ? " DMAEN" : "");
 410         }
 411         if (host->caps.has_cfg_reg) {
 412                 u32 val;
 413
 414                 val = buf[ATMCI_CFG / 4];
 415                 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n",
 416                                 val,
 417                                 val & ATMCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "",
 418                                 val & ATMCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "",
 419                                 val & ATMCI_CFG_HSMODE ? " HSMODE" : "",
 420                                 val & ATMCI_CFG_LSYNC ? " LSYNC" : "");
 421         }
 422
 423         kfree(buf);
 424
 425         return 0;
 426 }
 427
 428 static int atmci_regs_open(struct inode *inode, struct file *file)
 429 {
 430         return single_open(file, atmci_regs_show, inode->i_private);
 431 }
 432
 433 static const struct file_operations atmci_regs_fops = {
 434         .owner          = THIS_MODULE,
 435         .open           = atmci_regs_open,
 436         .read           = seq_read,
 437         .llseek         = seq_lseek,
 438         .release        = single_release,
 439 };
 440
 441 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
 442 {
 443         struct mmc_host         *mmc = slot->mmc;
 444         struct atmel_mci        *host = slot->host;
 445         struct dentry           *root;
 446         struct dentry           *node;
 447
 448         root = mmc->debugfs_root;
 449         if (!root)
 450                 return;
 451
 452         node = debugfs_create_file("regs", S_IRUSR, root, host,
 453                         &atmci_regs_fops);
 454         if (IS_ERR(node))
 455                 return;
 456         if (!node)
 457                 goto err;
 458
 459         node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
 460         if (!node)
 461                 goto err;
 462
 463         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
 464         if (!node)
 465                 goto err;
 466
 467         node = debugfs_create_x32("pending_events", S_IRUSR, root,
 468                                      (u32 *)&host->pending_events);
 469         if (!node)
 470                 goto err;
 471
 472         node = debugfs_create_x32("completed_events", S_IRUSR, root,
 473                                      (u32 *)&host->completed_events);
 474         if (!node)
 475                 goto err;
 476
 477         return;
 478
 479 err:
 480         dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
 481 }
 482
 483 static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host,
 484                                         unsigned int ns)
 485 {
 486         /*
 487          * It is easier here to use us instead of ns for the timeout,
 488          * it prevents from overflows during calculation.
 489          */
 490         unsigned int us = DIV_ROUND_UP(ns, 1000);
 491
 492         /* Maximum clock frequency is host->bus_hz/2 */
 493         return us * (DIV_ROUND_UP(host->bus_hz, 2000000));
 494 }
 495
 496 static void atmci_set_timeout(struct atmel_mci *host,
 497                 struct atmel_mci_slot *slot, struct mmc_data *data)
 498 {
 499         static unsigned dtomul_to_shift[] = {
 500                 0, 4, 7, 8, 10, 12, 16, 20
 501         };
 502         unsigned        timeout;
 503         unsigned        dtocyc;
 504         unsigned        dtomul;
 505
 506         timeout = atmci_ns_to_clocks(host, data->timeout_ns)
 507                 + data->timeout_clks;
 508
 509         for (dtomul = 0; dtomul < 8; dtomul++) {
 510                 unsigned shift = dtomul_to_shift[dtomul];
 511                 dtocyc = (timeout + (1 << shift) - 1) >> shift;
 512                 if (dtocyc < 15)
 513                         break;
 514         }
 515
 516         if (dtomul >= 8) {
 517                 dtomul = 7;
 518                 dtocyc = 15;
 519         }
 520
 521         dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
 522                         dtocyc << dtomul_to_shift[dtomul]);
 523         atmci_writel(host, ATMCI_DTOR, (ATMCI_DTOMUL(dtomul) | ATMCI_DTOCYC(dtocyc)));
 524 }
 525
 526 /*
 527  * Return mask with command flags to be enabled for this command.
 528  */
 529 static u32 atmci_prepare_command(struct mmc_host *mmc,
 530                                  struct mmc_command *cmd)
 531 {
 532         struct mmc_data *data;
 533         u32             cmdr;
 534
 535         cmd->error = -EINPROGRESS;
 536
 537         cmdr = ATMCI_CMDR_CMDNB(cmd->opcode);
 538
 539         if (cmd->flags & MMC_RSP_PRESENT) {
 540                 if (cmd->flags & MMC_RSP_136)
 541                         cmdr |= ATMCI_CMDR_RSPTYP_136BIT;
 542                 else
 543                         cmdr |= ATMCI_CMDR_RSPTYP_48BIT;
 544         }
 545
 546         /*
 547          * This should really be MAXLAT_5 for CMD2 and ACMD41, but
 548          * it's too difficult to determine whether this is an ACMD or
 549          * not. Better make it 64.
 550          */
 551         cmdr |= ATMCI_CMDR_MAXLAT_64CYC;
 552
 553         if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
 554                 cmdr |= ATMCI_CMDR_OPDCMD;
 555
 556         data = cmd->data;
 557         if (data) {
 558                 cmdr |= ATMCI_CMDR_START_XFER;
 559
 560                 if (cmd->opcode == SD_IO_RW_EXTENDED) {
 561                         cmdr |= ATMCI_CMDR_SDIO_BLOCK;
 562                 } else {
 563                         if (data->flags & MMC_DATA_STREAM)
 564                                 cmdr |= ATMCI_CMDR_STREAM;
 565                         else if (data->blocks > 1)
 566                                 cmdr |= ATMCI_CMDR_MULTI_BLOCK;
 567                         else
 568                                 cmdr |= ATMCI_CMDR_BLOCK;
 569                 }
 570
 571                 if (data->flags & MMC_DATA_READ)
 572                         cmdr |= ATMCI_CMDR_TRDIR_READ;
 573         }
 574
 575         return cmdr;
 576 }
 577
 578 static void atmci_send_command(struct atmel_mci *host,
 579                 struct mmc_command *cmd, u32 cmd_flags)
 580 {
 581         WARN_ON(host->cmd);
 582         host->cmd = cmd;
 583
 584         dev_vdbg(&host->pdev->dev,
 585                         "start command: ARGR=0x%08x CMDR=0x%08x\n",
 586                         cmd->arg, cmd_flags);
 587
 588         atmci_writel(host, ATMCI_ARGR, cmd->arg);
 589         atmci_writel(host, ATMCI_CMDR, cmd_flags);
 590 }
 591
 592 static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
 593 {
 594         atmci_send_command(host, data->stop, host->stop_cmdr);
 595         atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY);
 596 }
 597
 598 /*
 599  * Configure given PDC buffer taking care of alignement issues.
 600  * Update host->data_size and host->sg.
 601  */
 602 static void atmci_pdc_set_single_buf(struct atmel_mci *host,
 603         enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb)
 604 {
 605         u32 pointer_reg, counter_reg;
 606
 607         if (dir == XFER_RECEIVE) {
 608                 pointer_reg = ATMEL_PDC_RPR;
 609                 counter_reg = ATMEL_PDC_RCR;
 610         } else {
 611                 pointer_reg = ATMEL_PDC_TPR;
 612                 counter_reg = ATMEL_PDC_TCR;
 613         }
 614
 615         if (buf_nb == PDC_SECOND_BUF) {
 616                 pointer_reg += ATMEL_PDC_SCND_BUF_OFF;
 617                 counter_reg += ATMEL_PDC_SCND_BUF_OFF;
 618         }
 619
 620         atmci_writel(host, pointer_reg, sg_dma_address(host->sg));
 621         if (host->data_size <= sg_dma_len(host->sg)) {
 622                 if (host->data_size & 0x3) {
 623                         /* If size is different from modulo 4, transfer bytes */
 624                         atmci_writel(host, counter_reg, host->data_size);
 625                         atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE);
 626                 } else {
 627                         /* Else transfer 32-bits words */
 628                         atmci_writel(host, counter_reg, host->data_size / 4);
 629                 }
 630                 host->data_size = 0;
 631         } else {
 632                 /* We assume the size of a page is 32-bits aligned */
 633                 atmci_writel(host, counter_reg, sg_dma_len(host->sg) / 4);
 634                 host->data_size -= sg_dma_len(host->sg);
 635                 if (host->data_size)
 636                         host->sg = sg_next(host->sg);
 637         }
 638 }
 639
 640 /*
 641  * Configure PDC buffer according to the data size ie configuring one or two
 642  * buffers. Don't use this function if you want to configure only the second
 643  * buffer. In this case, use atmci_pdc_set_single_buf.
 644  */
 645 static void atmci_pdc_set_both_buf(struct atmel_mci *host, int dir)
 646 {
 647         atmci_pdc_set_single_buf(host, dir, PDC_FIRST_BUF);
 648         if (host->data_size)
 649                 atmci_pdc_set_single_buf(host, dir, PDC_SECOND_BUF);
 650 }
 651
 652 /*
 653  * Unmap sg lists, called when transfer is finished.
 654  */
 655 static void atmci_pdc_cleanup(struct atmel_mci *host)
 656 {
 657         struct mmc_data         *data = host->data;
 658
 659         if (data)
 660                 dma_unmap_sg(&host->pdev->dev,
 661                                 data->sg, data->sg_len,
 662                                 ((data->flags & MMC_DATA_WRITE)
 663                                  ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 664 }
 665
 666 /*
 667  * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after
 668  * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY
 669  * interrupt needed for both transfer directions.
 670  */
 671 static void atmci_pdc_complete(struct atmel_mci *host)
 672 {
 673         atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
 674         atmci_pdc_cleanup(host);
 675
 676         /*
 677          * If the card was removed, data will be NULL. No point trying
 678          * to send the stop command or waiting for NBUSY in this case.
 679          */
 680         if (host->data) {
 681                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 682                 tasklet_schedule(&host->tasklet);
 683                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 684         }
 685 }
 686
 687 static void atmci_dma_cleanup(struct atmel_mci *host)
 688 {
 689         struct mmc_data                 *data = host->data;
 690
 691         if (data)
 692                 dma_unmap_sg(host->dma.chan->device->dev,
 693                                 data->sg, data->sg_len,
 694                                 ((data->flags & MMC_DATA_WRITE)
 695                                  ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 696 }
 697
 698 /*
 699  * This function is called by the DMA driver from tasklet context.
 700  */
 701 static void atmci_dma_complete(void *arg)
 702 {
 703         struct atmel_mci        *host = arg;
 704         struct mmc_data         *data = host->data;
 705
 706         dev_vdbg(&host->pdev->dev, "DMA complete\n");
 707
 708         if (host->caps.has_dma)
 709                 /* Disable DMA hardware handshaking on MCI */
 710                 atmci_writel(host, ATMCI_DMA, atmci_readl(host, ATMCI_DMA) & ~ATMCI_DMAEN);
 711
 712         atmci_dma_cleanup(host);
 713
 714         /*
 715          * If the card was removed, data will be NULL. No point trying
 716          * to send the stop command or waiting for NBUSY in this case.
 717          */
 718         if (data) {
 719                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 720                 tasklet_schedule(&host->tasklet);
 721
 722                 /*
 723                  * Regardless of what the documentation says, we have
 724                  * to wait for NOTBUSY even after block read
 725                  * operations.
 726                  *
 727                  * When the DMA transfer is complete, the controller
 728                  * may still be reading the CRC from the card, i.e.
 729                  * the data transfer is still in progress and we
 730                  * haven't seen all the potential error bits yet.
 731                  *
 732                  * The interrupt handler will schedule a different
 733                  * tasklet to finish things up when the data transfer
 734                  * is completely done.
 735                  *
 736                  * We may not complete the mmc request here anyway
 737                  * because the mmc layer may call back and cause us to
 738                  * violate the "don't submit new operations from the
 739                  * completion callback" rule of the dma engine
 740                  * framework.
 741                  */
 742                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 743         }
 744 }
 745
 746 /*
 747  * Returns a mask of interrupt flags to be enabled after the whole
 748  * request has been prepared.
 749  */
 750 static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data)
 751 {
 752         u32 iflags;
 753
 754         data->error = -EINPROGRESS;
 755
 756         host->sg = data->sg;
 757         host->data = data;
 758         host->data_chan = NULL;
 759
 760         iflags = ATMCI_DATA_ERROR_FLAGS;
 761
 762         /*
 763          * Errata: MMC data write operation with less than 12
 764          * bytes is impossible.
 765          *
 766          * Errata: MCI Transmit Data Register (TDR) FIFO
 767          * corruption when length is not multiple of 4.
 768          */
 769         if (data->blocks * data->blksz < 12
 770                         || (data->blocks * data->blksz) & 3)
 771                 host->need_reset = true;
 772
 773         host->pio_offset = 0;
 774         if (data->flags & MMC_DATA_READ)
 775                 iflags |= ATMCI_RXRDY;
 776         else
 777                 iflags |= ATMCI_TXRDY;
 778
 779         return iflags;
 780 }
 781
 782 /*
 783  * Set interrupt flags and set block length into the MCI mode register even
 784  * if this value is also accessible in the MCI block register. It seems to be
 785  * necessary before the High Speed MCI version. It also map sg and configure
 786  * PDC registers.
 787  */
 788 static u32
 789 atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data)
 790 {
 791         u32 iflags, tmp;
 792         unsigned int sg_len;
 793         enum dma_data_direction dir;
 794
 795         data->error = -EINPROGRESS;
 796
 797         host->data = data;
 798         host->sg = data->sg;
 799         iflags = ATMCI_DATA_ERROR_FLAGS;
 800
 801         /* Enable pdc mode */
 802         atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE);
 803
 804         if (data->flags & MMC_DATA_READ) {
 805                 dir = DMA_FROM_DEVICE;
 806                 iflags |= ATMCI_ENDRX | ATMCI_RXBUFF;
 807         } else {
 808                 dir = DMA_TO_DEVICE;
 809                 iflags |= ATMCI_ENDTX | ATMCI_TXBUFE;
 810         }
 811
 812         /* Set BLKLEN */
 813         tmp = atmci_readl(host, ATMCI_MR);
 814         tmp &= 0x0000ffff;
 815         tmp |= ATMCI_BLKLEN(data->blksz);
 816         atmci_writel(host, ATMCI_MR, tmp);
 817
 818         /* Configure PDC */
 819         host->data_size = data->blocks * data->blksz;
 820         sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir);
 821         if (host->data_size)
 822                 atmci_pdc_set_both_buf(host,
 823                         ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT));
 824
 825         return iflags;
 826 }
 827
 828 static u32
 829 atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
 830 {
 831         struct dma_chan                 *chan;
 832         struct dma_async_tx_descriptor  *desc;
 833         struct scatterlist              *sg;
 834         unsigned int                    i;
 835         enum dma_data_direction         direction;
 836         enum dma_transfer_direction     slave_dirn;
 837         unsigned int                    sglen;
 838         u32 iflags;
 839
 840         data->error = -EINPROGRESS;
 841
 842         WARN_ON(host->data);
 843         host->sg = NULL;
 844         host->data = data;
 845
 846         iflags = ATMCI_DATA_ERROR_FLAGS;
 847
 848         /*
 849          * We don't do DMA on "complex" transfers, i.e. with
 850          * non-word-aligned buffers or lengths. Also, we don't bother
 851          * with all the DMA setup overhead for short transfers.
 852          */
 853         if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
 854                 return atmci_prepare_data(host, data);
 855         if (data->blksz & 3)
 856                 return atmci_prepare_data(host, data);
 857
 858         for_each_sg(data->sg, sg, data->sg_len, i) {
 859                 if (sg->offset & 3 || sg->length & 3)
 860                         return atmci_prepare_data(host, data);
 861         }
 862
 863         /* If we don't have a channel, we can't do DMA */
 864         chan = host->dma.chan;
 865         if (chan)
 866                 host->data_chan = chan;
 867
 868         if (!chan)
 869                 return -ENODEV;
 870
 871         if (host->caps.has_dma)
 872                 atmci_writel(host, ATMCI_DMA, ATMCI_DMA_CHKSIZE(3) | ATMCI_DMAEN);
 873
 874         if (data->flags & MMC_DATA_READ) {
 875                 direction = DMA_FROM_DEVICE;
 876                 host->dma_conf.direction = slave_dirn = DMA_DEV_TO_MEM;
 877         } else {
 878                 direction = DMA_TO_DEVICE;
 879                 host->dma_conf.direction = slave_dirn = DMA_MEM_TO_DEV;
 880         }
 881
 882         sglen = dma_map_sg(chan->device->dev, data->sg,
 883                         data->sg_len, direction);
 884
 885         dmaengine_slave_config(chan, &host->dma_conf);
 886         desc = dmaengine_prep_slave_sg(chan,
 887                         data->sg, sglen, slave_dirn,
 888                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 889         if (!desc)
 890                 goto unmap_exit;
 891
 892         host->dma.data_desc = desc;
 893         desc->callback = atmci_dma_complete;
 894         desc->callback_param = host;
 895
 896         return iflags;
 897 unmap_exit:
 898         dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction);
 899         return -ENOMEM;
 900 }
 901
 902 static void
 903 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
 904 {
 905         return;
 906 }
 907
 908 /*
 909  * Start PDC according to transfer direction.
 910  */
 911 static void
 912 atmci_submit_data_pdc(struct atmel_mci *host, struct mmc_data *data)
 913 {
 914         if (data->flags & MMC_DATA_READ)
 915                 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
 916         else
 917                 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
 918 }
 919
 920 static void
 921 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
 922 {
 923         struct dma_chan                 *chan = host->data_chan;
 924         struct dma_async_tx_descriptor  *desc = host->dma.data_desc;
 925
 926         if (chan) {
 927                 dmaengine_submit(desc);
 928                 dma_async_issue_pending(chan);
 929         }
 930 }
 931
 932 static void atmci_stop_transfer(struct atmel_mci *host)
 933 {
 934         atmci_set_pending(host, EVENT_XFER_COMPLETE);
 935         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 936 }
 937
 938 /*
 939  * Stop data transfer because error(s) occured.
 940  */
 941 static void atmci_stop_transfer_pdc(struct atmel_mci *host)
 942 {
 943         atmci_set_pending(host, EVENT_XFER_COMPLETE);
 944         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 945 }
 946
 947 static void atmci_stop_transfer_dma(struct atmel_mci *host)
 948 {
 949         struct dma_chan *chan = host->data_chan;
 950
 951         if (chan) {
 952                 dmaengine_terminate_all(chan);
 953                 atmci_dma_cleanup(host);
 954         } else {
 955                 /* Data transfer was stopped by the interrupt handler */
 956                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 957                 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 958         }
 959 }
 960
 961 /*
 962  * Start a request: prepare data if needed, prepare the command and activate
 963  * interrupts.
 964  */
 965 static void atmci_start_request(struct atmel_mci *host,
 966                 struct atmel_mci_slot *slot)
 967 {
 968         struct mmc_request      *mrq;
 969         struct mmc_command      *cmd;
 970         struct mmc_data         *data;
 971         u32                     iflags;
 972         u32                     cmdflags;
 973
 974         mrq = slot->mrq;
 975         host->cur_slot = slot;
 976         host->mrq = mrq;
 977
 978         host->pending_events = 0;
 979         host->completed_events = 0;
 980         host->data_status = 0;
 981
 982         if (host->need_reset) {
 983                 iflags = atmci_readl(host, ATMCI_IMR);
 984                 iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB);
 985                 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
 986                 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
 987                 atmci_writel(host, ATMCI_MR, host->mode_reg);
 988                 if (host->caps.has_cfg_reg)
 989                         atmci_writel(host, ATMCI_CFG, host->cfg_reg);
 990                 atmci_writel(host, ATMCI_IER, iflags);
 991                 host->need_reset = false;
 992         }
 993         atmci_writel(host, ATMCI_SDCR, slot->sdc_reg);
 994
 995         iflags = atmci_readl(host, ATMCI_IMR);
 996         if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
 997                 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
 998                                 iflags);
 999
1000         if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
1001                 /* Send init sequence (74 clock cycles) */
1002                 atmci_writel(host, ATMCI_CMDR, ATMCI_CMDR_SPCMD_INIT);
1003                 while (!(atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY))
1004                         cpu_relax();
1005         }
1006         iflags = 0;
1007         data = mrq->data;
1008         if (data) {
1009                 atmci_set_timeout(host, slot, data);
1010
1011                 /* Must set block count/size before sending command */
1012                 atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(data->blocks)
1013                                 | ATMCI_BLKLEN(data->blksz));
1014                 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
1015                         ATMCI_BCNT(data->blocks) | ATMCI_BLKLEN(data->blksz));
1016
1017                 iflags |= host->prepare_data(host, data);
1018         }
1019
1020         iflags |= ATMCI_CMDRDY;
1021         cmd = mrq->cmd;
1022         cmdflags = atmci_prepare_command(slot->mmc, cmd);
1023         atmci_send_command(host, cmd, cmdflags);
1024
1025         if (data)
1026                 host->submit_data(host, data);
1027
1028         if (mrq->stop) {
1029                 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
1030                 host->stop_cmdr |= ATMCI_CMDR_STOP_XFER;
1031                 if (!(data->flags & MMC_DATA_WRITE))
1032                         host->stop_cmdr |= ATMCI_CMDR_TRDIR_READ;
1033                 if (data->flags & MMC_DATA_STREAM)
1034                         host->stop_cmdr |= ATMCI_CMDR_STREAM;
1035                 else
1036                         host->stop_cmdr |= ATMCI_CMDR_MULTI_BLOCK;
1037         }
1038
1039         /*
1040          * We could have enabled interrupts earlier, but I suspect
1041          * that would open up a nice can of interesting race
1042          * conditions (e.g. command and data complete, but stop not
1043          * prepared yet.)
1044          */
1045         atmci_writel(host, ATMCI_IER, iflags);
1046 }
1047
1048 static void atmci_queue_request(struct atmel_mci *host,
1049                 struct atmel_mci_slot *slot, struct mmc_request *mrq)
1050 {
1051         dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
1052                         host->state);
1053
1054         spin_lock_bh(&host->lock);
1055         slot->mrq = mrq;
1056         if (host->state == STATE_IDLE) {
1057                 host->state = STATE_SENDING_CMD;
1058                 atmci_start_request(host, slot);
1059         } else {
1060                 list_add_tail(&slot->queue_node, &host->queue);
1061         }
1062         spin_unlock_bh(&host->lock);
1063 }
1064
1065 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1066 {
1067         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1068         struct atmel_mci        *host = slot->host;
1069         struct mmc_data         *data;
1070
1071         WARN_ON(slot->mrq);
1072
1073         /*
1074          * We may "know" the card is gone even though there's still an
1075          * electrical connection. If so, we really need to communicate
1076          * this to the MMC core since there won't be any more
1077          * interrupts as the card is completely removed. Otherwise,
1078          * the MMC core might believe the card is still there even
1079          * though the card was just removed very slowly.
1080          */
1081         if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
1082                 mrq->cmd->error = -ENOMEDIUM;
1083                 mmc_request_done(mmc, mrq);
1084                 return;
1085         }
1086
1087         /* We don't support multiple blocks of weird lengths. */
1088         data = mrq->data;
1089         if (data && data->blocks > 1 && data->blksz & 3) {
1090                 mrq->cmd->error = -EINVAL;
1091                 mmc_request_done(mmc, mrq);
1092         }
1093
1094         atmci_queue_request(host, slot, mrq);
1095 }
1096
1097 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1098 {
1099         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1100         struct atmel_mci        *host = slot->host;
1101         unsigned int            i;
1102
1103         slot->sdc_reg &= ~ATMCI_SDCBUS_MASK;
1104         switch (ios->bus_width) {
1105         case MMC_BUS_WIDTH_1:
1106                 slot->sdc_reg |= ATMCI_SDCBUS_1BIT;
1107                 break;
1108         case MMC_BUS_WIDTH_4:
1109                 slot->sdc_reg |= ATMCI_SDCBUS_4BIT;
1110                 break;
1111         }
1112
1113         if (ios->clock) {
1114                 unsigned int clock_min = ~0U;
1115                 u32 clkdiv;
1116
1117                 spin_lock_bh(&host->lock);
1118                 if (!host->mode_reg) {
1119                         clk_enable(host->mck);
1120                         atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1121                         atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1122                         if (host->caps.has_cfg_reg)
1123                                 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1124                 }
1125
1126                 /*
1127                  * Use mirror of ios->clock to prevent race with mmc
1128                  * core ios update when finding the minimum.
1129                  */
1130                 slot->clock = ios->clock;
1131                 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1132                         if (host->slot[i] && host->slot[i]->clock
1133                                         && host->slot[i]->clock < clock_min)
1134                                 clock_min = host->slot[i]->clock;
1135                 }
1136
1137                 /* Calculate clock divider */
1138                 if (host->caps.has_odd_clk_div) {
1139                         clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2;
1140                         if (clkdiv > 511) {
1141                                 dev_warn(&mmc->class_dev,
1142                                          "clock %u too slow; using %lu\n",
1143                                          clock_min, host->bus_hz / (511 + 2));
1144                                 clkdiv = 511;
1145                         }
1146                         host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1)
1147                                          | ATMCI_MR_CLKODD(clkdiv & 1);
1148                 } else {
1149                         clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
1150                         if (clkdiv > 255) {
1151                                 dev_warn(&mmc->class_dev,
1152                                          "clock %u too slow; using %lu\n",
1153                                          clock_min, host->bus_hz / (2 * 256));
1154                                 clkdiv = 255;
1155                         }
1156                         host->mode_reg = ATMCI_MR_CLKDIV(clkdiv);
1157                 }
1158
1159                 /*
1160                  * WRPROOF and RDPROOF prevent overruns/underruns by
1161                  * stopping the clock when the FIFO is full/empty.
1162                  * This state is not expected to last for long.
1163                  */
1164                 if (host->caps.has_rwproof)
1165                         host->mode_reg |= (ATMCI_MR_WRPROOF | ATMCI_MR_RDPROOF);
1166
1167                 if (host->caps.has_cfg_reg) {
1168                         /* setup High Speed mode in relation with card capacity */
1169                         if (ios->timing == MMC_TIMING_SD_HS)
1170                                 host->cfg_reg |= ATMCI_CFG_HSMODE;
1171                         else
1172                                 host->cfg_reg &= ~ATMCI_CFG_HSMODE;
1173                 }
1174
1175                 if (list_empty(&host->queue)) {
1176                         atmci_writel(host, ATMCI_MR, host->mode_reg);
1177                         if (host->caps.has_cfg_reg)
1178                                 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1179                 } else {
1180                         host->need_clock_update = true;
1181                 }
1182
1183                 spin_unlock_bh(&host->lock);
1184         } else {
1185                 bool any_slot_active = false;
1186
1187                 spin_lock_bh(&host->lock);
1188                 slot->clock = 0;
1189                 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1190                         if (host->slot[i] && host->slot[i]->clock) {
1191                                 any_slot_active = true;
1192                                 break;
1193                         }
1194                 }
1195                 if (!any_slot_active) {
1196                         atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
1197                         if (host->mode_reg) {
1198                                 atmci_readl(host, ATMCI_MR);
1199                                 clk_disable(host->mck);
1200                         }
1201                         host->mode_reg = 0;
1202                 }
1203                 spin_unlock_bh(&host->lock);
1204         }
1205
1206         switch (ios->power_mode) {
1207         case MMC_POWER_UP:
1208                 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
1209                 break;
1210         default:
1211                 /*
1212                  * TODO: None of the currently available AVR32-based
1213                  * boards allow MMC power to be turned off. Implement
1214                  * power control when this can be tested properly.
1215                  *
1216                  * We also need to hook this into the clock management
1217                  * somehow so that newly inserted cards aren't
1218                  * subjected to a fast clock before we have a chance
1219                  * to figure out what the maximum rate is. Currently,
1220                  * there's no way to avoid this, and there never will
1221                  * be for boards that don't support power control.
1222                  */
1223                 break;
1224         }
1225 }
1226
1227 static int atmci_get_ro(struct mmc_host *mmc)
1228 {
1229         int                     read_only = -ENOSYS;
1230         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1231
1232         if (gpio_is_valid(slot->wp_pin)) {
1233                 read_only = gpio_get_value(slot->wp_pin);
1234                 dev_dbg(&mmc->class_dev, "card is %s\n",
1235                                 read_only ? "read-only" : "read-write");
1236         }
1237
1238         return read_only;
1239 }
1240
1241 static int atmci_get_cd(struct mmc_host *mmc)
1242 {
1243         int                     present = -ENOSYS;
1244         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1245
1246         if (gpio_is_valid(slot->detect_pin)) {
1247                 present = !(gpio_get_value(slot->detect_pin) ^
1248                             slot->detect_is_active_high);
1249                 dev_dbg(&mmc->class_dev, "card is %spresent\n",
1250                                 present ? "" : "not ");
1251         }
1252
1253         return present;
1254 }
1255
1256 static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1257 {
1258         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1259         struct atmel_mci        *host = slot->host;
1260
1261         if (enable)
1262                 atmci_writel(host, ATMCI_IER, slot->sdio_irq);
1263         else
1264                 atmci_writel(host, ATMCI_IDR, slot->sdio_irq);
1265 }
1266
1267 static const struct mmc_host_ops atmci_ops = {
1268         .request        = atmci_request,
1269         .set_ios        = atmci_set_ios,
1270         .get_ro         = atmci_get_ro,
1271         .get_cd         = atmci_get_cd,
1272         .enable_sdio_irq = atmci_enable_sdio_irq,
1273 };
1274
1275 /* Called with host->lock held */
1276 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1277         __releases(&host->lock)
1278         __acquires(&host->lock)
1279 {
1280         struct atmel_mci_slot   *slot = NULL;
1281         struct mmc_host         *prev_mmc = host->cur_slot->mmc;
1282
1283         WARN_ON(host->cmd || host->data);
1284
1285         /*
1286          * Update the MMC clock rate if necessary. This may be
1287          * necessary if set_ios() is called when a different slot is
1288          * busy transferring data.
1289          */
1290         if (host->need_clock_update) {
1291                 atmci_writel(host, ATMCI_MR, host->mode_reg);
1292                 if (host->caps.has_cfg_reg)
1293                         atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1294         }
1295
1296         host->cur_slot->mrq = NULL;
1297         host->mrq = NULL;
1298         if (!list_empty(&host->queue)) {
1299                 slot = list_entry(host->queue.next,
1300                                 struct atmel_mci_slot, queue_node);
1301                 list_del(&slot->queue_node);
1302                 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1303                                 mmc_hostname(slot->mmc));
1304                 host->state = STATE_SENDING_CMD;
1305                 atmci_start_request(host, slot);
1306         } else {
1307                 dev_vdbg(&host->pdev->dev, "list empty\n");
1308                 host->state = STATE_IDLE;
1309         }
1310
1311         spin_unlock(&host->lock);
1312         mmc_request_done(prev_mmc, mrq);
1313         spin_lock(&host->lock);
1314 }
1315
1316 static void atmci_command_complete(struct atmel_mci *host,
1317                         struct mmc_command *cmd)
1318 {
1319         u32             status = host->cmd_status;
1320
1321         /* Read the response from the card (up to 16 bytes) */
1322         cmd->resp[0] = atmci_readl(host, ATMCI_RSPR);
1323         cmd->resp[1] = atmci_readl(host, ATMCI_RSPR);
1324         cmd->resp[2] = atmci_readl(host, ATMCI_RSPR);
1325         cmd->resp[3] = atmci_readl(host, ATMCI_RSPR);
1326
1327         if (status & ATMCI_RTOE)
1328                 cmd->error = -ETIMEDOUT;
1329         else if ((cmd->flags & MMC_RSP_CRC) && (status & ATMCI_RCRCE))
1330                 cmd->error = -EILSEQ;
1331         else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE))
1332                 cmd->error = -EIO;
1333         else
1334                 cmd->error = 0;
1335
1336         if (cmd->error) {
1337                 dev_dbg(&host->pdev->dev,
1338                         "command error: status=0x%08x\n", status);
1339
1340                 if (cmd->data) {
1341                         host->stop_transfer(host);
1342                         host->data = NULL;
1343                         atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY
1344                                         | ATMCI_TXRDY | ATMCI_RXRDY
1345                                         | ATMCI_DATA_ERROR_FLAGS);
1346                 }
1347         }
1348 }
1349
1350 static void atmci_detect_change(unsigned long data)
1351 {
1352         struct atmel_mci_slot   *slot = (struct atmel_mci_slot *)data;
1353         bool                    present;
1354         bool                    present_old;
1355
1356         /*
1357          * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1358          * freeing the interrupt. We must not re-enable the interrupt
1359          * if it has been freed, and if we're shutting down, it
1360          * doesn't really matter whether the card is present or not.
1361          */
1362         smp_rmb();
1363         if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1364                 return;
1365
1366         enable_irq(gpio_to_irq(slot->detect_pin));
1367         present = !(gpio_get_value(slot->detect_pin) ^
1368                     slot->detect_is_active_high);
1369         present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1370
1371         dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1372                         present, present_old);
1373
1374         if (present != present_old) {
1375                 struct atmel_mci        *host = slot->host;
1376                 struct mmc_request      *mrq;
1377
1378                 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1379                         present ? "inserted" : "removed");
1380
1381                 spin_lock(&host->lock);
1382
1383                 if (!present)
1384                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1385                 else
1386                         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1387
1388                 /* Clean up queue if present */
1389                 mrq = slot->mrq;
1390                 if (mrq) {
1391                         if (mrq == host->mrq) {
1392                                 /*
1393                                  * Reset controller to terminate any ongoing
1394                                  * commands or data transfers.
1395                                  */
1396                                 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1397                                 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1398                                 atmci_writel(host, ATMCI_MR, host->mode_reg);
1399                                 if (host->caps.has_cfg_reg)
1400                                         atmci_writel(host, ATMCI_CFG, host->cfg_reg);
1401
1402                                 host->data = NULL;
1403                                 host->cmd = NULL;
1404
1405                                 switch (host->state) {
1406                                 case STATE_IDLE:
1407                                         break;
1408                                 case STATE_SENDING_CMD:
1409                                         mrq->cmd->error = -ENOMEDIUM;
1410                                         if (!mrq->data)
1411                                                 break;
1412                                         /* fall through */
1413                                 case STATE_SENDING_DATA:
1414                                         mrq->data->error = -ENOMEDIUM;
1415                                         host->stop_transfer(host);
1416                                         break;
1417                                 case STATE_DATA_BUSY:
1418                                 case STATE_DATA_ERROR:
1419                                         if (mrq->data->error == -EINPROGRESS)
1420                                                 mrq->data->error = -ENOMEDIUM;
1421                                         if (!mrq->stop)
1422                                                 break;
1423                                         /* fall through */
1424                                 case STATE_SENDING_STOP:
1425                                         mrq->stop->error = -ENOMEDIUM;
1426                                         break;
1427                                 }
1428
1429                                 atmci_request_end(host, mrq);
1430                         } else {
1431                                 list_del(&slot->queue_node);
1432                                 mrq->cmd->error = -ENOMEDIUM;
1433                                 if (mrq->data)
1434                                         mrq->data->error = -ENOMEDIUM;
1435                                 if (mrq->stop)
1436                                         mrq->stop->error = -ENOMEDIUM;
1437
1438                                 spin_unlock(&host->lock);
1439                                 mmc_request_done(slot->mmc, mrq);
1440                                 spin_lock(&host->lock);
1441                         }
1442                 }
1443                 spin_unlock(&host->lock);
1444
1445                 mmc_detect_change(slot->mmc, 0);
1446         }
1447 }
1448
1449 static void atmci_tasklet_func(unsigned long priv)
1450 {
1451         struct atmel_mci        *host = (struct atmel_mci *)priv;
1452         struct mmc_request      *mrq = host->mrq;
1453         struct mmc_data         *data = host->data;
1454         struct mmc_command      *cmd = host->cmd;
1455         enum atmel_mci_state    state = host->state;
1456         enum atmel_mci_state    prev_state;
1457         u32                     status;
1458
1459         spin_lock(&host->lock);
1460
1461         state = host->state;
1462
1463         dev_vdbg(&host->pdev->dev,
1464                 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1465                 state, host->pending_events, host->completed_events,
1466                 atmci_readl(host, ATMCI_IMR));
1467
1468         do {
1469                 prev_state = state;
1470
1471                 switch (state) {
1472                 case STATE_IDLE:
1473                         break;
1474
1475                 case STATE_SENDING_CMD:
1476                         if (!atmci_test_and_clear_pending(host,
1477                                                 EVENT_CMD_COMPLETE))
1478                                 break;
1479
1480                         host->cmd = NULL;
1481                         atmci_set_completed(host, EVENT_CMD_COMPLETE);
1482                         atmci_command_complete(host, mrq->cmd);
1483                         if (!mrq->data || cmd->error) {
1484                                 atmci_request_end(host, host->mrq);
1485                                 goto unlock;
1486                         }
1487
1488                         prev_state = state = STATE_SENDING_DATA;
1489                         /* fall through */
1490
1491                 case STATE_SENDING_DATA:
1492                         if (atmci_test_and_clear_pending(host,
1493                                                 EVENT_DATA_ERROR)) {
1494                                 host->stop_transfer(host);
1495                                 if (data->stop)
1496                                         atmci_send_stop_cmd(host, data);
1497                                 state = STATE_DATA_ERROR;
1498                                 break;
1499                         }
1500
1501                         if (!atmci_test_and_clear_pending(host,
1502                                                 EVENT_XFER_COMPLETE))
1503                                 break;
1504
1505                         atmci_set_completed(host, EVENT_XFER_COMPLETE);
1506                         prev_state = state = STATE_DATA_BUSY;
1507                         /* fall through */
1508
1509                 case STATE_DATA_BUSY:
1510                         if (!atmci_test_and_clear_pending(host,
1511                                                 EVENT_DATA_COMPLETE))
1512                                 break;
1513
1514                         host->data = NULL;
1515                         atmci_set_completed(host, EVENT_DATA_COMPLETE);
1516                         status = host->data_status;
1517                         if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1518                                 if (status & ATMCI_DTOE) {
1519                                         dev_dbg(&host->pdev->dev,
1520                                                         "data timeout error\n");
1521                                         data->error = -ETIMEDOUT;
1522                                 } else if (status & ATMCI_DCRCE) {
1523                                         dev_dbg(&host->pdev->dev,
1524                                                         "data CRC error\n");
1525                                         data->error = -EILSEQ;
1526                                 } else {
1527                                         dev_dbg(&host->pdev->dev,
1528                                                 "data FIFO error (status=%08x)\n",
1529                                                 status);
1530                                         data->error = -EIO;
1531                                 }
1532                         } else {
1533                                 data->bytes_xfered = data->blocks * data->blksz;
1534                                 data->error = 0;
1535                                 atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS);
1536                         }
1537
1538                         if (!data->stop) {
1539                                 atmci_request_end(host, host->mrq);
1540                                 goto unlock;
1541                         }
1542
1543                         prev_state = state = STATE_SENDING_STOP;
1544                         if (!data->error)
1545                                 atmci_send_stop_cmd(host, data);
1546                         /* fall through */
1547
1548                 case STATE_SENDING_STOP:
1549                         if (!atmci_test_and_clear_pending(host,
1550                                                 EVENT_CMD_COMPLETE))
1551                                 break;
1552
1553                         host->cmd = NULL;
1554                         atmci_command_complete(host, mrq->stop);
1555                         atmci_request_end(host, host->mrq);
1556                         goto unlock;
1557
1558                 case STATE_DATA_ERROR:
1559                         if (!atmci_test_and_clear_pending(host,
1560                                                 EVENT_XFER_COMPLETE))
1561                                 break;
1562
1563                         state = STATE_DATA_BUSY;
1564                         break;
1565                 }
1566         } while (state != prev_state);
1567
1568         host->state = state;
1569
1570 unlock:
1571         spin_unlock(&host->lock);
1572 }
1573
1574 static void atmci_read_data_pio(struct atmel_mci *host)
1575 {
1576         struct scatterlist      *sg = host->sg;
1577         void                    *buf = sg_virt(sg);
1578         unsigned int            offset = host->pio_offset;
1579         struct mmc_data         *data = host->data;
1580         u32                     value;
1581         u32                     status;
1582         unsigned int            nbytes = 0;
1583
1584         do {
1585                 value = atmci_readl(host, ATMCI_RDR);
1586                 if (likely(offset + 4 <= sg->length)) {
1587                         put_unaligned(value, (u32 *)(buf + offset));
1588
1589                         offset += 4;
1590                         nbytes += 4;
1591
1592                         if (offset == sg->length) {
1593                                 flush_dcache_page(sg_page(sg));
1594                                 host->sg = sg = sg_next(sg);
1595                                 if (!sg)
1596                                         goto done;
1597
1598                                 offset = 0;
1599                                 buf = sg_virt(sg);
1600                         }
1601                 } else {
1602                         unsigned int remaining = sg->length - offset;
1603                         memcpy(buf + offset, &value, remaining);
1604                         nbytes += remaining;
1605
1606                         flush_dcache_page(sg_page(sg));
1607                         host->sg = sg = sg_next(sg);
1608                         if (!sg)
1609                                 goto done;
1610
1611                         offset = 4 - remaining;
1612                         buf = sg_virt(sg);
1613                         memcpy(buf, (u8 *)&value + remaining, offset);
1614                         nbytes += offset;
1615                 }
1616
1617                 status = atmci_readl(host, ATMCI_SR);
1618                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1619                         atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_RXRDY
1620                                                 | ATMCI_DATA_ERROR_FLAGS));
1621                         host->data_status = status;
1622                         data->bytes_xfered += nbytes;
1623                         smp_wmb();
1624                         atmci_set_pending(host, EVENT_DATA_ERROR);
1625                         tasklet_schedule(&host->tasklet);
1626                         return;
1627                 }
1628         } while (status & ATMCI_RXRDY);
1629
1630         host->pio_offset = offset;
1631         data->bytes_xfered += nbytes;
1632
1633         return;
1634
1635 done:
1636         atmci_writel(host, ATMCI_IDR, ATMCI_RXRDY);
1637         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1638         data->bytes_xfered += nbytes;
1639         smp_wmb();
1640         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1641 }
1642
1643 static void atmci_write_data_pio(struct atmel_mci *host)
1644 {
1645         struct scatterlist      *sg = host->sg;
1646         void                    *buf = sg_virt(sg);
1647         unsigned int            offset = host->pio_offset;
1648         struct mmc_data         *data = host->data;
1649         u32                     value;
1650         u32                     status;
1651         unsigned int            nbytes = 0;
1652
1653         do {
1654                 if (likely(offset + 4 <= sg->length)) {
1655                         value = get_unaligned((u32 *)(buf + offset));
1656                         atmci_writel(host, ATMCI_TDR, value);
1657
1658                         offset += 4;
1659                         nbytes += 4;
1660                         if (offset == sg->length) {
1661                                 host->sg = sg = sg_next(sg);
1662                                 if (!sg)
1663                                         goto done;
1664
1665                                 offset = 0;
1666                                 buf = sg_virt(sg);
1667                         }
1668                 } else {
1669                         unsigned int remaining = sg->length - offset;
1670
1671                         value = 0;
1672                         memcpy(&value, buf + offset, remaining);
1673                         nbytes += remaining;
1674
1675                         host->sg = sg = sg_next(sg);
1676                         if (!sg) {
1677                                 atmci_writel(host, ATMCI_TDR, value);
1678                                 goto done;
1679                         }
1680
1681                         offset = 4 - remaining;
1682                         buf = sg_virt(sg);
1683                         memcpy((u8 *)&value + remaining, buf, offset);
1684                         atmci_writel(host, ATMCI_TDR, value);
1685                         nbytes += offset;
1686                 }
1687
1688                 status = atmci_readl(host, ATMCI_SR);
1689                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1690                         atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_TXRDY
1691                                                 | ATMCI_DATA_ERROR_FLAGS));
1692                         host->data_status = status;
1693                         data->bytes_xfered += nbytes;
1694                         smp_wmb();
1695                         atmci_set_pending(host, EVENT_DATA_ERROR);
1696                         tasklet_schedule(&host->tasklet);
1697                         return;
1698                 }
1699         } while (status & ATMCI_TXRDY);
1700
1701         host->pio_offset = offset;
1702         data->bytes_xfered += nbytes;
1703
1704         return;
1705
1706 done:
1707         atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY);
1708         atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1709         data->bytes_xfered += nbytes;
1710         smp_wmb();
1711         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1712 }
1713
1714 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1715 {
1716         atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY);
1717
1718         host->cmd_status = status;
1719         smp_wmb();
1720         atmci_set_pending(host, EVENT_CMD_COMPLETE);
1721         tasklet_schedule(&host->tasklet);
1722 }
1723
1724 static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status)
1725 {
1726         int     i;
1727
1728         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
1729                 struct atmel_mci_slot *slot = host->slot[i];
1730                 if (slot && (status & slot->sdio_irq)) {
1731                         mmc_signal_sdio_irq(slot->mmc);
1732                 }
1733         }
1734 }
1735
1736
1737 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1738 {
1739         struct atmel_mci        *host = dev_id;
1740         u32                     status, mask, pending;
1741         unsigned int            pass_count = 0;
1742
1743         do {
1744                 status = atmci_readl(host, ATMCI_SR);
1745                 mask = atmci_readl(host, ATMCI_IMR);
1746                 pending = status & mask;
1747                 if (!pending)
1748                         break;
1749
1750                 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1751                         atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS
1752                                         | ATMCI_RXRDY | ATMCI_TXRDY);
1753                         pending &= atmci_readl(host, ATMCI_IMR);
1754
1755                         host->data_status = status;
1756                         smp_wmb();
1757                         atmci_set_pending(host, EVENT_DATA_ERROR);
1758                         tasklet_schedule(&host->tasklet);
1759                 }
1760
1761                 if (pending & ATMCI_TXBUFE) {
1762                         atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE);
1763                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
1764                         /*
1765                          * We can receive this interruption before having configured
1766                          * the second pdc buffer, so we need to reconfigure first and
1767                          * second buffers again
1768                          */
1769                         if (host->data_size) {
1770                                 atmci_pdc_set_both_buf(host, XFER_TRANSMIT);
1771                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
1772                                 atmci_writel(host, ATMCI_IER, ATMCI_TXBUFE);
1773                         } else {
1774                                 atmci_pdc_complete(host);
1775                         }
1776                 } else if (pending & ATMCI_ENDTX) {
1777                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
1778
1779                         if (host->data_size) {
1780                                 atmci_pdc_set_single_buf(host,
1781                                                 XFER_TRANSMIT, PDC_SECOND_BUF);
1782                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
1783                         }
1784                 }
1785
1786                 if (pending & ATMCI_RXBUFF) {
1787                         atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF);
1788                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
1789                         /*
1790                          * We can receive this interruption before having configured
1791                          * the second pdc buffer, so we need to reconfigure first and
1792                          * second buffers again
1793                          */
1794                         if (host->data_size) {
1795                                 atmci_pdc_set_both_buf(host, XFER_RECEIVE);
1796                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
1797                                 atmci_writel(host, ATMCI_IER, ATMCI_RXBUFF);
1798                         } else {
1799                                 atmci_pdc_complete(host);
1800                         }
1801                 } else if (pending & ATMCI_ENDRX) {
1802                         atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
1803
1804                         if (host->data_size) {
1805                                 atmci_pdc_set_single_buf(host,
1806                                                 XFER_RECEIVE, PDC_SECOND_BUF);
1807                                 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
1808                         }
1809                 }
1810
1811
1812                 if (pending & ATMCI_NOTBUSY) {
1813                         atmci_writel(host, ATMCI_IDR,
1814                                         ATMCI_DATA_ERROR_FLAGS | ATMCI_NOTBUSY);
1815                         if (!host->data_status)
1816                                 host->data_status = status;
1817                         smp_wmb();
1818                         atmci_set_pending(host, EVENT_DATA_COMPLETE);
1819                         tasklet_schedule(&host->tasklet);
1820                 }
1821                 if (pending & ATMCI_RXRDY)
1822                         atmci_read_data_pio(host);
1823                 if (pending & ATMCI_TXRDY)
1824                         atmci_write_data_pio(host);
1825
1826                 if (pending & ATMCI_CMDRDY)
1827                         atmci_cmd_interrupt(host, status);
1828
1829                 if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
1830                         atmci_sdio_interrupt(host, status);
1831
1832         } while (pass_count++ < 5);
1833
1834         return pass_count ? IRQ_HANDLED : IRQ_NONE;
1835 }
1836
1837 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1838 {
1839         struct atmel_mci_slot   *slot = dev_id;
1840
1841         /*
1842          * Disable interrupts until the pin has stabilized and check
1843          * the state then. Use mod_timer() since we may be in the
1844          * middle of the timer routine when this interrupt triggers.
1845          */
1846         disable_irq_nosync(irq);
1847         mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1848
1849         return IRQ_HANDLED;
1850 }
1851
1852 static int __init atmci_init_slot(struct atmel_mci *host,
1853                 struct mci_slot_pdata *slot_data, unsigned int id,
1854                 u32 sdc_reg, u32 sdio_irq)
1855 {
1856         struct mmc_host                 *mmc;
1857         struct atmel_mci_slot           *slot;
1858
1859         mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1860         if (!mmc)
1861                 return -ENOMEM;
1862
1863         slot = mmc_priv(mmc);
1864         slot->mmc = mmc;
1865         slot->host = host;
1866         slot->detect_pin = slot_data->detect_pin;
1867         slot->wp_pin = slot_data->wp_pin;
1868         slot->detect_is_active_high = slot_data->detect_is_active_high;
1869         slot->sdc_reg = sdc_reg;
1870         slot->sdio_irq = sdio_irq;
1871
1872         mmc->ops = &atmci_ops;
1873         mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1874         mmc->f_max = host->bus_hz / 2;
1875         mmc->ocr_avail  = MMC_VDD_32_33 | MMC_VDD_33_34;
1876         if (sdio_irq)
1877                 mmc->caps |= MMC_CAP_SDIO_IRQ;
1878         if (host->caps.has_highspeed)
1879                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1880         if (slot_data->bus_width >= 4)
1881                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1882
1883         mmc->max_segs = 64;
1884         mmc->max_req_size = 32768 * 512;
1885         mmc->max_blk_size = 32768;
1886         mmc->max_blk_count = 512;
1887
1888         /* Assume card is present initially */
1889         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1890         if (gpio_is_valid(slot->detect_pin)) {
1891                 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1892                         dev_dbg(&mmc->class_dev, "no detect pin available\n");
1893                         slot->detect_pin = -EBUSY;
1894                 } else if (gpio_get_value(slot->detect_pin) ^
1895                                 slot->detect_is_active_high) {
1896                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1897                 }
1898         }
1899
1900         if (!gpio_is_valid(slot->detect_pin))
1901                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1902
1903         if (gpio_is_valid(slot->wp_pin)) {
1904                 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1905                         dev_dbg(&mmc->class_dev, "no WP pin available\n");
1906                         slot->wp_pin = -EBUSY;
1907                 }
1908         }
1909
1910         host->slot[id] = slot;
1911         mmc_add_host(mmc);
1912
1913         if (gpio_is_valid(slot->detect_pin)) {
1914                 int ret;
1915
1916                 setup_timer(&slot->detect_timer, atmci_detect_change,
1917                                 (unsigned long)slot);
1918
1919                 ret = request_irq(gpio_to_irq(slot->detect_pin),
1920                                 atmci_detect_interrupt,
1921                                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1922                                 "mmc-detect", slot);
1923                 if (ret) {
1924                         dev_dbg(&mmc->class_dev,
1925                                 "could not request IRQ %d for detect pin\n",
1926                                 gpio_to_irq(slot->detect_pin));
1927                         gpio_free(slot->detect_pin);
1928                         slot->detect_pin = -EBUSY;
1929                 }
1930         }
1931
1932         atmci_init_debugfs(slot);
1933
1934         return 0;
1935 }
1936
1937 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1938                 unsigned int id)
1939 {
1940         /* Debugfs stuff is cleaned up by mmc core */
1941
1942         set_bit(ATMCI_SHUTDOWN, &slot->flags);
1943         smp_wmb();
1944
1945         mmc_remove_host(slot->mmc);
1946
1947         if (gpio_is_valid(slot->detect_pin)) {
1948                 int pin = slot->detect_pin;
1949
1950                 free_irq(gpio_to_irq(pin), slot);
1951                 del_timer_sync(&slot->detect_timer);
1952                 gpio_free(pin);
1953         }
1954         if (gpio_is_valid(slot->wp_pin))
1955                 gpio_free(slot->wp_pin);
1956
1957         slot->host->slot[id] = NULL;
1958         mmc_free_host(slot->mmc);
1959 }
1960
1961 static bool atmci_filter(struct dma_chan *chan, void *slave)
1962 {
1963         struct mci_dma_data     *sl = slave;
1964
1965         if (sl && find_slave_dev(sl) == chan->device->dev) {
1966                 chan->private = slave_data_ptr(sl);
1967                 return true;
1968         } else {
1969                 return false;
1970         }
1971 }
1972
1973 static bool atmci_configure_dma(struct atmel_mci *host)
1974 {
1975         struct mci_platform_data        *pdata;
1976
1977         if (host == NULL)
1978                 return false;
1979
1980         pdata = host->pdev->dev.platform_data;
1981
1982         if (pdata && find_slave_dev(pdata->dma_slave)) {
1983                 dma_cap_mask_t mask;
1984
1985                 /* Try to grab a DMA channel */
1986                 dma_cap_zero(mask);
1987                 dma_cap_set(DMA_SLAVE, mask);
1988                 host->dma.chan =
1989                         dma_request_channel(mask, atmci_filter, pdata->dma_slave);
1990         }
1991         if (!host->dma.chan) {
1992                 dev_warn(&host->pdev->dev, "no DMA channel available\n");
1993                 return false;
1994         } else {
1995                 dev_info(&host->pdev->dev,
1996                                         "using %s for DMA transfers\n",
1997                                         dma_chan_name(host->dma.chan));
1998
1999                 host->dma_conf.src_addr = host->mapbase + ATMCI_RDR;
2000                 host->dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2001                 host->dma_conf.src_maxburst = 1;
2002                 host->dma_conf.dst_addr = host->mapbase + ATMCI_TDR;
2003                 host->dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2004                 host->dma_conf.dst_maxburst = 1;
2005                 host->dma_conf.device_fc = false;
2006                 return true;
2007         }
2008 }
2009
2010 static inline unsigned int atmci_get_version(struct atmel_mci *host)
2011 {
2012         return atmci_readl(host, ATMCI_VERSION) & 0x00000fff;
2013 }
2014
2015 /*
2016  * HSMCI (High Speed MCI) module is not fully compatible with MCI module.
2017  * HSMCI provides DMA support and a new config register but no more supports
2018  * PDC.
2019  */
2020 static void __init atmci_get_cap(struct atmel_mci *host)
2021 {
2022         unsigned int version;
2023
2024         version = atmci_get_version(host);
2025         dev_info(&host->pdev->dev,
2026                         "version: 0x%x\n", version);
2027
2028         host->caps.has_dma = 0;
2029         host->caps.has_pdc = 1;
2030         host->caps.has_cfg_reg = 0;
2031         host->caps.has_cstor_reg = 0;
2032         host->caps.has_highspeed = 0;
2033         host->caps.has_rwproof = 0;
2034         host->caps.has_odd_clk_div = 0;
2035
2036         /* keep only major version number */
2037         switch (version & 0xf00) {
2038         case 0x500:
2039                 host->caps.has_odd_clk_div = 1;
2040         case 0x400:
2041         case 0x300:
2042 #ifdef CONFIG_AT_HDMAC
2043                 host->caps.has_dma = 1;
2044 #else
2045                 dev_info(&host->pdev->dev,
2046                         "has dma capability but dma engine is not selected, then use pio\n");
2047 #endif
2048                 host->caps.has_pdc = 0;
2049                 host->caps.has_cfg_reg = 1;
2050                 host->caps.has_cstor_reg = 1;
2051                 host->caps.has_highspeed = 1;
2052         case 0x200:
2053                 host->caps.has_rwproof = 1;
2054         case 0x100:
2055                 break;
2056         default:
2057                 host->caps.has_pdc = 0;
2058                 dev_warn(&host->pdev->dev,
2059                                 "Unmanaged mci version, set minimum capabilities\n");
2060                 break;
2061         }
2062 }
2063
2064 static int __init atmci_probe(struct platform_device *pdev)
2065 {
2066         struct mci_platform_data        *pdata;
2067         struct atmel_mci                *host;
2068         struct resource                 *regs;
2069         unsigned int                    nr_slots;
2070         int                             irq;
2071         int                             ret;
2072
2073         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2074         if (!regs)
2075                 return -ENXIO;
2076         pdata = pdev->dev.platform_data;
2077         if (!pdata)
2078                 return -ENXIO;
2079         irq = platform_get_irq(pdev, 0);
2080         if (irq < 0)
2081                 return irq;
2082
2083         host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
2084         if (!host)
2085                 return -ENOMEM;
2086
2087         host->pdev = pdev;
2088         spin_lock_init(&host->lock);
2089         INIT_LIST_HEAD(&host->queue);
2090
2091         host->mck = clk_get(&pdev->dev, "mci_clk");
2092         if (IS_ERR(host->mck)) {
2093                 ret = PTR_ERR(host->mck);
2094                 goto err_clk_get;
2095         }
2096
2097         ret = -ENOMEM;
2098         host->regs = ioremap(regs->start, resource_size(regs));
2099         if (!host->regs)
2100                 goto err_ioremap;
2101
2102         clk_enable(host->mck);
2103         atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
2104         host->bus_hz = clk_get_rate(host->mck);
2105         clk_disable(host->mck);
2106
2107         host->mapbase = regs->start;
2108
2109         tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
2110
2111         ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
2112         if (ret)
2113                 goto err_request_irq;
2114
2115         /* Get MCI capabilities and set operations according to it */
2116         atmci_get_cap(host);
2117         if (host->caps.has_dma && atmci_configure_dma(host)) {
2118                 host->prepare_data = &atmci_prepare_data_dma;
2119                 host->submit_data = &atmci_submit_data_dma;
2120                 host->stop_transfer = &atmci_stop_transfer_dma;
2121         } else if (host->caps.has_pdc) {
2122                 dev_info(&pdev->dev, "using PDC\n");
2123                 host->prepare_data = &atmci_prepare_data_pdc;
2124                 host->submit_data = &atmci_submit_data_pdc;
2125                 host->stop_transfer = &atmci_stop_transfer_pdc;
2126         } else {
2127                 dev_info(&pdev->dev, "using PIO\n");
2128                 host->prepare_data = &atmci_prepare_data;
2129                 host->submit_data = &atmci_submit_data;
2130                 host->stop_transfer = &atmci_stop_transfer;
2131         }
2132
2133         platform_set_drvdata(pdev, host);
2134
2135         /* We need at least one slot to succeed */
2136         nr_slots = 0;
2137         ret = -ENODEV;
2138         if (pdata->slot[0].bus_width) {
2139                 ret = atmci_init_slot(host, &pdata->slot[0],
2140                                 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA);
2141                 if (!ret)
2142                         nr_slots++;
2143         }
2144         if (pdata->slot[1].bus_width) {
2145                 ret = atmci_init_slot(host, &pdata->slot[1],
2146                                 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB);
2147                 if (!ret)
2148                         nr_slots++;
2149         }
2150
2151         if (!nr_slots) {
2152                 dev_err(&pdev->dev, "init failed: no slot defined\n");
2153                 goto err_init_slot;
2154         }
2155
2156         dev_info(&pdev->dev,
2157                         "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
2158                         host->mapbase, irq, nr_slots);
2159
2160         return 0;
2161
2162 err_init_slot:
2163         if (host->dma.chan)
2164                 dma_release_channel(host->dma.chan);
2165         free_irq(irq, host);
2166 err_request_irq:
2167         iounmap(host->regs);
2168 err_ioremap:
2169         clk_put(host->mck);
2170 err_clk_get:
2171         kfree(host);
2172         return ret;
2173 }
2174
2175 static int __exit atmci_remove(struct platform_device *pdev)
2176 {
2177         struct atmel_mci        *host = platform_get_drvdata(pdev);
2178         unsigned int            i;
2179
2180         platform_set_drvdata(pdev, NULL);
2181
2182         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2183                 if (host->slot[i])
2184                         atmci_cleanup_slot(host->slot[i], i);
2185         }
2186
2187         clk_enable(host->mck);
2188         atmci_writel(host, ATMCI_IDR, ~0UL);
2189         atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
2190         atmci_readl(host, ATMCI_SR);
2191         clk_disable(host->mck);
2192
2193 #ifdef CONFIG_MMC_ATMELMCI_DMA
2194         if (host->dma.chan)
2195                 dma_release_channel(host->dma.chan);
2196 #endif
2197
2198         free_irq(platform_get_irq(pdev, 0), host);
2199         iounmap(host->regs);
2200
2201         clk_put(host->mck);
2202         kfree(host);
2203
2204         return 0;
2205 }
2206
2207 #ifdef CONFIG_PM
2208 static int atmci_suspend(struct device *dev)
2209 {
2210         struct atmel_mci *host = dev_get_drvdata(dev);
2211         int i;
2212
2213          for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2214                 struct atmel_mci_slot *slot = host->slot[i];
2215                 int ret;
2216
2217                 if (!slot)
2218                         continue;
2219                 ret = mmc_suspend_host(slot->mmc);
2220                 if (ret < 0) {
2221                         while (--i >= 0) {
2222                                 slot = host->slot[i];
2223                                 if (slot
2224                                 && test_bit(ATMCI_SUSPENDED, &slot->flags)) {
2225                                         mmc_resume_host(host->slot[i]->mmc);
2226                                         clear_bit(ATMCI_SUSPENDED, &slot->flags);
2227                                 }
2228                         }
2229                         return ret;
2230                 } else {
2231                         set_bit(ATMCI_SUSPENDED, &slot->flags);
2232                 }
2233         }
2234
2235         return 0;
2236 }
2237
2238 static int atmci_resume(struct device *dev)
2239 {
2240         struct atmel_mci *host = dev_get_drvdata(dev);
2241         int i;
2242         int ret = 0;
2243
2244         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2245                 struct atmel_mci_slot *slot = host->slot[i];
2246                 int err;
2247
2248                 slot = host->slot[i];
2249                 if (!slot)
2250                         continue;
2251                 if (!test_bit(ATMCI_SUSPENDED, &slot->flags))
2252                         continue;
2253                 err = mmc_resume_host(slot->mmc);
2254                 if (err < 0)
2255                         ret = err;
2256                 else
2257                         clear_bit(ATMCI_SUSPENDED, &slot->flags);
2258         }
2259
2260         return ret;
2261 }
2262 static SIMPLE_DEV_PM_OPS(atmci_pm, atmci_suspend, atmci_resume);
2263 #define ATMCI_PM_OPS    (&atmci_pm)
2264 #else
2265 #define ATMCI_PM_OPS    NULL
2266 #endif
2267
2268 static struct platform_driver atmci_driver = {
2269         .remove         = __exit_p(atmci_remove),
2270         .driver         = {
2271                 .name           = "atmel_mci",
2272                 .pm             = ATMCI_PM_OPS,
2273         },
2274 };
2275
2276 static int __init atmci_init(void)
2277 {
2278         return platform_driver_probe(&atmci_driver, atmci_probe);
2279 }
2280
2281 static void __exit atmci_exit(void)
2282 {
2283         platform_driver_unregister(&atmci_driver);
2284 }
2285
2286 late_initcall(atmci_init); /* try to load after dma driver when built-in */
2287 module_exit(atmci_exit);
2288
2289 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
2290 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2291 MODULE_LICENSE("GPL v2");