drivers/mmc/host/atmel-mci.c

   1 /*
   2  * Atmel MultiMedia Card Interface driver
   3  *
   4  * Copyright (C) 2004-2008 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/blkdev.h>
  11 #include <linux/clk.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/device.h>
  14 #include <linux/dmaengine.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/err.h>
  17 #include <linux/gpio.h>
  18 #include <linux/init.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/ioport.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/scatterlist.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/slab.h>
  26 #include <linux/stat.h>
  27
  28 #include <linux/mmc/host.h>
  29 #include <linux/mmc/sdio.h>
  30
  31 #include <mach/atmel-mci.h>
  32 #include <linux/atmel-mci.h>
  33
  34 #include <asm/io.h>
  35 #include <asm/unaligned.h>
  36
  37 #include <mach/cpu.h>
  38 #include <mach/board.h>
  39
  40 #include "atmel-mci-regs.h"
  41
  42 #define ATMCI_DATA_ERROR_FLAGS  (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
  43 #define ATMCI_DMA_THRESHOLD     16
  44
  45 enum {
  46         EVENT_CMD_COMPLETE = 0,
  47         EVENT_XFER_COMPLETE,
  48         EVENT_DATA_COMPLETE,
  49         EVENT_DATA_ERROR,
  50 };
  51
  52 enum atmel_mci_state {
  53         STATE_IDLE = 0,
  54         STATE_SENDING_CMD,
  55         STATE_SENDING_DATA,
  56         STATE_DATA_BUSY,
  57         STATE_SENDING_STOP,
  58         STATE_DATA_ERROR,
  59 };
  60
  61 struct atmel_mci_dma {
  62 #ifdef CONFIG_MMC_ATMELMCI_DMA
  63         struct dma_chan                 *chan;
  64         struct dma_async_tx_descriptor  *data_desc;
  65 #endif
  66 };
  67
  68 /**
  69  * struct atmel_mci - MMC controller state shared between all slots
  70  * @lock: Spinlock protecting the queue and associated data.
  71  * @regs: Pointer to MMIO registers.
  72  * @sg: Scatterlist entry currently being processed by PIO code, if any.
  73  * @pio_offset: Offset into the current scatterlist entry.
  74  * @cur_slot: The slot which is currently using the controller.
  75  * @mrq: The request currently being processed on @cur_slot,
  76  *      or NULL if the controller is idle.
  77  * @cmd: The command currently being sent to the card, or NULL.
  78  * @data: The data currently being transferred, or NULL if no data
  79  *      transfer is in progress.
  80  * @dma: DMA client state.
  81  * @data_chan: DMA channel being used for the current data transfer.
  82  * @cmd_status: Snapshot of SR taken upon completion of the current
  83  *      command. Only valid when EVENT_CMD_COMPLETE is pending.
  84  * @data_status: Snapshot of SR taken upon completion of the current
  85  *      data transfer. Only valid when EVENT_DATA_COMPLETE or
  86  *      EVENT_DATA_ERROR is pending.
  87  * @stop_cmdr: Value to be loaded into CMDR when the stop command is
  88  *      to be sent.
  89  * @tasklet: Tasklet running the request state machine.
  90  * @pending_events: Bitmask of events flagged by the interrupt handler
  91  *      to be processed by the tasklet.
  92  * @completed_events: Bitmask of events which the state machine has
  93  *      processed.
  94  * @state: Tasklet state.
  95  * @queue: List of slots waiting for access to the controller.
  96  * @need_clock_update: Update the clock rate before the next request.
  97  * @need_reset: Reset controller before next request.
  98  * @mode_reg: Value of the MR register.
  99  * @cfg_reg: Value of the CFG register.
 100  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
 101  *      rate and timeout calculations.
 102  * @mapbase: Physical address of the MMIO registers.
 103  * @mck: The peripheral bus clock hooked up to the MMC controller.
 104  * @pdev: Platform device associated with the MMC controller.
 105  * @slot: Slots sharing this MMC controller.
 106  *
 107  * Locking
 108  * =======
 109  *
 110  * @lock is a softirq-safe spinlock protecting @queue as well as
 111  * @cur_slot, @mrq and @state. These must always be updated
 112  * at the same time while holding @lock.
 113  *
 114  * @lock also protects mode_reg and need_clock_update since these are
 115  * used to synchronize mode register updates with the queue
 116  * processing.
 117  *
 118  * The @mrq field of struct atmel_mci_slot is also protected by @lock,
 119  * and must always be written at the same time as the slot is added to
 120  * @queue.
 121  *
 122  * @pending_events and @completed_events are accessed using atomic bit
 123  * operations, so they don't need any locking.
 124  *
 125  * None of the fields touched by the interrupt handler need any
 126  * locking. However, ordering is important: Before EVENT_DATA_ERROR or
 127  * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
 128  * interrupts must be disabled and @data_status updated with a
 129  * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
 130  * CMDRDY interrupt must be disabled and @cmd_status updated with a
 131  * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
 132  * bytes_xfered field of @data must be written. This is ensured by
 133  * using barriers.
 134  */
 135 struct atmel_mci {
 136         spinlock_t              lock;
 137         void __iomem            *regs;
 138
 139         struct scatterlist      *sg;
 140         unsigned int            pio_offset;
 141
 142         struct atmel_mci_slot   *cur_slot;
 143         struct mmc_request      *mrq;
 144         struct mmc_command      *cmd;
 145         struct mmc_data         *data;
 146
 147         struct atmel_mci_dma    dma;
 148         struct dma_chan         *data_chan;
 149
 150         u32                     cmd_status;
 151         u32                     data_status;
 152         u32                     stop_cmdr;
 153
 154         struct tasklet_struct   tasklet;
 155         unsigned long           pending_events;
 156         unsigned long           completed_events;
 157         enum atmel_mci_state    state;
 158         struct list_head        queue;
 159
 160         bool                    need_clock_update;
 161         bool                    need_reset;
 162         u32                     mode_reg;
 163         u32                     cfg_reg;
 164         unsigned long           bus_hz;
 165         unsigned long           mapbase;
 166         struct clk              *mck;
 167         struct platform_device  *pdev;
 168
 169         struct atmel_mci_slot   *slot[ATMEL_MCI_MAX_NR_SLOTS];
 170 };
 171
 172 /**
 173  * struct atmel_mci_slot - MMC slot state
 174  * @mmc: The mmc_host representing this slot.
 175  * @host: The MMC controller this slot is using.
 176  * @sdc_reg: Value of SDCR to be written before using this slot.
 177  * @sdio_irq: SDIO irq mask for this slot.
 178  * @mrq: mmc_request currently being processed or waiting to be
 179  *      processed, or NULL when the slot is idle.
 180  * @queue_node: List node for placing this node in the @queue list of
 181  *      &struct atmel_mci.
 182  * @clock: Clock rate configured by set_ios(). Protected by host->lock.
 183  * @flags: Random state bits associated with the slot.
 184  * @detect_pin: GPIO pin used for card detection, or negative if not
 185  *      available.
 186  * @wp_pin: GPIO pin used for card write protect sending, or negative
 187  *      if not available.
 188  * @detect_is_active_high: The state of the detect pin when it is active.
 189  * @detect_timer: Timer used for debouncing @detect_pin interrupts.
 190  */
 191 struct atmel_mci_slot {
 192         struct mmc_host         *mmc;
 193         struct atmel_mci        *host;
 194
 195         u32                     sdc_reg;
 196         u32                     sdio_irq;
 197
 198         struct mmc_request      *mrq;
 199         struct list_head        queue_node;
 200
 201         unsigned int            clock;
 202         unsigned long           flags;
 203 #define ATMCI_CARD_PRESENT      0
 204 #define ATMCI_CARD_NEED_INIT    1
 205 #define ATMCI_SHUTDOWN          2
 206
 207         int                     detect_pin;
 208         int                     wp_pin;
 209         bool                    detect_is_active_high;
 210
 211         struct timer_list       detect_timer;
 212 };
 213
 214 #define atmci_test_and_clear_pending(host, event)               \
 215         test_and_clear_bit(event, &host->pending_events)
 216 #define atmci_set_completed(host, event)                        \
 217         set_bit(event, &host->completed_events)
 218 #define atmci_set_pending(host, event)                          \
 219         set_bit(event, &host->pending_events)
 220
 221 /*
 222  * Enable or disable features/registers based on
 223  * whether the processor supports them
 224  */
 225 static bool mci_has_rwproof(void)
 226 {
 227         if (cpu_is_at91sam9261() || cpu_is_at91rm9200())
 228                 return false;
 229         else
 230                 return true;
 231 }
 232
 233 /*
 234  * The new MCI2 module isn't 100% compatible with the old MCI module,
 235  * and it has a few nice features which we want to use...
 236  */
 237 static inline bool atmci_is_mci2(void)
 238 {
 239         if (cpu_is_at91sam9g45())
 240                 return true;
 241
 242         return false;
 243 }
 244
 245
 246 /*
 247  * The debugfs stuff below is mostly optimized away when
 248  * CONFIG_DEBUG_FS is not set.
 249  */
 250 static int atmci_req_show(struct seq_file *s, void *v)
 251 {
 252         struct atmel_mci_slot   *slot = s->private;
 253         struct mmc_request      *mrq;
 254         struct mmc_command      *cmd;
 255         struct mmc_command      *stop;
 256         struct mmc_data         *data;
 257
 258         /* Make sure we get a consistent snapshot */
 259         spin_lock_bh(&slot->host->lock);
 260         mrq = slot->mrq;
 261
 262         if (mrq) {
 263                 cmd = mrq->cmd;
 264                 data = mrq->data;
 265                 stop = mrq->stop;
 266
 267                 if (cmd)
 268                         seq_printf(s,
 269                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 270                                 cmd->opcode, cmd->arg, cmd->flags,
 271                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
 272                                 cmd->resp[3], cmd->error);
 273                 if (data)
 274                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
 275                                 data->bytes_xfered, data->blocks,
 276                                 data->blksz, data->flags, data->error);
 277                 if (stop)
 278                         seq_printf(s,
 279                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
 280                                 stop->opcode, stop->arg, stop->flags,
 281                                 stop->resp[0], stop->resp[1], stop->resp[2],
 282                                 stop->resp[3], stop->error);
 283         }
 284
 285         spin_unlock_bh(&slot->host->lock);
 286
 287         return 0;
 288 }
 289
 290 static int atmci_req_open(struct inode *inode, struct file *file)
 291 {
 292         return single_open(file, atmci_req_show, inode->i_private);
 293 }
 294
 295 static const struct file_operations atmci_req_fops = {
 296         .owner          = THIS_MODULE,
 297         .open           = atmci_req_open,
 298         .read           = seq_read,
 299         .llseek         = seq_lseek,
 300         .release        = single_release,
 301 };
 302
 303 static void atmci_show_status_reg(struct seq_file *s,
 304                 const char *regname, u32 value)
 305 {
 306         static const char       *sr_bit[] = {
 307                 [0]     = "CMDRDY",
 308                 [1]     = "RXRDY",
 309                 [2]     = "TXRDY",
 310                 [3]     = "BLKE",
 311                 [4]     = "DTIP",
 312                 [5]     = "NOTBUSY",
 313                 [6]     = "ENDRX",
 314                 [7]     = "ENDTX",
 315                 [8]     = "SDIOIRQA",
 316                 [9]     = "SDIOIRQB",
 317                 [12]    = "SDIOWAIT",
 318                 [14]    = "RXBUFF",
 319                 [15]    = "TXBUFE",
 320                 [16]    = "RINDE",
 321                 [17]    = "RDIRE",
 322                 [18]    = "RCRCE",
 323                 [19]    = "RENDE",
 324                 [20]    = "RTOE",
 325                 [21]    = "DCRCE",
 326                 [22]    = "DTOE",
 327                 [23]    = "CSTOE",
 328                 [24]    = "BLKOVRE",
 329                 [25]    = "DMADONE",
 330                 [26]    = "FIFOEMPTY",
 331                 [27]    = "XFRDONE",
 332                 [30]    = "OVRE",
 333                 [31]    = "UNRE",
 334         };
 335         unsigned int            i;
 336
 337         seq_printf(s, "%s:\t0x%08x", regname, value);
 338         for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
 339                 if (value & (1 << i)) {
 340                         if (sr_bit[i])
 341                                 seq_printf(s, " %s", sr_bit[i]);
 342                         else
 343                                 seq_puts(s, " UNKNOWN");
 344                 }
 345         }
 346         seq_putc(s, '\n');
 347 }
 348
 349 static int atmci_regs_show(struct seq_file *s, void *v)
 350 {
 351         struct atmel_mci        *host = s->private;
 352         u32                     *buf;
 353
 354         buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
 355         if (!buf)
 356                 return -ENOMEM;
 357
 358         /*
 359          * Grab a more or less consistent snapshot. Note that we're
 360          * not disabling interrupts, so IMR and SR may not be
 361          * consistent.
 362          */
 363         spin_lock_bh(&host->lock);
 364         clk_enable(host->mck);
 365         memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
 366         clk_disable(host->mck);
 367         spin_unlock_bh(&host->lock);
 368
 369         seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
 370                         buf[MCI_MR / 4],
 371                         buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
 372                         buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
 373                         buf[MCI_MR / 4] & 0xff);
 374         seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
 375         seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
 376         seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
 377         seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
 378                         buf[MCI_BLKR / 4],
 379                         buf[MCI_BLKR / 4] & 0xffff,
 380                         (buf[MCI_BLKR / 4] >> 16) & 0xffff);
 381         if (atmci_is_mci2())
 382                 seq_printf(s, "CSTOR:\t0x%08x\n", buf[MCI_CSTOR / 4]);
 383
 384         /* Don't read RSPR and RDR; it will consume the data there */
 385
 386         atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
 387         atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
 388
 389         if (atmci_is_mci2()) {
 390                 u32 val;
 391
 392                 val = buf[MCI_DMA / 4];
 393                 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
 394                                 val, val & 3,
 395                                 ((val >> 4) & 3) ?
 396                                         1 << (((val >> 4) & 3) + 1) : 1,
 397                                 val & MCI_DMAEN ? " DMAEN" : "");
 398
 399                 val = buf[MCI_CFG / 4];
 400                 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n",
 401                                 val,
 402                                 val & MCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "",
 403                                 val & MCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "",
 404                                 val & MCI_CFG_HSMODE ? " HSMODE" : "",
 405                                 val & MCI_CFG_LSYNC ? " LSYNC" : "");
 406         }
 407
 408         kfree(buf);
 409
 410         return 0;
 411 }
 412
 413 static int atmci_regs_open(struct inode *inode, struct file *file)
 414 {
 415         return single_open(file, atmci_regs_show, inode->i_private);
 416 }
 417
 418 static const struct file_operations atmci_regs_fops = {
 419         .owner          = THIS_MODULE,
 420         .open           = atmci_regs_open,
 421         .read           = seq_read,
 422         .llseek         = seq_lseek,
 423         .release        = single_release,
 424 };
 425
 426 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
 427 {
 428         struct mmc_host         *mmc = slot->mmc;
 429         struct atmel_mci        *host = slot->host;
 430         struct dentry           *root;
 431         struct dentry           *node;
 432
 433         root = mmc->debugfs_root;
 434         if (!root)
 435                 return;
 436
 437         node = debugfs_create_file("regs", S_IRUSR, root, host,
 438                         &atmci_regs_fops);
 439         if (IS_ERR(node))
 440                 return;
 441         if (!node)
 442                 goto err;
 443
 444         node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
 445         if (!node)
 446                 goto err;
 447
 448         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
 449         if (!node)
 450                 goto err;
 451
 452         node = debugfs_create_x32("pending_events", S_IRUSR, root,
 453                                      (u32 *)&host->pending_events);
 454         if (!node)
 455                 goto err;
 456
 457         node = debugfs_create_x32("completed_events", S_IRUSR, root,
 458                                      (u32 *)&host->completed_events);
 459         if (!node)
 460                 goto err;
 461
 462         return;
 463
 464 err:
 465         dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
 466 }
 467
 468 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
 469                                         unsigned int ns)
 470 {
 471         /*
 472          * It is easier here to use us instead of ns for the timeout,
 473          * it prevents from overflows during calculation.
 474          */
 475         unsigned int us = DIV_ROUND_UP(ns, 1000);
 476
 477         /* Maximum clock frequency is host->bus_hz/2 */
 478         return us * (DIV_ROUND_UP(host->bus_hz, 2000000));
 479 }
 480
 481 static void atmci_set_timeout(struct atmel_mci *host,
 482                 struct atmel_mci_slot *slot, struct mmc_data *data)
 483 {
 484         static unsigned dtomul_to_shift[] = {
 485                 0, 4, 7, 8, 10, 12, 16, 20
 486         };
 487         unsigned        timeout;
 488         unsigned        dtocyc;
 489         unsigned        dtomul;
 490
 491         timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
 492
 493         for (dtomul = 0; dtomul < 8; dtomul++) {
 494                 unsigned shift = dtomul_to_shift[dtomul];
 495                 dtocyc = (timeout + (1 << shift) - 1) >> shift;
 496                 if (dtocyc < 15)
 497                         break;
 498         }
 499
 500         if (dtomul >= 8) {
 501                 dtomul = 7;
 502                 dtocyc = 15;
 503         }
 504
 505         dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
 506                         dtocyc << dtomul_to_shift[dtomul]);
 507         mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
 508 }
 509
 510 /*
 511  * Return mask with command flags to be enabled for this command.
 512  */
 513 static u32 atmci_prepare_command(struct mmc_host *mmc,
 514                                  struct mmc_command *cmd)
 515 {
 516         struct mmc_data *data;
 517         u32             cmdr;
 518
 519         cmd->error = -EINPROGRESS;
 520
 521         cmdr = MCI_CMDR_CMDNB(cmd->opcode);
 522
 523         if (cmd->flags & MMC_RSP_PRESENT) {
 524                 if (cmd->flags & MMC_RSP_136)
 525                         cmdr |= MCI_CMDR_RSPTYP_136BIT;
 526                 else
 527                         cmdr |= MCI_CMDR_RSPTYP_48BIT;
 528         }
 529
 530         /*
 531          * This should really be MAXLAT_5 for CMD2 and ACMD41, but
 532          * it's too difficult to determine whether this is an ACMD or
 533          * not. Better make it 64.
 534          */
 535         cmdr |= MCI_CMDR_MAXLAT_64CYC;
 536
 537         if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
 538                 cmdr |= MCI_CMDR_OPDCMD;
 539
 540         data = cmd->data;
 541         if (data) {
 542                 cmdr |= MCI_CMDR_START_XFER;
 543
 544                 if (cmd->opcode == SD_IO_RW_EXTENDED) {
 545                         cmdr |= MCI_CMDR_SDIO_BLOCK;
 546                 } else {
 547                         if (data->flags & MMC_DATA_STREAM)
 548                                 cmdr |= MCI_CMDR_STREAM;
 549                         else if (data->blocks > 1)
 550                                 cmdr |= MCI_CMDR_MULTI_BLOCK;
 551                         else
 552                                 cmdr |= MCI_CMDR_BLOCK;
 553                 }
 554
 555                 if (data->flags & MMC_DATA_READ)
 556                         cmdr |= MCI_CMDR_TRDIR_READ;
 557         }
 558
 559         return cmdr;
 560 }
 561
 562 static void atmci_start_command(struct atmel_mci *host,
 563                 struct mmc_command *cmd, u32 cmd_flags)
 564 {
 565         WARN_ON(host->cmd);
 566         host->cmd = cmd;
 567
 568         dev_vdbg(&host->pdev->dev,
 569                         "start command: ARGR=0x%08x CMDR=0x%08x\n",
 570                         cmd->arg, cmd_flags);
 571
 572         mci_writel(host, ARGR, cmd->arg);
 573         mci_writel(host, CMDR, cmd_flags);
 574 }
 575
 576 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
 577 {
 578         atmci_start_command(host, data->stop, host->stop_cmdr);
 579         mci_writel(host, IER, MCI_CMDRDY);
 580 }
 581
 582 #ifdef CONFIG_MMC_ATMELMCI_DMA
 583 static void atmci_dma_cleanup(struct atmel_mci *host)
 584 {
 585         struct mmc_data                 *data = host->data;
 586
 587         if (data)
 588                 dma_unmap_sg(host->dma.chan->device->dev,
 589                              data->sg, data->sg_len,
 590                              ((data->flags & MMC_DATA_WRITE)
 591                               ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
 592 }
 593
 594 static void atmci_stop_dma(struct atmel_mci *host)
 595 {
 596         struct dma_chan *chan = host->data_chan;
 597
 598         if (chan) {
 599                 dmaengine_terminate_all(chan);
 600                 atmci_dma_cleanup(host);
 601         } else {
 602                 /* Data transfer was stopped by the interrupt handler */
 603                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 604                 mci_writel(host, IER, MCI_NOTBUSY);
 605         }
 606 }
 607
 608 /* This function is called by the DMA driver from tasklet context. */
 609 static void atmci_dma_complete(void *arg)
 610 {
 611         struct atmel_mci        *host = arg;
 612         struct mmc_data         *data = host->data;
 613
 614         dev_vdbg(&host->pdev->dev, "DMA complete\n");
 615
 616         if (atmci_is_mci2())
 617                 /* Disable DMA hardware handshaking on MCI */
 618                 mci_writel(host, DMA, mci_readl(host, DMA) & ~MCI_DMAEN);
 619
 620         atmci_dma_cleanup(host);
 621
 622         /*
 623          * If the card was removed, data will be NULL. No point trying
 624          * to send the stop command or waiting for NBUSY in this case.
 625          */
 626         if (data) {
 627                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
 628                 tasklet_schedule(&host->tasklet);
 629
 630                 /*
 631                  * Regardless of what the documentation says, we have
 632                  * to wait for NOTBUSY even after block read
 633                  * operations.
 634                  *
 635                  * When the DMA transfer is complete, the controller
 636                  * may still be reading the CRC from the card, i.e.
 637                  * the data transfer is still in progress and we
 638                  * haven't seen all the potential error bits yet.
 639                  *
 640                  * The interrupt handler will schedule a different
 641                  * tasklet to finish things up when the data transfer
 642                  * is completely done.
 643                  *
 644                  * We may not complete the mmc request here anyway
 645                  * because the mmc layer may call back and cause us to
 646                  * violate the "don't submit new operations from the
 647                  * completion callback" rule of the dma engine
 648                  * framework.
 649                  */
 650                 mci_writel(host, IER, MCI_NOTBUSY);
 651         }
 652 }
 653
 654 static int
 655 atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
 656 {
 657         struct dma_chan                 *chan;
 658         struct dma_async_tx_descriptor  *desc;
 659         struct scatterlist              *sg;
 660         unsigned int                    i;
 661         enum dma_data_direction         direction;
 662         unsigned int                    sglen;
 663
 664         /*
 665          * We don't do DMA on "complex" transfers, i.e. with
 666          * non-word-aligned buffers or lengths. Also, we don't bother
 667          * with all the DMA setup overhead for short transfers.
 668          */
 669         if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
 670                 return -EINVAL;
 671         if (data->blksz & 3)
 672                 return -EINVAL;
 673
 674         for_each_sg(data->sg, sg, data->sg_len, i) {
 675                 if (sg->offset & 3 || sg->length & 3)
 676                         return -EINVAL;
 677         }
 678
 679         /* If we don't have a channel, we can't do DMA */
 680         chan = host->dma.chan;
 681         if (chan)
 682                 host->data_chan = chan;
 683
 684         if (!chan)
 685                 return -ENODEV;
 686
 687         if (atmci_is_mci2())
 688                 mci_writel(host, DMA, MCI_DMA_CHKSIZE(3) | MCI_DMAEN);
 689
 690         if (data->flags & MMC_DATA_READ)
 691                 direction = DMA_FROM_DEVICE;
 692         else
 693                 direction = DMA_TO_DEVICE;
 694
 695         sglen = dma_map_sg(chan->device->dev, data->sg,
 696                            data->sg_len, direction);
 697
 698         desc = chan->device->device_prep_slave_sg(chan,
 699                         data->sg, sglen, direction,
 700                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 701         if (!desc)
 702                 goto unmap_exit;
 703
 704         host->dma.data_desc = desc;
 705         desc->callback = atmci_dma_complete;
 706         desc->callback_param = host;
 707
 708         return 0;
 709 unmap_exit:
 710         dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction);
 711         return -ENOMEM;
 712 }
 713
 714 static void atmci_submit_data(struct atmel_mci *host)
 715 {
 716         struct dma_chan                 *chan = host->data_chan;
 717         struct dma_async_tx_descriptor  *desc = host->dma.data_desc;
 718
 719         if (chan) {
 720                 dmaengine_submit(desc);
 721                 dma_async_issue_pending(chan);
 722         }
 723 }
 724
 725 #else /* CONFIG_MMC_ATMELMCI_DMA */
 726
 727 static int atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
 728 {
 729         return -ENOSYS;
 730 }
 731
 732 static void atmci_submit_data(struct atmel_mci *host) {}
 733
 734 static void atmci_stop_dma(struct atmel_mci *host)
 735 {
 736         /* Data transfer was stopped by the interrupt handler */
 737         atmci_set_pending(host, EVENT_XFER_COMPLETE);
 738         mci_writel(host, IER, MCI_NOTBUSY);
 739 }
 740
 741 #endif /* CONFIG_MMC_ATMELMCI_DMA */
 742
 743 /*
 744  * Returns a mask of interrupt flags to be enabled after the whole
 745  * request has been prepared.
 746  */
 747 static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data)
 748 {
 749         u32 iflags;
 750
 751         data->error = -EINPROGRESS;
 752
 753         WARN_ON(host->data);
 754         host->sg = NULL;
 755         host->data = data;
 756
 757         iflags = ATMCI_DATA_ERROR_FLAGS;
 758         if (atmci_prepare_data_dma(host, data)) {
 759                 host->data_chan = NULL;
 760
 761                 /*
 762                  * Errata: MMC data write operation with less than 12
 763                  * bytes is impossible.
 764                  *
 765                  * Errata: MCI Transmit Data Register (TDR) FIFO
 766                  * corruption when length is not multiple of 4.
 767                  */
 768                 if (data->blocks * data->blksz < 12
 769                                 || (data->blocks * data->blksz) & 3)
 770                         host->need_reset = true;
 771
 772                 host->sg = data->sg;
 773                 host->pio_offset = 0;
 774                 if (data->flags & MMC_DATA_READ)
 775                         iflags |= MCI_RXRDY;
 776                 else
 777                         iflags |= MCI_TXRDY;
 778         }
 779
 780         return iflags;
 781 }
 782
 783 static void atmci_start_request(struct atmel_mci *host,
 784                 struct atmel_mci_slot *slot)
 785 {
 786         struct mmc_request      *mrq;
 787         struct mmc_command      *cmd;
 788         struct mmc_data         *data;
 789         u32                     iflags;
 790         u32                     cmdflags;
 791
 792         mrq = slot->mrq;
 793         host->cur_slot = slot;
 794         host->mrq = mrq;
 795
 796         host->pending_events = 0;
 797         host->completed_events = 0;
 798         host->data_status = 0;
 799
 800         if (host->need_reset) {
 801                 mci_writel(host, CR, MCI_CR_SWRST);
 802                 mci_writel(host, CR, MCI_CR_MCIEN);
 803                 mci_writel(host, MR, host->mode_reg);
 804                 if (atmci_is_mci2())
 805                         mci_writel(host, CFG, host->cfg_reg);
 806                 host->need_reset = false;
 807         }
 808         mci_writel(host, SDCR, slot->sdc_reg);
 809
 810         iflags = mci_readl(host, IMR);
 811         if (iflags & ~(MCI_SDIOIRQA | MCI_SDIOIRQB))
 812                 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
 813                                 iflags);
 814
 815         if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
 816                 /* Send init sequence (74 clock cycles) */
 817                 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
 818                 while (!(mci_readl(host, SR) & MCI_CMDRDY))
 819                         cpu_relax();
 820         }
 821         iflags = 0;
 822         data = mrq->data;
 823         if (data) {
 824                 atmci_set_timeout(host, slot, data);
 825
 826                 /* Must set block count/size before sending command */
 827                 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
 828                                 | MCI_BLKLEN(data->blksz));
 829                 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
 830                         MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
 831
 832                 iflags |= atmci_prepare_data(host, data);
 833         }
 834
 835         iflags |= MCI_CMDRDY;
 836         cmd = mrq->cmd;
 837         cmdflags = atmci_prepare_command(slot->mmc, cmd);
 838         atmci_start_command(host, cmd, cmdflags);
 839
 840         if (data)
 841                 atmci_submit_data(host);
 842
 843         if (mrq->stop) {
 844                 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
 845                 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
 846                 if (!(data->flags & MMC_DATA_WRITE))
 847                         host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
 848                 if (data->flags & MMC_DATA_STREAM)
 849                         host->stop_cmdr |= MCI_CMDR_STREAM;
 850                 else
 851                         host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
 852         }
 853
 854         /*
 855          * We could have enabled interrupts earlier, but I suspect
 856          * that would open up a nice can of interesting race
 857          * conditions (e.g. command and data complete, but stop not
 858          * prepared yet.)
 859          */
 860         mci_writel(host, IER, iflags);
 861 }
 862
 863 static void atmci_queue_request(struct atmel_mci *host,
 864                 struct atmel_mci_slot *slot, struct mmc_request *mrq)
 865 {
 866         dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
 867                         host->state);
 868
 869         spin_lock_bh(&host->lock);
 870         slot->mrq = mrq;
 871         if (host->state == STATE_IDLE) {
 872                 host->state = STATE_SENDING_CMD;
 873                 atmci_start_request(host, slot);
 874         } else {
 875                 list_add_tail(&slot->queue_node, &host->queue);
 876         }
 877         spin_unlock_bh(&host->lock);
 878 }
 879
 880 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 881 {
 882         struct atmel_mci_slot   *slot = mmc_priv(mmc);
 883         struct atmel_mci        *host = slot->host;
 884         struct mmc_data         *data;
 885
 886         WARN_ON(slot->mrq);
 887
 888         /*
 889          * We may "know" the card is gone even though there's still an
 890          * electrical connection. If so, we really need to communicate
 891          * this to the MMC core since there won't be any more
 892          * interrupts as the card is completely removed. Otherwise,
 893          * the MMC core might believe the card is still there even
 894          * though the card was just removed very slowly.
 895          */
 896         if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
 897                 mrq->cmd->error = -ENOMEDIUM;
 898                 mmc_request_done(mmc, mrq);
 899                 return;
 900         }
 901
 902         /* We don't support multiple blocks of weird lengths. */
 903         data = mrq->data;
 904         if (data && data->blocks > 1 && data->blksz & 3) {
 905                 mrq->cmd->error = -EINVAL;
 906                 mmc_request_done(mmc, mrq);
 907         }
 908
 909         atmci_queue_request(host, slot, mrq);
 910 }
 911
 912 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 913 {
 914         struct atmel_mci_slot   *slot = mmc_priv(mmc);
 915         struct atmel_mci        *host = slot->host;
 916         unsigned int            i;
 917
 918         slot->sdc_reg &= ~MCI_SDCBUS_MASK;
 919         switch (ios->bus_width) {
 920         case MMC_BUS_WIDTH_1:
 921                 slot->sdc_reg |= MCI_SDCBUS_1BIT;
 922                 break;
 923         case MMC_BUS_WIDTH_4:
 924                 slot->sdc_reg |= MCI_SDCBUS_4BIT;
 925                 break;
 926         }
 927
 928         if (ios->clock) {
 929                 unsigned int clock_min = ~0U;
 930                 u32 clkdiv;
 931
 932                 spin_lock_bh(&host->lock);
 933                 if (!host->mode_reg) {
 934                         clk_enable(host->mck);
 935                         mci_writel(host, CR, MCI_CR_SWRST);
 936                         mci_writel(host, CR, MCI_CR_MCIEN);
 937                         if (atmci_is_mci2())
 938                                 mci_writel(host, CFG, host->cfg_reg);
 939                 }
 940
 941                 /*
 942                  * Use mirror of ios->clock to prevent race with mmc
 943                  * core ios update when finding the minimum.
 944                  */
 945                 slot->clock = ios->clock;
 946                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
 947                         if (host->slot[i] && host->slot[i]->clock
 948                                         && host->slot[i]->clock < clock_min)
 949                                 clock_min = host->slot[i]->clock;
 950                 }
 951
 952                 /* Calculate clock divider */
 953                 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
 954                 if (clkdiv > 255) {
 955                         dev_warn(&mmc->class_dev,
 956                                 "clock %u too slow; using %lu\n",
 957                                 clock_min, host->bus_hz / (2 * 256));
 958                         clkdiv = 255;
 959                 }
 960
 961                 host->mode_reg = MCI_MR_CLKDIV(clkdiv);
 962
 963                 /*
 964                  * WRPROOF and RDPROOF prevent overruns/underruns by
 965                  * stopping the clock when the FIFO is full/empty.
 966                  * This state is not expected to last for long.
 967                  */
 968                 if (mci_has_rwproof())
 969                         host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF);
 970
 971                 if (atmci_is_mci2()) {
 972                         /* setup High Speed mode in relation with card capacity */
 973                         if (ios->timing == MMC_TIMING_SD_HS)
 974                                 host->cfg_reg |= MCI_CFG_HSMODE;
 975                         else
 976                                 host->cfg_reg &= ~MCI_CFG_HSMODE;
 977                 }
 978
 979                 if (list_empty(&host->queue)) {
 980                         mci_writel(host, MR, host->mode_reg);
 981                         if (atmci_is_mci2())
 982                                 mci_writel(host, CFG, host->cfg_reg);
 983                 } else {
 984                         host->need_clock_update = true;
 985                 }
 986
 987                 spin_unlock_bh(&host->lock);
 988         } else {
 989                 bool any_slot_active = false;
 990
 991                 spin_lock_bh(&host->lock);
 992                 slot->clock = 0;
 993                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
 994                         if (host->slot[i] && host->slot[i]->clock) {
 995                                 any_slot_active = true;
 996                                 break;
 997                         }
 998                 }
 999                 if (!any_slot_active) {
1000                         mci_writel(host, CR, MCI_CR_MCIDIS);
1001                         if (host->mode_reg) {
1002                                 mci_readl(host, MR);
1003                                 clk_disable(host->mck);
1004                         }
1005                         host->mode_reg = 0;
1006                 }
1007                 spin_unlock_bh(&host->lock);
1008         }
1009
1010         switch (ios->power_mode) {
1011         case MMC_POWER_UP:
1012                 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
1013                 break;
1014         default:
1015                 /*
1016                  * TODO: None of the currently available AVR32-based
1017                  * boards allow MMC power to be turned off. Implement
1018                  * power control when this can be tested properly.
1019                  *
1020                  * We also need to hook this into the clock management
1021                  * somehow so that newly inserted cards aren't
1022                  * subjected to a fast clock before we have a chance
1023                  * to figure out what the maximum rate is. Currently,
1024                  * there's no way to avoid this, and there never will
1025                  * be for boards that don't support power control.
1026                  */
1027                 break;
1028         }
1029 }
1030
1031 static int atmci_get_ro(struct mmc_host *mmc)
1032 {
1033         int                     read_only = -ENOSYS;
1034         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1035
1036         if (gpio_is_valid(slot->wp_pin)) {
1037                 read_only = gpio_get_value(slot->wp_pin);
1038                 dev_dbg(&mmc->class_dev, "card is %s\n",
1039                                 read_only ? "read-only" : "read-write");
1040         }
1041
1042         return read_only;
1043 }
1044
1045 static int atmci_get_cd(struct mmc_host *mmc)
1046 {
1047         int                     present = -ENOSYS;
1048         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1049
1050         if (gpio_is_valid(slot->detect_pin)) {
1051                 present = !(gpio_get_value(slot->detect_pin) ^
1052                             slot->detect_is_active_high);
1053                 dev_dbg(&mmc->class_dev, "card is %spresent\n",
1054                                 present ? "" : "not ");
1055         }
1056
1057         return present;
1058 }
1059
1060 static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1061 {
1062         struct atmel_mci_slot   *slot = mmc_priv(mmc);
1063         struct atmel_mci        *host = slot->host;
1064
1065         if (enable)
1066                 mci_writel(host, IER, slot->sdio_irq);
1067         else
1068                 mci_writel(host, IDR, slot->sdio_irq);
1069 }
1070
1071 static const struct mmc_host_ops atmci_ops = {
1072         .request        = atmci_request,
1073         .set_ios        = atmci_set_ios,
1074         .get_ro         = atmci_get_ro,
1075         .get_cd         = atmci_get_cd,
1076         .enable_sdio_irq = atmci_enable_sdio_irq,
1077 };
1078
1079 /* Called with host->lock held */
1080 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1081         __releases(&host->lock)
1082         __acquires(&host->lock)
1083 {
1084         struct atmel_mci_slot   *slot = NULL;
1085         struct mmc_host         *prev_mmc = host->cur_slot->mmc;
1086
1087         WARN_ON(host->cmd || host->data);
1088
1089         /*
1090          * Update the MMC clock rate if necessary. This may be
1091          * necessary if set_ios() is called when a different slot is
1092          * busy transferring data.
1093          */
1094         if (host->need_clock_update) {
1095                 mci_writel(host, MR, host->mode_reg);
1096                 if (atmci_is_mci2())
1097                         mci_writel(host, CFG, host->cfg_reg);
1098         }
1099
1100         host->cur_slot->mrq = NULL;
1101         host->mrq = NULL;
1102         if (!list_empty(&host->queue)) {
1103                 slot = list_entry(host->queue.next,
1104                                 struct atmel_mci_slot, queue_node);
1105                 list_del(&slot->queue_node);
1106                 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1107                                 mmc_hostname(slot->mmc));
1108                 host->state = STATE_SENDING_CMD;
1109                 atmci_start_request(host, slot);
1110         } else {
1111                 dev_vdbg(&host->pdev->dev, "list empty\n");
1112                 host->state = STATE_IDLE;
1113         }
1114
1115         spin_unlock(&host->lock);
1116         mmc_request_done(prev_mmc, mrq);
1117         spin_lock(&host->lock);
1118 }
1119
1120 static void atmci_command_complete(struct atmel_mci *host,
1121                         struct mmc_command *cmd)
1122 {
1123         u32             status = host->cmd_status;
1124
1125         /* Read the response from the card (up to 16 bytes) */
1126         cmd->resp[0] = mci_readl(host, RSPR);
1127         cmd->resp[1] = mci_readl(host, RSPR);
1128         cmd->resp[2] = mci_readl(host, RSPR);
1129         cmd->resp[3] = mci_readl(host, RSPR);
1130
1131         if (status & MCI_RTOE)
1132                 cmd->error = -ETIMEDOUT;
1133         else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
1134                 cmd->error = -EILSEQ;
1135         else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
1136                 cmd->error = -EIO;
1137         else
1138                 cmd->error = 0;
1139
1140         if (cmd->error) {
1141                 dev_dbg(&host->pdev->dev,
1142                         "command error: status=0x%08x\n", status);
1143
1144                 if (cmd->data) {
1145                         atmci_stop_dma(host);
1146                         host->data = NULL;
1147                         mci_writel(host, IDR, MCI_NOTBUSY
1148                                         | MCI_TXRDY | MCI_RXRDY
1149                                         | ATMCI_DATA_ERROR_FLAGS);
1150                 }
1151         }
1152 }
1153
1154 static void atmci_detect_change(unsigned long data)
1155 {
1156         struct atmel_mci_slot   *slot = (struct atmel_mci_slot *)data;
1157         bool                    present;
1158         bool                    present_old;
1159
1160         /*
1161          * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1162          * freeing the interrupt. We must not re-enable the interrupt
1163          * if it has been freed, and if we're shutting down, it
1164          * doesn't really matter whether the card is present or not.
1165          */
1166         smp_rmb();
1167         if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1168                 return;
1169
1170         enable_irq(gpio_to_irq(slot->detect_pin));
1171         present = !(gpio_get_value(slot->detect_pin) ^
1172                     slot->detect_is_active_high);
1173         present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1174
1175         dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1176                         present, present_old);
1177
1178         if (present != present_old) {
1179                 struct atmel_mci        *host = slot->host;
1180                 struct mmc_request      *mrq;
1181
1182                 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1183                         present ? "inserted" : "removed");
1184
1185                 spin_lock(&host->lock);
1186
1187                 if (!present)
1188                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1189                 else
1190                         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1191
1192                 /* Clean up queue if present */
1193                 mrq = slot->mrq;
1194                 if (mrq) {
1195                         if (mrq == host->mrq) {
1196                                 /*
1197                                  * Reset controller to terminate any ongoing
1198                                  * commands or data transfers.
1199                                  */
1200                                 mci_writel(host, CR, MCI_CR_SWRST);
1201                                 mci_writel(host, CR, MCI_CR_MCIEN);
1202                                 mci_writel(host, MR, host->mode_reg);
1203                                 if (atmci_is_mci2())
1204                                         mci_writel(host, CFG, host->cfg_reg);
1205
1206                                 host->data = NULL;
1207                                 host->cmd = NULL;
1208
1209                                 switch (host->state) {
1210                                 case STATE_IDLE:
1211                                         break;
1212                                 case STATE_SENDING_CMD:
1213                                         mrq->cmd->error = -ENOMEDIUM;
1214                                         if (!mrq->data)
1215                                                 break;
1216                                         /* fall through */
1217                                 case STATE_SENDING_DATA:
1218                                         mrq->data->error = -ENOMEDIUM;
1219                                         atmci_stop_dma(host);
1220                                         break;
1221                                 case STATE_DATA_BUSY:
1222                                 case STATE_DATA_ERROR:
1223                                         if (mrq->data->error == -EINPROGRESS)
1224                                                 mrq->data->error = -ENOMEDIUM;
1225                                         if (!mrq->stop)
1226                                                 break;
1227                                         /* fall through */
1228                                 case STATE_SENDING_STOP:
1229                                         mrq->stop->error = -ENOMEDIUM;
1230                                         break;
1231                                 }
1232
1233                                 atmci_request_end(host, mrq);
1234                         } else {
1235                                 list_del(&slot->queue_node);
1236                                 mrq->cmd->error = -ENOMEDIUM;
1237                                 if (mrq->data)
1238                                         mrq->data->error = -ENOMEDIUM;
1239                                 if (mrq->stop)
1240                                         mrq->stop->error = -ENOMEDIUM;
1241
1242                                 spin_unlock(&host->lock);
1243                                 mmc_request_done(slot->mmc, mrq);
1244                                 spin_lock(&host->lock);
1245                         }
1246                 }
1247                 spin_unlock(&host->lock);
1248
1249                 mmc_detect_change(slot->mmc, 0);
1250         }
1251 }
1252
1253 static void atmci_tasklet_func(unsigned long priv)
1254 {
1255         struct atmel_mci        *host = (struct atmel_mci *)priv;
1256         struct mmc_request      *mrq = host->mrq;
1257         struct mmc_data         *data = host->data;
1258         struct mmc_command      *cmd = host->cmd;
1259         enum atmel_mci_state    state = host->state;
1260         enum atmel_mci_state    prev_state;
1261         u32                     status;
1262
1263         spin_lock(&host->lock);
1264
1265         state = host->state;
1266
1267         dev_vdbg(&host->pdev->dev,
1268                 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1269                 state, host->pending_events, host->completed_events,
1270                 mci_readl(host, IMR));
1271
1272         do {
1273                 prev_state = state;
1274
1275                 switch (state) {
1276                 case STATE_IDLE:
1277                         break;
1278
1279                 case STATE_SENDING_CMD:
1280                         if (!atmci_test_and_clear_pending(host,
1281                                                 EVENT_CMD_COMPLETE))
1282                                 break;
1283
1284                         host->cmd = NULL;
1285                         atmci_set_completed(host, EVENT_CMD_COMPLETE);
1286                         atmci_command_complete(host, mrq->cmd);
1287                         if (!mrq->data || cmd->error) {
1288                                 atmci_request_end(host, host->mrq);
1289                                 goto unlock;
1290                         }
1291
1292                         prev_state = state = STATE_SENDING_DATA;
1293                         /* fall through */
1294
1295                 case STATE_SENDING_DATA:
1296                         if (atmci_test_and_clear_pending(host,
1297                                                 EVENT_DATA_ERROR)) {
1298                                 atmci_stop_dma(host);
1299                                 if (data->stop)
1300                                         send_stop_cmd(host, data);
1301                                 state = STATE_DATA_ERROR;
1302                                 break;
1303                         }
1304
1305                         if (!atmci_test_and_clear_pending(host,
1306                                                 EVENT_XFER_COMPLETE))
1307                                 break;
1308
1309                         atmci_set_completed(host, EVENT_XFER_COMPLETE);
1310                         prev_state = state = STATE_DATA_BUSY;
1311                         /* fall through */
1312
1313                 case STATE_DATA_BUSY:
1314                         if (!atmci_test_and_clear_pending(host,
1315                                                 EVENT_DATA_COMPLETE))
1316                                 break;
1317
1318                         host->data = NULL;
1319                         atmci_set_completed(host, EVENT_DATA_COMPLETE);
1320                         status = host->data_status;
1321                         if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1322                                 if (status & MCI_DTOE) {
1323                                         dev_dbg(&host->pdev->dev,
1324                                                         "data timeout error\n");
1325                                         data->error = -ETIMEDOUT;
1326                                 } else if (status & MCI_DCRCE) {
1327                                         dev_dbg(&host->pdev->dev,
1328                                                         "data CRC error\n");
1329                                         data->error = -EILSEQ;
1330                                 } else {
1331                                         dev_dbg(&host->pdev->dev,
1332                                                 "data FIFO error (status=%08x)\n",
1333                                                 status);
1334                                         data->error = -EIO;
1335                                 }
1336                         } else {
1337                                 data->bytes_xfered = data->blocks * data->blksz;
1338                                 data->error = 0;
1339                                 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS);
1340                         }
1341
1342                         if (!data->stop) {
1343                                 atmci_request_end(host, host->mrq);
1344                                 goto unlock;
1345                         }
1346
1347                         prev_state = state = STATE_SENDING_STOP;
1348                         if (!data->error)
1349                                 send_stop_cmd(host, data);
1350                         /* fall through */
1351
1352                 case STATE_SENDING_STOP:
1353                         if (!atmci_test_and_clear_pending(host,
1354                                                 EVENT_CMD_COMPLETE))
1355                                 break;
1356
1357                         host->cmd = NULL;
1358                         atmci_command_complete(host, mrq->stop);
1359                         atmci_request_end(host, host->mrq);
1360                         goto unlock;
1361
1362                 case STATE_DATA_ERROR:
1363                         if (!atmci_test_and_clear_pending(host,
1364                                                 EVENT_XFER_COMPLETE))
1365                                 break;
1366
1367                         state = STATE_DATA_BUSY;
1368                         break;
1369                 }
1370         } while (state != prev_state);
1371
1372         host->state = state;
1373
1374 unlock:
1375         spin_unlock(&host->lock);
1376 }
1377
1378 static void atmci_read_data_pio(struct atmel_mci *host)
1379 {
1380         struct scatterlist      *sg = host->sg;
1381         void                    *buf = sg_virt(sg);
1382         unsigned int            offset = host->pio_offset;
1383         struct mmc_data         *data = host->data;
1384         u32                     value;
1385         u32                     status;
1386         unsigned int            nbytes = 0;
1387
1388         do {
1389                 value = mci_readl(host, RDR);
1390                 if (likely(offset + 4 <= sg->length)) {
1391                         put_unaligned(value, (u32 *)(buf + offset));
1392
1393                         offset += 4;
1394                         nbytes += 4;
1395
1396                         if (offset == sg->length) {
1397                                 flush_dcache_page(sg_page(sg));
1398                                 host->sg = sg = sg_next(sg);
1399                                 if (!sg)
1400                                         goto done;
1401
1402                                 offset = 0;
1403                                 buf = sg_virt(sg);
1404                         }
1405                 } else {
1406                         unsigned int remaining = sg->length - offset;
1407                         memcpy(buf + offset, &value, remaining);
1408                         nbytes += remaining;
1409
1410                         flush_dcache_page(sg_page(sg));
1411                         host->sg = sg = sg_next(sg);
1412                         if (!sg)
1413                                 goto done;
1414
1415                         offset = 4 - remaining;
1416                         buf = sg_virt(sg);
1417                         memcpy(buf, (u8 *)&value + remaining, offset);
1418                         nbytes += offset;
1419                 }
1420
1421                 status = mci_readl(host, SR);
1422                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1423                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1424                                                 | ATMCI_DATA_ERROR_FLAGS));
1425                         host->data_status = status;
1426                         data->bytes_xfered += nbytes;
1427                         smp_wmb();
1428                         atmci_set_pending(host, EVENT_DATA_ERROR);
1429                         tasklet_schedule(&host->tasklet);
1430                         return;
1431                 }
1432         } while (status & MCI_RXRDY);
1433
1434         host->pio_offset = offset;
1435         data->bytes_xfered += nbytes;
1436
1437         return;
1438
1439 done:
1440         mci_writel(host, IDR, MCI_RXRDY);
1441         mci_writel(host, IER, MCI_NOTBUSY);
1442         data->bytes_xfered += nbytes;
1443         smp_wmb();
1444         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1445 }
1446
1447 static void atmci_write_data_pio(struct atmel_mci *host)
1448 {
1449         struct scatterlist      *sg = host->sg;
1450         void                    *buf = sg_virt(sg);
1451         unsigned int            offset = host->pio_offset;
1452         struct mmc_data         *data = host->data;
1453         u32                     value;
1454         u32                     status;
1455         unsigned int            nbytes = 0;
1456
1457         do {
1458                 if (likely(offset + 4 <= sg->length)) {
1459                         value = get_unaligned((u32 *)(buf + offset));
1460                         mci_writel(host, TDR, value);
1461
1462                         offset += 4;
1463                         nbytes += 4;
1464                         if (offset == sg->length) {
1465                                 host->sg = sg = sg_next(sg);
1466                                 if (!sg)
1467                                         goto done;
1468
1469                                 offset = 0;
1470                                 buf = sg_virt(sg);
1471                         }
1472                 } else {
1473                         unsigned int remaining = sg->length - offset;
1474
1475                         value = 0;
1476                         memcpy(&value, buf + offset, remaining);
1477                         nbytes += remaining;
1478
1479                         host->sg = sg = sg_next(sg);
1480                         if (!sg) {
1481                                 mci_writel(host, TDR, value);
1482                                 goto done;
1483                         }
1484
1485                         offset = 4 - remaining;
1486                         buf = sg_virt(sg);
1487                         memcpy((u8 *)&value + remaining, buf, offset);
1488                         mci_writel(host, TDR, value);
1489                         nbytes += offset;
1490                 }
1491
1492                 status = mci_readl(host, SR);
1493                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1494                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1495                                                 | ATMCI_DATA_ERROR_FLAGS));
1496                         host->data_status = status;
1497                         data->bytes_xfered += nbytes;
1498                         smp_wmb();
1499                         atmci_set_pending(host, EVENT_DATA_ERROR);
1500                         tasklet_schedule(&host->tasklet);
1501                         return;
1502                 }
1503         } while (status & MCI_TXRDY);
1504
1505         host->pio_offset = offset;
1506         data->bytes_xfered += nbytes;
1507
1508         return;
1509
1510 done:
1511         mci_writel(host, IDR, MCI_TXRDY);
1512         mci_writel(host, IER, MCI_NOTBUSY);
1513         data->bytes_xfered += nbytes;
1514         smp_wmb();
1515         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1516 }
1517
1518 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1519 {
1520         mci_writel(host, IDR, MCI_CMDRDY);
1521
1522         host->cmd_status = status;
1523         smp_wmb();
1524         atmci_set_pending(host, EVENT_CMD_COMPLETE);
1525         tasklet_schedule(&host->tasklet);
1526 }
1527
1528 static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status)
1529 {
1530         int     i;
1531
1532         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1533                 struct atmel_mci_slot *slot = host->slot[i];
1534                 if (slot && (status & slot->sdio_irq)) {
1535                         mmc_signal_sdio_irq(slot->mmc);
1536                 }
1537         }
1538 }
1539
1540
1541 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1542 {
1543         struct atmel_mci        *host = dev_id;
1544         u32                     status, mask, pending;
1545         unsigned int            pass_count = 0;
1546
1547         do {
1548                 status = mci_readl(host, SR);
1549                 mask = mci_readl(host, IMR);
1550                 pending = status & mask;
1551                 if (!pending)
1552                         break;
1553
1554                 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1555                         mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1556                                         | MCI_RXRDY | MCI_TXRDY);
1557                         pending &= mci_readl(host, IMR);
1558
1559                         host->data_status = status;
1560                         smp_wmb();
1561                         atmci_set_pending(host, EVENT_DATA_ERROR);
1562                         tasklet_schedule(&host->tasklet);
1563                 }
1564                 if (pending & MCI_NOTBUSY) {
1565                         mci_writel(host, IDR,
1566                                         ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1567                         if (!host->data_status)
1568                                 host->data_status = status;
1569                         smp_wmb();
1570                         atmci_set_pending(host, EVENT_DATA_COMPLETE);
1571                         tasklet_schedule(&host->tasklet);
1572                 }
1573                 if (pending & MCI_RXRDY)
1574                         atmci_read_data_pio(host);
1575                 if (pending & MCI_TXRDY)
1576                         atmci_write_data_pio(host);
1577
1578                 if (pending & MCI_CMDRDY)
1579                         atmci_cmd_interrupt(host, status);
1580
1581                 if (pending & (MCI_SDIOIRQA | MCI_SDIOIRQB))
1582                         atmci_sdio_interrupt(host, status);
1583
1584         } while (pass_count++ < 5);
1585
1586         return pass_count ? IRQ_HANDLED : IRQ_NONE;
1587 }
1588
1589 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1590 {
1591         struct atmel_mci_slot   *slot = dev_id;
1592
1593         /*
1594          * Disable interrupts until the pin has stabilized and check
1595          * the state then. Use mod_timer() since we may be in the
1596          * middle of the timer routine when this interrupt triggers.
1597          */
1598         disable_irq_nosync(irq);
1599         mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1600
1601         return IRQ_HANDLED;
1602 }
1603
1604 static int __init atmci_init_slot(struct atmel_mci *host,
1605                 struct mci_slot_pdata *slot_data, unsigned int id,
1606                 u32 sdc_reg, u32 sdio_irq)
1607 {
1608         struct mmc_host                 *mmc;
1609         struct atmel_mci_slot           *slot;
1610
1611         mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1612         if (!mmc)
1613                 return -ENOMEM;
1614
1615         slot = mmc_priv(mmc);
1616         slot->mmc = mmc;
1617         slot->host = host;
1618         slot->detect_pin = slot_data->detect_pin;
1619         slot->wp_pin = slot_data->wp_pin;
1620         slot->detect_is_active_high = slot_data->detect_is_active_high;
1621         slot->sdc_reg = sdc_reg;
1622         slot->sdio_irq = sdio_irq;
1623
1624         mmc->ops = &atmci_ops;
1625         mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1626         mmc->f_max = host->bus_hz / 2;
1627         mmc->ocr_avail  = MMC_VDD_32_33 | MMC_VDD_33_34;
1628         if (sdio_irq)
1629                 mmc->caps |= MMC_CAP_SDIO_IRQ;
1630         if (atmci_is_mci2())
1631                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1632         if (slot_data->bus_width >= 4)
1633                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1634
1635         mmc->max_segs = 64;
1636         mmc->max_req_size = 32768 * 512;
1637         mmc->max_blk_size = 32768;
1638         mmc->max_blk_count = 512;
1639
1640         /* Assume card is present initially */
1641         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1642         if (gpio_is_valid(slot->detect_pin)) {
1643                 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1644                         dev_dbg(&mmc->class_dev, "no detect pin available\n");
1645                         slot->detect_pin = -EBUSY;
1646                 } else if (gpio_get_value(slot->detect_pin) ^
1647                                 slot->detect_is_active_high) {
1648                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1649                 }
1650         }
1651
1652         if (!gpio_is_valid(slot->detect_pin))
1653                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1654
1655         if (gpio_is_valid(slot->wp_pin)) {
1656                 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1657                         dev_dbg(&mmc->class_dev, "no WP pin available\n");
1658                         slot->wp_pin = -EBUSY;
1659                 }
1660         }
1661
1662         host->slot[id] = slot;
1663         mmc_add_host(mmc);
1664
1665         if (gpio_is_valid(slot->detect_pin)) {
1666                 int ret;
1667
1668                 setup_timer(&slot->detect_timer, atmci_detect_change,
1669                                 (unsigned long)slot);
1670
1671                 ret = request_irq(gpio_to_irq(slot->detect_pin),
1672                                 atmci_detect_interrupt,
1673                                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1674                                 "mmc-detect", slot);
1675                 if (ret) {
1676                         dev_dbg(&mmc->class_dev,
1677                                 "could not request IRQ %d for detect pin\n",
1678                                 gpio_to_irq(slot->detect_pin));
1679                         gpio_free(slot->detect_pin);
1680                         slot->detect_pin = -EBUSY;
1681                 }
1682         }
1683
1684         atmci_init_debugfs(slot);
1685
1686         return 0;
1687 }
1688
1689 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1690                 unsigned int id)
1691 {
1692         /* Debugfs stuff is cleaned up by mmc core */
1693
1694         set_bit(ATMCI_SHUTDOWN, &slot->flags);
1695         smp_wmb();
1696
1697         mmc_remove_host(slot->mmc);
1698
1699         if (gpio_is_valid(slot->detect_pin)) {
1700                 int pin = slot->detect_pin;
1701
1702                 free_irq(gpio_to_irq(pin), slot);
1703                 del_timer_sync(&slot->detect_timer);
1704                 gpio_free(pin);
1705         }
1706         if (gpio_is_valid(slot->wp_pin))
1707                 gpio_free(slot->wp_pin);
1708
1709         slot->host->slot[id] = NULL;
1710         mmc_free_host(slot->mmc);
1711 }
1712
1713 #ifdef CONFIG_MMC_ATMELMCI_DMA
1714 static bool filter(struct dma_chan *chan, void *slave)
1715 {
1716         struct mci_dma_data     *sl = slave;
1717
1718         if (sl && find_slave_dev(sl) == chan->device->dev) {
1719                 chan->private = slave_data_ptr(sl);
1720                 return true;
1721         } else {
1722                 return false;
1723         }
1724 }
1725
1726 static void atmci_configure_dma(struct atmel_mci *host)
1727 {
1728         struct mci_platform_data        *pdata;
1729
1730         if (host == NULL)
1731                 return;
1732
1733         pdata = host->pdev->dev.platform_data;
1734
1735         if (pdata && find_slave_dev(pdata->dma_slave)) {
1736                 dma_cap_mask_t mask;
1737
1738                 setup_dma_addr(pdata->dma_slave,
1739                                host->mapbase + MCI_TDR,
1740                                host->mapbase + MCI_RDR);
1741
1742                 /* Try to grab a DMA channel */
1743                 dma_cap_zero(mask);
1744                 dma_cap_set(DMA_SLAVE, mask);
1745                 host->dma.chan =
1746                         dma_request_channel(mask, filter, pdata->dma_slave);
1747         }
1748         if (!host->dma.chan)
1749                 dev_notice(&host->pdev->dev, "DMA not available, using PIO\n");
1750         else
1751                 dev_info(&host->pdev->dev,
1752                                         "Using %s for DMA transfers\n",
1753                                         dma_chan_name(host->dma.chan));
1754 }
1755 #else
1756 static void atmci_configure_dma(struct atmel_mci *host) {}
1757 #endif
1758
1759 static int __init atmci_probe(struct platform_device *pdev)
1760 {
1761         struct mci_platform_data        *pdata;
1762         struct atmel_mci                *host;
1763         struct resource                 *regs;
1764         unsigned int                    nr_slots;
1765         int                             irq;
1766         int                             ret;
1767
1768         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1769         if (!regs)
1770                 return -ENXIO;
1771         pdata = pdev->dev.platform_data;
1772         if (!pdata)
1773                 return -ENXIO;
1774         irq = platform_get_irq(pdev, 0);
1775         if (irq < 0)
1776                 return irq;
1777
1778         host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1779         if (!host)
1780                 return -ENOMEM;
1781
1782         host->pdev = pdev;
1783         spin_lock_init(&host->lock);
1784         INIT_LIST_HEAD(&host->queue);
1785
1786         host->mck = clk_get(&pdev->dev, "mci_clk");
1787         if (IS_ERR(host->mck)) {
1788                 ret = PTR_ERR(host->mck);
1789                 goto err_clk_get;
1790         }
1791
1792         ret = -ENOMEM;
1793         host->regs = ioremap(regs->start, resource_size(regs));
1794         if (!host->regs)
1795                 goto err_ioremap;
1796
1797         clk_enable(host->mck);
1798         mci_writel(host, CR, MCI_CR_SWRST);
1799         host->bus_hz = clk_get_rate(host->mck);
1800         clk_disable(host->mck);
1801
1802         host->mapbase = regs->start;
1803
1804         tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1805
1806         ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
1807         if (ret)
1808                 goto err_request_irq;
1809
1810         atmci_configure_dma(host);
1811
1812         platform_set_drvdata(pdev, host);
1813
1814         /* We need at least one slot to succeed */
1815         nr_slots = 0;
1816         ret = -ENODEV;
1817         if (pdata->slot[0].bus_width) {
1818                 ret = atmci_init_slot(host, &pdata->slot[0],
1819                                 0, MCI_SDCSEL_SLOT_A, MCI_SDIOIRQA);
1820                 if (!ret)
1821                         nr_slots++;
1822         }
1823         if (pdata->slot[1].bus_width) {
1824                 ret = atmci_init_slot(host, &pdata->slot[1],
1825                                 1, MCI_SDCSEL_SLOT_B, MCI_SDIOIRQB);
1826                 if (!ret)
1827                         nr_slots++;
1828         }
1829
1830         if (!nr_slots) {
1831                 dev_err(&pdev->dev, "init failed: no slot defined\n");
1832                 goto err_init_slot;
1833         }
1834
1835         dev_info(&pdev->dev,
1836                         "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1837                         host->mapbase, irq, nr_slots);
1838
1839         return 0;
1840
1841 err_init_slot:
1842 #ifdef CONFIG_MMC_ATMELMCI_DMA
1843         if (host->dma.chan)
1844                 dma_release_channel(host->dma.chan);
1845 #endif
1846         free_irq(irq, host);
1847 err_request_irq:
1848         iounmap(host->regs);
1849 err_ioremap:
1850         clk_put(host->mck);
1851 err_clk_get:
1852         kfree(host);
1853         return ret;
1854 }
1855
1856 static int __exit atmci_remove(struct platform_device *pdev)
1857 {
1858         struct atmel_mci        *host = platform_get_drvdata(pdev);
1859         unsigned int            i;
1860
1861         platform_set_drvdata(pdev, NULL);
1862
1863         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1864                 if (host->slot[i])
1865                         atmci_cleanup_slot(host->slot[i], i);
1866         }
1867
1868         clk_enable(host->mck);
1869         mci_writel(host, IDR, ~0UL);
1870         mci_writel(host, CR, MCI_CR_MCIDIS);
1871         mci_readl(host, SR);
1872         clk_disable(host->mck);
1873
1874 #ifdef CONFIG_MMC_ATMELMCI_DMA
1875         if (host->dma.chan)
1876                 dma_release_channel(host->dma.chan);
1877 #endif
1878
1879         free_irq(platform_get_irq(pdev, 0), host);
1880         iounmap(host->regs);
1881
1882         clk_put(host->mck);
1883         kfree(host);
1884
1885         return 0;
1886 }
1887
1888 static struct platform_driver atmci_driver = {
1889         .remove         = __exit_p(atmci_remove),
1890         .driver         = {
1891                 .name           = "atmel_mci",
1892         },
1893 };
1894
1895 static int __init atmci_init(void)
1896 {
1897         return platform_driver_probe(&atmci_driver, atmci_probe);
1898 }
1899
1900 static void __exit atmci_exit(void)
1901 {
1902         platform_driver_unregister(&atmci_driver);
1903 }
1904
1905 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1906 module_exit(atmci_exit);
1907
1908 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1909 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1910 MODULE_LICENSE("GPL v2");