3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2003-2012, Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/kernel.h>
22 #include <linux/device.h>
24 #include <linux/errno.h>
25 #include <linux/types.h>
26 #include <linux/fcntl.h>
27 #include <linux/aio.h>
28 #include <linux/pci.h>
29 #include <linux/poll.h>
30 #include <linux/init.h>
31 #include <linux/ioctl.h>
32 #include <linux/cdev.h>
33 #include <linux/sched.h>
34 #include <linux/uuid.h>
35 #include <linux/compat.h>
36 #include <linux/jiffies.h>
37 #include <linux/interrupt.h>
38 #include <linux/miscdevice.h>
40 #include <linux/mei.h>
46 /* AMT device is a singleton on the platform */
47 static struct pci_dev *mei_pdev;
49 /* mei_pci_tbl - PCI Device ID Table */
50 static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl) = {
51 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)},
52 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)},
53 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)},
54 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)},
55 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)},
56 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)},
57 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)},
58 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)},
59 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)},
60 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)},
61 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)},
62 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)},
63 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)},
64 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)},
65 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)},
66 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)},
67 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_1)},
68 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_2)},
69 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_3)},
70 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_4)},
71 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_1)},
72 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_2)},
73 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_3)},
74 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_4)},
75 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_1)},
76 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_2)},
77 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_CPT_1)},
78 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PBG_1)},
79 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)},
80 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)},
81 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)},
82 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_H)},
83 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_W)},
84 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)},
85 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_HR)},
86 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_WPT_LP)},
88 /* required last entry */
92 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
94 static DEFINE_MUTEX(mei_mutex);
97 * mei_quirk_probe - probe for devices that doesn't valid ME interface
99 * @pdev: PCI device structure
100 * @ent: entry into pci_device_table
102 * returns true if ME Interface is valid, false otherwise
104 static bool mei_me_quirk_probe(struct pci_dev *pdev,
105 const struct pci_device_id *ent)
108 /* Cougar Point || Patsburg */
109 if (ent->device == MEI_DEV_ID_CPT_1 ||
110 ent->device == MEI_DEV_ID_PBG_1) {
111 pci_read_config_dword(pdev, PCI_CFG_HFS_2, ®);
112 /* make sure that bit 9 (NM) is up and bit 10 (DM) is down */
113 if ((reg & 0x600) == 0x200)
118 if (ent->device == MEI_DEV_ID_LPT_H ||
119 ent->device == MEI_DEV_ID_LPT_W ||
120 ent->device == MEI_DEV_ID_LPT_HR) {
121 /* Read ME FW Status check for SPS Firmware */
122 pci_read_config_dword(pdev, PCI_CFG_HFS_1, ®);
123 /* if bits [19:16] = 15, running SPS Firmware */
124 if ((reg & 0xf0000) == 0xf0000)
131 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
135 * mei_probe - Device Initialization Routine
137 * @pdev: PCI device structure
138 * @ent: entry in kcs_pci_tbl
140 * returns 0 on success, <0 on failure.
142 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
144 struct mei_device *dev;
145 struct mei_me_hw *hw;
148 mutex_lock(&mei_mutex);
150 if (!mei_me_quirk_probe(pdev, ent)) {
160 err = pci_enable_device(pdev);
162 dev_err(&pdev->dev, "failed to enable pci device.\n");
165 /* set PCI host mastering */
166 pci_set_master(pdev);
167 /* pci request regions for mei driver */
168 err = pci_request_regions(pdev, KBUILD_MODNAME);
170 dev_err(&pdev->dev, "failed to get pci regions.\n");
173 /* allocates and initializes the mei dev structure */
174 dev = mei_me_dev_init(pdev);
177 goto release_regions;
180 /* mapping IO device memory */
181 hw->mem_addr = pci_iomap(pdev, 0, 0);
183 dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
187 pci_enable_msi(pdev);
189 /* request and enable interrupt */
190 if (pci_dev_msi_enabled(pdev))
191 err = request_threaded_irq(pdev->irq,
193 mei_me_irq_thread_handler,
194 IRQF_ONESHOT, KBUILD_MODNAME, dev);
196 err = request_threaded_irq(pdev->irq,
197 mei_me_irq_quick_handler,
198 mei_me_irq_thread_handler,
199 IRQF_SHARED, KBUILD_MODNAME, dev);
202 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
207 if (mei_start(dev)) {
208 dev_err(&pdev->dev, "init hw failure.\n");
213 err = mei_register(dev);
218 pci_set_drvdata(pdev, dev);
220 schedule_delayed_work(&dev->timer_work, HZ);
222 mutex_unlock(&mei_mutex);
224 pr_debug("initialization successful.\n");
229 mei_disable_interrupts(dev);
230 flush_scheduled_work();
231 free_irq(pdev->irq, dev);
233 pci_disable_msi(pdev);
234 pci_iounmap(pdev, hw->mem_addr);
238 pci_release_regions(pdev);
240 pci_disable_device(pdev);
242 mutex_unlock(&mei_mutex);
243 dev_err(&pdev->dev, "initialization failed.\n");
248 * mei_remove - Device Removal Routine
250 * @pdev: PCI device structure
252 * mei_remove is called by the PCI subsystem to alert the driver
253 * that it should release a PCI device.
255 static void mei_me_remove(struct pci_dev *pdev)
257 struct mei_device *dev;
258 struct mei_me_hw *hw;
260 if (mei_pdev != pdev)
263 dev = pci_get_drvdata(pdev);
270 dev_err(&pdev->dev, "stop\n");
275 /* disable interrupts */
276 mei_disable_interrupts(dev);
278 free_irq(pdev->irq, dev);
279 pci_disable_msi(pdev);
280 pci_set_drvdata(pdev, NULL);
283 pci_iounmap(pdev, hw->mem_addr);
289 pci_release_regions(pdev);
290 pci_disable_device(pdev);
295 static int mei_me_pci_suspend(struct device *device)
297 struct pci_dev *pdev = to_pci_dev(device);
298 struct mei_device *dev = pci_get_drvdata(pdev);
303 dev_err(&pdev->dev, "suspend\n");
307 mei_disable_interrupts(dev);
309 free_irq(pdev->irq, dev);
310 pci_disable_msi(pdev);
315 static int mei_me_pci_resume(struct device *device)
317 struct pci_dev *pdev = to_pci_dev(device);
318 struct mei_device *dev;
321 dev = pci_get_drvdata(pdev);
325 pci_enable_msi(pdev);
327 /* request and enable interrupt */
328 if (pci_dev_msi_enabled(pdev))
329 err = request_threaded_irq(pdev->irq,
331 mei_me_irq_thread_handler,
332 IRQF_ONESHOT, KBUILD_MODNAME, dev);
334 err = request_threaded_irq(pdev->irq,
335 mei_me_irq_quick_handler,
336 mei_me_irq_thread_handler,
337 IRQF_SHARED, KBUILD_MODNAME, dev);
340 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
345 mutex_lock(&dev->device_lock);
346 dev->dev_state = MEI_DEV_POWER_UP;
347 mei_clear_interrupts(dev);
349 mutex_unlock(&dev->device_lock);
351 /* Start timer if stopped in suspend */
352 schedule_delayed_work(&dev->timer_work, HZ);
356 static SIMPLE_DEV_PM_OPS(mei_me_pm_ops, mei_me_pci_suspend, mei_me_pci_resume);
357 #define MEI_ME_PM_OPS (&mei_me_pm_ops)
359 #define MEI_ME_PM_OPS NULL
360 #endif /* CONFIG_PM */
362 * PCI driver structure
364 static struct pci_driver mei_me_driver = {
365 .name = KBUILD_MODNAME,
366 .id_table = mei_me_pci_tbl,
367 .probe = mei_me_probe,
368 .remove = mei_me_remove,
369 .shutdown = mei_me_remove,
370 .driver.pm = MEI_ME_PM_OPS,
373 module_pci_driver(mei_me_driver);
375 MODULE_AUTHOR("Intel Corporation");
376 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
377 MODULE_LICENSE("GPL v2");