Merge ath-next from ath.git
[firefly-linux-kernel-4.4.55.git] / drivers / mfd / tc6393xb.c
1 /*
2  * Toshiba TC6393XB SoC support
3  *
4  * Copyright(c) 2005-2006 Chris Humbert
5  * Copyright(c) 2005 Dirk Opfer
6  * Copyright(c) 2005 Ian Molton <spyro@f2s.com>
7  * Copyright(c) 2007 Dmitry Baryshkov
8  *
9  * Based on code written by Sharp/Lineo for 2.4 kernels
10  * Based on locomo.c
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  */
16
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/io.h>
20 #include <linux/irq.h>
21 #include <linux/platform_device.h>
22 #include <linux/clk.h>
23 #include <linux/err.h>
24 #include <linux/mfd/core.h>
25 #include <linux/mfd/tmio.h>
26 #include <linux/mfd/tc6393xb.h>
27 #include <linux/gpio.h>
28 #include <linux/slab.h>
29
30 #define SCR_REVID       0x08            /* b Revision ID        */
31 #define SCR_ISR         0x50            /* b Interrupt Status   */
32 #define SCR_IMR         0x52            /* b Interrupt Mask     */
33 #define SCR_IRR         0x54            /* b Interrupt Routing  */
34 #define SCR_GPER        0x60            /* w GP Enable          */
35 #define SCR_GPI_SR(i)   (0x64 + (i))    /* b3 GPI Status        */
36 #define SCR_GPI_IMR(i)  (0x68 + (i))    /* b3 GPI INT Mask      */
37 #define SCR_GPI_EDER(i) (0x6c + (i))    /* b3 GPI Edge Detect Enable */
38 #define SCR_GPI_LIR(i)  (0x70 + (i))    /* b3 GPI Level Invert  */
39 #define SCR_GPO_DSR(i)  (0x78 + (i))    /* b3 GPO Data Set      */
40 #define SCR_GPO_DOECR(i) (0x7c + (i))   /* b3 GPO Data OE Control */
41 #define SCR_GP_IARCR(i) (0x80 + (i))    /* b3 GP Internal Active Register Control */
42 #define SCR_GP_IARLCR(i) (0x84 + (i))   /* b3 GP INTERNAL Active Register Level Control */
43 #define SCR_GPI_BCR(i)  (0x88 + (i))    /* b3 GPI Buffer Control */
44 #define SCR_GPA_IARCR   0x8c            /* w GPa Internal Active Register Control */
45 #define SCR_GPA_IARLCR  0x90            /* w GPa Internal Active Register Level Control */
46 #define SCR_GPA_BCR     0x94            /* w GPa Buffer Control */
47 #define SCR_CCR         0x98            /* w Clock Control      */
48 #define SCR_PLL2CR      0x9a            /* w PLL2 Control       */
49 #define SCR_PLL1CR      0x9c            /* l PLL1 Control       */
50 #define SCR_DIARCR      0xa0            /* b Device Internal Active Register Control */
51 #define SCR_DBOCR       0xa1            /* b Device Buffer Off Control */
52 #define SCR_FER         0xe0            /* b Function Enable    */
53 #define SCR_MCR         0xe4            /* w Mode Control       */
54 #define SCR_CONFIG      0xfc            /* b Configuration Control */
55 #define SCR_DEBUG       0xff            /* b Debug              */
56
57 #define SCR_CCR_CK32K   BIT(0)
58 #define SCR_CCR_USBCK   BIT(1)
59 #define SCR_CCR_UNK1    BIT(4)
60 #define SCR_CCR_MCLK_MASK       (7 << 8)
61 #define SCR_CCR_MCLK_OFF        (0 << 8)
62 #define SCR_CCR_MCLK_12 (1 << 8)
63 #define SCR_CCR_MCLK_24 (2 << 8)
64 #define SCR_CCR_MCLK_48 (3 << 8)
65 #define SCR_CCR_HCLK_MASK       (3 << 12)
66 #define SCR_CCR_HCLK_24 (0 << 12)
67 #define SCR_CCR_HCLK_48 (1 << 12)
68
69 #define SCR_FER_USBEN           BIT(0)  /* USB host enable */
70 #define SCR_FER_LCDCVEN         BIT(1)  /* polysilicon TFT enable */
71 #define SCR_FER_SLCDEN          BIT(2)  /* SLCD enable */
72
73 #define SCR_MCR_RDY_MASK                (3 << 0)
74 #define SCR_MCR_RDY_OPENDRAIN   (0 << 0)
75 #define SCR_MCR_RDY_TRISTATE    (1 << 0)
76 #define SCR_MCR_RDY_PUSHPULL    (2 << 0)
77 #define SCR_MCR_RDY_UNK         BIT(2)
78 #define SCR_MCR_RDY_EN          BIT(3)
79 #define SCR_MCR_INT_MASK                (3 << 4)
80 #define SCR_MCR_INT_OPENDRAIN   (0 << 4)
81 #define SCR_MCR_INT_TRISTATE    (1 << 4)
82 #define SCR_MCR_INT_PUSHPULL    (2 << 4)
83 #define SCR_MCR_INT_UNK         BIT(6)
84 #define SCR_MCR_INT_EN          BIT(7)
85 /* bits 8 - 16 are unknown */
86
87 #define TC_GPIO_BIT(i)          (1 << (i & 0x7))
88
89 /*--------------------------------------------------------------------------*/
90
91 struct tc6393xb {
92         void __iomem            *scr;
93
94         struct gpio_chip        gpio;
95
96         struct clk              *clk; /* 3,6 Mhz */
97
98         spinlock_t              lock; /* protects RMW cycles */
99
100         struct {
101                 u8              fer;
102                 u16             ccr;
103                 u8              gpi_bcr[3];
104                 u8              gpo_dsr[3];
105                 u8              gpo_doecr[3];
106         } suspend_state;
107
108         struct resource         rscr;
109         struct resource         *iomem;
110         int                     irq;
111         int                     irq_base;
112 };
113
114 enum {
115         TC6393XB_CELL_NAND,
116         TC6393XB_CELL_MMC,
117         TC6393XB_CELL_OHCI,
118         TC6393XB_CELL_FB,
119 };
120
121 /*--------------------------------------------------------------------------*/
122
123 static int tc6393xb_nand_enable(struct platform_device *nand)
124 {
125         struct platform_device *dev = to_platform_device(nand->dev.parent);
126         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
127         unsigned long flags;
128
129         spin_lock_irqsave(&tc6393xb->lock, flags);
130
131         /* SMD buffer on */
132         dev_dbg(&dev->dev, "SMD buffer on\n");
133         tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1));
134
135         spin_unlock_irqrestore(&tc6393xb->lock, flags);
136
137         return 0;
138 }
139
140 static struct resource tc6393xb_nand_resources[] = {
141         {
142                 .start  = 0x1000,
143                 .end    = 0x1007,
144                 .flags  = IORESOURCE_MEM,
145         },
146         {
147                 .start  = 0x0100,
148                 .end    = 0x01ff,
149                 .flags  = IORESOURCE_MEM,
150         },
151         {
152                 .start  = IRQ_TC6393_NAND,
153                 .end    = IRQ_TC6393_NAND,
154                 .flags  = IORESOURCE_IRQ,
155         },
156 };
157
158 static struct resource tc6393xb_mmc_resources[] = {
159         {
160                 .start  = 0x800,
161                 .end    = 0x9ff,
162                 .flags  = IORESOURCE_MEM,
163         },
164         {
165                 .start  = IRQ_TC6393_MMC,
166                 .end    = IRQ_TC6393_MMC,
167                 .flags  = IORESOURCE_IRQ,
168         },
169 };
170
171 static const struct resource tc6393xb_ohci_resources[] = {
172         {
173                 .start  = 0x3000,
174                 .end    = 0x31ff,
175                 .flags  = IORESOURCE_MEM,
176         },
177         {
178                 .start  = 0x0300,
179                 .end    = 0x03ff,
180                 .flags  = IORESOURCE_MEM,
181         },
182         {
183                 .start  = 0x010000,
184                 .end    = 0x017fff,
185                 .flags  = IORESOURCE_MEM,
186         },
187         {
188                 .start  = 0x018000,
189                 .end    = 0x01ffff,
190                 .flags  = IORESOURCE_MEM,
191         },
192         {
193                 .start  = IRQ_TC6393_OHCI,
194                 .end    = IRQ_TC6393_OHCI,
195                 .flags  = IORESOURCE_IRQ,
196         },
197 };
198
199 static struct resource tc6393xb_fb_resources[] = {
200         {
201                 .start  = 0x5000,
202                 .end    = 0x51ff,
203                 .flags  = IORESOURCE_MEM,
204         },
205         {
206                 .start  = 0x0500,
207                 .end    = 0x05ff,
208                 .flags  = IORESOURCE_MEM,
209         },
210         {
211                 .start  = 0x100000,
212                 .end    = 0x1fffff,
213                 .flags  = IORESOURCE_MEM,
214         },
215         {
216                 .start  = IRQ_TC6393_FB,
217                 .end    = IRQ_TC6393_FB,
218                 .flags  = IORESOURCE_IRQ,
219         },
220 };
221
222 static int tc6393xb_ohci_enable(struct platform_device *dev)
223 {
224         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
225         unsigned long flags;
226         u16 ccr;
227         u8 fer;
228
229         spin_lock_irqsave(&tc6393xb->lock, flags);
230
231         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
232         ccr |= SCR_CCR_USBCK;
233         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
234
235         fer = tmio_ioread8(tc6393xb->scr + SCR_FER);
236         fer |= SCR_FER_USBEN;
237         tmio_iowrite8(fer, tc6393xb->scr + SCR_FER);
238
239         spin_unlock_irqrestore(&tc6393xb->lock, flags);
240
241         return 0;
242 }
243
244 static int tc6393xb_ohci_disable(struct platform_device *dev)
245 {
246         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
247         unsigned long flags;
248         u16 ccr;
249         u8 fer;
250
251         spin_lock_irqsave(&tc6393xb->lock, flags);
252
253         fer = tmio_ioread8(tc6393xb->scr + SCR_FER);
254         fer &= ~SCR_FER_USBEN;
255         tmio_iowrite8(fer, tc6393xb->scr + SCR_FER);
256
257         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
258         ccr &= ~SCR_CCR_USBCK;
259         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
260
261         spin_unlock_irqrestore(&tc6393xb->lock, flags);
262
263         return 0;
264 }
265
266 static int tc6393xb_ohci_suspend(struct platform_device *dev)
267 {
268         struct tc6393xb_platform_data *tcpd = dev_get_platdata(dev->dev.parent);
269
270         /* We can't properly store/restore OHCI state, so fail here */
271         if (tcpd->resume_restore)
272                 return -EBUSY;
273
274         return tc6393xb_ohci_disable(dev);
275 }
276
277 static int tc6393xb_fb_enable(struct platform_device *dev)
278 {
279         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
280         unsigned long flags;
281         u16 ccr;
282
283         spin_lock_irqsave(&tc6393xb->lock, flags);
284
285         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
286         ccr &= ~SCR_CCR_MCLK_MASK;
287         ccr |= SCR_CCR_MCLK_48;
288         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
289
290         spin_unlock_irqrestore(&tc6393xb->lock, flags);
291
292         return 0;
293 }
294
295 static int tc6393xb_fb_disable(struct platform_device *dev)
296 {
297         struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
298         unsigned long flags;
299         u16 ccr;
300
301         spin_lock_irqsave(&tc6393xb->lock, flags);
302
303         ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
304         ccr &= ~SCR_CCR_MCLK_MASK;
305         ccr |= SCR_CCR_MCLK_OFF;
306         tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
307
308         spin_unlock_irqrestore(&tc6393xb->lock, flags);
309
310         return 0;
311 }
312
313 int tc6393xb_lcd_set_power(struct platform_device *fb, bool on)
314 {
315         struct platform_device *dev = to_platform_device(fb->dev.parent);
316         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
317         u8 fer;
318         unsigned long flags;
319
320         spin_lock_irqsave(&tc6393xb->lock, flags);
321
322         fer = ioread8(tc6393xb->scr + SCR_FER);
323         if (on)
324                 fer |= SCR_FER_SLCDEN;
325         else
326                 fer &= ~SCR_FER_SLCDEN;
327         iowrite8(fer, tc6393xb->scr + SCR_FER);
328
329         spin_unlock_irqrestore(&tc6393xb->lock, flags);
330
331         return 0;
332 }
333 EXPORT_SYMBOL(tc6393xb_lcd_set_power);
334
335 int tc6393xb_lcd_mode(struct platform_device *fb,
336                                         const struct fb_videomode *mode) {
337         struct platform_device *dev = to_platform_device(fb->dev.parent);
338         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
339         unsigned long flags;
340
341         spin_lock_irqsave(&tc6393xb->lock, flags);
342
343         iowrite16(mode->pixclock, tc6393xb->scr + SCR_PLL1CR + 0);
344         iowrite16(mode->pixclock >> 16, tc6393xb->scr + SCR_PLL1CR + 2);
345
346         spin_unlock_irqrestore(&tc6393xb->lock, flags);
347
348         return 0;
349 }
350 EXPORT_SYMBOL(tc6393xb_lcd_mode);
351
352 static int tc6393xb_mmc_enable(struct platform_device *mmc)
353 {
354         struct platform_device *dev = to_platform_device(mmc->dev.parent);
355         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
356
357         tmio_core_mmc_enable(tc6393xb->scr + 0x200, 0,
358                 tc6393xb_mmc_resources[0].start & 0xfffe);
359
360         return 0;
361 }
362
363 static int tc6393xb_mmc_resume(struct platform_device *mmc)
364 {
365         struct platform_device *dev = to_platform_device(mmc->dev.parent);
366         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
367
368         tmio_core_mmc_resume(tc6393xb->scr + 0x200, 0,
369                 tc6393xb_mmc_resources[0].start & 0xfffe);
370
371         return 0;
372 }
373
374 static void tc6393xb_mmc_pwr(struct platform_device *mmc, int state)
375 {
376         struct platform_device *dev = to_platform_device(mmc->dev.parent);
377         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
378
379         tmio_core_mmc_pwr(tc6393xb->scr + 0x200, 0, state);
380 }
381
382 static void tc6393xb_mmc_clk_div(struct platform_device *mmc, int state)
383 {
384         struct platform_device *dev = to_platform_device(mmc->dev.parent);
385         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
386
387         tmio_core_mmc_clk_div(tc6393xb->scr + 0x200, 0, state);
388 }
389
390 static struct tmio_mmc_data tc6393xb_mmc_data = {
391         .hclk = 24000000,
392         .set_pwr = tc6393xb_mmc_pwr,
393         .set_clk_div = tc6393xb_mmc_clk_div,
394 };
395
396 static struct mfd_cell tc6393xb_cells[] = {
397         [TC6393XB_CELL_NAND] = {
398                 .name = "tmio-nand",
399                 .enable = tc6393xb_nand_enable,
400                 .num_resources = ARRAY_SIZE(tc6393xb_nand_resources),
401                 .resources = tc6393xb_nand_resources,
402         },
403         [TC6393XB_CELL_MMC] = {
404                 .name = "tmio-mmc",
405                 .enable = tc6393xb_mmc_enable,
406                 .resume = tc6393xb_mmc_resume,
407                 .platform_data = &tc6393xb_mmc_data,
408                 .pdata_size    = sizeof(tc6393xb_mmc_data),
409                 .num_resources = ARRAY_SIZE(tc6393xb_mmc_resources),
410                 .resources = tc6393xb_mmc_resources,
411         },
412         [TC6393XB_CELL_OHCI] = {
413                 .name = "tmio-ohci",
414                 .num_resources = ARRAY_SIZE(tc6393xb_ohci_resources),
415                 .resources = tc6393xb_ohci_resources,
416                 .enable = tc6393xb_ohci_enable,
417                 .suspend = tc6393xb_ohci_suspend,
418                 .resume = tc6393xb_ohci_enable,
419                 .disable = tc6393xb_ohci_disable,
420         },
421         [TC6393XB_CELL_FB] = {
422                 .name = "tmio-fb",
423                 .num_resources = ARRAY_SIZE(tc6393xb_fb_resources),
424                 .resources = tc6393xb_fb_resources,
425                 .enable = tc6393xb_fb_enable,
426                 .suspend = tc6393xb_fb_disable,
427                 .resume = tc6393xb_fb_enable,
428                 .disable = tc6393xb_fb_disable,
429         },
430 };
431
432 /*--------------------------------------------------------------------------*/
433
434 static int tc6393xb_gpio_get(struct gpio_chip *chip,
435                 unsigned offset)
436 {
437         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
438
439         /* XXX: does dsr also represent inputs? */
440         return tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8))
441                 & TC_GPIO_BIT(offset);
442 }
443
444 static void __tc6393xb_gpio_set(struct gpio_chip *chip,
445                 unsigned offset, int value)
446 {
447         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
448         u8  dsr;
449
450         dsr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8));
451         if (value)
452                 dsr |= TC_GPIO_BIT(offset);
453         else
454                 dsr &= ~TC_GPIO_BIT(offset);
455
456         tmio_iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8));
457 }
458
459 static void tc6393xb_gpio_set(struct gpio_chip *chip,
460                 unsigned offset, int value)
461 {
462         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
463         unsigned long flags;
464
465         spin_lock_irqsave(&tc6393xb->lock, flags);
466
467         __tc6393xb_gpio_set(chip, offset, value);
468
469         spin_unlock_irqrestore(&tc6393xb->lock, flags);
470 }
471
472 static int tc6393xb_gpio_direction_input(struct gpio_chip *chip,
473                         unsigned offset)
474 {
475         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
476         unsigned long flags;
477         u8 doecr;
478
479         spin_lock_irqsave(&tc6393xb->lock, flags);
480
481         doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
482         doecr &= ~TC_GPIO_BIT(offset);
483         tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
484
485         spin_unlock_irqrestore(&tc6393xb->lock, flags);
486
487         return 0;
488 }
489
490 static int tc6393xb_gpio_direction_output(struct gpio_chip *chip,
491                         unsigned offset, int value)
492 {
493         struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
494         unsigned long flags;
495         u8 doecr;
496
497         spin_lock_irqsave(&tc6393xb->lock, flags);
498
499         __tc6393xb_gpio_set(chip, offset, value);
500
501         doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
502         doecr |= TC_GPIO_BIT(offset);
503         tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
504
505         spin_unlock_irqrestore(&tc6393xb->lock, flags);
506
507         return 0;
508 }
509
510 static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb, int gpio_base)
511 {
512         tc6393xb->gpio.label = "tc6393xb";
513         tc6393xb->gpio.base = gpio_base;
514         tc6393xb->gpio.ngpio = 16;
515         tc6393xb->gpio.set = tc6393xb_gpio_set;
516         tc6393xb->gpio.get = tc6393xb_gpio_get;
517         tc6393xb->gpio.direction_input = tc6393xb_gpio_direction_input;
518         tc6393xb->gpio.direction_output = tc6393xb_gpio_direction_output;
519
520         return gpiochip_add(&tc6393xb->gpio);
521 }
522
523 /*--------------------------------------------------------------------------*/
524
525 static void
526 tc6393xb_irq(unsigned int irq, struct irq_desc *desc)
527 {
528         struct tc6393xb *tc6393xb = irq_desc_get_handler_data(desc);
529         unsigned int isr;
530         unsigned int i, irq_base;
531
532         irq_base = tc6393xb->irq_base;
533
534         while ((isr = tmio_ioread8(tc6393xb->scr + SCR_ISR) &
535                                 ~tmio_ioread8(tc6393xb->scr + SCR_IMR)))
536                 for (i = 0; i < TC6393XB_NR_IRQS; i++) {
537                         if (isr & (1 << i))
538                                 generic_handle_irq(irq_base + i);
539                 }
540 }
541
542 static void tc6393xb_irq_ack(struct irq_data *data)
543 {
544 }
545
546 static void tc6393xb_irq_mask(struct irq_data *data)
547 {
548         struct tc6393xb *tc6393xb = irq_data_get_irq_chip_data(data);
549         unsigned long flags;
550         u8 imr;
551
552         spin_lock_irqsave(&tc6393xb->lock, flags);
553         imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
554         imr |= 1 << (data->irq - tc6393xb->irq_base);
555         tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
556         spin_unlock_irqrestore(&tc6393xb->lock, flags);
557 }
558
559 static void tc6393xb_irq_unmask(struct irq_data *data)
560 {
561         struct tc6393xb *tc6393xb = irq_data_get_irq_chip_data(data);
562         unsigned long flags;
563         u8 imr;
564
565         spin_lock_irqsave(&tc6393xb->lock, flags);
566         imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
567         imr &= ~(1 << (data->irq - tc6393xb->irq_base));
568         tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
569         spin_unlock_irqrestore(&tc6393xb->lock, flags);
570 }
571
572 static struct irq_chip tc6393xb_chip = {
573         .name           = "tc6393xb",
574         .irq_ack        = tc6393xb_irq_ack,
575         .irq_mask       = tc6393xb_irq_mask,
576         .irq_unmask     = tc6393xb_irq_unmask,
577 };
578
579 static void tc6393xb_attach_irq(struct platform_device *dev)
580 {
581         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
582         unsigned int irq, irq_base;
583
584         irq_base = tc6393xb->irq_base;
585
586         for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
587                 irq_set_chip_and_handler(irq, &tc6393xb_chip, handle_edge_irq);
588                 irq_set_chip_data(irq, tc6393xb);
589                 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
590         }
591
592         irq_set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING);
593         irq_set_chained_handler_and_data(tc6393xb->irq, tc6393xb_irq,
594                                          tc6393xb);
595 }
596
597 static void tc6393xb_detach_irq(struct platform_device *dev)
598 {
599         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
600         unsigned int irq, irq_base;
601
602         irq_set_chained_handler_and_data(tc6393xb->irq, NULL, NULL);
603
604         irq_base = tc6393xb->irq_base;
605
606         for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
607                 irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
608                 irq_set_chip(irq, NULL);
609                 irq_set_chip_data(irq, NULL);
610         }
611 }
612
613 /*--------------------------------------------------------------------------*/
614
615 static int tc6393xb_probe(struct platform_device *dev)
616 {
617         struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
618         struct tc6393xb *tc6393xb;
619         struct resource *iomem, *rscr;
620         int ret;
621
622         iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
623         if (!iomem)
624                 return -EINVAL;
625
626         tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL);
627         if (!tc6393xb) {
628                 ret = -ENOMEM;
629                 goto err_kzalloc;
630         }
631
632         spin_lock_init(&tc6393xb->lock);
633
634         platform_set_drvdata(dev, tc6393xb);
635
636         ret = platform_get_irq(dev, 0);
637         if (ret >= 0)
638                 tc6393xb->irq = ret;
639         else
640                 goto err_noirq;
641
642         tc6393xb->iomem = iomem;
643         tc6393xb->irq_base = tcpd->irq_base;
644
645         tc6393xb->clk = clk_get(&dev->dev, "CLK_CK3P6MI");
646         if (IS_ERR(tc6393xb->clk)) {
647                 ret = PTR_ERR(tc6393xb->clk);
648                 goto err_clk_get;
649         }
650
651         rscr = &tc6393xb->rscr;
652         rscr->name = "tc6393xb-core";
653         rscr->start = iomem->start;
654         rscr->end = iomem->start + 0xff;
655         rscr->flags = IORESOURCE_MEM;
656
657         ret = request_resource(iomem, rscr);
658         if (ret)
659                 goto err_request_scr;
660
661         tc6393xb->scr = ioremap(rscr->start, resource_size(rscr));
662         if (!tc6393xb->scr) {
663                 ret = -ENOMEM;
664                 goto err_ioremap;
665         }
666
667         ret = clk_prepare_enable(tc6393xb->clk);
668         if (ret)
669                 goto err_clk_enable;
670
671         ret = tcpd->enable(dev);
672         if (ret)
673                 goto err_enable;
674
675         iowrite8(0,                             tc6393xb->scr + SCR_FER);
676         iowrite16(tcpd->scr_pll2cr,             tc6393xb->scr + SCR_PLL2CR);
677         iowrite16(SCR_CCR_UNK1 | SCR_CCR_HCLK_48,
678                                                 tc6393xb->scr + SCR_CCR);
679         iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
680                   SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
681                   BIT(15),                      tc6393xb->scr + SCR_MCR);
682         iowrite16(tcpd->scr_gper,               tc6393xb->scr + SCR_GPER);
683         iowrite8(0,                             tc6393xb->scr + SCR_IRR);
684         iowrite8(0xbf,                          tc6393xb->scr + SCR_IMR);
685
686         printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n",
687                         tmio_ioread8(tc6393xb->scr + SCR_REVID),
688                         (unsigned long) iomem->start, tc6393xb->irq);
689
690         tc6393xb->gpio.base = -1;
691
692         if (tcpd->gpio_base >= 0) {
693                 ret = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base);
694                 if (ret)
695                         goto err_gpio_add;
696         }
697
698         tc6393xb_attach_irq(dev);
699
700         if (tcpd->setup) {
701                 ret = tcpd->setup(dev);
702                 if (ret)
703                         goto err_setup;
704         }
705
706         tc6393xb_cells[TC6393XB_CELL_NAND].platform_data = tcpd->nand_data;
707         tc6393xb_cells[TC6393XB_CELL_NAND].pdata_size =
708                                                 sizeof(*tcpd->nand_data);
709         tc6393xb_cells[TC6393XB_CELL_FB].platform_data = tcpd->fb_data;
710         tc6393xb_cells[TC6393XB_CELL_FB].pdata_size = sizeof(*tcpd->fb_data);
711
712         ret = mfd_add_devices(&dev->dev, dev->id,
713                               tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells),
714                               iomem, tcpd->irq_base, NULL);
715
716         if (!ret)
717                 return 0;
718
719         if (tcpd->teardown)
720                 tcpd->teardown(dev);
721
722 err_setup:
723         tc6393xb_detach_irq(dev);
724
725 err_gpio_add:
726         if (tc6393xb->gpio.base != -1)
727                 gpiochip_remove(&tc6393xb->gpio);
728         tcpd->disable(dev);
729 err_enable:
730         clk_disable_unprepare(tc6393xb->clk);
731 err_clk_enable:
732         iounmap(tc6393xb->scr);
733 err_ioremap:
734         release_resource(&tc6393xb->rscr);
735 err_request_scr:
736         clk_put(tc6393xb->clk);
737 err_noirq:
738 err_clk_get:
739         kfree(tc6393xb);
740 err_kzalloc:
741         return ret;
742 }
743
744 static int tc6393xb_remove(struct platform_device *dev)
745 {
746         struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
747         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
748         int ret;
749
750         mfd_remove_devices(&dev->dev);
751
752         if (tcpd->teardown)
753                 tcpd->teardown(dev);
754
755         tc6393xb_detach_irq(dev);
756
757         if (tc6393xb->gpio.base != -1)
758                 gpiochip_remove(&tc6393xb->gpio);
759
760         ret = tcpd->disable(dev);
761         clk_disable_unprepare(tc6393xb->clk);
762         iounmap(tc6393xb->scr);
763         release_resource(&tc6393xb->rscr);
764         clk_put(tc6393xb->clk);
765         kfree(tc6393xb);
766
767         return ret;
768 }
769
770 #ifdef CONFIG_PM
771 static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
772 {
773         struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
774         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
775         int i, ret;
776
777         tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR);
778         tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER);
779
780         for (i = 0; i < 3; i++) {
781                 tc6393xb->suspend_state.gpo_dsr[i] =
782                         ioread8(tc6393xb->scr + SCR_GPO_DSR(i));
783                 tc6393xb->suspend_state.gpo_doecr[i] =
784                         ioread8(tc6393xb->scr + SCR_GPO_DOECR(i));
785                 tc6393xb->suspend_state.gpi_bcr[i] =
786                         ioread8(tc6393xb->scr + SCR_GPI_BCR(i));
787         }
788         ret = tcpd->suspend(dev);
789         clk_disable_unprepare(tc6393xb->clk);
790
791         return ret;
792 }
793
794 static int tc6393xb_resume(struct platform_device *dev)
795 {
796         struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
797         struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
798         int ret;
799         int i;
800
801         clk_prepare_enable(tc6393xb->clk);
802
803         ret = tcpd->resume(dev);
804         if (ret)
805                 return ret;
806
807         if (!tcpd->resume_restore)
808                 return 0;
809
810         iowrite8(tc6393xb->suspend_state.fer,   tc6393xb->scr + SCR_FER);
811         iowrite16(tcpd->scr_pll2cr,             tc6393xb->scr + SCR_PLL2CR);
812         iowrite16(tc6393xb->suspend_state.ccr,  tc6393xb->scr + SCR_CCR);
813         iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
814                   SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
815                   BIT(15),                      tc6393xb->scr + SCR_MCR);
816         iowrite16(tcpd->scr_gper,               tc6393xb->scr + SCR_GPER);
817         iowrite8(0,                             tc6393xb->scr + SCR_IRR);
818         iowrite8(0xbf,                          tc6393xb->scr + SCR_IMR);
819
820         for (i = 0; i < 3; i++) {
821                 iowrite8(tc6393xb->suspend_state.gpo_dsr[i],
822                                         tc6393xb->scr + SCR_GPO_DSR(i));
823                 iowrite8(tc6393xb->suspend_state.gpo_doecr[i],
824                                         tc6393xb->scr + SCR_GPO_DOECR(i));
825                 iowrite8(tc6393xb->suspend_state.gpi_bcr[i],
826                                         tc6393xb->scr + SCR_GPI_BCR(i));
827         }
828
829         return 0;
830 }
831 #else
832 #define tc6393xb_suspend NULL
833 #define tc6393xb_resume NULL
834 #endif
835
836 static struct platform_driver tc6393xb_driver = {
837         .probe = tc6393xb_probe,
838         .remove = tc6393xb_remove,
839         .suspend = tc6393xb_suspend,
840         .resume = tc6393xb_resume,
841
842         .driver = {
843                 .name = "tc6393xb",
844         },
845 };
846
847 static int __init tc6393xb_init(void)
848 {
849         return platform_driver_register(&tc6393xb_driver);
850 }
851
852 static void __exit tc6393xb_exit(void)
853 {
854         platform_driver_unregister(&tc6393xb_driver);
855 }
856
857 subsys_initcall(tc6393xb_init);
858 module_exit(tc6393xb_exit);
859
860 MODULE_LICENSE("GPL v2");
861 MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer");
862 MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller");
863 MODULE_ALIAS("platform:tc6393xb");
864