drivers/mfd/rk616-core.c

   1 #include <linux/kernel.h>
   2 #include <linux/module.h>
   3 #include <linux/delay.h>
   4 #include <linux/mfd/core.h>
   5 #include <linux/slab.h>
   6 #include <linux/mfd/rk616.h>
   7 #include <mach/iomux.h>
   8 #include <linux/err.h>
   9 #include <linux/uaccess.h>
  10 #if defined(CONFIG_DEBUG_FS)
  11 #include <linux/fs.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/seq_file.h>
  14 #endif
  15
  16 #ifndef MHZ
  17 #define MHZ (1000*1000)
  18 #endif
  19
  20 static struct mfd_cell rk616_devs[] = {
  21         {
  22                 .name = "rk616-lvds",
  23                 .id = 0,
  24         },
  25         {
  26                 .name = "rk616-codec",
  27                 .id = 1,
  28         },
  29         {
  30                 .name = "rk616-hdmi",
  31                 .id = 2,
  32         },
  33         {
  34                 .name = "rk616-mipi",
  35                 .id = 3,
  36         },
  37 };
  38
  39 static int rk616_i2c_read_reg(struct mfd_rk616 *rk616, u16 reg,u32 *pval)
  40 {
  41         struct i2c_client * client = rk616->client;
  42         struct i2c_adapter *adap = client->adapter;
  43         struct i2c_msg msgs[2];
  44         int ret;
  45         char reg_buf[2];
  46
  47         memcpy(reg_buf, &reg, 2);
  48
  49         msgs[0].addr = client->addr;
  50         msgs[0].flags = client->flags;
  51         msgs[0].len = 2;
  52         msgs[0].buf = reg_buf;
  53         msgs[0].scl_rate = rk616->pdata->scl_rate;
  54         msgs[0].udelay = client->udelay;
  55
  56         msgs[1].addr = client->addr;
  57         msgs[1].flags = client->flags | I2C_M_RD;
  58         msgs[1].len = 4;
  59         msgs[1].buf = (char *)pval;
  60         msgs[1].scl_rate = rk616->pdata->scl_rate;
  61         msgs[1].udelay = client->udelay;
  62
  63         ret = i2c_transfer(adap, msgs, 2);
  64
  65
  66         return (ret == 2)? 4 : ret;
  67
  68 }
  69
  70 static int rk616_i2c_write_reg(struct mfd_rk616 *rk616, u16 reg,u32 *pval)
  71 {
  72         struct i2c_client *client = rk616->client;
  73         struct i2c_adapter *adap = client->adapter;
  74         struct i2c_msg msg;
  75         int ret;
  76         char *tx_buf = (char *)kmalloc(6, GFP_KERNEL);
  77         if(!tx_buf)
  78                 return -ENOMEM;
  79
  80         memcpy(tx_buf, &reg, 2);
  81         memcpy(tx_buf+2, (char *)pval, 4);
  82
  83         msg.addr = client->addr;
  84         msg.flags = client->flags;
  85         msg.len = 6;
  86         msg.buf = (char *)tx_buf;
  87         msg.scl_rate = rk616->pdata->scl_rate;
  88         msg.udelay = client->udelay;
  89
  90         ret = i2c_transfer(adap, &msg, 1);
  91         kfree(tx_buf);
  92
  93         return (ret == 1) ? 4 : ret;
  94 }
  95
  96
  97 static int rk616_i2c_write_bits(struct mfd_rk616 *rk616, u16 reg,u32 mask,u32 *pval)
  98 {
  99
 100         struct i2c_client *client = rk616->client;
 101         struct i2c_adapter *adap = client->adapter;
 102         struct i2c_msg msg;
 103         int ret;
 104         u32 reg_val;
 105         char *tx_buf = NULL;
 106
 107         tx_buf = (char *)kmalloc(6, GFP_KERNEL);
 108         if(!tx_buf)
 109                 return -ENOMEM;
 110
 111         mutex_lock(&rk616->reg_lock);
 112         rk616->read_dev(rk616,reg,&reg_val);
 113         reg_val &= ~mask;
 114         *pval &= mask;
 115         reg_val |= *pval;
 116         *pval = reg_val;
 117         memcpy(tx_buf, &reg, 2);
 118         memcpy(tx_buf+2, (char *)pval, 4);
 119
 120         msg.addr = client->addr;
 121         msg.flags = client->flags;
 122         msg.len = 6;
 123         msg.buf = (char *)tx_buf;
 124         msg.scl_rate = rk616->pdata->scl_rate;
 125         msg.udelay = client->udelay;
 126
 127         ret = i2c_transfer(adap, &msg, 1);
 128         kfree(tx_buf);
 129         mutex_unlock(&rk616->reg_lock);
 130
 131         return (ret == 1) ? 4 : ret;
 132 }
 133 #if defined(CONFIG_DEBUG_FS)
 134 static int rk616_reg_show(struct seq_file *s, void *v)
 135 {
 136         int i = 0;
 137         u32 val = 0;
 138         struct mfd_rk616 *rk616 = s->private;
 139         if(!rk616)
 140         {
 141                 dev_err(rk616->dev,"no mfd rk616!\n");
 142                 return 0;
 143         }
 144
 145         for(i=0;i<= CRU_CFGMISC_CON;i+=4)
 146         {
 147                 rk616->read_dev(rk616,i,&val);
 148                 if(i%16==0)
 149                         seq_printf(s,"\n0x%04x:",i);
 150                 seq_printf(s," %08x",val);
 151         }
 152         seq_printf(s,"\n");
 153
 154         return 0;
 155 }
 156
 157 static ssize_t rk616_reg_write (struct file *file, const char __user *buf, size_t count, loff_t *ppos)
 158 {
 159         struct mfd_rk616 *rk616 = file->f_path.dentry->d_inode->i_private;
 160         u32 reg;
 161         u32 val;
 162
 163         char kbuf[25];
 164         if (copy_from_user(kbuf, buf, count))
 165                 return -EFAULT;
 166         sscanf(kbuf, "%x%x", &reg,&val);
 167         rk616->write_dev(rk616,reg,&val);
 168         return count;
 169 }
 170
 171 static int rk616_reg_open(struct inode *inode, struct file *file)
 172 {
 173         struct mfd_rk616 *rk616 = inode->i_private;
 174         return single_open(file,rk616_reg_show,rk616);
 175 }
 176
 177 static const struct file_operations rk616_reg_fops = {
 178         .owner          = THIS_MODULE,
 179         .open           = rk616_reg_open,
 180         .read           = seq_read,
 181         .write          = rk616_reg_write,
 182         .llseek         = seq_lseek,
 183         .release        = single_release,
 184 };
 185 #endif
 186
 187
 188 static u32 rk616_clk_gcd(u32 numerator, u32 denominator)
 189 {
 190         u32 a, b;
 191
 192         if (!numerator || !denominator)
 193                 return 0;
 194
 195         if (numerator > denominator) {
 196                 a = numerator;
 197                 b = denominator;
 198         } else {
 199                 a = denominator;
 200                 b = numerator;
 201         }
 202
 203         while (b != 0) {
 204                 int r = b;
 205                 b = a % b;
 206                 a = r;
 207         }
 208
 209         return a;
 210 }
 211
 212
 213 static int rk616_pll_par_calc(u32 fin_hz,u32 fout_hz,u32 *refdiv, u32 *fbdiv,
 214                                         u32 *postdiv1, u32 *postdiv2, u32 *frac)
 215 {
 216         // FIXME set postdiv1/2 always 1
 217         u32 gcd;
 218         u64 fin_64, frac_64;
 219         u32 f_frac;
 220         if(!fin_hz || !fout_hz)
 221                 return -EINVAL;
 222
 223         if(fin_hz / MHZ * MHZ == fin_hz && fout_hz /MHZ * MHZ == fout_hz)
 224         {
 225                 fin_hz /= MHZ;
 226                 fout_hz /= MHZ;
 227                 gcd = rk616_clk_gcd(fin_hz, fout_hz);
 228                 *refdiv = fin_hz / gcd;
 229                 *fbdiv = fout_hz / gcd;
 230                 *postdiv1 = 1;
 231                 *postdiv2 = 1;
 232
 233                 *frac = 0;
 234
 235         }
 236         else
 237         {
 238
 239                 gcd = rk616_clk_gcd(fin_hz / MHZ, fout_hz / MHZ);
 240                 *refdiv = fin_hz / MHZ / gcd;
 241                 *fbdiv = fout_hz / MHZ / gcd;
 242                 *postdiv1 = 1;
 243                 *postdiv2 = 1;
 244
 245                 *frac = 0;
 246
 247                 f_frac = (fout_hz % MHZ);
 248                 fin_64 = fin_hz;
 249                 do_div(fin_64, (u64)*refdiv);
 250                 frac_64 = (u64)f_frac << 24;
 251                 do_div(frac_64, fin_64);
 252                 *frac = (u32) frac_64;
 253                 printk(KERN_INFO "frac_64=%llx, frac=%u\n", frac_64, *frac);
 254         }
 255         printk(KERN_INFO "fin=%u,fout=%u,gcd=%u,refdiv=%u,fbdiv=%u,postdiv1=%u,postdiv2=%u,frac=%u\n",
 256                                 fin_hz, fout_hz, gcd, *refdiv, *fbdiv, *postdiv1, *postdiv2, *frac);
 257         return 0;
 258 }
 259
 260
 261 static  int  rk616_pll_wait_lock(struct mfd_rk616 *rk616,int id)
 262 {
 263         u32 delay = 10;
 264         u32 val = 0;
 265         int ret;
 266         int offset;
 267
 268         if(id == 0)  //PLL0
 269         {
 270                 offset = 0;
 271         }
 272         else // PLL1
 273         {
 274                 offset = 0x0c;
 275         }
 276         while (delay >= 1)
 277         {
 278                 ret = rk616->read_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 279                 if (val&PLL0_LOCK)
 280                 {
 281                         rk616_dbg(rk616->dev,"PLL%d locked\n",id);
 282                         break;
 283                 }
 284                 msleep(1);
 285                 delay--;
 286         }
 287         if (delay == 0)
 288         {
 289                 dev_err(rk616->dev,"rk616 wait PLL%d lock time out!\n",id);
 290         }
 291
 292         return 0;
 293 }
 294
 295
 296
 297 int rk616_pll_pwr_down(struct mfd_rk616 *rk616,int id)
 298 {
 299         u32 val = 0;
 300         int ret;
 301         int offset;
 302         if(id == 0)  //PLL0
 303         {
 304                 offset = 0;
 305         }
 306         else // PLL1
 307         {
 308                 offset = 0x0c;
 309         }
 310
 311
 312         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 313         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 314
 315         return 0;
 316
 317 }
 318
 319
 320
 321 int rk616_pll_set_rate(struct mfd_rk616 *rk616,int id,u32 cfg_val,u32 frac)
 322 {
 323         u32 val = 0;
 324         int ret;
 325         int offset;
 326         u16 con0 = cfg_val & 0xffff;
 327         u16 con1 = (cfg_val >> 16)&0xffff;
 328         u32 fbdiv = con0 & 0xfff;
 329         u32 postdiv1 = (con0 >> 12)&0x7;
 330         u32 refdiv = con1 & 0x3f;
 331         u32 postdiv2 = (con1 >> 6) & 0x7;
 332         u8 mode = !frac;
 333
 334         if(id == 0)  //PLL0
 335         {
 336                 if(((rk616->pll0_rate >> 32) == cfg_val) &&
 337                         ((rk616->pll0_rate & 0xffffffff) == frac))
 338                 {
 339                         //return 0;
 340                 }
 341                 rk616->pll0_rate = ((u64)cfg_val << 32) | frac;
 342                 offset = 0;
 343         }
 344         else // PLL1
 345         {
 346                 if(((rk616->pll1_rate >> 32) == cfg_val) &&
 347                         ((rk616->pll1_rate & 0xffffffff) == frac))
 348                 {
 349                         // return 0;
 350                 }
 351                 rk616->pll1_rate = ((u64)cfg_val << 32) | frac;
 352                 offset = 0x0c;
 353         }
 354
 355
 356         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 357         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 358
 359
 360         ret = rk616->read_dev(rk616,CRU_PLL0_CON2 + offset,&val);
 361         val &= 0xff000000;
 362         if(frac)
 363                 val |= PLL0_FRAC(frac);
 364         else
 365                 val |= 0x800000; //default value
 366         ret = rk616->write_dev(rk616,CRU_PLL0_CON2 + offset,&val);
 367
 368         val = PLL0_POSTDIV1(postdiv1) | PLL0_FBDIV(fbdiv) | PLL0_POSTDIV1_MASK |
 369                 PLL0_FBDIV_MASK | (PLL0_BYPASS << 16);
 370         ret = rk616->write_dev(rk616,CRU_PLL0_CON0 + offset,&val);
 371
 372         val = PLL0_DIV_MODE(mode) | PLL0_POSTDIV2(postdiv2) | PLL0_REFDIV(refdiv) |
 373                 (PLL0_DIV_MODE_MASK) | PLL0_POSTDIV2_MASK | PLL0_REFDIV_MASK;
 374         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 375
 376         val = (PLL0_PWR_DN << 16);
 377         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 378
 379         rk616_pll_wait_lock(rk616,id);
 380
 381         msleep(5);
 382
 383         return 0;
 384
 385 }
 386 /***********************************
 387 default clk patch settiing:
 388 CLKIN-------->CODEC
 389 LCD_DCLK0--->PLL0--->Dither--->LVDS/MIPI
 390 LCD_DCLK1--->PLL1--->HDMI
 391 ************************************/
 392
 393 static int rk616_clk_common_init(struct mfd_rk616 *rk616)
 394 {
 395         u32 val = 0;
 396         int ret;
 397
 398         val = PLL1_CLK_SEL(LCD1_DCLK) | PLL0_CLK_SEL(LCD0_DCLK) | LCD1_CLK_DIV(0) |
 399                 LCD0_CLK_DIV(0) | PLL1_CLK_SEL_MASK | PLL0_CLK_SEL_MASK |
 400                 LCD1_CLK_DIV_MASK | LCD0_CLK_DIV_MASK; //pll1 clk from lcdc1_dclk,pll0 clk from lcdc0_dclk,mux_lcdx = lcdx_clk
 401         ret = rk616->write_dev(rk616,CRU_CLKSEL0_CON,&val);
 402
 403         val = SCLK_SEL(SCLK_SEL_PLL1) | CODEC_MCLK_SEL(CODEC_MCLK_SEL_12M) |
 404                 CODEC_MCLK_SEL_MASK | SCLK_SEL_MASK; //codec mclk from clkin
 405         ret = rk616->write_dev(rk616,CRU_CLKSEL1_CON,&val);
 406
 407         val = 0; //codec mck = clkin
 408         ret = rk616->write_dev(rk616,CRU_CODEC_DIV,&val);
 409
 410         val = (PLL0_BYPASS) | (PLL0_BYPASS << 16);  //bypass pll0
 411         ret = rk616->write_dev(rk616,CRU_PLL0_CON0,&val);
 412         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 413         ret = rk616->write_dev(rk616,CRU_PLL0_CON1,&val); //power down pll0
 414
 415         val = (PLL1_BYPASS) | (PLL1_BYPASS << 16);
 416         ret = rk616->write_dev(rk616,CRU_PLL1_CON0,&val);
 417
 418
 419         return 0;
 420 }
 421
 422 static int rk616_core_suspend(struct device *dev, pm_message_t state)
 423 {
 424         return 0;
 425 }
 426
 427 static int rk616_core_resume(struct device* dev)
 428 {
 429         struct mfd_rk616 *rk616 = dev_get_drvdata(dev);
 430         rk616_clk_common_init(rk616);
 431         return 0;
 432 }
 433 static int rk616_i2c_probe(struct i2c_client *client,const struct i2c_device_id *id)
 434 {
 435         int ret;
 436         struct mfd_rk616 *rk616 = NULL;
 437         struct clk *iis_clk;
 438
 439         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 440         {
 441                 dev_err(&client->dev, "Must have I2C_FUNC_I2C.\n");
 442                 ret = -ENODEV;
 443         }
 444         rk616 = kzalloc(sizeof(struct mfd_rk616), GFP_KERNEL);
 445         if (rk616 == NULL)
 446         {
 447                 printk(KERN_ALERT "alloc for struct rk616 fail\n");
 448                 ret = -ENOMEM;
 449         }
 450
 451         rk616->dev = &client->dev;
 452         rk616->pdata = client->dev.platform_data;
 453         rk616->client = client;
 454         i2c_set_clientdata(client, rk616);
 455         dev_set_drvdata(rk616->dev,rk616);
 456
 457 #if defined(CONFIG_SND_RK29_SOC_I2S_8CH)
 458         iis_clk = clk_get_sys("rk29_i2s.0", "i2s");
 459 #elif defined(CONFIG_SND_RK29_SOC_I2S_2CH)
 460         iis_clk = clk_get_sys("rk29_i2s.1", "i2s");
 461 #else
 462         iis_clk = clk_get_sys("rk29_i2s.2", "i2s");
 463 #endif
 464         if (IS_ERR(iis_clk))
 465         {
 466                 dev_err(&client->dev,"failed to get i2s clk\n");
 467                 ret = PTR_ERR(iis_clk);
 468         }
 469         else
 470         {
 471                 rk616->mclk = iis_clk;
 472
 473                 #if defined(CONFIG_ARCH_RK29)
 474                 rk29_mux_api_set(GPIO2D0_I2S0CLK_MIIRXCLKIN_NAME, GPIO2H_I2S0_CLK);
 475                 #else
 476                 iomux_set(I2S0_CLK);
 477                 #endif
 478                 clk_enable(iis_clk);
 479                 clk_set_rate(iis_clk, 11289600);
 480                 //clk_put(iis_clk);
 481         }
 482
 483         mutex_init(&rk616->reg_lock);
 484
 485         if(rk616->pdata->power_init)
 486                 rk616->pdata->power_init();
 487
 488         rk616->read_dev = rk616_i2c_read_reg;
 489         rk616->write_dev = rk616_i2c_write_reg;
 490         rk616->write_dev_bits = rk616_i2c_write_bits;
 491
 492 #if defined(CONFIG_DEBUG_FS)
 493         rk616->debugfs_dir = debugfs_create_dir("rk616", NULL);
 494         if (IS_ERR(rk616->debugfs_dir))
 495         {
 496                 dev_err(rk616->dev,"failed to create debugfs dir for rk616!\n");
 497         }
 498         else
 499                 debugfs_create_file("core", S_IRUSR,rk616->debugfs_dir,rk616,&rk616_reg_fops);
 500 #endif
 501         rk616_clk_common_init(rk616);
 502         ret = mfd_add_devices(rk616->dev, -1,
 503                                       rk616_devs, ARRAY_SIZE(rk616_devs),
 504                                       NULL, rk616->irq_base);
 505         dev_info(&client->dev,"rk616 core probe success!\n");
 506         return 0;
 507 }
 508
 509 static int __devexit rk616_i2c_remove(struct i2c_client *client)
 510 {
 511         return 0;
 512 }
 513
 514 static void rk616_core_shutdown(struct i2c_client *client)
 515 {
 516         struct mfd_rk616 *rk616 = i2c_get_clientdata(client);
 517         if(rk616->pdata->power_deinit)
 518                 rk616->pdata->power_deinit();
 519 }
 520
 521
 522 static const struct i2c_device_id id_table[] = {
 523         {"rk616", 0 },
 524         { }
 525 };
 526
 527 static struct i2c_driver rk616_i2c_driver  = {
 528         .driver = {
 529                 .name  = "rk616",
 530                 .owner = THIS_MODULE,
 531                 .suspend        = &rk616_core_suspend,
 532                 .resume         = &rk616_core_resume,
 533         },
 534         .probe          = &rk616_i2c_probe,
 535         .remove         = &rk616_i2c_remove,
 536         .shutdown       = &rk616_core_shutdown,
 537         .id_table       = id_table,
 538 };
 539
 540
 541 static int __init rk616_module_init(void)
 542 {
 543         return i2c_add_driver(&rk616_i2c_driver);
 544 }
 545
 546 static void __exit rk616_module_exit(void)
 547 {
 548         i2c_del_driver(&rk616_i2c_driver);
 549 }
 550
 551 subsys_initcall_sync(rk616_module_init);
 552 module_exit(rk616_module_exit);
 553
 554