drivers/mfd/rk616-core.c

   1 #include <linux/kernel.h>
   2 #include <linux/module.h>
   3 #include <linux/delay.h>
   4 #include <linux/mfd/core.h>
   5 #include <linux/slab.h>
   6 #include <linux/mfd/rk616.h>
   7 //#include <mach/iomux.h>
   8 #include <linux/err.h>
   9 #include <linux/uaccess.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/of_gpio.h>
  12 #include <linux/of_device.h>
  13 #if defined(CONFIG_DEBUG_FS)
  14 #include <linux/fs.h>
  15 #include <linux/debugfs.h>
  16 #include <linux/seq_file.h>
  17 #endif
  18
  19 #if defined(RK616_MIPI_DSI)
  20 #include "../video/rockchip/transmitter/rk616_mipi_dsi.h"
  21 #endif
  22
  23 #ifndef MHZ
  24 #define MHZ (1000*1000)
  25 #endif
  26
  27 static struct mfd_cell rk616_devs[] = {
  28         {
  29                 .name = "rk616-lvds",
  30                 .id = 0,
  31         },
  32         {
  33                 .name = "rk616-codec",
  34                 .id = 1,
  35         },
  36         {
  37                 .name = "rk616-hdmi",
  38                 .id = 2,
  39         },
  40         {
  41                 .name = "rk616-mipi",
  42                 .id = 3,
  43         },
  44 };
  45
  46 extern int rk_mipi_dsi_init_lite(void);
  47 void rk616_mclk_set_rate(struct clk *mclk,unsigned long rate)
  48 {
  49         clk_set_rate(mclk, rate);
  50 }
  51
  52 static int rk616_i2c_read_reg(struct mfd_rk616 *rk616, u16 reg,u32 *pval)
  53 {
  54         struct i2c_client * client = rk616->client;
  55         struct i2c_adapter *adap = client->adapter;
  56         struct i2c_msg msgs[2];
  57         int ret;
  58         char reg_buf[2];
  59
  60         memcpy(reg_buf, &reg, 2);
  61
  62         msgs[0].addr = client->addr;
  63         msgs[0].flags = client->flags;
  64         msgs[0].len = 2;
  65         msgs[0].buf = reg_buf;
  66         msgs[0].scl_rate = rk616->pdata->scl_rate;
  67         //msgs[0].udelay = client->udelay;
  68
  69         msgs[1].addr = client->addr;
  70         msgs[1].flags = client->flags | I2C_M_RD;
  71         msgs[1].len = 4;
  72         msgs[1].buf = (char *)pval;
  73         msgs[1].scl_rate = rk616->pdata->scl_rate;
  74         //msgs[1].udelay = client->udelay;
  75
  76         ret = i2c_transfer(adap, msgs, 2);
  77
  78
  79         return (ret == 2)? 4 : ret;
  80
  81 }
  82
  83 static int rk616_i2c_write_reg(struct mfd_rk616 *rk616, u16 reg,u32 *pval)
  84 {
  85         struct i2c_client *client = rk616->client;
  86         struct i2c_adapter *adap = client->adapter;
  87         struct i2c_msg msg;
  88         int ret;
  89         char *tx_buf = (char *)kmalloc(6, GFP_KERNEL);
  90         if(!tx_buf)
  91                 return -ENOMEM;
  92
  93         memcpy(tx_buf, &reg, 2);
  94         memcpy(tx_buf+2, (char *)pval, 4);
  95
  96         msg.addr = client->addr;
  97         msg.flags = client->flags;
  98         msg.len = 6;
  99         msg.buf = (char *)tx_buf;
 100         msg.scl_rate = rk616->pdata->scl_rate;
 101         //msg.udelay = client->udelay;
 102
 103         ret = i2c_transfer(adap, &msg, 1);
 104         kfree(tx_buf);
 105
 106         return (ret == 1) ? 4 : ret;
 107 }
 108
 109
 110 static int rk616_i2c_write_bits(struct mfd_rk616 *rk616, u16 reg,u32 mask,u32 *pval)
 111 {
 112
 113         struct i2c_client *client = rk616->client;
 114         struct i2c_adapter *adap = client->adapter;
 115         struct i2c_msg msg;
 116         int ret;
 117         u32 reg_val;
 118         char *tx_buf = NULL;
 119
 120         tx_buf = (char *)kmalloc(6, GFP_KERNEL);
 121         if(!tx_buf)
 122                 return -ENOMEM;
 123
 124         mutex_lock(&rk616->reg_lock);
 125         rk616->read_dev(rk616,reg,&reg_val);
 126         reg_val &= ~mask;
 127         *pval &= mask;
 128         reg_val |= *pval;
 129         *pval = reg_val;
 130         memcpy(tx_buf, &reg, 2);
 131         memcpy(tx_buf+2, (char *)pval, 4);
 132
 133         msg.addr = client->addr;
 134         msg.flags = client->flags;
 135         msg.len = 6;
 136         msg.buf = (char *)tx_buf;
 137         msg.scl_rate = rk616->pdata->scl_rate;
 138         //msg.udelay = client->udelay;
 139
 140         ret = i2c_transfer(adap, &msg, 1);
 141         kfree(tx_buf);
 142         mutex_unlock(&rk616->reg_lock);
 143
 144         return (ret == 1) ? 4 : ret;
 145 }
 146
 147
 148 static int rk616_i2c_bulk_write(struct mfd_rk616 *rk616, u16 reg,int count,u32 *pval)
 149 {
 150         const struct i2c_client *client = rk616->client;
 151         struct i2c_adapter *adap=client->adapter;
 152         struct i2c_msg msg;
 153         int ret;
 154
 155
 156         char *tx_buf = (char *)kmalloc((count<<2) + 2, GFP_KERNEL);
 157         if(!tx_buf)
 158                 return -ENOMEM;
 159
 160         memcpy(tx_buf, &reg, 2);
 161         memcpy(tx_buf+2, (char *)pval, count<<2);
 162
 163         msg.addr = client->addr;
 164         msg.flags = client->flags;
 165         msg.len = (count<<2) + 2;
 166         msg.buf = (char *)tx_buf;
 167         msg.scl_rate = rk616->pdata->scl_rate;
 168         //msg.udelay = client->udelay;
 169
 170         ret = i2c_transfer(adap, &msg, 1);
 171         kfree(tx_buf);
 172
 173         return (ret == 1) ? count : ret;
 174 }
 175
 176 #if defined(CONFIG_DEBUG_FS)
 177
 178 static int rk616_reg_show(struct seq_file *s, void *v)
 179 {
 180         int i = 0;
 181         u32 val = 0;
 182         struct mfd_rk616 *rk616 = s->private;
 183         if(!rk616)
 184         {
 185                 dev_err(rk616->dev,"no mfd rk616!\n");
 186                 return 0;
 187         }
 188
 189         for(i=0;i<= CRU_CFGMISC_CON;i+=4)
 190         {
 191                 rk616->read_dev(rk616,i,&val);
 192                 if(i%16==0)
 193                         seq_printf(s,"\n0x%04x:",i);
 194                 seq_printf(s," %08x",val);
 195         }
 196         seq_printf(s,"\n");
 197
 198         return 0;
 199 }
 200
 201 static ssize_t rk616_reg_write (struct file *file, const char __user *buf, size_t count, loff_t *ppos)
 202 {
 203         struct mfd_rk616 *rk616 = file->f_path.dentry->d_inode->i_private;
 204         u32 reg;
 205         u32 val;
 206
 207         char kbuf[25];
 208         if (copy_from_user(kbuf, buf, count))
 209                 return -EFAULT;
 210         sscanf(kbuf, "%x%x", &reg,&val);
 211         rk616->write_dev(rk616,reg,&val);
 212         return count;
 213 }
 214
 215 static int rk616_reg_open(struct inode *inode, struct file *file)
 216 {
 217         struct mfd_rk616 *rk616 = inode->i_private;
 218         return single_open(file,rk616_reg_show,rk616);
 219 }
 220
 221 static const struct file_operations rk616_reg_fops = {
 222         .owner          = THIS_MODULE,
 223         .open           = rk616_reg_open,
 224         .read           = seq_read,
 225         .write          = rk616_reg_write,
 226         .llseek         = seq_lseek,
 227         .release        = single_release,
 228 };
 229 #endif
 230
 231
 232 static u32 rk616_clk_gcd(u32 numerator, u32 denominator)
 233 {
 234         u32 a, b;
 235
 236         if (!numerator || !denominator)
 237                 return 0;
 238
 239         if (numerator > denominator) {
 240                 a = numerator;
 241                 b = denominator;
 242         } else {
 243                 a = denominator;
 244                 b = numerator;
 245         }
 246
 247         while (b != 0) {
 248                 int r = b;
 249                 b = a % b;
 250                 a = r;
 251         }
 252
 253         return a;
 254 }
 255
 256
 257 static int rk616_pll_par_calc(u32 fin_hz,u32 fout_hz,u32 *refdiv, u32 *fbdiv,
 258                                         u32 *postdiv1, u32 *postdiv2, u32 *frac)
 259 {
 260         // FIXME set postdiv1/2 always 1
 261         u32 gcd;
 262         u64 fin_64, frac_64;
 263         u32 f_frac;
 264         if(!fin_hz || !fout_hz)
 265                 return -EINVAL;
 266
 267         if(fin_hz / MHZ * MHZ == fin_hz && fout_hz /MHZ * MHZ == fout_hz)
 268         {
 269                 fin_hz /= MHZ;
 270                 fout_hz /= MHZ;
 271                 gcd = rk616_clk_gcd(fin_hz, fout_hz);
 272                 *refdiv = fin_hz / gcd;
 273                 *fbdiv = fout_hz / gcd;
 274                 *postdiv1 = 1;
 275                 *postdiv2 = 1;
 276
 277                 *frac = 0;
 278
 279         }
 280         else
 281         {
 282
 283                 gcd = rk616_clk_gcd(fin_hz / MHZ, fout_hz / MHZ);
 284                 *refdiv = fin_hz / MHZ / gcd;
 285                 *fbdiv = fout_hz / MHZ / gcd;
 286                 *postdiv1 = 1;
 287                 *postdiv2 = 1;
 288
 289                 *frac = 0;
 290
 291                 f_frac = (fout_hz % MHZ);
 292                 fin_64 = fin_hz;
 293                 do_div(fin_64, (u64)*refdiv);
 294                 frac_64 = (u64)f_frac << 24;
 295                 do_div(frac_64, fin_64);
 296                 *frac = (u32) frac_64;
 297                 printk(KERN_INFO "frac_64=%llx, frac=%u\n", frac_64, *frac);
 298         }
 299         printk(KERN_INFO "fin=%u,fout=%u,gcd=%u,refdiv=%u,fbdiv=%u,postdiv1=%u,postdiv2=%u,frac=%u\n",
 300                                 fin_hz, fout_hz, gcd, *refdiv, *fbdiv, *postdiv1, *postdiv2, *frac);
 301         return 0;
 302 }
 303
 304
 305 static  int  rk616_pll_wait_lock(struct mfd_rk616 *rk616,int id)
 306 {
 307         u32 delay = 10;
 308         u32 val = 0;
 309         int ret;
 310         int offset;
 311
 312         if(id == 0)  //PLL0
 313         {
 314                 offset = 0;
 315         }
 316         else // PLL1
 317         {
 318                 offset = 0x0c;
 319         }
 320         while (delay >= 1)
 321         {
 322                 ret = rk616->read_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 323                 if (val&PLL0_LOCK)
 324                 {
 325                         rk616_dbg(rk616->dev,"PLL%d locked\n",id);
 326                         break;
 327                 }
 328                 msleep(1);
 329                 delay--;
 330         }
 331         if (delay == 0)
 332         {
 333                 dev_err(rk616->dev,"rk616 wait PLL%d lock time out!\n",id);
 334         }
 335
 336         return 0;
 337 }
 338
 339
 340
 341 int rk616_pll_pwr_down(struct mfd_rk616 *rk616,int id)
 342 {
 343         u32 val = 0;
 344         int ret;
 345         int offset;
 346         if(id == 0)  //PLL0
 347         {
 348                 offset = 0;
 349         }
 350         else // PLL1
 351         {
 352                 offset = 0x0c;
 353         }
 354
 355
 356         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 357         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 358
 359         return 0;
 360
 361 }
 362
 363
 364
 365 int rk616_pll_set_rate(struct mfd_rk616 *rk616,int id,u32 cfg_val,u32 frac)
 366 {
 367         u32 val = 0;
 368         int ret;
 369         int offset;
 370         u16 con0 = cfg_val & 0xffff;
 371         u16 con1 = (cfg_val >> 16)&0xffff;
 372         u32 fbdiv = con0 & 0xfff;
 373         u32 postdiv1 = (con0 >> 12)&0x7;
 374         u32 refdiv = con1 & 0x3f;
 375         u32 postdiv2 = (con1 >> 6) & 0x7;
 376         u8 mode = !frac;
 377
 378         if(id == 0)  //PLL0
 379         {
 380                 if(((rk616->pll0_rate >> 32) == cfg_val) &&
 381                         ((rk616->pll0_rate & 0xffffffff) == frac))
 382                 {
 383                         //return 0;
 384                 }
 385                 rk616->pll0_rate = ((u64)cfg_val << 32) | frac;
 386                 offset = 0;
 387         }
 388         else // PLL1
 389         {
 390                 if(((rk616->pll1_rate >> 32) == cfg_val) &&
 391                         ((rk616->pll1_rate & 0xffffffff) == frac))
 392                 {
 393                         // return 0;
 394                 }
 395                 rk616->pll1_rate = ((u64)cfg_val << 32) | frac;
 396                 offset = 0x0c;
 397         }
 398
 399
 400         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 401         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 402
 403
 404         ret = rk616->read_dev(rk616,CRU_PLL0_CON2 + offset,&val);
 405         val &= 0xff000000;
 406         if(frac)
 407                 val |= PLL0_FRAC(frac);
 408         else
 409                 val |= 0x800000; //default value
 410         ret = rk616->write_dev(rk616,CRU_PLL0_CON2 + offset,&val);
 411
 412         val = PLL0_POSTDIV1(postdiv1) | PLL0_FBDIV(fbdiv) | PLL0_POSTDIV1_MASK |
 413                 PLL0_FBDIV_MASK | (PLL0_BYPASS << 16);
 414         ret = rk616->write_dev(rk616,CRU_PLL0_CON0 + offset,&val);
 415
 416         val = PLL0_DIV_MODE(mode) | PLL0_POSTDIV2(postdiv2) | PLL0_REFDIV(refdiv) |
 417                 (PLL0_DIV_MODE_MASK) | PLL0_POSTDIV2_MASK | PLL0_REFDIV_MASK;
 418         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 419
 420         val = (PLL0_PWR_DN << 16);
 421         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 422
 423         rk616_pll_wait_lock(rk616,id);
 424
 425         msleep(5);
 426
 427         return 0;
 428
 429 }
 430 /***********************************
 431 default clk patch settiing:
 432 CLKIN-------->CODEC
 433 LCD_DCLK0--->PLL0--->Dither--->LVDS/MIPI
 434 LCD_DCLK1--->PLL1--->HDMI
 435 ************************************/
 436
 437 static int rk616_clk_common_init(struct mfd_rk616 *rk616)
 438 {
 439         u32 val = 0;
 440         int ret;
 441
 442         val = PLL1_CLK_SEL(LCD1_DCLK) | PLL0_CLK_SEL(LCD0_DCLK) | LCD1_CLK_DIV(0) |
 443                 LCD0_CLK_DIV(0) | PLL1_CLK_SEL_MASK | PLL0_CLK_SEL_MASK |
 444                 LCD1_CLK_DIV_MASK | LCD0_CLK_DIV_MASK; //pll1 clk from lcdc1_dclk,pll0 clk from lcdc0_dclk,mux_lcdx = lcdx_clk
 445         ret = rk616->write_dev(rk616,CRU_CLKSEL0_CON,&val);
 446
 447         val = SCLK_SEL(SCLK_SEL_PLL1) | CODEC_MCLK_SEL(CODEC_MCLK_SEL_12M) |
 448                 CODEC_MCLK_SEL_MASK | SCLK_SEL_MASK; //codec mclk from clkin
 449         ret = rk616->write_dev(rk616,CRU_CLKSEL1_CON,&val);
 450
 451         val = 0; //codec mck = clkin
 452         ret = rk616->write_dev(rk616,CRU_CODEC_DIV,&val);
 453
 454         val = (PLL0_BYPASS) | (PLL0_BYPASS << 16);  //bypass pll0
 455         ret = rk616->write_dev(rk616,CRU_PLL0_CON0,&val);
 456         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 457         ret = rk616->write_dev(rk616,CRU_PLL0_CON1,&val); //power down pll0
 458
 459         val = (PLL1_BYPASS) | (PLL1_BYPASS << 16);
 460         ret = rk616->write_dev(rk616,CRU_PLL1_CON0,&val);
 461
 462
 463         return 0;
 464 }
 465
 466 static int rk616_core_suspend(struct device *dev, pm_message_t state)
 467 {
 468         return 0;
 469 }
 470
 471 static int rk616_core_resume(struct device* dev)
 472 {
 473         struct mfd_rk616 *rk616 = dev_get_drvdata(dev);
 474         rk616_clk_common_init(rk616);
 475         return 0;
 476 }
 477
 478 #ifdef CONFIG_OF
 479 static struct rk616_platform_data *rk616_parse_dt(struct mfd_rk616 *rk616)
 480 {
 481         struct rk616_platform_data *pdata = NULL;
 482         struct device_node *rk616_np = rk616->dev->of_node;
 483         int val = 0,gpio = 0;
 484
 485         if (!rk616_np) {
 486                 printk("could not find rk616 node\n");
 487                 return NULL;
 488         }
 489
 490         pdata = devm_kzalloc(rk616->dev, sizeof(struct rk616_platform_data), GFP_KERNEL);
 491         if (!pdata) {
 492                 dev_err(rk616->dev, "rk616_platform_data kmalloc fail!");
 493                 return NULL;
 494         }
 495
 496         if(!of_property_read_u32(rk616_np, "rk616,scl_rate", &val))
 497                 pdata->scl_rate = val;
 498
 499         if(!of_property_read_u32(rk616_np, "rk616,lcd0_func", &val))
 500                 pdata->lcd0_func = val;
 501
 502         if(!of_property_read_u32(rk616_np, "rk616,lcd1_func", &val))
 503                 pdata->lcd1_func = val;
 504
 505         if(!of_property_read_u32(rk616_np, "rk616,lvds_ch_nr", &val))
 506                 pdata->lvds_ch_nr = val;
 507
 508         gpio = of_get_named_gpio(rk616_np,"rk616,hdmi_irq_gpio", 0);
 509         if (!gpio_is_valid(gpio))
 510                 printk("invalid hdmi_irq_gpio: %d\n",gpio);
 511         pdata->hdmi_irq = gpio;
 512
 513         gpio = of_get_named_gpio(rk616_np,"rk616,spk_ctl_gpio", 0);
 514         if (!gpio_is_valid(gpio))
 515                 printk("invalid spk_ctl_gpio: %d\n",gpio);
 516         pdata->spk_ctl_gpio = gpio;
 517         //TODO Daisen >>pwr gpio wait to add
 518
 519         return pdata;
 520 }
 521 #else
 522 static struct rk616_platform_data *rk616_parse_dt(struct mfd_rk616 *rk616)
 523 {
 524         return NULL;
 525 }
 526 #endif
 527
 528 #if defined(CONFIG_OF)
 529 static const struct of_device_id rk616_dt_ids[] = {
 530         {.compatible = "rockchip,rk616",},
 531         {}
 532 };
 533 MODULE_DEVICE_TABLE(of, rk616_dt_ids);
 534 #endif
 535
 536
 537 static int rk616_i2c_probe(struct i2c_client *client,const struct i2c_device_id *id)
 538 {
 539         int ret;
 540         struct mfd_rk616 *rk616 = NULL;
 541         struct clk *iis_clk;
 542
 543         if (client->dev.of_node) {
 544                 if (!of_match_device(rk616_dt_ids, &client->dev)) {
 545                         dev_err(&client->dev, "Failed to find matching dt id\n");
 546                         return -EINVAL;
 547                 }
 548         }
 549
 550         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 551         {
 552                 dev_err(&client->dev, "Must have I2C_FUNC_I2C.\n");
 553                 ret = -ENODEV;
 554         }
 555         rk616 = kzalloc(sizeof(struct mfd_rk616), GFP_KERNEL);
 556         if (rk616 == NULL)
 557         {
 558                 printk(KERN_ALERT "alloc for struct rk616 fail\n");
 559                 ret = -ENOMEM;
 560         }
 561
 562         rk616->dev = &client->dev;
 563         rk616->pdata = rk616_parse_dt(rk616);
 564         rk616->client = client;
 565         i2c_set_clientdata(client, rk616);
 566         dev_set_drvdata(rk616->dev,rk616);
 567
 568 #if defined(CONFIG_SND_RK29_SOC_I2S_8CH)
 569         iis_clk = clk_get_sys("rk29_i2s.0", "i2s");
 570 #elif defined(CONFIG_SND_RK29_SOC_I2S_2CH)
 571         iis_clk = clk_get_sys("rk29_i2s.1", "i2s");
 572 #else
 573         iis_clk = clk_get_sys("rk29_i2s.2", "i2s");
 574 #endif
 575         if (IS_ERR(iis_clk))
 576         {
 577                 dev_err(&client->dev,"failed to get i2s clk\n");
 578                 ret = PTR_ERR(iis_clk);
 579         }
 580         else
 581         {
 582                 rk616->mclk = iis_clk;
 583
 584                 #if defined(CONFIG_ARCH_RK29)
 585                 rk29_mux_api_set(GPIO2D0_I2S0CLK_MIIRXCLKIN_NAME, GPIO2H_I2S0_CLK);
 586                 #else
 587                 //iomux_set(I2S0_MCLK); //set at i2s driver
 588                 #endif
 589                 clk_enable(iis_clk);
 590                 //clk_set_rate(iis_clk, 11289600);
 591                 rk616_mclk_set_rate(iis_clk,11289600);
 592                 //clk_put(iis_clk);
 593         }
 594
 595         mutex_init(&rk616->reg_lock);
 596
 597         if(rk616->pdata->power_init)
 598                 rk616->pdata->power_init();
 599
 600         rk616->read_dev = rk616_i2c_read_reg;
 601         rk616->write_dev = rk616_i2c_write_reg;
 602         rk616->write_dev_bits = rk616_i2c_write_bits;
 603         rk616->write_bulk = rk616_i2c_bulk_write;
 604
 605 #if defined(CONFIG_DEBUG_FS)
 606         rk616->debugfs_dir = debugfs_create_dir("rk616", NULL);
 607         if (IS_ERR(rk616->debugfs_dir))
 608         {
 609                 dev_err(rk616->dev,"failed to create debugfs dir for rk616!\n");
 610         }
 611         else
 612                 debugfs_create_file("core", S_IRUSR,rk616->debugfs_dir,rk616,&rk616_reg_fops);
 613 #endif
 614         rk616_clk_common_init(rk616);
 615         ret = mfd_add_devices(rk616->dev, -1,
 616                                       rk616_devs, ARRAY_SIZE(rk616_devs),
 617                                       NULL, rk616->irq_base, NULL);
 618
 619         dev_info(&client->dev,"rk616 core probe success!\n");
 620         return 0;
 621 }
 622
 623 static int rk616_i2c_remove(struct i2c_client *client)
 624 {
 625         return 0;
 626 }
 627
 628 static void rk616_core_shutdown(struct i2c_client *client)
 629 {
 630         struct mfd_rk616 *rk616 = i2c_get_clientdata(client);
 631         if(rk616->pdata->power_deinit)
 632                 rk616->pdata->power_deinit();
 633 }
 634
 635
 636 static const struct i2c_device_id id_table[] = {
 637         {"rk616", 0 },
 638         { }
 639 };
 640
 641 static struct i2c_driver rk616_i2c_driver  = {
 642         .driver = {
 643                 .name  = "rk616",
 644                 .owner = THIS_MODULE,
 645                 .suspend        = &rk616_core_suspend,
 646                 .resume         = &rk616_core_resume,
 647                 .of_match_table = of_match_ptr(rk616_dt_ids),
 648         },
 649         .probe          = &rk616_i2c_probe,
 650         .remove         = &rk616_i2c_remove,
 651         .shutdown       = &rk616_core_shutdown,
 652         .id_table       = id_table,
 653 };
 654
 655
 656 static int __init rk616_module_init(void)
 657 {
 658         return i2c_add_driver(&rk616_i2c_driver);
 659 }
 660
 661 static void __exit rk616_module_exit(void)
 662 {
 663         i2c_del_driver(&rk616_i2c_driver);
 664 }
 665
 666 subsys_initcall_sync(rk616_module_init);
 667 module_exit(rk616_module_exit);
 668
 669