drivers/mfd/rk616-core.c

   1 #include <linux/kernel.h>
   2 #include <linux/module.h>
   3 #include <linux/delay.h>
   4 #include <linux/mfd/core.h>
   5 #include <linux/slab.h>
   6 #include <linux/mfd/rk616.h>
   7 #include <mach/iomux.h>
   8 #include <linux/err.h>
   9 #include <linux/uaccess.h>
  10 #if defined(CONFIG_DEBUG_FS)
  11 #include <linux/fs.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/seq_file.h>
  14 #endif
  15
  16 #if defined(RK616_MIPI_DSI)
  17 #include "../video/rockchip/transmitter/rk616_mipi_dsi.h"
  18 #endif
  19
  20 #ifndef MHZ
  21 #define MHZ (1000*1000)
  22 #endif
  23
  24 static struct mfd_cell rk616_devs[] = {
  25         {
  26                 .name = "rk616-lvds",
  27                 .id = 0,
  28         },
  29         {
  30                 .name = "rk616-codec",
  31                 .id = 1,
  32         },
  33         {
  34                 .name = "rk616-hdmi",
  35                 .id = 2,
  36         },
  37         {
  38                 .name = "rk616-mipi",
  39                 .id = 3,
  40         },
  41 };
  42
  43 extern int rk_mipi_dsi_init_lite(void);
  44 void rk616_mclk_set_rate(struct clk *mclk,unsigned long rate)
  45 {
  46         clk_set_rate(mclk, rate);
  47
  48 #if defined(CONFIG_RK616_MIPI_DSI)
  49         rk_mipi_dsi_init_lite();
  50 #endif
  51
  52 }
  53
  54 static int rk616_i2c_read_reg(struct mfd_rk616 *rk616, u16 reg,u32 *pval)
  55 {
  56         struct i2c_client * client = rk616->client;
  57         struct i2c_adapter *adap = client->adapter;
  58         struct i2c_msg msgs[2];
  59         int ret;
  60         char reg_buf[2];
  61
  62         memcpy(reg_buf, &reg, 2);
  63
  64         msgs[0].addr = client->addr;
  65         msgs[0].flags = client->flags;
  66         msgs[0].len = 2;
  67         msgs[0].buf = reg_buf;
  68         msgs[0].scl_rate = rk616->pdata->scl_rate;
  69         msgs[0].udelay = client->udelay;
  70
  71         msgs[1].addr = client->addr;
  72         msgs[1].flags = client->flags | I2C_M_RD;
  73         msgs[1].len = 4;
  74         msgs[1].buf = (char *)pval;
  75         msgs[1].scl_rate = rk616->pdata->scl_rate;
  76         msgs[1].udelay = client->udelay;
  77
  78         ret = i2c_transfer(adap, msgs, 2);
  79
  80
  81         return (ret == 2)? 4 : ret;
  82
  83 }
  84
  85 static int rk616_i2c_write_reg(struct mfd_rk616 *rk616, u16 reg,u32 *pval)
  86 {
  87         struct i2c_client *client = rk616->client;
  88         struct i2c_adapter *adap = client->adapter;
  89         struct i2c_msg msg;
  90         int ret;
  91         char *tx_buf = (char *)kmalloc(6, GFP_KERNEL);
  92         if(!tx_buf)
  93                 return -ENOMEM;
  94
  95         memcpy(tx_buf, &reg, 2);
  96         memcpy(tx_buf+2, (char *)pval, 4);
  97
  98         msg.addr = client->addr;
  99         msg.flags = client->flags;
 100         msg.len = 6;
 101         msg.buf = (char *)tx_buf;
 102         msg.scl_rate = rk616->pdata->scl_rate;
 103         msg.udelay = client->udelay;
 104
 105         ret = i2c_transfer(adap, &msg, 1);
 106         kfree(tx_buf);
 107
 108         return (ret == 1) ? 4 : ret;
 109 }
 110
 111
 112 static int rk616_i2c_write_bits(struct mfd_rk616 *rk616, u16 reg,u32 mask,u32 *pval)
 113 {
 114
 115         struct i2c_client *client = rk616->client;
 116         struct i2c_adapter *adap = client->adapter;
 117         struct i2c_msg msg;
 118         int ret;
 119         u32 reg_val;
 120         char *tx_buf = NULL;
 121
 122         tx_buf = (char *)kmalloc(6, GFP_KERNEL);
 123         if(!tx_buf)
 124                 return -ENOMEM;
 125
 126         mutex_lock(&rk616->reg_lock);
 127         rk616->read_dev(rk616,reg,&reg_val);
 128         reg_val &= ~mask;
 129         *pval &= mask;
 130         reg_val |= *pval;
 131         *pval = reg_val;
 132         memcpy(tx_buf, &reg, 2);
 133         memcpy(tx_buf+2, (char *)pval, 4);
 134
 135         msg.addr = client->addr;
 136         msg.flags = client->flags;
 137         msg.len = 6;
 138         msg.buf = (char *)tx_buf;
 139         msg.scl_rate = rk616->pdata->scl_rate;
 140         msg.udelay = client->udelay;
 141
 142         ret = i2c_transfer(adap, &msg, 1);
 143         kfree(tx_buf);
 144         mutex_unlock(&rk616->reg_lock);
 145
 146         return (ret == 1) ? 4 : ret;
 147 }
 148 #if defined(CONFIG_DEBUG_FS)
 149 static int rk616_reg_show(struct seq_file *s, void *v)
 150 {
 151         int i = 0;
 152         u32 val = 0;
 153         struct mfd_rk616 *rk616 = s->private;
 154         if(!rk616)
 155         {
 156                 dev_err(rk616->dev,"no mfd rk616!\n");
 157                 return 0;
 158         }
 159
 160         for(i=0;i<= CRU_CFGMISC_CON;i+=4)
 161         {
 162                 rk616->read_dev(rk616,i,&val);
 163                 if(i%16==0)
 164                         seq_printf(s,"\n0x%04x:",i);
 165                 seq_printf(s," %08x",val);
 166         }
 167         seq_printf(s,"\n");
 168
 169         return 0;
 170 }
 171
 172 static ssize_t rk616_reg_write (struct file *file, const char __user *buf, size_t count, loff_t *ppos)
 173 {
 174         struct mfd_rk616 *rk616 = file->f_path.dentry->d_inode->i_private;
 175         u32 reg;
 176         u32 val;
 177
 178         char kbuf[25];
 179         if (copy_from_user(kbuf, buf, count))
 180                 return -EFAULT;
 181         sscanf(kbuf, "%x%x", &reg,&val);
 182         rk616->write_dev(rk616,reg,&val);
 183         return count;
 184 }
 185
 186 static int rk616_reg_open(struct inode *inode, struct file *file)
 187 {
 188         struct mfd_rk616 *rk616 = inode->i_private;
 189         return single_open(file,rk616_reg_show,rk616);
 190 }
 191
 192 static const struct file_operations rk616_reg_fops = {
 193         .owner          = THIS_MODULE,
 194         .open           = rk616_reg_open,
 195         .read           = seq_read,
 196         .write          = rk616_reg_write,
 197         .llseek         = seq_lseek,
 198         .release        = single_release,
 199 };
 200 #endif
 201
 202
 203 static u32 rk616_clk_gcd(u32 numerator, u32 denominator)
 204 {
 205         u32 a, b;
 206
 207         if (!numerator || !denominator)
 208                 return 0;
 209
 210         if (numerator > denominator) {
 211                 a = numerator;
 212                 b = denominator;
 213         } else {
 214                 a = denominator;
 215                 b = numerator;
 216         }
 217
 218         while (b != 0) {
 219                 int r = b;
 220                 b = a % b;
 221                 a = r;
 222         }
 223
 224         return a;
 225 }
 226
 227
 228 static int rk616_pll_par_calc(u32 fin_hz,u32 fout_hz,u32 *refdiv, u32 *fbdiv,
 229                                         u32 *postdiv1, u32 *postdiv2, u32 *frac)
 230 {
 231         // FIXME set postdiv1/2 always 1
 232         u32 gcd;
 233         u64 fin_64, frac_64;
 234         u32 f_frac;
 235         if(!fin_hz || !fout_hz)
 236                 return -EINVAL;
 237
 238         if(fin_hz / MHZ * MHZ == fin_hz && fout_hz /MHZ * MHZ == fout_hz)
 239         {
 240                 fin_hz /= MHZ;
 241                 fout_hz /= MHZ;
 242                 gcd = rk616_clk_gcd(fin_hz, fout_hz);
 243                 *refdiv = fin_hz / gcd;
 244                 *fbdiv = fout_hz / gcd;
 245                 *postdiv1 = 1;
 246                 *postdiv2 = 1;
 247
 248                 *frac = 0;
 249
 250         }
 251         else
 252         {
 253
 254                 gcd = rk616_clk_gcd(fin_hz / MHZ, fout_hz / MHZ);
 255                 *refdiv = fin_hz / MHZ / gcd;
 256                 *fbdiv = fout_hz / MHZ / gcd;
 257                 *postdiv1 = 1;
 258                 *postdiv2 = 1;
 259
 260                 *frac = 0;
 261
 262                 f_frac = (fout_hz % MHZ);
 263                 fin_64 = fin_hz;
 264                 do_div(fin_64, (u64)*refdiv);
 265                 frac_64 = (u64)f_frac << 24;
 266                 do_div(frac_64, fin_64);
 267                 *frac = (u32) frac_64;
 268                 printk(KERN_INFO "frac_64=%llx, frac=%u\n", frac_64, *frac);
 269         }
 270         printk(KERN_INFO "fin=%u,fout=%u,gcd=%u,refdiv=%u,fbdiv=%u,postdiv1=%u,postdiv2=%u,frac=%u\n",
 271                                 fin_hz, fout_hz, gcd, *refdiv, *fbdiv, *postdiv1, *postdiv2, *frac);
 272         return 0;
 273 }
 274
 275
 276 static  int  rk616_pll_wait_lock(struct mfd_rk616 *rk616,int id)
 277 {
 278         u32 delay = 10;
 279         u32 val = 0;
 280         int ret;
 281         int offset;
 282
 283         if(id == 0)  //PLL0
 284         {
 285                 offset = 0;
 286         }
 287         else // PLL1
 288         {
 289                 offset = 0x0c;
 290         }
 291         while (delay >= 1)
 292         {
 293                 ret = rk616->read_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 294                 if (val&PLL0_LOCK)
 295                 {
 296                         rk616_dbg(rk616->dev,"PLL%d locked\n",id);
 297                         break;
 298                 }
 299                 msleep(1);
 300                 delay--;
 301         }
 302         if (delay == 0)
 303         {
 304                 dev_err(rk616->dev,"rk616 wait PLL%d lock time out!\n",id);
 305         }
 306
 307         return 0;
 308 }
 309
 310
 311
 312 int rk616_pll_pwr_down(struct mfd_rk616 *rk616,int id)
 313 {
 314         u32 val = 0;
 315         int ret;
 316         int offset;
 317         if(id == 0)  //PLL0
 318         {
 319                 offset = 0;
 320         }
 321         else // PLL1
 322         {
 323                 offset = 0x0c;
 324         }
 325
 326
 327         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 328         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 329
 330         return 0;
 331
 332 }
 333
 334
 335
 336 int rk616_pll_set_rate(struct mfd_rk616 *rk616,int id,u32 cfg_val,u32 frac)
 337 {
 338         u32 val = 0;
 339         int ret;
 340         int offset;
 341         u16 con0 = cfg_val & 0xffff;
 342         u16 con1 = (cfg_val >> 16)&0xffff;
 343         u32 fbdiv = con0 & 0xfff;
 344         u32 postdiv1 = (con0 >> 12)&0x7;
 345         u32 refdiv = con1 & 0x3f;
 346         u32 postdiv2 = (con1 >> 6) & 0x7;
 347         u8 mode = !frac;
 348
 349         if(id == 0)  //PLL0
 350         {
 351                 if(((rk616->pll0_rate >> 32) == cfg_val) &&
 352                         ((rk616->pll0_rate & 0xffffffff) == frac))
 353                 {
 354                         //return 0;
 355                 }
 356                 rk616->pll0_rate = ((u64)cfg_val << 32) | frac;
 357                 offset = 0;
 358         }
 359         else // PLL1
 360         {
 361                 if(((rk616->pll1_rate >> 32) == cfg_val) &&
 362                         ((rk616->pll1_rate & 0xffffffff) == frac))
 363                 {
 364                         // return 0;
 365                 }
 366                 rk616->pll1_rate = ((u64)cfg_val << 32) | frac;
 367                 offset = 0x0c;
 368         }
 369
 370
 371         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 372         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 373
 374
 375         ret = rk616->read_dev(rk616,CRU_PLL0_CON2 + offset,&val);
 376         val &= 0xff000000;
 377         if(frac)
 378                 val |= PLL0_FRAC(frac);
 379         else
 380                 val |= 0x800000; //default value
 381         ret = rk616->write_dev(rk616,CRU_PLL0_CON2 + offset,&val);
 382
 383         val = PLL0_POSTDIV1(postdiv1) | PLL0_FBDIV(fbdiv) | PLL0_POSTDIV1_MASK |
 384                 PLL0_FBDIV_MASK | (PLL0_BYPASS << 16);
 385         ret = rk616->write_dev(rk616,CRU_PLL0_CON0 + offset,&val);
 386
 387         val = PLL0_DIV_MODE(mode) | PLL0_POSTDIV2(postdiv2) | PLL0_REFDIV(refdiv) |
 388                 (PLL0_DIV_MODE_MASK) | PLL0_POSTDIV2_MASK | PLL0_REFDIV_MASK;
 389         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 390
 391         val = (PLL0_PWR_DN << 16);
 392         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 393
 394         rk616_pll_wait_lock(rk616,id);
 395
 396         msleep(5);
 397
 398         return 0;
 399
 400 }
 401 /***********************************
 402 default clk patch settiing:
 403 CLKIN-------->CODEC
 404 LCD_DCLK0--->PLL0--->Dither--->LVDS/MIPI
 405 LCD_DCLK1--->PLL1--->HDMI
 406 ************************************/
 407
 408 static int rk616_clk_common_init(struct mfd_rk616 *rk616)
 409 {
 410         u32 val = 0;
 411         int ret;
 412
 413         val = PLL1_CLK_SEL(LCD1_DCLK) | PLL0_CLK_SEL(LCD0_DCLK) | LCD1_CLK_DIV(0) |
 414                 LCD0_CLK_DIV(0) | PLL1_CLK_SEL_MASK | PLL0_CLK_SEL_MASK |
 415                 LCD1_CLK_DIV_MASK | LCD0_CLK_DIV_MASK; //pll1 clk from lcdc1_dclk,pll0 clk from lcdc0_dclk,mux_lcdx = lcdx_clk
 416         ret = rk616->write_dev(rk616,CRU_CLKSEL0_CON,&val);
 417
 418         val = SCLK_SEL(SCLK_SEL_PLL1) | CODEC_MCLK_SEL(CODEC_MCLK_SEL_12M) |
 419                 CODEC_MCLK_SEL_MASK | SCLK_SEL_MASK; //codec mclk from clkin
 420         ret = rk616->write_dev(rk616,CRU_CLKSEL1_CON,&val);
 421
 422         val = 0; //codec mck = clkin
 423         ret = rk616->write_dev(rk616,CRU_CODEC_DIV,&val);
 424
 425         val = (PLL0_BYPASS) | (PLL0_BYPASS << 16);  //bypass pll0
 426         ret = rk616->write_dev(rk616,CRU_PLL0_CON0,&val);
 427         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 428         ret = rk616->write_dev(rk616,CRU_PLL0_CON1,&val); //power down pll0
 429
 430         val = (PLL1_BYPASS) | (PLL1_BYPASS << 16);
 431         ret = rk616->write_dev(rk616,CRU_PLL1_CON0,&val);
 432
 433
 434         return 0;
 435 }
 436
 437 static int rk616_core_suspend(struct device *dev, pm_message_t state)
 438 {
 439         return 0;
 440 }
 441
 442 static int rk616_core_resume(struct device* dev)
 443 {
 444         struct mfd_rk616 *rk616 = dev_get_drvdata(dev);
 445         rk616_clk_common_init(rk616);
 446         return 0;
 447 }
 448 static int rk616_i2c_probe(struct i2c_client *client,const struct i2c_device_id *id)
 449 {
 450         int ret;
 451         struct mfd_rk616 *rk616 = NULL;
 452         struct clk *iis_clk;
 453
 454         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 455         {
 456                 dev_err(&client->dev, "Must have I2C_FUNC_I2C.\n");
 457                 ret = -ENODEV;
 458         }
 459         rk616 = kzalloc(sizeof(struct mfd_rk616), GFP_KERNEL);
 460         if (rk616 == NULL)
 461         {
 462                 printk(KERN_ALERT "alloc for struct rk616 fail\n");
 463                 ret = -ENOMEM;
 464         }
 465
 466         rk616->dev = &client->dev;
 467         rk616->pdata = client->dev.platform_data;
 468         rk616->client = client;
 469         i2c_set_clientdata(client, rk616);
 470         dev_set_drvdata(rk616->dev,rk616);
 471
 472 #if defined(CONFIG_SND_RK29_SOC_I2S_8CH)
 473         iis_clk = clk_get_sys("rk29_i2s.0", "i2s");
 474 #elif defined(CONFIG_SND_RK29_SOC_I2S_2CH)
 475         iis_clk = clk_get_sys("rk29_i2s.1", "i2s");
 476 #else
 477         iis_clk = clk_get_sys("rk29_i2s.2", "i2s");
 478 #endif
 479         if (IS_ERR(iis_clk))
 480         {
 481                 dev_err(&client->dev,"failed to get i2s clk\n");
 482                 ret = PTR_ERR(iis_clk);
 483         }
 484         else
 485         {
 486                 rk616->mclk = iis_clk;
 487
 488                 #if defined(CONFIG_ARCH_RK29)
 489                 rk29_mux_api_set(GPIO2D0_I2S0CLK_MIIRXCLKIN_NAME, GPIO2H_I2S0_CLK);
 490                 #else
 491                 iomux_set(I2S0_MCLK);
 492                 #endif
 493                 clk_enable(iis_clk);
 494                 //clk_set_rate(iis_clk, 11289600);
 495                 rk616_mclk_set_rate(iis_clk,11289600);
 496                 //clk_put(iis_clk);
 497         }
 498
 499         mutex_init(&rk616->reg_lock);
 500
 501         if(rk616->pdata->power_init)
 502                 rk616->pdata->power_init();
 503
 504         rk616->read_dev = rk616_i2c_read_reg;
 505         rk616->write_dev = rk616_i2c_write_reg;
 506         rk616->write_dev_bits = rk616_i2c_write_bits;
 507
 508 #if defined(CONFIG_DEBUG_FS)
 509         rk616->debugfs_dir = debugfs_create_dir("rk616", NULL);
 510         if (IS_ERR(rk616->debugfs_dir))
 511         {
 512                 dev_err(rk616->dev,"failed to create debugfs dir for rk616!\n");
 513         }
 514         else
 515                 debugfs_create_file("core", S_IRUSR,rk616->debugfs_dir,rk616,&rk616_reg_fops);
 516 #endif
 517         rk616_clk_common_init(rk616);
 518         ret = mfd_add_devices(rk616->dev, -1,
 519                                       rk616_devs, ARRAY_SIZE(rk616_devs),
 520                                       NULL, rk616->irq_base);
 521         dev_info(&client->dev,"rk616 core probe success!\n");
 522         return 0;
 523 }
 524
 525 static int __devexit rk616_i2c_remove(struct i2c_client *client)
 526 {
 527         return 0;
 528 }
 529
 530 static void rk616_core_shutdown(struct i2c_client *client)
 531 {
 532         struct mfd_rk616 *rk616 = i2c_get_clientdata(client);
 533         if(rk616->pdata->power_deinit)
 534                 rk616->pdata->power_deinit();
 535 }
 536
 537
 538 static const struct i2c_device_id id_table[] = {
 539         {"rk616", 0 },
 540         { }
 541 };
 542
 543 static struct i2c_driver rk616_i2c_driver  = {
 544         .driver = {
 545                 .name  = "rk616",
 546                 .owner = THIS_MODULE,
 547                 .suspend        = &rk616_core_suspend,
 548                 .resume         = &rk616_core_resume,
 549         },
 550         .probe          = &rk616_i2c_probe,
 551         .remove         = &rk616_i2c_remove,
 552         .shutdown       = &rk616_core_shutdown,
 553         .id_table       = id_table,
 554 };
 555
 556
 557 static int __init rk616_module_init(void)
 558 {
 559         return i2c_add_driver(&rk616_i2c_driver);
 560 }
 561
 562 static void __exit rk616_module_exit(void)
 563 {
 564         i2c_del_driver(&rk616_i2c_driver);
 565 }
 566
 567 subsys_initcall_sync(rk616_module_init);
 568 module_exit(rk616_module_exit);
 569
 570