drivers/mfd/rk616-core.c

   1 #include <linux/kernel.h>
   2 #include <linux/module.h>
   3 #include <linux/delay.h>
   4 #include <linux/mfd/core.h>
   5 #include <linux/slab.h>
   6 #include <linux/mfd/rk616.h>
   7 #include <mach/iomux.h>
   8 #include <linux/err.h>
   9 #include <linux/uaccess.h>
  10 #if defined(CONFIG_DEBUG_FS)
  11 #include <linux/fs.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/seq_file.h>
  14 #endif
  15
  16 #if defined(RK616_MIPI_DSI)
  17 #include "../video/rockchip/transmitter/rk616_mipi_dsi.h"
  18 #endif
  19
  20 #ifndef MHZ
  21 #define MHZ (1000*1000)
  22 #endif
  23
  24 static struct mfd_cell rk616_devs[] = {
  25         {
  26                 .name = "rk616-lvds",
  27                 .id = 0,
  28         },
  29         {
  30                 .name = "rk616-codec",
  31                 .id = 1,
  32         },
  33         {
  34                 .name = "rk616-hdmi",
  35                 .id = 2,
  36         },
  37         {
  38                 .name = "rk616-mipi",
  39                 .id = 3,
  40         },
  41 };
  42
  43 extern int rk_mipi_dsi_init_lite(void);
  44 void rk616_mclk_set_rate(struct clk *mclk,unsigned long rate)
  45 {
  46         clk_set_rate(mclk, rate);
  47 }
  48
  49 static int rk616_i2c_read_reg(struct mfd_rk616 *rk616, u16 reg,u32 *pval)
  50 {
  51         struct i2c_client * client = rk616->client;
  52         struct i2c_adapter *adap = client->adapter;
  53         struct i2c_msg msgs[2];
  54         int ret;
  55         char reg_buf[2];
  56
  57         memcpy(reg_buf, &reg, 2);
  58
  59         msgs[0].addr = client->addr;
  60         msgs[0].flags = client->flags;
  61         msgs[0].len = 2;
  62         msgs[0].buf = reg_buf;
  63         msgs[0].scl_rate = rk616->pdata->scl_rate;
  64         msgs[0].udelay = client->udelay;
  65
  66         msgs[1].addr = client->addr;
  67         msgs[1].flags = client->flags | I2C_M_RD;
  68         msgs[1].len = 4;
  69         msgs[1].buf = (char *)pval;
  70         msgs[1].scl_rate = rk616->pdata->scl_rate;
  71         msgs[1].udelay = client->udelay;
  72
  73         ret = i2c_transfer(adap, msgs, 2);
  74
  75
  76         return (ret == 2)? 4 : ret;
  77
  78 }
  79
  80 static int rk616_i2c_write_reg(struct mfd_rk616 *rk616, u16 reg,u32 *pval)
  81 {
  82         struct i2c_client *client = rk616->client;
  83         struct i2c_adapter *adap = client->adapter;
  84         struct i2c_msg msg;
  85         int ret;
  86         char *tx_buf = (char *)kmalloc(6, GFP_KERNEL);
  87         if(!tx_buf)
  88                 return -ENOMEM;
  89
  90         memcpy(tx_buf, &reg, 2);
  91         memcpy(tx_buf+2, (char *)pval, 4);
  92
  93         msg.addr = client->addr;
  94         msg.flags = client->flags;
  95         msg.len = 6;
  96         msg.buf = (char *)tx_buf;
  97         msg.scl_rate = rk616->pdata->scl_rate;
  98         msg.udelay = client->udelay;
  99
 100         ret = i2c_transfer(adap, &msg, 1);
 101         kfree(tx_buf);
 102
 103         return (ret == 1) ? 4 : ret;
 104 }
 105
 106
 107 static int rk616_i2c_write_bits(struct mfd_rk616 *rk616, u16 reg,u32 mask,u32 *pval)
 108 {
 109
 110         struct i2c_client *client = rk616->client;
 111         struct i2c_adapter *adap = client->adapter;
 112         struct i2c_msg msg;
 113         int ret;
 114         u32 reg_val;
 115         char *tx_buf = NULL;
 116
 117         tx_buf = (char *)kmalloc(6, GFP_KERNEL);
 118         if(!tx_buf)
 119                 return -ENOMEM;
 120
 121         mutex_lock(&rk616->reg_lock);
 122         rk616->read_dev(rk616,reg,&reg_val);
 123         reg_val &= ~mask;
 124         *pval &= mask;
 125         reg_val |= *pval;
 126         *pval = reg_val;
 127         memcpy(tx_buf, &reg, 2);
 128         memcpy(tx_buf+2, (char *)pval, 4);
 129
 130         msg.addr = client->addr;
 131         msg.flags = client->flags;
 132         msg.len = 6;
 133         msg.buf = (char *)tx_buf;
 134         msg.scl_rate = rk616->pdata->scl_rate;
 135         msg.udelay = client->udelay;
 136
 137         ret = i2c_transfer(adap, &msg, 1);
 138         kfree(tx_buf);
 139         mutex_unlock(&rk616->reg_lock);
 140
 141         return (ret == 1) ? 4 : ret;
 142 }
 143
 144
 145 static int rk616_i2c_bulk_write(struct mfd_rk616 *rk616, u16 reg,int count,u32 *pval)
 146 {
 147         const struct i2c_client *client = rk616->client;
 148         struct i2c_adapter *adap=client->adapter;
 149         struct i2c_msg msg;
 150         int ret;
 151
 152
 153         char *tx_buf = (char *)kmalloc((count<<2) + 2, GFP_KERNEL);
 154         if(!tx_buf)
 155                 return -ENOMEM;
 156
 157         memcpy(tx_buf, &reg, 2);
 158         memcpy(tx_buf+2, (char *)pval, count<<2);
 159
 160         msg.addr = client->addr;
 161         msg.flags = client->flags;
 162         msg.len = (count<<2) + 2;
 163         msg.buf = (char *)tx_buf;
 164         msg.scl_rate = rk616->pdata->scl_rate;
 165         msg.udelay = client->udelay;
 166
 167         ret = i2c_transfer(adap, &msg, 1);
 168         kfree(tx_buf);
 169
 170         return (ret == 1) ? count : ret;
 171 }
 172
 173 #if defined(CONFIG_DEBUG_FS)
 174
 175 static int rk616_reg_show(struct seq_file *s, void *v)
 176 {
 177         int i = 0;
 178         u32 val = 0;
 179         struct mfd_rk616 *rk616 = s->private;
 180         if(!rk616)
 181         {
 182                 dev_err(rk616->dev,"no mfd rk616!\n");
 183                 return 0;
 184         }
 185
 186         for(i=0;i<= CRU_CFGMISC_CON;i+=4)
 187         {
 188                 rk616->read_dev(rk616,i,&val);
 189                 if(i%16==0)
 190                         seq_printf(s,"\n0x%04x:",i);
 191                 seq_printf(s," %08x",val);
 192         }
 193         seq_printf(s,"\n");
 194
 195         return 0;
 196 }
 197
 198 static ssize_t rk616_reg_write (struct file *file, const char __user *buf, size_t count, loff_t *ppos)
 199 {
 200         struct mfd_rk616 *rk616 = file->f_path.dentry->d_inode->i_private;
 201         u32 reg;
 202         u32 val;
 203
 204         char kbuf[25];
 205         if (copy_from_user(kbuf, buf, count))
 206                 return -EFAULT;
 207         sscanf(kbuf, "%x%x", &reg,&val);
 208         rk616->write_dev(rk616,reg,&val);
 209         return count;
 210 }
 211
 212 static int rk616_reg_open(struct inode *inode, struct file *file)
 213 {
 214         struct mfd_rk616 *rk616 = inode->i_private;
 215         return single_open(file,rk616_reg_show,rk616);
 216 }
 217
 218 static const struct file_operations rk616_reg_fops = {
 219         .owner          = THIS_MODULE,
 220         .open           = rk616_reg_open,
 221         .read           = seq_read,
 222         .write          = rk616_reg_write,
 223         .llseek         = seq_lseek,
 224         .release        = single_release,
 225 };
 226 #endif
 227
 228
 229 static u32 rk616_clk_gcd(u32 numerator, u32 denominator)
 230 {
 231         u32 a, b;
 232
 233         if (!numerator || !denominator)
 234                 return 0;
 235
 236         if (numerator > denominator) {
 237                 a = numerator;
 238                 b = denominator;
 239         } else {
 240                 a = denominator;
 241                 b = numerator;
 242         }
 243
 244         while (b != 0) {
 245                 int r = b;
 246                 b = a % b;
 247                 a = r;
 248         }
 249
 250         return a;
 251 }
 252
 253
 254 static int rk616_pll_par_calc(u32 fin_hz,u32 fout_hz,u32 *refdiv, u32 *fbdiv,
 255                                         u32 *postdiv1, u32 *postdiv2, u32 *frac)
 256 {
 257         // FIXME set postdiv1/2 always 1
 258         u32 gcd;
 259         u64 fin_64, frac_64;
 260         u32 f_frac;
 261         if(!fin_hz || !fout_hz)
 262                 return -EINVAL;
 263
 264         if(fin_hz / MHZ * MHZ == fin_hz && fout_hz /MHZ * MHZ == fout_hz)
 265         {
 266                 fin_hz /= MHZ;
 267                 fout_hz /= MHZ;
 268                 gcd = rk616_clk_gcd(fin_hz, fout_hz);
 269                 *refdiv = fin_hz / gcd;
 270                 *fbdiv = fout_hz / gcd;
 271                 *postdiv1 = 1;
 272                 *postdiv2 = 1;
 273
 274                 *frac = 0;
 275
 276         }
 277         else
 278         {
 279
 280                 gcd = rk616_clk_gcd(fin_hz / MHZ, fout_hz / MHZ);
 281                 *refdiv = fin_hz / MHZ / gcd;
 282                 *fbdiv = fout_hz / MHZ / gcd;
 283                 *postdiv1 = 1;
 284                 *postdiv2 = 1;
 285
 286                 *frac = 0;
 287
 288                 f_frac = (fout_hz % MHZ);
 289                 fin_64 = fin_hz;
 290                 do_div(fin_64, (u64)*refdiv);
 291                 frac_64 = (u64)f_frac << 24;
 292                 do_div(frac_64, fin_64);
 293                 *frac = (u32) frac_64;
 294                 printk(KERN_INFO "frac_64=%llx, frac=%u\n", frac_64, *frac);
 295         }
 296         printk(KERN_INFO "fin=%u,fout=%u,gcd=%u,refdiv=%u,fbdiv=%u,postdiv1=%u,postdiv2=%u,frac=%u\n",
 297                                 fin_hz, fout_hz, gcd, *refdiv, *fbdiv, *postdiv1, *postdiv2, *frac);
 298         return 0;
 299 }
 300
 301
 302 static  int  rk616_pll_wait_lock(struct mfd_rk616 *rk616,int id)
 303 {
 304         u32 delay = 10;
 305         u32 val = 0;
 306         int ret;
 307         int offset;
 308
 309         if(id == 0)  //PLL0
 310         {
 311                 offset = 0;
 312         }
 313         else // PLL1
 314         {
 315                 offset = 0x0c;
 316         }
 317         while (delay >= 1)
 318         {
 319                 ret = rk616->read_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 320                 if (val&PLL0_LOCK)
 321                 {
 322                         rk616_dbg(rk616->dev,"PLL%d locked\n",id);
 323                         break;
 324                 }
 325                 msleep(1);
 326                 delay--;
 327         }
 328         if (delay == 0)
 329         {
 330                 dev_err(rk616->dev,"rk616 wait PLL%d lock time out!\n",id);
 331         }
 332
 333         return 0;
 334 }
 335
 336
 337
 338 int rk616_pll_pwr_down(struct mfd_rk616 *rk616,int id)
 339 {
 340         u32 val = 0;
 341         int ret;
 342         int offset;
 343         if(id == 0)  //PLL0
 344         {
 345                 offset = 0;
 346         }
 347         else // PLL1
 348         {
 349                 offset = 0x0c;
 350         }
 351
 352
 353         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 354         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 355
 356         return 0;
 357
 358 }
 359
 360
 361
 362 int rk616_pll_set_rate(struct mfd_rk616 *rk616,int id,u32 cfg_val,u32 frac)
 363 {
 364         u32 val = 0;
 365         int ret;
 366         int offset;
 367         u16 con0 = cfg_val & 0xffff;
 368         u16 con1 = (cfg_val >> 16)&0xffff;
 369         u32 fbdiv = con0 & 0xfff;
 370         u32 postdiv1 = (con0 >> 12)&0x7;
 371         u32 refdiv = con1 & 0x3f;
 372         u32 postdiv2 = (con1 >> 6) & 0x7;
 373         u8 mode = !frac;
 374
 375         if(id == 0)  //PLL0
 376         {
 377                 if(((rk616->pll0_rate >> 32) == cfg_val) &&
 378                         ((rk616->pll0_rate & 0xffffffff) == frac))
 379                 {
 380                         //return 0;
 381                 }
 382                 rk616->pll0_rate = ((u64)cfg_val << 32) | frac;
 383                 offset = 0;
 384         }
 385         else // PLL1
 386         {
 387                 if(((rk616->pll1_rate >> 32) == cfg_val) &&
 388                         ((rk616->pll1_rate & 0xffffffff) == frac))
 389                 {
 390                         // return 0;
 391                 }
 392                 rk616->pll1_rate = ((u64)cfg_val << 32) | frac;
 393                 offset = 0x0c;
 394         }
 395
 396
 397         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 398         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 399
 400
 401         ret = rk616->read_dev(rk616,CRU_PLL0_CON2 + offset,&val);
 402         val &= 0xff000000;
 403         if(frac)
 404                 val |= PLL0_FRAC(frac);
 405         else
 406                 val |= 0x800000; //default value
 407         ret = rk616->write_dev(rk616,CRU_PLL0_CON2 + offset,&val);
 408
 409         val = PLL0_POSTDIV1(postdiv1) | PLL0_FBDIV(fbdiv) | PLL0_POSTDIV1_MASK |
 410                 PLL0_FBDIV_MASK | (PLL0_BYPASS << 16);
 411         ret = rk616->write_dev(rk616,CRU_PLL0_CON0 + offset,&val);
 412
 413         val = PLL0_DIV_MODE(mode) | PLL0_POSTDIV2(postdiv2) | PLL0_REFDIV(refdiv) |
 414                 (PLL0_DIV_MODE_MASK) | PLL0_POSTDIV2_MASK | PLL0_REFDIV_MASK;
 415         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 416
 417         val = (PLL0_PWR_DN << 16);
 418         ret = rk616->write_dev(rk616,CRU_PLL0_CON1 + offset,&val);
 419
 420         rk616_pll_wait_lock(rk616,id);
 421
 422         msleep(5);
 423
 424         return 0;
 425
 426 }
 427 /***********************************
 428 default clk patch settiing:
 429 CLKIN-------->CODEC
 430 LCD_DCLK0--->PLL0--->Dither--->LVDS/MIPI
 431 LCD_DCLK1--->PLL1--->HDMI
 432 ************************************/
 433
 434 static int rk616_clk_common_init(struct mfd_rk616 *rk616)
 435 {
 436         u32 val = 0;
 437         int ret;
 438
 439         val = PLL1_CLK_SEL(LCD1_DCLK) | PLL0_CLK_SEL(LCD0_DCLK) | LCD1_CLK_DIV(0) |
 440                 LCD0_CLK_DIV(0) | PLL1_CLK_SEL_MASK | PLL0_CLK_SEL_MASK |
 441                 LCD1_CLK_DIV_MASK | LCD0_CLK_DIV_MASK; //pll1 clk from lcdc1_dclk,pll0 clk from lcdc0_dclk,mux_lcdx = lcdx_clk
 442         ret = rk616->write_dev(rk616,CRU_CLKSEL0_CON,&val);
 443
 444         val = SCLK_SEL(SCLK_SEL_PLL1) | CODEC_MCLK_SEL(CODEC_MCLK_SEL_12M) |
 445                 CODEC_MCLK_SEL_MASK | SCLK_SEL_MASK; //codec mclk from clkin
 446         ret = rk616->write_dev(rk616,CRU_CLKSEL1_CON,&val);
 447
 448         val = 0; //codec mck = clkin
 449         ret = rk616->write_dev(rk616,CRU_CODEC_DIV,&val);
 450
 451         val = (PLL0_BYPASS) | (PLL0_BYPASS << 16);  //bypass pll0
 452         ret = rk616->write_dev(rk616,CRU_PLL0_CON0,&val);
 453         val = PLL0_PWR_DN | (PLL0_PWR_DN << 16);
 454         ret = rk616->write_dev(rk616,CRU_PLL0_CON1,&val); //power down pll0
 455
 456         val = (PLL1_BYPASS) | (PLL1_BYPASS << 16);
 457         ret = rk616->write_dev(rk616,CRU_PLL1_CON0,&val);
 458
 459
 460         return 0;
 461 }
 462
 463 static int rk616_core_suspend(struct device *dev, pm_message_t state)
 464 {
 465         return 0;
 466 }
 467
 468 static int rk616_core_resume(struct device* dev)
 469 {
 470         struct mfd_rk616 *rk616 = dev_get_drvdata(dev);
 471         rk616_clk_common_init(rk616);
 472         return 0;
 473 }
 474
 475
 476 static int rk616_i2c_probe(struct i2c_client *client,const struct i2c_device_id *id)
 477 {
 478         int ret;
 479         struct mfd_rk616 *rk616 = NULL;
 480         struct clk *iis_clk;
 481
 482         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 483         {
 484                 dev_err(&client->dev, "Must have I2C_FUNC_I2C.\n");
 485                 ret = -ENODEV;
 486         }
 487         rk616 = kzalloc(sizeof(struct mfd_rk616), GFP_KERNEL);
 488         if (rk616 == NULL)
 489         {
 490                 printk(KERN_ALERT "alloc for struct rk616 fail\n");
 491                 ret = -ENOMEM;
 492         }
 493
 494         rk616->dev = &client->dev;
 495         rk616->pdata = client->dev.platform_data;
 496         rk616->client = client;
 497         i2c_set_clientdata(client, rk616);
 498         dev_set_drvdata(rk616->dev,rk616);
 499
 500 #if defined(CONFIG_SND_RK29_SOC_I2S_8CH)
 501         iis_clk = clk_get_sys("rk29_i2s.0", "i2s");
 502 #elif defined(CONFIG_SND_RK29_SOC_I2S_2CH)
 503         iis_clk = clk_get_sys("rk29_i2s.1", "i2s");
 504 #else
 505         iis_clk = clk_get_sys("rk29_i2s.2", "i2s");
 506 #endif
 507         if (IS_ERR(iis_clk))
 508         {
 509                 dev_err(&client->dev,"failed to get i2s clk\n");
 510                 ret = PTR_ERR(iis_clk);
 511         }
 512         else
 513         {
 514                 rk616->mclk = iis_clk;
 515
 516                 #if defined(CONFIG_ARCH_RK29)
 517                 rk29_mux_api_set(GPIO2D0_I2S0CLK_MIIRXCLKIN_NAME, GPIO2H_I2S0_CLK);
 518                 #else
 519                 iomux_set(I2S0_MCLK);
 520                 #endif
 521                 clk_enable(iis_clk);
 522                 //clk_set_rate(iis_clk, 11289600);
 523                 rk616_mclk_set_rate(iis_clk,11289600);
 524                 //clk_put(iis_clk);
 525         }
 526
 527         mutex_init(&rk616->reg_lock);
 528
 529         if(rk616->pdata->power_init)
 530                 rk616->pdata->power_init();
 531
 532         rk616->read_dev = rk616_i2c_read_reg;
 533         rk616->write_dev = rk616_i2c_write_reg;
 534         rk616->write_dev_bits = rk616_i2c_write_bits;
 535         rk616->write_bulk = rk616_i2c_bulk_write;
 536
 537 #if defined(CONFIG_DEBUG_FS)
 538         rk616->debugfs_dir = debugfs_create_dir("rk616", NULL);
 539         if (IS_ERR(rk616->debugfs_dir))
 540         {
 541                 dev_err(rk616->dev,"failed to create debugfs dir for rk616!\n");
 542         }
 543         else
 544                 debugfs_create_file("core", S_IRUSR,rk616->debugfs_dir,rk616,&rk616_reg_fops);
 545 #endif
 546         rk616_clk_common_init(rk616);
 547         ret = mfd_add_devices(rk616->dev, -1,
 548                                       rk616_devs, ARRAY_SIZE(rk616_devs),
 549                                       NULL, rk616->irq_base);
 550
 551         dev_info(&client->dev,"rk616 core probe success!\n");
 552         return 0;
 553 }
 554
 555 static int __devexit rk616_i2c_remove(struct i2c_client *client)
 556 {
 557         return 0;
 558 }
 559
 560 static void rk616_core_shutdown(struct i2c_client *client)
 561 {
 562         struct mfd_rk616 *rk616 = i2c_get_clientdata(client);
 563         if(rk616->pdata->power_deinit)
 564                 rk616->pdata->power_deinit();
 565 }
 566
 567
 568 static const struct i2c_device_id id_table[] = {
 569         {"rk616", 0 },
 570         { }
 571 };
 572
 573 static struct i2c_driver rk616_i2c_driver  = {
 574         .driver = {
 575                 .name  = "rk616",
 576                 .owner = THIS_MODULE,
 577                 .suspend        = &rk616_core_suspend,
 578                 .resume         = &rk616_core_resume,
 579         },
 580         .probe          = &rk616_i2c_probe,
 581         .remove         = &rk616_i2c_remove,
 582         .shutdown       = &rk616_core_shutdown,
 583         .id_table       = id_table,
 584 };
 585
 586
 587 static int __init rk616_module_init(void)
 588 {
 589         return i2c_add_driver(&rk616_i2c_driver);
 590 }
 591
 592 static void __exit rk616_module_exit(void)
 593 {
 594         i2c_del_driver(&rk616_i2c_driver);
 595 }
 596
 597 subsys_initcall_sync(rk616_module_init);
 598 module_exit(rk616_module_exit);
 599
 600