mfd: qcom_rpm: Fix offset error for msm8660
[firefly-linux-kernel-4.4.55.git] / drivers / mfd / qcom_rpm.c
1 /*
2  * Copyright (c) 2014, Sony Mobile Communications AB.
3  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
4  * Author: Bjorn Andersson <bjorn.andersson@sonymobile.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 and
8  * only version 2 as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/of_platform.h>
19 #include <linux/io.h>
20 #include <linux/interrupt.h>
21 #include <linux/mfd/qcom_rpm.h>
22 #include <linux/mfd/syscon.h>
23 #include <linux/regmap.h>
24
25 #include <dt-bindings/mfd/qcom-rpm.h>
26
27 struct qcom_rpm_resource {
28         unsigned target_id;
29         unsigned status_id;
30         unsigned select_id;
31         unsigned size;
32 };
33
34 struct qcom_rpm_data {
35         u32 version;
36         const struct qcom_rpm_resource *resource_table;
37         unsigned int n_resources;
38         unsigned int req_ctx_off;
39         unsigned int req_sel_off;
40         unsigned int ack_ctx_off;
41         unsigned int ack_sel_off;
42         unsigned int sel_size;
43 };
44
45 struct qcom_rpm {
46         struct device *dev;
47         struct regmap *ipc_regmap;
48         unsigned ipc_offset;
49         unsigned ipc_bit;
50
51         struct completion ack;
52         struct mutex lock;
53
54         void __iomem *status_regs;
55         void __iomem *ctrl_regs;
56         void __iomem *req_regs;
57
58         u32 ack_status;
59
60         const struct qcom_rpm_data *data;
61 };
62
63 #define RPM_STATUS_REG(rpm, i)  ((rpm)->status_regs + (i) * 4)
64 #define RPM_CTRL_REG(rpm, i)    ((rpm)->ctrl_regs + (i) * 4)
65 #define RPM_REQ_REG(rpm, i)     ((rpm)->req_regs + (i) * 4)
66
67 #define RPM_REQUEST_TIMEOUT     (5 * HZ)
68
69 #define RPM_MAX_SEL_SIZE        7
70
71 #define RPM_NOTIFICATION        BIT(30)
72 #define RPM_REJECTED            BIT(31)
73
74 #define RPM_SIGNAL              BIT(2)
75
76 static const struct qcom_rpm_resource apq8064_rpm_resource_table[] = {
77         [QCOM_RPM_CXO_CLK] =                    { 25, 9, 5, 1 },
78         [QCOM_RPM_PXO_CLK] =                    { 26, 10, 6, 1 },
79         [QCOM_RPM_APPS_FABRIC_CLK] =            { 27, 11, 8, 1 },
80         [QCOM_RPM_SYS_FABRIC_CLK] =             { 28, 12, 9, 1 },
81         [QCOM_RPM_MM_FABRIC_CLK] =              { 29, 13, 10, 1 },
82         [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 30, 14, 11, 1 },
83         [QCOM_RPM_SFPB_CLK] =                   { 31, 15, 12, 1 },
84         [QCOM_RPM_CFPB_CLK] =                   { 32, 16, 13, 1 },
85         [QCOM_RPM_MMFPB_CLK] =                  { 33, 17, 14, 1 },
86         [QCOM_RPM_EBI1_CLK] =                   { 34, 18, 16, 1 },
87         [QCOM_RPM_APPS_FABRIC_HALT] =           { 35, 19, 18, 1 },
88         [QCOM_RPM_APPS_FABRIC_MODE] =           { 37, 20, 19, 1 },
89         [QCOM_RPM_APPS_FABRIC_IOCTL] =          { 40, 21, 20, 1 },
90         [QCOM_RPM_APPS_FABRIC_ARB] =            { 41, 22, 21, 12 },
91         [QCOM_RPM_SYS_FABRIC_HALT] =            { 53, 23, 22, 1 },
92         [QCOM_RPM_SYS_FABRIC_MODE] =            { 55, 24, 23, 1 },
93         [QCOM_RPM_SYS_FABRIC_IOCTL] =           { 58, 25, 24, 1 },
94         [QCOM_RPM_SYS_FABRIC_ARB] =             { 59, 26, 25, 30 },
95         [QCOM_RPM_MM_FABRIC_HALT] =             { 89, 27, 26, 1 },
96         [QCOM_RPM_MM_FABRIC_MODE] =             { 91, 28, 27, 1 },
97         [QCOM_RPM_MM_FABRIC_IOCTL] =            { 94, 29, 28, 1 },
98         [QCOM_RPM_MM_FABRIC_ARB] =              { 95, 30, 29, 21 },
99         [QCOM_RPM_PM8921_SMPS1] =               { 116, 31, 30, 2 },
100         [QCOM_RPM_PM8921_SMPS2] =               { 118, 33, 31, 2 },
101         [QCOM_RPM_PM8921_SMPS3] =               { 120, 35, 32, 2 },
102         [QCOM_RPM_PM8921_SMPS4] =               { 122, 37, 33, 2 },
103         [QCOM_RPM_PM8921_SMPS5] =               { 124, 39, 34, 2 },
104         [QCOM_RPM_PM8921_SMPS6] =               { 126, 41, 35, 2 },
105         [QCOM_RPM_PM8921_SMPS7] =               { 128, 43, 36, 2 },
106         [QCOM_RPM_PM8921_SMPS8] =               { 130, 45, 37, 2 },
107         [QCOM_RPM_PM8921_LDO1] =                { 132, 47, 38, 2 },
108         [QCOM_RPM_PM8921_LDO2] =                { 134, 49, 39, 2 },
109         [QCOM_RPM_PM8921_LDO3] =                { 136, 51, 40, 2 },
110         [QCOM_RPM_PM8921_LDO4] =                { 138, 53, 41, 2 },
111         [QCOM_RPM_PM8921_LDO5] =                { 140, 55, 42, 2 },
112         [QCOM_RPM_PM8921_LDO6] =                { 142, 57, 43, 2 },
113         [QCOM_RPM_PM8921_LDO7] =                { 144, 59, 44, 2 },
114         [QCOM_RPM_PM8921_LDO8] =                { 146, 61, 45, 2 },
115         [QCOM_RPM_PM8921_LDO9] =                { 148, 63, 46, 2 },
116         [QCOM_RPM_PM8921_LDO10] =               { 150, 65, 47, 2 },
117         [QCOM_RPM_PM8921_LDO11] =               { 152, 67, 48, 2 },
118         [QCOM_RPM_PM8921_LDO12] =               { 154, 69, 49, 2 },
119         [QCOM_RPM_PM8921_LDO13] =               { 156, 71, 50, 2 },
120         [QCOM_RPM_PM8921_LDO14] =               { 158, 73, 51, 2 },
121         [QCOM_RPM_PM8921_LDO15] =               { 160, 75, 52, 2 },
122         [QCOM_RPM_PM8921_LDO16] =               { 162, 77, 53, 2 },
123         [QCOM_RPM_PM8921_LDO17] =               { 164, 79, 54, 2 },
124         [QCOM_RPM_PM8921_LDO18] =               { 166, 81, 55, 2 },
125         [QCOM_RPM_PM8921_LDO19] =               { 168, 83, 56, 2 },
126         [QCOM_RPM_PM8921_LDO20] =               { 170, 85, 57, 2 },
127         [QCOM_RPM_PM8921_LDO21] =               { 172, 87, 58, 2 },
128         [QCOM_RPM_PM8921_LDO22] =               { 174, 89, 59, 2 },
129         [QCOM_RPM_PM8921_LDO23] =               { 176, 91, 60, 2 },
130         [QCOM_RPM_PM8921_LDO24] =               { 178, 93, 61, 2 },
131         [QCOM_RPM_PM8921_LDO25] =               { 180, 95, 62, 2 },
132         [QCOM_RPM_PM8921_LDO26] =               { 182, 97, 63, 2 },
133         [QCOM_RPM_PM8921_LDO27] =               { 184, 99, 64, 2 },
134         [QCOM_RPM_PM8921_LDO28] =               { 186, 101, 65, 2 },
135         [QCOM_RPM_PM8921_LDO29] =               { 188, 103, 66, 2 },
136         [QCOM_RPM_PM8921_CLK1] =                { 190, 105, 67, 2 },
137         [QCOM_RPM_PM8921_CLK2] =                { 192, 107, 68, 2 },
138         [QCOM_RPM_PM8921_LVS1] =                { 194, 109, 69, 1 },
139         [QCOM_RPM_PM8921_LVS2] =                { 195, 110, 70, 1 },
140         [QCOM_RPM_PM8921_LVS3] =                { 196, 111, 71, 1 },
141         [QCOM_RPM_PM8921_LVS4] =                { 197, 112, 72, 1 },
142         [QCOM_RPM_PM8921_LVS5] =                { 198, 113, 73, 1 },
143         [QCOM_RPM_PM8921_LVS6] =                { 199, 114, 74, 1 },
144         [QCOM_RPM_PM8921_LVS7] =                { 200, 115, 75, 1 },
145         [QCOM_RPM_PM8821_SMPS1] =               { 201, 116, 76, 2 },
146         [QCOM_RPM_PM8821_SMPS2] =               { 203, 118, 77, 2 },
147         [QCOM_RPM_PM8821_LDO1] =                { 205, 120, 78, 2 },
148         [QCOM_RPM_PM8921_NCP] =                 { 207, 122, 80, 2 },
149         [QCOM_RPM_CXO_BUFFERS] =                { 209, 124, 81, 1 },
150         [QCOM_RPM_USB_OTG_SWITCH] =             { 210, 125, 82, 1 },
151         [QCOM_RPM_HDMI_SWITCH] =                { 211, 126, 83, 1 },
152         [QCOM_RPM_DDR_DMM] =                    { 212, 127, 84, 2 },
153         [QCOM_RPM_QDSS_CLK] =                   { 214, ~0, 7, 1 },
154         [QCOM_RPM_VDDMIN_GPIO] =                { 215, 131, 89, 1 },
155 };
156
157 static const struct qcom_rpm_data apq8064_template = {
158         .version = 3,
159         .resource_table = apq8064_rpm_resource_table,
160         .n_resources = ARRAY_SIZE(apq8064_rpm_resource_table),
161         .req_ctx_off = 3,
162         .req_sel_off = 11,
163         .ack_ctx_off = 15,
164         .ack_sel_off = 23,
165         .sel_size = 4,
166 };
167
168 static const struct qcom_rpm_resource msm8660_rpm_resource_table[] = {
169         [QCOM_RPM_CXO_CLK] =                    { 32, 12, 5, 1 },
170         [QCOM_RPM_PXO_CLK] =                    { 33, 13, 6, 1 },
171         [QCOM_RPM_PLL_4] =                      { 34, 14, 7, 1 },
172         [QCOM_RPM_APPS_FABRIC_CLK] =            { 35, 15, 8, 1 },
173         [QCOM_RPM_SYS_FABRIC_CLK] =             { 36, 16, 9, 1 },
174         [QCOM_RPM_MM_FABRIC_CLK] =              { 37, 17, 10, 1 },
175         [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 38, 18, 11, 1 },
176         [QCOM_RPM_SFPB_CLK] =                   { 39, 19, 12, 1 },
177         [QCOM_RPM_CFPB_CLK] =                   { 40, 20, 13, 1 },
178         [QCOM_RPM_MMFPB_CLK] =                  { 41, 21, 14, 1 },
179         [QCOM_RPM_SMI_CLK] =                    { 42, 22, 15, 1 },
180         [QCOM_RPM_EBI1_CLK] =                   { 43, 23, 16, 1 },
181         [QCOM_RPM_APPS_L2_CACHE_CTL] =          { 44, 24, 17, 1 },
182         [QCOM_RPM_APPS_FABRIC_HALT] =           { 45, 25, 18, 2 },
183         [QCOM_RPM_APPS_FABRIC_MODE] =           { 47, 26, 19, 3 },
184         [QCOM_RPM_APPS_FABRIC_ARB] =            { 51, 28, 21, 6 },
185         [QCOM_RPM_SYS_FABRIC_HALT] =            { 63, 29, 22, 2 },
186         [QCOM_RPM_SYS_FABRIC_MODE] =            { 65, 30, 23, 3 },
187         [QCOM_RPM_SYS_FABRIC_ARB] =             { 69, 32, 25, 22 },
188         [QCOM_RPM_MM_FABRIC_HALT] =             { 105, 33, 26, 2 },
189         [QCOM_RPM_MM_FABRIC_MODE] =             { 107, 34, 27, 3 },
190         [QCOM_RPM_MM_FABRIC_ARB] =              { 111, 36, 29, 23 },
191         [QCOM_RPM_PM8901_SMPS0] =               { 134, 37, 30, 2 },
192         [QCOM_RPM_PM8901_SMPS1] =               { 136, 39, 31, 2 },
193         [QCOM_RPM_PM8901_SMPS2] =               { 138, 41, 32, 2 },
194         [QCOM_RPM_PM8901_SMPS3] =               { 140, 43, 33, 2 },
195         [QCOM_RPM_PM8901_SMPS4] =               { 142, 45, 34, 2 },
196         [QCOM_RPM_PM8901_LDO0] =                { 144, 47, 35, 2 },
197         [QCOM_RPM_PM8901_LDO1] =                { 146, 49, 36, 2 },
198         [QCOM_RPM_PM8901_LDO2] =                { 148, 51, 37, 2 },
199         [QCOM_RPM_PM8901_LDO3] =                { 150, 53, 38, 2 },
200         [QCOM_RPM_PM8901_LDO4] =                { 152, 55, 39, 2 },
201         [QCOM_RPM_PM8901_LDO5] =                { 154, 57, 40, 2 },
202         [QCOM_RPM_PM8901_LDO6] =                { 156, 59, 41, 2 },
203         [QCOM_RPM_PM8901_LVS0] =                { 158, 61, 42, 1 },
204         [QCOM_RPM_PM8901_LVS1] =                { 159, 62, 43, 1 },
205         [QCOM_RPM_PM8901_LVS2] =                { 160, 63, 44, 1 },
206         [QCOM_RPM_PM8901_LVS3] =                { 161, 64, 45, 1 },
207         [QCOM_RPM_PM8901_MVS] =                 { 162, 65, 46, 1 },
208         [QCOM_RPM_PM8058_SMPS0] =               { 163, 66, 47, 2 },
209         [QCOM_RPM_PM8058_SMPS1] =               { 165, 68, 48, 2 },
210         [QCOM_RPM_PM8058_SMPS2] =               { 167, 70, 49, 2 },
211         [QCOM_RPM_PM8058_SMPS3] =               { 169, 72, 50, 2 },
212         [QCOM_RPM_PM8058_SMPS4] =               { 171, 74, 51, 2 },
213         [QCOM_RPM_PM8058_LDO0] =                { 173, 76, 52, 2 },
214         [QCOM_RPM_PM8058_LDO1] =                { 175, 78, 53, 2 },
215         [QCOM_RPM_PM8058_LDO2] =                { 177, 80, 54, 2 },
216         [QCOM_RPM_PM8058_LDO3] =                { 179, 82, 55, 2 },
217         [QCOM_RPM_PM8058_LDO4] =                { 181, 84, 56, 2 },
218         [QCOM_RPM_PM8058_LDO5] =                { 183, 86, 57, 2 },
219         [QCOM_RPM_PM8058_LDO6] =                { 185, 88, 58, 2 },
220         [QCOM_RPM_PM8058_LDO7] =                { 187, 90, 59, 2 },
221         [QCOM_RPM_PM8058_LDO8] =                { 189, 92, 60, 2 },
222         [QCOM_RPM_PM8058_LDO9] =                { 191, 94, 61, 2 },
223         [QCOM_RPM_PM8058_LDO10] =               { 193, 96, 62, 2 },
224         [QCOM_RPM_PM8058_LDO11] =               { 195, 98, 63, 2 },
225         [QCOM_RPM_PM8058_LDO12] =               { 197, 100, 64, 2 },
226         [QCOM_RPM_PM8058_LDO13] =               { 199, 102, 65, 2 },
227         [QCOM_RPM_PM8058_LDO14] =               { 201, 104, 66, 2 },
228         [QCOM_RPM_PM8058_LDO15] =               { 203, 106, 67, 2 },
229         [QCOM_RPM_PM8058_LDO16] =               { 205, 108, 68, 2 },
230         [QCOM_RPM_PM8058_LDO17] =               { 207, 110, 69, 2 },
231         [QCOM_RPM_PM8058_LDO18] =               { 209, 112, 70, 2 },
232         [QCOM_RPM_PM8058_LDO19] =               { 211, 114, 71, 2 },
233         [QCOM_RPM_PM8058_LDO20] =               { 213, 116, 72, 2 },
234         [QCOM_RPM_PM8058_LDO21] =               { 215, 118, 73, 2 },
235         [QCOM_RPM_PM8058_LDO22] =               { 217, 120, 74, 2 },
236         [QCOM_RPM_PM8058_LDO23] =               { 219, 122, 75, 2 },
237         [QCOM_RPM_PM8058_LDO24] =               { 221, 124, 76, 2 },
238         [QCOM_RPM_PM8058_LDO25] =               { 223, 126, 77, 2 },
239         [QCOM_RPM_PM8058_LVS0] =                { 225, 128, 78, 1 },
240         [QCOM_RPM_PM8058_LVS1] =                { 226, 129, 79, 1 },
241         [QCOM_RPM_PM8058_NCP] =                 { 227, 130, 80, 2 },
242         [QCOM_RPM_CXO_BUFFERS] =                { 229, 132, 81, 1 },
243 };
244
245 static const struct qcom_rpm_data msm8660_template = {
246         .version = 2,
247         .resource_table = msm8660_rpm_resource_table,
248         .n_resources = ARRAY_SIZE(msm8660_rpm_resource_table),
249         .req_ctx_off = 3,
250         .req_sel_off = 11,
251         .ack_ctx_off = 19,
252         .ack_sel_off = 27,
253         .sel_size = 7,
254 };
255
256 static const struct qcom_rpm_resource msm8960_rpm_resource_table[] = {
257         [QCOM_RPM_CXO_CLK] =                    { 25, 9, 5, 1 },
258         [QCOM_RPM_PXO_CLK] =                    { 26, 10, 6, 1 },
259         [QCOM_RPM_APPS_FABRIC_CLK] =            { 27, 11, 8, 1 },
260         [QCOM_RPM_SYS_FABRIC_CLK] =             { 28, 12, 9, 1 },
261         [QCOM_RPM_MM_FABRIC_CLK] =              { 29, 13, 10, 1 },
262         [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 30, 14, 11, 1 },
263         [QCOM_RPM_SFPB_CLK] =                   { 31, 15, 12, 1 },
264         [QCOM_RPM_CFPB_CLK] =                   { 32, 16, 13, 1 },
265         [QCOM_RPM_MMFPB_CLK] =                  { 33, 17, 14, 1 },
266         [QCOM_RPM_EBI1_CLK] =                   { 34, 18, 16, 1 },
267         [QCOM_RPM_APPS_FABRIC_HALT] =           { 35, 19, 18, 1 },
268         [QCOM_RPM_APPS_FABRIC_MODE] =           { 37, 20, 19, 1 },
269         [QCOM_RPM_APPS_FABRIC_IOCTL] =          { 40, 21, 20, 1 },
270         [QCOM_RPM_APPS_FABRIC_ARB] =            { 41, 22, 21, 12 },
271         [QCOM_RPM_SYS_FABRIC_HALT] =            { 53, 23, 22, 1 },
272         [QCOM_RPM_SYS_FABRIC_MODE] =            { 55, 24, 23, 1 },
273         [QCOM_RPM_SYS_FABRIC_IOCTL] =           { 58, 25, 24, 1 },
274         [QCOM_RPM_SYS_FABRIC_ARB] =             { 59, 26, 25, 29 },
275         [QCOM_RPM_MM_FABRIC_HALT] =             { 88, 27, 26, 1 },
276         [QCOM_RPM_MM_FABRIC_MODE] =             { 90, 28, 27, 1 },
277         [QCOM_RPM_MM_FABRIC_IOCTL] =            { 93, 29, 28, 1 },
278         [QCOM_RPM_MM_FABRIC_ARB] =              { 94, 30, 29, 23 },
279         [QCOM_RPM_PM8921_SMPS1] =               { 117, 31, 30, 2 },
280         [QCOM_RPM_PM8921_SMPS2] =               { 119, 33, 31, 2 },
281         [QCOM_RPM_PM8921_SMPS3] =               { 121, 35, 32, 2 },
282         [QCOM_RPM_PM8921_SMPS4] =               { 123, 37, 33, 2 },
283         [QCOM_RPM_PM8921_SMPS5] =               { 125, 39, 34, 2 },
284         [QCOM_RPM_PM8921_SMPS6] =               { 127, 41, 35, 2 },
285         [QCOM_RPM_PM8921_SMPS7] =               { 129, 43, 36, 2 },
286         [QCOM_RPM_PM8921_SMPS8] =               { 131, 45, 37, 2 },
287         [QCOM_RPM_PM8921_LDO1] =                { 133, 47, 38, 2 },
288         [QCOM_RPM_PM8921_LDO2] =                { 135, 49, 39, 2 },
289         [QCOM_RPM_PM8921_LDO3] =                { 137, 51, 40, 2 },
290         [QCOM_RPM_PM8921_LDO4] =                { 139, 53, 41, 2 },
291         [QCOM_RPM_PM8921_LDO5] =                { 141, 55, 42, 2 },
292         [QCOM_RPM_PM8921_LDO6] =                { 143, 57, 43, 2 },
293         [QCOM_RPM_PM8921_LDO7] =                { 145, 59, 44, 2 },
294         [QCOM_RPM_PM8921_LDO8] =                { 147, 61, 45, 2 },
295         [QCOM_RPM_PM8921_LDO9] =                { 149, 63, 46, 2 },
296         [QCOM_RPM_PM8921_LDO10] =               { 151, 65, 47, 2 },
297         [QCOM_RPM_PM8921_LDO11] =               { 153, 67, 48, 2 },
298         [QCOM_RPM_PM8921_LDO12] =               { 155, 69, 49, 2 },
299         [QCOM_RPM_PM8921_LDO13] =               { 157, 71, 50, 2 },
300         [QCOM_RPM_PM8921_LDO14] =               { 159, 73, 51, 2 },
301         [QCOM_RPM_PM8921_LDO15] =               { 161, 75, 52, 2 },
302         [QCOM_RPM_PM8921_LDO16] =               { 163, 77, 53, 2 },
303         [QCOM_RPM_PM8921_LDO17] =               { 165, 79, 54, 2 },
304         [QCOM_RPM_PM8921_LDO18] =               { 167, 81, 55, 2 },
305         [QCOM_RPM_PM8921_LDO19] =               { 169, 83, 56, 2 },
306         [QCOM_RPM_PM8921_LDO20] =               { 171, 85, 57, 2 },
307         [QCOM_RPM_PM8921_LDO21] =               { 173, 87, 58, 2 },
308         [QCOM_RPM_PM8921_LDO22] =               { 175, 89, 59, 2 },
309         [QCOM_RPM_PM8921_LDO23] =               { 177, 91, 60, 2 },
310         [QCOM_RPM_PM8921_LDO24] =               { 179, 93, 61, 2 },
311         [QCOM_RPM_PM8921_LDO25] =               { 181, 95, 62, 2 },
312         [QCOM_RPM_PM8921_LDO26] =               { 183, 97, 63, 2 },
313         [QCOM_RPM_PM8921_LDO27] =               { 185, 99, 64, 2 },
314         [QCOM_RPM_PM8921_LDO28] =               { 187, 101, 65, 2 },
315         [QCOM_RPM_PM8921_LDO29] =               { 189, 103, 66, 2 },
316         [QCOM_RPM_PM8921_CLK1] =                { 191, 105, 67, 2 },
317         [QCOM_RPM_PM8921_CLK2] =                { 193, 107, 68, 2 },
318         [QCOM_RPM_PM8921_LVS1] =                { 195, 109, 69, 1 },
319         [QCOM_RPM_PM8921_LVS2] =                { 196, 110, 70, 1 },
320         [QCOM_RPM_PM8921_LVS3] =                { 197, 111, 71, 1 },
321         [QCOM_RPM_PM8921_LVS4] =                { 198, 112, 72, 1 },
322         [QCOM_RPM_PM8921_LVS5] =                { 199, 113, 73, 1 },
323         [QCOM_RPM_PM8921_LVS6] =                { 200, 114, 74, 1 },
324         [QCOM_RPM_PM8921_LVS7] =                { 201, 115, 75, 1 },
325         [QCOM_RPM_PM8921_NCP] =                 { 202, 116, 80, 2 },
326         [QCOM_RPM_CXO_BUFFERS] =                { 204, 118, 81, 1 },
327         [QCOM_RPM_USB_OTG_SWITCH] =             { 205, 119, 82, 1 },
328         [QCOM_RPM_HDMI_SWITCH] =                { 206, 120, 83, 1 },
329         [QCOM_RPM_DDR_DMM] =                    { 207, 121, 84, 2 },
330 };
331
332 static const struct qcom_rpm_data msm8960_template = {
333         .version = 3,
334         .resource_table = msm8960_rpm_resource_table,
335         .n_resources = ARRAY_SIZE(msm8960_rpm_resource_table),
336         .req_ctx_off = 3,
337         .req_sel_off = 11,
338         .ack_ctx_off = 15,
339         .ack_sel_off = 23,
340         .sel_size = 4,
341 };
342
343 static const struct qcom_rpm_resource ipq806x_rpm_resource_table[] = {
344         [QCOM_RPM_CXO_CLK] =                    { 25, 9, 5, 1 },
345         [QCOM_RPM_PXO_CLK] =                    { 26, 10, 6, 1 },
346         [QCOM_RPM_APPS_FABRIC_CLK] =            { 27, 11, 8, 1 },
347         [QCOM_RPM_SYS_FABRIC_CLK] =             { 28, 12, 9, 1 },
348         [QCOM_RPM_NSS_FABRIC_0_CLK] =           { 29, 13, 10, 1 },
349         [QCOM_RPM_DAYTONA_FABRIC_CLK] =         { 30, 14, 11, 1 },
350         [QCOM_RPM_SFPB_CLK] =                   { 31, 15, 12, 1 },
351         [QCOM_RPM_CFPB_CLK] =                   { 32, 16, 13, 1 },
352         [QCOM_RPM_NSS_FABRIC_1_CLK] =           { 33, 17, 14, 1 },
353         [QCOM_RPM_EBI1_CLK] =                   { 34, 18, 16, 1 },
354         [QCOM_RPM_APPS_FABRIC_HALT] =           { 35, 19, 18, 2 },
355         [QCOM_RPM_APPS_FABRIC_MODE] =           { 37, 20, 19, 3 },
356         [QCOM_RPM_APPS_FABRIC_IOCTL] =          { 40, 21, 20, 1 },
357         [QCOM_RPM_APPS_FABRIC_ARB] =            { 41, 22, 21, 12 },
358         [QCOM_RPM_SYS_FABRIC_HALT] =            { 53, 23, 22, 2 },
359         [QCOM_RPM_SYS_FABRIC_MODE] =            { 55, 24, 23, 3 },
360         [QCOM_RPM_SYS_FABRIC_IOCTL] =           { 58, 25, 24, 1 },
361         [QCOM_RPM_SYS_FABRIC_ARB] =             { 59, 26, 25, 30 },
362         [QCOM_RPM_MM_FABRIC_HALT] =             { 89, 27, 26, 2 },
363         [QCOM_RPM_MM_FABRIC_MODE] =             { 91, 28, 27, 3 },
364         [QCOM_RPM_MM_FABRIC_IOCTL] =            { 94, 29, 28, 1 },
365         [QCOM_RPM_MM_FABRIC_ARB] =              { 95, 30, 29, 2 },
366         [QCOM_RPM_CXO_BUFFERS] =                { 209, 33, 31, 1 },
367         [QCOM_RPM_USB_OTG_SWITCH] =             { 210, 34, 32, 1 },
368         [QCOM_RPM_HDMI_SWITCH] =                { 211, 35, 33, 1 },
369         [QCOM_RPM_DDR_DMM] =                    { 212, 36, 34, 2 },
370         [QCOM_RPM_VDDMIN_GPIO] =                { 215, 40, 39, 1 },
371         [QCOM_RPM_SMB208_S1a] =                 { 216, 41, 90, 2 },
372         [QCOM_RPM_SMB208_S1b] =                 { 218, 43, 91, 2 },
373         [QCOM_RPM_SMB208_S2a] =                 { 220, 45, 92, 2 },
374         [QCOM_RPM_SMB208_S2b] =                 { 222, 47, 93, 2 },
375 };
376
377 static const struct qcom_rpm_data ipq806x_template = {
378         .version = 3,
379         .resource_table = ipq806x_rpm_resource_table,
380         .n_resources = ARRAY_SIZE(ipq806x_rpm_resource_table),
381         .req_ctx_off = 3,
382         .req_sel_off = 11,
383         .ack_ctx_off = 15,
384         .ack_sel_off = 23,
385         .sel_size = 4,
386 };
387
388 static const struct of_device_id qcom_rpm_of_match[] = {
389         { .compatible = "qcom,rpm-apq8064", .data = &apq8064_template },
390         { .compatible = "qcom,rpm-msm8660", .data = &msm8660_template },
391         { .compatible = "qcom,rpm-msm8960", .data = &msm8960_template },
392         { .compatible = "qcom,rpm-ipq8064", .data = &ipq806x_template },
393         { }
394 };
395 MODULE_DEVICE_TABLE(of, qcom_rpm_of_match);
396
397 int qcom_rpm_write(struct qcom_rpm *rpm,
398                    int state,
399                    int resource,
400                    u32 *buf, size_t count)
401 {
402         const struct qcom_rpm_resource *res;
403         const struct qcom_rpm_data *data = rpm->data;
404         u32 sel_mask[RPM_MAX_SEL_SIZE] = { 0 };
405         int left;
406         int ret = 0;
407         int i;
408
409         if (WARN_ON(resource < 0 || resource >= data->n_resources))
410                 return -EINVAL;
411
412         res = &data->resource_table[resource];
413         if (WARN_ON(res->size != count))
414                 return -EINVAL;
415
416         mutex_lock(&rpm->lock);
417
418         for (i = 0; i < res->size; i++)
419                 writel_relaxed(buf[i], RPM_REQ_REG(rpm, res->target_id + i));
420
421         bitmap_set((unsigned long *)sel_mask, res->select_id, 1);
422         for (i = 0; i < rpm->data->sel_size; i++) {
423                 writel_relaxed(sel_mask[i],
424                                RPM_CTRL_REG(rpm, rpm->data->req_sel_off + i));
425         }
426
427         writel_relaxed(BIT(state), RPM_CTRL_REG(rpm, rpm->data->req_ctx_off));
428
429         reinit_completion(&rpm->ack);
430         regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
431
432         left = wait_for_completion_timeout(&rpm->ack, RPM_REQUEST_TIMEOUT);
433         if (!left)
434                 ret = -ETIMEDOUT;
435         else if (rpm->ack_status & RPM_REJECTED)
436                 ret = -EIO;
437
438         mutex_unlock(&rpm->lock);
439
440         return ret;
441 }
442 EXPORT_SYMBOL(qcom_rpm_write);
443
444 static irqreturn_t qcom_rpm_ack_interrupt(int irq, void *dev)
445 {
446         struct qcom_rpm *rpm = dev;
447         u32 ack;
448         int i;
449
450         ack = readl_relaxed(RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
451         for (i = 0; i < rpm->data->sel_size; i++)
452                 writel_relaxed(0,
453                         RPM_CTRL_REG(rpm, rpm->data->ack_sel_off + i));
454         writel(0, RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
455
456         if (ack & RPM_NOTIFICATION) {
457                 dev_warn(rpm->dev, "ignoring notification!\n");
458         } else {
459                 rpm->ack_status = ack;
460                 complete(&rpm->ack);
461         }
462
463         return IRQ_HANDLED;
464 }
465
466 static irqreturn_t qcom_rpm_err_interrupt(int irq, void *dev)
467 {
468         struct qcom_rpm *rpm = dev;
469
470         regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
471         dev_err(rpm->dev, "RPM triggered fatal error\n");
472
473         return IRQ_HANDLED;
474 }
475
476 static irqreturn_t qcom_rpm_wakeup_interrupt(int irq, void *dev)
477 {
478         return IRQ_HANDLED;
479 }
480
481 static int qcom_rpm_probe(struct platform_device *pdev)
482 {
483         const struct of_device_id *match;
484         struct device_node *syscon_np;
485         struct resource *res;
486         struct qcom_rpm *rpm;
487         u32 fw_version[3];
488         int irq_wakeup;
489         int irq_ack;
490         int irq_err;
491         int ret;
492
493         rpm = devm_kzalloc(&pdev->dev, sizeof(*rpm), GFP_KERNEL);
494         if (!rpm)
495                 return -ENOMEM;
496
497         rpm->dev = &pdev->dev;
498         mutex_init(&rpm->lock);
499         init_completion(&rpm->ack);
500
501         irq_ack = platform_get_irq_byname(pdev, "ack");
502         if (irq_ack < 0) {
503                 dev_err(&pdev->dev, "required ack interrupt missing\n");
504                 return irq_ack;
505         }
506
507         irq_err = platform_get_irq_byname(pdev, "err");
508         if (irq_err < 0) {
509                 dev_err(&pdev->dev, "required err interrupt missing\n");
510                 return irq_err;
511         }
512
513         irq_wakeup = platform_get_irq_byname(pdev, "wakeup");
514         if (irq_wakeup < 0) {
515                 dev_err(&pdev->dev, "required wakeup interrupt missing\n");
516                 return irq_wakeup;
517         }
518
519         match = of_match_device(qcom_rpm_of_match, &pdev->dev);
520         rpm->data = match->data;
521
522         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
523         rpm->status_regs = devm_ioremap_resource(&pdev->dev, res);
524         if (IS_ERR(rpm->status_regs))
525                 return PTR_ERR(rpm->status_regs);
526         rpm->ctrl_regs = rpm->status_regs + 0x400;
527         rpm->req_regs = rpm->status_regs + 0x600;
528
529         syscon_np = of_parse_phandle(pdev->dev.of_node, "qcom,ipc", 0);
530         if (!syscon_np) {
531                 dev_err(&pdev->dev, "no qcom,ipc node\n");
532                 return -ENODEV;
533         }
534
535         rpm->ipc_regmap = syscon_node_to_regmap(syscon_np);
536         if (IS_ERR(rpm->ipc_regmap))
537                 return PTR_ERR(rpm->ipc_regmap);
538
539         ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 1,
540                                          &rpm->ipc_offset);
541         if (ret < 0) {
542                 dev_err(&pdev->dev, "no offset in qcom,ipc\n");
543                 return -EINVAL;
544         }
545
546         ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 2,
547                                          &rpm->ipc_bit);
548         if (ret < 0) {
549                 dev_err(&pdev->dev, "no bit in qcom,ipc\n");
550                 return -EINVAL;
551         }
552
553         dev_set_drvdata(&pdev->dev, rpm);
554
555         fw_version[0] = readl(RPM_STATUS_REG(rpm, 0));
556         fw_version[1] = readl(RPM_STATUS_REG(rpm, 1));
557         fw_version[2] = readl(RPM_STATUS_REG(rpm, 2));
558         if (fw_version[0] != rpm->data->version) {
559                 dev_err(&pdev->dev,
560                         "RPM version %u.%u.%u incompatible with driver version %u",
561                         fw_version[0],
562                         fw_version[1],
563                         fw_version[2],
564                         rpm->data->version);
565                 return -EFAULT;
566         }
567
568         dev_info(&pdev->dev, "RPM firmware %u.%u.%u\n", fw_version[0],
569                                                         fw_version[1],
570                                                         fw_version[2]);
571
572         ret = devm_request_irq(&pdev->dev,
573                                irq_ack,
574                                qcom_rpm_ack_interrupt,
575                                IRQF_TRIGGER_RISING,
576                                "qcom_rpm_ack",
577                                rpm);
578         if (ret) {
579                 dev_err(&pdev->dev, "failed to request ack interrupt\n");
580                 return ret;
581         }
582
583         ret = irq_set_irq_wake(irq_ack, 1);
584         if (ret)
585                 dev_warn(&pdev->dev, "failed to mark ack irq as wakeup\n");
586
587         ret = devm_request_irq(&pdev->dev,
588                                irq_err,
589                                qcom_rpm_err_interrupt,
590                                IRQF_TRIGGER_RISING,
591                                "qcom_rpm_err",
592                                rpm);
593         if (ret) {
594                 dev_err(&pdev->dev, "failed to request err interrupt\n");
595                 return ret;
596         }
597
598         ret = devm_request_irq(&pdev->dev,
599                                irq_wakeup,
600                                qcom_rpm_wakeup_interrupt,
601                                IRQF_TRIGGER_RISING,
602                                "qcom_rpm_wakeup",
603                                rpm);
604         if (ret) {
605                 dev_err(&pdev->dev, "failed to request wakeup interrupt\n");
606                 return ret;
607         }
608
609         ret = irq_set_irq_wake(irq_wakeup, 1);
610         if (ret)
611                 dev_warn(&pdev->dev, "failed to mark wakeup irq as wakeup\n");
612
613         return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
614 }
615
616 static int qcom_rpm_remove(struct platform_device *pdev)
617 {
618         of_platform_depopulate(&pdev->dev);
619         return 0;
620 }
621
622 static struct platform_driver qcom_rpm_driver = {
623         .probe = qcom_rpm_probe,
624         .remove = qcom_rpm_remove,
625         .driver  = {
626                 .name  = "qcom_rpm",
627                 .of_match_table = qcom_rpm_of_match,
628         },
629 };
630
631 static int __init qcom_rpm_init(void)
632 {
633         return platform_driver_register(&qcom_rpm_driver);
634 }
635 arch_initcall(qcom_rpm_init);
636
637 static void __exit qcom_rpm_exit(void)
638 {
639         platform_driver_unregister(&qcom_rpm_driver);
640 }
641 module_exit(qcom_rpm_exit)
642
643 MODULE_DESCRIPTION("Qualcomm Resource Power Manager driver");
644 MODULE_LICENSE("GPL v2");
645 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");