Merge branch 'for-3.5-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj...
[firefly-linux-kernel-4.4.55.git] / drivers / media / video / tvp7002.c
1 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2  * Digitizer with Horizontal PLL registers
3  *
4  * Copyright (C) 2009 Texas Instruments Inc
5  * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
6  *
7  * This code is partially based upon the TVP5150 driver
8  * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9  * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10  * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
11  * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License as published by
15  * the Free Software Foundation; either version 2 of the License, or
16  * (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software
25  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26  */
27 #include <linux/delay.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/videodev2.h>
31 #include <linux/module.h>
32 #include <linux/v4l2-dv-timings.h>
33 #include <media/tvp7002.h>
34 #include <media/v4l2-device.h>
35 #include <media/v4l2-chip-ident.h>
36 #include <media/v4l2-common.h>
37 #include <media/v4l2-ctrls.h>
38 #include "tvp7002_reg.h"
39
40 MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
41 MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
42 MODULE_LICENSE("GPL");
43
44 /* Module Name */
45 #define TVP7002_MODULE_NAME     "tvp7002"
46
47 /* I2C retry attempts */
48 #define I2C_RETRY_COUNT         (5)
49
50 /* End of registers */
51 #define TVP7002_EOR             0x5c
52
53 /* Read write definition for registers */
54 #define TVP7002_READ            0
55 #define TVP7002_WRITE           1
56 #define TVP7002_RESERVED        2
57
58 /* Interlaced vs progressive mask and shift */
59 #define TVP7002_IP_SHIFT        5
60 #define TVP7002_INPR_MASK       (0x01 << TVP7002_IP_SHIFT)
61
62 /* Shift for CPL and LPF registers */
63 #define TVP7002_CL_SHIFT        8
64 #define TVP7002_CL_MASK         0x0f
65
66 /* Debug functions */
67 static bool debug;
68 module_param(debug, bool, 0644);
69 MODULE_PARM_DESC(debug, "Debug level (0-2)");
70
71 /* Structure for register values */
72 struct i2c_reg_value {
73         u8 reg;
74         u8 value;
75         u8 type;
76 };
77
78 /*
79  * Register default values (according to tvp7002 datasheet)
80  * In the case of read-only registers, the value (0xff) is
81  * never written. R/W functionality is controlled by the
82  * writable bit in the register struct definition.
83  */
84 static const struct i2c_reg_value tvp7002_init_default[] = {
85         { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
86         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
87         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
88         { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
89         { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
90         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
91         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
92         { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
93         { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
94         { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
95         { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
96         { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
97         { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
98         { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
99         { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
100         { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
101         { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
102         { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
103         { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
104         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
105         { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
106         { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
107         { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
108         { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
109         { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
110         { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
111         { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
112         { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
113         { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
114         { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
115         { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
116         { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
117         { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
118         { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
119         { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
120         { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
121         { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
122         { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
123         { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
124         { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
125         { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
126         { 0x29, 0x08, TVP7002_RESERVED },
127         { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
128         /* PWR_CTL is controlled only by the probe and reset functions */
129         { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
130         { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
131         { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
132         { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
133         { TVP7002_RGB_COARSE_CLAMP_CTL, 0x8c, TVP7002_WRITE },
134         { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
135         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
136         { 0x32, 0x18, TVP7002_RESERVED },
137         { 0x33, 0x60, TVP7002_RESERVED },
138         { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
139         { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
140         { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
141         { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
142         { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
143         { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
144         { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
145         { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
146         { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
147         { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
148         { 0x3e, 0x60, TVP7002_RESERVED },
149         { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
150         { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
151         { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
152         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
153         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
154         { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
155         { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
156         { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
157         { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
158         { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
159         { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
160         { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
161         { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
162         { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
163         { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
164         { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
165         { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
166         { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
167         { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
168         { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
169         { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
170         { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
171         { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
172         { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
173         { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
174         { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
175         { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
176         { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
177         { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
178         /* This signals end of register values */
179         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
180 };
181
182 /* Register parameters for 480P */
183 static const struct i2c_reg_value tvp7002_parms_480P[] = {
184         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
185         { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
186         { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
187         { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
188         { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
189         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
190         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
191         { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
192         { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
193         { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
194         { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
195         { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
196         { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
197         { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
198         { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
199         { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
200         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
201 };
202
203 /* Register parameters for 576P */
204 static const struct i2c_reg_value tvp7002_parms_576P[] = {
205         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
206         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
207         { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
208         { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
209         { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
210         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
211         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
212         { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
213         { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
214         { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
215         { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
216         { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
217         { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
218         { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
219         { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
220         { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
221         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
222 };
223
224 /* Register parameters for 1080I60 */
225 static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
226         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
227         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
228         { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
229         { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
230         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
231         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
232         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
233         { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
234         { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
235         { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
236         { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
237         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
238         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
239         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
240         { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
241         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
242         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
243 };
244
245 /* Register parameters for 1080P60 */
246 static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
247         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
248         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
249         { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
250         { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
251         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
252         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
253         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
254         { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
255         { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
256         { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
257         { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
258         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
259         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
260         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
261         { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
262         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
263         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
264 };
265
266 /* Register parameters for 1080I50 */
267 static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
268         { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
269         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
270         { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
271         { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
272         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
273         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
274         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
275         { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
276         { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
277         { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
278         { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
279         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
280         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
281         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
282         { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
283         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
284         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
285 };
286
287 /* Register parameters for 720P60 */
288 static const struct i2c_reg_value tvp7002_parms_720P60[] = {
289         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
290         { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
291         { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
292         { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
293         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
294         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
295         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
296         { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
297         { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
298         { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
299         { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
300         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
301         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
302         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
303         { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
304         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
305         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
306 };
307
308 /* Register parameters for 720P50 */
309 static const struct i2c_reg_value tvp7002_parms_720P50[] = {
310         { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
311         { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
312         { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
313         { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
314         { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
315         { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
316         { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
317         { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
318         { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
319         { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
320         { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
321         { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
322         { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
323         { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
324         { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
325         { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
326         { TVP7002_EOR, 0xff, TVP7002_RESERVED }
327 };
328
329 /* Preset definition for handling device operation */
330 struct tvp7002_preset_definition {
331         u32 preset;
332         struct v4l2_dv_timings timings;
333         const struct i2c_reg_value *p_settings;
334         enum v4l2_colorspace color_space;
335         enum v4l2_field scanmode;
336         u16 progressive;
337         u16 lines_per_frame;
338         u16 cpl_min;
339         u16 cpl_max;
340 };
341
342 /* Struct list for digital video presets */
343 static const struct tvp7002_preset_definition tvp7002_presets[] = {
344         {
345                 V4L2_DV_720P60,
346                 V4L2_DV_BT_CEA_1280X720P60,
347                 tvp7002_parms_720P60,
348                 V4L2_COLORSPACE_REC709,
349                 V4L2_FIELD_NONE,
350                 1,
351                 0x2EE,
352                 135,
353                 153
354         },
355         {
356                 V4L2_DV_1080I60,
357                 V4L2_DV_BT_CEA_1920X1080I60,
358                 tvp7002_parms_1080I60,
359                 V4L2_COLORSPACE_REC709,
360                 V4L2_FIELD_INTERLACED,
361                 0,
362                 0x465,
363                 181,
364                 205
365         },
366         {
367                 V4L2_DV_1080I50,
368                 V4L2_DV_BT_CEA_1920X1080I50,
369                 tvp7002_parms_1080I50,
370                 V4L2_COLORSPACE_REC709,
371                 V4L2_FIELD_INTERLACED,
372                 0,
373                 0x465,
374                 217,
375                 245
376         },
377         {
378                 V4L2_DV_720P50,
379                 V4L2_DV_BT_CEA_1280X720P50,
380                 tvp7002_parms_720P50,
381                 V4L2_COLORSPACE_REC709,
382                 V4L2_FIELD_NONE,
383                 1,
384                 0x2EE,
385                 163,
386                 183
387         },
388         {
389                 V4L2_DV_1080P60,
390                 V4L2_DV_BT_CEA_1920X1080P60,
391                 tvp7002_parms_1080P60,
392                 V4L2_COLORSPACE_REC709,
393                 V4L2_FIELD_NONE,
394                 1,
395                 0x465,
396                 90,
397                 102
398         },
399         {
400                 V4L2_DV_480P59_94,
401                 V4L2_DV_BT_CEA_720X480P59_94,
402                 tvp7002_parms_480P,
403                 V4L2_COLORSPACE_SMPTE170M,
404                 V4L2_FIELD_NONE,
405                 1,
406                 0x20D,
407                 0xffff,
408                 0xffff
409         },
410         {
411                 V4L2_DV_576P50,
412                 V4L2_DV_BT_CEA_720X576P50,
413                 tvp7002_parms_576P,
414                 V4L2_COLORSPACE_SMPTE170M,
415                 V4L2_FIELD_NONE,
416                 1,
417                 0x271,
418                 0xffff,
419                 0xffff
420         }
421 };
422
423 #define NUM_PRESETS     ARRAY_SIZE(tvp7002_presets)
424
425 /* Device definition */
426 struct tvp7002 {
427         struct v4l2_subdev sd;
428         struct v4l2_ctrl_handler hdl;
429         const struct tvp7002_config *pdata;
430
431         int ver;
432         int streaming;
433
434         const struct tvp7002_preset_definition *current_preset;
435 };
436
437 /*
438  * to_tvp7002 - Obtain device handler TVP7002
439  * @sd: ptr to v4l2_subdev struct
440  *
441  * Returns device handler tvp7002.
442  */
443 static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
444 {
445         return container_of(sd, struct tvp7002, sd);
446 }
447
448 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
449 {
450         return &container_of(ctrl->handler, struct tvp7002, hdl)->sd;
451 }
452
453 /*
454  * tvp7002_read - Read a value from a register in an TVP7002
455  * @sd: ptr to v4l2_subdev struct
456  * @addr: TVP7002 register address
457  * @dst: pointer to 8-bit destination
458  *
459  * Returns value read if successful, or non-zero (-1) otherwise.
460  */
461 static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
462 {
463         struct i2c_client *c = v4l2_get_subdevdata(sd);
464         int retry;
465         int error;
466
467         for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
468                 error = i2c_smbus_read_byte_data(c, addr);
469
470                 if (error >= 0) {
471                         *dst = (u8)error;
472                         return 0;
473                 }
474
475                 msleep_interruptible(10);
476         }
477         v4l2_err(sd, "TVP7002 read error %d\n", error);
478         return error;
479 }
480
481 /*
482  * tvp7002_read_err() - Read a register value with error code
483  * @sd: pointer to standard V4L2 sub-device structure
484  * @reg: destination register
485  * @val: value to be read
486  * @err: pointer to error value
487  *
488  * Read a value in a register and save error value in pointer.
489  * Also update the register table if successful
490  */
491 static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
492                                                         u8 *dst, int *err)
493 {
494         if (!*err)
495                 *err = tvp7002_read(sd, reg, dst);
496 }
497
498 /*
499  * tvp7002_write() - Write a value to a register in TVP7002
500  * @sd: ptr to v4l2_subdev struct
501  * @addr: TVP7002 register address
502  * @value: value to be written to the register
503  *
504  * Write a value to a register in an TVP7002 decoder device.
505  * Returns zero if successful, or non-zero otherwise.
506  */
507 static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
508 {
509         struct i2c_client *c;
510         int retry;
511         int error;
512
513         c = v4l2_get_subdevdata(sd);
514
515         for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
516                 error = i2c_smbus_write_byte_data(c, addr, value);
517
518                 if (error >= 0)
519                         return 0;
520
521                 v4l2_warn(sd, "Write: retry ... %d\n", retry);
522                 msleep_interruptible(10);
523         }
524         v4l2_err(sd, "TVP7002 write error %d\n", error);
525         return error;
526 }
527
528 /*
529  * tvp7002_write_err() - Write a register value with error code
530  * @sd: pointer to standard V4L2 sub-device structure
531  * @reg: destination register
532  * @val: value to be written
533  * @err: pointer to error value
534  *
535  * Write a value in a register and save error value in pointer.
536  * Also update the register table if successful
537  */
538 static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
539                                                         u8 val, int *err)
540 {
541         if (!*err)
542                 *err = tvp7002_write(sd, reg, val);
543 }
544
545 /*
546  * tvp7002_g_chip_ident() - Get chip identification number
547  * @sd: ptr to v4l2_subdev struct
548  * @chip: ptr to v4l2_dbg_chip_ident struct
549  *
550  * Obtains the chip's identification number.
551  * Returns zero or -EINVAL if read operation fails.
552  */
553 static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
554                                         struct v4l2_dbg_chip_ident *chip)
555 {
556         u8 rev;
557         int error;
558         struct i2c_client *client = v4l2_get_subdevdata(sd);
559
560         error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
561
562         if (error < 0)
563                 return error;
564
565         return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
566 }
567
568 /*
569  * tvp7002_write_inittab() - Write initialization values
570  * @sd: ptr to v4l2_subdev struct
571  * @regs: ptr to i2c_reg_value struct
572  *
573  * Write initialization values.
574  * Returns zero or -EINVAL if read operation fails.
575  */
576 static int tvp7002_write_inittab(struct v4l2_subdev *sd,
577                                         const struct i2c_reg_value *regs)
578 {
579         int error = 0;
580
581         /* Initialize the first (defined) registers */
582         while (TVP7002_EOR != regs->reg) {
583                 if (TVP7002_WRITE == regs->type)
584                         tvp7002_write_err(sd, regs->reg, regs->value, &error);
585                 regs++;
586         }
587
588         return error;
589 }
590
591 /*
592  * tvp7002_s_dv_preset() - Set digital video preset
593  * @sd: ptr to v4l2_subdev struct
594  * @dv_preset: ptr to v4l2_dv_preset struct
595  *
596  * Set the digital video preset for a TVP7002 decoder device.
597  * Returns zero when successful or -EINVAL if register access fails.
598  */
599 static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
600                                         struct v4l2_dv_preset *dv_preset)
601 {
602         struct tvp7002 *device = to_tvp7002(sd);
603         u32 preset;
604         int i;
605
606         for (i = 0; i < NUM_PRESETS; i++) {
607                 preset = tvp7002_presets[i].preset;
608                 if (preset == dv_preset->preset) {
609                         device->current_preset = &tvp7002_presets[i];
610                         return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
611                 }
612         }
613
614         return -EINVAL;
615 }
616
617 static int tvp7002_s_dv_timings(struct v4l2_subdev *sd,
618                                         struct v4l2_dv_timings *dv_timings)
619 {
620         struct tvp7002 *device = to_tvp7002(sd);
621         const struct v4l2_bt_timings *bt = &dv_timings->bt;
622         int i;
623
624         if (dv_timings->type != V4L2_DV_BT_656_1120)
625                 return -EINVAL;
626         for (i = 0; i < NUM_PRESETS; i++) {
627                 const struct v4l2_bt_timings *t = &tvp7002_presets[i].timings.bt;
628
629                 if (!memcmp(bt, t, &bt->standards - &bt->width)) {
630                         device->current_preset = &tvp7002_presets[i];
631                         return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
632                 }
633         }
634         return -EINVAL;
635 }
636
637 static int tvp7002_g_dv_timings(struct v4l2_subdev *sd,
638                                         struct v4l2_dv_timings *dv_timings)
639 {
640         struct tvp7002 *device = to_tvp7002(sd);
641
642         *dv_timings = device->current_preset->timings;
643         return 0;
644 }
645
646 /*
647  * tvp7002_s_ctrl() - Set a control
648  * @ctrl: ptr to v4l2_ctrl struct
649  *
650  * Set a control in TVP7002 decoder device.
651  * Returns zero when successful or -EINVAL if register access fails.
652  */
653 static int tvp7002_s_ctrl(struct v4l2_ctrl *ctrl)
654 {
655         struct v4l2_subdev *sd = to_sd(ctrl);
656         int error = 0;
657
658         switch (ctrl->id) {
659         case V4L2_CID_GAIN:
660                 tvp7002_write_err(sd, TVP7002_R_FINE_GAIN, ctrl->val, &error);
661                 tvp7002_write_err(sd, TVP7002_G_FINE_GAIN, ctrl->val, &error);
662                 tvp7002_write_err(sd, TVP7002_B_FINE_GAIN, ctrl->val, &error);
663                 return error;
664         }
665         return -EINVAL;
666 }
667
668 /*
669  * tvp7002_mbus_fmt() - V4L2 decoder interface handler for try/s/g_mbus_fmt
670  * @sd: pointer to standard V4L2 sub-device structure
671  * @f: pointer to mediabus format structure
672  *
673  * Negotiate the image capture size and mediabus format.
674  * There is only one possible format, so this single function works for
675  * get, set and try.
676  */
677 static int tvp7002_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *f)
678 {
679         struct tvp7002 *device = to_tvp7002(sd);
680         struct v4l2_dv_enum_preset e_preset;
681         int error;
682
683         /* Calculate height and width based on current standard */
684         error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
685         if (error)
686                 return error;
687
688         f->width = e_preset.width;
689         f->height = e_preset.height;
690         f->code = V4L2_MBUS_FMT_YUYV10_1X20;
691         f->field = device->current_preset->scanmode;
692         f->colorspace = device->current_preset->color_space;
693
694         v4l2_dbg(1, debug, sd, "MBUS_FMT: Width - %d, Height - %d",
695                         f->width, f->height);
696         return 0;
697 }
698
699 /*
700  * tvp7002_query_dv_preset() - query DV preset
701  * @sd: pointer to standard V4L2 sub-device structure
702  * @qpreset: standard V4L2 v4l2_dv_preset structure
703  *
704  * Returns the current DV preset by TVP7002. If no active input is
705  * detected, returns -EINVAL
706  */
707 static int tvp7002_query_dv(struct v4l2_subdev *sd, int *index)
708 {
709         const struct tvp7002_preset_definition *presets = tvp7002_presets;
710         u8 progressive;
711         u32 lpfr;
712         u32 cpln;
713         int error = 0;
714         u8 lpf_lsb;
715         u8 lpf_msb;
716         u8 cpl_lsb;
717         u8 cpl_msb;
718
719         /* Return invalid index if no active input is detected */
720         *index = NUM_PRESETS;
721
722         /* Read standards from device registers */
723         tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
724         tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
725
726         if (error < 0)
727                 return error;
728
729         tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
730         tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
731
732         if (error < 0)
733                 return error;
734
735         /* Get lines per frame, clocks per line and interlaced/progresive */
736         lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
737         cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
738         progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
739
740         /* Do checking of video modes */
741         for (*index = 0; *index < NUM_PRESETS; (*index)++, presets++)
742                 if (lpfr == presets->lines_per_frame &&
743                         progressive == presets->progressive) {
744                         if (presets->cpl_min == 0xffff)
745                                 break;
746                         if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
747                                 break;
748                 }
749
750         if (*index == NUM_PRESETS) {
751                 v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
752                                                                 lpfr, cpln);
753                 return -ENOLINK;
754         }
755
756         /* Update lines per frame and clocks per line info */
757         v4l2_dbg(1, debug, sd, "detected preset: %d\n", *index);
758         return 0;
759 }
760
761 static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
762                                         struct v4l2_dv_preset *qpreset)
763 {
764         int index;
765         int err = tvp7002_query_dv(sd, &index);
766
767         if (err || index == NUM_PRESETS) {
768                 qpreset->preset = V4L2_DV_INVALID;
769                 if (err == -ENOLINK)
770                         err = 0;
771                 return err;
772         }
773         qpreset->preset = tvp7002_presets[index].preset;
774         return 0;
775 }
776
777 static int tvp7002_query_dv_timings(struct v4l2_subdev *sd,
778                                         struct v4l2_dv_timings *timings)
779 {
780         int index;
781         int err = tvp7002_query_dv(sd, &index);
782
783         if (err)
784                 return err;
785         *timings = tvp7002_presets[index].timings;
786         return 0;
787 }
788
789 #ifdef CONFIG_VIDEO_ADV_DEBUG
790 /*
791  * tvp7002_g_register() - Get the value of a register
792  * @sd: ptr to v4l2_subdev struct
793  * @reg: ptr to v4l2_dbg_register struct
794  *
795  * Get the value of a TVP7002 decoder device register.
796  * Returns zero when successful, -EINVAL if register read fails or
797  * access to I2C client fails, -EPERM if the call is not allowed
798  * by disabled CAP_SYS_ADMIN.
799  */
800 static int tvp7002_g_register(struct v4l2_subdev *sd,
801                                                 struct v4l2_dbg_register *reg)
802 {
803         struct i2c_client *client = v4l2_get_subdevdata(sd);
804         u8 val;
805         int ret;
806
807         if (!v4l2_chip_match_i2c_client(client, &reg->match))
808                 return -EINVAL;
809         if (!capable(CAP_SYS_ADMIN))
810                 return -EPERM;
811
812         ret = tvp7002_read(sd, reg->reg & 0xff, &val);
813         reg->val = val;
814         return ret;
815 }
816
817 /*
818  * tvp7002_s_register() - set a control
819  * @sd: ptr to v4l2_subdev struct
820  * @reg: ptr to v4l2_dbg_register struct
821  *
822  * Get the value of a TVP7002 decoder device register.
823  * Returns zero when successful, -EINVAL if register read fails or
824  * -EPERM if call not allowed.
825  */
826 static int tvp7002_s_register(struct v4l2_subdev *sd,
827                                                 struct v4l2_dbg_register *reg)
828 {
829         struct i2c_client *client = v4l2_get_subdevdata(sd);
830
831         if (!v4l2_chip_match_i2c_client(client, &reg->match))
832                 return -EINVAL;
833         if (!capable(CAP_SYS_ADMIN))
834                 return -EPERM;
835
836         return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
837 }
838 #endif
839
840 /*
841  * tvp7002_enum_mbus_fmt() - Enum supported mediabus formats
842  * @sd: pointer to standard V4L2 sub-device structure
843  * @index: format index
844  * @code: pointer to mediabus format
845  *
846  * Enumerate supported mediabus formats.
847  */
848
849 static int tvp7002_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
850                                         enum v4l2_mbus_pixelcode *code)
851 {
852         /* Check requested format index is within range */
853         if (index)
854                 return -EINVAL;
855         *code = V4L2_MBUS_FMT_YUYV10_1X20;
856         return 0;
857 }
858
859 /*
860  * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
861  * @sd: pointer to standard V4L2 sub-device structure
862  * @enable: streaming enable or disable
863  *
864  * Sets streaming to enable or disable, if possible.
865  */
866 static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
867 {
868         struct tvp7002 *device = to_tvp7002(sd);
869         int error = 0;
870
871         if (device->streaming == enable)
872                 return 0;
873
874         if (enable) {
875                 /* Set output state on (low impedance means stream on) */
876                 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
877                 device->streaming = enable;
878         } else {
879                 /* Set output state off (high impedance means stream off) */
880                 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
881                 if (error)
882                         v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
883
884                 device->streaming = enable;
885         }
886
887         return error;
888 }
889
890 /*
891  * tvp7002_log_status() - Print information about register settings
892  * @sd: ptr to v4l2_subdev struct
893  *
894  * Log register values of a TVP7002 decoder device.
895  * Returns zero or -EINVAL if read operation fails.
896  */
897 static int tvp7002_log_status(struct v4l2_subdev *sd)
898 {
899         const struct tvp7002_preset_definition *presets = tvp7002_presets;
900         struct tvp7002 *device = to_tvp7002(sd);
901         struct v4l2_dv_enum_preset e_preset;
902         struct v4l2_dv_preset detected;
903         int i;
904
905         detected.preset = V4L2_DV_INVALID;
906         /* Find my current standard*/
907         tvp7002_query_dv_preset(sd, &detected);
908
909         /* Print standard related code values */
910         for (i = 0; i < NUM_PRESETS; i++, presets++)
911                 if (presets->preset == detected.preset)
912                         break;
913
914         if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
915                 return -EINVAL;
916
917         v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
918         v4l2_info(sd, "   Pixels per line: %u\n", e_preset.width);
919         v4l2_info(sd, "   Lines per frame: %u\n\n", e_preset.height);
920         if (i == NUM_PRESETS) {
921                 v4l2_info(sd, "Detected DV Preset: None\n");
922         } else {
923                 if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
924                         return -EINVAL;
925                 v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
926                 v4l2_info(sd, "  Pixels per line: %u\n", e_preset.width);
927                 v4l2_info(sd, "  Lines per frame: %u\n\n", e_preset.height);
928         }
929         v4l2_info(sd, "Streaming enabled: %s\n",
930                                         device->streaming ? "yes" : "no");
931
932         /* Print the current value of the gain control */
933         v4l2_ctrl_handler_log_status(&device->hdl, sd->name);
934
935         return 0;
936 }
937
938 /*
939  * tvp7002_enum_dv_presets() - Enum supported digital video formats
940  * @sd: pointer to standard V4L2 sub-device structure
941  * @preset: pointer to format struct
942  *
943  * Enumerate supported digital video formats.
944  */
945 static int tvp7002_enum_dv_presets(struct v4l2_subdev *sd,
946                 struct v4l2_dv_enum_preset *preset)
947 {
948         /* Check requested format index is within range */
949         if (preset->index >= NUM_PRESETS)
950                 return -EINVAL;
951
952         return v4l_fill_dv_preset_info(tvp7002_presets[preset->index].preset, preset);
953 }
954
955 static int tvp7002_enum_dv_timings(struct v4l2_subdev *sd,
956                 struct v4l2_enum_dv_timings *timings)
957 {
958         /* Check requested format index is within range */
959         if (timings->index >= NUM_PRESETS)
960                 return -EINVAL;
961
962         timings->timings = tvp7002_presets[timings->index].timings;
963         return 0;
964 }
965
966 static const struct v4l2_ctrl_ops tvp7002_ctrl_ops = {
967         .s_ctrl = tvp7002_s_ctrl,
968 };
969
970 /* V4L2 core operation handlers */
971 static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
972         .g_chip_ident = tvp7002_g_chip_ident,
973         .log_status = tvp7002_log_status,
974         .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
975         .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
976         .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
977         .g_ctrl = v4l2_subdev_g_ctrl,
978         .s_ctrl = v4l2_subdev_s_ctrl,
979         .queryctrl = v4l2_subdev_queryctrl,
980         .querymenu = v4l2_subdev_querymenu,
981 #ifdef CONFIG_VIDEO_ADV_DEBUG
982         .g_register = tvp7002_g_register,
983         .s_register = tvp7002_s_register,
984 #endif
985 };
986
987 /* Specific video subsystem operation handlers */
988 static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
989         .enum_dv_presets = tvp7002_enum_dv_presets,
990         .s_dv_preset = tvp7002_s_dv_preset,
991         .query_dv_preset = tvp7002_query_dv_preset,
992         .g_dv_timings = tvp7002_g_dv_timings,
993         .s_dv_timings = tvp7002_s_dv_timings,
994         .enum_dv_timings = tvp7002_enum_dv_timings,
995         .query_dv_timings = tvp7002_query_dv_timings,
996         .s_stream = tvp7002_s_stream,
997         .g_mbus_fmt = tvp7002_mbus_fmt,
998         .try_mbus_fmt = tvp7002_mbus_fmt,
999         .s_mbus_fmt = tvp7002_mbus_fmt,
1000         .enum_mbus_fmt = tvp7002_enum_mbus_fmt,
1001 };
1002
1003 /* V4L2 top level operation handlers */
1004 static const struct v4l2_subdev_ops tvp7002_ops = {
1005         .core = &tvp7002_core_ops,
1006         .video = &tvp7002_video_ops,
1007 };
1008
1009 /*
1010  * tvp7002_probe - Probe a TVP7002 device
1011  * @c: ptr to i2c_client struct
1012  * @id: ptr to i2c_device_id struct
1013  *
1014  * Initialize the TVP7002 device
1015  * Returns zero when successful, -EINVAL if register read fails or
1016  * -EIO if i2c access is not available.
1017  */
1018 static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
1019 {
1020         struct v4l2_subdev *sd;
1021         struct tvp7002 *device;
1022         struct v4l2_dv_preset preset;
1023         int polarity_a;
1024         int polarity_b;
1025         u8 revision;
1026
1027         int error;
1028
1029         /* Check if the adapter supports the needed features */
1030         if (!i2c_check_functionality(c->adapter,
1031                 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
1032                 return -EIO;
1033
1034         if (!c->dev.platform_data) {
1035                 v4l_err(c, "No platform data!!\n");
1036                 return -ENODEV;
1037         }
1038
1039         device = kzalloc(sizeof(struct tvp7002), GFP_KERNEL);
1040
1041         if (!device)
1042                 return -ENOMEM;
1043
1044         sd = &device->sd;
1045         device->pdata = c->dev.platform_data;
1046         device->current_preset = tvp7002_presets;
1047
1048         /* Tell v4l2 the device is ready */
1049         v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
1050         v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
1051                                         c->addr, c->adapter->name);
1052
1053         error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
1054         if (error < 0)
1055                 goto found_error;
1056
1057         /* Get revision number */
1058         v4l2_info(sd, "Rev. %02x detected.\n", revision);
1059         if (revision != 0x02)
1060                 v4l2_info(sd, "Unknown revision detected.\n");
1061
1062         /* Initializes TVP7002 to its default values */
1063         error = tvp7002_write_inittab(sd, tvp7002_init_default);
1064
1065         if (error < 0)
1066                 goto found_error;
1067
1068         /* Set polarity information after registers have been set */
1069         polarity_a = 0x20 | device->pdata->hs_polarity << 5
1070                         | device->pdata->vs_polarity << 2;
1071         error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
1072         if (error < 0)
1073                 goto found_error;
1074
1075         polarity_b = 0x01  | device->pdata->fid_polarity << 2
1076                         | device->pdata->sog_polarity << 1
1077                         | device->pdata->clk_polarity;
1078         error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
1079         if (error < 0)
1080                 goto found_error;
1081
1082         /* Set registers according to default video mode */
1083         preset.preset = device->current_preset->preset;
1084         error = tvp7002_s_dv_preset(sd, &preset);
1085
1086         v4l2_ctrl_handler_init(&device->hdl, 1);
1087         v4l2_ctrl_new_std(&device->hdl, &tvp7002_ctrl_ops,
1088                         V4L2_CID_GAIN, 0, 255, 1, 0);
1089         sd->ctrl_handler = &device->hdl;
1090         if (device->hdl.error) {
1091                 int err = device->hdl.error;
1092
1093                 v4l2_ctrl_handler_free(&device->hdl);
1094                 kfree(device);
1095                 return err;
1096         }
1097         v4l2_ctrl_handler_setup(&device->hdl);
1098
1099 found_error:
1100         if (error < 0)
1101                 kfree(device);
1102
1103         return error;
1104 }
1105
1106 /*
1107  * tvp7002_remove - Remove TVP7002 device support
1108  * @c: ptr to i2c_client struct
1109  *
1110  * Reset the TVP7002 device
1111  * Returns zero.
1112  */
1113 static int tvp7002_remove(struct i2c_client *c)
1114 {
1115         struct v4l2_subdev *sd = i2c_get_clientdata(c);
1116         struct tvp7002 *device = to_tvp7002(sd);
1117
1118         v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1119                                 "on address 0x%x\n", c->addr);
1120
1121         v4l2_device_unregister_subdev(sd);
1122         v4l2_ctrl_handler_free(&device->hdl);
1123         kfree(device);
1124         return 0;
1125 }
1126
1127 /* I2C Device ID table */
1128 static const struct i2c_device_id tvp7002_id[] = {
1129         { "tvp7002", 0 },
1130         { }
1131 };
1132 MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1133
1134 /* I2C driver data */
1135 static struct i2c_driver tvp7002_driver = {
1136         .driver = {
1137                 .owner = THIS_MODULE,
1138                 .name = TVP7002_MODULE_NAME,
1139         },
1140         .probe = tvp7002_probe,
1141         .remove = tvp7002_remove,
1142         .id_table = tvp7002_id,
1143 };
1144
1145 module_i2c_driver(tvp7002_driver);